Core: added define guard __ARM_FEATURE_CMSE (#171)

Author: GuentherMartin

CMSIS/Core/Include/m-profile/cmsis_armclang_m.h

@@ -56,7 +56,7 @@
 #define __VECTOR_TABLE_ATTRIBUTE  __attribute__((used, section("RESET")))
 #endif
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 #ifndef __STACK_SEAL
 #define __STACK_SEAL              Image$$STACKSEAL$$ZI$$Base
 #endif
@@ -69,12 +69,13 @@
 #define __TZ_STACK_SEAL_VALUE     0xFEF5EDA5FEF5EDA5ULL
 #endif
 
-
-__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop) {
+__STATIC_FORCEINLINE void __TZ_set_STACKSEAL_S (uint32_t* stackTop)
+{
   *((uint64_t *)stackTop) = __TZ_STACK_SEAL_VALUE;
-  }
+}
 #endif
 
+
 #if (__ARM_ARCH_ISA_THUMB >= 2)
 /**
   \brief   STRT Unprivileged (8 bit)
@@ -119,7 +120,6 @@ __STATIC_FORCEINLINE void __STRT(uint32_t value, volatile uint32_t *ptr)
   @{
  */
 
-
 /**
   \brief   Get Control Register
   \details Returns the content of the Control Register.
@@ -134,7 +134,7 @@ __STATIC_FORCEINLINE uint32_t __get_CONTROL(void)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Get Control Register (non-secure)
   \details Returns the content of the non-secure Control Register when in secure mode.
@@ -162,7 +162,7 @@ __STATIC_FORCEINLINE void __set_CONTROL(uint32_t control)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Set Control Register (non-secure)
   \details Writes the given value to the non-secure Control Register when in secure state.
@@ -232,7 +232,7 @@ __STATIC_FORCEINLINE uint32_t __get_PSP(void)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Get Process Stack Pointer (non-secure)
   \details Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state.
@@ -259,7 +259,7 @@ __STATIC_FORCEINLINE void __set_PSP(uint32_t topOfProcStack)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Set Process Stack Pointer (non-secure)
   \details Assigns the given value to the non-secure Process Stack Pointer (PSP) when in secure state.
@@ -286,7 +286,7 @@ __STATIC_FORCEINLINE uint32_t __get_MSP(void)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Get Main Stack Pointer (non-secure)
   \details Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state.
@@ -313,7 +313,7 @@ __STATIC_FORCEINLINE void __set_MSP(uint32_t topOfMainStack)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Set Main Stack Pointer (non-secure)
   \details Assigns the given value to the non-secure Main Stack Pointer (MSP) when in secure state.
@@ -326,7 +326,7 @@ __STATIC_FORCEINLINE void __TZ_set_MSP_NS(uint32_t topOfMainStack)
 #endif
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Get Stack Pointer (non-secure)
   \details Returns the current value of the non-secure Stack Pointer (SP) when in secure state.
@@ -367,7 +367,7 @@ __STATIC_FORCEINLINE uint32_t __get_PRIMASK(void)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Get Priority Mask (non-secure)
   \details Returns the current state of the non-secure priority mask bit from the Priority Mask Register when in secure state.
@@ -394,7 +394,7 @@ __STATIC_FORCEINLINE void __set_PRIMASK(uint32_t priMask)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Set Priority Mask (non-secure)
   \details Assigns the given value to the non-secure Priority Mask Register when in secure state.
@@ -422,7 +422,7 @@ __STATIC_FORCEINLINE uint32_t __get_BASEPRI(void)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Get Base Priority (non-secure)
   \details Returns the current value of the non-secure Base Priority register when in secure state.
@@ -449,7 +449,7 @@ __STATIC_FORCEINLINE void __set_BASEPRI(uint32_t basePri)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Set Base Priority (non-secure)
   \details Assigns the given value to the non-secure Base Priority register when in secure state.
@@ -488,7 +488,7 @@ __STATIC_FORCEINLINE uint32_t __get_FAULTMASK(void)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Get Fault Mask (non-secure)
   \details Returns the current value of the non-secure Fault Mask register when in secure state.
@@ -515,7 +515,7 @@ __STATIC_FORCEINLINE void __set_FAULTMASK(uint32_t faultMask)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Set Fault Mask (non-secure)
   \details Assigns the given value to the non-secure Fault Mask register when in secure state.
@@ -542,9 +542,9 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
  */
 __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
 {
-#if (((__ARM_ARCH_8M_MAIN__   < 1) && \
-      (__ARM_ARCH_8_1M_MAIN__ < 1)    ) && \
-     (__ARM_FEATURE_CMSE < 3)              )
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+     !(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
+     (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
   /* without main extensions, the non-secure PSPLIM is RAZ/WI */
   return (0U);
 #else
@@ -554,7 +554,7 @@ __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
 #endif
 }
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Get Process Stack Pointer Limit (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -565,8 +565,8 @@ __STATIC_FORCEINLINE uint32_t __get_PSPLIM(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
 {
-#if ((__ARM_ARCH_8M_MAIN__   < 1) && \
-     (__ARM_ARCH_8_1M_MAIN__ < 1)    )
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+     !(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
   /* without main extensions, the non-secure PSPLIM is RAZ/WI */
   return (0U);
 #else
@@ -589,9 +589,9 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
  */
 __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
 {
-#if (((__ARM_ARCH_8M_MAIN__   < 1) && \
-      (__ARM_ARCH_8_1M_MAIN__ < 1)    ) && \
-     (__ARM_FEATURE_CMSE < 3)              )
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+     !(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
+     (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
   /* without main extensions, the non-secure PSPLIM is RAZ/WI */
   (void)ProcStackPtrLimit;
 #else
@@ -600,7 +600,7 @@ __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Set Process Stack Pointer (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -611,8 +611,8 @@ __STATIC_FORCEINLINE void __set_PSPLIM(uint32_t ProcStackPtrLimit)
  */
 __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
 {
-#if ((__ARM_ARCH_8M_MAIN__   < 1) && \
-     (__ARM_ARCH_8_1M_MAIN__ < 1)    )
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+     !(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
   /* without main extensions, the non-secure PSPLIM is RAZ/WI */
   (void)ProcStackPtrLimit;
 #else
@@ -632,9 +632,9 @@ __STATIC_FORCEINLINE void __TZ_set_PSPLIM_NS(uint32_t ProcStackPtrLimit)
  */
 __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
 {
-#if (((__ARM_ARCH_8M_MAIN__   < 1) && \
-      (__ARM_ARCH_8_1M_MAIN__ < 1)    ) && \
-     (__ARM_FEATURE_CMSE < 3)              )
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+     !(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
+     (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
   /* without main extensions, the non-secure MSPLIM is RAZ/WI */
   return (0U);
 #else
@@ -645,7 +645,7 @@ __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Get Main Stack Pointer Limit (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -656,8 +656,8 @@ __STATIC_FORCEINLINE uint32_t __get_MSPLIM(void)
  */
 __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
 {
-#if ((__ARM_ARCH_8M_MAIN__   < 1) && \
-     (__ARM_ARCH_8_1M_MAIN__ < 1)    )
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+     !(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
   /* without main extensions, the non-secure MSPLIM is RAZ/WI */
   return (0U);
 #else
@@ -679,9 +679,9 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_MSPLIM_NS(void)
  */
 __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
 {
-#if (((__ARM_ARCH_8M_MAIN__   < 1) && \
-      (__ARM_ARCH_8_1M_MAIN__ < 1)    ) && \
-     (__ARM_FEATURE_CMSE < 3)              )
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+     !(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)) && \
+     (!defined (__ARM_FEATURE_CMSE  ) || (__ARM_FEATURE_CMSE   < 3)))
   /* without main extensions, the non-secure MSPLIM is RAZ/WI */
   (void)MainStackPtrLimit;
 #else
@@ -690,7 +690,7 @@ __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
 }
 
 
-#if (__ARM_FEATURE_CMSE == 3)
+#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3)
 /**
   \brief   Set Main Stack Pointer Limit (non-secure)
   Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
@@ -701,15 +701,16 @@ __STATIC_FORCEINLINE void __set_MSPLIM(uint32_t MainStackPtrLimit)
  */
 __STATIC_FORCEINLINE void __TZ_set_MSPLIM_NS(uint32_t MainStackPtrLimit)
 {
-#if ((__ARM_ARCH_8M_MAIN__   < 1) && \
-     (__ARM_ARCH_8_1M_MAIN__ < 1)    )
+#if (!(defined (__ARM_ARCH_8M_MAIN__ ) && (__ARM_ARCH_8M_MAIN__ == 1)) && \
+     !(defined (__ARM_ARCH_8_1M_MAIN__ ) && (__ARM_ARCH_8_1M_MAIN__ == 1)))
   /* without main extensions, the non-secure MSPLIM is RAZ/WI */
   (void)MainStackPtrLimit;
 #else
   __ASM volatile ("MSR msplim_ns, %0" : : "r" (MainStackPtrLimit));
 #endif
 }
 #endif
+
 #endif /* (__ARM_ARCH >= 8) */
 /** @} end of CMSIS_Core_RegAccFunctions */
 
@@ -812,7 +813,7 @@ __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3)
   return (result);
 }
 #endif /* (defined (__ARM_FEATURE_DSP) && (__ARM_FEATURE_DSP == 1)) */
- /** @} end of group CMSIS_SIMD_intrinsics */
+/** @} end of group CMSIS_SIMD_intrinsics */
 
 
 #endif /* __CMSIS_ARMCLANG_M_H */