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johnfeajohnfea
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Add support for b4_SSE2 batched mode.
1 parent 0d122e7 commit 6ffdff8

12 files changed

+104
-7
lines changed

‎src/cmake/compiler.cmake

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -329,7 +329,7 @@ endif ()
329329
#
330330
# The USE_BATCHED option may be set to indicate that support for batched
331331
# SIMD shader execution be compiled along with targe specific libraries
332-
set (USE_BATCHED "" CACHE STRING "Build batched SIMD shader execution for (0, b8_AVX, b8_AVX2, b8_AVX2_noFMA, b8_AVX512, b8_AVX512_noFMA, b16_AVX512, b16_AVX512_noFMA)")
332+
set (USE_BATCHED "" CACHE STRING "Build batched SIMD shader execution for (0, b4_SSE2, b8_AVX, b8_AVX2, b8_AVX2_noFMA, b8_AVX512, b8_AVX512_noFMA, b16_AVX512, b16_AVX512_noFMA)")
333333
option (VEC_REPORT "Enable compiler's reporting system for vectorization" OFF)
334334
set (BATCHED_SUPPORT_DEFINES "")
335335
set (BATCHED_TARGET_LIBS "")

‎src/include/OSL/rendererservices.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -601,6 +601,7 @@ class OSLEXECPUBLIC RendererServices {
601601
/// Unless overridden, a nullptr is returned.
602602
virtual BatchedRendererServices<16>* batched(WidthOf<16>);
603603
virtual BatchedRendererServices<8>* batched(WidthOf<8>);
604+
virtual BatchedRendererServices<4>* batched(WidthOf<4>);
604605

605606
protected:
606607
TextureSystem* m_texturesys; // A place to hold a TextureSystem

‎src/liboslexec/CMakeLists.txt

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -380,6 +380,8 @@ foreach(batched_target ${BATCHED_TARGET_LIST})
380380
list (APPEND TARGET_CXX_OPTS "-march=core-avx2")
381381
elseif (${TARGET_OPT_ISA} STREQUAL "AVX")
382382
list (APPEND TARGET_CXX_OPTS "-march=corei7-avx")
383+
elseif (${TARGET_OPT_ISA} STREQUAL "SSE2")
384+
list (APPEND TARGET_CXX_OPTS "-march=core2")
383385
else ()
384386
message (FATAL_ERROR "Unknown ISA=${TARGET_OPT_ISA} extract from USE_BATCHED entry ${batched_target}")
385387
endif ()

‎src/liboslexec/batched_analysis.cpp

Lines changed: 7 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1813,10 +1813,16 @@ struct Analyzer {
18131813
// specific BatchedRendererServices.
18141814
// Right here we don't know which width will be used,
18151815
// so we will just require all widths provide the same answer
1816+
auto rs4 = m_ba.renderer()->batched(WidthOf<4>());
18161817
auto rs8 = m_ba.renderer()->batched(WidthOf<8>());
18171818
auto rs16 = m_ba.renderer()->batched(WidthOf<16>());
1818-
if (rs8 || rs16) {
1819+
if (rs4 || rs8 || rs16) {
18191820
get_attr_is_uniform = true;
1821+
if (rs4) {
1822+
get_attr_is_uniform
1823+
&= rs4->is_attribute_uniform(obj_name,
1824+
attr_name);
1825+
}
18201826
if (rs8) {
18211827
get_attr_is_uniform
18221828
&= rs8->is_attribute_uniform(obj_name,

‎src/liboslexec/batched_backendllvm.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -141,6 +141,7 @@ BatchedBackendLLVM::BatchedBackendLLVM(ShadingSystemImpl& shadingsys,
141141
switch (vector_width()) {
142142
case 16: m_true_mask_value = Mask<16>(true).value(); break;
143143
case 8: m_true_mask_value = Mask<8>(true).value(); break;
144+
case 4: m_true_mask_value = Mask<4>(true).value(); break;
144145
default: OSL_ASSERT(0 && "unsupported vector width");
145146
}
146147
ll.dumpasm(shadingsys.m_llvm_dumpasm);

‎src/liboslexec/batched_llvm_instance.cpp

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -537,6 +537,33 @@ const char*
537537
= "b8_AVX_";
538538
#endif
539539

540+
#ifdef __OSL_SUPPORTS_b4_SSE2
541+
template<>
542+
const NameAndSignature
543+
ConcreteTargetLibraryHelper<4, TargetISA::x64>::library_functions[]
544+
= {
545+
# define DECL_INDIRECT(name, signature) \
546+
NameAndSignature { #name, signature },
547+
# define DECL(name, signature) DECL_INDIRECT(name, signature)
548+
# define __OSL_WIDTH 4
549+
# define __OSL_TARGET_ISA SSE2
550+
// Don't allow order of xmacro includes be rearranged
551+
// clang-format off
552+
# include "wide/define_opname_macros.h"
553+
# include "builtindecl_wide_xmacro.h"
554+
# include "wide/undef_opname_macros.h"
555+
// clang-format on
556+
# undef __OSL_TARGET_ISA
557+
# undef __OSL_WIDTH
558+
# undef DECL
559+
# undef DECL_INDIRECT
560+
};
561+
template<>
562+
const char*
563+
ConcreteTargetLibraryHelper<4, TargetISA::x64>::library_selector_string
564+
= "b4_SSE2_";
565+
#endif
566+
540567

541568

542569
std::unique_ptr<BatchedBackendLLVM::TargetLibraryHelper>
@@ -592,6 +619,17 @@ BatchedBackendLLVM::TargetLibraryHelper::build(ShadingContext* context,
592619
default: break;
593620
}
594621
break;
622+
case 4:
623+
switch (target_isa) {
624+
#ifdef __OSL_SUPPORTS_b4_SSE2
625+
case TargetISA::x64:
626+
return RetType(
627+
new ConcreteTargetLibraryHelper<4, TargetISA::x64>());
628+
#endif
629+
default: break;
630+
}
631+
break;
632+
595633
default: OSL_ASSERT(0 && "unsupported vector width");
596634
}
597635
std::cerr << "Build is not configured to support TargetISA of "
@@ -735,6 +773,9 @@ BatchedBackendLLVM::llvm_type_batched_texture_options()
735773
{
736774
std::vector<unsigned int> offset_by_index;
737775
switch (m_width) {
776+
case 4:
777+
build_offsets_of_BatchedTextureOptions<4>(offset_by_index);
778+
break;
738779
case 8:
739780
build_offsets_of_BatchedTextureOptions<8>(offset_by_index);
740781
break;
@@ -2698,6 +2739,9 @@ BatchedBackendLLVM::run()
26982739
{
26992740
std::vector<unsigned int> offset_by_index;
27002741
switch (m_width) {
2742+
case 4:
2743+
build_offsets_of_BatchedShaderGlobals<4>(offset_by_index);
2744+
break;
27012745
case 8:
27022746
build_offsets_of_BatchedShaderGlobals<8>(offset_by_index);
27032747
break;

‎src/liboslexec/batched_rendservices.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -328,5 +328,6 @@ BatchedRendererServices<WidthT>::getmessage(BatchedShaderGlobals* bsg,
328328
// Explicitly instantiate BatchedRendererServices template
329329
template class OSLEXECPUBLIC BatchedRendererServices<16>;
330330
template class OSLEXECPUBLIC BatchedRendererServices<8>;
331+
template class OSLEXECPUBLIC BatchedRendererServices<4>;
331332

332333
OSL_NAMESPACE_EXIT

‎src/liboslexec/context.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -674,6 +674,7 @@ osl_incr_layers_executed(ShaderGlobals* sg)
674674
// Explicit template instantiation for supported batch sizes
675675
template class ShadingContext::Batched<16>;
676676
template class ShadingContext::Batched<8>;
677+
template class ShadingContext::Batched<4>;
677678
#endif
678679

679680

‎src/liboslexec/llvm_passes.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -435,6 +435,8 @@ class LegacyPreventBitMasksFromBeingLiveinsToBasicBlocks final
435435
// including this file will need its own static members defined. LLVM will
436436
// assign IDs when they get registered, so this initialization value is not
437437
// important.
438+
template<> char LegacyPreventBitMasksFromBeingLiveinsToBasicBlocks<4>::ID = 0;
439+
438440
template<> char LegacyPreventBitMasksFromBeingLiveinsToBasicBlocks<8>::ID = 0;
439441

440442
template<> char LegacyPreventBitMasksFromBeingLiveinsToBasicBlocks<16>::ID = 0;

‎src/liboslexec/llvm_util.cpp

Lines changed: 14 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -619,6 +619,12 @@ LLVM_Util::SetupLLVM()
619619

620620
#ifndef OSL_LLVM_NEW_PASS_MANAGER
621621
// LegacyPreventBitMasksFromBeingLiveinsToBasicBlocks
622+
static llvm::RegisterPass<
623+
LegacyPreventBitMasksFromBeingLiveinsToBasicBlocks<4>>
624+
sRegCustomPass2(
625+
"PreventBitMasksFromBeingLiveinsToBasicBlocks<4>",
626+
"Prevent Bit Masks <4xi1> From Being Liveins To Basic Blocks Pass",
627+
false /* Only looks at CFG */, false /* Analysis Pass */);
622628
static llvm::RegisterPass<
623629
LegacyPreventBitMasksFromBeingLiveinsToBasicBlocks<8>>
624630
sRegCustomPass0(
@@ -3592,6 +3598,11 @@ LLVM_Util::mask_as_int(llvm::Value* mask)
35923598
// and all types are happy
35933599
intMaskType = type_int8();
35943600
break;
3601+
case 4:
3602+
// We can just reinterpret cast a 4 bit mask to a 8 bit integer
3603+
// and all types are happy
3604+
intMaskType = type_int8();
3605+
break;
35953606
default: OSL_ASSERT(0 && "unsupported native bit mask width");
35963607
};
35973608

@@ -3950,10 +3961,10 @@ LLVM_Util::op_1st_active_lane_of(llvm::Value* mask)
39503961
// and all types are happy
39513962
intMaskType = type_int8();
39523963
break;
3953-
#if 0 // WIP
3964+
//#if 0 // WIP
39543965
case 4:
39553966
{
3956-
// We can just reinterpret cast a 8 bit mask to a 8 bit integer
3967+
// We can just reinterpret cast a 4 bit mask to a 8 bit integer
39573968
// and all types are happy
39583969
intMaskType = type_int8();
39593970

@@ -3966,7 +3977,7 @@ LLVM_Util::op_1st_active_lane_of(llvm::Value* mask)
39663977
// llvm::Value * mask_as_int = builder().CreateBitCast (wide_int_mask, int_reinterpret_cast_vector_type);
39673978
break;
39683979
}
3969-
#endif
3980+
//#endif
39703981
default: OSL_ASSERT(0 && "unsupported native bit mask width");
39713982
};
39723983

‎src/liboslexec/rendservices.cpp

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -524,4 +524,11 @@ RendererServices::batched(WidthOf<8>)
524524
return nullptr;
525525
}
526526

527+
BatchedRendererServices<4>*
528+
RendererServices::batched(WidthOf<4>)
529+
{
530+
// No default implementation for batched services
531+
return nullptr;
532+
}
533+
527534
OSL_NAMESPACE_EXIT

‎src/liboslexec/shadingsys.cpp

Lines changed: 23 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -622,6 +622,23 @@ ShadingSystem::configure_batch_execution_at(int width)
622622
if (target_requested) {
623623
break;
624624
}
625+
// fallthrough
626+
case TargetISA::x64:
627+
# ifdef __OSL_SUPPORTS_b4_SSE2
628+
if (LLVM_Util::supports_isa(TargetISA::x64)) {
629+
if (!target_requested)
630+
m_impl->attribute("llvm_jit_target",
631+
LLVM_Util::target_isa_name(
632+
TargetISA::x64));
633+
// SSE2 doesn't support FMA
634+
m_impl->attribute("llvm_jit_fma", 0);
635+
return true;
636+
}
637+
# endif
638+
if (target_requested) {
639+
break;
640+
}
641+
625642
// fallthrough
626643
default: return false;
627644
};
@@ -885,6 +902,7 @@ ShadingSystem::BatchedExecutor<WidthT>::jit_all_groups(int nthreads)
885902
// Explicitly instantiate
886903
template class ShadingSystem::BatchedExecutor<16>;
887904
template class ShadingSystem::BatchedExecutor<8>;
905+
template class ShadingSystem::BatchedExecutor<4>;
888906
#endif
889907

890908

@@ -1079,7 +1097,8 @@ ShadingSystemImpl::ShadingSystemImpl(RendererServices* renderer,
10791097
, m_opt_groupdata(true)
10801098
#if OSL_USE_BATCHED
10811099
, m_opt_batched_analysis((renderer->batched(WidthOf<16>()) != nullptr)
1082-
|| (renderer->batched(WidthOf<8>()) != nullptr))
1100+
|| (renderer->batched(WidthOf<8>()) != nullptr)
1101+
|| (renderer->batched(WidthOf<4>()) != nullptr))
10831102
#else
10841103
, m_opt_batched_analysis(false)
10851104
#endif
@@ -3794,7 +3813,8 @@ ShadingSystemImpl::optimize_group(ShaderGroup& group, ShadingContext* ctx,
37943813
// the batch jit has already happened,
37953814
// as it requires the ops so we can't delete them yet!
37963815
if (((renderer()->batched(WidthOf<16>()) == nullptr)
3797-
&& (renderer()->batched(WidthOf<8>()) == nullptr))
3816+
&& (renderer()->batched(WidthOf<8>()) == nullptr)
3817+
&& (renderer()->batched(WidthOf<4>()) == nullptr))
37983818
|| group.batch_jitted()) {
37993819
group_post_jit_cleanup(group);
38003820
}
@@ -4015,6 +4035,7 @@ ShadingSystemImpl::Batched<WidthT>::jit_all_groups(int nthreads, int mythread,
40154035
// machine as well, start with just the batch size
40164036
template class pvt::ShadingSystemImpl::Batched<16>;
40174037
template class pvt::ShadingSystemImpl::Batched<8>;
4038+
template class pvt::ShadingSystemImpl::Batched<4>;
40184039
#endif
40194040

40204041
int

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