FROM_BLINKER_TO_RISCV Tutorial on Gatemate FPGA

[fm4dd]

I am in progress of porting the Verilog tutorial steps FROM_BLINKER_TO_RISCV to the Gatemate E1 FPGA evaluation board made by Cologne Chip. The Gatemate FPGA is using the same Opensource toolchain, with the exception of a vendor-provided "place-and-route" executable.

^{Gatemate E1 FPGA development board}

Most of the tutorial steps require only a pushbutton and a set of LEDs. They can be easily completed by using the Gatemate E1 evaluation board "stand-alone". For UART serial output introduced from step17, I am currently using Digilents PMOD USBUART.

Latest status: I got the tutorial up to step21 working.

The repository is at:
https://github.com/fm4dd/gatemate-riscv

Thank You Bruno for creating this excellent tutorial with a detailed step-by-step documentation.
Cheers, Frank

[fm4dd]

With extra help, the tutorial step22 is now working as well. The Gatemate E1 board FPGA flash access works!

Enjoy, Frank