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| 1 | +/* Copyright 2021 Alibaba Group Holding Limited. All Rights Reserved. |
| 2 | +
|
| 3 | +Licensed under the Apache License, Version 2.0 (the "License"); |
| 4 | +you may not use this file except in compliance with the License. |
| 5 | +You may obtain a copy of the License at |
| 6 | +
|
| 7 | + http://www.apache.org/licenses/LICENSE-2.0 |
| 8 | +
|
| 9 | +Unless required by applicable law or agreed to in writing, software |
| 10 | +distributed under the License is distributed on an "AS IS" BASIS, |
| 11 | +WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 12 | +See the License for the specific language governing permissions and |
| 13 | +limitations under the License. |
| 14 | +==============================================================================*/ |
| 15 | + |
| 16 | +#if HYBRIDBACKEND_TENSORFLOW |
| 17 | + |
| 18 | +#if GOOGLE_CUDA |
| 19 | +#define EIGEN_USE_GPU |
| 20 | + |
| 21 | +#include <cuda.h> |
| 22 | +#include <cuda_runtime.h> |
| 23 | + |
| 24 | +#include <limits> |
| 25 | + |
| 26 | +#include <tensorflow/core/framework/register_types.h> |
| 27 | +#include <tensorflow/core/framework/tensor.h> |
| 28 | +#include <tensorflow/core/public/version.h> |
| 29 | + |
| 30 | +#include "hybridbackend/common/atomic.cu.h" |
| 31 | +#include "hybridbackend/tensorflow/common/device_functions.h" |
| 32 | +#include "hybridbackend/tensorflow/common/slice_sum.h" |
| 33 | + |
| 34 | +namespace tensorflow { |
| 35 | + |
| 36 | +using GPUDevice = Eigen::GpuDevice; |
| 37 | + |
| 38 | +namespace hybridbackend { |
| 39 | + |
| 40 | +namespace functor { |
| 41 | + |
| 42 | +template <typename T, int32 N = 256> |
| 43 | +__global__ void SliceSumKernel(const int32 num_rows, const int32 num_cols, |
| 44 | + const int32 col, const T* input, T* output_total, |
| 45 | + T* output) { |
| 46 | + for (int32 idx : CudaGridRangeX(num_rows)) { |
| 47 | + const T v = input[idx * num_cols + col]; |
| 48 | + output[idx] = v; |
| 49 | + atomicAdd(output_total, v); |
| 50 | + } |
| 51 | +} |
| 52 | + |
| 53 | +template <typename T> |
| 54 | +struct SliceSum<GPUDevice, T> { |
| 55 | + void operator()(const int32 num_rows, const int32 num_cols, const int32 col, |
| 56 | + const T* input, T* output_total, T* output, |
| 57 | + const Eigen::GpuDevice& d) { |
| 58 | + CudaLaunch(SliceSumKernel<T>, num_rows, 0, d, nullptr, num_rows, num_cols, |
| 59 | + col, input, output_total, output); |
| 60 | + } |
| 61 | +}; |
| 62 | + |
| 63 | +template struct SliceSum<GPUDevice, int32>; |
| 64 | +template struct SliceSum<GPUDevice, int64>; |
| 65 | +template struct SliceSum<GPUDevice, uint32>; |
| 66 | +template struct SliceSum<GPUDevice, uint64>; |
| 67 | + |
| 68 | +template <typename T, int32 N = 256> |
| 69 | +__global__ void GroupSliceSumKernel(const int32 num_rows, const int32 num_cols, |
| 70 | + const int32 col, const int32 num_inputs, |
| 71 | + const T* inputs, T* output_totals, |
| 72 | + T** outputs) { |
| 73 | + for (int32 idx : CudaGridRangeX(num_inputs * num_rows)) { |
| 74 | + const int32 s = idx / num_rows; |
| 75 | + const int32 sidx = idx % num_rows; |
| 76 | + const T v = inputs[idx * num_cols + col]; |
| 77 | + outputs[s][sidx] = v; |
| 78 | + atomicAdd(output_totals + s, v); |
| 79 | + } |
| 80 | +} |
| 81 | + |
| 82 | +template <typename T> |
| 83 | +struct SliceSumN<GPUDevice, T> { |
| 84 | + void operator()(const int32 num_rows, const int32 num_cols, const int32 col, |
| 85 | + const int32 num_inputs, const T* inputs, T* output_totals, |
| 86 | + T** outputs, const Eigen::GpuDevice& d) { |
| 87 | + CudaLaunch(GroupSliceSumKernel<T>, num_inputs * num_rows, 0, d, nullptr, |
| 88 | + num_rows, num_cols, col, num_inputs, inputs, output_totals, |
| 89 | + outputs); |
| 90 | + } |
| 91 | +}; |
| 92 | + |
| 93 | +template struct SliceSumN<GPUDevice, int32>; |
| 94 | +template struct SliceSumN<GPUDevice, int64>; |
| 95 | +template struct SliceSumN<GPUDevice, uint32>; |
| 96 | +template struct SliceSumN<GPUDevice, uint64>; |
| 97 | + |
| 98 | +} // namespace functor |
| 99 | +} // namespace hybridbackend |
| 100 | +} // namespace tensorflow |
| 101 | + |
| 102 | +#endif // GOOGLE_CUDA |
| 103 | +#endif // HYBRIDBACKEND_TENSORFLOW |
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