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| 1 | +/** |
| 2 | + ****************************************************************************** |
| 3 | + * @file force_sensor.c |
| 4 | + * @author Jim |
| 5 | + * @version V1.0 |
| 6 | + * @date 16-Jan-2015 |
| 7 | + * @brief This file provides force_sensor functions |
| 8 | + * |
| 9 | + ****************************************************************************** |
| 10 | + * @attention |
| 11 | + * |
| 12 | + * <h2><center>© COPYRIGHT 2015 CSST Robot Research Center</center></h2> |
| 13 | + * |
| 14 | + ****************************************************************************** |
| 15 | + */ |
| 16 | +#include "force_sensor.h" |
| 17 | +#include "stm32f4xx.h" |
| 18 | + |
| 19 | + |
| 20 | + |
| 21 | +__IO uint16_t ADC3ConvertedValue[8] = {0,0,0,0,0,0,0,0}; // the ADC value of the new force sensors |
| 22 | + |
| 23 | + |
| 24 | +void SENSOR_Force_Init(void) |
| 25 | +{ |
| 26 | + GPIO_InitTypeDef GPIO_InitStructure; |
| 27 | + |
| 28 | + ADC_InitTypeDef ADC_InitStructure; |
| 29 | + ADC_CommonInitTypeDef ADC_CommonInitStructure; |
| 30 | + |
| 31 | + DMA_InitTypeDef DMA_InitStructure; |
| 32 | + |
| 33 | + /* GPIO Config ------------------------------------------------------------------*/ |
| 34 | + /* Enable GPIOF Clock */ |
| 35 | + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOF, ENABLE); |
| 36 | + |
| 37 | + // Configure ADC3 Channel13 pin as analog input for New Force sensors' (1,2,3,4) I/Os |
| 38 | + GPIO_StructInit(&GPIO_InitStructure); // Reset init structure, if not it can cause issues... |
| 39 | + //ADC3 CH9 CH14 CH15 CH4 CH5 CH6 CH7 CH8 |
| 40 | + GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3|GPIO_Pin_4|GPIO_Pin_5|GPIO_Pin_6| |
| 41 | + GPIO_Pin_7|GPIO_Pin_8|GPIO_Pin_9|GPIO_Pin_10; |
| 42 | + GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AN; |
| 43 | + GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; |
| 44 | + GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; |
| 45 | + GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_DOWN; |
| 46 | + GPIO_Init(GPIOF, &GPIO_InitStructure); |
| 47 | + |
| 48 | + /* DMA2 Config ------------------------------------------------------------------*/ |
| 49 | + /* Enable DMA2 Clock */ |
| 50 | + RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_DMA2, ENABLE); |
| 51 | + /* DMA2 Stream0 channel0 configuration */ |
| 52 | + |
| 53 | + DMA_DeInit(DMA2_Stream1); |
| 54 | + |
| 55 | + DMA_InitStructure.DMA_Channel = DMA_Channel_2; |
| 56 | + DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)ADC3_DR_ADDRESS; |
| 57 | + DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)&ADC3ConvertedValue; |
| 58 | + DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory; |
| 59 | + DMA_InitStructure.DMA_BufferSize = 8; |
| 60 | + DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable; |
| 61 | + DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable; |
| 62 | + DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord; |
| 63 | + DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord; |
| 64 | + DMA_InitStructure.DMA_Mode = DMA_Mode_Circular; |
| 65 | + |
| 66 | + DMA_InitStructure.DMA_Priority = DMA_Priority_High; |
| 67 | + DMA_InitStructure.DMA_FIFOMode = DMA_FIFOMode_Disable; |
| 68 | + DMA_InitStructure.DMA_FIFOThreshold = DMA_FIFOThreshold_HalfFull; |
| 69 | + DMA_InitStructure.DMA_MemoryBurst = DMA_MemoryBurst_Single; |
| 70 | + DMA_InitStructure.DMA_PeripheralBurst = DMA_PeripheralBurst_Single; |
| 71 | + DMA_Init(DMA2_Stream1, &DMA_InitStructure); |
| 72 | + DMA_Cmd(DMA2_Stream1, ENABLE); |
| 73 | + |
| 74 | + /* ADC Config -------------------------------------------------------------------*/ |
| 75 | + /* Enable ADC3 Clock */ |
| 76 | + RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC3,ENABLE); |
| 77 | + /* ADC Common Init */ |
| 78 | + ADC_CommonInitStructure.ADC_Mode = ADC_Mode_Independent; |
| 79 | + ADC_CommonInitStructure.ADC_Prescaler = ADC_Prescaler_Div4; |
| 80 | + ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_1; // |
| 81 | + //ADC_CommonInitStructure.ADC_DMAAccessMode = ADC_DMAAccessMode_Disabled; |
| 82 | + ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_15Cycles; |
| 83 | + ADC_CommonInit(&ADC_CommonInitStructure); |
| 84 | + |
| 85 | + /* ADC1 Init */ |
| 86 | + ADC_InitStructure.ADC_Resolution = ADC_Resolution_12b; |
| 87 | + //ADC_InitStructure.ADC_ScanConvMode = DISABLE; |
| 88 | + ADC_InitStructure.ADC_ScanConvMode = ENABLE; |
| 89 | + ADC_InitStructure.ADC_ContinuousConvMode = ENABLE; |
| 90 | +// gtz02nov ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConvEdge_None; |
| 91 | + ADC_InitStructure.ADC_ExternalTrigConvEdge = ADC_ExternalTrigConvEdge_None; //gtz01nov |
| 92 | + ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1; |
| 93 | + ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right; |
| 94 | + //ADC_InitStructure.ADC_NbrOfConversion = 1; |
| 95 | + ADC_InitStructure.ADC_NbrOfConversion = 8; |
| 96 | + ADC_Init(ADC3, &ADC_InitStructure); |
| 97 | + |
| 98 | + /* ADC3 regular channelx configuration */ |
| 99 | + ADC_RegularChannelConfig(ADC3, ADC_Channel_9, 1, ADC_SampleTime_144Cycles);// PF3 |
| 100 | + ADC_RegularChannelConfig(ADC3, ADC_Channel_14, 2, ADC_SampleTime_144Cycles);// PF4 |
| 101 | + ADC_RegularChannelConfig(ADC3, ADC_Channel_15, 3, ADC_SampleTime_144Cycles);// PF5 |
| 102 | + ADC_RegularChannelConfig(ADC3, ADC_Channel_4, 4, ADC_SampleTime_144Cycles);// PF6 |
| 103 | + ADC_RegularChannelConfig(ADC3, ADC_Channel_5, 5, ADC_SampleTime_144Cycles);// PF7 |
| 104 | + ADC_RegularChannelConfig(ADC3, ADC_Channel_6, 6, ADC_SampleTime_144Cycles);// PF8 |
| 105 | + ADC_RegularChannelConfig(ADC3, ADC_Channel_7, 7, ADC_SampleTime_144Cycles);// PF9 |
| 106 | + ADC_RegularChannelConfig(ADC3, ADC_Channel_8, 8, ADC_SampleTime_144Cycles);// PF10 |
| 107 | + |
| 108 | + /* Enable DMA request after last transfer (Single-ADC mode) */ |
| 109 | + ADC_DMARequestAfterLastTransferCmd(ADC3, ENABLE);//gtz01nov |
| 110 | + |
| 111 | + ADC_ContinuousModeCmd(ADC3, ENABLE); |
| 112 | + |
| 113 | + /* Enable ADC3 DMA */ |
| 114 | + ADC_DMACmd(ADC3, ENABLE); |
| 115 | + |
| 116 | + /* Enable ADC3 */ |
| 117 | + ADC_Cmd(ADC3, ENABLE); |
| 118 | + |
| 119 | + /* Start ADC3 Software Conversion */ |
| 120 | + ADC_SoftwareStartConv(ADC3); |
| 121 | +} |
| 122 | + |
| 123 | +/****************** (C) COPYRIGHT CSST Robot Research Center *****END OF FILE****/ |
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