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Merge pull request #27 from timmy61109/feature/timmy61109/CH5-3
如果採用，此拉請求將完成加法器與減法器實習 5-3 BCD加法器的實習所有工作項目
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‎1564503707611.jpg‎

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‎CH5/CH5-3/BCD_adder_1D.bdf‎

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‎CH5/CH5-3/BCD_adder_1D.bsf‎

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/*
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WARNING: Do NOT edit the input and output ports in this file in a text
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editor if you plan to continue editing the block that represents it in
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the Block Editor! File corruption is VERY likely to occur.
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*/
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/*
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Copyright (C) 1991-2013 Altera Corporation
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and its AMPP partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, Altera MegaCore Function License
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Agreement, or other applicable license agreement, including,
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without limitation, that your use is for the sole purpose of
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programming logic devices manufactured by Altera and sold by
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Altera or its authorized distributors. Please refer to the
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applicable agreement for further details.
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*/
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(header "symbol" (version "1.2"))
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(symbol
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(rect 16 16 112 208)
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(text "BCD_adder_1D" (rect 5 0 98 12)(font "Arial" (font_size 8)))
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(text "inst" (rect 8 178 25 188)(font "Arial" ))
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(port
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‎CH5/CH5-3/BCD_adder_1D.qpf‎

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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2013 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 32-bit
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# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
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# Date created = 19:10:01 September 05, 2019
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#
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# -------------------------------------------------------------------------- #
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QUARTUS_VERSION = "13.1"
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DATE = "19:10:01 September 05, 2019"
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# Revisions
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PROJECT_REVISION = "BCD_adder_1D"

‎CH5/CH5-3/BCD_adder_1D.qsf‎

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# -------------------------------------------------------------------------- #
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#
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# Copyright (C) 1991-2013 Altera Corporation
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# Your use of Altera Corporation's design tools, logic functions
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# and other software and tools, and its AMPP partner logic
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# functions, and any output files from any of the foregoing
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# (including device programming or simulation files), and any
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# associated documentation or information are expressly subject
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# to the terms and conditions of the Altera Program License
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# Subscription Agreement, Altera MegaCore Function License
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# Agreement, or other applicable license agreement, including,
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# without limitation, that your use is for the sole purpose of
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# programming logic devices manufactured by Altera and sold by
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# Altera or its authorized distributors. Please refer to the
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# applicable agreement for further details.
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#
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# -------------------------------------------------------------------------- #
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#
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# Quartus II 32-bit
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# Version 13.1.0 Build 162 10/23/2013 SJ Web Edition
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# Date created = 19:10:01 September 05, 2019
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#
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# -------------------------------------------------------------------------- #
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#
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# Notes:
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#
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# 1) The default values for assignments are stored in the file:
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# BCD_adder_1D_assignment_defaults.qdf
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# If this file doesn't exist, see file:
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# assignment_defaults.qdf
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#
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# 2) Altera recommends that you do not modify this file. This
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# file is updated automatically by the Quartus II software
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# and any changes you make may be lost or overwritten.
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#
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# -------------------------------------------------------------------------- #
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set_global_assignment -name FAMILY "Cyclone III"
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set_global_assignment -name DEVICE EP3C16F484C6
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set_global_assignment -name TOP_LEVEL_ENTITY BCD_adder_1D
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set_global_assignment -name ORIGINAL_QUARTUS_VERSION 13.1
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set_global_assignment -name PROJECT_CREATION_TIME_DATE "19:10:01 SEPTEMBER 05, 2019"
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set_global_assignment -name LAST_QUARTUS_VERSION 13.1
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set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
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set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
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set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
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set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR 1
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set_global_assignment -name NOMINAL_CORE_SUPPLY_VOLTAGE 1.2V
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set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim-Altera (VHDL)"
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set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
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set_global_assignment -name BDF_FILE BCD_adder_7483.bdf
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set_global_assignment -name BDF_FILE "../CH5-1/Full_adder_S.bdf"
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set_global_assignment -name BDF_FILE "../CH5-1/four_bir_adder.bdf"
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set_global_assignment -name BDF_FILE "../CH5-1/eight_bit_adder.bdf"
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set_global_assignment -name BDF_FILE "../CH5-1/Half_adder.bdf"
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set_global_assignment -name BDF_FILE BCD_adder_1D.bdf
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set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
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set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
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set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
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set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "2.5 V"
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set_location_assignment PIN_H7 -to A0
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set_location_assignment PIN_E3 -to A1
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set_location_assignment PIN_E4 -to A2
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set_location_assignment PIN_D2 -to A3
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set_location_assignment PIN_H6 -to B0
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set_location_assignment PIN_G4 -to B1
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set_location_assignment PIN_G5 -to B2
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set_location_assignment PIN_J7 -to B3
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set_location_assignment PIN_B1 -to C4
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set_location_assignment PIN_E1 -to S0
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set_location_assignment PIN_C1 -to S1
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set_location_assignment PIN_C2 -to S2
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set_location_assignment PIN_B2 -to S3
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set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

‎CH5/CH5-3/BCD_adder_1D.qws‎

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