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Merge branch 'release/v6.1.5-beta'
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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1571928118819 ""}
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{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 32-bit " "Running Quartus II 32-bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1571928118822 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct 24 22:41:58 2019 " "Processing started: Thu Oct 24 22:41:58 2019" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1571928118822 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1571928118822 ""}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off four_line_to_sixteen_line_decimal_decoder -c four_line_to_sixteen_line_decimal_decoder " "Command: quartus_asm --read_settings_files=off --write_settings_files=off four_line_to_sixteen_line_decimal_decoder -c four_line_to_sixteen_line_decimal_decoder" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1571928118822 ""}
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{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" { } { } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1571928121573 ""}
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{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1571928121703 ""}
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{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "386 " "Peak virtual memory: 386 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1571928123763 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct 24 22:42:03 2019 " "Processing ended: Thu Oct 24 22:42:03 2019" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1571928123763 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Elapsed time: 00:00:05" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1571928123763 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:05 " "Total CPU time (on all processors): 00:00:05" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1571928123763 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1571928123763 ""}
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{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1571928162618 ""}
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{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus II 32-bit " "Running Quartus II 32-bit EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition " "Version 13.1.0 Build 162 10/23/2013 SJ Web Edition" { } { } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1571928162625 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct 24 22:42:41 2019 " "Processing started: Thu Oct 24 22:42:41 2019" { } { } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1571928162625 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Quartus II" 0 -1 1571928162625 ""}
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{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off four_line_to_sixteen_line_decimal_decoder -c four_line_to_sixteen_line_decimal_decoder " "Command: quartus_eda --read_settings_files=off --write_settings_files=off four_line_to_sixteen_line_decimal_decoder -c four_line_to_sixteen_line_decimal_decoder" { } { } 0 0 "Command: %1!s!" 0 0 "Quartus II" 0 -1 1571928162629 ""}
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{ "Info" "IWSC_DONE_HDL_GENERATION" "four_line_to_sixteen_line_decimal_decoder.vo /home/timmy/Git/Learn-VHDL/CH6/CH6-1/simulation/qsim// simulation " "Generated file four_line_to_sixteen_line_decimal_decoder.vo in folder \"/home/timmy/Git/Learn-VHDL/CH6/CH6-1/simulation/qsim//\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "Quartus II" 0 -1 1571928165208 ""}
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{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus II 32-bit " "Quartus II 32-bit EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "337 " "Peak virtual memory: 337 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1571928165520 ""} { "Info" "IQEXE_END_BANNER_TIME" "Thu Oct 24 22:42:45 2019 " "Processing ended: Thu Oct 24 22:42:45 2019" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1571928165520 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Elapsed time: 00:00:04" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1571928165520 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:04 " "Total CPU time (on all processors): 00:00:04" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1571928165520 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Quartus II" 0 -1 1571928165520 ""}

CH6/CH6-1/db/four_line_to_sixteen_line_decimal_decoder.fit.qmsg

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