Errors in README are removed.

Author: shtaxxx

README.md

@@ -31,7 +31,7 @@ Requirements
 * Python (2.7 or later, 3.3 or later)
 * Pyverilog (Python-based Verilog HDL Design Processing Toolkit)
     - Install from pip: 'pip install pyverilog' for Python2.7 or 'pip3 install pyverilog' for Python3
-    - Otherwise, install from github into this package: 'cd Pycoram; git clone https://github.com/PyHDI/Pyverilog.git; cd pycoram; ln -s ../Pyverilog/pyverilog'
+    - Otherwise, download and install from github into this package: 'cd veriloggen; git clone https://github.com/PyHDI/Pyverilog.git; cd veriloggen; ln -s ../Pyverilog/pyverilog'
 * Jinja2 (2.7 or later)
    - The code generator (in Pyverilog) uses Jinja2 template engine.
    - 'pip install jinja2' (for Python 2.x) or 'pip3 install jinja2' (for Python 3.x)

README.rst

@@ -35,9 +35,9 @@ Requirements
 
    -  Install from pip: 'pip install pyverilog' for Python2.7 or 'pip3
       install pyverilog' for Python3
-   -  Otherwise, install from github into this package: 'cd Pycoram; git
-      clone https://github.com/PyHDI/Pyverilog.git; cd pycoram; ln -s
-      ../Pyverilog/pyverilog'
+   -  Otherwise, download and install from github into this package: 'cd
+      veriloggen; git clone https://github.com/PyHDI/Pyverilog.git; cd
+      veriloggen; ln -s ../Pyverilog/pyverilog'
 
 -  Jinja2 (2.7 or later)
 -  The code generator (in Pyverilog) uses Jinja2 template engine.