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<article role="main" id="furo-main-content">
<section id="user-guide">
<span id="id1"></span><h1>User Guide<a class="headerlink" href="#user-guide" title="Link to this heading">¶</a></h1>
<section id="introduction">
<h2>Introduction<a class="headerlink" href="#introduction" title="Link to this heading">¶</a></h2>
<p>VUnit is invoked by a user-defined project specified in a Python
script. At minimum, a VUnit project consists of a set of HDL source
files mapped to libraries. The project serves as single point of entry
for compiling and running all tests within an HDL project. VUnit
provides automatic <a class="reference internal" href="#test-bench-scanning"><span class="std std-ref">scanning</span></a> for unit
tests (test benches), automatic determination of compilation order,
and incremental recompilation of modified sources.</p>
<p>The top level Python script is typically named <code class="docutils literal notranslate"><span class="pre">run.py</span></code>.
This script is the entry point for executing VUnit.
The script defines the location for each HDL source
file in the project, the library that each source file belongs to, any
external (pre-compiled) libraries, and special settings that may be required
in order to compile or simulate the project source files. The <a class="reference internal" href="py/ui.html#python-interface"><span class="std std-ref">VUnit
Python interface</span></a> is used to create and manipulate the VUnit
project within the <code class="docutils literal notranslate"><span class="pre">run.py</span></code> file.</p>
<p>Since the VUnit project is defined by a Python script, the full functionality
of Python is available to create dynamic rules to specify the files
that should be included in the project. For example, HDL files may be
recursively included from a directory structure based on a filename pattern.
Other Python packages or modules may be imported in order to setup the project.</p>
<p>Once the files for a project have been included, the <a class="reference internal" href="cli.html#cli"><span class="std std-ref">command line
interface</span></a> can then be used to perform a variety of actions on the
project. For example, listing all tests discovered, or running individual tests
matching a wildcard pattern. The Python interface also supports running a test
bench or test for many different combinations of generic values.</p>
<div class="literal-block-wrapper docutils container" id="id3">
<div class="code-block-caption"><span class="caption-text">Example <code class="docutils literal notranslate"><span class="pre">run.py</span></code> file.</span><a class="headerlink" href="#id3" title="Link to this code">¶</a></div>
<div class="highlight-python notranslate"><div class="highlight"><pre><span></span><span class="kn">from</span><span class="w"> </span><span class="nn">vunit</span><span class="w"> </span><span class="kn">import</span> <span class="n">VUnit</span>
<span class="c1"># Create VUnit instance by parsing command line arguments</span>
<span class="n">vu</span> <span class="o">=</span> <span class="n">VUnit</span><span class="o">.</span><span class="n">from_argv</span><span class="p">()</span>
<span class="c1"># Optionally add VUnit's builtin HDL utilities for checking, logging, communication...</span>
<span class="c1"># See http://vunit.github.io/hdl_libraries.html.</span>
<span class="n">vu</span><span class="o">.</span><span class="n">add_vhdl_builtins</span><span class="p">()</span>
<span class="c1"># or</span>
<span class="c1"># vu.add_verilog_builtins()</span>
<span class="c1"># Create library 'lib'</span>
<span class="n">lib</span> <span class="o">=</span> <span class="n">vu</span><span class="o">.</span><span class="n">add_library</span><span class="p">(</span><span class="s2">"lib"</span><span class="p">)</span>
<span class="c1"># Add all files ending in .vhd in current working directory to library</span>
<span class="n">lib</span><span class="o">.</span><span class="n">add_source_files</span><span class="p">(</span><span class="s2">"*.vhd"</span><span class="p">)</span>
<span class="c1"># Run vunit function</span>
<span class="n">vu</span><span class="o">.</span><span class="n">main</span><span class="p">()</span>
</pre></div>
</div>
</div>
<p>Test benches are written using supporting libraries in <a class="reference internal" href="#vhdl-test-benches"><span class="std std-ref">VHDL</span></a> and <a class="reference internal" href="#sv-test-benches"><span class="std std-ref">SystemVerilog</span></a>
respectively. A test bench can in itself be a single unnamed test or
contain multiple named test cases.</p>
<p>There are many <a class="reference internal" href="examples.html#examples"><span class="std std-ref">example projects</span></a> demonstrating the
usage and capabilities of VUnit.</p>
<p>VUnit supports many simulators. Read about how they are detected and
how to choose which one to use <a class="reference internal" href="cli.html#simulator-selection"><span class="std std-ref">here</span></a>.</p>
</section>
<section id="vhdl-test-benches">
<span id="id2"></span><h2>VHDL Test Benches<a class="headerlink" href="#vhdl-test-benches" title="Link to this heading">¶</a></h2>
<div class="admonition hint">
<p class="admonition-title">Hint</p>
<p>Example code available at <a class="reference external" href="https://github.com/VUnit/vunit/tree/master/examples/vhdl/user_guide/">vhdl/user_guide</a>.</p>
</div>
<p>In its simplest form a VUnit VHDL test bench looks like this:</p>
<div class="literal-block-wrapper docutils container" id="id4">
<div class="code-block-caption"><span class="caption-text">Simplest VHDL test bench: <cite>tb_example.vhd</cite></span><a class="headerlink" href="#id4" title="Link to this code">¶</a></div>
<div class="highlight-vhdl notranslate"><div class="highlight"><pre><span></span><span class="k">library</span><span class="w"> </span><span class="nn">vunit_lib</span><span class="p">;</span>
<span class="n">context</span><span class="w"> </span><span class="n">vunit_lib</span><span class="p">.</span><span class="n">vunit_context</span><span class="p">;</span>
<span class="k">entity</span><span class="w"> </span><span class="nc">tb_example</span><span class="w"> </span><span class="k">is</span>
<span class="w"> </span><span class="k">generic</span><span class="w"> </span><span class="p">(</span><span class="n">runner_cfg</span><span class="w"> </span><span class="o">:</span><span class="w"> </span><span class="kt">string</span><span class="p">);</span>
<span class="k">end</span><span class="w"> </span><span class="k">entity</span><span class="p">;</span>
<span class="k">architecture</span><span class="w"> </span><span class="nc">tb</span><span class="w"> </span><span class="k">of</span><span class="w"> </span><span class="nc">tb_example</span><span class="w"> </span><span class="k">is</span>
<span class="k">begin</span>
<span class="w"> </span><span class="n">main</span><span class="w"> </span><span class="o">:</span><span class="w"> </span><span class="k">process</span>
<span class="w"> </span><span class="k">begin</span>
<span class="w"> </span><span class="n">test_runner_setup</span><span class="p">(</span><span class="n">runner</span><span class="p">,</span><span class="w"> </span><span class="n">runner_cfg</span><span class="p">);</span>
<span class="w"> </span><span class="n">report</span><span class="w"> </span><span class="s">"Hello world!"</span><span class="p">;</span>
<span class="w"> </span><span class="n">test_runner_cleanup</span><span class="p">(</span><span class="n">runner</span><span class="p">);</span><span class="w"> </span><span class="c1">-- Simulation ends here</span>
<span class="w"> </span><span class="k">end</span><span class="w"> </span><span class="k">process</span><span class="p">;</span>
<span class="k">end</span><span class="w"> </span><span class="k">architecture</span><span class="p">;</span>
</pre></div>
</div>
</div>
<p>From <code class="docutils literal notranslate"><span class="pre">tb_example.vhd</span></code> a single test case named
<code class="docutils literal notranslate"><span class="pre">lib.tb_example.all</span></code> is created.</p>
<p>This example also outlines what you have to do with existing testbenches to
make them VUnit compatible. Include the VUnit context, add the <code class="docutils literal notranslate"><span class="pre">runner_cfg</span></code>
generic, and wrap your existing code in your main controlling process with
the calls to <code class="docutils literal notranslate"><span class="pre">test_runner_setup</span></code> and <code class="docutils literal notranslate"><span class="pre">test_runner_cleanup</span></code>. Remember to
remove your testbench termination code, for example calls to <code class="docutils literal notranslate"><span class="pre">std.env.finish</span></code>,
end of simulation asserts, or similar. A VUnit testbench must be terminated
with the <code class="docutils literal notranslate"><span class="pre">test_runner_cleanup</span></code> call. The procedures described here are part
of the VUnit run library. More information on this library can be found in its
<a class="reference internal" href="run/user_guide.html#run-library"><span class="std std-ref">user guide</span></a>.</p>
<p>It is also possible to put multiple tests in a single test
bench that are each run in individual, independent, simulations.
Putting multiple tests in the same test bench is a good way to share a common
test environment.</p>
<div class="literal-block-wrapper docutils container" id="id5">
<div class="code-block-caption"><span class="caption-text">VHDL test bench with multiple tests: <cite>tb_example_many.vhd</cite></span><a class="headerlink" href="#id5" title="Link to this code">¶</a></div>
<div class="highlight-vhdl notranslate"><div class="highlight"><pre><span></span><span class="k">library</span><span class="w"> </span><span class="nn">vunit_lib</span><span class="p">;</span>
<span class="n">context</span><span class="w"> </span><span class="n">vunit_lib</span><span class="p">.</span><span class="n">vunit_context</span><span class="p">;</span>
<span class="k">entity</span><span class="w"> </span><span class="nc">tb_example_many</span><span class="w"> </span><span class="k">is</span>
<span class="w"> </span><span class="k">generic</span><span class="w"> </span><span class="p">(</span><span class="n">runner_cfg</span><span class="w"> </span><span class="o">:</span><span class="w"> </span><span class="kt">string</span><span class="p">);</span>
<span class="k">end</span><span class="w"> </span><span class="k">entity</span><span class="p">;</span>
<span class="k">architecture</span><span class="w"> </span><span class="nc">tb</span><span class="w"> </span><span class="k">of</span><span class="w"> </span><span class="nc">tb_example_many</span><span class="w"> </span><span class="k">is</span>
<span class="k">begin</span>
<span class="w"> </span><span class="n">main</span><span class="w"> </span><span class="o">:</span><span class="w"> </span><span class="k">process</span>
<span class="w"> </span><span class="k">begin</span>
<span class="w"> </span><span class="n">test_runner_setup</span><span class="p">(</span><span class="n">runner</span><span class="p">,</span><span class="w"> </span><span class="n">runner_cfg</span><span class="p">);</span>
<span class="w"> </span><span class="k">while</span><span class="w"> </span><span class="n">test_suite</span><span class="w"> </span><span class="k">loop</span>
<span class="w"> </span><span class="k">if</span><span class="w"> </span><span class="n">run</span><span class="p">(</span><span class="s">"test_pass"</span><span class="p">)</span><span class="w"> </span><span class="k">then</span>
<span class="w"> </span><span class="n">report</span><span class="w"> </span><span class="s">"This will pass"</span><span class="p">;</span>
<span class="w"> </span><span class="k">elsif</span><span class="w"> </span><span class="n">run</span><span class="p">(</span><span class="s">"test_fail"</span><span class="p">)</span><span class="w"> </span><span class="k">then</span>
<span class="w"> </span><span class="k">assert</span><span class="w"> </span><span class="n">false</span><span class="w"> </span><span class="n">report</span><span class="w"> </span><span class="s">"It fails"</span><span class="p">;</span>
<span class="w"> </span><span class="k">end</span><span class="w"> </span><span class="k">if</span><span class="p">;</span>
<span class="w"> </span><span class="k">end</span><span class="w"> </span><span class="k">loop</span><span class="p">;</span>
<span class="w"> </span><span class="n">test_runner_cleanup</span><span class="p">(</span><span class="n">runner</span><span class="p">);</span>
<span class="w"> </span><span class="k">end</span><span class="w"> </span><span class="k">process</span><span class="p">;</span>
<span class="k">end</span><span class="w"> </span><span class="k">architecture</span><span class="p">;</span>
</pre></div>
</div>
</div>
<p>From <code class="docutils literal notranslate"><span class="pre">tb_example_many.vhd</span></code>’s <code class="docutils literal notranslate"><span class="pre">run()</span></code> calls, two test cases are created:</p>
<ul class="simple">
<li><p><code class="docutils literal notranslate"><span class="pre">lib.tb_example_many.test_pass</span></code></p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">lib.tb_example_many.test_fail</span></code></p></li>
</ul>
</section>
<section id="systemverilog-test-benches">
<span id="sv-test-benches"></span><h2>SystemVerilog Test Benches<a class="headerlink" href="#systemverilog-test-benches" title="Link to this heading">¶</a></h2>
<div class="admonition hint">
<p class="admonition-title">Hint</p>
<p>Example code available at <a class="reference external" href="https://github.com/VUnit/vunit/tree/master/examples/verilog/user_guide/">verilog/user_guide</a>.</p>
</div>
<p>In its simplest form a VUnit SystemVerilog test bench looks like this:</p>
<div class="literal-block-wrapper docutils container" id="id6">
<div class="code-block-caption"><span class="caption-text">SystemVerilog test bench: <cite>tb_example.sv</cite></span><a class="headerlink" href="#id6" title="Link to this code">¶</a></div>
<div class="highlight-verilog notranslate"><div class="highlight"><pre><span></span><span class="c1">// You do not need to worry about adding vunit_defines.svh to your</span>
<span class="c1">// include path, VUnit will automatically do that for you if VUnit is</span>
<span class="c1">// correctly installed (and your python run-script is correct).</span>
<span class="no">`include</span><span class="w"> </span><span class="s">"vunit_defines.svh"</span>
<span class="k">module</span><span class="w"> </span><span class="n">tb_example</span><span class="p">;</span>
<span class="w"> </span><span class="no">`TEST_SUITE</span><span class="w"> </span><span class="k">begin</span>
<span class="w"> </span><span class="c1">// Note: Do not place any code here (unless you are debugging</span>
<span class="w"> </span><span class="c1">// VUnit internals).</span>
<span class="w"> </span><span class="no">`TEST_SUITE_SETUP</span><span class="w"> </span><span class="k">begin</span>
<span class="w"> </span><span class="c1">// Here you will typically place things that are common to</span>
<span class="w"> </span><span class="c1">// all tests, such as asserting the reset signal and starting</span>
<span class="w"> </span><span class="c1">// the clock(s).</span>
<span class="w"> </span><span class="nb">$display</span><span class="p">(</span><span class="s">"Running test suite setup code"</span><span class="p">);</span>
<span class="w"> </span><span class="k">end</span>
<span class="w"> </span><span class="no">`TEST_CASE_SETUP</span><span class="w"> </span><span class="k">begin</span>
<span class="w"> </span><span class="c1">// By default VUnit will run each test separately. However,</span>
<span class="w"> </span><span class="c1">// advanced users may want to run tests consecutively rather</span>
<span class="w"> </span><span class="c1">// than in separate instances of the HDL-simulator. In that</span>
<span class="w"> </span><span class="c1">// case the code placed in a TEST_CASE_SETUP block should</span>
<span class="w"> </span><span class="c1">// restore the unit under test to the state expected by the</span>
<span class="w"> </span><span class="c1">// test cases below. In many cases this block would only</span>
<span class="w"> </span><span class="c1">// assert/deassert the reset signal for a couple of</span>
<span class="w"> </span><span class="c1">// clock-cycles.</span>
<span class="w"> </span><span class="c1">//</span>
<span class="w"> </span><span class="c1">// When trying out VUnit for the first time this section</span>
<span class="w"> </span><span class="c1">// should probably be left empty.</span>
<span class="w"> </span><span class="nb">$display</span><span class="p">(</span><span class="s">"Running test case setup code"</span><span class="p">);</span>
<span class="w"> </span><span class="k">end</span>
<span class="w"> </span><span class="no">`TEST_CASE</span><span class="p">(</span><span class="s">"Test that a successful test case passes"</span><span class="p">)</span><span class="w"> </span><span class="k">begin</span>
<span class="w"> </span><span class="nb">$display</span><span class="p">(</span><span class="s">"This test case is expected to pass"</span><span class="p">);</span>
<span class="w"> </span><span class="no">`CHECK_EQUAL</span><span class="p">(</span><span class="mh">1</span><span class="p">,</span><span class="w"> </span><span class="mh">1</span><span class="p">);</span>
<span class="w"> </span><span class="k">end</span>
<span class="w"> </span><span class="no">`TEST_CASE</span><span class="p">(</span><span class="s">"Test that a failing test case actually fails"</span><span class="p">)</span><span class="w"> </span><span class="k">begin</span>
<span class="w"> </span><span class="nb">$display</span><span class="p">(</span><span class="s">"This test case is expected to fail"</span><span class="p">);</span>
<span class="w"> </span><span class="no">`CHECK_EQUAL</span><span class="p">(</span><span class="mh">0</span><span class="p">,</span><span class="w"> </span><span class="mh">1</span><span class="p">,</span><span class="w"> </span><span class="s">"You may also optionally add a diagnostic message to CHECK_EQUAL"</span><span class="p">);</span>
<span class="w"> </span><span class="c1">// Note: A test case will also be marked as failing if the</span>
<span class="w"> </span><span class="c1">// simulator stops for other reasons before the end of the</span>
<span class="w"> </span><span class="c1">// TEST_SUITE block is reached. This means that you don't</span>
<span class="w"> </span><span class="c1">// need to use CHECK_EQUAL if the testbench you want to</span>
<span class="w"> </span><span class="c1">// convert to VUnit already contains code that for example</span>
<span class="w"> </span><span class="c1">// calls $stop if an error-condition is detected.</span>
<span class="w"> </span><span class="k">end</span>
<span class="w"> </span><span class="no">`TEST_CASE</span><span class="p">(</span><span class="s">"Test that a test case that takes too long time fails with a timeout"</span><span class="p">)</span><span class="w"> </span><span class="k">begin</span>
<span class="w"> </span><span class="nb">$display</span><span class="p">(</span><span class="s">"This test is expected to timeout because of the watch dog below."</span><span class="p">);</span>
<span class="w"> </span><span class="p">#</span><span class="mh">2</span><span class="n">ns</span><span class="p">;</span><span class="w"> </span><span class="c1">//</span>
<span class="w"> </span><span class="k">end</span>
<span class="w"> </span><span class="no">`TEST_CASE_CLEANUP</span><span class="w"> </span><span class="k">begin</span>
<span class="w"> </span><span class="c1">// This section will run after the end of a test case. In</span>
<span class="w"> </span><span class="c1">// many cases this section will not be needed.</span>
<span class="w"> </span><span class="nb">$display</span><span class="p">(</span><span class="s">"Cleaning up after a test case"</span><span class="p">);</span>
<span class="w"> </span><span class="k">end</span>
<span class="w"> </span><span class="no">`TEST_SUITE_CLEANUP</span><span class="w"> </span><span class="k">begin</span>
<span class="w"> </span><span class="c1">// This section will run last before the TEST_SUITE block</span>
<span class="w"> </span><span class="c1">// exits. In many cases this section will not be needed.</span>
<span class="w"> </span><span class="nb">$display</span><span class="p">(</span><span class="s">"Cleaning up after running the complete test suite"</span><span class="p">);</span>
<span class="w"> </span><span class="k">end</span>
<span class="w"> </span><span class="k">end</span><span class="p">;</span>
<span class="w"> </span><span class="c1">// The watchdog macro is optional, but recommended. If present, it</span>
<span class="w"> </span><span class="c1">// must not be placed inside any initial or always-block.</span>
<span class="w"> </span><span class="no">`WATCHDOG</span><span class="p">(</span><span class="mh">1</span><span class="n">ns</span><span class="p">);</span>
<span class="k">endmodule</span>
</pre></div>
</div>
</div>
<p>From <code class="docutils literal notranslate"><span class="pre">tb_example.sv</span></code>’s <code class="docutils literal notranslate"><span class="pre">`TEST_CASE()</span></code> macros, three test cases are created:</p>
<ul class="simple">
<li><p><code class="docutils literal notranslate"><span class="pre">lib.tb_example.Test</span> <span class="pre">that</span> <span class="pre">pass</span></code></p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">lib.tb_example.Test</span> <span class="pre">that</span> <span class="pre">fail</span></code></p></li>
<li><p><code class="docutils literal notranslate"><span class="pre">lib.tb_example.Test</span> <span class="pre">that</span> <span class="pre">timeouts</span></code></p></li>
</ul>
<p>Each test is run in an individual simulation. Putting multiple tests
in the same test bench is a good way to share a common test
environment.</p>
</section>
<section id="scanning-for-test-benches">
<span id="test-bench-scanning"></span><h2>Scanning for Test Benches<a class="headerlink" href="#scanning-for-test-benches" title="Link to this heading">¶</a></h2>
<p>VUnit will recognize a module or entity as a test bench and run it if
it has a <code class="docutils literal notranslate"><span class="pre">runner_cfg</span></code> generic or parameter. A SystemVerilog test
bench using the <code class="docutils literal notranslate"><span class="pre">TEST_SUITE</span></code> macro will have a <code class="docutils literal notranslate"><span class="pre">runner_cfg</span></code>
parameter created by the macro and thus match the criteria.</p>
<div class="admonition warning">
<p class="admonition-title">Warning</p>
<p>A warning will be given if:</p>
<ul class="simple">
<li><p>The test bench entity or module name <strong>does not match</strong> the pattern
<code class="docutils literal notranslate"><span class="pre">tb_*</span></code> or <code class="docutils literal notranslate"><span class="pre">*_tb</span></code>.</p></li>
<li><p>The name <strong>does match</strong> the above pattern <strong>but lacks</strong> a <code class="docutils literal notranslate"><span class="pre">runner_cfg</span></code>
generic or parameter preventing it to be run by VUnit.</p></li>
</ul>
</div>
</section>
<section id="special-generics-parameters">
<span id="special-generics"></span><h2>Special generics/parameters<a class="headerlink" href="#special-generics-parameters" title="Link to this heading">¶</a></h2>
<ul class="simple">
<li><p>[<strong>required</strong>] <code class="docutils literal notranslate"><span class="pre">runner_cfg</span> <span class="pre">:</span> <span class="pre">string</span></code>, used by VUnit to pass private information
between Python and the HDL test runner.</p></li>
<li><p>[<strong>optional</strong>] <code class="docutils literal notranslate"><span class="pre">output_path</span> <span class="pre">:</span> <span class="pre">string</span></code>, path to the output directory of the
current test; this is useful to create additional output files that can
be checked after simulation by a <strong>post_check</strong> Python function.</p></li>
<li><p>[<strong>optional</strong>] <code class="docutils literal notranslate"><span class="pre">tb_path</span> <span class="pre">:</span> <span class="pre">string</span></code>, path to the directory containing the test
bench; this is useful to read input data with a known location relative to
the test bench location.</p></li>
</ul>
<div class="admonition hint">
<p class="admonition-title">Hint</p>
<p>Optional generics/parameters are filled in automatically by VUnit if detected
on the test bench.</p>
</div>
</section>
</section>
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