lab3 finished

Author: liukangxu

README.md

@@ -6,7 +6,7 @@ Porting MIPS operating system kernel to Raspberry Pi 3 on AArch64.
 ## TODO
 - [X] Boot
 - [X] Memory management
-- [ ] Process management and exception handling
+- [X] Process management and exception handling
 - [ ] System call
 - [ ] File system
 - [ ] Shell

os/Makefile

@@ -3,14 +3,16 @@ driver_dir	  := driver
 boot_dir	  := boot
 lib_dir		  := lib
 mm_dir		  := mm
+user_dir      := user
 
 link_script   := loader
 
-modules		  := boot driver lib mm
+modules		  := boot driver lib mm user
 objects		  := $(boot_dir)/*.o		\
 			   	 $(driver_dir)/*.o 		\
 				 $(lib_dir)/*.o 		\
-				 $(mm_dir)/*.o
+				 $(mm_dir)/*.o          \
+				 $(user_dir)/*.o
 
 
 .PHONY: all $(modules) clean

os/boot/asm.s

@@ -2,50 +2,50 @@
 
 .globl _start
 _start:
-    mrs x0, mpidr_el1       // check core id, we only use one core.
+    mrs x0, mpidr_el1       // check core id, only one core is used.
     mov x1, #0xc1000000
     bic x0, x0, x1
     cbz x0, master
     b hang
 
 master:
     ldr x0, =0x1000000
-    mov sp, x0               // set el3 sp
+    mov sp, x0               // set el2 sp
     bl el2_main
 
 hang:
     b hang
-
+
 .globl get_current_el
 get_current_el:
     mrs x0, currentel
     mov x1, #2
     lsr x0, x0, #2
     ret
-
+
 .globl el1_mmu_activate
 el1_mmu_activate:
     ldr x0, =0x04cc
     msr mair_el1, x0
     isb
 
-    ldr x1, =0x02000000
+    ldr x1, =0x01000000
     msr ttbr0_el1, x1
     isb
 
     mrs x2, tcr_el1
     ldr x3, =0x70040ffbf
     bic x2, x2, x3
 
-    ldr x3, =0x200803f18
+    ldr x3, =0x2bf183f18
     orr x2, x2, x3
     msr tcr_el1, x2
     isb
 
     mrs x3, sctlr_el1
     ldr x4, =0x80000
     bic x3, x3, x4
-
+
     ldr x4, =0x1005
     orr x3, x3, x4
     msr sctlr_el1, x3
@@ -54,45 +54,68 @@ el1_mmu_activate:
 
 .globl jump_to_el1
 jump_to_el1:
-	mrs	x0, currentel		// check if already in el1
-	cmp	x0, #4
-	beq	1f
+    mrs x0, currentel        // check if already in el1
+    cmp x0, #4
+    beq 1f
 
-	ldr	x0, =0xf00000
-	msr	sp_el1, x0	        // init the stack of el1
+    ldr x0, =0xf00000
+    msr sp_el1, x0            // init the stack of el1
 
     // disable coprocessor traps
-	mov	x0, #0x33ff
-	msr	cptr_el2, x0	    // disable coprocessor traps to el2
-	msr	hstr_el2, xzr		// disable coprocessor traps to el2
-	mov	x0, #3 << 20
-	msr	cpacr_el1, x0	    // enable fp/simd at el1
-
-	// initialize hcr_el2
-	mov	x0, #(1 << 31)
-	msr	hcr_el2, x0		    // set el1 to 64 bit
-	mov	x0, #0x0800
-	movk x0, #0x30d0, lsl #16
-	msr	sctlr_el1, x0
-
-	// return to the el1_sp1 mode from el2
-	mov	x0, #0x3c5
-	msr	spsr_el2, x0	    // el1_sp0 | d | a | i | f
-	adr	x0, 1f
-	msr	elr_el2, x0
-	eret
-
+    mov x0, #0x33ff
+    msr cptr_el2, x0        // disable coprocessor traps to el2
+    msr hstr_el2, xzr        // disable coprocessor traps to el2
+    mov x0, #3 << 20
+    msr cpacr_el1, x0        // enable fp/simd at el1
+
+    // initialize hcr_el2
+    mov x0, #(1 << 31)
+    msr hcr_el2, x0            // set el1 to 64 bit
+    mov x0, #0x0800
+    movk x0, #0x30d0, lsl #16
+    msr sctlr_el1, x0
+
+    // return to the el1_sp1 mode from el2
+    mov x0, #0x5
+    msr spsr_el2, x0        // el1_sp1 with DAIF = 0
+    adr x0, 1f
+    msr elr_el2, x0
+    eret
+
 1:
-	mrs	x0, sctlr_el1
-	orr	x0, x0, #(1 << 12)
-	msr	sctlr_el1, x0		// enable instruction cache
+    mrs x0, sctlr_el1
+    orr x0, x0, #(1 << 12)
+    msr sctlr_el1, x0        // enable instruction cache
+
+    ldr x0, =vectors
+    msr vbar_el1, x0        // init exception vector table
+
     b main
-
+
+.globl jump_to_el0
+jump_to_el0:
+    mov x1, x0
+    mrs x0, currentel        // check if in el2
+    cmp x0, #8
+    beq 2f
+
+    ldr x0, =0xe00000
+    msr sp_el0, x0            // init the stack of el0
+
+    // return to el0 from el1
+    mov x0, #0x0
+    msr spsr_el1, x0        // el0 with DAIF = 0
+    msr elr_el1, x1
+
+    eret
+
+2:
+     ret
+
 .globl tlb_invalidate
 tlb_invalidate:
     dsb ishst               // ensure write has completed
-    ldr x0, [x0]            // load va from x0
-    tlbi vmalle1            // invalidate tlb by va, all asid, el1.
+    tlbi vmalle1is            // invalidate tlb, all asid, el1.
     dsb ish                 // ensure completion of tlb invalidation
     isb                     // synchronize context and ensure that no instructions
                             // are fetched using the old translation
@@ -111,3 +134,23 @@ get32:
 .globl dummy
 dummy:
     ret
+
+.globl load_ttbr1_context
+load_ttbr1_context:
+    msr ttbr1_el1, x0
+    ret
+
+.globl load_ttbr0_context
+load_ttbr0_context:
+    msr ttbr0_el1, x0
+    ret
+
+.globl get_sctlr_el1
+get_sctlr_el1:
+    mrs x0, sctlr_el1
+    ret
+
+.globl get_esr
+get_esr:
+    mrs x0, esr_el1
+    ret

os/boot/el2.c

@@ -1,5 +1,6 @@
 #include "uart.h"
 #include "pmap.h"
+#include "env.h"
 #include "rpsio.h"
 #include "rpslib.h"
 
@@ -10,18 +11,23 @@ void el2_main(void)
 {
     // initialize uart
     uart_init();
-
-    printf("\n\nInitializing...\n");
+    _printf("\n\nInitializing...\n");
 
     // create page dir and page map
     vm_init();
-    printf("vm_init success.\n");
+    _printf("vm_init success.\n");
 
     // fill page map
     page_init();
+    _printf("page_init success.\n");
+
+    // init env structs
+    env_init();
+    _printf("env_init success.\n");
 
     // jump to el1
-    printf("Now in EL%lx. Jumping to EL1...\n", get_current_el());
+    _printf("\n");
+    _printf("Now in EL%lx. Jumping to EL1...\n", get_current_el());
     jump_to_el1();
 
     panic("failed to jump EL");

os/boot/main.c

@@ -1,32 +1,38 @@
 #include "rpsio.h"
 #include "rpslib.h"
 #include "gpio.h"
+#include "timer.h"
 #include "pmap.h"
+#include "env.h"
 
 extern u_long get_current_el();
 extern void el1_mmu_activate();
 
+extern u_char userA[];
+extern u_char userB[];
+
 void main(void)
 {
-    printf("We are now at EL%lx.\n", get_current_el());
-
-    // activate mmu for el1
-    // el1_mmu_activate();
-    // printf("MMU activated.\n");
+    // activate el1/0 mmu
+    el1_mmu_activate();
 
-    //printf("%s\n", "Page check start");
-    //page_check();
-    //printf("Page check passed!\n\n\n\n");
+    _printf("We are now at EL%lx.\n", get_current_el());
+    _printf("\n");
 
-    printf("Activating LED...\n");
     gpio_output_init(17);
+    gpio_output_init(27);
+
+    _printf("creating new env...\n");
+    env_create(userA, 66816);
+    env_create(userB, 66816);
+
+    _printf("activating system timer...\n");
+    set_system_timer_irq(1000000);
+
+    _printf("system initialization finished.\n");
+
     for ( ; ; )
     {
-        gpio_set(17);
-        sleep(1000);
-
-        gpio_clr(17);
-        sleep(1000);
     }
 
     panic("The end of main()\n");

os/driver/Makefile

@@ -1,12 +1,12 @@
 
-INCLUDES	  := -I../lib/include/ -I include/
+INCLUDES	  := -I../lib/include/ -I include/ -I../include/
 
 %.o: %.c
 	$(CC) $(CFLAGS) $(INCLUDES) -c $< 
 
 .PHONY: clean
 
-all: uart.o gpio.o
+all: uart.o gpio.o timer.o
 
 clean:
 	rm -rf *~ *.o

os/driver/gpio.c

@@ -1,28 +1,21 @@
 #include "rpslib.h"
 #include "rpsio.h"
 
-#define MIN_GPIO           2
-#define MAX_GPIO           27
+#define MIN_GPIO        2
+#define MAX_GPIO        27
 
-#define PHYSADDR_OFFSET    0x3F200000
+#define PHYSADDR_OFFSET 0x3F200000
 
-#define GPFSEL0            (PHYSADDR_OFFSET + 0x00000000)
-#define GPSET0             (PHYSADDR_OFFSET + 0x0000001C)
-#define GPCLR0             (PHYSADDR_OFFSET + 0x00000028)
+#define GPFSEL0         (PHYSADDR_OFFSET + 0x00000000)
+#define GPSET0          (PHYSADDR_OFFSET + 0x0000001C)
+#define GPCLR0          (PHYSADDR_OFFSET + 0x00000028)
 
 extern unsigned int get32(unsigned int);
 extern void put32(unsigned int, unsigned int);
 
 static int check_if_gpio_legal(int n)
 {
-    if ((n >= MIN_GPIO) && (n <= MAX_GPIO))
-    {
-        return 1;
-    }
-    else
-    {
-        return 0;
-    }
+    return n >= MIN_GPIO && n <= MAX_GPIO;
 }
 
 
@@ -40,7 +33,7 @@ void gpio_output_init(int n)
     ra &= ~(7 << ((n % 10) * 3));
     ra |= 1 << ((n % 10) * 3);
     put32(GPFSEL0 + 4 * (n / 10), ra);
-    sleep(0);
+    _sleep(0);
 }
 
 
@@ -52,7 +45,7 @@ void gpio_set(int n)
     }
 
     put32(GPSET0 + 4 * (n / 32), 1 << (n % 32));
-    sleep(0);
+    _sleep(0);
 }
 
 
@@ -64,5 +57,5 @@ void gpio_clr(int n)
     }
 
     put32(GPCLR0 + 4 * (n / 32), 1 << (n % 32));
-    sleep(0);
+    _sleep(0);
 }

os/driver/uart.c

@@ -43,9 +43,9 @@ void uart_init(void)
     ra |= 2 << 15;      //alt5
     put32(GPFSEL1, ra);
     put32(GPPUD, 0);
-    sleep(0);
+    _sleep(0);
     put32(GPPUDCLK0, (1 << 14) | (1 << 15));
-    sleep(0);
+    _sleep(0);
     put32(GPPUDCLK0, 0);
     put32(AUX_MU_CNTL_REG, 3);
 }