@@ -55,7 +55,7 @@ void pinMode( uint32_t ulPin, uint32_t ulMode )
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| ((uint32_t )GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos )
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| ((uint32_t )GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos );
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break ;
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-
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+
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case INPUT_PULLUP_SENSE :
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// Set pin to input mode with pull-up resistor enabled and sense when Low
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port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos )
@@ -75,23 +75,104 @@ void pinMode( uint32_t ulPin, uint32_t ulMode )
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break ;
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case INPUT_PULLDOWN_SENSE :
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- // Set pin to input mode with pull-down resistor enabled
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+ // Set pin to input mode with pull-down resistor enabled and sense when High
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port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos )
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| ((uint32_t )GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos )
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| ((uint32_t )GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos )
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| ((uint32_t )GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos )
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| ((uint32_t )GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos );
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break ;
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- case OUTPUT :
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- // Set pin to output mode
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+ case INPUT_SENSE_HIGH :
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+ // Set pin to input mode and sense when High
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+ port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos );
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+ break ;
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+
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+ case INPUT_SENSE_LOW :
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+ // Set pin to input mode and sense when Low
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+ port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos );
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+ break ;
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+
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+ case OUTPUT_S0S1 :
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+ // Set pin to output mode, sink to standard and source to standard
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port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos )
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| ((uint32_t )GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos )
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| ((uint32_t )GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos )
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| ((uint32_t )GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos )
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| ((uint32_t )GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos );
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break ;
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+ case OUTPUT_H0S1 :
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+ // Set pin to output mode, sink to high drive and source to standard
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+ port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_DRIVE_H0S1 << GPIO_PIN_CNF_DRIVE_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos );
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+ break ;
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+
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+ case OUTPUT_S0H1 :
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+ // Set pin to output mode, sink to standard and source to high drive
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+ port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_DRIVE_S0H1 << GPIO_PIN_CNF_DRIVE_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos );
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+ break ;
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+
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+ case OUTPUT_H0H1 :
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+ // Set pin to output mode, sink to high drive and source to high drive
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+ port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos );
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+ break ;
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+
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+ case OUTPUT_D0S1 :
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+ // Set pin to output mode, sink to disconnect and source to standard
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+ port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_DRIVE_D0S1 << GPIO_PIN_CNF_DRIVE_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos );
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+ break ;
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+
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+ case OUTPUT_D0H1 :
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+ // Set pin to output mode, sink to disconnect and source to high drive
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+ port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_DRIVE_D0H1 << GPIO_PIN_CNF_DRIVE_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos );
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+ break ;
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+
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+ case OUTPUT_S0D1 :
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+ // Set pin to output mode, sink to standard and source to disconnect
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+ port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos );
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+ break ;
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+
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+ case OUTPUT_H0D1 :
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+ // Set pin to output mode, sink to high drive and source to disconnect
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+ port -> PIN_CNF [ulPin ] = ((uint32_t )GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_DRIVE_H0D1 << GPIO_PIN_CNF_DRIVE_Pos )
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+ | ((uint32_t )GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos );
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+ break ;
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+
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default :
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// do nothing
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break ;
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