Comment out the propagated IR/PC wires

These should be handled by set_dont_touch in SDC but that is what we are testing here. The theory is that all of the signals should show the **exact** same results.

Author: addisonElliott

CPU.v

@@ -1,8 +1,8 @@
 // module CPU(output [31:0] data_out, output[15:0] address, output we, input[31:0] data_in, input reset, clock);
-module CPU(output reg [15:0] PC, output reg [31:0] IR, AC, output [31:0] data_out, output[15:0] address, output we, input[31:0] data_in, input reset, clock);
+module CPU(/*output reg [15:0] PC, output reg [31:0] IR, */output reg [31:0] AC, output [31:0] data_out, output[15:0] address, output we, input[31:0] data_in, input reset, clock);
     // Define 16-bit program counter (PC), 32-bit instruction register (IR) and 32-bit ACcumulator (AC)
-    // reg [15:0] PC;
-    // reg [31:0] IR;
+    reg [15:0] PC;
+    reg [31:0] IR;
     // reg [31:0] AC;
 
     // 1'b0 = Fetching next instruction

ROM.v

@@ -54,9 +54,8 @@ module ROM(output reg [31:0] data_out, input [4:0] address, input chip_select);
             5'h12: data_out <= 32'h4000_00f0;   // LI 00f0
             5'h13: data_out <= 32'h9000_005f;   // AND 005f
             // Result (AC) should be 00000
-
 
-            5'h14: data_out <= 32'h5000_0016;   // LD 0017
+            5'h14: data_out <= 32'h5000_0017;   // LD 0017
             5'h15: data_out <= 32'h5000_005f;   // LD 005f
             5'h16: data_out <= 32'h8000_0000;   // BR 0
 

SCIC.v

@@ -1,5 +1,5 @@
 // module SCIC(output [3:0] LEDs, input [3:0] switches, input reset, clock);
-module SCIC(output [15:0] PC, output [31:0] IR, AC, output [3:0] LEDs, input [3:0] switches, input reset, clock);
+module SCIC(/*output [15:0] PC, output [31:0] IR, */output [31:0] AC, output [3:0] LEDs, input [3:0] switches, input reset, clock);
     wire [15:0]	address;
     wire [31:0]	data_toCPU;
     wire [31:0]	data_fromCPU;
@@ -8,5 +8,5 @@ module SCIC(output [15:0] PC, output [31:0] IR, AC, output [3:0] LEDs, input [3:
     // Note: reset is active HIGH
     memory_controller memory_controller_inst(data_toCPU, LEDs, data_fromCPU, address, switches, we, clock);
     // CPU cpu_inst(data_fromCPU, address, we, data_toCPU, reset, clock);
-    CPU cpu_inst(PC, IR, AC, data_fromCPU, address, we, data_toCPU, reset, clock);
+    CPU cpu_inst(/*PC, IR, */AC, data_fromCPU, address, we, data_toCPU, reset, clock);
 endmodule

SCIC_tb.v

@@ -2,15 +2,16 @@
 
 module SCIC_tb();
     wire [3:0] LEDs;
-    wire [15:0] PC;
-    wire [31:0] IR, AC;
+    // wire [15:0] PC;
+    // wire [31:0] IR, AC;
+    wire [31:0] AC;
 
     reg reset, clock;
     reg [3:0] switches;
 
     // UUT = Unit Under Test
     // SCIC UUT(LEDs, switches, reset, clock);
-    SCIC UUT(PC, IR, AC, LEDs, switches, reset, clock);
+    SCIC UUT(/*PC, IR, */AC, LEDs, switches, reset, clock);
 
     initial begin
         reset <= 1'b1;