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cmod_a7 support: Transition to amaranth_boards.
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‎amaranth_boards/cmod_a7.py

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import os
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import subprocess
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from amaranth.build import *
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from amaranth.vendor.xilinx_7series import *
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from .resources import *
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"""
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Example Usage:
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platform = CModA7_35Platform(toolchain="Symbiflow")
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platform.build(Top(), do_program=True)
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Supported programmer:
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openocd
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"""
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__all__ = ["CmodA7_15Platform", "CmodA7_35Platform"]
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class _CmodA7Platform(Xilinx7SeriesPlatform):
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package = "cpg236"
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speed = "1"
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default_clk = "clk12"
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resources = [
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Resource("clk12", 0, Pins("L17", dir="i"),
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Clock(12e6), Attrs(IOSTANDARD="LVCMOS33")),
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*LEDResources(pins="A17 C16", attrs=Attrs(IOSTANDARD="LVCMOS33")),
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RGBLEDResource(0, r="C17", g="B16", b="B17", invert=True,
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attrs=Attrs(IOSTANDARD="LVCMOS33")),
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*ButtonResources(pins="A18 B18", attrs=Attrs(IOSTANDARD="LVCMOS33")),
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UARTResource(0,
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rx="J18", tx="J17",
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attrs=Attrs(IOSTANDARD="LVCMOS33")
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),
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*SPIFlashResources(0,
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cs_n="K19", clk="E19", copi="D19", cipo="D18", wp_n="G18",
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hold_n="F18",
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attrs=Attrs(IOSTANDARD="LVCMOS33")
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),
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SRAMResource(0,
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cs_n="N19", oe_n="P19", we_n="R19",
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a="M18 M19 K17 N17 P17 P18 R18 W19 U19 V19 W18 T17 T18 U17 U18 V16 W16 W17 V15",
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d="W15 W13 W14 U15 U16 V13 V14 U14"),
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# One-wire interface to crypto authentication device
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# May not be populated on the board
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Resource("atsha204a", 0, Pins("D17", dir="io"),
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Attrs(IOSTANDARD="LVCMOS33"))
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]
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connectors = [
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Connector("pmod", 0, "G17 G19 N18 L18 - - H17 H19 J19 K18 - -"), # JA
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# Pin 24/25 are VCC and GND
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# Pin 15/16 are analog (XADC)
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Connector("gpio", 0,
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"""
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M3 L3 A16 K3 C15 H1 A15 B15 A14 J3 J1 K2
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L1 L2 - - M1 M3 P3 M2 N1 N2 P1 -
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- R3 T3 R2 T1 T2 U1 W2 V2 W3 V3 W5
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V4 U4 V5 W4 U5 U2 W6 U3 U7 W7 U8 V8
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"""),
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Connector("xadc", 0, {
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"vaux4_n": "G2",
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"vaux4_p": "G3",
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"vaux12_n": "J2",
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"vaux12_p": "H2"
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})
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]
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def toolchain_program(self, products, name):
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openocd = os.environ.get("OPENOCD", "openocd")
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with products.extract("{}.bit".format(name)) as bitstream_filename:
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subprocess.check_call([openocd,
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# Use for debug output
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#"-d",
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"-c",
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"source [find board/digilent_cmod_a7.cfg]; init; pld load 0 {}; exit"
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.format(bitstream_filename)
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])
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class CmodA7_15Platform(_CmodA7Platform):
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device = "xc7a15t"
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class CmodA7_35Platform(_CmodA7Platform):
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device = "xc7a35t"
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if __name__ == "__main__":
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from .test.blinky import *
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CmodA7_35Platform().build(Blinky(), do_program=True)

‎nmigen_boards/cmod_a7.py

Lines changed: 5 additions & 95 deletions
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import os
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import subprocess
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from amaranth_boards.cmod_a7 import *
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from amaranth_boards.cmod_a7 import __all__
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from nmigen.build import *
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from nmigen.vendor.xilinx_7series import *
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from .resources import *
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"""
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Example Usage:
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platform = CModA7_35Platform(toolchain="Symbiflow")
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platform.build(Top(), do_program=True)
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Supported programmer:
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openocd
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"""
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__all__ = ["CmodA7_15Platform", "CmodA7_35Platform"]
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class _CmodA7Platform(Xilinx7SeriesPlatform):
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package = "cpg236"
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speed = "1"
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default_clk = "clk12"
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resources = [
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Resource("clk12", 0, Pins("L17", dir="i"),
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Clock(12e6), Attrs(IOSTANDARD="LVCMOS33")),
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*LEDResources(pins="A17 C16", attrs=Attrs(IOSTANDARD="LVCMOS33")),
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RGBLEDResource(0, r="C17", g="B16", b="B17", invert=True,
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attrs=Attrs(IOSTANDARD="LVCMOS33")),
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*ButtonResources(pins="A18 B18", attrs=Attrs(IOSTANDARD="LVCMOS33")),
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UARTResource(0,
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rx="J18", tx="J17",
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attrs=Attrs(IOSTANDARD="LVCMOS33")
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),
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*SPIFlashResources(0,
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cs_n="K19", clk="E19", copi="D19", cipo="D18", wp_n="G18",
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hold_n="F18",
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attrs=Attrs(IOSTANDARD="LVCMOS33")
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),
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SRAMResource(0,
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cs_n="N19", oe_n="P19", we_n="R19",
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a="M18 M19 K17 N17 P17 P18 R18 W19 U19 V19 W18 T17 T18 U17 U18 V16 W16 W17 V15",
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d="W15 W13 W14 U15 U16 V13 V14 U14"),
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# One-wire interface to crypto authentication device
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# May not be populated on the board
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Resource("atsha204a", 0, Pins("D17", dir="io"),
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Attrs(IOSTANDARD="LVCMOS33"))
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]
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connectors = [
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Connector("pmod", 0, "G17 G19 N18 L18 - - H17 H19 J19 K18 - -"), # JA
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# Pin 24/25 are VCC and GND
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# Pin 15/16 are analog (XADC)
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Connector("gpio", 0,
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"""
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M3 L3 A16 K3 C15 H1 A15 B15 A14 J3 J1 K2
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L1 L2 - - M1 M3 P3 M2 N1 N2 P1 -
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- R3 T3 R2 T1 T2 U1 W2 V2 W3 V3 W5
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V4 U4 V5 W4 U5 U2 W6 U3 U7 W7 U8 V8
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"""),
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Connector("xadc", 0, {
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"vaux4_n": "G2",
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"vaux4_p": "G3",
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"vaux12_n": "J2",
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"vaux12_p": "H2"
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})
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]
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def toolchain_program(self, products, name):
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openocd = os.environ.get("OPENOCD", "openocd")
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with products.extract("{}.bit".format(name)) as bitstream_filename:
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subprocess.check_call([openocd,
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# Use for debug output
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#"-d",
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"-c",
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"source [find board/digilent_cmod_a7.cfg]; init; pld load 0 {}; exit"
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.format(bitstream_filename)
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])
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class CmodA7_15Platform(_CmodA7Platform):
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device = "xc7a15t"
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class CmodA7_35Platform(_CmodA7Platform):
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device = "xc7a35t"
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if __name__ == "__main__":
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from .test.blinky import *
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CmodA7_35Platform().build(Blinky(), do_program=True)
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import warnings
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warnings.warn("instead of nmigen_boards.cmod_a7, use amaranth_boards.cmod_a7",
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DeprecationWarning, stacklevel=2)

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