From 58710ccf8f21e592b2605a390ca9130b0e016a48 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Sun, 23 Jan 2022 03:25:46 +0100 Subject: [PATCH 01/17] Also allow strings as keys when using dicts to describe pins. Does not allow mixing of ints and strings. The string key is then used instead of default_name in _SplitResource. --- amaranth_boards/resources/user.py | 23 +++++++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/amaranth_boards/resources/user.py b/amaranth_boards/resources/user.py index 046f122c..d8cb3ea3 100644 --- a/amaranth_boards/resources/user.py +++ b/amaranth_boards/resources/user.py @@ -7,6 +7,18 @@ def _SplitResources(*args, pins, invert=False, conn=None, attrs=None, default_name, dir): assert isinstance(pins, (str, list, dict)) + if isinstance(pins, dict): # this must be tested first + keys = pins.keys() + keys_are_ints = None + if all(isinstance(k, int) for k in keys): + keys_are_ints = 1 + elif all(isinstance(k, str) for k in keys): + keys_are_ints = 0 + else: + raise TypeError("A dict of pins must not mix key types!") + if keys_are_ints == 0: + pins = dict(enumerate(pins.items())) + if isinstance(pins, str): pins = pins.split() if isinstance(pins, list): @@ -14,10 +26,17 @@ def _SplitResources(*args, pins, invert=False, conn=None, attrs=None, default_na resources = [] for number, pin in pins.items(): - ios = [Pins(pin, dir=dir, invert=invert, conn=conn)] + if isinstance(pin, tuple): + pin_name = pin[0] + res_name = pin[1] + else: + pin_name = pin + res_name = default_name + + ios = [Pins(pin_name, dir=dir, invert=invert, conn=conn)] if attrs is not None: ios.append(attrs) - resources.append(Resource.family(*args, number, default_name=default_name, ios=ios)) + resources.append(Resource.family(*args, number, default_name=res_name, ios=ios)) return resources From 30602381f29a862c73c729c349fa27fe89f7e4c7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Fri, 8 Oct 2021 16:48:04 +0200 Subject: [PATCH 02/17] Add support for cmod_a7 board. --- nmigen_boards/cmod_a7.py | 133 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 133 insertions(+) create mode 100644 nmigen_boards/cmod_a7.py diff --git a/nmigen_boards/cmod_a7.py b/nmigen_boards/cmod_a7.py new file mode 100644 index 00000000..3938f083 --- /dev/null +++ b/nmigen_boards/cmod_a7.py @@ -0,0 +1,133 @@ +import os +import subprocess + +from nmigen.build import * +from nmigen.vendor.xilinx_7series import * +from .resources import * + +""" +Example Usage: + platform = CModA7_35Platform(toolchain="Symbiflow") + platform.build(Top(), do_program=True) + +Supported programmer: + openocd +""" + +__all__ = ["CmodA7_15Platform", "CmodA7_35Platform"] + + +class _CmodA7Platform(Xilinx7SeriesPlatform): + package = "cpg236" + speed = "1" + default_clk = "clk12" + default_rst = "rst" + resources = [ + Resource("clk12", 0, Pins("L17", dir="i"), + Clock(12e6), Attrs(IOSTANDARD="LVCMOS33")), + + # This is actually Button 0 "BTN0", there is no dedicated reset button + Resource("rst", 0, Pins("A18", dir="i"), Attrs(IOSTANDARD="LVCMOS33")), + + *LEDResources(pins="A17 C16", attrs=Attrs(IOSTANDARD="LVCMOS33")), + + RGBLEDResource(0, r="C17", g="B16", b="B17", + attrs=Attrs(IOSTANDARD="LVCMOS33")), + + *ButtonResources(pins="B18", attrs=Attrs(IOSTANDARD="LVCMOS33")), + + UARTResource(0, + rx="J18", tx="J17", + attrs=Attrs(IOSTANDARD="LVCMOS33") + ), + + *SPIFlashResources(0, + cs_n="K19", clk="E19", copi="D19", cipo="D18", wp_n="G18", + hold_n="F18", + attrs=Attrs(IOSTANDARD="LVCMOS33") + ), + + ] + connectors = [ + Connector("pmod", 0, "G17 G19 N18 L18 - - H17 H19 J19 K18 - -"), # JA + + Connector("gpio", 0, { + "io1": "M3", + "io2": "L3", + "io3": "A16", + "io4": "K3", + "io5": "C15", + "io6": "H1", + "io7": "A15", + "io8": "B15", + "io9": "A14", + "io10": "J3", + "io11": "J1", + "io12": "K2", + "io13": "L1", + "io14": "L2", + # IO 15/16 are analog + "io17": "M1", + "io18": "M3", + "io19": "P3", + "io20": "M2", + "io21": "N1", + "io22": "N2", + "io23": "P1", + # IO 24/25 are VCC and GND + "io26": "R3", + "io27": "T3", + "io28": "R2", + "io29": "T1", + "io30": "T2", + "io31": "U1", + "io32": "W2", + "io33": "V2", + "io34": "W3", + "io35": "V3", + "io36": "W5", + "io37": "V4", + "io38": "U4", + "io39": "V5", + "io40": "W4", + "io41": "U5", + "io42": "U2", + "io43": "W6", + "io44": "U3", + "io45": "U7", + "io46": "W7", + "io47": "U8", + "io48": "V8" + }), + Connector("xadc", 0, { + "vaux4_n": "G2", + "vaux4_p": "G3", + "vaux12_n": "J2", + "vaux12_p": "H2" + }) + ] + + def toolchain_prepare(self, fragment, name, **kwargs): + overrides = {} + return super().toolchain_prepare(fragment, name, **overrides, **kwargs) + + def toolchain_program(self, products, name): + openocd = os.environ.get("OPENOCD", "openocd") + with products.extract("{}.bit".format(name)) as bitstream_filename: + subprocess.check_call([openocd, + "-d", + "-c", + "source [find board/digilent_cmod_a7.cfg]; init; pld load 0 {}; exit" + .format(bitstream_filename) + ]) + + +class CmodA7_15Platform(_CmodA7Platform): + device = "xc7a15t" + +class CmodA7_35Platform(_CmodA7Platform): + device = "xc7a35t" + +if __name__ == "__main__": + from .test.blinky import * + CmodA7_35Platform().build(Blinky(), do_program=True) From b182b33f691dc99d7aaf34794e687b225c63feea Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Sat, 9 Oct 2021 01:01:21 +0200 Subject: [PATCH 03/17] remove reset, invert rgb, add sram, remove toolchain_prepare overload, disable openocd debug output. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Bastian Löher --- nmigen_boards/cmod_a7.py | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) diff --git a/nmigen_boards/cmod_a7.py b/nmigen_boards/cmod_a7.py index 3938f083..60d97fb5 100644 --- a/nmigen_boards/cmod_a7.py +++ b/nmigen_boards/cmod_a7.py @@ -21,20 +21,17 @@ class _CmodA7Platform(Xilinx7SeriesPlatform): package = "cpg236" speed = "1" default_clk = "clk12" - default_rst = "rst" + default_rst = None resources = [ Resource("clk12", 0, Pins("L17", dir="i"), Clock(12e6), Attrs(IOSTANDARD="LVCMOS33")), - # This is actually Button 0 "BTN0", there is no dedicated reset button - Resource("rst", 0, Pins("A18", dir="i"), Attrs(IOSTANDARD="LVCMOS33")), - *LEDResources(pins="A17 C16", attrs=Attrs(IOSTANDARD="LVCMOS33")), - RGBLEDResource(0, r="C17", g="B16", b="B17", + RGBLEDResource(0, r="C17", g="B16", b="B17", invert=True, attrs=Attrs(IOSTANDARD="LVCMOS33")), - *ButtonResources(pins="B18", attrs=Attrs(IOSTANDARD="LVCMOS33")), + *ButtonResources(pins="A18 B18", attrs=Attrs(IOSTANDARD="LVCMOS33")), UARTResource(0, rx="J18", tx="J17", @@ -47,6 +44,10 @@ class _CmodA7Platform(Xilinx7SeriesPlatform): attrs=Attrs(IOSTANDARD="LVCMOS33") ), + SRAMResource(0, + cs_n="N19", oe_n="P19", we_n="R19", + a="M18 M19 K17 N17 P17 P18 R18 W19 U19 V19 W18 T17 T18 U17 U18 V16 W16 W17 V15", + d="W15 W13 W14 U15 U16 V13 V14 U14") ] connectors = [ Connector("pmod", 0, "G17 G19 N18 L18 - - H17 H19 J19 K18 - -"), # JA @@ -107,15 +108,12 @@ class _CmodA7Platform(Xilinx7SeriesPlatform): }) ] - def toolchain_prepare(self, fragment, name, **kwargs): - overrides = {} - return super().toolchain_prepare(fragment, name, **overrides, **kwargs) - def toolchain_program(self, products, name): openocd = os.environ.get("OPENOCD", "openocd") with products.extract("{}.bit".format(name)) as bitstream_filename: subprocess.check_call([openocd, - "-d", + # Use for debug output + #"-d", "-c", "source [find board/digilent_cmod_a7.cfg]; init; pld load 0 {}; exit" .format(bitstream_filename) From bac536b78cc155c64e85737ea909648be73db3a9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Sat, 9 Oct 2021 01:11:22 +0200 Subject: [PATCH 04/17] Add crypto onewire. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Bastian Löher --- nmigen_boards/cmod_a7.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/nmigen_boards/cmod_a7.py b/nmigen_boards/cmod_a7.py index 60d97fb5..7aab4483 100644 --- a/nmigen_boards/cmod_a7.py +++ b/nmigen_boards/cmod_a7.py @@ -47,7 +47,10 @@ class _CmodA7Platform(Xilinx7SeriesPlatform): SRAMResource(0, cs_n="N19", oe_n="P19", we_n="R19", a="M18 M19 K17 N17 P17 P18 R18 W19 U19 V19 W18 T17 T18 U17 U18 V16 W16 W17 V15", - d="W15 W13 W14 U15 U16 V13 V14 U14") + d="W15 W13 W14 U15 U16 V13 V14 U14"), + + Resource("crypto_onewire", 0, Pins("D17", dir="io"), + Attrs(IOSTANDARD="LVCMOS33")) ] connectors = [ Connector("pmod", 0, "G17 G19 N18 L18 - - H17 H19 J19 K18 - -"), # JA From 14e3b560858d5898097ed9c02c7ea430db43d716 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Thu, 14 Oct 2021 16:25:11 +0200 Subject: [PATCH 05/17] Update nmigen_boards/cmod_a7.py Co-authored-by: Robin Heinemann --- nmigen_boards/cmod_a7.py | 1 - 1 file changed, 1 deletion(-) diff --git a/nmigen_boards/cmod_a7.py b/nmigen_boards/cmod_a7.py index 7aab4483..ef56cd2b 100644 --- a/nmigen_boards/cmod_a7.py +++ b/nmigen_boards/cmod_a7.py @@ -21,7 +21,6 @@ class _CmodA7Platform(Xilinx7SeriesPlatform): package = "cpg236" speed = "1" default_clk = "clk12" - default_rst = None resources = [ Resource("clk12", 0, Pins("L17", dir="i"), Clock(12e6), Attrs(IOSTANDARD="LVCMOS33")), From d09f569b2ee37daf4c715654b155cdbadc1c1e1a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Thu, 14 Oct 2021 16:36:23 +0200 Subject: [PATCH 06/17] Rename resource for crypto element. --- nmigen_boards/cmod_a7.py | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/nmigen_boards/cmod_a7.py b/nmigen_boards/cmod_a7.py index ef56cd2b..861c4ece 100644 --- a/nmigen_boards/cmod_a7.py +++ b/nmigen_boards/cmod_a7.py @@ -48,7 +48,9 @@ class _CmodA7Platform(Xilinx7SeriesPlatform): a="M18 M19 K17 N17 P17 P18 R18 W19 U19 V19 W18 T17 T18 U17 U18 V16 W16 W17 V15", d="W15 W13 W14 U15 U16 V13 V14 U14"), - Resource("crypto_onewire", 0, Pins("D17", dir="io"), + # One-wire interface to crypto authentication device + # May not be populated on the board + Resource("atsha204a", 0, Pins("D17", dir="io"), Attrs(IOSTANDARD="LVCMOS33")) ] connectors = [ From 4123da064c1283d16fa9a72125212f7fb119fe62 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Thu, 14 Oct 2021 16:36:38 +0200 Subject: [PATCH 07/17] Remove 'io' prefix. --- nmigen_boards/cmod_a7.py | 90 ++++++++++++++++++++-------------------- 1 file changed, 45 insertions(+), 45 deletions(-) diff --git a/nmigen_boards/cmod_a7.py b/nmigen_boards/cmod_a7.py index 861c4ece..2fd66a4a 100644 --- a/nmigen_boards/cmod_a7.py +++ b/nmigen_boards/cmod_a7.py @@ -57,52 +57,52 @@ class _CmodA7Platform(Xilinx7SeriesPlatform): Connector("pmod", 0, "G17 G19 N18 L18 - - H17 H19 J19 K18 - -"), # JA Connector("gpio", 0, { - "io1": "M3", - "io2": "L3", - "io3": "A16", - "io4": "K3", - "io5": "C15", - "io6": "H1", - "io7": "A15", - "io8": "B15", - "io9": "A14", - "io10": "J3", - "io11": "J1", - "io12": "K2", - "io13": "L1", - "io14": "L2", - # IO 15/16 are analog - "io17": "M1", - "io18": "M3", - "io19": "P3", - "io20": "M2", - "io21": "N1", - "io22": "N2", - "io23": "P1", + "1": "M3", + "2": "L3", + "3": "A16", + "4": "K3", + "5": "C15", + "6": "H1", + "7": "A15", + "8": "B15", + "9": "A14", + "10": "J3", + "11": "J1", + "12": "K2", + "13": "L1", + "14": "L2", + # IO 15/16 are analog (XADC) + "17": "M1", + "18": "M3", + "19": "P3", + "20": "M2", + "21": "N1", + "22": "N2", + "23": "P1", # IO 24/25 are VCC and GND - "io26": "R3", - "io27": "T3", - "io28": "R2", - "io29": "T1", - "io30": "T2", - "io31": "U1", - "io32": "W2", - "io33": "V2", - "io34": "W3", - "io35": "V3", - "io36": "W5", - "io37": "V4", - "io38": "U4", - "io39": "V5", - "io40": "W4", - "io41": "U5", - "io42": "U2", - "io43": "W6", - "io44": "U3", - "io45": "U7", - "io46": "W7", - "io47": "U8", - "io48": "V8" + "26": "R3", + "27": "T3", + "28": "R2", + "29": "T1", + "30": "T2", + "31": "U1", + "32": "W2", + "33": "V2", + "34": "W3", + "35": "V3", + "36": "W5", + "37": "V4", + "38": "U4", + "39": "V5", + "40": "W4", + "41": "U5", + "42": "U2", + "43": "W6", + "44": "U3", + "45": "U7", + "46": "W7", + "47": "U8", + "48": "V8" }), Connector("xadc", 0, { "vaux4_n": "G2", From 82aeba34b40dbab727331d28e1e963e10c8e7ee2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Thu, 14 Oct 2021 17:18:32 +0200 Subject: [PATCH 08/17] Use string shorthand for gpio instead of dict. --- nmigen_boards/cmod_a7.py | 56 ++++++---------------------------------- 1 file changed, 8 insertions(+), 48 deletions(-) diff --git a/nmigen_boards/cmod_a7.py b/nmigen_boards/cmod_a7.py index 2fd66a4a..987c9984 100644 --- a/nmigen_boards/cmod_a7.py +++ b/nmigen_boards/cmod_a7.py @@ -56,54 +56,14 @@ class _CmodA7Platform(Xilinx7SeriesPlatform): connectors = [ Connector("pmod", 0, "G17 G19 N18 L18 - - H17 H19 J19 K18 - -"), # JA - Connector("gpio", 0, { - "1": "M3", - "2": "L3", - "3": "A16", - "4": "K3", - "5": "C15", - "6": "H1", - "7": "A15", - "8": "B15", - "9": "A14", - "10": "J3", - "11": "J1", - "12": "K2", - "13": "L1", - "14": "L2", - # IO 15/16 are analog (XADC) - "17": "M1", - "18": "M3", - "19": "P3", - "20": "M2", - "21": "N1", - "22": "N2", - "23": "P1", - # IO 24/25 are VCC and GND - "26": "R3", - "27": "T3", - "28": "R2", - "29": "T1", - "30": "T2", - "31": "U1", - "32": "W2", - "33": "V2", - "34": "W3", - "35": "V3", - "36": "W5", - "37": "V4", - "38": "U4", - "39": "V5", - "40": "W4", - "41": "U5", - "42": "U2", - "43": "W6", - "44": "U3", - "45": "U7", - "46": "W7", - "47": "U8", - "48": "V8" - }), + # Pin 24/25 are VCC and GND + # Pin 15/16 are analog (XADC) + Connector("gpio", 0, + " M3 L3 A16 K3 C15 H1 A15 B15 A14 J3 J1 K2 + L1 L2 - - M1 M3 P3 M2 N1 N2 P1 - + - R3 T3 R2 T1 T2 U1 W2 V2 W3 V3 W5 + V4 U4 V5 W4 U5 U2 W6 U3 U7 W7 U8 V8"), + Connector("xadc", 0, { "vaux4_n": "G2", "vaux4_p": "G3", From 3efec9773e6f41253bc7fd6a95a5261fe56a0e10 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Thu, 14 Oct 2021 23:23:42 +0200 Subject: [PATCH 09/17] Fix multi-line string literal. --- nmigen_boards/cmod_a7.py | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/nmigen_boards/cmod_a7.py b/nmigen_boards/cmod_a7.py index 987c9984..23885beb 100644 --- a/nmigen_boards/cmod_a7.py +++ b/nmigen_boards/cmod_a7.py @@ -59,10 +59,12 @@ class _CmodA7Platform(Xilinx7SeriesPlatform): # Pin 24/25 are VCC and GND # Pin 15/16 are analog (XADC) Connector("gpio", 0, - " M3 L3 A16 K3 C15 H1 A15 B15 A14 J3 J1 K2 - L1 L2 - - M1 M3 P3 M2 N1 N2 P1 - - - R3 T3 R2 T1 T2 U1 W2 V2 W3 V3 W5 - V4 U4 V5 W4 U5 U2 W6 U3 U7 W7 U8 V8"), + """ + M3 L3 A16 K3 C15 H1 A15 B15 A14 J3 J1 K2 + L1 L2 - - M1 M3 P3 M2 N1 N2 P1 - + - R3 T3 R2 T1 T2 U1 W2 V2 W3 V3 W5 + V4 U4 V5 W4 U5 U2 W6 U3 U7 W7 U8 V8 + """), Connector("xadc", 0, { "vaux4_n": "G2", From 519f9fa0ed23eca7507e8c738bb97056ebdfce78 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Sun, 19 Dec 2021 22:24:41 +0100 Subject: [PATCH 10/17] cmod_a7 support: Transition to amaranth_boards. --- amaranth_boards/cmod_a7.py | 97 +++++++++++++++++++++++++++++++++++ nmigen_boards/cmod_a7.py | 100 ++----------------------------------- 2 files changed, 102 insertions(+), 95 deletions(-) create mode 100644 amaranth_boards/cmod_a7.py diff --git a/amaranth_boards/cmod_a7.py b/amaranth_boards/cmod_a7.py new file mode 100644 index 00000000..fecf55a9 --- /dev/null +++ b/amaranth_boards/cmod_a7.py @@ -0,0 +1,97 @@ +import os +import subprocess + +from amaranth.build import * +from amaranth.vendor.xilinx_7series import * +from .resources import * + +""" +Example Usage: + platform = CModA7_35Platform(toolchain="Symbiflow") + platform.build(Top(), do_program=True) + +Supported programmer: + openocd +""" + +__all__ = ["CmodA7_15Platform", "CmodA7_35Platform"] + + +class _CmodA7Platform(Xilinx7SeriesPlatform): + package = "cpg236" + speed = "1" + default_clk = "clk12" + resources = [ + Resource("clk12", 0, Pins("L17", dir="i"), + Clock(12e6), Attrs(IOSTANDARD="LVCMOS33")), + + *LEDResources(pins="A17 C16", attrs=Attrs(IOSTANDARD="LVCMOS33")), + + RGBLEDResource(0, r="C17", g="B16", b="B17", invert=True, + attrs=Attrs(IOSTANDARD="LVCMOS33")), + + *ButtonResources(pins="A18 B18", attrs=Attrs(IOSTANDARD="LVCMOS33")), + + UARTResource(0, + rx="J18", tx="J17", + attrs=Attrs(IOSTANDARD="LVCMOS33") + ), + + *SPIFlashResources(0, + cs_n="K19", clk="E19", copi="D19", cipo="D18", wp_n="G18", + hold_n="F18", + attrs=Attrs(IOSTANDARD="LVCMOS33") + ), + + SRAMResource(0, + cs_n="N19", oe_n="P19", we_n="R19", + a="M18 M19 K17 N17 P17 P18 R18 W19 U19 V19 W18 T17 T18 U17 U18 V16 W16 W17 V15", + d="W15 W13 W14 U15 U16 V13 V14 U14"), + + # One-wire interface to crypto authentication device + # May not be populated on the board + Resource("atsha204a", 0, Pins("D17", dir="io"), + Attrs(IOSTANDARD="LVCMOS33")) + ] + connectors = [ + Connector("pmod", 0, "G17 G19 N18 L18 - - H17 H19 J19 K18 - -"), # JA + + # Pin 24/25 are VCC and GND + # Pin 15/16 are analog (XADC) + Connector("gpio", 0, + """ + M3 L3 A16 K3 C15 H1 A15 B15 A14 J3 J1 K2 + L1 L2 - - M1 M3 P3 M2 N1 N2 P1 - + - R3 T3 R2 T1 T2 U1 W2 V2 W3 V3 W5 + V4 U4 V5 W4 U5 U2 W6 U3 U7 W7 U8 V8 + """), + + Connector("xadc", 0, { + "vaux4_n": "G2", + "vaux4_p": "G3", + "vaux12_n": "J2", + "vaux12_p": "H2" + }) + ] + + def toolchain_program(self, products, name): + openocd = os.environ.get("OPENOCD", "openocd") + with products.extract("{}.bit".format(name)) as bitstream_filename: + subprocess.check_call([openocd, + # Use for debug output + #"-d", + "-c", + "source [find board/digilent_cmod_a7.cfg]; init; pld load 0 {}; exit" + .format(bitstream_filename) + ]) + + +class CmodA7_15Platform(_CmodA7Platform): + device = "xc7a15t" + +class CmodA7_35Platform(_CmodA7Platform): + device = "xc7a35t" + +if __name__ == "__main__": + from .test.blinky import * + CmodA7_35Platform().build(Blinky(), do_program=True) diff --git a/nmigen_boards/cmod_a7.py b/nmigen_boards/cmod_a7.py index 23885beb..0e2a3e84 100644 --- a/nmigen_boards/cmod_a7.py +++ b/nmigen_boards/cmod_a7.py @@ -1,97 +1,7 @@ -import os -import subprocess +from amaranth_boards.cmod_a7 import * +from amaranth_boards.cmod_a7 import __all__ -from nmigen.build import * -from nmigen.vendor.xilinx_7series import * -from .resources import * -""" -Example Usage: - platform = CModA7_35Platform(toolchain="Symbiflow") - platform.build(Top(), do_program=True) - -Supported programmer: - openocd -""" - -__all__ = ["CmodA7_15Platform", "CmodA7_35Platform"] - - -class _CmodA7Platform(Xilinx7SeriesPlatform): - package = "cpg236" - speed = "1" - default_clk = "clk12" - resources = [ - Resource("clk12", 0, Pins("L17", dir="i"), - Clock(12e6), Attrs(IOSTANDARD="LVCMOS33")), - - *LEDResources(pins="A17 C16", attrs=Attrs(IOSTANDARD="LVCMOS33")), - - RGBLEDResource(0, r="C17", g="B16", b="B17", invert=True, - attrs=Attrs(IOSTANDARD="LVCMOS33")), - - *ButtonResources(pins="A18 B18", attrs=Attrs(IOSTANDARD="LVCMOS33")), - - UARTResource(0, - rx="J18", tx="J17", - attrs=Attrs(IOSTANDARD="LVCMOS33") - ), - - *SPIFlashResources(0, - cs_n="K19", clk="E19", copi="D19", cipo="D18", wp_n="G18", - hold_n="F18", - attrs=Attrs(IOSTANDARD="LVCMOS33") - ), - - SRAMResource(0, - cs_n="N19", oe_n="P19", we_n="R19", - a="M18 M19 K17 N17 P17 P18 R18 W19 U19 V19 W18 T17 T18 U17 U18 V16 W16 W17 V15", - d="W15 W13 W14 U15 U16 V13 V14 U14"), - - # One-wire interface to crypto authentication device - # May not be populated on the board - Resource("atsha204a", 0, Pins("D17", dir="io"), - Attrs(IOSTANDARD="LVCMOS33")) - ] - connectors = [ - Connector("pmod", 0, "G17 G19 N18 L18 - - H17 H19 J19 K18 - -"), # JA - - # Pin 24/25 are VCC and GND - # Pin 15/16 are analog (XADC) - Connector("gpio", 0, - """ - M3 L3 A16 K3 C15 H1 A15 B15 A14 J3 J1 K2 - L1 L2 - - M1 M3 P3 M2 N1 N2 P1 - - - R3 T3 R2 T1 T2 U1 W2 V2 W3 V3 W5 - V4 U4 V5 W4 U5 U2 W6 U3 U7 W7 U8 V8 - """), - - Connector("xadc", 0, { - "vaux4_n": "G2", - "vaux4_p": "G3", - "vaux12_n": "J2", - "vaux12_p": "H2" - }) - ] - - def toolchain_program(self, products, name): - openocd = os.environ.get("OPENOCD", "openocd") - with products.extract("{}.bit".format(name)) as bitstream_filename: - subprocess.check_call([openocd, - # Use for debug output - #"-d", - "-c", - "source [find board/digilent_cmod_a7.cfg]; init; pld load 0 {}; exit" - .format(bitstream_filename) - ]) - - -class CmodA7_15Platform(_CmodA7Platform): - device = "xc7a15t" - -class CmodA7_35Platform(_CmodA7Platform): - device = "xc7a35t" - -if __name__ == "__main__": - from .test.blinky import * - CmodA7_35Platform().build(Blinky(), do_program=True) +import warnings +warnings.warn("instead of nmigen_boards.cmod_a7, use amaranth_boards.cmod_a7", + DeprecationWarning, stacklevel=2) From 781b3ef5d4687450f168e29464c65567d2223648 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Sun, 19 Dec 2021 22:29:05 +0100 Subject: [PATCH 11/17] Get rid of deprecation warning. --- amaranth_boards/cmod_a7.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/amaranth_boards/cmod_a7.py b/amaranth_boards/cmod_a7.py index fecf55a9..5ad78f23 100644 --- a/amaranth_boards/cmod_a7.py +++ b/amaranth_boards/cmod_a7.py @@ -2,7 +2,7 @@ import subprocess from amaranth.build import * -from amaranth.vendor.xilinx_7series import * +from amaranth.vendor.xilinx import * from .resources import * """ From 9567af65474e83d1f6f4b7dd886068f70bf6b907 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Sun, 23 Jan 2022 02:54:58 +0100 Subject: [PATCH 12/17] cmod_a7: Fix up use of XilinxPlatform. --- amaranth_boards/cmod_a7.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/amaranth_boards/cmod_a7.py b/amaranth_boards/cmod_a7.py index 5ad78f23..32bca26e 100644 --- a/amaranth_boards/cmod_a7.py +++ b/amaranth_boards/cmod_a7.py @@ -17,7 +17,7 @@ __all__ = ["CmodA7_15Platform", "CmodA7_35Platform"] -class _CmodA7Platform(Xilinx7SeriesPlatform): +class _CmodA7Platform(XilinxPlatform): package = "cpg236" speed = "1" default_clk = "clk12" From 55804215144bd1f8ac92a29ae833c2f4f80cb722 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Thu, 28 Jul 2022 02:45:26 +0200 Subject: [PATCH 13/17] Add support for CMOD S7 board. --- amaranth_boards/cmod_s7.py | 89 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 89 insertions(+) create mode 100644 amaranth_boards/cmod_s7.py diff --git a/amaranth_boards/cmod_s7.py b/amaranth_boards/cmod_s7.py new file mode 100644 index 00000000..e6bbd011 --- /dev/null +++ b/amaranth_boards/cmod_s7.py @@ -0,0 +1,89 @@ +import os +import subprocess + +from amaranth.build import * +from amaranth.vendor.xilinx import * +from .resources import * + +""" +Example Usage: + platform = CModS7_Platform(toolchain="Symbiflow") + platform.build(Top(), do_program=True) + +Supported programmer: + openocd +""" + +__all__ = ["CmodS7_Platform"] + + +class CmodS7_Platform(XilinxPlatform): + device = "xc7s25" + package = "csga225" + speed = "1" + default_clk = "clk12" + resources = [ + Resource("clk12", 0, Pins("M9", dir="i"), + Clock(12e6), Attrs(IOSTANDARD="LVCMOS33")), + + *LEDResources(pins="E2 K1 J1 E1", attrs=Attrs(IOSTANDARD="LVCMOS33")), + + RGBLEDResource(0, r="F2", g="D3", b="F1", invert=True, + attrs=Attrs(IOSTANDARD="LVCMOS33")), + + *ButtonResources(pins="D2 D1", attrs=Attrs(IOSTANDARD="LVCMOS33")), + + UARTResource(0, + rx="L12", tx="K15", + attrs=Attrs(IOSTANDARD="LVCMOS33") + ), + + # Clock only via STARTUPE2 primitive + *SPIFlashResources(0, + cs_n="L11", clk="F5", copi="H14", cipo="H15", wp_n="J12", + hold_n="K13", + attrs=Attrs(IOSTANDARD="LVCMOS33") + ), + + # One-wire interface to crypto authentication device + # May not be populated on the board + Resource("atsha204a", 0, Pins("D17", dir="io"), + Attrs(IOSTANDARD="LVCMOS33")) + ] + connectors = [ + Connector("pmod", 0, "J2 H2 H4 F3 - - H3 H1 G1 F4 - -"), # JA + + # Pin 24/25 are VCC and GND + # Pin 32/33 are analog (XADC) + # Pin 9-15 and 34-39 do not exist + Connector("gpio", 0, + """ + L1 M4 M3 N2 M2 P3 N3 P1 N1 - - - + - - - P14 P15 N13 N15 N14 M15 M14 L15 - + - L14 K14 J15 L13 M13 J11 - - - - - + - - - C5 A2 B2 B1 C1 B3 B4 A3 A4 + """), + + Connector("xadc", 0, { + "vaux5_n": "A13", + "vaux5_p": "A14", + "vaux12_n": "A11", + "vaux12_p": "A12" + }) + ] + + def toolchain_program(self, products, name): + openocd = os.environ.get("OPENOCD", "openocd") + with products.extract("{}.bit".format(name)) as bitstream_filename: + subprocess.check_call([openocd, + # Use for debug output + #"-d", + "-c", + "source [find board/digilent_cmod_s7.cfg]; init; pld load 0 {}; exit" + .format(bitstream_filename) + ]) + + +if __name__ == "__main__": + from .test.blinky import * + CmodS7_Platform().build(Blinky(), do_program=True) From 9bae6103d0f37db257ae10880f0a26b8ef9174ed Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Thu, 6 Oct 2022 10:31:00 +0200 Subject: [PATCH 14/17] cmod_s7: Replace openocd with openfpgaloader. --- amaranth_boards/cmod_s7.py | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/amaranth_boards/cmod_s7.py b/amaranth_boards/cmod_s7.py index e6bbd011..8090ef67 100644 --- a/amaranth_boards/cmod_s7.py +++ b/amaranth_boards/cmod_s7.py @@ -73,14 +73,11 @@ class CmodS7_Platform(XilinxPlatform): ] def toolchain_program(self, products, name): - openocd = os.environ.get("OPENOCD", "openocd") with products.extract("{}.bit".format(name)) as bitstream_filename: - subprocess.check_call([openocd, - # Use for debug output - #"-d", - "-c", - "source [find board/digilent_cmod_s7.cfg]; init; pld load 0 {}; exit" - .format(bitstream_filename) + subprocess.check_call(["openFPGALoader", + "-c", "digilent", + "--fpga-part", "xc7s25", + "{}".format(bitstream_filename) ]) From 0458bcec787b4b837c7bbfd76f790d93696bffe7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Thu, 13 Oct 2022 09:34:36 +0200 Subject: [PATCH 15/17] Switch to openFPGALoader for cmod a7. --- amaranth_boards/cmod_a7.py | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/amaranth_boards/cmod_a7.py b/amaranth_boards/cmod_a7.py index 32bca26e..f6105d4e 100644 --- a/amaranth_boards/cmod_a7.py +++ b/amaranth_boards/cmod_a7.py @@ -75,14 +75,11 @@ class _CmodA7Platform(XilinxPlatform): ] def toolchain_program(self, products, name): - openocd = os.environ.get("OPENOCD", "openocd") with products.extract("{}.bit".format(name)) as bitstream_filename: - subprocess.check_call([openocd, - # Use for debug output - #"-d", - "-c", - "source [find board/digilent_cmod_a7.cfg]; init; pld load 0 {}; exit" - .format(bitstream_filename) + subprocess.check_call(["openFPGALoader", + "-c", "digilent", + "--fpga-part", "xc7a35", + "{}".format(bitstream_filename) ]) From a7334ed73852dcccb17fefa516d03bbfe3bc2101 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Fri, 24 Feb 2023 13:50:42 +0100 Subject: [PATCH 16/17] Revert "Also allow strings as keys when using dicts to describe pins. Does not allow mixing of ints and strings. The string key is then used instead of default_name in _SplitResource." This reverts commit 58710ccf8f21e592b2605a390ca9130b0e016a48. The reason is that this proposal was not accepted. --- amaranth_boards/resources/user.py | 23 ++--------------------- 1 file changed, 2 insertions(+), 21 deletions(-) diff --git a/amaranth_boards/resources/user.py b/amaranth_boards/resources/user.py index d8cb3ea3..046f122c 100644 --- a/amaranth_boards/resources/user.py +++ b/amaranth_boards/resources/user.py @@ -7,18 +7,6 @@ def _SplitResources(*args, pins, invert=False, conn=None, attrs=None, default_name, dir): assert isinstance(pins, (str, list, dict)) - if isinstance(pins, dict): # this must be tested first - keys = pins.keys() - keys_are_ints = None - if all(isinstance(k, int) for k in keys): - keys_are_ints = 1 - elif all(isinstance(k, str) for k in keys): - keys_are_ints = 0 - else: - raise TypeError("A dict of pins must not mix key types!") - if keys_are_ints == 0: - pins = dict(enumerate(pins.items())) - if isinstance(pins, str): pins = pins.split() if isinstance(pins, list): @@ -26,17 +14,10 @@ def _SplitResources(*args, pins, invert=False, conn=None, attrs=None, default_na resources = [] for number, pin in pins.items(): - if isinstance(pin, tuple): - pin_name = pin[0] - res_name = pin[1] - else: - pin_name = pin - res_name = default_name - - ios = [Pins(pin_name, dir=dir, invert=invert, conn=conn)] + ios = [Pins(pin, dir=dir, invert=invert, conn=conn)] if attrs is not None: ios.append(attrs) - resources.append(Resource.family(*args, number, default_name=res_name, ios=ios)) + resources.append(Resource.family(*args, number, default_name=default_name, ios=ios)) return resources From 24d0cce0d917cf8caf829fe6331500ac9f40627e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bastian=20L=C3=B6her?= Date: Fri, 24 Feb 2023 13:55:58 +0100 Subject: [PATCH 17/17] Remove nmigen compatibility. --- nmigen_boards/cmod_a7.py | 7 ------- 1 file changed, 7 deletions(-) delete mode 100644 nmigen_boards/cmod_a7.py diff --git a/nmigen_boards/cmod_a7.py b/nmigen_boards/cmod_a7.py deleted file mode 100644 index 0e2a3e84..00000000 --- a/nmigen_boards/cmod_a7.py +++ /dev/null @@ -1,7 +0,0 @@ -from amaranth_boards.cmod_a7 import * -from amaranth_boards.cmod_a7 import __all__ - - -import warnings -warnings.warn("instead of nmigen_boards.cmod_a7, use amaranth_boards.cmod_a7", - DeprecationWarning, stacklevel=2)