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dac_fmc_ebz: Replace dacfifo with data_offload
Signed-off-by: Ionut Podgoreanu <[email protected]>
1 parent bc8b62e commit 0df0409

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10 files changed

+57
-53
lines changed

10 files changed

+57
-53
lines changed

‎projects/dac_fmc_ebz/common/dac_fmc_ebz_bd.tcl‎

Lines changed: 20 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -4,6 +4,7 @@
44
###############################################################################
55

66
source $ad_hdl_dir/library/jesd204/scripts/jesd204.tcl
7+
source $ad_hdl_dir/projects/common/xilinx/data_offload_bd.tcl
78

89
set JESD_M $ad_project_params(JESD_M)
910
set JESD_L $ad_project_params(JESD_L)
@@ -16,11 +17,9 @@ set SAMPLE_WIDTH $ad_project_params(JESD_NP)
1617

1718
set DAC_DATA_WIDTH [expr $NUM_OF_LANES * 32]
1819
set SAMPLES_PER_CHANNEL [expr $DAC_DATA_WIDTH / $NUM_OF_CONVERTERS / $SAMPLE_WIDTH]
19-
2020
set MAX_NUM_OF_LANES 8
21-
# Top level ports
2221

23-
create_bd_port -dir I dac_fifo_bypass
22+
set dac_offload_name dac_data_offload
2423

2524
# dac peripherals
2625

@@ -55,10 +54,15 @@ ad_ip_instance axi_dmac dac_dma [list \
5554
CACHE_COHERENT $CACHE_COHERENCY \
5655
]
5756

58-
ad_dacfifo_create axi_dac_fifo \
59-
$DAC_DATA_WIDTH \
60-
$dac_dma_data_width \
61-
$dac_fifo_address_width
57+
ad_data_offload_create $dac_offload_name \
58+
1 \
59+
$dac_offload_type \
60+
$dac_offload_size \
61+
$dac_dma_data_width \
62+
$DAC_DATA_WIDTH
63+
64+
ad_ip_parameter $dac_offload_name/i_data_offload CONFIG.SYNC_EXT_ADD_INTERNAL_CDC 0
65+
ad_connect $dac_offload_name/sync_ext GND
6266

6367
# shared transceiver core
6468

@@ -106,28 +110,25 @@ for {set i 0} {$i < $NUM_OF_CONVERTERS} {incr i} {
106110
ad_connect dac_jesd204_transport/dac_enable_$i dac_upack/enable_$i
107111
}
108112

109-
ad_connect util_dac_jesd204_xcvr/tx_out_clk_0 axi_dac_fifo/dac_clk
110-
ad_connect dac_jesd204_link_rstgen/peripheral_reset axi_dac_fifo/dac_rst
113+
ad_connect util_dac_jesd204_xcvr/tx_out_clk_0 $dac_offload_name/m_axis_aclk
114+
ad_connect dac_jesd204_link_rstgen/peripheral_aresetn $dac_offload_name/m_axis_aresetn
111115
ad_connect dac_upack/s_axis_valid VCC
112-
ad_connect dac_upack/s_axis_ready axi_dac_fifo/dac_valid
113-
ad_connect dac_upack/s_axis_data axi_dac_fifo/dac_data
114-
ad_connect dac_jesd204_transport/dac_dunf axi_dac_fifo/dac_dunf
115-
ad_connect sys_cpu_clk axi_dac_fifo/dma_clk
116-
ad_connect sys_cpu_reset axi_dac_fifo/dma_rst
116+
ad_connect dac_upack/s_axis $dac_offload_name/m_axis
117+
ad_connect dac_jesd204_transport/dac_dunf dac_upack/fifo_rd_underflow
118+
ad_connect sys_cpu_clk $dac_offload_name/s_axis_aclk
119+
ad_connect sys_cpu_resetn $dac_offload_name/s_axis_aresetn
117120
ad_connect sys_cpu_clk dac_dma/m_axis_aclk
118121
ad_connect sys_cpu_resetn dac_dma/m_src_axi_aresetn
119-
ad_connect axi_dac_fifo/dma_xfer_req dac_dma/m_axis_xfer_req
120-
ad_connect axi_dac_fifo/dma_ready dac_dma/m_axis_ready
121-
ad_connect axi_dac_fifo/dma_data dac_dma/m_axis_data
122-
ad_connect axi_dac_fifo/dma_valid dac_dma/m_axis_valid
123-
ad_connect axi_dac_fifo/dma_xfer_last dac_dma/m_axis_last
122+
ad_connect $dac_offload_name/init_req dac_dma/m_axis_xfer_req
123+
ad_connect $dac_offload_name/s_axis dac_dma/m_axis
124124

125125
# interconnect (cpu)
126126

127127
ad_cpu_interconnect 0x44A60000 dac_jesd204_xcvr
128128
ad_cpu_interconnect 0x44A04000 dac_jesd204_transport
129129
ad_cpu_interconnect 0x44A90000 dac_jesd204_link
130130
ad_cpu_interconnect 0x7c420000 dac_dma
131+
ad_cpu_interconnect 0x7c430000 $dac_offload_name
131132

132133
# interconnect (mem/dac)
133134

@@ -143,6 +144,3 @@ if {$CACHE_COHERENCY} {
143144

144145
ad_cpu_interrupt ps-10 mb-15 dac_jesd204_link/irq
145146
ad_cpu_interrupt ps-12 mb-13 dac_dma/irq
146-
147-
ad_connect axi_dac_fifo/bypass dac_fifo_bypass
148-

‎projects/dac_fmc_ebz/vcu118/Makefile‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
####################################################################################
2-
## Copyright (c) 2018 - 2023 Analog Devices, Inc.
2+
## Copyright (c) 2018 - 2025 Analog Devices, Inc.
33
### SPDX short identifier: BSD-1-Clause
44
## Auto-generated, do not modify!
55
####################################################################################
@@ -9,19 +9,22 @@ PROJECT_NAME := dac_fmc_ebz_vcu118
99
M_DEPS += ../common/dac_fmc_ebz_bd.tcl
1010
M_DEPS += ../common/config.tcl
1111
M_DEPS += ../../scripts/adi_pd.tcl
12-
M_DEPS += ../../common/xilinx/dacfifo_bd.tcl
1312
M_DEPS += ../../common/vcu118/vcu118_system_constr.xdc
1413
M_DEPS += ../../common/vcu118/vcu118_system_bd.tcl
14+
M_DEPS += ../../common/xilinx/data_offload_bd.tcl
15+
M_DEPS += ../../../library/util_hbm/scripts/adi_util_hbm.tcl
1516
M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
1617
M_DEPS += ../../../library/common/ad_iobuf.v
1718

1819
LIB_DEPS += axi_dmac
1920
LIB_DEPS += axi_sysid
21+
LIB_DEPS += data_offload
2022
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
2123
LIB_DEPS += jesd204/axi_jesd204_tx
2224
LIB_DEPS += jesd204/jesd204_tx
2325
LIB_DEPS += sysid_rom
24-
LIB_DEPS += util_dacfifo
26+
LIB_DEPS += util_do_ram
27+
LIB_DEPS += util_hbm
2528
LIB_DEPS += util_pack/util_upack2
2629
LIB_DEPS += xilinx/axi_adxcvr
2730
LIB_DEPS += xilinx/util_adxcvr

‎projects/dac_fmc_ebz/vcu118/system_bd.tcl‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,13 @@
11
###############################################################################
2-
## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved.
2+
## Copyright (C) 2022-2025 Analog Devices, Inc. All rights reserved.
33
### SPDX short identifier: ADIBSD
44
###############################################################################
55

6-
set dac_fifo_address_width 14
6+
## Offload attributes
7+
set dac_offload_type 0 ; ## BRAM
8+
set dac_offload_size [expr 512*1024] ; ## 512 kB
79

810
source $ad_hdl_dir/projects/common/vcu118/vcu118_system_bd.tcl
9-
source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl
1011
source ../common/dac_fmc_ebz_bd.tcl
1112
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
1213

@@ -25,7 +26,8 @@ LINKS=$ad_project_params(NUM_LINKS)\
2526
DEVICE_CODE=$ad_project_params(DEVICE_CODE)\
2627
DAC_DEVICE=$ADI_DAC_DEVICE\
2728
DAC_MODE=$ADI_DAC_MODE\
28-
DAC_FIFO_ADDR_WIDTH=$dac_fifo_address_width"
29+
DAC_OFFLOAD:TYPE=$dac_offload_type\
30+
SIZE=$dac_offload_size"
2931

3032
sysid_gen_sys_init_file $sys_cstring
3133

‎projects/dac_fmc_ebz/vcu118/system_top.v‎

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -173,8 +173,6 @@ module system_top #(
173173
* 3 H14 FMC_TXEN_1 NC
174174
*/
175175

176-
assign dac_fifo_bypass = gpio_o[40];
177-
178176
/* Board GPIOS. Buttons, LEDs, etc... */
179177
ad_iobuf #(
180178
.DATA_WIDTH(17)
@@ -251,7 +249,6 @@ module system_top #(
251249
.tx_sync_0 (tx_sync),
252250
.tx_sysref_0 (tx_sysref),
253251
.uart_sin (uart_sin),
254-
.uart_sout (uart_sout),
255-
.dac_fifo_bypass (dac_fifo_bypass));
252+
.uart_sout (uart_sout));
256253

257254
endmodule

‎projects/dac_fmc_ebz/zc706/Makefile‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
####################################################################################
2-
## Copyright (c) 2018 - 2023 Analog Devices, Inc.
2+
## Copyright (c) 2018 - 2025 Analog Devices, Inc.
33
### SPDX short identifier: BSD-1-Clause
44
## Auto-generated, do not modify!
55
####################################################################################
@@ -11,7 +11,8 @@ M_DEPS += ../common/config.tcl
1111
M_DEPS += ../../scripts/adi_pd.tcl
1212
M_DEPS += ../../common/zc706/zc706_system_constr.xdc
1313
M_DEPS += ../../common/zc706/zc706_system_bd.tcl
14-
M_DEPS += ../../common/xilinx/dacfifo_bd.tcl
14+
M_DEPS += ../../common/xilinx/data_offload_bd.tcl
15+
M_DEPS += ../../../library/util_hbm/scripts/adi_util_hbm.tcl
1516
M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
1617
M_DEPS += ../../../library/common/ad_iobuf.v
1718

@@ -20,11 +21,13 @@ LIB_DEPS += axi_dmac
2021
LIB_DEPS += axi_hdmi_tx
2122
LIB_DEPS += axi_spdif_tx
2223
LIB_DEPS += axi_sysid
24+
LIB_DEPS += data_offload
2325
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
2426
LIB_DEPS += jesd204/axi_jesd204_tx
2527
LIB_DEPS += jesd204/jesd204_tx
2628
LIB_DEPS += sysid_rom
27-
LIB_DEPS += util_dacfifo
29+
LIB_DEPS += util_do_ram
30+
LIB_DEPS += util_hbm
2831
LIB_DEPS += util_pack/util_upack2
2932
LIB_DEPS += xilinx/axi_adxcvr
3033
LIB_DEPS += xilinx/util_adxcvr

‎projects/dac_fmc_ebz/zc706/system_bd.tcl‎

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,12 +1,13 @@
11
###############################################################################
2-
## Copyright (C) 2019-2023 Analog Devices, Inc. All rights reserved.
2+
## Copyright (C) 2019-2025 Analog Devices, Inc. All rights reserved.
33
### SPDX short identifier: ADIBSD
44
###############################################################################
55

6-
set dac_fifo_address_width 14
6+
## Offload attributes
7+
set dac_offload_type 0 ; ## BRAM
8+
set dac_offload_size [expr 256*1024] ; ## 256 kB
79

810
source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl
9-
source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl
1011
source ../common/dac_fmc_ebz_bd.tcl
1112
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
1213

@@ -25,7 +26,8 @@ LINKS=$ad_project_params(NUM_LINKS)\
2526
DEVICE_CODE=$ad_project_params(DEVICE_CODE)\
2627
DAC_DEVICE=$ADI_DAC_DEVICE\
2728
DAC_MODE=$ADI_DAC_MODE\
28-
DAC_FIFO_ADDR_WIDTH=$dac_fifo_address_width"
29+
DAC_OFFLOAD:TYPE=$dac_offload_type\
30+
SIZE=$dac_offload_size"
2931

3032
sysid_gen_sys_init_file $sys_cstring
3133

‎projects/dac_fmc_ebz/zc706/system_top.v‎

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -173,8 +173,6 @@ module system_top #(
173173
* 4 D15 NC NC
174174
*/
175175

176-
assign dac_fifo_bypass = gpio_o[40];
177-
178176
/* PMOD GPIOs 48-51 */
179177
ad_iobuf #(
180178
.DATA_WIDTH(4)
@@ -273,7 +271,6 @@ module system_top #(
273271
.tx_ref_clk_0 (tx_ref_clk),
274272
.tx_ref_clk_4 (tx_ref_clk),
275273
.tx_sync_0 (tx_sync[NUM_LINKS-1:0]),
276-
.tx_sysref_0 (tx_sysref),
277-
.dac_fifo_bypass (dac_fifo_bypass));
274+
.tx_sysref_0 (tx_sysref));
278275

279276
endmodule

‎projects/dac_fmc_ebz/zcu102/Makefile‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,5 @@
11
####################################################################################
2-
## Copyright (c) 2018 - 2023 Analog Devices, Inc.
2+
## Copyright (c) 2018 - 2025 Analog Devices, Inc.
33
### SPDX short identifier: BSD-1-Clause
44
## Auto-generated, do not modify!
55
####################################################################################
@@ -11,17 +11,20 @@ M_DEPS += ../common/config.tcl
1111
M_DEPS += ../../scripts/adi_pd.tcl
1212
M_DEPS += ../../common/zcu102/zcu102_system_constr.xdc
1313
M_DEPS += ../../common/zcu102/zcu102_system_bd.tcl
14-
M_DEPS += ../../common/xilinx/dacfifo_bd.tcl
14+
M_DEPS += ../../common/xilinx/data_offload_bd.tcl
15+
M_DEPS += ../../../library/util_hbm/scripts/adi_util_hbm.tcl
1516
M_DEPS += ../../../library/jesd204/scripts/jesd204.tcl
1617
M_DEPS += ../../../library/common/ad_iobuf.v
1718

1819
LIB_DEPS += axi_dmac
1920
LIB_DEPS += axi_sysid
21+
LIB_DEPS += data_offload
2022
LIB_DEPS += jesd204/ad_ip_jesd204_tpl_dac
2123
LIB_DEPS += jesd204/axi_jesd204_tx
2224
LIB_DEPS += jesd204/jesd204_tx
2325
LIB_DEPS += sysid_rom
24-
LIB_DEPS += util_dacfifo
26+
LIB_DEPS += util_do_ram
27+
LIB_DEPS += util_hbm
2528
LIB_DEPS += util_pack/util_upack2
2629
LIB_DEPS += xilinx/axi_adxcvr
2730
LIB_DEPS += xilinx/util_adxcvr

‎projects/dac_fmc_ebz/zcu102/system_bd.tcl‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3,11 +3,12 @@
33
### SPDX short identifier: ADIBSD
44
###############################################################################
55

6-
set dac_fifo_address_width 13
6+
## Offload attributes
7+
set dac_offload_type 0 ; ## BRAM
8+
set dac_offload_size [expr 256*1024] ; ## 256 kB
79

810
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
911
source $ad_hdl_dir/projects/common/zcu102/zcu102_system_bd.tcl
10-
source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl
1112
source ../common/dac_fmc_ebz_bd.tcl
1213
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
1314

@@ -51,6 +52,7 @@ LINKS=$ad_project_params(NUM_LINKS)\
5152
DEVICE_CODE=$ADI_DEVICE_CODE\
5253
DAC_DEVICE=$ADI_DAC_DEVICE\
5354
DAC_MODE=$ADI_DAC_MODE\
54-
DAC_FIFO_ADDR_WIDTH=$dac_fifo_address_width"
55+
DAC_OFFLOAD:TYPE=$dac_offload_type\
56+
SIZE=$dac_offload_size"
5557

5658
sysid_gen_sys_init_file $sys_cstring

‎projects/dac_fmc_ebz/zcu102/system_top.v‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -179,8 +179,6 @@ module system_top #(
179179
* 3 H14 FMC_TXEN_1 NC
180180
*/
181181

182-
assign dac_fifo_bypass = gpio_o[40];
183-
184182
/* PMOD GPIOs 48-51 */
185183
ad_iobuf #(
186184
.DATA_WIDTH(4)
@@ -205,7 +203,6 @@ module system_top #(
205203
system_wrapper i_system_wrapper (
206204
.gpio_i (gpio_i),
207205
.gpio_o (gpio_o),
208-
.dac_fifo_bypass(dac_fifo_bypass),
209206
.spi0_csn (spi0_csn),
210207
.spi0_miso (spi_miso),
211208
.spi0_mosi (spi_mosi),

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