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Clock disabling code looks wrong #30

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@denisbaylor

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@denisbaylor

GCLK->CLKCTRL.bit.CLKEN = 0; //disable GCLK module

The comment at this line says "disable GCLK module". But my reading of the somewhat ambiguous documentation of the CLKCTRL register is different.

I believe each generic clock id has its own enable (although I don't see this spelled out clearly in the documentation). The documentation for CLKCTRL says:

This register allows the user to configure one of the generic clocks, as specified in the CLKCTRL.ID bit group. To write to the CLKCTRL register, do a 16-bit write with all configurations and the ID.

To read the CLKCTRL register, first do an 8-bit write to the CLKCTRL.ID bit group with the ID of the generic clock whose configuration is to be read, and then read the CLKCTRL register.

I believe what line 9 is actually doing (via a forbidden 8-bit write), is setting the enable to 0, setting the GEN field to 0 (which means select generic clock generator 0) and then applying these changes to the ID field that last happened to be set. So it's essentially disabling and corrupting the clock source for the most recently configured clock generator ID. Things will work ok if you don't intermingle this low power code with other libraries that configure clocks. In my case, trying to add an interrupt between calls to other library code (Adafruit_SSD1306) caused that other code to hang. I believe the reason that code hangs is that the clocks to SERCOM2 had been disabled by this bug.

As I understand things, this line should be:

  GCLK->CLKCTRL.reg =
      (uint16_t)(GCLK_CLKCTRL_ID(GCM_EIC));  // Disable EIC clock (also sets
                                             // GCLK_CTRL_CLKEN bit to 0)

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