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* The aynchronous nature of the DRE and TXC interrupt flags
causes issues (lockups) when the TX DATA register is empty on start
and a flush is issued. Simply looking at the DRE prior to
waiting for TXC is insufficient because the data register
may well be empty but the shift register could still contain
data, in this case SERCOM::flushUART() would return before TXC
has been raised thus before flushing is complete.
* bool added to SERCOM.h to indicate when it is ok for
SERCOM::flushUART() to wait for the TXC flag. This flag is
set when any data is written to the data register via
SERCOM::writeDataUART(). It is cleared when a flush is done.
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