diff --git a/.github/workflows/package_core.yml b/.github/workflows/package_core.yml index f3d12eed..39bed82b 100644 --- a/.github/workflows/package_core.yml +++ b/.github/workflows/package_core.yml @@ -60,7 +60,7 @@ jobs: path: ${{ env.CORE_ARTIFACT }}.tar.bz2 test-core: - name: Test arduino:zephyr:${{ matrix.board }} + name: Test ${{ matrix.board }} board runs-on: ubuntu-latest needs: package-core strategy: @@ -83,8 +83,8 @@ jobs: mkdir Blink/ wget -nv https://raw.githubusercontent.com/arduino/arduino-examples/refs/heads/main/examples/01.Basics/Blink/Blink.ino -P Blink/ - - name: Compile Blink for ${{ env.FQBN }} - uses: arduino/compile-sketches@main + - name: Compile Blink for ${{ matrix.board }} + uses: pillo79/compile-sketches@main with: fqbn: ${{ env.FQBN }} platforms: | @@ -96,3 +96,96 @@ jobs: sketch-paths: Blink verbose: 'false' enable-deltas-report: 'false' + enable-warnings-report: 'true' + enable-warnings-log: 'true' + + - name: Clean up log + run: | + sed -i -e 's!/home/runner/.arduino15/packages/arduino/hardware/zephyr/[^/]*/!!g' sketches-reports/* + + - uses: actions/upload-artifact@v4 + with: + name: test-report-${{ needs.package-core.outputs.CORE_TAG }}-${{ matrix.board }} + path: sketches-reports/* + + collect-logs: + name: Test summary + runs-on: ubuntu-latest + needs: + - package-core + - test-core + if: ${{ !cancelled() && needs.package-core.result == 'success' }} + env: + BOARD_NAMES: ${{ needs.package-core.outputs.BOARD_NAMES }} + steps: + - uses: actions/download-artifact@v4 + with: + path: . + pattern: test-report-* + merge-multiple: true + + - run: | + echo "### Core test results" >> "$GITHUB_STEP_SUMMARY" + for BOARD in $(echo $BOARD_NAMES | jq -cr '.[]'); do + FQBN="arduino:zephyr:$BOARD" + REPORT_FILE="arduino-zephyr-$BOARD.json" + if [ ! -f $REPORT_FILE ]; then + echo ":x: $BOARD - No report found?" >> "$GITHUB_STEP_SUMMARY" + else + REPORT=$(jq -cr '.boards[0].sketches[0]' $REPORT_FILE) + if ! $(echo $REPORT | jq -cr '.compilation_success') ; then + echo ":x: $BOARD - **Build failed**" >> "$GITHUB_STEP_SUMMARY" + else + WARNINGS=$(echo $REPORT | jq -cr '.warnings.current.absolute // 0') + if [ $WARNINGS -eq 0 ]; then + echo ":white_check_mark: $BOARD - Build successful" >> "$GITHUB_STEP_SUMMARY" + else + echo "
:warning: $BOARD - $WARNINGS Warnings:" >> "$GITHUB_STEP_SUMMARY" + echo >> "$GITHUB_STEP_SUMMARY" + echo "\`\`\`" >> "$GITHUB_STEP_SUMMARY" + echo $REPORT | jq -cr '.warnings_log[]' >> "$GITHUB_STEP_SUMMARY" + echo "\`\`\`" >> "$GITHUB_STEP_SUMMARY" + echo >> "$GITHUB_STEP_SUMMARY" + echo "
" >> "$GITHUB_STEP_SUMMARY" + fi + fi + fi + done + + publish-artifacts: + name: Publish artifacts + runs-on: ubuntu-latest + if: ${{ github.event_name == 'push' && github.repository == 'arduino/ArduinoCore-zephyr' }} + needs: + - package-core + - test-core + environment: production + permissions: + id-token: write + contents: read + env: + CORE_ARTIFACT: ${{ needs.package-core.outputs.CORE_ARTIFACT }} + CORE_TAG: ${{ needs.package-core.outputs.CORE_TAG }} + PACKAGE_INDEX_JSON: zephyr-core-${{ needs.package-core.outputs.CORE_TAG }}.json + steps: + - uses: actions/download-artifact@v4 + with: + name: ${{ env.CORE_ARTIFACT }} + + - name: Configure AWS credentials + uses: aws-actions/configure-aws-credentials@v4 + with: + role-to-assume: ${{ secrets.IAM_ROLE }} + aws-region: ${{ secrets.AWS_REGION }} + + - name: Upload artifact + run: aws s3 cp ${{ env.CORE_ARTIFACT }}.tar.bz2 s3://${{ secrets.S3_BUCKET }} + + - name: Prepare package index snippet + run: ./extra/gen_package_index_json.sh + + - name: Archive package index snippet + uses: actions/upload-artifact@v4 + with: + name: ${{ env.PACKAGE_INDEX_JSON }} + path: ${{ env.PACKAGE_INDEX_JSON }} diff --git a/extra/gen_package_index_json.sh b/extra/gen_package_index_json.sh new file mode 100755 index 00000000..bcaee2cb --- /dev/null +++ b/extra/gen_package_index_json.sh @@ -0,0 +1,11 @@ +#!/bin/bash + +if [ -z "$CORE_TAG" ]; then + echo "This script can be used in Github CI only." + exit 1 +fi + +export ARTIFACT_HASH=$(sha256sum $CORE_ARTIFACT) +export ARTIFACT_SIZE=$(stat -c %s $CORE_ARTIFACT) + +envsubst < extra/zephyr-core-template.json > $PACKAGE_INDEX_JSON diff --git a/extra/zephyr-core-template.json b/extra/zephyr-core-template.json new file mode 100644 index 00000000..7f4f72d1 --- /dev/null +++ b/extra/zephyr-core-template.json @@ -0,0 +1,66 @@ +{ + "packages": [ + { + "platforms": [ + { + "name": "Arduino Zephyr Boards", + "architecture": "zephyr", + "version": "$CORE_TAG", + "category": "Arduino", + "url": "https://downloads.arduino.cc/cores/zephyr/${CORE_ARTIFACT}.tar.bz2", + "archiveFileName": "${CORE_ARTIFACT}.tar.bz2", + "checksum": "SHA-256:${ARTIFACT_HASH}", + "size": "${ARTIFACT_SIZE}", + "help": { + "online": "https://www.arduino.cc/en/Reference/HomePage" + }, + "boards": [ + { + "name": "Arduino Giga" + }, + { + "name": "Arduino Nano 33 BLE" + }, + { + "name": "Arduino Portenta H7" + }, + { + "name": "Arduino Portenta C33" + }, + { + "name": "Renesas EK_RA8D1" + }, + { + "name": "NXP FRDM MCXN947" + }, + { + "name": "NXP FRDM RW612" + } + ], + "toolsDependencies": [ + { + "packager": "zephyr", + "name": "arm-zephyr-eabi", + "version": "0.16.8" + }, + { + "packager": "arduino", + "name": "dfu-util", + "version": "0.11.0-arduino5" + }, + { + "packager": "arduino", + "name": "bossac", + "version": "1.9.1-arduino2" + }, + { + "packager": "arduino", + "name": "zephyr-post-build-tool", + "version": "0.1.0" + } + ] + } + ] + } + ] +} diff --git a/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.bin b/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.bin index 17eeb444..29b8d580 100755 Binary files a/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.bin and b/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.bin differ diff --git a/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.elf b/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.elf index f93a3726..fb1cbebb 100755 Binary files a/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.elf and b/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.elf differ diff --git a/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.hex b/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.hex index a9311795..585d4ae8 100644 --- a/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.hex +++ b/firmwares/zephyr-arduino_giga_r1_stm32h747xx_m7.hex @@ -1,46 +1,46 @@ :020000040804EE -:10000000586B0324F58F040841850408E18F040828 -:10001000E18F0408E18F0408E18F0408000000006C -:100020000000000000000000000000001D91040816 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arduino_pins[] = { DT_FOREACH_PROP_ELEM_SEP( + DT_PATH(zephyr_user), digital_pin_gpios, GPIO_DT_SPEC_GET_BY_IDX, (, )) }; + +static const struct gpio_dt_spec arduino_ports[] = { DT_FOREACH_PROP_ELEM_SEP( + DT_PATH(zephyr_user), port_pin_gpios, GPIO_DT_SPEC_GET_BY_IDX, (, )) }; + + +void pinMode(PinName pinNumber, PinMode mode) { + // See if the pinName maps to a real pin number if so use the pin number version + int pin_index = PinNameToIndex(pinNumber); + if (pin_index != -1) { + // this will grab any settings out of the device tree. + pinMode((pin_size_t)pin_index, mode); + return; + } + + if (pinNumber & DUAL_PAD) return; + + if (mode == INPUT) { // input mode + gpio_pin_configure(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf, + GPIO_INPUT | GPIO_ACTIVE_HIGH); + } else if (mode == INPUT_PULLUP) { // input with internal pull-up + gpio_pin_configure(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf, + GPIO_INPUT | GPIO_PULL_UP | GPIO_ACTIVE_HIGH); + } else if (mode == INPUT_PULLDOWN) { // input with internal pull-down + gpio_pin_configure(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf, + GPIO_INPUT | GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH); + } else if (mode == OUTPUT) { // output mode + gpio_pin_configure(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf, + GPIO_OUTPUT_LOW | GPIO_ACTIVE_HIGH); + } +} + +void digitalWrite(PinName pinNumber, PinStatus status) { + if (pinNumber & DUAL_PAD) return; + gpio_pin_set(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf, status); +} + + +PinStatus digitalRead(PinName pinNumber) { + if (pinNumber & DUAL_PAD) return LOW; + return (gpio_pin_get(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf) == 1) ? HIGH : LOW; +} + +int analogRead(PinName pinNumber) { + // Not sure what to do here, does anyone do something like: + // analogRead(PA_0c); or analogRead(PC2_ALT0)? + // first pass only support ones on pins. + if (pinNumber & DUAL_PAD) { + switch (pinNumber & 0xf) { + case 0: return analogRead(A0); + case 1: return analogRead(A1); + case 2: return analogRead(A2); + case 3: return analogRead(A3); + default: return -1; + } + + } + int pin_index = PinNameToIndex(pinNumber); + if (pin_index != -1) { + return analogRead(pin_index); + } + return -1; +} + + +void analogWrite(PinName pinNumber, int value) { + // first pass only support ones on pins. + if (pinNumber & DUAL_PAD) return; + int pin_index = PinNameToIndex(pinNumber); + if (pin_index != -1) { + analogWrite(pin_index, value); + } +} + + + +int PinNameToIndex(PinName P) { + if (P & DUAL_PAD) return -1; + for (size_t i = 0; i < ARRAY_SIZE(arduino_pins); i++) { + if ((arduino_ports[P >> 4].port == arduino_pins[i].port) && ((P & 0xf) == arduino_pins[i].pin)) { + return i; + } + } + return -1; +} + +PinName digitalPinToPinName(pin_size_t P) { + if (P < ARRAY_SIZE(arduino_pins)) { + // Convert the pins port into an index into our port's list + for (uint8_t port_index = 0; port_index < ARRAY_SIZE(arduino_ports); port_index++) { + if (arduino_pins[P].port == arduino_ports[port_index].port) { + return (PinName)((port_index << 4) | arduino_pins[P].pin); + } + } + } + return PinName::NC; +} diff --git a/variants/arduino_giga_r1_stm32h747xx_m7/PinNames.h b/variants/arduino_giga_r1_stm32h747xx_m7/PinNames.h new file mode 100644 index 00000000..1128e905 --- /dev/null +++ b/variants/arduino_giga_r1_stm32h747xx_m7/PinNames.h @@ -0,0 +1,218 @@ +/* + * Copyright (c) 2024 Arduino SA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_PINNAMES_H +#define ZEPHYR_PINNAMES_H + +#ifdef __cplusplus +extern "C" { +#endif + +#define DUAL_PAD 0x800 + +typedef enum { + PA_0 = 0x00, + PA_1 = 0x01, + PA_2 = 0x02, + PA_3 = 0x03, + PA_4 = 0x04, + PA_5 = 0x05, + PA_6 = 0x06, + PA_7 = 0x07, + PA_8 = 0x08, + PA_9 = 0x09, + PA_10 = 0x0A, + PA_11 = 0x0B, + PA_12 = 0x0C, + PA_13 = 0x0D, + PA_14 = 0x0E, + PA_15 = 0x0F, + PB_0 = 0x10, + PB_1 = 0x11, + PB_2 = 0x12, + PB_3 = 0x13, + PB_4 = 0x14, + PB_5 = 0x15, + PB_6 = 0x16, + PB_7 = 0x17, + PB_8 = 0x18, + PB_9 = 0x19, + PB_10 = 0x1A, + PB_11 = 0x1B, + PB_12 = 0x1C, + PB_13 = 0x1D, + PB_14 = 0x1E, + PB_15 = 0x1F, + PC_0 = 0x20, + PC_1 = 0x21, + PC_2 = 0x22, + PC_3 = 0x23, + PC_4 = 0x24, + PC_5 = 0x25, + PC_6 = 0x26, + PC_7 = 0x27, + PC_8 = 0x28, + PC_9 = 0x29, + PC_10 = 0x2A, + PC_11 = 0x2B, + PC_12 = 0x2C, + PC_13 = 0x2D, + PC_14 = 0x2E, + PC_15 = 0x2F, + PD_0 = 0x30, + PD_1 = 0x31, + PD_2 = 0x32, + PD_3 = 0x33, + PD_4 = 0x34, + PD_5 = 0x35, + PD_6 = 0x36, + PD_7 = 0x37, + PD_8 = 0x38, + PD_9 = 0x39, + PD_10 = 0x3A, + PD_11 = 0x3B, + PD_12 = 0x3C, + PD_13 = 0x3D, + PD_14 = 0x3E, + PD_15 = 0x3F, + PE_0 = 0x40, + PE_1 = 0x41, + PE_2 = 0x42, + PE_3 = 0x43, + PE_4 = 0x44, + PE_5 = 0x45, + PE_6 = 0x46, + PE_7 = 0x47, + PE_8 = 0x48, + PE_9 = 0x49, + PE_10 = 0x4A, + PE_11 = 0x4B, + PE_12 = 0x4C, + PE_13 = 0x4D, + PE_14 = 0x4E, + PE_15 = 0x4F, + PF_0 = 0x50, + PF_1 = 0x51, + PF_2 = 0x52, + PF_3 = 0x53, + PF_4 = 0x54, + PF_5 = 0x55, + PF_6 = 0x56, + PF_7 = 0x57, + PF_8 = 0x58, + PF_9 = 0x59, + PF_10 = 0x5A, + PF_11 = 0x5B, + PF_12 = 0x5C, + PF_13 = 0x5D, + PF_14 = 0x5E, + PF_15 = 0x5F, + PG_0 = 0x60, + PG_1 = 0x61, + PG_2 = 0x62, + PG_3 = 0x63, + PG_4 = 0x64, + PG_5 = 0x65, + PG_6 = 0x66, + PG_7 = 0x67, + PG_8 = 0x68, + PG_9 = 0x69, + PG_10 = 0x6A, + PG_11 = 0x6B, + PG_12 = 0x6C, + PG_13 = 0x6D, + PG_14 = 0x6E, + PG_15 = 0x6F, + PH_0 = 0x70, + PH_1 = 0x71, + PH_2 = 0x72, + PH_3 = 0x73, + PH_4 = 0x74, + PH_5 = 0x75, + PH_6 = 0x76, + PH_7 = 0x77, + PH_8 = 0x78, + PH_9 = 0x79, + PH_10 = 0x7A, + PH_11 = 0x7B, + PH_12 = 0x7C, + PH_13 = 0x7D, + PH_14 = 0x7E, + PH_15 = 0x7F, + PI_0 = 0x80, + PI_1 = 0x81, + PI_2 = 0x82, + PI_3 = 0x83, + PI_4 = 0x84, + PI_5 = 0x85, + PI_6 = 0x86, + PI_7 = 0x87, + PI_8 = 0x88, + PI_9 = 0x89, + PI_10 = 0x8A, + PI_11 = 0x8B, + PI_12 = 0x8C, + PI_13 = 0x8D, + PI_14 = 0x8E, + PI_15 = 0x8F, + PJ_0 = 0x90, + PJ_1 = 0x91, + PJ_2 = 0x92, + PJ_3 = 0x93, + PJ_4 = 0x94, + PJ_5 = 0x95, + PJ_6 = 0x96, + PJ_7 = 0x97, + PJ_8 = 0x98, + PJ_9 = 0x99, + PJ_10 = 0x9A, + PJ_11 = 0x9B, + PJ_12 = 0x9C, + PJ_13 = 0x9D, + PJ_14 = 0x9E, + PJ_15 = 0x9F, + PK_0 = 0xA0, + PK_1 = 0xA1, + PK_2 = 0xA2, + PK_3 = 0xA3, + PK_4 = 0xA4, + PK_5 = 0xA5, + PK_6 = 0xA6, + PK_7 = 0xA7, + + + //Led mappings + LED_RED = PI_12, //Red + LED_GREEN = PJ_13, //Green + LED_BLUE = PE_3, //Blue + + // Not connected + NC = (int)0xFFFFFFFF +} PinName; + +// Standardized LED and button names +#define LED1 LED_RED +#define LED2 LED_GREEN +#define LED3 LED_BLUE + + + +#ifdef __cplusplus + +} + +// overloads - only cpp as c does not allow overloads of functions +void pinMode(PinName pinNumber, PinMode mode); +void digitalWrite(PinName pinNumber, PinStatus status); +int PinNameToIndex(PinName P); +PinName digitalPinToPinName(pin_size_t P); +PinStatus digitalRead(PinName pinNumber); +int analogRead(PinName pinNumber); +void analogWrite(PinName pinNumber, int value); + +#endif + +#endif diff --git a/variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.overlay b/variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.overlay index 75582512..c1fe925e 100644 --- a/variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.overlay +++ b/variants/arduino_giga_r1_stm32h747xx_m7/arduino_giga_r1_stm32h747xx_m7.overlay @@ -476,6 +476,18 @@ <&arduino_header 18 0>, <&arduino_header 19 0>; + port-pin-gpios = <&gpioa 0 0>, + <&gpiob 0 0>, + <&gpioc 0 0>, + <&gpiod 0 0>, + <&gpioe 0 0>, + <&gpiof 0 0>, + <&gpiog 0 0>, + <&gpioh 0 0>, + <&gpioi 0 0>, + <&gpioj 0 0>, + <&gpiok 0 0>; + adc-pin-gpios = <&gpioc 4 0>, <&gpioc 5 0>, <&gpiob 0 0>, diff --git a/variants/arduino_giga_r1_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h b/variants/arduino_giga_r1_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h index f3d83813..91fd9abc 100644 --- a/variants/arduino_giga_r1_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h +++ b/variants/arduino_giga_r1_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h @@ -2,7 +2,7 @@ * Generated by gen_defines.py * * DTS input file: - * /home/burellil/Work/ArduinoCore-zephyr/ArduinoCore-zephyr/build/arduino_giga_r1_stm32h747xx_m7/zephyr/zephyr.dts.pre + * /home/kurte/github/ArduinoCore-zephyr/build/arduino_giga_r1_stm32h747xx_m7/zephyr/zephyr.dts.pre * * Directories with bindings: * $ZEPHYR_BASE/dts/bindings @@ -91,177 +91,177 @@ * 80 /soc/pin-controller@58020000/gpio@58020800 * 81 /soc/pin-controller@58020000/gpio@58020C00 * 82 /soc/pin-controller@58020000/gpio@58021000 - * 83 /soc/pin-controller@58020000/gpio@58021800 - * 84 /soc/pin-controller@58020000/gpio@58021C00 - * 85 /soc/pin-controller@58020000/gpio@58022400 - * 86 /soc/pin-controller@58020000/gpio@58022800 - * 87 /soc/timers@40000000 - * 88 /soc/pin-controller@58020000/tim2_ch3_pa2 - * 89 /soc/pin-controller@58020000/tim2_ch4_pa3 - * 90 /soc/timers@40000000/pwm - * 91 /soc/timers@40000400 - * 92 /soc/pin-controller@58020000/tim3_ch1_pb4 - * 93 /soc/pin-controller@58020000/tim3_ch2_pa7 - * 94 /soc/timers@40000400/pwm - * 95 /soc/timers@40000800 - * 96 /soc/pin-controller@58020000/tim4_ch2_pd13 - * 97 /soc/pin-controller@58020000/tim4_ch3_pb8 - * 98 /soc/pin-controller@58020000/tim4_ch4_pb9 - * 99 /soc/timers@40000800/pwm - * 100 /soc/timers@40010000 - * 101 /soc/pin-controller@58020000/tim1_ch1_pk1 - * 102 /soc/pin-controller@58020000/tim1_ch3_pj9 - * 103 /soc/timers@40010000/pwm - * 104 /soc/timers@40010400 - * 105 /soc/pin-controller@58020000/tim8_ch1_pj8 - * 106 /soc/timers@40010400/pwm - * 107 /otghs_fs_phy - * 108 /soc/pin-controller@58020000/usb_otg_fs_dm_pa11 - * 109 /soc/pin-controller@58020000/usb_otg_fs_dp_pa12 - * 110 /soc/usb@40080000 - * 111 /soc/usb@40080000/board_cdc_acm_uart - * 112 /zephyr,user - * 113 /clocks/clk-csi - * 114 /clocks/clk-hsi - * 115 /clocks/clk-hsi48 - * 116 /clocks/clk-lse - * 117 /clocks/clk-lsi - * 118 /clocks/perck - * 119 /clocks/pll@1 - * 120 /clocks/pll@2 - * 121 /cpus - * 122 /cpus/cpu@0 - * 123 /cpus/cpu@0/mpu@e000ed90 - * 124 /gpio_keys - * 125 /gpio_keys/button_0 - * 126 /leds - * 127 /leds/led_0 - * 128 /leds/led_1 - * 129 /leds/led_2 - * 130 /mcos - * 131 /mcos/mco1 - * 132 /mcos/mco2 - * 133 /soc/adc@40022100 - * 134 /soc/adc@40022300 - * 135 /soc/bdma@58025400 - * 136 /soc/can@4000a000 - * 137 /soc/pin-controller@58020000/fdcan2_rx_pb5 - * 138 /soc/pin-controller@58020000/fdcan2_tx_pb13 - * 139 /soc/can@4000a400 - * 140 /soc/dma@40020400 - * 141 /soc/dmamux@58025800 - * 142 /soc/dmamux@40020800 - * 143 /soc/i2s@40003800 - * 144 /soc/i2s@40003c00 - * 145 /soc/i2s@40013000 - * 146 /soc/interrupt-controller@58000000 - * 147 /soc/mailbox@58026400 - * 148 /soc/memory@38800000 - * 149 /soc/rng@48021800 - * 150 /soc/sdmmc@48022400 - * 151 /soc/sdmmc@52007000 - * 152 /soc/serial@40004800 - * 153 /soc/serial@40005000 - * 154 /soc/serial@40007c00 - * 155 /soc/serial@58000c00 - * 156 /soc/spi@40003800 - * 157 /soc/spi@40003c00 - * 158 /soc/spi@40013400 - * 159 /soc/spi@58001400 - * 160 /soc/timer@e000e010 - * 161 /soc/timers@40002400 - * 162 /soc/usb@40040000 - * 163 /soc/watchdog@50003000 - * 164 /soc/watchdog@58004800 - * 165 /soc/adc@40022000/channel@0 - * 166 /soc/adc@40022000/channel@1 - * 167 /soc/adc@40022000/channel@4 - * 168 /soc/adc@40022000/channel@5 - * 169 /soc/adc@40022000/channel@8 - * 170 /soc/adc@40022000/channel@9 - * 171 /soc/adc@40022000/channel@a - * 172 /soc/adc@40022000/channel@c - * 173 /soc/adc@40022000/channel@d - * 174 /soc/adc@40022000/channel@10 - * 175 /soc/adc@40022000/channel@12 - * 176 /soc/adc@40022000/channel@13 - * 177 /soc/adc@58026000/channel@0 - * 178 /soc/adc@58026000/channel@1 - * 179 /soc/dma@40020000 - * 180 /soc/i2c@58001c00/gc2145@3c - * 181 /soc/pin-controller@58020000/dcmi_d0_ph9 - * 182 /soc/pin-controller@58020000/dcmi_d1_ph10 - * 183 /soc/pin-controller@58020000/dcmi_d2_ph11 - * 184 /soc/pin-controller@58020000/dcmi_d3_pg11 - * 185 /soc/pin-controller@58020000/dcmi_d4_ph14 - * 186 /soc/pin-controller@58020000/dcmi_d5_pi4 - * 187 /soc/pin-controller@58020000/dcmi_d6_pi6 - * 188 /soc/pin-controller@58020000/dcmi_d7_pi7 - * 189 /soc/pin-controller@58020000/dcmi_hsync_ph8 - * 190 /soc/pin-controller@58020000/dcmi_pixclk_pa6 - * 191 /soc/pin-controller@58020000/dcmi_vsync_pi5 - * 192 /soc/dcmi@48020000 - * 193 /soc/dcmi@48020000/port - * 194 /soc/dcmi@48020000/port/endpoint - * 195 /sdram@c0000000 - * 196 /soc/display-controller@50001000 - * 197 /soc/display-controller@50001000/display-timings - * 198 /soc/dsihost@50000000 - * 199 /soc/dsihost@50000000/st7701@0 - * 200 /soc/dsihost@50000000/st7701@0/display-timings - * 201 /soc/ethernet@40028000 - * 202 /soc/ethernet@40028000/mdio - * 203 /soc/flash-controller@52002000 - * 204 /soc/flash-controller@52002000/flash@8000000 - * 205 /soc/flash-controller@52002000/flash@8000000/partitions - * 206 /soc/flash-controller@52002000/flash@8000000/partitions/partition@0 - * 207 /soc/flash-controller@52002000/flash@8000000/partitions/partition@40000 - * 208 /soc/flash-controller@52002000/flash@8000000/partitions/partition@e0000 - * 209 /soc/i2c@58001c00/gc2145@3c/port - * 210 /soc/i2c@58001c00/gc2145@3c/port/endpoint - * 211 /soc/pin-controller@58020000/fmc_a0_pf0 - * 212 /soc/pin-controller@58020000/fmc_a10_pg0 - * 213 /soc/pin-controller@58020000/fmc_a11_pg1 - * 214 /soc/pin-controller@58020000/fmc_a12_pg2 - * 215 /soc/pin-controller@58020000/fmc_a14_pg4 - * 216 /soc/pin-controller@58020000/fmc_a15_pg5 - * 217 /soc/pin-controller@58020000/fmc_a1_pf1 - * 218 /soc/pin-controller@58020000/fmc_a2_pf2 - * 219 /soc/pin-controller@58020000/fmc_a3_pf3 - * 220 /soc/pin-controller@58020000/fmc_a4_pf4 - * 221 /soc/pin-controller@58020000/fmc_a5_pf5 - * 222 /soc/pin-controller@58020000/fmc_a6_pf12 - * 223 /soc/pin-controller@58020000/fmc_a7_pf13 - * 224 /soc/pin-controller@58020000/fmc_a8_pf14 - * 225 /soc/pin-controller@58020000/fmc_a9_pf15 - * 226 /soc/pin-controller@58020000/fmc_d0_pd14 - * 227 /soc/pin-controller@58020000/fmc_d10_pe13 - * 228 /soc/pin-controller@58020000/fmc_d11_pe14 - * 229 /soc/pin-controller@58020000/fmc_d12_pe15 - * 230 /soc/pin-controller@58020000/fmc_d13_pd8 - * 231 /soc/pin-controller@58020000/fmc_d14_pd9 - * 232 /soc/pin-controller@58020000/fmc_d15_pd10 - * 233 /soc/pin-controller@58020000/fmc_d1_pd15 - * 234 /soc/pin-controller@58020000/fmc_d2_pd0 - * 235 /soc/pin-controller@58020000/fmc_d3_pd1 - * 236 /soc/pin-controller@58020000/fmc_d4_pe7 - * 237 /soc/pin-controller@58020000/fmc_d5_pe8 - * 238 /soc/pin-controller@58020000/fmc_d6_pe9 - * 239 /soc/pin-controller@58020000/fmc_d7_pe10 - * 240 /soc/pin-controller@58020000/fmc_d8_pe11 - * 241 /soc/pin-controller@58020000/fmc_d9_pe12 - * 242 /soc/pin-controller@58020000/fmc_nbl0_pe0 - * 243 /soc/pin-controller@58020000/fmc_nbl1_pe1 - * 244 /soc/pin-controller@58020000/fmc_sdcke0_ph2 - * 245 /soc/pin-controller@58020000/fmc_sdclk_pg8 - * 246 /soc/pin-controller@58020000/fmc_sdncas_pg15 - * 247 /soc/pin-controller@58020000/fmc_sdne0_ph3 - * 248 /soc/pin-controller@58020000/fmc_sdnras_pf11 - * 249 /soc/pin-controller@58020000/fmc_sdnwe_ph5 - * 250 /soc/memory-controller@52004000 - * 251 /soc/memory-controller@52004000/sdram - * 252 /soc/memory-controller@52004000/sdram/bank@0 - * 253 /soc/pin-controller@58020000/gpio@58021400 + * 83 /soc/pin-controller@58020000/gpio@58021400 + * 84 /soc/pin-controller@58020000/gpio@58021800 + * 85 /soc/pin-controller@58020000/gpio@58021C00 + * 86 /soc/pin-controller@58020000/gpio@58022400 + * 87 /soc/pin-controller@58020000/gpio@58022800 + * 88 /soc/timers@40000000 + * 89 /soc/pin-controller@58020000/tim2_ch3_pa2 + * 90 /soc/pin-controller@58020000/tim2_ch4_pa3 + * 91 /soc/timers@40000000/pwm + * 92 /soc/timers@40000400 + * 93 /soc/pin-controller@58020000/tim3_ch1_pb4 + * 94 /soc/pin-controller@58020000/tim3_ch2_pa7 + * 95 /soc/timers@40000400/pwm + * 96 /soc/timers@40000800 + * 97 /soc/pin-controller@58020000/tim4_ch2_pd13 + * 98 /soc/pin-controller@58020000/tim4_ch3_pb8 + * 99 /soc/pin-controller@58020000/tim4_ch4_pb9 + * 100 /soc/timers@40000800/pwm + * 101 /soc/timers@40010000 + * 102 /soc/pin-controller@58020000/tim1_ch1_pk1 + * 103 /soc/pin-controller@58020000/tim1_ch3_pj9 + * 104 /soc/timers@40010000/pwm + * 105 /soc/timers@40010400 + * 106 /soc/pin-controller@58020000/tim8_ch1_pj8 + * 107 /soc/timers@40010400/pwm + * 108 /otghs_fs_phy + * 109 /soc/pin-controller@58020000/usb_otg_fs_dm_pa11 + * 110 /soc/pin-controller@58020000/usb_otg_fs_dp_pa12 + * 111 /soc/usb@40080000 + * 112 /soc/usb@40080000/board_cdc_acm_uart + * 113 /zephyr,user + * 114 /clocks/clk-csi + * 115 /clocks/clk-hsi + * 116 /clocks/clk-hsi48 + * 117 /clocks/clk-lse + * 118 /clocks/clk-lsi + * 119 /clocks/perck + * 120 /clocks/pll@1 + * 121 /clocks/pll@2 + * 122 /cpus + * 123 /cpus/cpu@0 + * 124 /cpus/cpu@0/mpu@e000ed90 + * 125 /gpio_keys + * 126 /gpio_keys/button_0 + * 127 /leds + * 128 /leds/led_0 + * 129 /leds/led_1 + * 130 /leds/led_2 + * 131 /mcos + * 132 /mcos/mco1 + * 133 /mcos/mco2 + * 134 /soc/adc@40022100 + * 135 /soc/adc@40022300 + * 136 /soc/bdma@58025400 + * 137 /soc/can@4000a000 + * 138 /soc/pin-controller@58020000/fdcan2_rx_pb5 + * 139 /soc/pin-controller@58020000/fdcan2_tx_pb13 + * 140 /soc/can@4000a400 + * 141 /soc/dma@40020400 + * 142 /soc/dmamux@58025800 + * 143 /soc/dmamux@40020800 + * 144 /soc/i2s@40003800 + * 145 /soc/i2s@40003c00 + * 146 /soc/i2s@40013000 + * 147 /soc/interrupt-controller@58000000 + * 148 /soc/mailbox@58026400 + * 149 /soc/memory@38800000 + * 150 /soc/rng@48021800 + * 151 /soc/sdmmc@48022400 + * 152 /soc/sdmmc@52007000 + * 153 /soc/serial@40004800 + * 154 /soc/serial@40005000 + * 155 /soc/serial@40007c00 + * 156 /soc/serial@58000c00 + * 157 /soc/spi@40003800 + * 158 /soc/spi@40003c00 + * 159 /soc/spi@40013400 + * 160 /soc/spi@58001400 + * 161 /soc/timer@e000e010 + * 162 /soc/timers@40002400 + * 163 /soc/usb@40040000 + * 164 /soc/watchdog@50003000 + * 165 /soc/watchdog@58004800 + * 166 /soc/adc@40022000/channel@0 + * 167 /soc/adc@40022000/channel@1 + * 168 /soc/adc@40022000/channel@4 + * 169 /soc/adc@40022000/channel@5 + * 170 /soc/adc@40022000/channel@8 + * 171 /soc/adc@40022000/channel@9 + * 172 /soc/adc@40022000/channel@a + * 173 /soc/adc@40022000/channel@c + * 174 /soc/adc@40022000/channel@d + * 175 /soc/adc@40022000/channel@10 + * 176 /soc/adc@40022000/channel@12 + * 177 /soc/adc@40022000/channel@13 + * 178 /soc/adc@58026000/channel@0 + * 179 /soc/adc@58026000/channel@1 + * 180 /soc/dma@40020000 + * 181 /soc/i2c@58001c00/gc2145@3c + * 182 /soc/pin-controller@58020000/dcmi_d0_ph9 + * 183 /soc/pin-controller@58020000/dcmi_d1_ph10 + * 184 /soc/pin-controller@58020000/dcmi_d2_ph11 + * 185 /soc/pin-controller@58020000/dcmi_d3_pg11 + * 186 /soc/pin-controller@58020000/dcmi_d4_ph14 + * 187 /soc/pin-controller@58020000/dcmi_d5_pi4 + * 188 /soc/pin-controller@58020000/dcmi_d6_pi6 + * 189 /soc/pin-controller@58020000/dcmi_d7_pi7 + * 190 /soc/pin-controller@58020000/dcmi_hsync_ph8 + * 191 /soc/pin-controller@58020000/dcmi_pixclk_pa6 + * 192 /soc/pin-controller@58020000/dcmi_vsync_pi5 + * 193 /soc/dcmi@48020000 + * 194 /soc/dcmi@48020000/port + * 195 /soc/dcmi@48020000/port/endpoint + * 196 /sdram@c0000000 + * 197 /soc/display-controller@50001000 + * 198 /soc/display-controller@50001000/display-timings + * 199 /soc/dsihost@50000000 + * 200 /soc/dsihost@50000000/st7701@0 + * 201 /soc/dsihost@50000000/st7701@0/display-timings + * 202 /soc/ethernet@40028000 + * 203 /soc/ethernet@40028000/mdio + * 204 /soc/flash-controller@52002000 + * 205 /soc/flash-controller@52002000/flash@8000000 + * 206 /soc/flash-controller@52002000/flash@8000000/partitions + * 207 /soc/flash-controller@52002000/flash@8000000/partitions/partition@0 + * 208 /soc/flash-controller@52002000/flash@8000000/partitions/partition@40000 + * 209 /soc/flash-controller@52002000/flash@8000000/partitions/partition@e0000 + * 210 /soc/i2c@58001c00/gc2145@3c/port + * 211 /soc/i2c@58001c00/gc2145@3c/port/endpoint + * 212 /soc/pin-controller@58020000/fmc_a0_pf0 + * 213 /soc/pin-controller@58020000/fmc_a10_pg0 + * 214 /soc/pin-controller@58020000/fmc_a11_pg1 + * 215 /soc/pin-controller@58020000/fmc_a12_pg2 + * 216 /soc/pin-controller@58020000/fmc_a14_pg4 + * 217 /soc/pin-controller@58020000/fmc_a15_pg5 + * 218 /soc/pin-controller@58020000/fmc_a1_pf1 + * 219 /soc/pin-controller@58020000/fmc_a2_pf2 + * 220 /soc/pin-controller@58020000/fmc_a3_pf3 + * 221 /soc/pin-controller@58020000/fmc_a4_pf4 + * 222 /soc/pin-controller@58020000/fmc_a5_pf5 + * 223 /soc/pin-controller@58020000/fmc_a6_pf12 + * 224 /soc/pin-controller@58020000/fmc_a7_pf13 + * 225 /soc/pin-controller@58020000/fmc_a8_pf14 + * 226 /soc/pin-controller@58020000/fmc_a9_pf15 + * 227 /soc/pin-controller@58020000/fmc_d0_pd14 + * 228 /soc/pin-controller@58020000/fmc_d10_pe13 + * 229 /soc/pin-controller@58020000/fmc_d11_pe14 + * 230 /soc/pin-controller@58020000/fmc_d12_pe15 + * 231 /soc/pin-controller@58020000/fmc_d13_pd8 + * 232 /soc/pin-controller@58020000/fmc_d14_pd9 + * 233 /soc/pin-controller@58020000/fmc_d15_pd10 + * 234 /soc/pin-controller@58020000/fmc_d1_pd15 + * 235 /soc/pin-controller@58020000/fmc_d2_pd0 + * 236 /soc/pin-controller@58020000/fmc_d3_pd1 + * 237 /soc/pin-controller@58020000/fmc_d4_pe7 + * 238 /soc/pin-controller@58020000/fmc_d5_pe8 + * 239 /soc/pin-controller@58020000/fmc_d6_pe9 + * 240 /soc/pin-controller@58020000/fmc_d7_pe10 + * 241 /soc/pin-controller@58020000/fmc_d8_pe11 + * 242 /soc/pin-controller@58020000/fmc_d9_pe12 + * 243 /soc/pin-controller@58020000/fmc_nbl0_pe0 + * 244 /soc/pin-controller@58020000/fmc_nbl1_pe1 + * 245 /soc/pin-controller@58020000/fmc_sdcke0_ph2 + * 246 /soc/pin-controller@58020000/fmc_sdclk_pg8 + * 247 /soc/pin-controller@58020000/fmc_sdncas_pg15 + * 248 /soc/pin-controller@58020000/fmc_sdne0_ph3 + * 249 /soc/pin-controller@58020000/fmc_sdnras_pf11 + * 250 /soc/pin-controller@58020000/fmc_sdnwe_ph5 + * 251 /soc/memory-controller@52004000 + * 252 /soc/memory-controller@52004000/sdram + * 253 /soc/memory-controller@52004000/sdram/bank@0 * 254 /soc/rtc@58004000 * 255 /soc/rtc@58004000/backup_regs * 256 /soc/pin-controller@58020000/uart7_cts_pf9 @@ -384,13 +384,13 @@ 38, \ 39, \ 40, \ - 107, \ - 112, \ - 121, \ - 124, \ - 126, \ - 130, \ - 195, + 108, \ + 113, \ + 122, \ + 125, \ + 127, \ + 131, \ + 196, /* Existence and alternate IDs: */ #define DT_N_EXISTS 1 @@ -728,17 +728,16 @@ 69, \ 73, \ 77, \ - 87, \ - 91, \ - 95, \ - 100, \ - 104, \ - 110, \ - 133, \ + 88, \ + 92, \ + 96, \ + 101, \ + 105, \ + 111, \ 134, \ 135, \ 136, \ - 139, \ + 137, \ 140, \ 141, \ 142, \ @@ -764,13 +763,14 @@ 162, \ 163, \ 164, \ - 179, \ - 192, \ - 196, \ - 198, \ - 201, \ - 203, \ - 250, \ + 165, \ + 180, \ + 193, \ + 197, \ + 199, \ + 202, \ + 204, \ + 251, \ 254, \ 260, \ 269, \ @@ -915,17 +915,16 @@ 69, \ 73, \ 77, \ - 87, \ - 91, \ - 95, \ - 100, \ - 104, \ - 110, \ - 133, \ + 88, \ + 92, \ + 96, \ + 101, \ + 105, \ + 111, \ 134, \ 135, \ 136, \ - 139, \ + 137, \ 140, \ 141, \ 142, \ @@ -934,7 +933,7 @@ 145, \ 146, \ 147, \ - 149, \ + 148, \ 150, \ 151, \ 152, \ @@ -945,14 +944,15 @@ 157, \ 158, \ 159, \ - 161, \ + 160, \ 162, \ 163, \ - 179, \ - 192, \ - 196, \ - 201, \ - 203, \ + 164, \ + 180, \ + 193, \ + 197, \ + 202, \ + 204, \ 254, \ 260, \ 269, \ @@ -1074,14 +1074,14 @@ #define DT_N_S_clocks_SUPPORTS_ORDS \ 7, \ 8, \ - 113, \ 114, \ 115, \ 116, \ 117, \ 118, \ 119, \ - 120, + 120, \ + 121, /* Existence and alternate IDs: */ #define DT_N_S_clocks_EXISTS 1 @@ -1158,7 +1158,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_clocks_S_clk_hse_SUPPORTS_ORDS \ 8, \ - 120, + 121, /* Existence and alternate IDs: */ #define DT_N_S_clocks_S_clk_hse_EXISTS 1 @@ -1445,23 +1445,23 @@ 85, \ 86, \ 87, \ - 91, \ - 95, \ - 100, \ - 104, \ - 110, \ - 133, \ + 88, \ + 92, \ + 96, \ + 101, \ + 105, \ + 111, \ 134, \ 135, \ 136, \ - 139, \ + 137, \ 140, \ 141, \ 142, \ 143, \ 144, \ 145, \ - 147, \ + 146, \ 148, \ 149, \ 150, \ @@ -1474,17 +1474,17 @@ 157, \ 158, \ 159, \ - 161, \ + 160, \ 162, \ 163, \ - 179, \ - 192, \ - 196, \ - 198, \ - 201, \ - 203, \ - 250, \ - 253, \ + 164, \ + 180, \ + 193, \ + 197, \ + 199, \ + 202, \ + 204, \ + 251, \ 254, \ 260, \ 269, \ @@ -1692,21 +1692,21 @@ 84, \ 85, \ 86, \ - 88, \ + 87, \ 89, \ - 92, \ + 90, \ 93, \ - 96, \ + 94, \ 97, \ 98, \ - 101, \ + 99, \ 102, \ - 105, \ - 108, \ + 103, \ + 106, \ 109, \ - 137, \ + 110, \ 138, \ - 181, \ + 139, \ 182, \ 183, \ 184, \ @@ -1717,7 +1717,7 @@ 189, \ 190, \ 191, \ - 211, \ + 192, \ 212, \ 213, \ 214, \ @@ -1756,7 +1756,7 @@ 247, \ 248, \ 249, \ - 253, \ + 250, \ 256, \ 257, \ 258, \ @@ -2097,9 +2097,9 @@ 14, \ 38, \ 39, \ - 112, \ - 177, \ - 178, + 113, \ + 178, \ + 179, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_adc_58026000_EXISTS 1 @@ -2770,8 +2770,8 @@ #define DT_N_S_soc_S_i2c_58001c00_SUPPORTS_ORDS \ 19, \ 37, \ - 112, \ - 180, + 113, \ + 181, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_58001c00_EXISTS 1 @@ -3006,9 +3006,9 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_SUPPORTS_ORDS \ 19, \ - 112, \ - 126, \ - 127, + 113, \ + 127, \ + 128, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_EXISTS 1 @@ -4340,7 +4340,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_SUPPORTS_ORDS \ 30, \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_40005400_EXISTS 1 @@ -4910,7 +4910,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005800_SUPPORTS_ORDS \ 34, \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_40005800_EXISTS 1 @@ -5977,7 +5977,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_gpio_deadbeef_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_gpio_deadbeef_EXISTS 1 @@ -7367,8 +7367,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_adc_40022000_SUPPORTS_ORDS \ - 112, \ - 165, \ + 113, \ 166, \ 167, \ 168, \ @@ -7379,7 +7378,8 @@ 173, \ 174, \ 175, \ - 176, + 176, \ + 177, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_adc_40022000_EXISTS 1 @@ -7987,7 +7987,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dac_40007400_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dac_40007400_EXISTS 1 @@ -8370,19 +8370,19 @@ 63, \ 66, \ 69, \ - 87, \ - 91, \ - 95, \ - 100, \ - 104, \ - 150, \ + 88, \ + 92, \ + 96, \ + 101, \ + 105, \ 151, \ 152, \ 153, \ 154, \ 155, \ - 196, \ - 198, \ + 156, \ + 197, \ + 199, \ 260, \ 277, \ 280, \ @@ -8500,7 +8500,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40004400_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_serial_40004400_EXISTS 1 @@ -8977,7 +8977,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40004c00_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_serial_40004c00_EXISTS 1 @@ -9439,7 +9439,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40011000_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_serial_40011000_EXISTS 1 @@ -9917,7 +9917,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40011400_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_serial_40011400_EXISTS 1 @@ -10498,7 +10498,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_spi_40013000_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_spi_40013000_EXISTS 1 @@ -11053,7 +11053,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_spi_40015000_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_spi_40015000_EXISTS 1 @@ -11283,8 +11283,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_SUPPORTS_ORDS \ - 112, \ - 180, \ + 113, \ + 181, \ 262, /* Existence and alternate IDs: */ @@ -11412,8 +11412,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_SUPPORTS_ORDS \ - 112, \ - 196, + 113, \ + 197, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_EXISTS 1 @@ -11540,10 +11540,10 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_SUPPORTS_ORDS \ - 112, \ - 124, \ + 113, \ 125, \ - 196, + 126, \ + 197, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_EXISTS 1 @@ -11670,8 +11670,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_SUPPORTS_ORDS \ - 112, \ - 180, + 113, \ + 181, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_EXISTS 1 @@ -11798,9 +11798,9 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_SUPPORTS_ORDS \ - 112, \ - 126, \ - 129, + 113, \ + 127, \ + 130, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_EXISTS 1 @@ -11868,6 +11868,133 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_zephyr_pm_device_runtime_auto 0 #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +/* + * Devicetree node: /soc/pin-controller@58020000/gpio@58021400 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PATH "/soc/pin-controller@58020000/gpio@58021400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME "gpio@58021400" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_UNQUOTED gpio@58021400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_TOKEN gpio_58021400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_UPPER_TOKEN GPIO_58021400 + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_IDX 5 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_NODELABEL(fn) fn(gpiof) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiof, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_HASH l5_L_caVLxj349B3OJV4wWPbN099OasLrBnDSU0_4ok + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD 83 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD_STR_SORTABLE 00083 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REQUIRES_ORDS \ + 9, \ + 10, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_SUPPORTS_ORDS \ + 113, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_EXISTS 1 +#define DT_N_INST_5_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 +#define DT_N_NODELABEL_gpiof DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_VAL_ADDRESS 1476531200 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg {1476531200, 1024} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_0 1476531200 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bits 32 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + /* * Devicetree node: /soc/pin-controller@58020000/gpio@58021800 * @@ -11917,8 +12044,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_HASH WMh7Jx9L0cqz8vSetlrt_gCmYQ3gZUCzp4QopsOPnPw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD 83 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD_STR_SORTABLE 00083 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD 84 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD_STR_SORTABLE 00084 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REQUIRES_ORDS \ @@ -11927,7 +12054,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_SUPPORTS_ORDS \ - 112, \ + 113, \ 262, /* Existence and alternate IDs: */ @@ -12045,8 +12172,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_HASH igMcmz_WuSFluvM0wGo1EvpYTTpFCCq3v9zib1JfYwU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD 84 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD_STR_SORTABLE 00084 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD 85 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD_STR_SORTABLE 00085 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_REQUIRES_ORDS \ @@ -12055,7 +12182,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_SUPPORTS_ORDS \ - 112, \ + 113, \ 262, /* Existence and alternate IDs: */ @@ -12173,8 +12300,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_HASH brNgk1VRUM_ZeSaO73TcvKZPyO_S1j8SHYvaEanogTI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD 85 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD_STR_SORTABLE 00085 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD 86 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD_STR_SORTABLE 00086 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_REQUIRES_ORDS \ @@ -12183,9 +12310,9 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_SUPPORTS_ORDS \ - 112, \ - 126, \ - 128, + 113, \ + 127, \ + 129, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_EXISTS 1 @@ -12302,8 +12429,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_HASH kKwiRU3UgeNHAnynzom_GXwZc7W_TKis8XxviU9ivKE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD 86 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD_STR_SORTABLE 00086 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD 87 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD_STR_SORTABLE 00087 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REQUIRES_ORDS \ @@ -12312,7 +12439,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_EXISTS 1 @@ -12429,8 +12556,8 @@ #define DT_N_S_soc_S_timers_40000000_HASH EG81bdVGBcHLEHOWL0pmGPFAUziNY8yKUHEsHXKaWCc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000000_ORD 87 -#define DT_N_S_soc_S_timers_40000000_ORD_STR_SORTABLE 00087 +#define DT_N_S_soc_S_timers_40000000_ORD 88 +#define DT_N_S_soc_S_timers_40000000_ORD_STR_SORTABLE 00088 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000000_REQUIRES_ORDS \ @@ -12441,7 +12568,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000000_SUPPORTS_ORDS \ - 90, \ + 91, \ 274, /* Existence and alternate IDs: */ @@ -12610,8 +12737,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch3_pa2_HASH 6MEuKlNIRXt1_UzURcIPyRfq4asvf2__irEWcYaRC38 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch3_pa2_ORD 88 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch3_pa2_ORD_STR_SORTABLE 00088 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch3_pa2_ORD 89 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch3_pa2_ORD_STR_SORTABLE 00089 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch3_pa2_REQUIRES_ORDS \ @@ -12619,7 +12746,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch3_pa2_SUPPORTS_ORDS \ - 90, + 91, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch3_pa2_EXISTS 1 @@ -12714,8 +12841,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch4_pa3_HASH YiI7EDG5_k1HtJ8J3DvQASKQk_XzPR37u_skV_SqVp4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch4_pa3_ORD 89 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch4_pa3_ORD_STR_SORTABLE 00089 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch4_pa3_ORD 90 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch4_pa3_ORD_STR_SORTABLE 00090 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch4_pa3_REQUIRES_ORDS \ @@ -12723,7 +12850,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch4_pa3_SUPPORTS_ORDS \ - 90, + 91, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim2_ch4_pa3_EXISTS 1 @@ -12821,18 +12948,18 @@ #define DT_N_S_soc_S_timers_40000000_S_pwm_HASH EPAdjmCelZ_p_2x7j2JfW0691g5_Ul9BLhqJG9tnJMk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD 90 -#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD_STR_SORTABLE 00090 +#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD 91 +#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD_STR_SORTABLE 00091 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000000_S_pwm_REQUIRES_ORDS \ - 87, \ 88, \ - 89, + 89, \ + 90, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000000_S_pwm_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000000_S_pwm_EXISTS 1 @@ -12975,8 +13102,8 @@ #define DT_N_S_soc_S_timers_40000400_HASH baeUapzy1gNL2E23NOiz9371NQp1G8KhvyeXIcEPqLk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000400_ORD 91 -#define DT_N_S_soc_S_timers_40000400_ORD_STR_SORTABLE 00091 +#define DT_N_S_soc_S_timers_40000400_ORD 92 +#define DT_N_S_soc_S_timers_40000400_ORD_STR_SORTABLE 00092 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000400_REQUIRES_ORDS \ @@ -12987,7 +13114,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000400_SUPPORTS_ORDS \ - 94, \ + 95, \ 275, /* Existence and alternate IDs: */ @@ -13156,8 +13283,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pb4_HASH 7_MIbD6HGTdC17trU5hlnxkGCofC_c_bJfy0Ll_0aEI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pb4_ORD 92 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pb4_ORD_STR_SORTABLE 00092 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pb4_ORD 93 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pb4_ORD_STR_SORTABLE 00093 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pb4_REQUIRES_ORDS \ @@ -13165,7 +13292,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pb4_SUPPORTS_ORDS \ - 94, + 95, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pb4_EXISTS 1 @@ -13260,8 +13387,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pa7_HASH 9ySc_FfzNbVFq_gNyMsvLe8hJ5txypt3Qc4ns1qj9bo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pa7_ORD 93 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pa7_ORD_STR_SORTABLE 00093 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pa7_ORD 94 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pa7_ORD_STR_SORTABLE 00094 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pa7_REQUIRES_ORDS \ @@ -13269,7 +13396,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pa7_SUPPORTS_ORDS \ - 94, + 95, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pa7_EXISTS 1 @@ -13367,18 +13494,18 @@ #define DT_N_S_soc_S_timers_40000400_S_pwm_HASH 3XEqw4Q0MqUTTpvQ0Yrht2rVkAAPsKyjdgccEVU8gEE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD 94 -#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD_STR_SORTABLE 00094 +#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD 95 +#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD_STR_SORTABLE 00095 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000400_S_pwm_REQUIRES_ORDS \ - 91, \ 92, \ - 93, + 93, \ + 94, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000400_S_pwm_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000400_S_pwm_EXISTS 1 @@ -13521,8 +13648,8 @@ #define DT_N_S_soc_S_timers_40000800_HASH VTBFi6bYiewunKr1vKL59kMmaq2wTI7eroMWbGtK2dw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000800_ORD 95 -#define DT_N_S_soc_S_timers_40000800_ORD_STR_SORTABLE 00095 +#define DT_N_S_soc_S_timers_40000800_ORD 96 +#define DT_N_S_soc_S_timers_40000800_ORD_STR_SORTABLE 00096 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000800_REQUIRES_ORDS \ @@ -13533,7 +13660,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000800_SUPPORTS_ORDS \ - 99, \ + 100, \ 276, /* Existence and alternate IDs: */ @@ -13702,8 +13829,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch2_pd13_HASH n22De5NYg80zG6sn_ijrdN57fOkxyG7brj6V9K2eEO8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch2_pd13_ORD 96 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch2_pd13_ORD_STR_SORTABLE 00096 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch2_pd13_ORD 97 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch2_pd13_ORD_STR_SORTABLE 00097 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch2_pd13_REQUIRES_ORDS \ @@ -13711,7 +13838,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch2_pd13_SUPPORTS_ORDS \ - 99, + 100, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch2_pd13_EXISTS 1 @@ -13806,8 +13933,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch3_pb8_HASH 7iT5pJWlQHLWqPopKn_CEvHNXhIJxpezrrEy9pTfICw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch3_pb8_ORD 97 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch3_pb8_ORD_STR_SORTABLE 00097 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch3_pb8_ORD 98 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch3_pb8_ORD_STR_SORTABLE 00098 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch3_pb8_REQUIRES_ORDS \ @@ -13815,7 +13942,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch3_pb8_SUPPORTS_ORDS \ - 99, + 100, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch3_pb8_EXISTS 1 @@ -13910,8 +14037,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch4_pb9_HASH guWoImoe0aQnxGc3n4k6wzq8PglXiDDKPbfV6AXcpoo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch4_pb9_ORD 98 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch4_pb9_ORD_STR_SORTABLE 00098 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch4_pb9_ORD 99 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch4_pb9_ORD_STR_SORTABLE 00099 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch4_pb9_REQUIRES_ORDS \ @@ -13919,7 +14046,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch4_pb9_SUPPORTS_ORDS \ - 99, + 100, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim4_ch4_pb9_EXISTS 1 @@ -14017,19 +14144,19 @@ #define DT_N_S_soc_S_timers_40000800_S_pwm_HASH rmmRd1gBchFTmlpcPkj2kPN2S9h0o7_bVDPViAglyik /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD 99 -#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD_STR_SORTABLE 00099 +#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD 100 +#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD_STR_SORTABLE 00100 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000800_S_pwm_REQUIRES_ORDS \ - 95, \ 96, \ 97, \ - 98, + 98, \ + 99, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000800_S_pwm_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000800_S_pwm_EXISTS 1 @@ -14180,8 +14307,8 @@ #define DT_N_S_soc_S_timers_40010000_HASH wxcvRN_mA3ySgl7Qy6w43tAOklIzHZ0umwDnKMTErAk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010000_ORD 100 -#define DT_N_S_soc_S_timers_40010000_ORD_STR_SORTABLE 00100 +#define DT_N_S_soc_S_timers_40010000_ORD 101 +#define DT_N_S_soc_S_timers_40010000_ORD_STR_SORTABLE 00101 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40010000_REQUIRES_ORDS \ @@ -14192,7 +14319,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40010000_SUPPORTS_ORDS \ - 103, + 104, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40010000_EXISTS 1 @@ -14435,8 +14562,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pk1_HASH HZegWkUYK69sHQ0eQEm4jNJjd_WoM24N_9y7qOksTSw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pk1_ORD 101 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pk1_ORD_STR_SORTABLE 00101 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pk1_ORD 102 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pk1_ORD_STR_SORTABLE 00102 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pk1_REQUIRES_ORDS \ @@ -14444,7 +14571,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pk1_SUPPORTS_ORDS \ - 103, + 104, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pk1_EXISTS 1 @@ -14539,8 +14666,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_HASH ltiYUTAQGQhGSTUVZpcEz0ch_zsOn9UKAMOnPD9GVEI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_ORD 102 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_ORD_STR_SORTABLE 00102 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_ORD 103 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_ORD_STR_SORTABLE 00103 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_REQUIRES_ORDS \ @@ -14548,7 +14675,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_SUPPORTS_ORDS \ - 103, + 104, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch3_pj9_EXISTS 1 @@ -14646,18 +14773,18 @@ #define DT_N_S_soc_S_timers_40010000_S_pwm_HASH Z55Ao8vxhtP2i2tfz7SNLkdCnBJdzyWWXJ_lALG31Pk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD 103 -#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD_STR_SORTABLE 00103 +#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD 104 +#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD_STR_SORTABLE 00104 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40010000_S_pwm_REQUIRES_ORDS \ - 100, \ 101, \ - 102, + 102, \ + 103, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40010000_S_pwm_SUPPORTS_ORDS \ - 112, \ + 113, \ 293, /* Existence and alternate IDs: */ @@ -14801,8 +14928,8 @@ #define DT_N_S_soc_S_timers_40010400_HASH NPzXzIr4jFBRLlwwLLrw1OQABEA_j6hU6F_PLAZ5J4U /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010400_ORD 104 -#define DT_N_S_soc_S_timers_40010400_ORD_STR_SORTABLE 00104 +#define DT_N_S_soc_S_timers_40010400_ORD 105 +#define DT_N_S_soc_S_timers_40010400_ORD_STR_SORTABLE 00105 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40010400_REQUIRES_ORDS \ @@ -14813,7 +14940,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40010400_SUPPORTS_ORDS \ - 106, + 107, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40010400_EXISTS 1 @@ -15056,8 +15183,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch1_pj8_HASH S3OK_aO1XrFgJUlpaxDbESmj73Wyz3TZSNEldbszLXA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch1_pj8_ORD 105 -#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch1_pj8_ORD_STR_SORTABLE 00105 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch1_pj8_ORD 106 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch1_pj8_ORD_STR_SORTABLE 00106 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch1_pj8_REQUIRES_ORDS \ @@ -15065,7 +15192,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch1_pj8_SUPPORTS_ORDS \ - 106, + 107, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch1_pj8_EXISTS 1 @@ -15163,17 +15290,17 @@ #define DT_N_S_soc_S_timers_40010400_S_pwm_HASH eluEMoLASiCnBNpjXGb0gqHlmoRtkjfjgbVEXs4QAVA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD 106 -#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD_STR_SORTABLE 00106 +#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD 107 +#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD_STR_SORTABLE 00107 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40010400_S_pwm_REQUIRES_ORDS \ - 104, \ - 105, + 105, \ + 106, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40010400_S_pwm_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40010400_S_pwm_EXISTS 1 @@ -15308,8 +15435,8 @@ #define DT_N_S_otghs_fs_phy_HASH o2OMyBwvyxbYltqcvcFLzPkg8jqQm_Azar3MBmQRx1E /* Node's dependency ordinal: */ -#define DT_N_S_otghs_fs_phy_ORD 107 -#define DT_N_S_otghs_fs_phy_ORD_STR_SORTABLE 00107 +#define DT_N_S_otghs_fs_phy_ORD 108 +#define DT_N_S_otghs_fs_phy_ORD_STR_SORTABLE 00108 /* Ordinals for what this node depends on directly: */ #define DT_N_S_otghs_fs_phy_REQUIRES_ORDS \ @@ -15317,8 +15444,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_otghs_fs_phy_SUPPORTS_ORDS \ - 110, \ - 162, + 111, \ + 163, /* Existence and alternate IDs: */ #define DT_N_S_otghs_fs_phy_EXISTS 1 @@ -15403,8 +15530,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_HASH epVEVMiNW99Z_G6X6XtLdfgzqSoiQnsUoY5h2KfHv6Y /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_ORD 108 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_ORD_STR_SORTABLE 00108 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_ORD 109 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_ORD_STR_SORTABLE 00109 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_REQUIRES_ORDS \ @@ -15412,7 +15539,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_SUPPORTS_ORDS \ - 110, + 111, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dm_pa11_EXISTS 1 @@ -15507,8 +15634,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_HASH u5WJkyq42iGNf83aUP3PbT1nX16pmbTnWB0w9bqwMXY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_ORD 109 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_ORD_STR_SORTABLE 00109 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_ORD 110 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_ORD_STR_SORTABLE 00110 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_REQUIRES_ORDS \ @@ -15516,7 +15643,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_SUPPORTS_ORDS \ - 110, + 111, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_fs_dp_pa12_EXISTS 1 @@ -15614,21 +15741,21 @@ #define DT_N_S_soc_S_usb_40080000_HASH xQGu00gNbjCT_OUyCiyF7fOwmsW7_CAqPiYuAkB0nlI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_usb_40080000_ORD 110 -#define DT_N_S_soc_S_usb_40080000_ORD_STR_SORTABLE 00110 +#define DT_N_S_soc_S_usb_40080000_ORD 111 +#define DT_N_S_soc_S_usb_40080000_ORD_STR_SORTABLE 00111 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_usb_40080000_REQUIRES_ORDS \ 4, \ 5, \ 9, \ - 107, \ 108, \ - 109, + 109, \ + 110, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_usb_40080000_SUPPORTS_ORDS \ - 111, + 112, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_usb_40080000_EXISTS 1 @@ -15934,16 +16061,16 @@ #define DT_N_S_soc_S_usb_40080000_S_board_cdc_acm_uart_HASH _wDGsCII7qZ9Bs7w9drmorVdclU99yCzEV_2qsayKpk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_usb_40080000_S_board_cdc_acm_uart_ORD 111 -#define DT_N_S_soc_S_usb_40080000_S_board_cdc_acm_uart_ORD_STR_SORTABLE 00111 +#define DT_N_S_soc_S_usb_40080000_S_board_cdc_acm_uart_ORD 112 +#define DT_N_S_soc_S_usb_40080000_S_board_cdc_acm_uart_ORD_STR_SORTABLE 00112 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_usb_40080000_S_board_cdc_acm_uart_REQUIRES_ORDS \ - 110, + 111, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_usb_40080000_S_board_cdc_acm_uart_SUPPORTS_ORDS \ - 112, + 113, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_usb_40080000_S_board_cdc_acm_uart_EXISTS 1 @@ -16070,8 +16197,8 @@ #define DT_N_S_zephyr_user_HASH yvQw9UuQMLRblNbUC3yeUHnjbtsQjI3bWwAx_c_vELI /* Node's dependency ordinal: */ -#define DT_N_S_zephyr_user_ORD 112 -#define DT_N_S_zephyr_user_ORD_STR_SORTABLE 00112 +#define DT_N_S_zephyr_user_ORD 113 +#define DT_N_S_zephyr_user_ORD_STR_SORTABLE 00113 /* Ordinals for what this node depends on directly: */ #define DT_N_S_zephyr_user_REQUIRES_ORDS \ @@ -16099,12 +16226,13 @@ 84, \ 85, \ 86, \ - 90, \ - 94, \ - 99, \ - 103, \ - 106, \ - 111, + 87, \ + 91, \ + 95, \ + 100, \ + 104, \ + 107, \ + 112, /* Ordinals for what depends directly on this node: */ #define DT_N_S_zephyr_user_SUPPORTS_ORDS @@ -17300,6 +17428,118 @@ fn(DT_N_S_zephyr_user, pwm_pin_gpios, 12, __VA_ARGS__) #define DT_N_S_zephyr_user_P_pwm_pin_gpios_LEN 13 #define DT_N_S_zephyr_user_P_pwm_pin_gpios_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, port_pin_gpios, 0) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 1) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 2) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 3) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 4) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 5) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 6) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 7) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 8) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 9) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 10) +#define DT_N_S_zephyr_user_P_port_pin_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, port_pin_gpios, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 10) +#define DT_N_S_zephyr_user_P_port_pin_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, port_pin_gpios, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 2, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 3, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 4, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 5, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 6, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 7, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 8, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 9, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 10, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_port_pin_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, port_pin_gpios, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 10, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_port_pin_gpios_LEN 11 +#define DT_N_S_zephyr_user_P_port_pin_gpios_EXISTS 1 #define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_0_EXISTS 1 #define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 #define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_0_VAL_pin 4 @@ -17841,8 +18081,8 @@ #define DT_N_S_clocks_S_clk_csi_HASH oJ7lwYm3Ewuv4QlO5OgXDu8dUN7qrBoXCBGWlhAtU9o /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_csi_ORD 113 -#define DT_N_S_clocks_S_clk_csi_ORD_STR_SORTABLE 00113 +#define DT_N_S_clocks_S_clk_csi_ORD 114 +#define DT_N_S_clocks_S_clk_csi_ORD_STR_SORTABLE 00114 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_clk_csi_REQUIRES_ORDS \ @@ -17953,8 +18193,8 @@ #define DT_N_S_clocks_S_clk_hsi_HASH kE6dGnI__HuixEc_o2mPIojHDSoRqqYmExJJycW6WDM /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_hsi_ORD 114 -#define DT_N_S_clocks_S_clk_hsi_ORD_STR_SORTABLE 00114 +#define DT_N_S_clocks_S_clk_hsi_ORD 115 +#define DT_N_S_clocks_S_clk_hsi_ORD_STR_SORTABLE 00115 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_clk_hsi_REQUIRES_ORDS \ @@ -18074,8 +18314,8 @@ #define DT_N_S_clocks_S_clk_hsi48_HASH m4q2NUiXYm_f1RVl9VGtz8iGJxJSrtVw_lCXFQUVjsw /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_hsi48_ORD 115 -#define DT_N_S_clocks_S_clk_hsi48_ORD_STR_SORTABLE 00115 +#define DT_N_S_clocks_S_clk_hsi48_ORD 116 +#define DT_N_S_clocks_S_clk_hsi48_ORD_STR_SORTABLE 00116 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_clk_hsi48_REQUIRES_ORDS \ @@ -18186,8 +18426,8 @@ #define DT_N_S_clocks_S_clk_lse_HASH RRqOX2XdydrKvwOwHO0Kh3mPfPtUsDJrDySCwF316Ek /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_lse_ORD 116 -#define DT_N_S_clocks_S_clk_lse_ORD_STR_SORTABLE 00116 +#define DT_N_S_clocks_S_clk_lse_ORD 117 +#define DT_N_S_clocks_S_clk_lse_ORD_STR_SORTABLE 00117 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_clk_lse_REQUIRES_ORDS \ @@ -18309,8 +18549,8 @@ #define DT_N_S_clocks_S_clk_lsi_HASH y39tlAqwOoFHfznEDn2ZnvWSfYGNtJJvOJBnTUmFguY /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_lsi_ORD 117 -#define DT_N_S_clocks_S_clk_lsi_ORD_STR_SORTABLE 00117 +#define DT_N_S_clocks_S_clk_lsi_ORD 118 +#define DT_N_S_clocks_S_clk_lsi_ORD_STR_SORTABLE 00118 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_clk_lsi_REQUIRES_ORDS \ @@ -18421,8 +18661,8 @@ #define DT_N_S_clocks_S_perck_HASH hm5fMqncFIYWtt_nbIjSrBnSwopKrzSLfFmb5_L71ug /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_perck_ORD 118 -#define DT_N_S_clocks_S_perck_ORD_STR_SORTABLE 00118 +#define DT_N_S_clocks_S_perck_ORD 119 +#define DT_N_S_clocks_S_perck_ORD_STR_SORTABLE 00119 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_perck_REQUIRES_ORDS \ @@ -18529,8 +18769,8 @@ #define DT_N_S_clocks_S_pll_1_HASH JJFzu0SVfVbZ8_LZM_K2_DI2AKbfFanqb4TPxF_LsOk /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_pll_1_ORD 119 -#define DT_N_S_clocks_S_pll_1_ORD_STR_SORTABLE 00119 +#define DT_N_S_clocks_S_pll_1_ORD 120 +#define DT_N_S_clocks_S_pll_1_ORD_STR_SORTABLE 00120 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_pll_1_REQUIRES_ORDS \ @@ -18649,8 +18889,8 @@ #define DT_N_S_clocks_S_pll_2_HASH AyfmMRKSnRfFME3ldy51RFP75itWiDTD8X_Ea_NWS1o /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_pll_2_ORD 120 -#define DT_N_S_clocks_S_pll_2_ORD_STR_SORTABLE 00120 +#define DT_N_S_clocks_S_pll_2_ORD 121 +#define DT_N_S_clocks_S_pll_2_ORD_STR_SORTABLE 00121 /* Ordinals for what this node depends on directly: */ #define DT_N_S_clocks_S_pll_2_REQUIRES_ORDS \ @@ -18782,8 +19022,8 @@ #define DT_N_S_cpus_HASH iL3XRGZVvvtpNJqKV0_jvtuXF7m6kgky4nI2ifizwdg /* Node's dependency ordinal: */ -#define DT_N_S_cpus_ORD 121 -#define DT_N_S_cpus_ORD_STR_SORTABLE 00121 +#define DT_N_S_cpus_ORD 122 +#define DT_N_S_cpus_ORD_STR_SORTABLE 00122 /* Ordinals for what this node depends on directly: */ #define DT_N_S_cpus_REQUIRES_ORDS \ @@ -18791,7 +19031,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_cpus_SUPPORTS_ORDS \ - 122, + 123, /* Existence and alternate IDs: */ #define DT_N_S_cpus_EXISTS 1 @@ -18858,16 +19098,16 @@ #define DT_N_S_cpus_S_cpu_0_HASH Su0JBbOtM0QIxe_1ka2Xvgw4rk1QaIlMIj8Rp_v4yVQ /* Node's dependency ordinal: */ -#define DT_N_S_cpus_S_cpu_0_ORD 122 -#define DT_N_S_cpus_S_cpu_0_ORD_STR_SORTABLE 00122 +#define DT_N_S_cpus_S_cpu_0_ORD 123 +#define DT_N_S_cpus_S_cpu_0_ORD_STR_SORTABLE 00123 /* Ordinals for what this node depends on directly: */ #define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \ - 121, + 122, /* Ordinals for what depends directly on this node: */ #define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS \ - 123, + 124, /* Existence and alternate IDs: */ #define DT_N_S_cpus_S_cpu_0_EXISTS 1 @@ -18965,12 +19205,12 @@ #define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_HASH otj85KLBeEBY12eXojsCVZB1yE6Ww_J1xjGC9_C8_ok /* Node's dependency ordinal: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD 123 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD_STR_SORTABLE 00123 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD 124 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD_STR_SORTABLE 00124 /* Ordinals for what this node depends on directly: */ #define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REQUIRES_ORDS \ - 122, + 123, /* Ordinals for what depends directly on this node: */ #define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_SUPPORTS_ORDS @@ -19074,8 +19314,8 @@ #define DT_N_S_gpio_keys_HASH o_cyM_1oGxkDdZvjWwmF_qWSV_TFQR0RmVqGE69cQ78 /* Node's dependency ordinal: */ -#define DT_N_S_gpio_keys_ORD 124 -#define DT_N_S_gpio_keys_ORD_STR_SORTABLE 00124 +#define DT_N_S_gpio_keys_ORD 125 +#define DT_N_S_gpio_keys_ORD_STR_SORTABLE 00125 /* Ordinals for what this node depends on directly: */ #define DT_N_S_gpio_keys_REQUIRES_ORDS \ @@ -19084,7 +19324,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_gpio_keys_SUPPORTS_ORDS \ - 125, + 126, /* Existence and alternate IDs: */ #define DT_N_S_gpio_keys_EXISTS 1 @@ -19174,13 +19414,13 @@ #define DT_N_S_gpio_keys_S_button_0_HASH C_Hn3JvE9sI_pLDHANZiWQipVdDvQbayAS5TLiYvirs /* Node's dependency ordinal: */ -#define DT_N_S_gpio_keys_S_button_0_ORD 125 -#define DT_N_S_gpio_keys_S_button_0_ORD_STR_SORTABLE 00125 +#define DT_N_S_gpio_keys_S_button_0_ORD 126 +#define DT_N_S_gpio_keys_S_button_0_ORD_STR_SORTABLE 00126 /* Ordinals for what this node depends on directly: */ #define DT_N_S_gpio_keys_S_button_0_REQUIRES_ORDS \ 80, \ - 124, + 125, /* Ordinals for what depends directly on this node: */ #define DT_N_S_gpio_keys_S_button_0_SUPPORTS_ORDS @@ -19266,21 +19506,21 @@ #define DT_N_S_leds_HASH bMroFUocDdjE3kJ38dK18mDvlCOPoyya5kIIs76irj8 /* Node's dependency ordinal: */ -#define DT_N_S_leds_ORD 126 -#define DT_N_S_leds_ORD_STR_SORTABLE 00126 +#define DT_N_S_leds_ORD 127 +#define DT_N_S_leds_ORD_STR_SORTABLE 00127 /* Ordinals for what this node depends on directly: */ #define DT_N_S_leds_REQUIRES_ORDS \ 0, \ 18, \ 82, \ - 85, + 86, /* Ordinals for what depends directly on this node: */ #define DT_N_S_leds_SUPPORTS_ORDS \ - 127, \ 128, \ - 129, + 129, \ + 130, /* Existence and alternate IDs: */ #define DT_N_S_leds_EXISTS 1 @@ -19358,13 +19598,13 @@ #define DT_N_S_leds_S_led_0_HASH kqSZv01Dnr_1hPdmxPVlr9u8kLMk_UWHIyVHG3GknSY /* Node's dependency ordinal: */ -#define DT_N_S_leds_S_led_0_ORD 127 -#define DT_N_S_leds_S_led_0_ORD_STR_SORTABLE 00127 +#define DT_N_S_leds_S_led_0_ORD 128 +#define DT_N_S_leds_S_led_0_ORD_STR_SORTABLE 00128 /* Ordinals for what this node depends on directly: */ #define DT_N_S_leds_S_led_0_REQUIRES_ORDS \ 18, \ - 126, + 127, /* Ordinals for what depends directly on this node: */ #define DT_N_S_leds_S_led_0_SUPPORTS_ORDS @@ -19445,13 +19685,13 @@ #define DT_N_S_leds_S_led_1_HASH iXGpSU4KdWdLNkNXyuDlz5Q9aavHPvjTPItAJ_Q0T5c /* Node's dependency ordinal: */ -#define DT_N_S_leds_S_led_1_ORD 128 -#define DT_N_S_leds_S_led_1_ORD_STR_SORTABLE 00128 +#define DT_N_S_leds_S_led_1_ORD 129 +#define DT_N_S_leds_S_led_1_ORD_STR_SORTABLE 00129 /* Ordinals for what this node depends on directly: */ #define DT_N_S_leds_S_led_1_REQUIRES_ORDS \ - 85, \ - 126, + 86, \ + 127, /* Ordinals for what depends directly on this node: */ #define DT_N_S_leds_S_led_1_SUPPORTS_ORDS @@ -19532,13 +19772,13 @@ #define DT_N_S_leds_S_led_2_HASH KsPGInVliEI1PRs0DmyETNF7dyG4frBo_Z_DeHCKQaA /* Node's dependency ordinal: */ -#define DT_N_S_leds_S_led_2_ORD 129 -#define DT_N_S_leds_S_led_2_ORD_STR_SORTABLE 00129 +#define DT_N_S_leds_S_led_2_ORD 130 +#define DT_N_S_leds_S_led_2_ORD_STR_SORTABLE 00130 /* Ordinals for what this node depends on directly: */ #define DT_N_S_leds_S_led_2_REQUIRES_ORDS \ 82, \ - 126, + 127, /* Ordinals for what depends directly on this node: */ #define DT_N_S_leds_S_led_2_SUPPORTS_ORDS @@ -19615,8 +19855,8 @@ #define DT_N_S_mcos_HASH 6SPQgIfzgP5rJNinRk1zLBq_DlKqwei9gyXlUnsq0Fg /* Node's dependency ordinal: */ -#define DT_N_S_mcos_ORD 130 -#define DT_N_S_mcos_ORD_STR_SORTABLE 00130 +#define DT_N_S_mcos_ORD 131 +#define DT_N_S_mcos_ORD_STR_SORTABLE 00131 /* Ordinals for what this node depends on directly: */ #define DT_N_S_mcos_REQUIRES_ORDS \ @@ -19624,8 +19864,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_mcos_SUPPORTS_ORDS \ - 131, \ - 132, + 132, \ + 133, /* Existence and alternate IDs: */ #define DT_N_S_mcos_EXISTS 1 @@ -19692,12 +19932,12 @@ #define DT_N_S_mcos_S_mco1_HASH fXW21upYnb1ZV4bEuBvKCXEcbrABE4XfjXq4dwS7rfY /* Node's dependency ordinal: */ -#define DT_N_S_mcos_S_mco1_ORD 131 -#define DT_N_S_mcos_S_mco1_ORD_STR_SORTABLE 00131 +#define DT_N_S_mcos_S_mco1_ORD 132 +#define DT_N_S_mcos_S_mco1_ORD_STR_SORTABLE 00132 /* Ordinals for what this node depends on directly: */ #define DT_N_S_mcos_S_mco1_REQUIRES_ORDS \ - 130, + 131, /* Ordinals for what depends directly on this node: */ #define DT_N_S_mcos_S_mco1_SUPPORTS_ORDS @@ -19806,12 +20046,12 @@ #define DT_N_S_mcos_S_mco2_HASH irDa5qZM1apmLNBL8AyfbwMybA8MLSxOkE_OVqE7xC0 /* Node's dependency ordinal: */ -#define DT_N_S_mcos_S_mco2_ORD 132 -#define DT_N_S_mcos_S_mco2_ORD_STR_SORTABLE 00132 +#define DT_N_S_mcos_S_mco2_ORD 133 +#define DT_N_S_mcos_S_mco2_ORD_STR_SORTABLE 00133 /* Ordinals for what this node depends on directly: */ #define DT_N_S_mcos_S_mco2_REQUIRES_ORDS \ - 130, + 131, /* Ordinals for what depends directly on this node: */ #define DT_N_S_mcos_S_mco2_SUPPORTS_ORDS @@ -19920,8 +20160,8 @@ #define DT_N_S_soc_S_adc_40022100_HASH 4U_WPGl_W8gUvDeIA3SWcWP6hyywf4KlEJf4J6Sx3cA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022100_ORD 133 -#define DT_N_S_soc_S_adc_40022100_ORD_STR_SORTABLE 00133 +#define DT_N_S_soc_S_adc_40022100_ORD 134 +#define DT_N_S_soc_S_adc_40022100_ORD_STR_SORTABLE 00134 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022100_REQUIRES_ORDS \ @@ -20184,8 +20424,8 @@ #define DT_N_S_soc_S_adc_40022300_HASH uJa5ETN902l5AFBbkdof9dPJZqWcKf230NUbZ1RNIcQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022300_ORD 134 -#define DT_N_S_soc_S_adc_40022300_ORD_STR_SORTABLE 00134 +#define DT_N_S_soc_S_adc_40022300_ORD 135 +#define DT_N_S_soc_S_adc_40022300_ORD_STR_SORTABLE 00135 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022300_REQUIRES_ORDS \ @@ -20448,8 +20688,8 @@ #define DT_N_S_soc_S_bdma_58025400_HASH CjYBCqMxXd_gr1XwlMz6FF_xG49H_J_bChPdE2Gfpho /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_bdma_58025400_ORD 135 -#define DT_N_S_soc_S_bdma_58025400_ORD_STR_SORTABLE 00135 +#define DT_N_S_soc_S_bdma_58025400_ORD 136 +#define DT_N_S_soc_S_bdma_58025400_ORD_STR_SORTABLE 00136 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_bdma_58025400_REQUIRES_ORDS \ @@ -20681,8 +20921,8 @@ #define DT_N_S_soc_S_can_4000a000_HASH TsK756J4DWV6zgqgumE5kpKPrY0072I51EHPTR1BuJY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_can_4000a000_ORD 136 -#define DT_N_S_soc_S_can_4000a000_ORD_STR_SORTABLE 00136 +#define DT_N_S_soc_S_can_4000a000_ORD 137 +#define DT_N_S_soc_S_can_4000a000_ORD_STR_SORTABLE 00137 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_can_4000a000_REQUIRES_ORDS \ @@ -20980,8 +21220,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_HASH 1lN_jiA5lpVPhdf2_pBmUucSxX7C2RJrQ_RhmdPpjSc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_ORD 137 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_ORD_STR_SORTABLE 00137 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_ORD 138 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_ORD_STR_SORTABLE 00138 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_REQUIRES_ORDS \ @@ -20989,7 +21229,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_SUPPORTS_ORDS \ - 139, + 140, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_rx_pb5_EXISTS 1 @@ -21084,8 +21324,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_HASH bkDDxIyVe6GMNvCdfjzQH9u_M1cqY3kcGdBgHysRzjc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_ORD 138 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_ORD_STR_SORTABLE 00138 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_ORD 139 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_ORD_STR_SORTABLE 00139 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_REQUIRES_ORDS \ @@ -21093,7 +21333,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_SUPPORTS_ORDS \ - 139, + 140, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fdcan2_tx_pb13_EXISTS 1 @@ -21191,16 +21431,16 @@ #define DT_N_S_soc_S_can_4000a400_HASH Q1IbQlnHfEuftKrxSDFmeo78_BpvDy4fAq8XaGQMjbk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_can_4000a400_ORD 139 -#define DT_N_S_soc_S_can_4000a400_ORD_STR_SORTABLE 00139 +#define DT_N_S_soc_S_can_4000a400_ORD 140 +#define DT_N_S_soc_S_can_4000a400_ORD_STR_SORTABLE 00140 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_can_4000a400_REQUIRES_ORDS \ 4, \ 5, \ 9, \ - 137, \ - 138, + 138, \ + 139, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_can_4000a400_SUPPORTS_ORDS @@ -21540,8 +21780,8 @@ #define DT_N_S_soc_S_dma_40020400_HASH 6M2mn87tCKiqdKtfbifYbjloijPkEmcQ0zczmKi97Y8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dma_40020400_ORD 140 -#define DT_N_S_soc_S_dma_40020400_ORD_STR_SORTABLE 00140 +#define DT_N_S_soc_S_dma_40020400_ORD 141 +#define DT_N_S_soc_S_dma_40020400_ORD_STR_SORTABLE 00141 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dma_40020400_REQUIRES_ORDS \ @@ -21773,8 +22013,8 @@ #define DT_N_S_soc_S_dmamux_58025800_HASH pg_1B26nWuXjkKWIFyRWCHAy6Gu9COK4z_cOdOQhvVs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dmamux_58025800_ORD 141 -#define DT_N_S_soc_S_dmamux_58025800_ORD_STR_SORTABLE 00141 +#define DT_N_S_soc_S_dmamux_58025800_ORD 142 +#define DT_N_S_soc_S_dmamux_58025800_ORD_STR_SORTABLE 00142 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dmamux_58025800_REQUIRES_ORDS \ @@ -21929,8 +22169,8 @@ #define DT_N_S_soc_S_dmamux_40020800_HASH jGulMrGrDMjffC0jOcX9YAYtoaIaoNYHlAm2EvPJs_w /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dmamux_40020800_ORD 142 -#define DT_N_S_soc_S_dmamux_40020800_ORD_STR_SORTABLE 00142 +#define DT_N_S_soc_S_dmamux_40020800_ORD 143 +#define DT_N_S_soc_S_dmamux_40020800_ORD_STR_SORTABLE 00143 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dmamux_40020800_REQUIRES_ORDS \ @@ -21940,9 +22180,9 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dmamux_40020800_SUPPORTS_ORDS \ - 143, \ 144, \ - 145, + 145, \ + 146, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dmamux_40020800_EXISTS 1 @@ -22088,15 +22328,15 @@ #define DT_N_S_soc_S_i2s_40003800_HASH cv1l7gk621LLT8KlSAOD4ESjUxFIqs_KOzY0gVU3ofE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2s_40003800_ORD 143 -#define DT_N_S_soc_S_i2s_40003800_ORD_STR_SORTABLE 00143 +#define DT_N_S_soc_S_i2s_40003800_ORD 144 +#define DT_N_S_soc_S_i2s_40003800_ORD_STR_SORTABLE 00144 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2s_40003800_REQUIRES_ORDS \ 4, \ 5, \ 9, \ - 142, + 143, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2s_40003800_SUPPORTS_ORDS @@ -22331,15 +22571,15 @@ #define DT_N_S_soc_S_i2s_40003c00_HASH cqu_NshQmISUpdQ_NZoLP2K_y7VkySXvopc7dRz2dUs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2s_40003c00_ORD 144 -#define DT_N_S_soc_S_i2s_40003c00_ORD_STR_SORTABLE 00144 +#define DT_N_S_soc_S_i2s_40003c00_ORD 145 +#define DT_N_S_soc_S_i2s_40003c00_ORD_STR_SORTABLE 00145 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2s_40003c00_REQUIRES_ORDS \ 4, \ 5, \ 9, \ - 142, + 143, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2s_40003c00_SUPPORTS_ORDS @@ -22574,15 +22814,15 @@ #define DT_N_S_soc_S_i2s_40013000_HASH AR40g4B08gpzWiZgw_CMbPN4L_FZHfvTMNyO8ZIF16c /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2s_40013000_ORD 145 -#define DT_N_S_soc_S_i2s_40013000_ORD_STR_SORTABLE 00145 +#define DT_N_S_soc_S_i2s_40013000_ORD 146 +#define DT_N_S_soc_S_i2s_40013000_ORD_STR_SORTABLE 00146 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2s_40013000_REQUIRES_ORDS \ 4, \ 5, \ 9, \ - 142, + 143, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2s_40013000_SUPPORTS_ORDS @@ -22817,8 +23057,8 @@ #define DT_N_S_soc_S_interrupt_controller_58000000_HASH uKGVm3rbaNzVd0m0zI0AR1_ddgP1_VnC7GQGtMH0Ldw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_ORD 146 -#define DT_N_S_soc_S_interrupt_controller_58000000_ORD_STR_SORTABLE 00146 +#define DT_N_S_soc_S_interrupt_controller_58000000_ORD 147 +#define DT_N_S_soc_S_interrupt_controller_58000000_ORD_STR_SORTABLE 00147 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_interrupt_controller_58000000_REQUIRES_ORDS \ @@ -23198,8 +23438,8 @@ #define DT_N_S_soc_S_mailbox_58026400_HASH EEDMy4UODFDtNiLV6t2seBZKwHkM1Q95e5cssXQ3UK8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_mailbox_58026400_ORD 147 -#define DT_N_S_soc_S_mailbox_58026400_ORD_STR_SORTABLE 00147 +#define DT_N_S_soc_S_mailbox_58026400_ORD 148 +#define DT_N_S_soc_S_mailbox_58026400_ORD_STR_SORTABLE 00148 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_mailbox_58026400_REQUIRES_ORDS \ @@ -23363,8 +23603,8 @@ #define DT_N_S_soc_S_memory_38800000_HASH 7ck7jfzNr5JUKTE_fCwfei7NH6M14LTAgkyNzLdnGfI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_38800000_ORD 148 -#define DT_N_S_soc_S_memory_38800000_ORD_STR_SORTABLE 00148 +#define DT_N_S_soc_S_memory_38800000_ORD 149 +#define DT_N_S_soc_S_memory_38800000_ORD_STR_SORTABLE 00149 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_memory_38800000_REQUIRES_ORDS \ @@ -23526,8 +23766,8 @@ #define DT_N_S_soc_S_rng_48021800_HASH d6ka_Yk2ooJ3ol3sggiQatxqiRRZ8bDVPl803XX9V_c /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_rng_48021800_ORD 149 -#define DT_N_S_soc_S_rng_48021800_ORD_STR_SORTABLE 00149 +#define DT_N_S_soc_S_rng_48021800_ORD 150 +#define DT_N_S_soc_S_rng_48021800_ORD_STR_SORTABLE 00150 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_rng_48021800_REQUIRES_ORDS \ @@ -23676,8 +23916,8 @@ #define DT_N_S_soc_S_sdmmc_48022400_HASH FWnL4SsgC4pr3AW8TfPSyMj0yDgmJe1JK1TAHxSEFW4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_sdmmc_48022400_ORD 150 -#define DT_N_S_soc_S_sdmmc_48022400_ORD_STR_SORTABLE 00150 +#define DT_N_S_soc_S_sdmmc_48022400_ORD 151 +#define DT_N_S_soc_S_sdmmc_48022400_ORD_STR_SORTABLE 00151 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_sdmmc_48022400_REQUIRES_ORDS \ @@ -23856,8 +24096,8 @@ #define DT_N_S_soc_S_sdmmc_52007000_HASH HXN7xrSSBp_XQOyNK8_mK6qh2s7oq_z3h5ashoyXhJ4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_sdmmc_52007000_ORD 151 -#define DT_N_S_soc_S_sdmmc_52007000_ORD_STR_SORTABLE 00151 +#define DT_N_S_soc_S_sdmmc_52007000_ORD 152 +#define DT_N_S_soc_S_sdmmc_52007000_ORD_STR_SORTABLE 00152 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_sdmmc_52007000_REQUIRES_ORDS \ @@ -24036,8 +24276,8 @@ #define DT_N_S_soc_S_serial_40004800_HASH zEiuovs75QHyumn1pL5rvTd5x6H1bdnak278L4bYuj0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40004800_ORD 152 -#define DT_N_S_soc_S_serial_40004800_ORD_STR_SORTABLE 00152 +#define DT_N_S_soc_S_serial_40004800_ORD 153 +#define DT_N_S_soc_S_serial_40004800_ORD_STR_SORTABLE 00153 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40004800_REQUIRES_ORDS \ @@ -24267,8 +24507,8 @@ #define DT_N_S_soc_S_serial_40005000_HASH zMMX5P6gmfqIczU7IzsjM4mPclQdCNjtpO0LqCzLhTI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40005000_ORD 153 -#define DT_N_S_soc_S_serial_40005000_ORD_STR_SORTABLE 00153 +#define DT_N_S_soc_S_serial_40005000_ORD 154 +#define DT_N_S_soc_S_serial_40005000_ORD_STR_SORTABLE 00154 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40005000_REQUIRES_ORDS \ @@ -24483,8 +24723,8 @@ #define DT_N_S_soc_S_serial_40007c00_HASH X_JkTKIJdI0eAWONgmNDDiIT_A1U0dqJMPoCmX7VfRo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40007c00_ORD 154 -#define DT_N_S_soc_S_serial_40007c00_ORD_STR_SORTABLE 00154 +#define DT_N_S_soc_S_serial_40007c00_ORD 155 +#define DT_N_S_soc_S_serial_40007c00_ORD_STR_SORTABLE 00155 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40007c00_REQUIRES_ORDS \ @@ -24699,8 +24939,8 @@ #define DT_N_S_soc_S_serial_58000c00_HASH ISescP3TKthYjEyAx79J9A1f_7TwIXBCVXALkWoe12E /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_58000c00_ORD 155 -#define DT_N_S_soc_S_serial_58000c00_ORD_STR_SORTABLE 00155 +#define DT_N_S_soc_S_serial_58000c00_ORD 156 +#define DT_N_S_soc_S_serial_58000c00_ORD_STR_SORTABLE 00156 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_58000c00_REQUIRES_ORDS \ @@ -24930,8 +25170,8 @@ #define DT_N_S_soc_S_spi_40003800_HASH XKwnj_54XNd9o8CRTIG33G9j_T58zD9aWx_JOqtlec4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40003800_ORD 156 -#define DT_N_S_soc_S_spi_40003800_ORD_STR_SORTABLE 00156 +#define DT_N_S_soc_S_spi_40003800_ORD 157 +#define DT_N_S_soc_S_spi_40003800_ORD_STR_SORTABLE 00157 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_40003800_REQUIRES_ORDS \ @@ -25126,8 +25366,8 @@ #define DT_N_S_soc_S_spi_40003c00_HASH 2ZRlHGHWIr4tSgRVkDzDHSiC22m9C4PVNAuFo8LU_0A /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40003c00_ORD 157 -#define DT_N_S_soc_S_spi_40003c00_ORD_STR_SORTABLE 00157 +#define DT_N_S_soc_S_spi_40003c00_ORD 158 +#define DT_N_S_soc_S_spi_40003c00_ORD_STR_SORTABLE 00158 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_40003c00_REQUIRES_ORDS \ @@ -25322,8 +25562,8 @@ #define DT_N_S_soc_S_spi_40013400_HASH _gq_GFzBL2BriiF_xUBpw3VzRXUfex3S_XMm3qRcPgU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40013400_ORD 158 -#define DT_N_S_soc_S_spi_40013400_ORD_STR_SORTABLE 00158 +#define DT_N_S_soc_S_spi_40013400_ORD 159 +#define DT_N_S_soc_S_spi_40013400_ORD_STR_SORTABLE 00159 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_40013400_REQUIRES_ORDS \ @@ -25508,8 +25748,8 @@ #define DT_N_S_soc_S_spi_58001400_HASH MQ8Y8eusUQ_m2SL3yzoNAgkoH4u83k1uJWprWbvoQw0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_58001400_ORD 159 -#define DT_N_S_soc_S_spi_58001400_ORD_STR_SORTABLE 00159 +#define DT_N_S_soc_S_spi_58001400_ORD 160 +#define DT_N_S_soc_S_spi_58001400_ORD_STR_SORTABLE 00160 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_58001400_REQUIRES_ORDS \ @@ -25694,8 +25934,8 @@ #define DT_N_S_soc_S_timer_e000e010_HASH aZrzPLAIRgEwRZJIvTCzJONA6gPgc4QlhkiU5oWGArA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timer_e000e010_ORD 160 -#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00160 +#define DT_N_S_soc_S_timer_e000e010_ORD 161 +#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00161 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \ @@ -25803,8 +26043,8 @@ #define DT_N_S_soc_S_timers_40002400_HASH osDElrar1XoqhN_VHTBp2BrAfP_cC1w6IcXhOPWwP8E /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40002400_ORD 161 -#define DT_N_S_soc_S_timers_40002400_ORD_STR_SORTABLE 00161 +#define DT_N_S_soc_S_timers_40002400_ORD 162 +#define DT_N_S_soc_S_timers_40002400_ORD_STR_SORTABLE 00162 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40002400_REQUIRES_ORDS \ @@ -25975,15 +26215,15 @@ #define DT_N_S_soc_S_usb_40040000_HASH hQX5a6h4YrwYkjEZ67iF2XLzK046iAbBlHG3GB49DxM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_usb_40040000_ORD 162 -#define DT_N_S_soc_S_usb_40040000_ORD_STR_SORTABLE 00162 +#define DT_N_S_soc_S_usb_40040000_ORD 163 +#define DT_N_S_soc_S_usb_40040000_ORD_STR_SORTABLE 00163 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_usb_40040000_REQUIRES_ORDS \ 4, \ 5, \ 9, \ - 107, + 108, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_usb_40040000_SUPPORTS_ORDS @@ -26256,8 +26496,8 @@ #define DT_N_S_soc_S_watchdog_50003000_HASH h6NwKkuA2dqrATUehpYE_fmTSXYsEpA87_DH2Xd1Ie8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_watchdog_50003000_ORD 163 -#define DT_N_S_soc_S_watchdog_50003000_ORD_STR_SORTABLE 00163 +#define DT_N_S_soc_S_watchdog_50003000_ORD 164 +#define DT_N_S_soc_S_watchdog_50003000_ORD_STR_SORTABLE 00164 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_watchdog_50003000_REQUIRES_ORDS \ @@ -26407,8 +26647,8 @@ #define DT_N_S_soc_S_watchdog_58004800_HASH hmuLGnCZ0GRUbiqizyisLpZoBY0jIIGA5bKix63nTGY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_watchdog_58004800_ORD 164 -#define DT_N_S_soc_S_watchdog_58004800_ORD_STR_SORTABLE 00164 +#define DT_N_S_soc_S_watchdog_58004800_ORD 165 +#define DT_N_S_soc_S_watchdog_58004800_ORD_STR_SORTABLE 00165 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_watchdog_58004800_REQUIRES_ORDS \ @@ -26528,8 +26768,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_0_HASH PJJSNRXcN3GbrGs1wmylaq2kC9vWycnum1vMNckvf_M /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_0_ORD 165 -#define DT_N_S_soc_S_adc_40022000_S_channel_0_ORD_STR_SORTABLE 00165 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_ORD 166 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_ORD_STR_SORTABLE 00166 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_0_REQUIRES_ORDS \ @@ -26640,8 +26880,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_1_HASH 265ZdJS_q4RHg6Q2AsRDqB_HgIppHi9gtfY_8NZUtVo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_1_ORD 166 -#define DT_N_S_soc_S_adc_40022000_S_channel_1_ORD_STR_SORTABLE 00166 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_ORD 167 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_ORD_STR_SORTABLE 00167 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_1_REQUIRES_ORDS \ @@ -26752,8 +26992,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_4_HASH GB0oeKd4Fnu_e6pzfbT8e8QWecICVYBipdDRV2eM14c /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_4_ORD 167 -#define DT_N_S_soc_S_adc_40022000_S_channel_4_ORD_STR_SORTABLE 00167 +#define DT_N_S_soc_S_adc_40022000_S_channel_4_ORD 168 +#define DT_N_S_soc_S_adc_40022000_S_channel_4_ORD_STR_SORTABLE 00168 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_4_REQUIRES_ORDS \ @@ -26864,8 +27104,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_5_HASH 71vE3_Gtcd8v5AZOnWwCMJiZpJ801ipuha7OXcdX54o /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_5_ORD 168 -#define DT_N_S_soc_S_adc_40022000_S_channel_5_ORD_STR_SORTABLE 00168 +#define DT_N_S_soc_S_adc_40022000_S_channel_5_ORD 169 +#define DT_N_S_soc_S_adc_40022000_S_channel_5_ORD_STR_SORTABLE 00169 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_5_REQUIRES_ORDS \ @@ -26976,8 +27216,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_8_HASH hiQmjdSUVF5t14lIgMo4jyNxCxZZol_MyDM3NjbJ_h4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_8_ORD 169 -#define DT_N_S_soc_S_adc_40022000_S_channel_8_ORD_STR_SORTABLE 00169 +#define DT_N_S_soc_S_adc_40022000_S_channel_8_ORD 170 +#define DT_N_S_soc_S_adc_40022000_S_channel_8_ORD_STR_SORTABLE 00170 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_8_REQUIRES_ORDS \ @@ -27088,8 +27328,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_9_HASH 5Kja7D__51kzGPkUgyk217zWz6x9Rlb_tMyBw905KH4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_9_ORD 170 -#define DT_N_S_soc_S_adc_40022000_S_channel_9_ORD_STR_SORTABLE 00170 +#define DT_N_S_soc_S_adc_40022000_S_channel_9_ORD 171 +#define DT_N_S_soc_S_adc_40022000_S_channel_9_ORD_STR_SORTABLE 00171 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_9_REQUIRES_ORDS \ @@ -27200,8 +27440,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_a_HASH 5knJnI0nb8JCh4xUQi2nIOEOxl_2AGZbM3yL8FpnJEk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_a_ORD 171 -#define DT_N_S_soc_S_adc_40022000_S_channel_a_ORD_STR_SORTABLE 00171 +#define DT_N_S_soc_S_adc_40022000_S_channel_a_ORD 172 +#define DT_N_S_soc_S_adc_40022000_S_channel_a_ORD_STR_SORTABLE 00172 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_a_REQUIRES_ORDS \ @@ -27312,8 +27552,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_c_HASH FQWfAB2Ul0prTNWsOB1z1BzzPDdf7FKP9p8SQ69b3IU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_c_ORD 172 -#define DT_N_S_soc_S_adc_40022000_S_channel_c_ORD_STR_SORTABLE 00172 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_ORD 173 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_ORD_STR_SORTABLE 00173 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_c_REQUIRES_ORDS \ @@ -27424,8 +27664,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_d_HASH A4aPb6yz_4p5zaV3PzK_Hhx05yBz3OeQXVnSRHO2ATA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_d_ORD 173 -#define DT_N_S_soc_S_adc_40022000_S_channel_d_ORD_STR_SORTABLE 00173 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_ORD 174 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_ORD_STR_SORTABLE 00174 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_d_REQUIRES_ORDS \ @@ -27536,8 +27776,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_10_HASH kN0rXaUkIHC4ID04EC_y9Rgp8dgGmwqEri6Ph1UawVM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_10_ORD 174 -#define DT_N_S_soc_S_adc_40022000_S_channel_10_ORD_STR_SORTABLE 00174 +#define DT_N_S_soc_S_adc_40022000_S_channel_10_ORD 175 +#define DT_N_S_soc_S_adc_40022000_S_channel_10_ORD_STR_SORTABLE 00175 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_10_REQUIRES_ORDS \ @@ -27648,8 +27888,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_12_HASH n5zCIOQ_ToUlnL73iWLC7uwzLQ_xo3eEIrodZvMvydk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_12_ORD 175 -#define DT_N_S_soc_S_adc_40022000_S_channel_12_ORD_STR_SORTABLE 00175 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_ORD 176 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_ORD_STR_SORTABLE 00176 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_12_REQUIRES_ORDS \ @@ -27760,8 +28000,8 @@ #define DT_N_S_soc_S_adc_40022000_S_channel_13_HASH 8d_PVqeIuFIkLPQHtaL5rD5xCXSxe9uKozoiZbrCZ_w /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_S_channel_13_ORD 176 -#define DT_N_S_soc_S_adc_40022000_S_channel_13_ORD_STR_SORTABLE 00176 +#define DT_N_S_soc_S_adc_40022000_S_channel_13_ORD 177 +#define DT_N_S_soc_S_adc_40022000_S_channel_13_ORD_STR_SORTABLE 00177 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_40022000_S_channel_13_REQUIRES_ORDS \ @@ -27872,8 +28112,8 @@ #define DT_N_S_soc_S_adc_58026000_S_channel_0_HASH fOoa7nNsSBUt39vexJwhirseVYjKRYt2ql9DwUh0ct4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_58026000_S_channel_0_ORD 177 -#define DT_N_S_soc_S_adc_58026000_S_channel_0_ORD_STR_SORTABLE 00177 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_ORD 178 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_ORD_STR_SORTABLE 00178 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_58026000_S_channel_0_REQUIRES_ORDS \ @@ -27984,8 +28224,8 @@ #define DT_N_S_soc_S_adc_58026000_S_channel_1_HASH HHZXnq9rNXs4qGr9F8Vr_E6Xy8zccZkteykPUpteOg0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_58026000_S_channel_1_ORD 178 -#define DT_N_S_soc_S_adc_58026000_S_channel_1_ORD_STR_SORTABLE 00178 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_ORD 179 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_ORD_STR_SORTABLE 00179 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_58026000_S_channel_1_REQUIRES_ORDS \ @@ -28099,8 +28339,8 @@ #define DT_N_S_soc_S_dma_40020000_HASH wrD_czGB0R3hBC1Od9iGdfNbQ3BZqmarPsJAc4MBFAs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dma_40020000_ORD 179 -#define DT_N_S_soc_S_dma_40020000_ORD_STR_SORTABLE 00179 +#define DT_N_S_soc_S_dma_40020000_ORD 180 +#define DT_N_S_soc_S_dma_40020000_ORD_STR_SORTABLE 00180 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dma_40020000_REQUIRES_ORDS \ @@ -28110,7 +28350,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dma_40020000_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dma_40020000_EXISTS 1 @@ -28333,8 +28573,8 @@ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_HASH WTzWxYsSa97mKVBjRyEYzpQ1Z70qcI_JIND0Qr5WBOQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_ORD 180 -#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_ORD_STR_SORTABLE 00180 +#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_ORD 181 +#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_ORD_STR_SORTABLE 00181 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_REQUIRES_ORDS \ @@ -28344,8 +28584,8 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_SUPPORTS_ORDS \ - 192, \ - 209, + 193, \ + 210, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_EXISTS 1 @@ -28468,8 +28708,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_HASH viqFawzx6vEf2SqKkj9mhPeH_3odOekLRTY28iDj7Gg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_ORD 181 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_ORD_STR_SORTABLE 00181 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_ORD 182 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_ORD_STR_SORTABLE 00182 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_REQUIRES_ORDS \ @@ -28477,7 +28717,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_EXISTS 1 @@ -28572,8 +28812,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_HASH us1sYEwlee8_e6DQZuygCdkVONGThdr8xQyAYVCVmkA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_ORD 182 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_ORD_STR_SORTABLE 00182 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_ORD 183 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_ORD_STR_SORTABLE 00183 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_REQUIRES_ORDS \ @@ -28581,7 +28821,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_EXISTS 1 @@ -28676,8 +28916,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_HASH N6Hlm4eOaW_Fb82gwXs9ogvFEw4zt_HzAo7bKjPxif4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_ORD 183 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_ORD_STR_SORTABLE 00183 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_ORD 184 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_ORD_STR_SORTABLE 00184 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_REQUIRES_ORDS \ @@ -28685,7 +28925,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_EXISTS 1 @@ -28780,8 +29020,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_HASH PUbC5FeTTVmHxprz_XAEs676embB4JURmTYHQQ2YM3g /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_ORD 184 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_ORD_STR_SORTABLE 00184 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_ORD 185 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_ORD_STR_SORTABLE 00185 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_REQUIRES_ORDS \ @@ -28789,7 +29029,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_pg11_EXISTS 1 @@ -28884,8 +29124,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_HASH 0umVcTpJBfHaKKZYd7PsUDU1Ja5n_LlsGKocPLbWILQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_ORD 185 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_ORD_STR_SORTABLE 00185 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_ORD 186 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_ORD_STR_SORTABLE 00186 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_REQUIRES_ORDS \ @@ -28893,7 +29133,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_EXISTS 1 @@ -28988,8 +29228,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_HASH F4eIoMP9AaFc1hbqrMr7CaWRkku0Xsl1I_MtlkJAPog /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_ORD 186 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_ORD_STR_SORTABLE 00186 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_ORD 187 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_ORD_STR_SORTABLE 00187 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_REQUIRES_ORDS \ @@ -28997,7 +29237,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_EXISTS 1 @@ -29092,8 +29332,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_HASH 4cUbjhg45_FZoAGdycnf2_D3eBV5igjPFbZxkBoxRUU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_ORD 187 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_ORD_STR_SORTABLE 00187 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_ORD 188 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_ORD_STR_SORTABLE 00188 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_REQUIRES_ORDS \ @@ -29101,7 +29341,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_EXISTS 1 @@ -29196,8 +29436,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_HASH kapieOJTeUS132eSWwuE_kTDdo1nfMo5icj1X6EKixU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_ORD 188 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_ORD_STR_SORTABLE 00188 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_ORD 189 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_ORD_STR_SORTABLE 00189 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_REQUIRES_ORDS \ @@ -29205,7 +29445,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_EXISTS 1 @@ -29300,8 +29540,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_HASH 815GnLdNG36CivAdUCaNqFNe7Xe3Ys1KoC8byfNe7PM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_ORD 189 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_ORD_STR_SORTABLE 00189 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_ORD 190 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_ORD_STR_SORTABLE 00190 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_REQUIRES_ORDS \ @@ -29309,7 +29549,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_ph8_EXISTS 1 @@ -29404,8 +29644,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_HASH mVi4YyOotcK1r2Fe2vvCwx71UuzWlve2s0gSPxBbdrY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_ORD 190 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_ORD_STR_SORTABLE 00190 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_ORD 191 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_ORD_STR_SORTABLE 00191 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_REQUIRES_ORDS \ @@ -29413,7 +29653,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_EXISTS 1 @@ -29508,8 +29748,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_HASH 33sSwDavP9e2cqB9QXNLD4BvqG2MPRYyxCXxJbTdC1I /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_ORD 191 -#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_ORD_STR_SORTABLE 00191 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_ORD 192 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_ORD_STR_SORTABLE 00192 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_REQUIRES_ORDS \ @@ -29517,7 +29757,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_SUPPORTS_ORDS \ - 192, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_EXISTS 1 @@ -29615,15 +29855,14 @@ #define DT_N_S_soc_S_dcmi_48020000_HASH AKyVuuDdy0BqNKfdyf9nqyXlgLq6PAMDsyCrGlq8t7w /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dcmi_48020000_ORD 192 -#define DT_N_S_soc_S_dcmi_48020000_ORD_STR_SORTABLE 00192 +#define DT_N_S_soc_S_dcmi_48020000_ORD 193 +#define DT_N_S_soc_S_dcmi_48020000_ORD_STR_SORTABLE 00193 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dcmi_48020000_REQUIRES_ORDS \ 4, \ 5, \ 9, \ - 179, \ 180, \ 181, \ 182, \ @@ -29635,11 +29874,12 @@ 188, \ 189, \ 190, \ - 191, + 191, \ + 192, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dcmi_48020000_SUPPORTS_ORDS \ - 193, + 194, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dcmi_48020000_EXISTS 1 @@ -29948,16 +30188,16 @@ #define DT_N_S_soc_S_dcmi_48020000_S_port_HASH FtRDZGuTtDnSxAKoDtjT4I75ptLd4ass4VeNz58HkcM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dcmi_48020000_S_port_ORD 193 -#define DT_N_S_soc_S_dcmi_48020000_S_port_ORD_STR_SORTABLE 00193 +#define DT_N_S_soc_S_dcmi_48020000_S_port_ORD 194 +#define DT_N_S_soc_S_dcmi_48020000_S_port_ORD_STR_SORTABLE 00194 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dcmi_48020000_S_port_REQUIRES_ORDS \ - 192, + 193, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dcmi_48020000_S_port_SUPPORTS_ORDS \ - 194, + 195, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dcmi_48020000_S_port_EXISTS 1 @@ -30018,12 +30258,12 @@ #define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_HASH yuA5OY7iwp3Pv_2NaRHhdPf_h2iVwx8JUWStpl69F2Y /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_ORD 194 -#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_ORD_STR_SORTABLE 00194 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_ORD 195 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_ORD_STR_SORTABLE 00195 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_REQUIRES_ORDS \ - 193, + 194, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_SUPPORTS_ORDS @@ -30094,8 +30334,8 @@ #define DT_N_S_sdram_c0000000_HASH Q8y1srcTUfxHdQNh67OGtOv8bm1G6WdApGEnH03RxG4 /* Node's dependency ordinal: */ -#define DT_N_S_sdram_c0000000_ORD 195 -#define DT_N_S_sdram_c0000000_ORD_STR_SORTABLE 00195 +#define DT_N_S_sdram_c0000000_ORD 196 +#define DT_N_S_sdram_c0000000_ORD_STR_SORTABLE 00196 /* Ordinals for what this node depends on directly: */ #define DT_N_S_sdram_c0000000_REQUIRES_ORDS \ @@ -30103,7 +30343,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_sdram_c0000000_SUPPORTS_ORDS \ - 196, + 197, /* Existence and alternate IDs: */ #define DT_N_S_sdram_c0000000_EXISTS 1 @@ -30229,8 +30469,8 @@ #define DT_N_S_soc_S_display_controller_50001000_HASH tuXl2nvZTwFr218jjkJLXjZw_0Wn_Svv7iOXFbTuRjo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_display_controller_50001000_ORD 196 -#define DT_N_S_soc_S_display_controller_50001000_ORD_STR_SORTABLE 00196 +#define DT_N_S_soc_S_display_controller_50001000_ORD 197 +#define DT_N_S_soc_S_display_controller_50001000_ORD_STR_SORTABLE 00197 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_display_controller_50001000_REQUIRES_ORDS \ @@ -30240,11 +30480,11 @@ 59, \ 79, \ 80, \ - 195, + 196, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_display_controller_50001000_SUPPORTS_ORDS \ - 197, + 198, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_display_controller_50001000_EXISTS 1 @@ -30483,12 +30723,12 @@ #define DT_N_S_soc_S_display_controller_50001000_S_display_timings_HASH 6ySWdkKqLTRGJ6vGA0r99ybGPwvFI9yc_ncFQmz9M3g /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_display_controller_50001000_S_display_timings_ORD 197 -#define DT_N_S_soc_S_display_controller_50001000_S_display_timings_ORD_STR_SORTABLE 00197 +#define DT_N_S_soc_S_display_controller_50001000_S_display_timings_ORD 198 +#define DT_N_S_soc_S_display_controller_50001000_S_display_timings_ORD_STR_SORTABLE 00198 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_display_controller_50001000_S_display_timings_REQUIRES_ORDS \ - 196, + 197, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_display_controller_50001000_S_display_timings_SUPPORTS_ORDS @@ -30596,8 +30836,8 @@ #define DT_N_S_soc_S_dsihost_50000000_HASH 9sTpBGS3zYCuf59HAeaEA3F6t_AO3h188_7ObTguxXg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dsihost_50000000_ORD 198 -#define DT_N_S_soc_S_dsihost_50000000_ORD_STR_SORTABLE 00198 +#define DT_N_S_soc_S_dsihost_50000000_ORD 199 +#define DT_N_S_soc_S_dsihost_50000000_ORD_STR_SORTABLE 00199 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dsihost_50000000_REQUIRES_ORDS \ @@ -30607,7 +30847,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dsihost_50000000_SUPPORTS_ORDS \ - 199, + 200, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dsihost_50000000_EXISTS 1 @@ -30875,16 +31115,16 @@ #define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_HASH lot5QBT59LHenApwoy2rfLA4daKhzvJ_HcdvVTPJid4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_ORD 199 -#define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_ORD_STR_SORTABLE 00199 +#define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_ORD 200 +#define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_ORD_STR_SORTABLE 00200 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_REQUIRES_ORDS \ - 198, + 199, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_SUPPORTS_ORDS \ - 200, + 201, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_EXISTS 1 @@ -31914,12 +32154,12 @@ #define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_S_display_timings_HASH _cM14ZLO5dxRNhiPaF04gv1GZDN7Ggwq5kwSxaSaH6c /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_S_display_timings_ORD 200 -#define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_S_display_timings_ORD_STR_SORTABLE 00200 +#define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_S_display_timings_ORD 201 +#define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_S_display_timings_ORD_STR_SORTABLE 00201 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_S_display_timings_REQUIRES_ORDS \ - 199, + 200, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_dsihost_50000000_S_st7701_0_S_display_timings_SUPPORTS_ORDS @@ -32031,8 +32271,8 @@ #define DT_N_S_soc_S_ethernet_40028000_HASH NBHLaJx7ay1JQmiZCtQoklPEGDXvh9V0u5wy5wSK0dE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_ethernet_40028000_ORD 201 -#define DT_N_S_soc_S_ethernet_40028000_ORD_STR_SORTABLE 00201 +#define DT_N_S_soc_S_ethernet_40028000_ORD 202 +#define DT_N_S_soc_S_ethernet_40028000_ORD_STR_SORTABLE 00202 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_ethernet_40028000_REQUIRES_ORDS \ @@ -32042,7 +32282,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_ethernet_40028000_SUPPORTS_ORDS \ - 202, + 203, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_ethernet_40028000_EXISTS 1 @@ -32270,12 +32510,12 @@ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_HASH 0taHKBrwQoii9rVChKS5oAHGd2QEKtUmsV_gJwnM__M /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD 202 -#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD_STR_SORTABLE 00202 +#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD 203 +#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD_STR_SORTABLE 00203 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_REQUIRES_ORDS \ - 201, + 202, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_SUPPORTS_ORDS @@ -32388,8 +32628,8 @@ #define DT_N_S_soc_S_flash_controller_52002000_HASH WEWB1xRlcWFNLQZuhd2BHFjaiQlXm55cRtjwi1OAJxE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_ORD 203 -#define DT_N_S_soc_S_flash_controller_52002000_ORD_STR_SORTABLE 00203 +#define DT_N_S_soc_S_flash_controller_52002000_ORD 204 +#define DT_N_S_soc_S_flash_controller_52002000_ORD_STR_SORTABLE 00204 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_REQUIRES_ORDS \ @@ -32399,7 +32639,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_SUPPORTS_ORDS \ - 204, + 205, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_flash_controller_52002000_EXISTS 1 @@ -32542,16 +32782,16 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_HASH 7O_AwMJXCoBtwbLq9JRsLSatE9GW8CNWiahjp_NvuTQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD 204 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD_STR_SORTABLE 00204 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD 205 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD_STR_SORTABLE 00205 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_REQUIRES_ORDS \ - 203, + 204, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_SUPPORTS_ORDS \ - 205, + 206, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_EXISTS 1 @@ -32669,18 +32909,18 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_HASH tEALcfODTfXPwglDO0S7Il2sMOwmw2wMLo53EGRFaO0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD 205 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD_STR_SORTABLE 00205 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD 206 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD_STR_SORTABLE 00206 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_REQUIRES_ORDS \ - 204, + 205, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_SUPPORTS_ORDS \ - 206, \ 207, \ - 208, + 208, \ + 209, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_EXISTS 1 @@ -32746,12 +32986,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_HASH Y2f6PyeZYeS9qr4h9B5CBE5nAVPkM_iJ_AH1rDDnYxg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD 206 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00206 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD 207 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00207 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_REQUIRES_ORDS \ - 205, + 206, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_SUPPORTS_ORDS @@ -32845,12 +33085,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_HASH kIHz4FLHo0sl_1qjfiajBQkRNmpBPSr0J4dz9SqHO6Q /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD 207 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD_STR_SORTABLE 00207 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD 208 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD_STR_SORTABLE 00208 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_REQUIRES_ORDS \ - 205, + 206, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_SUPPORTS_ORDS @@ -32944,12 +33184,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_HASH _mO1ZLWmKcfCbeIRVhMEcNzftLOdCs64I5PovCQqGjI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD 208 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD_STR_SORTABLE 00208 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD 209 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD_STR_SORTABLE 00209 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_REQUIRES_ORDS \ - 205, + 206, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_SUPPORTS_ORDS @@ -33028,16 +33268,16 @@ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_HASH yJ2zlP7DI_k5KNjJkF6ixdlZUMorGdW6G21UbwUNiKs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_ORD 209 -#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_ORD_STR_SORTABLE 00209 +#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_ORD 210 +#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_ORD_STR_SORTABLE 00210 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_REQUIRES_ORDS \ - 180, + 181, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_SUPPORTS_ORDS \ - 210, + 211, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_EXISTS 1 @@ -33102,12 +33342,12 @@ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_S_endpoint_HASH VoRsnUB_Zfm9f_2kreMaE7tmLdSOmCdbMuof3jVYnXk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_S_endpoint_ORD 210 -#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_S_endpoint_ORD_STR_SORTABLE 00210 +#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_S_endpoint_ORD 211 +#define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_S_endpoint_ORD_STR_SORTABLE 00211 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_S_endpoint_REQUIRES_ORDS \ - 209, + 210, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_58001c00_S_gc2145_3c_S_port_S_endpoint_SUPPORTS_ORDS @@ -33179,8 +33419,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_HASH CD2PiqCI4xQKP6d8LTJWcbVvcJ1zDf95YtUri7TYVnQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD 211 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD_STR_SORTABLE 00211 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD 212 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD_STR_SORTABLE 00212 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_REQUIRES_ORDS \ @@ -33188,7 +33428,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_EXISTS 1 @@ -33283,8 +33523,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_HASH qHlFsEpNUM3_uMqezR1bcLTU8cKe_mQpEDMEJ47KjKc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD 212 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD_STR_SORTABLE 00212 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD 213 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD_STR_SORTABLE 00213 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_REQUIRES_ORDS \ @@ -33292,7 +33532,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_EXISTS 1 @@ -33387,8 +33627,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_HASH b5VoCm0WFy4DuNsQM8cx0k1rNhMfIiprZ7BLL59OBFY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD 213 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD_STR_SORTABLE 00213 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD 214 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD_STR_SORTABLE 00214 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_REQUIRES_ORDS \ @@ -33396,7 +33636,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_EXISTS 1 @@ -33491,8 +33731,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_HASH TY5zmTBMpXZuRdNuJzfXNcgBQwqjks4bTbmmLj_5M_U /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD 214 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD_STR_SORTABLE 00214 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD 215 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD_STR_SORTABLE 00215 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_REQUIRES_ORDS \ @@ -33500,7 +33740,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_EXISTS 1 @@ -33595,8 +33835,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_HASH KkHnvHz1j_7XVF0Jmc5anRbXulMDmAaRUGvg2rrTtko /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD 215 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD_STR_SORTABLE 00215 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD 216 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD_STR_SORTABLE 00216 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_REQUIRES_ORDS \ @@ -33604,7 +33844,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_EXISTS 1 @@ -33699,8 +33939,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_HASH kpaWI4oWNw8kaxhpMa_Fjg8EJvHZbFBgz8TJg0TMUhQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD 216 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD_STR_SORTABLE 00216 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD 217 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD_STR_SORTABLE 00217 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_REQUIRES_ORDS \ @@ -33708,7 +33948,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_EXISTS 1 @@ -33803,8 +34043,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_HASH 1CXrMCa0BShPaH_EJPxrS_iy5md1Uy0BsrDx4bZREaw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD 217 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD_STR_SORTABLE 00217 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD 218 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD_STR_SORTABLE 00218 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_REQUIRES_ORDS \ @@ -33812,7 +34052,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_EXISTS 1 @@ -33907,8 +34147,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_HASH Dvl5JyUZbNaoDSw1PSu0JxO40aOIN_peR4dnht1iH30 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD 218 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD_STR_SORTABLE 00218 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD 219 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD_STR_SORTABLE 00219 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_REQUIRES_ORDS \ @@ -33916,7 +34156,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_EXISTS 1 @@ -34011,8 +34251,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_HASH KEkQhsJUJX9lK4WEdGRf6KRKn_CCrjWZx9ML4Q1fLxg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD 219 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD_STR_SORTABLE 00219 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD 220 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD_STR_SORTABLE 00220 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_REQUIRES_ORDS \ @@ -34020,7 +34260,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_EXISTS 1 @@ -34115,8 +34355,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_HASH p4YpourvJtWzC2aQUA3G8yfnTfFPXLKpFO1m2A8kots /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD 220 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD_STR_SORTABLE 00220 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD 221 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD_STR_SORTABLE 00221 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_REQUIRES_ORDS \ @@ -34124,7 +34364,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_EXISTS 1 @@ -34219,8 +34459,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_HASH yU_q1JtSVkSx0no8oasyOmmrTcMdTS8XYKoe4JEBaFU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD 221 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD_STR_SORTABLE 00221 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD 222 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD_STR_SORTABLE 00222 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_REQUIRES_ORDS \ @@ -34228,7 +34468,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_EXISTS 1 @@ -34323,8 +34563,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_HASH X3INshSaHWeFTE7LhWYDzEck8IBAP8eSc_9BZwzOjjk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD 222 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD_STR_SORTABLE 00222 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD 223 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD_STR_SORTABLE 00223 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_REQUIRES_ORDS \ @@ -34332,7 +34572,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_EXISTS 1 @@ -34427,8 +34667,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_HASH j4PJ1eSTaRR1JshJtrjBHS2zq17OIFczGsl8EXJJoFk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD 223 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD_STR_SORTABLE 00223 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD_STR_SORTABLE 00224 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_REQUIRES_ORDS \ @@ -34436,7 +34676,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_EXISTS 1 @@ -34531,8 +34771,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_HASH YRtumExFJXs3MJiOXC63hpresAaVu9tlpi60je0di5U /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD_STR_SORTABLE 00224 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD 225 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD_STR_SORTABLE 00225 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_REQUIRES_ORDS \ @@ -34540,7 +34780,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_EXISTS 1 @@ -34635,8 +34875,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_HASH bpTo8vASfFd7mFUlET6icwa_n_lmGOF_0AjbmnXLoSc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD 225 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD_STR_SORTABLE 00225 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD 226 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD_STR_SORTABLE 00226 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_REQUIRES_ORDS \ @@ -34644,7 +34884,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_EXISTS 1 @@ -34739,8 +34979,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_HASH NWh_6x0Yz7f4_FQTpQs5NEuy3nBx0z4fgwzF0WW0s8A /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD 226 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD_STR_SORTABLE 00226 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD 227 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD_STR_SORTABLE 00227 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_REQUIRES_ORDS \ @@ -34748,7 +34988,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_EXISTS 1 @@ -34843,8 +35083,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_HASH k9QbWqGmDSRXFWb0hLGNJ_QJ24Gs46MQ4kpL0jOIwqo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD 227 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD_STR_SORTABLE 00227 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD 228 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD_STR_SORTABLE 00228 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_REQUIRES_ORDS \ @@ -34852,7 +35092,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_EXISTS 1 @@ -34947,8 +35187,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_HASH 337XDagGjF4W3SvBkGVasRIi4B2lKCPniDcJf25RNTY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD 228 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD_STR_SORTABLE 00228 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD 229 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD_STR_SORTABLE 00229 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_REQUIRES_ORDS \ @@ -34956,7 +35196,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_EXISTS 1 @@ -35051,8 +35291,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_HASH B_IhpsMexGPI8TLmNDd5MDHLUV253vF_IV7JYK4iotk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD 229 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD_STR_SORTABLE 00229 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD 230 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD_STR_SORTABLE 00230 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_REQUIRES_ORDS \ @@ -35060,7 +35300,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_EXISTS 1 @@ -35155,8 +35395,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_HASH kjABblsoJxumE2sAAelA5ZDR40trAONE3R1lkgfgZhk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD 230 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD_STR_SORTABLE 00230 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD 231 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD_STR_SORTABLE 00231 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_REQUIRES_ORDS \ @@ -35164,7 +35404,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_EXISTS 1 @@ -35259,8 +35499,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_HASH aqYLt1oALCAomS3B7Wqhm89DmZW_MC412gWsKMIlhxM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD 231 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD_STR_SORTABLE 00231 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD 232 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD_STR_SORTABLE 00232 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_REQUIRES_ORDS \ @@ -35268,7 +35508,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_EXISTS 1 @@ -35363,8 +35603,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_HASH EAiHNAYPc7TklqV1p8KLC6CZ7gTAuTcBRi4sB4sOe34 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD 232 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD_STR_SORTABLE 00232 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD 233 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD_STR_SORTABLE 00233 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_REQUIRES_ORDS \ @@ -35372,7 +35612,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_EXISTS 1 @@ -35467,8 +35707,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_HASH OIvqfzpgTzBmcBYmYtUHP4MP8IzEkSeKfhYh5gMSAeE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD 233 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD_STR_SORTABLE 00233 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD 234 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD_STR_SORTABLE 00234 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_REQUIRES_ORDS \ @@ -35476,7 +35716,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_EXISTS 1 @@ -35571,8 +35811,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_HASH 5gCcfR2X3hW4svgYGXhufQKZOEpXmN2cc2q0GCjDDUc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD 234 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD_STR_SORTABLE 00234 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD 235 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD_STR_SORTABLE 00235 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_REQUIRES_ORDS \ @@ -35580,7 +35820,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_EXISTS 1 @@ -35675,8 +35915,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_HASH _RB0qmIg1B8ARuvdOJeyPOVgg_NEn4DIjuse2TOun88 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD 235 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD_STR_SORTABLE 00235 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD 236 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD_STR_SORTABLE 00236 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_REQUIRES_ORDS \ @@ -35684,7 +35924,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_EXISTS 1 @@ -35779,8 +36019,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_HASH cEX32R7t1JllJDwPUOtVAddAKIWQbK_xZnNxU_Jzir0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD 236 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD_STR_SORTABLE 00236 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD 237 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD_STR_SORTABLE 00237 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_REQUIRES_ORDS \ @@ -35788,7 +36028,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_EXISTS 1 @@ -35883,8 +36123,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_HASH nvcQenFB791_Xivcn_tn2cXmvvyARNWaMoBjTT1ysRk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD 237 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD_STR_SORTABLE 00237 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD 238 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD_STR_SORTABLE 00238 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_REQUIRES_ORDS \ @@ -35892,7 +36132,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_EXISTS 1 @@ -35987,8 +36227,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_HASH h0fLmkTCfGhElZre1Xkqi9fRt_eTcrvQMsptRdtm9mM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD 238 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD_STR_SORTABLE 00238 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD 239 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD_STR_SORTABLE 00239 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_REQUIRES_ORDS \ @@ -35996,7 +36236,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_EXISTS 1 @@ -36091,8 +36331,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_HASH ICH7Ab3athAfb0Mm8urM2lnmVsqLbVx82O1p1vtQpNs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD 239 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD_STR_SORTABLE 00239 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD 240 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD_STR_SORTABLE 00240 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_REQUIRES_ORDS \ @@ -36100,7 +36340,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_EXISTS 1 @@ -36195,8 +36435,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_HASH 0qVIVjRsISEyySqLZ6v88SFKs1kAO9CLB0KjV1l67OA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD 240 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD_STR_SORTABLE 00240 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD 241 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD_STR_SORTABLE 00241 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_REQUIRES_ORDS \ @@ -36204,7 +36444,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_EXISTS 1 @@ -36299,8 +36539,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_HASH YeXd0VyYXkb3dJZxFkaITdJnd5RdbfwwCt_6ovb7qu0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD 241 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD_STR_SORTABLE 00241 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD 242 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD_STR_SORTABLE 00242 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_REQUIRES_ORDS \ @@ -36308,7 +36548,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_EXISTS 1 @@ -36403,8 +36643,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_HASH yK8Dng2zj9zfT0oDfWufdTZdMXrcYLeFzEOuVdCZ6WI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD 242 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD_STR_SORTABLE 00242 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD 243 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD_STR_SORTABLE 00243 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_REQUIRES_ORDS \ @@ -36412,7 +36652,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_EXISTS 1 @@ -36507,8 +36747,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_HASH 7Hk_zRaqU06qQXDbo2pWjlEZ7mBqTZXosG0inU2wkCM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD 243 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD_STR_SORTABLE 00243 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD 244 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD_STR_SORTABLE 00244 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_REQUIRES_ORDS \ @@ -36516,7 +36756,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_EXISTS 1 @@ -36611,8 +36851,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_HASH L9YUekRkZzLwoJcXQVg828CTTdOwhGIYEK7quZfK8Ww /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD 244 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD_STR_SORTABLE 00244 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD 245 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD_STR_SORTABLE 00245 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_REQUIRES_ORDS \ @@ -36620,7 +36860,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_EXISTS 1 @@ -36715,8 +36955,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_HASH XEqEV_PKSSraFHqmMscKtvZU7Gw7pdTnE6cTnpW44FM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD 245 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD_STR_SORTABLE 00245 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD 246 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD_STR_SORTABLE 00246 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_REQUIRES_ORDS \ @@ -36724,7 +36964,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_EXISTS 1 @@ -36819,8 +37059,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_HASH jr0sNPOQ2x0IrXK3dgBszs_Qz02OTDH4X2HCPojy4jg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD 246 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD_STR_SORTABLE 00246 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD 247 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD_STR_SORTABLE 00247 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_REQUIRES_ORDS \ @@ -36828,7 +37068,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_EXISTS 1 @@ -36923,8 +37163,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_HASH 3NXxFc9ZOOAUbjbScLjSRSKnxm_PgL_YmieqG2QiQIA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD 247 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD_STR_SORTABLE 00247 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD 248 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD_STR_SORTABLE 00248 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_REQUIRES_ORDS \ @@ -36932,7 +37172,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_EXISTS 1 @@ -37027,8 +37267,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_HASH Z9yckusJptLDpxWB5qOsIA_LWbS5emGyWnmQ09EpR_0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD 248 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD_STR_SORTABLE 00248 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD 249 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD_STR_SORTABLE 00249 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_REQUIRES_ORDS \ @@ -37036,7 +37276,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_EXISTS 1 @@ -37131,8 +37371,8 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_HASH OK9tq3HzGKMISXDTeSErVpo6Fz4LPv7AJAOPF4L4Wb8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD 249 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD_STR_SORTABLE 00249 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD 250 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD_STR_SORTABLE 00250 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_REQUIRES_ORDS \ @@ -37140,7 +37380,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_SUPPORTS_ORDS \ - 250, + 251, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_EXISTS 1 @@ -37238,14 +37478,13 @@ #define DT_N_S_soc_S_memory_controller_52004000_HASH kTmd62xLm1DVKtzu_bIobBAuYamR4w9y9dO1w2c1w_c /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_controller_52004000_ORD 250 -#define DT_N_S_soc_S_memory_controller_52004000_ORD_STR_SORTABLE 00250 +#define DT_N_S_soc_S_memory_controller_52004000_ORD 251 +#define DT_N_S_soc_S_memory_controller_52004000_ORD_STR_SORTABLE 00251 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_memory_controller_52004000_REQUIRES_ORDS \ 4, \ 9, \ - 211, \ 212, \ 213, \ 214, \ @@ -37283,11 +37522,12 @@ 246, \ 247, \ 248, \ - 249, + 249, \ + 250, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_memory_controller_52004000_SUPPORTS_ORDS \ - 251, + 252, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_memory_controller_52004000_EXISTS 1 @@ -37759,16 +37999,16 @@ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_HASH TpfMR84hwpUHVdwEVm_B43KwOiOIegn_XuS5Nw5WT8Y /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD 251 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD_STR_SORTABLE 00251 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD 252 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD_STR_SORTABLE 00252 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_REQUIRES_ORDS \ - 250, + 251, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_SUPPORTS_ORDS \ - 252, + 253, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_EXISTS 1 @@ -37879,12 +38119,12 @@ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_HASH QY51JdEkckBOXX58v1GkjBGJCv24_LOtVO55YJ1NOkM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD 252 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD_STR_SORTABLE 00252 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD 253 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD_STR_SORTABLE 00253 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_REQUIRES_ORDS \ - 251, + 252, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_SUPPORTS_ORDS @@ -38005,132 +38245,6 @@ #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_LEN 7 #define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_EXISTS 1 -/* - * Devicetree node: /soc/pin-controller@58020000/gpio@58021400 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 - * - * Binding (compatible = st,stm32-gpio): - * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PATH "/soc/pin-controller@58020000/gpio@58021400" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME "gpio@58021400" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_UNQUOTED gpio@58021400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_TOKEN gpio_58021400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_UPPER_TOKEN GPIO_58021400 - -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PARENT DT_N_S_soc_S_pin_controller_58020000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_IDX 5 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_NODELABEL(fn) fn(gpiof) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiof, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_HASH l5_L_caVLxj349B3OJV4wWPbN099OasLrBnDSU0_4ok - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD 253 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD_STR_SORTABLE 00253 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REQUIRES_ORDS \ - 9, \ - 10, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_SUPPORTS_ORDS - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_EXISTS 1 -#define DT_N_INST_5_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 -#define DT_N_NODELABEL_gpiof DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_VAL_ADDRESS 1476531200 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MATCHES_st_stm32_gpio 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MODEL_IDX_0 "stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg {1476531200, 1024} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_0 1476531200 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bits 32 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_ngpios 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_ngpios_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_gpio_controller 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_gpio_controller_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible {"st,stm32-gpio"} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0 "st,stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_pm_device_runtime_auto_EXISTS 1 - /* * Devicetree node: /soc/rtc@58004000 * @@ -39294,8 +39408,8 @@ /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_REQUIRES_ORDS \ 78, \ - 83, \ 84, \ + 85, \ 261, /* Ordinals for what depends directly on this node: */ @@ -40701,7 +40815,7 @@ /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000000_S_counter_REQUIRES_ORDS \ - 87, + 88, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000000_S_counter_SUPPORTS_ORDS @@ -40814,7 +40928,7 @@ /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000400_S_counter_REQUIRES_ORDS \ - 91, + 92, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000400_S_counter_SUPPORTS_ORDS @@ -40927,7 +41041,7 @@ /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000800_S_counter_REQUIRES_ORDS \ - 95, + 96, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000800_S_counter_SUPPORTS_ORDS @@ -43280,7 +43394,7 @@ /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_REQUIRES_ORDS \ - 103, + 104, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_SUPPORTS_ORDS diff --git a/variants/arduino_giga_r1_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/version.h b/variants/arduino_giga_r1_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/version.h index 9a30242a..76aa14d4 100644 --- a/variants/arduino_giga_r1_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/version.h +++ b/variants/arduino_giga_r1_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/version.h @@ -19,7 +19,7 @@ #define KERNEL_VERSION_EXTENDED_STRING "4.1.99+0" #define KERNEL_VERSION_TWEAK_STRING "4.1.99+0" -#define BUILD_VERSION v4.1.0-894-g9f06fc60e255 +#define BUILD_VERSION v4.1.0-898-g6b32f4d75066 #endif /* _KERNEL_VERSION_H_ */ diff --git a/variants/arduino_giga_r1_stm32h747xx_m7/provides.ld b/variants/arduino_giga_r1_stm32h747xx_m7/provides.ld index f68c7c64..2bf2edf0 100644 --- a/variants/arduino_giga_r1_stm32h747xx_m7/provides.ld +++ b/variants/arduino_giga_r1_stm32h747xx_m7/provides.ld @@ -1,1495 +1,1499 @@ PROVIDE(cmd_kernel_uptime = 0x08041469); -PROVIDE(clock_control_pwm_get_rate = 0x0804c4a1); -PROVIDE(clock_control_pwm_init = 0x0805c419); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0804c4c9); +PROVIDE(clock_control_pwm_get_rate = 0x0804c691); +PROVIDE(clock_control_pwm_init = 0x0805c619); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0804c6b9); PROVIDE(clock_control_pwm_on = 0x08041549); -PROVIDE(clock_control_pwm_set_rate = 0x0805c42f); -PROVIDE(gpio_pin_configure_dt = 0x0805d491); -PROVIDE(gt911_isr_handler = 0x0805d4d1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d4d9); -PROVIDE(gt911_i2c_write_read.constprop.0 = 0x0805d4f7); -PROVIDE(gpio_pin_set_dt.isra.0 = 0x0805d535); -PROVIDE(gt911_i2c_write = 0x0805d55d); +PROVIDE(clock_control_pwm_set_rate = 0x0805c62f); +PROVIDE(gpio_pin_configure_dt = 0x0805d691); +PROVIDE(gt911_isr_handler = 0x0805d6d1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d6d9); +PROVIDE(gt911_i2c_write_read.constprop.0 = 0x0805d6f7); +PROVIDE(gpio_pin_set_dt.isra.0 = 0x0805d735); +PROVIDE(gt911_i2c_write = 0x0805d75d); PROVIDE(gt911_work_handler = 0x08041681); -PROVIDE(gt911_init = 0x08050281); -PROVIDE(mulShift64 = 0x08060f47); -PROVIDE(loader = 0x08042e41); -PROVIDE(smh_choice = 0x08042fc9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080430e1); -PROVIDE(st_stm32_common_config = 0x0804389d); -PROVIDE(stm32h7_m4_wakeup = 0x080438b9); -PROVIDE(dummy_timestamp = 0x0805a183); -PROVIDE(default_lf_get_timestamp = 0x0805a187); -PROVIDE(atomic_inc = 0x0805a197); -PROVIDE(z_log_init.isra.0 = 0x0804397d); -PROVIDE(enable_logger = 0x0805a1b1); -PROVIDE(backend_filter_set = 0x08043cf1); -PROVIDE(z_cbprintf_cpy = 0x0805a23f); -PROVIDE(z_log_msg_simple_create = 0x0805a29d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a30b); -PROVIDE(log_output_write = 0x0805a369); -PROVIDE(out_func = 0x0805a385); -PROVIDE(cr_out_func = 0x0805a3a1); -PROVIDE(print_formatted = 0x08043f25); -PROVIDE(newline_print = 0x08043f49); -PROVIDE(class_handler = 0x080442bd); -PROVIDE(custom_handler = 0x080442fd); -PROVIDE(vendor_handler = 0x0804435d); -PROVIDE(usb_reset_alt_setting = 0x08044399); -PROVIDE(is_ep_valid.part.0 = 0x080443a9); -PROVIDE(usb_handle_request.constprop.0 = 0x080443e1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a453); -PROVIDE(get_ep_bm_from_addr = 0x0804440d); -PROVIDE(disable_endpoint = 0x08044455); -PROVIDE(forward_status_cb = 0x080444d5); -PROVIDE(usb_halt_endpoint_req.isra.0 = 0x08044585); -PROVIDE(set_endpoint = 0x08044621); -PROVIDE(usb_handle_standard_request = 0x08044735); -PROVIDE(usb_data_to_host = 0x08044ae5); -PROVIDE(usb_handle_control_transfer = 0x08044b45); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a471); -PROVIDE(usb_ep_get_transfer = 0x0804512d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a4eb); -PROVIDE(usb_transfer_work = 0x08045159); -PROVIDE(cdc_interface_config = 0x0805a521); -PROVIDE(cdc_acm_irq_callback_work_handler = 0x0805a535); -PROVIDE(cdc_acm_irq_tx_disable = 0x0805a53f); -PROVIDE(cdc_acm_irq_tx_ready = 0x0805a549); -PROVIDE(cdc_acm_irq_rx_disable = 0x0805a569); -PROVIDE(cdc_acm_irq_rx_ready = 0x0805a573); -PROVIDE(cdc_acm_irq_is_pending = 0x0805a581); -PROVIDE(cdc_acm_irq_callback_set = 0x0805a59d); -PROVIDE(cdc_acm_line_ctrl_get = 0x0805a5a5); -PROVIDE(cdc_acm_configure = 0x0805a5d7); -PROVIDE(cdc_acm_config_get = 0x0805a5ef); -PROVIDE(cdc_acm_irq_rx_enable = 0x08045501); -PROVIDE(cdc_acm_irq_tx_enable = 0x08045521); -PROVIDE(cdc_acm_fifo_fill = 0x08045541); -PROVIDE(cdc_acm_write_cb = 0x0804557d); -PROVIDE(cdc_acm_reset_port = 0x080455d1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a64b); -PROVIDE(cdc_acm_int_in = 0x0804560d); -PROVIDE(cdc_acm_init = 0x080456f1); -PROVIDE(tx_work_handler = 0x08045811); -PROVIDE(cdc_acm_send_notification.isra.0 = 0x08045739); -PROVIDE(cdc_acm_line_ctrl_set = 0x0805a669); -PROVIDE(cdc_acm_poll_out = 0x0804577d); -PROVIDE(cdc_acm_read_cb = 0x08045889); -PROVIDE(cdc_acm_fifo_read = 0x0805a727); -PROVIDE(cdc_acm_poll_in = 0x0805a76f); -PROVIDE(cdc_acm_dev_status_cb = 0x08045929); -PROVIDE(cdc_acm_irq_update = 0x0805a781); -PROVIDE(z_usb_work_q_init = 0x08045ab1); -PROVIDE(cmd_kernel_cycles = 0x08045ae5); -PROVIDE(cmd_kernel_sleep = 0x08045b01); -PROVIDE(cmd_kernel_version = 0x08045b41); -PROVIDE(cmd_kernel_log_level_set = 0x08045b59); -PROVIDE(thread_valid_cb = 0x0805a7c1); -PROVIDE(cmd_kernel_thread_list = 0x08045bfd); -PROVIDE(shell_tdata_dump = 0x08045c31); -PROVIDE(cmd_kernel_thread_stacks = 0x08045cf1); -PROVIDE(shell_stack_dump = 0x08045d61); -PROVIDE(cmd_kernel_thread_suspend = 0x08045dc1); -PROVIDE(cmd_kernel_thread_resume = 0x08045e25); -PROVIDE(cmd_kernel_thread_kill = 0x08045e89); -PROVIDE(cmd_device_list = 0x08045eed); -PROVIDE(cmd_devmem = 0x08045fc5); -PROVIDE(cmd_dump = 0x08046089); -PROVIDE(set_bypass.isra.0 = 0x08046201); -PROVIDE(bypass_cb = 0x0804624d); -PROVIDE(cmd_load = 0x08046361); -PROVIDE(log_msg_generic_get_wlen = 0x0805a7cd); -PROVIDE(uart_irq_tx_disable = 0x0805a7ed); -PROVIDE(enable = 0x0805a7f7); -PROVIDE(read_uart = 0x0805a809); -PROVIDE(uninit = 0x0805a81b); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08046439); -PROVIDE(enable_shell_uart = 0x0804645d); -PROVIDE(write_uart = 0x0805a83b); -PROVIDE(init = 0x08046495); -PROVIDE(uart_callback = 0x080464e9); -PROVIDE(cmd_buffer_clear = 0x0805a8a7); -PROVIDE(atomic_or = 0x0805a8bd); -PROVIDE(atomic_and = 0x0805a8db); -PROVIDE(k_mutex_lock = 0x0805a8f9); -PROVIDE(z_shell_raw_fprintf = 0x0805a8fd); -PROVIDE(shell_internal_help_print = 0x0804662d); -PROVIDE(z_shell_strlen = 0x0805a917); -PROVIDE(shell_log_process = 0x0805a923); -PROVIDE(transport_evt_handler = 0x0805a955); -PROVIDE(kill_handler = 0x0804664d); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x080466a9); -PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x0805a96d); -PROVIDE(z_flag_history_exit_set.isra.0 = 0x0805a985); -PROVIDE(history_handle = 0x080466b5); -PROVIDE(z_flag_insert_mode_set.isra.0 = 0x0805a99b); -PROVIDE(k_mutex_unlock.isra.0 = 0x0805a9bb); -PROVIDE(execute = 0x08046765); -PROVIDE(shell_signal_handle = 0x0805a9bf); -PROVIDE(state_set.constprop.0 = 0x08046a2d); -PROVIDE(cmd_help = 0x08047221); -PROVIDE(out_func = 0x0805ac31); -PROVIDE(z_shell_strlen = 0x0805ac6d); -PROVIDE(z_shell_raw_fprintf = 0x0805b04f); -PROVIDE(z_clear_eos = 0x08047511); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x0804752d); -PROVIDE(full_line_cmd.isra.0 = 0x0805b069); -PROVIDE(reprint_from_cursor = 0x08047759); -PROVIDE(data_insert = 0x0805b37d); -PROVIDE(z_shell_raw_fprintf = 0x0805b60d); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x080478dd); -PROVIDE(formatted_text_print.constprop.0 = 0x0805b627); -PROVIDE(cmd_comment = 0x0805b709); -PROVIDE(cmd_shell_stats_reset = 0x0805b70d); -PROVIDE(z_shell_raw_fprintf = 0x0805b715); -PROVIDE(cmd_resize_default = 0x08047a05); -PROVIDE(cmd_shell_stats_show = 0x08047a31); -PROVIDE(cmd_backends = 0x08047a45); -PROVIDE(cmd_prompt_on = 0x0805b72f); -PROVIDE(cmd_prompt_off = 0x08047a95); -PROVIDE(cmd_history = 0x08047aa5); -PROVIDE(cmd_get_retval = 0x08047ae5); -PROVIDE(cmd_echo = 0x08047b01); -PROVIDE(cmd_clear = 0x08047b51); -PROVIDE(cmd_resize = 0x08047b89); -PROVIDE(cmd_vt100_off = 0x0805b73b); -PROVIDE(cmd_bacskpace_mode_delete = 0x0805b75f); -PROVIDE(cmd_colors_off = 0x0805b783); -PROVIDE(cmd_bacskpace_mode_backspace = 0x0805b7a7); -PROVIDE(cmd_echo_off = 0x0805b7cb); -PROVIDE(cmd_colors_on = 0x0805b7ef); -PROVIDE(cmd_vt100_on = 0x0805b813); -PROVIDE(cmd_echo_on = 0x0805b837); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805ba79); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805bc7d); -PROVIDE(mipi_dsi_stm32_attach = 0x08047ed5); -PROVIDE(mipi_dsi_stm32_transfer = 0x08048049); -PROVIDE(mipi_dsi_stm32_init = 0x0804812d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805bc9b); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805bcc3); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805bce3); -PROVIDE(mem_manage_fault.constprop.0 = 0x08048999); -PROVIDE(bus_fault.constprop.0 = 0x08048af5); -PROVIDE(usage_fault.constprop.0 = 0x08048c61); -PROVIDE(cbputc = 0x0805bd3b); -PROVIDE(picolibc_put = 0x0805bd47); -PROVIDE(malloc_prepare = 0x08049531); -PROVIDE(malloc_lock = 0x08049555); -PROVIDE(malloc_unlock = 0x08049569); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805bfa1); -PROVIDE(input_thread = 0x0804980d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805bfbf); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x080498f9); -PROVIDE(call_fn_table = 0x08049905); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08049c45); -PROVIDE(llext_copy_region = 0x08049c69); -PROVIDE(llext_read = 0x0805c05d); -PROVIDE(llext_seek = 0x0805c061); -PROVIDE(llext_peek = 0x0805c065); -PROVIDE(llext_alloc = 0x08049da9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c06f); -PROVIDE(llext_find_extension_sym_iterate = 0x0805c0b1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c0c9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0804ac11); -PROVIDE(llext_shell_name_cb = 0x0805c1a5); -PROVIDE(llext_name_get = 0x0804ace5); -PROVIDE(llext_name_arg_get = 0x0805c1bb); -PROVIDE(cmd_llext_list_symbols = 0x0804ad15); -PROVIDE(cmd_llext_list = 0x0804ad81); -PROVIDE(llext_shell_list_cb = 0x0804ada1); -PROVIDE(cmd_llext_load_hex = 0x0804adb9); -PROVIDE(cmd_llext_call_fn = 0x0804ae8d); -PROVIDE(cmd_llext_unload = 0x0804aeb9); -PROVIDE(stm32_exti_isr = 0x0804aef9); -PROVIDE(stm32_fill_irq_table = 0x0804af49); -PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x0804af61); -PROVIDE(stm32_exti_init = 0x0804af95); -PROVIDE(usb_dc_stm32_get_ep_state = 0x0804b1cd); -PROVIDE(usb_dc_stm32_isr = 0x0804b1f9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c1e5); -PROVIDE(adc_stm32_isr_18_init = 0x0805c2ef); -PROVIDE(adc_stm32_isr_127_init = 0x0805c305); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c31b); -PROVIDE(adc_stm32_channel_setup = 0x0804bb15); -PROVIDE(adc_context_start_sampling = 0x0805c339); -PROVIDE(adc_context_on_timer_expired = 0x0805c357); -PROVIDE(adc_stm32_isr = 0x0804bc41); -PROVIDE(adc_stm32_isr_18 = 0x0804bd45); -PROVIDE(adc_stm32_isr_127 = 0x0804bd51); -PROVIDE(adc_stm32_enable = 0x0805c389); -PROVIDE(adc_stm32_disable = 0x0805c3c3); -PROVIDE(adc_stm32_calibrate.isra.0 = 0x0804bd5d); -PROVIDE(adc_stm32_init = 0x0804be55); -PROVIDE(adc_stm32_read = 0x0804c139); -PROVIDE(get_pllsrc_frequency = 0x0804c4ed); -PROVIDE(get_hclk_frequency = 0x0804c509); -PROVIDE(stm32_clock_control_get_subsys_rate = 0x0804c53d); -PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x0804c635); -PROVIDE(stm32_clock_control_off = 0x0804c669); -PROVIDE(stm32_clock_control_on = 0x0804c6ad); -PROVIDE(stm32_clock_control_configure = 0x0804c9c9); -PROVIDE(uart_console_init = 0x0804ca29); -PROVIDE(console_out = 0x0804ca51); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c45b); -PROVIDE(dac_stm32_channel_setup = 0x0804ca79); -PROVIDE(dac_stm32_write_value = 0x0804cb39); -PROVIDE(dac_stm32_init = 0x0804cbf1); -PROVIDE(stm32_ltdc_set_orientation = 0x0805c47b); -PROVIDE(stm32_ltdc_get_framebuffer = 0x0805c487); -PROVIDE(stm32_ltdc_set_pixel_format = 0x0805c48f); -PROVIDE(stm32_ltdc_get_capabilities = 0x0805c4db); -PROVIDE(stm32_ltdc_read = 0x0805c507); -PROVIDE(stm32_ltdc_irq_config_func_0 = 0x0805c573); -PROVIDE(stm32_ltdc_global_isr = 0x0805c589); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c5c5); -PROVIDE(stm32_ltdc_display_blanking_off = 0x0804cc91); -PROVIDE(gpio_pin_configure_dt.constprop.0 = 0x0805c5e5); -PROVIDE(stm32_ltdc_write = 0x0805c61b); -PROVIDE(stm32_ltdc_init = 0x0804cd05); -PROVIDE(stm32_ltdc_display_blanking_on = 0x0804ce39); -PROVIDE(gpio_pin_set_dt = 0x0805c6c9); -PROVIDE(st7701_get_capabilities = 0x0805c6f1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c71b); -PROVIDE(st7701_generic_write.isra.0 = 0x0804cead); -PROVIDE(st7701_short_write_1p.isra.0 = 0x0804cee9); -PROVIDE(st7701_dcs_write.isra.0 = 0x0804cf2d); -PROVIDE(st7701_blanking_on = 0x0804cf75); -PROVIDE(st7701_blanking_off = 0x0804cfc9); -PROVIDE(st7701_set_brightness = 0x0805c73b); -PROVIDE(k_msleep.isra.0 = 0x0805c755); -PROVIDE(st7701_init = 0x0804d01d); -PROVIDE(dma_stm32_config_irq_0 = 0x0805c75f); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c7e5); -PROVIDE(dma_stm32_init = 0x0804d56d); -PROVIDE(dma_stm32_disable_stream = 0x0805c803); -PROVIDE(dma_stm32_clear_stream_irq.isra.0 = 0x0805c82b); -PROVIDE(dma_stm32_irq_handler = 0x0804dac5); -PROVIDE(dma_stm32_irq_0_0 = 0x0805c889); -PROVIDE(dma_stm32_irq_0_1 = 0x0805c88f); -PROVIDE(dma_stm32_irq_0_2 = 0x0805c895); -PROVIDE(dma_stm32_irq_0_3 = 0x0805c89b); -PROVIDE(dma_stm32_irq_0_4 = 0x0805c8a1); -PROVIDE(dma_stm32_irq_0_5 = 0x0805c8a7); -PROVIDE(dma_stm32_irq_0_6 = 0x0805c8ad); -PROVIDE(dma_stm32_irq_0_7 = 0x0805c8b3); -PROVIDE(LL_DMA_IsActiveFlag_HT0 = 0x0805c8b9); -PROVIDE(LL_DMA_IsActiveFlag_HT1 = 0x0805c8c1); -PROVIDE(LL_DMA_IsActiveFlag_HT2 = 0x0805c8c9); -PROVIDE(LL_DMA_IsActiveFlag_HT3 = 0x0805c8d1); -PROVIDE(LL_DMA_IsActiveFlag_HT4 = 0x0805c8d9); -PROVIDE(LL_DMA_IsActiveFlag_HT5 = 0x0805c8e1); -PROVIDE(LL_DMA_IsActiveFlag_HT6 = 0x0805c8e9); -PROVIDE(LL_DMA_IsActiveFlag_HT7 = 0x0805c8f1); -PROVIDE(LL_DMA_IsActiveFlag_TC0 = 0x0805c8f9); -PROVIDE(LL_DMA_IsActiveFlag_TC1 = 0x0805c901); -PROVIDE(LL_DMA_IsActiveFlag_TC2 = 0x0805c909); -PROVIDE(LL_DMA_IsActiveFlag_TC3 = 0x0805c911); -PROVIDE(LL_DMA_IsActiveFlag_TC4 = 0x0805c919); -PROVIDE(LL_DMA_IsActiveFlag_TC5 = 0x0805c921); -PROVIDE(LL_DMA_IsActiveFlag_TC6 = 0x0805c929); -PROVIDE(LL_DMA_IsActiveFlag_TC7 = 0x0805c931); -PROVIDE(LL_DMA_IsActiveFlag_TE0 = 0x0805c939); -PROVIDE(LL_DMA_IsActiveFlag_TE1 = 0x0805c941); -PROVIDE(LL_DMA_IsActiveFlag_TE2 = 0x0805c949); -PROVIDE(LL_DMA_IsActiveFlag_TE3 = 0x0805c951); -PROVIDE(LL_DMA_IsActiveFlag_TE4 = 0x0805c959); -PROVIDE(LL_DMA_IsActiveFlag_TE5 = 0x0805c961); -PROVIDE(LL_DMA_IsActiveFlag_TE6 = 0x0805c969); -PROVIDE(LL_DMA_IsActiveFlag_TE7 = 0x0805c971); -PROVIDE(LL_DMA_IsActiveFlag_DME0 = 0x0805c979); -PROVIDE(LL_DMA_IsActiveFlag_DME1 = 0x0805c981); -PROVIDE(LL_DMA_IsActiveFlag_DME2 = 0x0805c989); -PROVIDE(LL_DMA_IsActiveFlag_DME3 = 0x0805c991); -PROVIDE(LL_DMA_IsActiveFlag_DME4 = 0x0805c999); -PROVIDE(LL_DMA_IsActiveFlag_DME5 = 0x0805c9a1); -PROVIDE(LL_DMA_IsActiveFlag_DME6 = 0x0805c9a9); -PROVIDE(LL_DMA_IsActiveFlag_DME7 = 0x0805c9b1); -PROVIDE(LL_DMA_IsActiveFlag_FE0 = 0x0805c9b9); -PROVIDE(LL_DMA_IsActiveFlag_FE1 = 0x0805c9c1); -PROVIDE(LL_DMA_IsActiveFlag_FE2 = 0x0805c9c9); -PROVIDE(LL_DMA_IsActiveFlag_FE3 = 0x0805c9d1); -PROVIDE(LL_DMA_IsActiveFlag_FE4 = 0x0805c9d9); -PROVIDE(LL_DMA_IsActiveFlag_FE5 = 0x0805c9e1); -PROVIDE(LL_DMA_IsActiveFlag_FE6 = 0x0805c9e9); -PROVIDE(LL_DMA_IsActiveFlag_FE7 = 0x0805c9f1); -PROVIDE(LL_DMA_ClearFlag_HT0 = 0x0805c9f9); -PROVIDE(LL_DMA_ClearFlag_HT1 = 0x0805c9ff); -PROVIDE(LL_DMA_ClearFlag_HT2 = 0x0805ca07); -PROVIDE(LL_DMA_ClearFlag_HT3 = 0x0805ca0f); -PROVIDE(LL_DMA_ClearFlag_HT4 = 0x0805ca17); -PROVIDE(LL_DMA_ClearFlag_HT5 = 0x0805ca1d); -PROVIDE(LL_DMA_ClearFlag_HT6 = 0x0805ca25); -PROVIDE(LL_DMA_ClearFlag_HT7 = 0x0805ca2d); -PROVIDE(LL_DMA_ClearFlag_TC0 = 0x0805ca35); -PROVIDE(LL_DMA_ClearFlag_TC1 = 0x0805ca3b); -PROVIDE(LL_DMA_ClearFlag_TC2 = 0x0805ca43); -PROVIDE(LL_DMA_ClearFlag_TC3 = 0x0805ca4b); -PROVIDE(LL_DMA_ClearFlag_TC4 = 0x0805ca53); -PROVIDE(LL_DMA_ClearFlag_TC5 = 0x0805ca59); -PROVIDE(LL_DMA_ClearFlag_TC6 = 0x0805ca61); -PROVIDE(LL_DMA_ClearFlag_TC7 = 0x0805ca69); -PROVIDE(LL_DMA_ClearFlag_TE0 = 0x0805ca71); -PROVIDE(LL_DMA_ClearFlag_TE1 = 0x0805ca77); -PROVIDE(LL_DMA_ClearFlag_TE2 = 0x0805ca7f); -PROVIDE(LL_DMA_ClearFlag_TE3 = 0x0805ca87); -PROVIDE(LL_DMA_ClearFlag_TE4 = 0x0805ca8f); -PROVIDE(LL_DMA_ClearFlag_TE5 = 0x0805ca95); -PROVIDE(LL_DMA_ClearFlag_TE6 = 0x0805ca9d); -PROVIDE(LL_DMA_ClearFlag_TE7 = 0x0805caa5); -PROVIDE(LL_DMA_ClearFlag_DME0 = 0x0805caad); -PROVIDE(LL_DMA_ClearFlag_DME1 = 0x0805cab3); -PROVIDE(LL_DMA_ClearFlag_DME2 = 0x0805cabb); -PROVIDE(LL_DMA_ClearFlag_DME3 = 0x0805cac3); -PROVIDE(LL_DMA_ClearFlag_DME4 = 0x0805cacb); -PROVIDE(LL_DMA_ClearFlag_DME5 = 0x0805cad1); -PROVIDE(LL_DMA_ClearFlag_DME6 = 0x0805cad9); -PROVIDE(LL_DMA_ClearFlag_DME7 = 0x0805cae1); -PROVIDE(LL_DMA_ClearFlag_FE0 = 0x0805cae9); -PROVIDE(LL_DMA_ClearFlag_FE1 = 0x0805caef); -PROVIDE(LL_DMA_ClearFlag_FE2 = 0x0805caf5); -PROVIDE(LL_DMA_ClearFlag_FE3 = 0x0805cafd); -PROVIDE(LL_DMA_ClearFlag_FE4 = 0x0805cb05); -PROVIDE(LL_DMA_ClearFlag_FE5 = 0x0805cb0b); -PROVIDE(LL_DMA_ClearFlag_FE6 = 0x0805cb11); -PROVIDE(LL_DMA_ClearFlag_FE7 = 0x0805cb19); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805cb21); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805cbab); -PROVIDE(dmamux_stm32_init = 0x0804e295); -PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x0804e325); -PROVIDE(entropy_stm32_suspend.isra.0 = 0x0804e33d); -PROVIDE(acquire_rng = 0x0804e375); -PROVIDE(start_pool_filling = 0x0804e3b9); -PROVIDE(rng_pool_get = 0x0804e415); -PROVIDE(pool_filling_work_handler = 0x0805cbcb); -PROVIDE(entropy_stm32_rng_get_entropy = 0x0804e4a9); -PROVIDE(entropy_stm32_rng_init = 0x0804e501); -PROVIDE(random_byte_get = 0x0804e595); -PROVIDE(entropy_stm32_rng_get_entropy_isr = 0x0804e5f1); -PROVIDE(stm32_rng_isr = 0x0804e6d5); -PROVIDE(flash_stm32_qspi_get_parameters = 0x0804e799); -PROVIDE(flash_stm32_qspi_get_size = 0x0805ccab); -PROVIDE(flash_stm32_qspi_pages_layout = 0x0805ccb7); -PROVIDE(k_sem_give = 0x0805ccc3); -PROVIDE(flash_stm32_qspi_irq_config_func = 0x0805ccc7); -PROVIDE(flash_stm32_qspi_isr = 0x0805ccdd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805cce3); -PROVIDE(qspi_read_sfdp.isra.0 = 0x0804e7a1); -PROVIDE(qspi_lock_thread.isra.0 = 0x0805cd01); -PROVIDE(qspi_send_cmd.isra.0 = 0x0804e86d); -PROVIDE(flash_stm32_qspi_init = 0x0804e8c1); -PROVIDE(qspi_read_access.isra.0 = 0x0804ed8d); -PROVIDE(flash_stm32_qspi_read = 0x0805cd0f); -PROVIDE(qspi_wait_until_ready = 0x0805cd95); -PROVIDE(flash_stm32_qspi_erase = 0x0804ee0d); -PROVIDE(flash_stm32_qspi_write = 0x0804ef3d); -PROVIDE(flash_stm32h7_get_parameters = 0x0804f099); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805cdf9); -PROVIDE(stm32h7_flash_init = 0x0804f0fd); -PROVIDE(get_sector.isra.0 = 0x0804f181); -PROVIDE(flash_stm32_check_status.isra.0 = 0x0804f201); -PROVIDE(_flash_stm32_sem_take.isra.0 = 0x0804f2f5); -PROVIDE(flash_stm32h7_read = 0x0804f3c5); -PROVIDE(flash_stm32h7_cr_lock = 0x0804f4ed); -PROVIDE(write_ndwords.constprop.0 = 0x0804f545); -PROVIDE(flash_stm32h7_erase = 0x0804f701); -PROVIDE(flash_stm32h7_write = 0x0804f7d9); -PROVIDE(gpio_stm32_port_get_raw = 0x0805ce75); -PROVIDE(gpio_stm32_port_set_bits_raw = 0x0805ce81); -PROVIDE(gpio_stm32_port_clear_bits_raw = 0x0805ce8b); -PROVIDE(gpio_stm32_manage_callback = 0x0805ce97); -PROVIDE(gpio_stm32_pin_interrupt_configure = 0x0804f875); -PROVIDE(gpio_stm32_isr = 0x0805cfc1); -PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x0804f925); -PROVIDE(gpio_stm32_port_toggle_bits = 0x0804f959); -PROVIDE(gpio_stm32_port_set_masked_raw = 0x0804f97d); -PROVIDE(gpio_stm32_init = 0x0804f9a5); -PROVIDE(gpio_stm32_configure_raw.isra.0 = 0x0804f9dd); -PROVIDE(gpio_stm32_config = 0x0805cee9); -PROVIDE(stm32_i2c_disable_transfer_interrupts = 0x0805d04f); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d08d); -PROVIDE(stm32_i2c_enable_transfer_interrupts.isra.0 = 0x0805d0ad); -PROVIDE(stm32_i2c_master_mode_end = 0x0805d0d1); -PROVIDE(msg_init = 0x0804fb79); -PROVIDE(i2c_stm32_irq_config_func_0 = 0x0805d311); -PROVIDE(i2c_stm32_irq_config_func_1 = 0x0805d337); -PROVIDE(i2c_stm32_irq_config_func_2 = 0x0805d35d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d383); -PROVIDE(i2c_stm32_transfer = 0x0805d3a3); -PROVIDE(i2c_stm32_init = 0x0804fec1); -PROVIDE(gpio_pin_get_dt = 0x0805d431); -PROVIDE(gpio_keys_interrupt = 0x0805d45b); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d471); -PROVIDE(gpio_keys_change_deferred = 0x0805004d); -PROVIDE(gpio_keys_init = 0x080500d1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d58d); -PROVIDE(memc_stm32_init = 0x08050585); -PROVIDE(LL_TIM_OC_GetPolarity = 0x080506b5); -PROVIDE(LL_TIM_OC_SetCompareCH1 = 0x0805d6a3); -PROVIDE(LL_TIM_OC_SetCompareCH2 = 0x0805d6a7); -PROVIDE(LL_TIM_OC_SetCompareCH3 = 0x0805d6ab); -PROVIDE(LL_TIM_OC_SetCompareCH4 = 0x0805d6af); -PROVIDE(LL_TIM_OC_SetCompareCH5 = 0x0805d6b3); -PROVIDE(LL_TIM_OC_SetCompareCH6 = 0x0805d6b9); -PROVIDE(pwm_stm32_get_cycles_per_sec = 0x0805d6bd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d6d3); -PROVIDE(pwm_stm32_set_cycles = 0x08050719); -PROVIDE(pwm_stm32_init = 0x080509c1); -PROVIDE(uart_stm32_ll2cfg_databits = 0x0805d765); -PROVIDE(uart_stm32_err_check = 0x0805d78f); -PROVIDE(uart_stm32_irq_tx_enable = 0x0805d7e9); -PROVIDE(uart_stm32_irq_tx_disable = 0x0805d7ff); -PROVIDE(uart_stm32_irq_rx_enable = 0x0805d815); -PROVIDE(uart_stm32_irq_rx_disable = 0x0805d82b); -PROVIDE(uart_stm32_irq_rx_ready = 0x0805d841); -PROVIDE(uart_stm32_irq_err_enable = 0x08050b41); -PROVIDE(uart_stm32_irq_err_disable = 0x08050bb9); -PROVIDE(uart_stm32_irq_update = 0x0805d84d); -PROVIDE(uart_stm32_irq_callback_set = 0x0805d851); -PROVIDE(uart_stm32_isr = 0x0805d859); -PROVIDE(uart_stm32_irq_config_func_0 = 0x0805d865); -PROVIDE(uart_stm32_irq_config_func_1 = 0x0805d87b); -PROVIDE(uart_stm32_irq_config_func_2 = 0x0805d891); -PROVIDE(uart_stm32_irq_config_func_3 = 0x0805d8a7); -PROVIDE(uart_stm32_irq_config_func_4 = 0x0805d8bd); +PROVIDE(gt911_init = 0x08050471); +PROVIDE(mulShift64 = 0x08061147); +PROVIDE(loader = 0x08043019); +PROVIDE(smh_choice = 0x080431a1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080432d1); +PROVIDE(st_stm32_common_config = 0x08043a8d); +PROVIDE(stm32h7_m4_wakeup = 0x08043aa9); +PROVIDE(dummy_timestamp = 0x0805a383); +PROVIDE(default_lf_get_timestamp = 0x0805a387); +PROVIDE(atomic_inc = 0x0805a397); +PROVIDE(z_log_init.isra.0 = 0x08043b6d); +PROVIDE(enable_logger = 0x0805a3b1); +PROVIDE(backend_filter_set = 0x08043ee1); +PROVIDE(z_cbprintf_cpy = 0x0805a43f); +PROVIDE(z_log_msg_simple_create = 0x0805a49d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a50b); +PROVIDE(log_output_write = 0x0805a569); +PROVIDE(out_func = 0x0805a585); +PROVIDE(cr_out_func = 0x0805a5a1); +PROVIDE(print_formatted = 0x08044115); +PROVIDE(newline_print = 0x08044139); +PROVIDE(class_handler = 0x080444ad); +PROVIDE(custom_handler = 0x080444ed); +PROVIDE(vendor_handler = 0x0804454d); +PROVIDE(usb_reset_alt_setting = 0x08044589); +PROVIDE(is_ep_valid.part.0 = 0x08044599); +PROVIDE(usb_handle_request.constprop.0 = 0x080445d1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a653); +PROVIDE(get_ep_bm_from_addr = 0x080445fd); +PROVIDE(disable_endpoint = 0x08044645); +PROVIDE(forward_status_cb = 0x080446c5); +PROVIDE(usb_halt_endpoint_req.isra.0 = 0x08044775); +PROVIDE(set_endpoint = 0x08044811); +PROVIDE(usb_handle_standard_request = 0x08044925); +PROVIDE(usb_data_to_host = 0x08044cd5); +PROVIDE(usb_handle_control_transfer = 0x08044d35); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a671); +PROVIDE(usb_ep_get_transfer = 0x0804531d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a6eb); +PROVIDE(usb_transfer_work = 0x08045349); +PROVIDE(cdc_interface_config = 0x0805a721); +PROVIDE(cdc_acm_irq_callback_work_handler = 0x0805a735); +PROVIDE(cdc_acm_irq_tx_disable = 0x0805a73f); +PROVIDE(cdc_acm_irq_tx_ready = 0x0805a749); +PROVIDE(cdc_acm_irq_rx_disable = 0x0805a769); +PROVIDE(cdc_acm_irq_rx_ready = 0x0805a773); +PROVIDE(cdc_acm_irq_is_pending = 0x0805a781); +PROVIDE(cdc_acm_irq_callback_set = 0x0805a79d); +PROVIDE(cdc_acm_line_ctrl_get = 0x0805a7a5); +PROVIDE(cdc_acm_configure = 0x0805a7d7); +PROVIDE(cdc_acm_config_get = 0x0805a7ef); +PROVIDE(cdc_acm_irq_rx_enable = 0x080456f1); +PROVIDE(cdc_acm_irq_tx_enable = 0x08045711); +PROVIDE(cdc_acm_fifo_fill = 0x08045731); +PROVIDE(cdc_acm_write_cb = 0x0804576d); +PROVIDE(cdc_acm_reset_port = 0x080457c1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a84b); +PROVIDE(cdc_acm_int_in = 0x080457fd); +PROVIDE(cdc_acm_init = 0x080458e1); +PROVIDE(tx_work_handler = 0x08045a01); +PROVIDE(cdc_acm_send_notification.isra.0 = 0x08045929); +PROVIDE(cdc_acm_line_ctrl_set = 0x0805a869); +PROVIDE(cdc_acm_poll_out = 0x0804596d); +PROVIDE(cdc_acm_read_cb = 0x08045a79); +PROVIDE(cdc_acm_fifo_read = 0x0805a927); +PROVIDE(cdc_acm_poll_in = 0x0805a96f); +PROVIDE(cdc_acm_dev_status_cb = 0x08045b19); +PROVIDE(cdc_acm_irq_update = 0x0805a981); +PROVIDE(z_usb_work_q_init = 0x08045ca1); +PROVIDE(cmd_kernel_cycles = 0x08045cd5); +PROVIDE(cmd_kernel_sleep = 0x08045cf1); +PROVIDE(cmd_kernel_version = 0x08045d31); +PROVIDE(cmd_kernel_log_level_set = 0x08045d49); +PROVIDE(thread_valid_cb = 0x0805a9c1); +PROVIDE(cmd_kernel_thread_list = 0x08045ded); +PROVIDE(shell_tdata_dump = 0x08045e21); +PROVIDE(cmd_kernel_thread_stacks = 0x08045ee1); +PROVIDE(shell_stack_dump = 0x08045f51); +PROVIDE(cmd_kernel_thread_suspend = 0x08045fb1); +PROVIDE(cmd_kernel_thread_resume = 0x08046015); +PROVIDE(cmd_kernel_thread_kill = 0x08046079); +PROVIDE(cmd_device_list = 0x080460dd); +PROVIDE(cmd_devmem = 0x080461b5); +PROVIDE(cmd_dump = 0x08046279); +PROVIDE(set_bypass.isra.0 = 0x080463f1); +PROVIDE(bypass_cb = 0x0804643d); +PROVIDE(cmd_load = 0x08046551); +PROVIDE(log_msg_generic_get_wlen = 0x0805a9cd); +PROVIDE(uart_irq_tx_disable = 0x0805a9ed); +PROVIDE(enable = 0x0805a9f7); +PROVIDE(read_uart = 0x0805aa09); +PROVIDE(uninit = 0x0805aa1b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08046629); +PROVIDE(enable_shell_uart = 0x0804664d); +PROVIDE(write_uart = 0x0805aa3b); +PROVIDE(init = 0x08046685); +PROVIDE(uart_callback = 0x080466d9); +PROVIDE(cmd_buffer_clear = 0x0805aaa7); +PROVIDE(atomic_or = 0x0805aabd); +PROVIDE(atomic_and = 0x0805aadb); +PROVIDE(k_mutex_lock = 0x0805aaf9); +PROVIDE(z_shell_raw_fprintf = 0x0805aafd); +PROVIDE(shell_internal_help_print = 0x0804681d); +PROVIDE(z_shell_strlen = 0x0805ab17); +PROVIDE(shell_log_process = 0x0805ab23); +PROVIDE(transport_evt_handler = 0x0805ab55); +PROVIDE(kill_handler = 0x0804683d); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x08046899); +PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x0805ab6d); +PROVIDE(z_flag_history_exit_set.isra.0 = 0x0805ab85); +PROVIDE(history_handle = 0x080468a5); +PROVIDE(z_flag_insert_mode_set.isra.0 = 0x0805ab9b); +PROVIDE(k_mutex_unlock.isra.0 = 0x0805abbb); +PROVIDE(execute = 0x08046955); +PROVIDE(shell_signal_handle = 0x0805abbf); +PROVIDE(state_set.constprop.0 = 0x08046c1d); +PROVIDE(cmd_help = 0x08047411); +PROVIDE(out_func = 0x0805ae31); +PROVIDE(z_shell_strlen = 0x0805ae6d); +PROVIDE(z_shell_raw_fprintf = 0x0805b24f); +PROVIDE(z_clear_eos = 0x08047701); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x0804771d); +PROVIDE(full_line_cmd.isra.0 = 0x0805b269); +PROVIDE(reprint_from_cursor = 0x08047949); +PROVIDE(data_insert = 0x0805b57d); +PROVIDE(z_shell_raw_fprintf = 0x0805b80d); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x08047acd); +PROVIDE(formatted_text_print.constprop.0 = 0x0805b827); +PROVIDE(cmd_comment = 0x0805b909); +PROVIDE(cmd_shell_stats_reset = 0x0805b90d); +PROVIDE(z_shell_raw_fprintf = 0x0805b915); +PROVIDE(cmd_resize_default = 0x08047bf5); +PROVIDE(cmd_shell_stats_show = 0x08047c21); +PROVIDE(cmd_backends = 0x08047c35); +PROVIDE(cmd_prompt_on = 0x0805b92f); +PROVIDE(cmd_prompt_off = 0x08047c85); +PROVIDE(cmd_history = 0x08047c95); +PROVIDE(cmd_get_retval = 0x08047cd5); +PROVIDE(cmd_echo = 0x08047cf1); +PROVIDE(cmd_clear = 0x08047d41); +PROVIDE(cmd_resize = 0x08047d79); +PROVIDE(cmd_vt100_off = 0x0805b93b); +PROVIDE(cmd_bacskpace_mode_delete = 0x0805b95f); +PROVIDE(cmd_colors_off = 0x0805b983); +PROVIDE(cmd_bacskpace_mode_backspace = 0x0805b9a7); +PROVIDE(cmd_echo_off = 0x0805b9cb); +PROVIDE(cmd_colors_on = 0x0805b9ef); +PROVIDE(cmd_vt100_on = 0x0805ba13); +PROVIDE(cmd_echo_on = 0x0805ba37); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805bc79); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805be7d); +PROVIDE(mipi_dsi_stm32_attach = 0x080480c5); +PROVIDE(mipi_dsi_stm32_transfer = 0x08048239); +PROVIDE(mipi_dsi_stm32_init = 0x0804831d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805be9b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805bec3); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805bee3); +PROVIDE(mem_manage_fault.constprop.0 = 0x08048b89); +PROVIDE(bus_fault.constprop.0 = 0x08048ce5); +PROVIDE(usage_fault.constprop.0 = 0x08048e51); +PROVIDE(cbputc = 0x0805bf3b); +PROVIDE(picolibc_put = 0x0805bf47); +PROVIDE(malloc_prepare = 0x08049721); +PROVIDE(malloc_lock = 0x08049745); +PROVIDE(malloc_unlock = 0x08049759); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c1a1); +PROVIDE(input_thread = 0x080499fd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c1bf); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x08049ae9); +PROVIDE(call_fn_table = 0x08049af5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08049e35); +PROVIDE(llext_copy_region = 0x08049e59); +PROVIDE(llext_read = 0x0805c25d); +PROVIDE(llext_seek = 0x0805c261); +PROVIDE(llext_peek = 0x0805c265); +PROVIDE(llext_alloc = 0x08049f99); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c26f); +PROVIDE(llext_find_extension_sym_iterate = 0x0805c2b1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c2c9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0804ae01); +PROVIDE(llext_shell_name_cb = 0x0805c3a5); +PROVIDE(llext_name_get = 0x0804aed5); +PROVIDE(llext_name_arg_get = 0x0805c3bb); +PROVIDE(cmd_llext_list_symbols = 0x0804af05); +PROVIDE(cmd_llext_list = 0x0804af71); +PROVIDE(llext_shell_list_cb = 0x0804af91); +PROVIDE(cmd_llext_load_hex = 0x0804afa9); +PROVIDE(cmd_llext_call_fn = 0x0804b07d); +PROVIDE(cmd_llext_unload = 0x0804b0a9); +PROVIDE(stm32_exti_isr = 0x0804b0e9); +PROVIDE(stm32_fill_irq_table = 0x0804b139); +PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x0804b151); +PROVIDE(stm32_exti_init = 0x0804b185); +PROVIDE(usb_dc_stm32_get_ep_state = 0x0804b3bd); +PROVIDE(usb_dc_stm32_isr = 0x0804b3e9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c3e5); +PROVIDE(adc_stm32_isr_18_init = 0x0805c4ef); +PROVIDE(adc_stm32_isr_127_init = 0x0805c505); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c51b); +PROVIDE(adc_stm32_channel_setup = 0x0804bd05); +PROVIDE(adc_context_start_sampling = 0x0805c539); +PROVIDE(adc_context_on_timer_expired = 0x0805c557); +PROVIDE(adc_stm32_isr = 0x0804be31); +PROVIDE(adc_stm32_isr_18 = 0x0804bf35); +PROVIDE(adc_stm32_isr_127 = 0x0804bf41); +PROVIDE(adc_stm32_enable = 0x0805c589); +PROVIDE(adc_stm32_disable = 0x0805c5c3); +PROVIDE(adc_stm32_calibrate.isra.0 = 0x0804bf4d); +PROVIDE(adc_stm32_init = 0x0804c045); +PROVIDE(adc_stm32_read = 0x0804c329); +PROVIDE(get_pllsrc_frequency = 0x0804c6dd); +PROVIDE(get_hclk_frequency = 0x0804c6f9); +PROVIDE(stm32_clock_control_get_subsys_rate = 0x0804c72d); +PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x0804c825); +PROVIDE(stm32_clock_control_off = 0x0804c859); +PROVIDE(stm32_clock_control_on = 0x0804c89d); +PROVIDE(stm32_clock_control_configure = 0x0804cbb9); +PROVIDE(uart_console_init = 0x0804cc19); +PROVIDE(console_out = 0x0804cc41); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c65b); +PROVIDE(dac_stm32_channel_setup = 0x0804cc69); +PROVIDE(dac_stm32_write_value = 0x0804cd29); +PROVIDE(dac_stm32_init = 0x0804cde1); +PROVIDE(stm32_ltdc_set_orientation = 0x0805c67b); +PROVIDE(stm32_ltdc_get_framebuffer = 0x0805c687); +PROVIDE(stm32_ltdc_set_pixel_format = 0x0805c68f); +PROVIDE(stm32_ltdc_get_capabilities = 0x0805c6db); +PROVIDE(stm32_ltdc_read = 0x0805c707); +PROVIDE(stm32_ltdc_irq_config_func_0 = 0x0805c773); +PROVIDE(stm32_ltdc_global_isr = 0x0805c789); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c7c5); +PROVIDE(stm32_ltdc_display_blanking_off = 0x0804ce81); +PROVIDE(gpio_pin_configure_dt.constprop.0 = 0x0805c7e5); +PROVIDE(stm32_ltdc_write = 0x0805c81b); +PROVIDE(stm32_ltdc_init = 0x0804cef5); +PROVIDE(stm32_ltdc_display_blanking_on = 0x0804d029); +PROVIDE(gpio_pin_set_dt = 0x0805c8c9); +PROVIDE(st7701_get_capabilities = 0x0805c8f1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c91b); +PROVIDE(st7701_generic_write.isra.0 = 0x0804d09d); +PROVIDE(st7701_short_write_1p.isra.0 = 0x0804d0d9); +PROVIDE(st7701_dcs_write.isra.0 = 0x0804d11d); +PROVIDE(st7701_blanking_on = 0x0804d165); +PROVIDE(st7701_blanking_off = 0x0804d1b9); +PROVIDE(st7701_set_brightness = 0x0805c93b); +PROVIDE(k_msleep.isra.0 = 0x0805c955); +PROVIDE(st7701_init = 0x0804d20d); +PROVIDE(dma_stm32_config_irq_0 = 0x0805c95f); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c9e5); +PROVIDE(dma_stm32_init = 0x0804d75d); +PROVIDE(dma_stm32_disable_stream = 0x0805ca03); +PROVIDE(dma_stm32_clear_stream_irq.isra.0 = 0x0805ca2b); +PROVIDE(dma_stm32_irq_handler = 0x0804dcb5); +PROVIDE(dma_stm32_irq_0_0 = 0x0805ca89); +PROVIDE(dma_stm32_irq_0_1 = 0x0805ca8f); +PROVIDE(dma_stm32_irq_0_2 = 0x0805ca95); +PROVIDE(dma_stm32_irq_0_3 = 0x0805ca9b); +PROVIDE(dma_stm32_irq_0_4 = 0x0805caa1); +PROVIDE(dma_stm32_irq_0_5 = 0x0805caa7); +PROVIDE(dma_stm32_irq_0_6 = 0x0805caad); +PROVIDE(dma_stm32_irq_0_7 = 0x0805cab3); +PROVIDE(LL_DMA_IsActiveFlag_HT0 = 0x0805cab9); +PROVIDE(LL_DMA_IsActiveFlag_HT1 = 0x0805cac1); +PROVIDE(LL_DMA_IsActiveFlag_HT2 = 0x0805cac9); +PROVIDE(LL_DMA_IsActiveFlag_HT3 = 0x0805cad1); +PROVIDE(LL_DMA_IsActiveFlag_HT4 = 0x0805cad9); +PROVIDE(LL_DMA_IsActiveFlag_HT5 = 0x0805cae1); +PROVIDE(LL_DMA_IsActiveFlag_HT6 = 0x0805cae9); +PROVIDE(LL_DMA_IsActiveFlag_HT7 = 0x0805caf1); +PROVIDE(LL_DMA_IsActiveFlag_TC0 = 0x0805caf9); +PROVIDE(LL_DMA_IsActiveFlag_TC1 = 0x0805cb01); +PROVIDE(LL_DMA_IsActiveFlag_TC2 = 0x0805cb09); +PROVIDE(LL_DMA_IsActiveFlag_TC3 = 0x0805cb11); +PROVIDE(LL_DMA_IsActiveFlag_TC4 = 0x0805cb19); +PROVIDE(LL_DMA_IsActiveFlag_TC5 = 0x0805cb21); +PROVIDE(LL_DMA_IsActiveFlag_TC6 = 0x0805cb29); +PROVIDE(LL_DMA_IsActiveFlag_TC7 = 0x0805cb31); +PROVIDE(LL_DMA_IsActiveFlag_TE0 = 0x0805cb39); +PROVIDE(LL_DMA_IsActiveFlag_TE1 = 0x0805cb41); +PROVIDE(LL_DMA_IsActiveFlag_TE2 = 0x0805cb49); +PROVIDE(LL_DMA_IsActiveFlag_TE3 = 0x0805cb51); +PROVIDE(LL_DMA_IsActiveFlag_TE4 = 0x0805cb59); +PROVIDE(LL_DMA_IsActiveFlag_TE5 = 0x0805cb61); +PROVIDE(LL_DMA_IsActiveFlag_TE6 = 0x0805cb69); +PROVIDE(LL_DMA_IsActiveFlag_TE7 = 0x0805cb71); +PROVIDE(LL_DMA_IsActiveFlag_DME0 = 0x0805cb79); +PROVIDE(LL_DMA_IsActiveFlag_DME1 = 0x0805cb81); +PROVIDE(LL_DMA_IsActiveFlag_DME2 = 0x0805cb89); +PROVIDE(LL_DMA_IsActiveFlag_DME3 = 0x0805cb91); +PROVIDE(LL_DMA_IsActiveFlag_DME4 = 0x0805cb99); +PROVIDE(LL_DMA_IsActiveFlag_DME5 = 0x0805cba1); +PROVIDE(LL_DMA_IsActiveFlag_DME6 = 0x0805cba9); +PROVIDE(LL_DMA_IsActiveFlag_DME7 = 0x0805cbb1); +PROVIDE(LL_DMA_IsActiveFlag_FE0 = 0x0805cbb9); +PROVIDE(LL_DMA_IsActiveFlag_FE1 = 0x0805cbc1); +PROVIDE(LL_DMA_IsActiveFlag_FE2 = 0x0805cbc9); +PROVIDE(LL_DMA_IsActiveFlag_FE3 = 0x0805cbd1); +PROVIDE(LL_DMA_IsActiveFlag_FE4 = 0x0805cbd9); +PROVIDE(LL_DMA_IsActiveFlag_FE5 = 0x0805cbe1); +PROVIDE(LL_DMA_IsActiveFlag_FE6 = 0x0805cbe9); +PROVIDE(LL_DMA_IsActiveFlag_FE7 = 0x0805cbf1); +PROVIDE(LL_DMA_ClearFlag_HT0 = 0x0805cbf9); +PROVIDE(LL_DMA_ClearFlag_HT1 = 0x0805cbff); +PROVIDE(LL_DMA_ClearFlag_HT2 = 0x0805cc07); +PROVIDE(LL_DMA_ClearFlag_HT3 = 0x0805cc0f); +PROVIDE(LL_DMA_ClearFlag_HT4 = 0x0805cc17); +PROVIDE(LL_DMA_ClearFlag_HT5 = 0x0805cc1d); +PROVIDE(LL_DMA_ClearFlag_HT6 = 0x0805cc25); +PROVIDE(LL_DMA_ClearFlag_HT7 = 0x0805cc2d); +PROVIDE(LL_DMA_ClearFlag_TC0 = 0x0805cc35); +PROVIDE(LL_DMA_ClearFlag_TC1 = 0x0805cc3b); +PROVIDE(LL_DMA_ClearFlag_TC2 = 0x0805cc43); +PROVIDE(LL_DMA_ClearFlag_TC3 = 0x0805cc4b); +PROVIDE(LL_DMA_ClearFlag_TC4 = 0x0805cc53); +PROVIDE(LL_DMA_ClearFlag_TC5 = 0x0805cc59); +PROVIDE(LL_DMA_ClearFlag_TC6 = 0x0805cc61); +PROVIDE(LL_DMA_ClearFlag_TC7 = 0x0805cc69); +PROVIDE(LL_DMA_ClearFlag_TE0 = 0x0805cc71); +PROVIDE(LL_DMA_ClearFlag_TE1 = 0x0805cc77); +PROVIDE(LL_DMA_ClearFlag_TE2 = 0x0805cc7f); +PROVIDE(LL_DMA_ClearFlag_TE3 = 0x0805cc87); +PROVIDE(LL_DMA_ClearFlag_TE4 = 0x0805cc8f); +PROVIDE(LL_DMA_ClearFlag_TE5 = 0x0805cc95); +PROVIDE(LL_DMA_ClearFlag_TE6 = 0x0805cc9d); +PROVIDE(LL_DMA_ClearFlag_TE7 = 0x0805cca5); +PROVIDE(LL_DMA_ClearFlag_DME0 = 0x0805ccad); +PROVIDE(LL_DMA_ClearFlag_DME1 = 0x0805ccb3); +PROVIDE(LL_DMA_ClearFlag_DME2 = 0x0805ccbb); +PROVIDE(LL_DMA_ClearFlag_DME3 = 0x0805ccc3); +PROVIDE(LL_DMA_ClearFlag_DME4 = 0x0805cccb); +PROVIDE(LL_DMA_ClearFlag_DME5 = 0x0805ccd1); +PROVIDE(LL_DMA_ClearFlag_DME6 = 0x0805ccd9); +PROVIDE(LL_DMA_ClearFlag_DME7 = 0x0805cce1); +PROVIDE(LL_DMA_ClearFlag_FE0 = 0x0805cce9); +PROVIDE(LL_DMA_ClearFlag_FE1 = 0x0805ccef); +PROVIDE(LL_DMA_ClearFlag_FE2 = 0x0805ccf5); +PROVIDE(LL_DMA_ClearFlag_FE3 = 0x0805ccfd); +PROVIDE(LL_DMA_ClearFlag_FE4 = 0x0805cd05); +PROVIDE(LL_DMA_ClearFlag_FE5 = 0x0805cd0b); +PROVIDE(LL_DMA_ClearFlag_FE6 = 0x0805cd11); +PROVIDE(LL_DMA_ClearFlag_FE7 = 0x0805cd19); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805cd21); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805cdab); +PROVIDE(dmamux_stm32_init = 0x0804e485); +PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x0804e515); +PROVIDE(entropy_stm32_suspend.isra.0 = 0x0804e52d); +PROVIDE(acquire_rng = 0x0804e565); +PROVIDE(start_pool_filling = 0x0804e5a9); +PROVIDE(rng_pool_get = 0x0804e605); +PROVIDE(pool_filling_work_handler = 0x0805cdcb); +PROVIDE(entropy_stm32_rng_get_entropy = 0x0804e699); +PROVIDE(entropy_stm32_rng_init = 0x0804e6f1); +PROVIDE(random_byte_get = 0x0804e785); +PROVIDE(entropy_stm32_rng_get_entropy_isr = 0x0804e7e1); +PROVIDE(stm32_rng_isr = 0x0804e8c5); +PROVIDE(flash_stm32_qspi_get_parameters = 0x0804e989); +PROVIDE(flash_stm32_qspi_get_size = 0x0805ceab); +PROVIDE(flash_stm32_qspi_pages_layout = 0x0805ceb7); +PROVIDE(k_sem_give = 0x0805cec3); +PROVIDE(flash_stm32_qspi_irq_config_func = 0x0805cec7); +PROVIDE(flash_stm32_qspi_isr = 0x0805cedd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805cee3); +PROVIDE(qspi_read_sfdp.isra.0 = 0x0804e991); +PROVIDE(qspi_lock_thread.isra.0 = 0x0805cf01); +PROVIDE(qspi_send_cmd.isra.0 = 0x0804ea5d); +PROVIDE(flash_stm32_qspi_init = 0x0804eab1); +PROVIDE(qspi_read_access.isra.0 = 0x0804ef7d); +PROVIDE(flash_stm32_qspi_read = 0x0805cf0f); +PROVIDE(qspi_wait_until_ready = 0x0805cf95); +PROVIDE(flash_stm32_qspi_erase = 0x0804effd); +PROVIDE(flash_stm32_qspi_write = 0x0804f12d); +PROVIDE(flash_stm32h7_get_parameters = 0x0804f289); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805cff9); +PROVIDE(stm32h7_flash_init = 0x0804f2ed); +PROVIDE(get_sector.isra.0 = 0x0804f371); +PROVIDE(flash_stm32_check_status.isra.0 = 0x0804f3f1); +PROVIDE(_flash_stm32_sem_take.isra.0 = 0x0804f4e5); +PROVIDE(flash_stm32h7_read = 0x0804f5b5); +PROVIDE(flash_stm32h7_cr_lock = 0x0804f6dd); +PROVIDE(write_ndwords.constprop.0 = 0x0804f735); +PROVIDE(flash_stm32h7_erase = 0x0804f8f1); +PROVIDE(flash_stm32h7_write = 0x0804f9c9); +PROVIDE(gpio_stm32_port_get_raw = 0x0805d075); +PROVIDE(gpio_stm32_port_set_bits_raw = 0x0805d081); +PROVIDE(gpio_stm32_port_clear_bits_raw = 0x0805d08b); +PROVIDE(gpio_stm32_manage_callback = 0x0805d097); +PROVIDE(gpio_stm32_pin_interrupt_configure = 0x0804fa65); +PROVIDE(gpio_stm32_isr = 0x0805d1c1); +PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x0804fb15); +PROVIDE(gpio_stm32_port_toggle_bits = 0x0804fb49); +PROVIDE(gpio_stm32_port_set_masked_raw = 0x0804fb6d); +PROVIDE(gpio_stm32_init = 0x0804fb95); +PROVIDE(gpio_stm32_configure_raw.isra.0 = 0x0804fbcd); +PROVIDE(gpio_stm32_config = 0x0805d0e9); +PROVIDE(stm32_i2c_disable_transfer_interrupts = 0x0805d24f); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d28d); +PROVIDE(stm32_i2c_enable_transfer_interrupts.isra.0 = 0x0805d2ad); +PROVIDE(stm32_i2c_master_mode_end = 0x0805d2d1); +PROVIDE(msg_init = 0x0804fd69); +PROVIDE(i2c_stm32_irq_config_func_0 = 0x0805d511); +PROVIDE(i2c_stm32_irq_config_func_1 = 0x0805d537); +PROVIDE(i2c_stm32_irq_config_func_2 = 0x0805d55d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d583); +PROVIDE(i2c_stm32_transfer = 0x0805d5a3); +PROVIDE(i2c_stm32_init = 0x080500b1); +PROVIDE(gpio_pin_get_dt = 0x0805d631); +PROVIDE(gpio_keys_interrupt = 0x0805d65b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d671); +PROVIDE(gpio_keys_change_deferred = 0x0805023d); +PROVIDE(gpio_keys_init = 0x080502c1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d78d); +PROVIDE(memc_stm32_init = 0x08050775); +PROVIDE(LL_TIM_OC_GetPolarity = 0x080508a5); +PROVIDE(LL_TIM_OC_SetCompareCH1 = 0x0805d8a3); +PROVIDE(LL_TIM_OC_SetCompareCH2 = 0x0805d8a7); +PROVIDE(LL_TIM_OC_SetCompareCH3 = 0x0805d8ab); +PROVIDE(LL_TIM_OC_SetCompareCH4 = 0x0805d8af); +PROVIDE(LL_TIM_OC_SetCompareCH5 = 0x0805d8b3); +PROVIDE(LL_TIM_OC_SetCompareCH6 = 0x0805d8b9); +PROVIDE(pwm_stm32_get_cycles_per_sec = 0x0805d8bd); PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805d8d3); -PROVIDE(uart_stm32_set_baudrate = 0x08050c31); -PROVIDE(uart_stm32_irq_tx_complete = 0x0805d8f3); -PROVIDE(uart_stm32_irq_tx_ready = 0x0805d8ff); -PROVIDE(uart_stm32_parameters_set = 0x08050c91); -PROVIDE(uart_stm32_init = 0x08050dc5); -PROVIDE(uart_stm32_config_get = 0x0805d913); -PROVIDE(uart_stm32_configure = 0x08050fc9); -PROVIDE(uart_stm32_fifo_fill = 0x0805d9a5); -PROVIDE(uart_stm32_poll_out = 0x0805d9fd); -PROVIDE(uart_stm32_irq_is_pending = 0x0805da33); -PROVIDE(uart_stm32_fifo_read = 0x0805da57); -PROVIDE(uart_stm32_poll_in = 0x0805da99); -PROVIDE(LL_SPI_SetTransferDirection = 0x0805dabb); -PROVIDE(spi_context_get_next_buf = 0x0805dad9); -PROVIDE(spi_context_buffers_setup = 0x0805db05); -PROVIDE(spi_stm32_send_next_frame = 0x0805db63); -PROVIDE(spi_stm32_read_next_frame = 0x0805dbf5); -PROVIDE(spi_stm32_irq_config_func_0 = 0x0805dc7d); -PROVIDE(spi_stm32_irq_config_func_1 = 0x0805dc93); -PROVIDE(spi_stm32_count_bufset_frames = 0x0805dca9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805dced); -PROVIDE(spi_stm32_get_err = 0x08051135); -PROVIDE(gpio_pin_set_dt.isra.0 = 0x0805dd0d); -PROVIDE(ll_func_disable_spi = 0x0805dd35); -PROVIDE(spi_context_unlock_unconditionally = 0x0805dd51); -PROVIDE(spi_stm32_release = 0x0805dd81); -PROVIDE(spi_stm32_init = 0x08051185); -PROVIDE(spi_stm32_complete = 0x0805dd95); -PROVIDE(spi_stm32_isr = 0x0805decd); -PROVIDE(transceive = 0x0805130d); -PROVIDE(spi_stm32_transceive_async = 0x0805e0ef); -PROVIDE(spi_stm32_transceive = 0x0805e105); -PROVIDE(elapsed = 0x08051865); -PROVIDE(sys_clock_driver_init = 0x080518b1); -PROVIDE(gpio_pin_configure_dt = 0x0805e12b); -PROVIDE(gc2145_get_fmt = 0x0805e161); -PROVIDE(gc2145_get_caps = 0x08051b59); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805e171); -PROVIDE(k_sleep.isra.0 = 0x0805e18f); -PROVIDE(k_msleep.isra.0 = 0x0805e193); -PROVIDE(gc2145_write_reg = 0x08051b65); -PROVIDE(gc2145_set_stream = 0x0805e19d); -PROVIDE(gc2145_set_window.isra.0 = 0x0805e1ab); -PROVIDE(gc2145_read_reg = 0x08051be9); -PROVIDE(gc2145_set_fmt = 0x08051c71); -PROVIDE(gc2145_set_ctrl = 0x08051ea1); -PROVIDE(gc2145_init_0 = 0x08051f11); -PROVIDE(video_stm32_dcmi_set_fmt = 0x080520d1); -PROVIDE(video_stm32_dcmi_get_fmt = 0x0805e255); -PROVIDE(video_stm32_dcmi_set_ctrl = 0x0805e2a7); -PROVIDE(video_stm32_dcmi_get_ctrl = 0x0805e2b9); -PROVIDE(video_stm32_dcmi_enqueue = 0x0805e2cb); -PROVIDE(video_stm32_dcmi_dequeue = 0x0805e301); -PROVIDE(video_stm32_dcmi_irq_config_func = 0x0805e32d); -PROVIDE(stm32_dcmi_isr = 0x0805e343); -PROVIDE(video_stm32_dcmi_get_caps = 0x0805e34b); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805e37d); -PROVIDE(dmci_dma_callback = 0x0805217d); -PROVIDE(video_stm32_dcmi_init = 0x080521b5); -PROVIDE(video_stm32_dcmi_set_stream = 0x08052525); -PROVIDE(DCMI_DMAXferCplt = 0x0805e39d); -PROVIDE(DCMI_DMAError = 0x0805e44f); -PROVIDE(DMA_SetConfig = 0x08052b39); -PROVIDE(DMA_CalcBaseAndBitshift = 0x08052cc5); -PROVIDE(DMA_CalcDMAMUXChannelBaseAndMask = 0x08052d79); -PROVIDE(DMA_CalcDMAMUXRequestGenBaseAndMask = 0x08052e11); -PROVIDE(DMA_MultiBufferSetConfig = 0x08053fb5); -PROVIDE(DSI_ShortWrite.constprop.0 = 0x0805e473); -PROVIDE(QSPI_Config = 0x0805f001); -PROVIDE(QSPI_WaitFlagStateUntilTimeout = 0x0805f175); -PROVIDE(QSPI_DMAAbortCplt = 0x0805f47f); -PROVIDE(LL_RCC_HSE_IsReady = 0x080553ed); -PROVIDE(LL_RCC_HSI_IsReady = 0x080553fd); -PROVIDE(LL_RCC_CSI_IsReady = 0x0805540d); -PROVIDE(RCC_GetHCLKClockFreq = 0x0805541d); -PROVIDE(RCC_GetPCLK1ClockFreq = 0x08055439); -PROVIDE(RCC_GetPCLK2ClockFreq = 0x08055455); -PROVIDE(RCC_GetPCLK4ClockFreq = 0x08055471); -PROVIDE(RCC_GetSystemClockFreq = 0x0805555d); -PROVIDE(USB_CoreReset = 0x0805f677); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805fc23); -PROVIDE(do_device_init = 0x0805fc59); -PROVIDE(z_sys_init_run_level = 0x080561b1); -PROVIDE(bg_thread_main = 0x080561e1); -PROVIDE(statics_init = 0x08056429); -PROVIDE(create_free_list = 0x0805fd93); -PROVIDE(init_mem_slab_obj_core_list = 0x0805644d); -PROVIDE(init_mbox_module = 0x08056471); -PROVIDE(unpend_thread_no_timeout = 0x0805fde9); -PROVIDE(adjust_owner_prio.isra.0 = 0x0805ff6f); -PROVIDE(unpend_thread_no_timeout = 0x0805ff8d); -PROVIDE(queue_insert = 0x0805ffa7); -PROVIDE(k_sys_work_q_init = 0x080569c9); -PROVIDE(flag_test_and_clear = 0x08060249); -PROVIDE(unschedule_locked = 0x0806025f); -PROVIDE(notify_queue_locked.isra.0 = 0x0806027d); -PROVIDE(work_queue_main = 0x080569fd); -PROVIDE(submit_to_queue_locked = 0x08056b49); -PROVIDE(work_timeout = 0x0806028d); -PROVIDE(unpend_thread_no_timeout = 0x08060339); -PROVIDE(sys_dlist_remove = 0x080603b9); -PROVIDE(unpend_thread_no_timeout = 0x080603c9); -PROVIDE(z_swap_irqlock = 0x08057061); -PROVIDE(ready_thread = 0x08057095); -PROVIDE(unready_thread = 0x08057119); -PROVIDE(add_to_waitq_locked = 0x080603dd); -PROVIDE(z_tick_sleep = 0x08057615); -PROVIDE(wait_for = 0x080605c7); -PROVIDE(z_sched_wake_all.constprop.0 = 0x08060639); -PROVIDE(slice_timeout = 0x080579b9); -PROVIDE(first = 0x08057bb5); -PROVIDE(elapsed = 0x08057bc5); -PROVIDE(next_timeout = 0x08060869); -PROVIDE(remove_timeout = 0x08057bd9); -PROVIDE(clear_event_registrations = 0x08057f85); -PROVIDE(add_event = 0x080609e3); -PROVIDE(register_events = 0x08060a37); -PROVIDE(signal_poll_event = 0x08060b3b); -PROVIDE(z_heap_aligned_alloc = 0x08060c37); -PROVIDE(__ultoa_invert = 0x08060ef7); -PROVIDE(skip_to_arg = 0x08058455); -PROVIDE(mulShiftAll64 = 0x08060fa9); -PROVIDE(div10 = 0x08058f49); -PROVIDE(chunk_field = 0x080596d1); -PROVIDE(chunk_set = 0x080596e7); -PROVIDE(chunk_size = 0x080596fd); -PROVIDE(set_chunk_used = 0x08059709); -PROVIDE(set_chunk_size = 0x08059739); -PROVIDE(mem_to_chunkid = 0x08059741); -PROVIDE(bucket_idx.isra.0 = 0x08059755); -PROVIDE(free_list_remove_bidx = 0x08059773); -PROVIDE(free_list_remove = 0x080597cf); -PROVIDE(alloc_chunk = 0x080597fd); -PROVIDE(split_chunks = 0x08059871); -PROVIDE(merge_chunks = 0x080598bf); -PROVIDE(free_list_add = 0x080598fb); -PROVIDE(free_chunk = 0x0805997f); -PROVIDE(ring_buf_put_claim = 0x0805a027); -PROVIDE(ring_buf_get_claim = 0x0805a045); -PROVIDE(cmd_kernel_reboot_cold = 0x0805a7b1); -PROVIDE(cmd_kernel_reboot_warm = 0x0805a7b9); -PROVIDE(panic = 0x0805b487); -PROVIDE(process_log_msg.constprop.0 = 0x0805b489); -PROVIDE(process = 0x0805b515); -PROVIDE(dropped = 0x0805b555); -PROVIDE(remove_from_tail.part.0 = 0x0805b85b); -PROVIDE(mipi_dsi_transfer = 0x0805bbb1); -PROVIDE(foldcase = 0x0805bd51); -PROVIDE(fnmatchx = 0x0805bd61); -PROVIDE(flash_get_page_info = 0x0805cc0b); -PROVIDE(vnd_gpio_pin_configure = 0x0805d01d); -PROVIDE(vnd_gpio_port_get_raw = 0x0805d023); -PROVIDE(vnd_gpio_port_set_masked_raw = 0x0805d029); -PROVIDE(vnd_gpio_port_set_bits_raw = 0x0805d02f); -PROVIDE(vnd_gpio_port_clear_bits_raw = 0x0805d035); -PROVIDE(vnd_gpio_port_toggle_bits = 0x0805d03b); -PROVIDE(memc_stm32_sdram_init = 0x0805d5ad); -PROVIDE(reset_stm32_status = 0x0805d6f3); -PROVIDE(reset_stm32_line_assert = 0x0805d715); -PROVIDE(reset_stm32_line_deassert = 0x0805d731); -PROVIDE(reset_stm32_line_toggle = 0x0805d74f); -PROVIDE(LTDC_SetConfig = 0x0805e8df); -PROVIDE(z_abort_timeout = 0x0806089b); -PROVIDE(putchar = 0x080581a9); -PROVIDE(getopt_state_get = 0x080497a5); +PROVIDE(pwm_stm32_set_cycles = 0x08050909); +PROVIDE(pwm_stm32_init = 0x08050bb1); +PROVIDE(uart_stm32_ll2cfg_databits = 0x0805d965); +PROVIDE(uart_stm32_err_check = 0x0805d98f); +PROVIDE(uart_stm32_irq_tx_enable = 0x0805d9e9); +PROVIDE(uart_stm32_irq_tx_disable = 0x0805d9ff); +PROVIDE(uart_stm32_irq_rx_enable = 0x0805da15); +PROVIDE(uart_stm32_irq_rx_disable = 0x0805da2b); +PROVIDE(uart_stm32_irq_rx_ready = 0x0805da41); +PROVIDE(uart_stm32_irq_err_enable = 0x08050d31); +PROVIDE(uart_stm32_irq_err_disable = 0x08050da9); +PROVIDE(uart_stm32_irq_update = 0x0805da4d); +PROVIDE(uart_stm32_irq_callback_set = 0x0805da51); +PROVIDE(uart_stm32_isr = 0x0805da59); +PROVIDE(uart_stm32_irq_config_func_0 = 0x0805da65); +PROVIDE(uart_stm32_irq_config_func_1 = 0x0805da7b); +PROVIDE(uart_stm32_irq_config_func_2 = 0x0805da91); +PROVIDE(uart_stm32_irq_config_func_3 = 0x0805daa7); +PROVIDE(uart_stm32_irq_config_func_4 = 0x0805dabd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805dad3); +PROVIDE(uart_stm32_set_baudrate = 0x08050e21); +PROVIDE(uart_stm32_irq_tx_complete = 0x0805daf3); +PROVIDE(uart_stm32_irq_tx_ready = 0x0805daff); +PROVIDE(uart_stm32_parameters_set = 0x08050e81); +PROVIDE(uart_stm32_init = 0x08050fb5); +PROVIDE(uart_stm32_config_get = 0x0805db13); +PROVIDE(uart_stm32_configure = 0x080511b9); +PROVIDE(uart_stm32_fifo_fill = 0x0805dba5); +PROVIDE(uart_stm32_poll_out = 0x0805dbfd); +PROVIDE(uart_stm32_irq_is_pending = 0x0805dc33); +PROVIDE(uart_stm32_fifo_read = 0x0805dc57); +PROVIDE(uart_stm32_poll_in = 0x0805dc99); +PROVIDE(LL_SPI_SetTransferDirection = 0x0805dcbb); +PROVIDE(spi_context_get_next_buf = 0x0805dcd9); +PROVIDE(spi_context_buffers_setup = 0x0805dd05); +PROVIDE(spi_stm32_send_next_frame = 0x0805dd63); +PROVIDE(spi_stm32_read_next_frame = 0x0805ddf5); +PROVIDE(spi_stm32_irq_config_func_0 = 0x0805de7d); +PROVIDE(spi_stm32_irq_config_func_1 = 0x0805de93); +PROVIDE(spi_stm32_count_bufset_frames = 0x0805dea9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805deed); +PROVIDE(spi_stm32_get_err = 0x08051325); +PROVIDE(gpio_pin_set_dt.isra.0 = 0x0805df0d); +PROVIDE(ll_func_disable_spi = 0x0805df35); +PROVIDE(spi_context_unlock_unconditionally = 0x0805df51); +PROVIDE(spi_stm32_release = 0x0805df81); +PROVIDE(spi_stm32_init = 0x08051375); +PROVIDE(spi_stm32_complete = 0x0805df95); +PROVIDE(spi_stm32_isr = 0x0805e0cd); +PROVIDE(transceive = 0x080514fd); +PROVIDE(spi_stm32_transceive_async = 0x0805e2ef); +PROVIDE(spi_stm32_transceive = 0x0805e305); +PROVIDE(elapsed = 0x08051a55); +PROVIDE(sys_clock_driver_init = 0x08051aa1); +PROVIDE(gpio_pin_configure_dt = 0x0805e32b); +PROVIDE(gc2145_get_fmt = 0x0805e361); +PROVIDE(gc2145_get_caps = 0x08051d49); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805e371); +PROVIDE(k_sleep.isra.0 = 0x0805e38f); +PROVIDE(k_msleep.isra.0 = 0x0805e393); +PROVIDE(gc2145_write_reg = 0x08051d55); +PROVIDE(gc2145_set_stream = 0x0805e39d); +PROVIDE(gc2145_set_window.isra.0 = 0x0805e3ab); +PROVIDE(gc2145_read_reg = 0x08051dd9); +PROVIDE(gc2145_set_fmt = 0x08051e61); +PROVIDE(gc2145_set_ctrl = 0x08052091); +PROVIDE(gc2145_init_0 = 0x08052101); +PROVIDE(video_stm32_dcmi_set_fmt = 0x080522c1); +PROVIDE(video_stm32_dcmi_get_fmt = 0x0805e455); +PROVIDE(video_stm32_dcmi_set_ctrl = 0x0805e4a7); +PROVIDE(video_stm32_dcmi_get_ctrl = 0x0805e4b9); +PROVIDE(video_stm32_dcmi_enqueue = 0x0805e4cb); +PROVIDE(video_stm32_dcmi_dequeue = 0x0805e501); +PROVIDE(video_stm32_dcmi_irq_config_func = 0x0805e52d); +PROVIDE(stm32_dcmi_isr = 0x0805e543); +PROVIDE(video_stm32_dcmi_get_caps = 0x0805e54b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805e57d); +PROVIDE(dmci_dma_callback = 0x0805236d); +PROVIDE(video_stm32_dcmi_init = 0x080523a5); +PROVIDE(video_stm32_dcmi_set_stream = 0x08052715); +PROVIDE(DCMI_DMAXferCplt = 0x0805e59d); +PROVIDE(DCMI_DMAError = 0x0805e64f); +PROVIDE(DMA_SetConfig = 0x08052d29); +PROVIDE(DMA_CalcBaseAndBitshift = 0x08052eb5); +PROVIDE(DMA_CalcDMAMUXChannelBaseAndMask = 0x08052f69); +PROVIDE(DMA_CalcDMAMUXRequestGenBaseAndMask = 0x08053001); +PROVIDE(DMA_MultiBufferSetConfig = 0x080541a5); +PROVIDE(DSI_ShortWrite.constprop.0 = 0x0805e673); +PROVIDE(QSPI_Config = 0x0805f201); +PROVIDE(QSPI_WaitFlagStateUntilTimeout = 0x0805f375); +PROVIDE(QSPI_DMAAbortCplt = 0x0805f67f); +PROVIDE(LL_RCC_HSE_IsReady = 0x080555dd); +PROVIDE(LL_RCC_HSI_IsReady = 0x080555ed); +PROVIDE(LL_RCC_CSI_IsReady = 0x080555fd); +PROVIDE(RCC_GetHCLKClockFreq = 0x0805560d); +PROVIDE(RCC_GetPCLK1ClockFreq = 0x08055629); +PROVIDE(RCC_GetPCLK2ClockFreq = 0x08055645); +PROVIDE(RCC_GetPCLK4ClockFreq = 0x08055661); +PROVIDE(RCC_GetSystemClockFreq = 0x0805574d); +PROVIDE(USB_CoreReset = 0x0805f877); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805fe23); +PROVIDE(do_device_init = 0x0805fe59); +PROVIDE(z_sys_init_run_level = 0x080563a1); +PROVIDE(bg_thread_main = 0x080563d1); +PROVIDE(statics_init = 0x08056619); +PROVIDE(create_free_list = 0x0805ff93); +PROVIDE(init_mem_slab_obj_core_list = 0x0805663d); +PROVIDE(init_mbox_module = 0x08056661); +PROVIDE(unpend_thread_no_timeout = 0x0805ffe9); +PROVIDE(adjust_owner_prio.isra.0 = 0x0806016f); +PROVIDE(unpend_thread_no_timeout = 0x0806018d); +PROVIDE(queue_insert = 0x080601a7); +PROVIDE(k_sys_work_q_init = 0x08056bb9); +PROVIDE(flag_test_and_clear = 0x08060449); +PROVIDE(unschedule_locked = 0x0806045f); +PROVIDE(notify_queue_locked.isra.0 = 0x0806047d); +PROVIDE(work_queue_main = 0x08056bed); +PROVIDE(submit_to_queue_locked = 0x08056d39); +PROVIDE(work_timeout = 0x0806048d); +PROVIDE(unpend_thread_no_timeout = 0x08060539); +PROVIDE(sys_dlist_remove = 0x080605b9); +PROVIDE(unpend_thread_no_timeout = 0x080605c9); +PROVIDE(z_swap_irqlock = 0x08057251); +PROVIDE(ready_thread = 0x08057285); +PROVIDE(unready_thread = 0x08057309); +PROVIDE(add_to_waitq_locked = 0x080605dd); +PROVIDE(z_tick_sleep = 0x08057805); +PROVIDE(wait_for = 0x080607c7); +PROVIDE(z_sched_wake_all.constprop.0 = 0x08060839); +PROVIDE(slice_timeout = 0x08057ba9); +PROVIDE(first = 0x08057da5); +PROVIDE(elapsed = 0x08057db5); +PROVIDE(next_timeout = 0x08060a69); +PROVIDE(remove_timeout = 0x08057dc9); +PROVIDE(clear_event_registrations = 0x08058175); +PROVIDE(add_event = 0x08060be3); +PROVIDE(register_events = 0x08060c37); +PROVIDE(signal_poll_event = 0x08060d3b); +PROVIDE(z_heap_aligned_alloc = 0x08060e37); +PROVIDE(__ultoa_invert = 0x080610f7); +PROVIDE(skip_to_arg = 0x08058645); +PROVIDE(mulShiftAll64 = 0x080611a9); +PROVIDE(div10 = 0x08059139); +PROVIDE(chunk_field = 0x080598c1); +PROVIDE(chunk_set = 0x080598d7); +PROVIDE(chunk_size = 0x080598ed); +PROVIDE(set_chunk_used = 0x080598f9); +PROVIDE(set_chunk_size = 0x08059929); +PROVIDE(mem_to_chunkid = 0x08059931); +PROVIDE(bucket_idx.isra.0 = 0x08059945); +PROVIDE(free_list_remove_bidx = 0x08059963); +PROVIDE(free_list_remove = 0x080599bf); +PROVIDE(alloc_chunk = 0x080599ed); +PROVIDE(split_chunks = 0x08059a61); +PROVIDE(merge_chunks = 0x08059aaf); +PROVIDE(free_list_add = 0x08059aeb); +PROVIDE(free_chunk = 0x08059b6f); +PROVIDE(ring_buf_put_claim = 0x0805a227); +PROVIDE(ring_buf_get_claim = 0x0805a245); +PROVIDE(cmd_kernel_reboot_cold = 0x0805a9b1); +PROVIDE(cmd_kernel_reboot_warm = 0x0805a9b9); +PROVIDE(panic = 0x0805b687); +PROVIDE(process_log_msg.constprop.0 = 0x0805b689); +PROVIDE(process = 0x0805b715); +PROVIDE(dropped = 0x0805b755); +PROVIDE(remove_from_tail.part.0 = 0x0805ba5b); +PROVIDE(mipi_dsi_transfer = 0x0805bdb1); +PROVIDE(foldcase = 0x0805bf51); +PROVIDE(fnmatchx = 0x0805bf61); +PROVIDE(flash_get_page_info = 0x0805ce0b); +PROVIDE(vnd_gpio_pin_configure = 0x0805d21d); +PROVIDE(vnd_gpio_port_get_raw = 0x0805d223); +PROVIDE(vnd_gpio_port_set_masked_raw = 0x0805d229); +PROVIDE(vnd_gpio_port_set_bits_raw = 0x0805d22f); +PROVIDE(vnd_gpio_port_clear_bits_raw = 0x0805d235); +PROVIDE(vnd_gpio_port_toggle_bits = 0x0805d23b); +PROVIDE(memc_stm32_sdram_init = 0x0805d7ad); +PROVIDE(reset_stm32_status = 0x0805d8f3); +PROVIDE(reset_stm32_line_assert = 0x0805d915); +PROVIDE(reset_stm32_line_deassert = 0x0805d931); +PROVIDE(reset_stm32_line_toggle = 0x0805d94f); +PROVIDE(LTDC_SetConfig = 0x0805eadf); +PROVIDE(z_abort_timeout = 0x08060a9b); +PROVIDE(putchar = 0x08058399); +PROVIDE(getopt_state_get = 0x08049995); PROVIDE(__aeabi_dcmpun = 0x08040bd9); -PROVIDE(z_arm_bus_fault = 0x08048fe1); -PROVIDE(z_impl_k_msgq_get_attrs = 0x0805fe63); -PROVIDE(z_impl_sys_rand_get = 0x080497ad); +PROVIDE(z_arm_bus_fault = 0x080491d1); +PROVIDE(z_impl_k_msgq_get_attrs = 0x08060063); +PROVIDE(z_impl_sys_rand_get = 0x0804999d); PROVIDE(__aeabi_dcmple = 0x08040b9d); -PROVIDE(z_init_thread_base = 0x08060383); +PROVIDE(z_init_thread_base = 0x08060583); PROVIDE(strcpy = 0x0804114d); -PROVIDE(z_arm_pendsv = 0x08049089); -PROVIDE(z_impl_flash_get_page_info_by_offs = 0x0805cc71); -PROVIDE(z_impl_k_is_preempt_thread = 0x08056e51); -PROVIDE(stm32_gpio_intc_select_line_trigger = 0x0804b079); -PROVIDE(k_is_in_isr = 0x0806035b); -PROVIDE(k_fatal_halt = 0x0805fc53); -PROVIDE(sys_arch_reboot = 0x08049039); +PROVIDE(z_arm_pendsv = 0x08049279); +PROVIDE(z_impl_flash_get_page_info_by_offs = 0x0805ce71); +PROVIDE(z_impl_k_is_preempt_thread = 0x08057041); +PROVIDE(stm32_gpio_intc_select_line_trigger = 0x0804b269); +PROVIDE(k_is_in_isr = 0x0806055b); +PROVIDE(k_fatal_halt = 0x0805fe53); +PROVIDE(sys_arch_reboot = 0x08049229); PROVIDE(__cmpdf2 = 0x08040ad9); -PROVIDE(HAL_DSI_ConfigHostTimeouts = 0x08054849); -PROVIDE(move_thread_to_end_of_prio_q = 0x0805716d); -PROVIDE(HAL_PCD_EP_ClrStall = 0x0805ef09); -PROVIDE(usb_transfer_init = 0x080454d1); -PROVIDE(z_arm_reset = 0x08048ff5); -PROVIDE(sys_clock_announce = 0x08057cfd); -PROVIDE(HAL_PCD_ResetCallback = 0x0804ba31); -PROVIDE(z_impl_k_thread_create = 0x08056fe9); -PROVIDE(sys_heap_free = 0x08059a03); -PROVIDE(z_unpend_thread_no_timeout = 0x0806044b); -PROVIDE(arch_icache_invd_range = 0x08049485); +PROVIDE(HAL_DSI_ConfigHostTimeouts = 0x08054a39); +PROVIDE(move_thread_to_end_of_prio_q = 0x0805735d); +PROVIDE(HAL_PCD_EP_ClrStall = 0x0805f109); +PROVIDE(usb_transfer_init = 0x080456c1); +PROVIDE(z_arm_reset = 0x080491e5); +PROVIDE(sys_clock_announce = 0x08057eed); +PROVIDE(HAL_PCD_ResetCallback = 0x0804bc21); +PROVIDE(z_impl_k_thread_create = 0x080571d9); +PROVIDE(sys_heap_free = 0x08059bf3); +PROVIDE(z_unpend_thread_no_timeout = 0x0806064b); +PROVIDE(arch_icache_invd_range = 0x08049675); PROVIDE(__eqdf2 = 0x08040ad9); -PROVIDE(HAL_DSI_LongWrite = 0x0805e6b3); -PROVIDE(USB_ActivateSetup = 0x0805fb9d); -PROVIDE(z_shell_multiline_data_calc = 0x0805acad); -PROVIDE(cdc_acm_class_handle_req = 0x08045651); -PROVIDE(z_impl_zephyr_fputc = 0x080494ed); -PROVIDE(sys_clock_tick_get_32 = 0x080608dd); -PROVIDE(z_impl_k_msgq_get = 0x08056561); -PROVIDE(z_impl_k_reschedule = 0x08057539); -PROVIDE(HAL_DMA_Init = 0x08052e81); -PROVIDE(HAL_PCD_EP_Close = 0x0805edbf); +PROVIDE(HAL_DSI_LongWrite = 0x0805e8b3); +PROVIDE(USB_ActivateSetup = 0x0805fd9d); +PROVIDE(z_shell_multiline_data_calc = 0x0805aead); +PROVIDE(cdc_acm_class_handle_req = 0x08045841); +PROVIDE(z_impl_zephyr_fputc = 0x080496dd); +PROVIDE(sys_clock_tick_get_32 = 0x08060add); +PROVIDE(z_impl_k_msgq_get = 0x08056751); +PROVIDE(z_impl_k_reschedule = 0x08057729); +PROVIDE(HAL_DMA_Init = 0x08053071); +PROVIDE(HAL_PCD_EP_Close = 0x0805efbf); PROVIDE(__floatdidf = 0x08040649); -PROVIDE(FMC_SDRAM_Init = 0x08055385); -PROVIDE(HAL_DCMI_IRQHandler = 0x08052a9d); -PROVIDE(stm32_dma_disable_stream = 0x0804dec5); -PROVIDE(__double_computePow5 = 0x08059495); -PROVIDE(__aeabi_read_tp = 0x080612fd); -PROVIDE(k_work_queue_start = 0x08056c05); -PROVIDE(printf = 0x08058185); -PROVIDE(HAL_PCD_DisconnectCallback = 0x0804ba8d); -PROVIDE(__wrap_random = 0x08058131); -PROVIDE(z_shell_cmd_get = 0x0804744d); -PROVIDE(z_shell_history_get = 0x0805b885); -PROVIDE(z_shell_cmd_line_erase = 0x0805b255); -PROVIDE(z_impl_sys_csrand_get = 0x080497ed); -PROVIDE(shared_multi_heap_pool_init = 0x0804308d); -PROVIDE(HAL_PCD_DataInStageCallback = 0x0805c2b7); -PROVIDE(putc_unlocked = 0x080612d5); -PROVIDE(z_impl_device_init = 0x0805fc8f); -PROVIDE(z_impl_hwinfo_get_device_id = 0x0804fa9d); -PROVIDE(smh_init = 0x08042dd1); -PROVIDE(stm32_i2c_transaction = 0x0805d1c1); -PROVIDE(usb_dc_ep_read = 0x0805c25d); -PROVIDE(stm32_dma_enable_stream = 0x0804de8d); -PROVIDE(HAL_DSI_Read = 0x0805e775); -PROVIDE(sys_clock_tick_get = 0x08057dad); -PROVIDE(z_arm_usage_fault = 0x08048fe1); -PROVIDE(dma_stm32_reload = 0x0804dba5); -PROVIDE(z_impl_k_pipe_write = 0x08060683); -PROVIDE(llext_iterate = 0x080499dd); -PROVIDE(stm32_gpio_intc_set_irq_callback = 0x0804b0e1); -PROVIDE(llext_unload = 0x08049b41); -PROVIDE(HAL_QSPI_Receive = 0x0805f2d3); -PROVIDE(z_shell_op_delete_from_cursor = 0x0805b239); -PROVIDE(usb_cancel_transfer = 0x08045451); -PROVIDE(z_impl_k_thread_name_set = 0x08056e71); -PROVIDE(z_shell_vt100_colors_restore = 0x0804764d); -PROVIDE(HAL_PCD_SOFCallback = 0x0805ed23); -PROVIDE(memmove = 0x08060c99); -PROVIDE(z_impl_k_usleep = 0x08060561); -PROVIDE(z_shell_op_char_insert = 0x08047839); -PROVIDE(z_arm_mpu_fault = 0x08048fe1); -PROVIDE(HAL_RCC_GetHCLKFreq = 0x080527f1); -PROVIDE(snprintf = 0x080581f5); -PROVIDE(z_impl_k_stack_pop = 0x08056961); -PROVIDE(usb_dc_ep_set_stall = 0x0804b601); -PROVIDE(HAL_PCD_EP_Abort = 0x0805ef73); -PROVIDE(usb_dc_attach = 0x0804b205); -PROVIDE(mipi_dsi_dcs_read = 0x0805bbff); -PROVIDE(__dtox_engine = 0x08061197); -PROVIDE(stm32_dma_is_ht_irq_active = 0x0804ddf9); -PROVIDE(stm32_dma_get_fifo_threshold = 0x0804dfc9); -PROVIDE(cbpprintf_external = 0x08059e1d); -PROVIDE(HAL_RCC_GetSysClockFreq = 0x080526ad); -PROVIDE(llext_file_offset = 0x0805c0e9); +PROVIDE(FMC_SDRAM_Init = 0x08055575); +PROVIDE(HAL_DCMI_IRQHandler = 0x08052c8d); +PROVIDE(stm32_dma_disable_stream = 0x0804e0b5); +PROVIDE(__double_computePow5 = 0x08059685); +PROVIDE(__aeabi_read_tp = 0x080614fd); +PROVIDE(k_work_queue_start = 0x08056df5); +PROVIDE(printf = 0x08058375); +PROVIDE(HAL_PCD_DisconnectCallback = 0x0804bc7d); +PROVIDE(__wrap_random = 0x08058321); +PROVIDE(z_shell_cmd_get = 0x0804763d); +PROVIDE(z_shell_history_get = 0x0805ba85); +PROVIDE(z_shell_cmd_line_erase = 0x0805b455); +PROVIDE(z_impl_sys_csrand_get = 0x080499dd); +PROVIDE(atan2l = 0x08041f79); +PROVIDE(shared_multi_heap_pool_init = 0x0804327d); +PROVIDE(HAL_PCD_DataInStageCallback = 0x0805c4b7); +PROVIDE(putc_unlocked = 0x080614d5); +PROVIDE(z_impl_device_init = 0x0805fe8f); +PROVIDE(z_impl_hwinfo_get_device_id = 0x0804fc8d); +PROVIDE(smh_init = 0x08042fa9); +PROVIDE(stm32_i2c_transaction = 0x0805d3c1); +PROVIDE(usb_dc_ep_read = 0x0805c45d); +PROVIDE(stm32_dma_enable_stream = 0x0804e07d); +PROVIDE(HAL_DSI_Read = 0x0805e975); +PROVIDE(sys_clock_tick_get = 0x08057f9d); +PROVIDE(z_arm_usage_fault = 0x080491d1); +PROVIDE(dma_stm32_reload = 0x0804dd95); +PROVIDE(z_impl_k_pipe_write = 0x08060883); +PROVIDE(llext_iterate = 0x08049bcd); +PROVIDE(stm32_gpio_intc_set_irq_callback = 0x0804b2d1); +PROVIDE(llext_unload = 0x08049d31); +PROVIDE(HAL_QSPI_Receive = 0x0805f4d3); +PROVIDE(z_shell_op_delete_from_cursor = 0x0805b439); +PROVIDE(usb_cancel_transfer = 0x08045641); +PROVIDE(z_impl_k_thread_name_set = 0x08057061); +PROVIDE(z_shell_vt100_colors_restore = 0x0804783d); +PROVIDE(HAL_PCD_SOFCallback = 0x0805ef23); +PROVIDE(memmove = 0x08060e99); +PROVIDE(z_impl_k_usleep = 0x08060761); +PROVIDE(z_shell_op_char_insert = 0x08047a29); +PROVIDE(z_arm_mpu_fault = 0x080491d1); +PROVIDE(HAL_RCC_GetHCLKFreq = 0x080529e1); +PROVIDE(snprintf = 0x080583e5); +PROVIDE(z_impl_k_stack_pop = 0x08056b51); +PROVIDE(usb_dc_ep_set_stall = 0x0804b7f1); +PROVIDE(HAL_PCD_EP_Abort = 0x0805f173); +PROVIDE(usb_dc_attach = 0x0804b3f5); +PROVIDE(mipi_dsi_dcs_read = 0x0805bdff); +PROVIDE(__dtox_engine = 0x08061397); +PROVIDE(stm32_dma_is_ht_irq_active = 0x0804dfe9); +PROVIDE(stm32_dma_get_fifo_threshold = 0x0804e1b9); +PROVIDE(cbpprintf_external = 0x0805a01d); +PROVIDE(HAL_RCC_GetSysClockFreq = 0x0805289d); +PROVIDE(llext_file_offset = 0x0805c2e9); PROVIDE(__gtdf2 = 0x08040ac9); -PROVIDE(stm32_dma_is_enabled_stream = 0x0804dea9); -PROVIDE(atol = 0x08060dab); -PROVIDE(HAL_SDRAM_ProgramRefreshRate = 0x0805f4fd); -PROVIDE(k_msgq_init = 0x0805fe03); -PROVIDE(z_shell_log_backend_output_func = 0x0805b58d); -PROVIDE(sys_timepoint_timeout = 0x08060931); -PROVIDE(stm32_dma_is_unexpected_irq_happened = 0x0804de25); -PROVIDE(HAL_LTDC_SetPixelFormat = 0x0805eb2d); -PROVIDE(arch_elf_relocate = 0x0804859d); -PROVIDE(z_thread_entry = 0x08043835); -PROVIDE(z_impl_k_yield = 0x0805758d); -PROVIDE(USB_ActivateEndpoint = 0x0805f879); +PROVIDE(stm32_dma_is_enabled_stream = 0x0804e099); +PROVIDE(atol = 0x08060fab); +PROVIDE(HAL_SDRAM_ProgramRefreshRate = 0x0805f6fd); +PROVIDE(k_msgq_init = 0x08060003); +PROVIDE(z_shell_log_backend_output_func = 0x0805b78d); +PROVIDE(sys_timepoint_timeout = 0x08060b31); +PROVIDE(stm32_dma_is_unexpected_irq_happened = 0x0804e015); +PROVIDE(HAL_LTDC_SetPixelFormat = 0x0805ed2d); +PROVIDE(arch_elf_relocate = 0x0804878d); +PROVIDE(z_thread_entry = 0x08043a25); +PROVIDE(z_impl_k_yield = 0x0805777d); +PROVIDE(USB_ActivateEndpoint = 0x0805fa79); PROVIDE(__aeabi_d2lz = 0x08041193); -PROVIDE(__do_global_ctors_aux = 0x080563f1); -PROVIDE(arch_float_enable = 0x0805bd0b); -PROVIDE(FMC_SDRAM_ProgramRefreshRate = 0x0805f5fb); -PROVIDE(usb_transfer_is_busy = 0x0805a50b); -PROVIDE(USB_EPStartXfer = 0x08055cc9); +PROVIDE(__do_global_ctors_aux = 0x080565e1); +PROVIDE(arch_float_enable = 0x0805bf0b); +PROVIDE(FMC_SDRAM_ProgramRefreshRate = 0x0805f7fb); +PROVIDE(usb_transfer_is_busy = 0x0805a70b); +PROVIDE(USB_EPStartXfer = 0x08055eb9); PROVIDE(strtold = 0x08041819); -PROVIDE(z_impl_k_thread_stack_free = 0x08060c77); -PROVIDE(z_shell_fprintf = 0x0805b363); -PROVIDE(__shiftright128 = 0x08061159); -PROVIDE(HAL_LTDC_Init = 0x0805ea15); -PROVIDE(dma_stm32_is_te_active = 0x0804dd11); -PROVIDE(soc_early_init_hook = 0x0804391d); -PROVIDE(shell_uninit = 0x0805a9ed); -PROVIDE(z_impl_k_pipe_init = 0x08060653); +PROVIDE(z_impl_k_thread_stack_free = 0x08060e77); +PROVIDE(z_shell_fprintf = 0x0805b563); +PROVIDE(__shiftright128 = 0x08061359); +PROVIDE(HAL_LTDC_Init = 0x0805ec15); +PROVIDE(dma_stm32_is_te_active = 0x0804df01); +PROVIDE(soc_early_init_hook = 0x08043b0d); +PROVIDE(shell_uninit = 0x0805abed); +PROVIDE(z_impl_k_pipe_init = 0x08060853); PROVIDE(__aeabi_cdcmple = 0x08040b65); PROVIDE(__aeabi_fadd = 0x08040d41); -PROVIDE(USB_EPSetStall = 0x0805f9f9); -PROVIDE(shared_multi_heap_aligned_alloc = 0x08043075); +PROVIDE(USB_EPSetStall = 0x0805fbf9); +PROVIDE(shared_multi_heap_aligned_alloc = 0x08043265); PROVIDE(__subsf3 = 0x08040d3d); -PROVIDE(k_thread_foreach = 0x08057b01); -PROVIDE(usb_dc_ep_read_continue = 0x0804b94d); -PROVIDE(k_work_init_delayable = 0x08060321); -PROVIDE(USB_SetDevSpeed = 0x0805f855); -PROVIDE(usb_transfer = 0x08045315); -PROVIDE(USB_EnableGlobalInt = 0x0805f759); -PROVIDE(k_queue_append = 0x08060123); -PROVIDE(HAL_DMA_Start_IT = 0x08053219); -PROVIDE(sys_clock_cycle_get_64 = 0x08051aa9); -PROVIDE(HAL_DSI_ConfigVideoMode = 0x080545e5); -PROVIDE(z_log_get_tag = 0x0805a1e5); -PROVIDE(stm32_i2c_error_isr = 0x0805d18f); -PROVIDE(__fpclassifyl = 0x08059675); -PROVIDE(z_shell_backend_rx_buffer_flush = 0x0805b45d); -PROVIDE(z_impl_k_timer_stop = 0x0806098b); -PROVIDE(z_dummy_thread_init = 0x08057041); -PROVIDE(flash_stm32_page_layout = 0x0804f0a1); -PROVIDE(z_impl_k_thread_stack_space_get = 0x080603af); -PROVIDE(USB_FlushRxFifo = 0x0805f813); -PROVIDE(z_impl_k_thread_priority_get = 0x08060367); -PROVIDE(z_impl_k_msgq_put = 0x080564a1); -PROVIDE(cbprintf_package_convert = 0x080434a9); -PROVIDE(sys_heap_aligned_alloc = 0x08059a97); -PROVIDE(stm32_i2c_configure_timing = 0x0804fc15); -PROVIDE(k_heap_init = 0x0805fcaf); +PROVIDE(k_thread_foreach = 0x08057cf1); +PROVIDE(usb_dc_ep_read_continue = 0x0804bb3d); +PROVIDE(k_work_init_delayable = 0x08060521); +PROVIDE(USB_SetDevSpeed = 0x0805fa55); +PROVIDE(usb_transfer = 0x08045505); +PROVIDE(USB_EnableGlobalInt = 0x0805f959); +PROVIDE(k_queue_append = 0x08060323); +PROVIDE(HAL_DMA_Start_IT = 0x08053409); +PROVIDE(sys_clock_cycle_get_64 = 0x08051c99); +PROVIDE(HAL_DSI_ConfigVideoMode = 0x080547d5); +PROVIDE(z_log_get_tag = 0x0805a3e5); +PROVIDE(stm32_i2c_error_isr = 0x0805d38f); +PROVIDE(__fpclassifyl = 0x08059865); +PROVIDE(z_shell_backend_rx_buffer_flush = 0x0805b65d); +PROVIDE(z_impl_k_timer_stop = 0x08060b8b); +PROVIDE(z_dummy_thread_init = 0x08057231); +PROVIDE(flash_stm32_page_layout = 0x0804f291); +PROVIDE(z_impl_k_thread_stack_space_get = 0x080605af); +PROVIDE(USB_FlushRxFifo = 0x0805fa13); +PROVIDE(z_impl_k_thread_priority_get = 0x08060567); +PROVIDE(z_impl_k_msgq_put = 0x08056691); +PROVIDE(cbprintf_package_convert = 0x08043699); +PROVIDE(sys_heap_aligned_alloc = 0x08059c87); +PROVIDE(stm32_i2c_configure_timing = 0x0804fe05); +PROVIDE(k_heap_init = 0x0805feaf); PROVIDE(__atod_engine = 0x08041bb1); -PROVIDE(k_sys_fatal_error_handler = 0x08056099); -PROVIDE(arch_icache_enable = 0x08049429); -PROVIDE(FMC_SDRAM_Timing_Init = 0x0805f553); -PROVIDE(HAL_PCD_ResumeCallback = 0x0804bab5); -PROVIDE(memcpy = 0x08060c7d); +PROVIDE(k_sys_fatal_error_handler = 0x08056289); +PROVIDE(arch_icache_enable = 0x08049619); +PROVIDE(FMC_SDRAM_Timing_Init = 0x0805f753); +PROVIDE(HAL_PCD_ResumeCallback = 0x0804bca5); +PROVIDE(memcpy = 0x08060e7d); PROVIDE(__aeabi_cdrcmple = 0x08040b55); -PROVIDE(__log10Pow5 = 0x0805942d); -PROVIDE(z_shell_find_cmd = 0x0805aec7); -PROVIDE(log_output_process = 0x08043f65); -PROVIDE(z_work_submit_to_queue = 0x080602db); -PROVIDE(dmamux_stm32_get_status = 0x0804e011); -PROVIDE(HAL_DCMI_Init = 0x08052835); -PROVIDE(__math_invalid = 0x08042399); -PROVIDE(z_do_kernel_oops = 0x0805bcbb); -PROVIDE(z_shell_op_right_arrow = 0x0805b223); -PROVIDE(z_getopt_global_state_update = 0x08049771); +PROVIDE(__log10Pow5 = 0x0805961d); +PROVIDE(z_shell_find_cmd = 0x0805b0c7); +PROVIDE(log_output_process = 0x08044155); +PROVIDE(z_work_submit_to_queue = 0x080604db); +PROVIDE(dmamux_stm32_get_status = 0x0804e201); +PROVIDE(HAL_DCMI_Init = 0x08052a25); +PROVIDE(__math_invalid = 0x08042571); +PROVIDE(z_do_kernel_oops = 0x0805bebb); +PROVIDE(z_shell_op_right_arrow = 0x0805b423); +PROVIDE(z_getopt_global_state_update = 0x08049961); PROVIDE(__aeabi_fcmpgt = 0x08041029); PROVIDE(__floatsidf = 0x080405d1); -PROVIDE(z_impl_flash_fill = 0x08047e15); -PROVIDE(z_shell_vfprintf = 0x0805b317); -PROVIDE(dma_stm32_clear_ht = 0x0804dca5); -PROVIDE(llext_buf_seek = 0x0805c189); -PROVIDE(sinl = 0x08042291); +PROVIDE(z_impl_flash_fill = 0x08048005); +PROVIDE(z_shell_vfprintf = 0x0805b517); +PROVIDE(dma_stm32_clear_ht = 0x0804de95); +PROVIDE(llext_buf_seek = 0x0805c389); +PROVIDE(sinl = 0x08042469); PROVIDE(__ltdf2 = 0x08040ad1); -PROVIDE(z_sched_wake_thread = 0x0806046d); -PROVIDE(usb_dc_ep_set_callback = 0x0805c203); -PROVIDE(z_cstart = 0x0805632d); +PROVIDE(z_sched_wake_thread = 0x0806066d); +PROVIDE(usb_dc_ep_set_callback = 0x0805c403); +PROVIDE(z_cstart = 0x0805651d); PROVIDE(__aeabi_uldivmod = 0x08041109); -PROVIDE(flash_stm32_block_erase_loop = 0x0804f655); -PROVIDE(puts = 0x080581b5); -PROVIDE(HAL_DSI_SetLowPowerRXFilter = 0x0805e8ad); -PROVIDE(z_impl_k_pipe_read = 0x080578d1); -PROVIDE(islower = 0x08060d31); -PROVIDE(stm32_gpio_intc_disable_line = 0x0805c1d3); -PROVIDE(HAL_Delay = 0x0805a16d); -PROVIDE(__fpclassifyd = 0x08059675); -PROVIDE(tolower = 0x08060d85); -PROVIDE(HAL_PCD_EP_Transmit = 0x0805ee67); -PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x0804fb55); -PROVIDE(log_msg_get_source_id = 0x08043f0d); -PROVIDE(dma_stm32_get_status = 0x0804d529); -PROVIDE(mipi_dsi_dcs_write = 0x0805bc33); -PROVIDE(__wrap_malloc = 0x08049575); -PROVIDE(usb_dc_ep_read_wait = 0x0804b881); -PROVIDE(flash_area_read = 0x0805a429); +PROVIDE(flash_stm32_block_erase_loop = 0x0804f845); +PROVIDE(puts = 0x080583a5); +PROVIDE(HAL_DSI_SetLowPowerRXFilter = 0x0805eaad); +PROVIDE(z_impl_k_pipe_read = 0x08057ac1); +PROVIDE(islower = 0x08060f31); +PROVIDE(stm32_gpio_intc_disable_line = 0x0805c3d3); +PROVIDE(HAL_Delay = 0x0805a36d); +PROVIDE(__fpclassifyd = 0x08059865); +PROVIDE(tolower = 0x08060f85); +PROVIDE(HAL_PCD_EP_Transmit = 0x0805f067); +PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x0804fd45); +PROVIDE(log_msg_get_source_id = 0x080440fd); +PROVIDE(dma_stm32_get_status = 0x0804d719); +PROVIDE(mipi_dsi_dcs_write = 0x0805be33); +PROVIDE(__wrap_malloc = 0x08049765); +PROVIDE(usb_dc_ep_read_wait = 0x0804ba71); +PROVIDE(flash_area_read = 0x0805a629); PROVIDE(__udivsi3 = 0x080402d9); -PROVIDE(z_init_static = 0x0805fca1); -PROVIDE(z_shell_spaces_trim = 0x0805af7b); -PROVIDE(shell_process = 0x08046a7d); -PROVIDE(sys_clock_isr = 0x080518e9); +PROVIDE(z_init_static = 0x0805fea1); +PROVIDE(z_shell_spaces_trim = 0x0805b17b); +PROVIDE(shell_process = 0x08046c6d); +PROVIDE(sys_clock_isr = 0x08051ad9); PROVIDE(__aeabi_i2f = 0x08040ea9); -PROVIDE(z_impl_k_thread_join = 0x0805782d); -PROVIDE(__aeabi_memmove8 = 0x08060c99); -PROVIDE(arch_spin_relax = 0x0805fdcf); -PROVIDE(z_log_msg_finalize = 0x0805a26b); -PROVIDE(z_impl_k_thread_name_copy = 0x08060371); -PROVIDE(z_impl_k_mutex_lock = 0x08056629); -PROVIDE(__kernel_cos = 0x080423c9); -PROVIDE(ldexp = 0x08042c89); +PROVIDE(z_impl_k_thread_join = 0x08057a1d); +PROVIDE(__aeabi_memmove8 = 0x08060e99); +PROVIDE(arch_spin_relax = 0x0805ffcf); +PROVIDE(z_log_msg_finalize = 0x0805a46b); +PROVIDE(z_impl_k_thread_name_copy = 0x08060571); +PROVIDE(z_impl_k_mutex_lock = 0x08056819); +PROVIDE(__kernel_cos = 0x080425a1); +PROVIDE(ldexp = 0x08042e61); PROVIDE(__lesf2 = 0x08040f59); -PROVIDE(z_impl_k_condvar_wait = 0x08056e05); -PROVIDE(k_work_schedule = 0x08056cd5); +PROVIDE(z_impl_k_condvar_wait = 0x08056ff5); +PROVIDE(k_work_schedule = 0x08056ec5); PROVIDE(__fixunsdfsi = 0x08040c55); -PROVIDE(z_log_notify_backend_enabled = 0x0805a1db); -PROVIDE(z_shell_op_cursor_vert_move = 0x08047539); -PROVIDE(__aeabi_memcpy = 0x08060c7d); -PROVIDE(z_sched_init = 0x080574fd); -PROVIDE(input_report = 0x08049879); -PROVIDE(llext_call_fn = 0x0805bfdf); -PROVIDE(HAL_DSI_ConfigPhyTimer = 0x0805e5bd); -PROVIDE(HAL_DCMI_FrameEventCallback = 0x08052635); -PROVIDE(_OffsetAbsSyms = 0x080596c1); -PROVIDE(z_unpend_all = 0x080604eb); -PROVIDE(usb_dc_set_status_callback = 0x0804b48d); -PROVIDE(z_shell_history_mode_exit = 0x0805b87f); -PROVIDE(z_impl_k_sem_take = 0x08056895); -PROVIDE(__printk_hook_install = 0x0804380d); -PROVIDE(strtoul = 0x08058389); +PROVIDE(z_log_notify_backend_enabled = 0x0805a3db); +PROVIDE(z_shell_op_cursor_vert_move = 0x08047729); +PROVIDE(__aeabi_memcpy = 0x08060e7d); +PROVIDE(z_sched_init = 0x080576ed); +PROVIDE(input_report = 0x08049a69); +PROVIDE(llext_call_fn = 0x0805c1df); +PROVIDE(HAL_DSI_ConfigPhyTimer = 0x0805e7bd); +PROVIDE(HAL_DCMI_FrameEventCallback = 0x08052825); +PROVIDE(_OffsetAbsSyms = 0x080598b1); +PROVIDE(z_unpend_all = 0x080606eb); +PROVIDE(usb_dc_set_status_callback = 0x0804b67d); +PROVIDE(z_shell_history_mode_exit = 0x0805ba7f); +PROVIDE(z_impl_k_sem_take = 0x08056a85); +PROVIDE(__printk_hook_install = 0x080439fd); +PROVIDE(strtoul = 0x08058579); PROVIDE(__aeabi_ui2d = 0x080405b1); -PROVIDE(z_shell_wildcard_process = 0x08047d31); -PROVIDE(shell_start = 0x0805a9fd); -PROVIDE(k_heap_aligned_alloc = 0x0805fcc5); -PROVIDE(HAL_QSPI_RxCpltCallback = 0x0805cde3); -PROVIDE(k_sched_lock = 0x0805746d); +PROVIDE(z_shell_wildcard_process = 0x08047f21); +PROVIDE(shell_start = 0x0805abfd); +PROVIDE(k_heap_aligned_alloc = 0x0805fec5); +PROVIDE(HAL_QSPI_RxCpltCallback = 0x0805cfe3); +PROVIDE(k_sched_lock = 0x0805765d); PROVIDE(__udivmoddi4 = 0x080411c3); PROVIDE(__aeabi_drsub = 0x0804032d); -PROVIDE(sys_clock_set_timeout = 0x08051949); -PROVIDE(shell_fprintf_warn = 0x0805ab33); -PROVIDE(usb_dc_detach = 0x0804b9a9); -PROVIDE(sys_clock_cycle_get_32 = 0x08051a81); -PROVIDE(z_shell_op_word_remove = 0x0804768d); -PROVIDE(arch_dcache_enable = 0x08049349); -PROVIDE(llext_free_inspection_data = 0x08049db9); -PROVIDE(HAL_PCD_MspInit = 0x0805eb93); -PROVIDE(USB_DevInit = 0x08055a89); -PROVIDE(hex2bin = 0x08059f89); -PROVIDE(HAL_PCD_EP_SetStall = 0x0805ee9b); -PROVIDE(stm32_dma_clear_stream_irq = 0x0805cb3f); -PROVIDE(z_sched_wait = 0x080578ad); -PROVIDE(isspace = 0x08060d49); +PROVIDE(sys_clock_set_timeout = 0x08051b39); +PROVIDE(shell_fprintf_warn = 0x0805ad33); +PROVIDE(usb_dc_detach = 0x0804bb99); +PROVIDE(sys_clock_cycle_get_32 = 0x08051c71); +PROVIDE(z_shell_op_word_remove = 0x0804787d); +PROVIDE(arch_dcache_enable = 0x08049539); +PROVIDE(llext_free_inspection_data = 0x08049fa9); +PROVIDE(HAL_PCD_MspInit = 0x0805ed93); +PROVIDE(USB_DevInit = 0x08055c79); +PROVIDE(hex2bin = 0x0805a189); +PROVIDE(HAL_PCD_EP_SetStall = 0x0805f09b); +PROVIDE(stm32_dma_clear_stream_irq = 0x0805cd3f); +PROVIDE(sys_multi_heap_alloc = 0x08059fcb); +PROVIDE(z_sched_wait = 0x08057a9d); +PROVIDE(isspace = 0x08060f49); PROVIDE(__aeabi_dcmplt = 0x08040b89); -PROVIDE(__aeabi_memmove = 0x08060c99); -PROVIDE(HAL_QSPI_ErrorCallback = 0x0805cdd1); -PROVIDE(dma_stm32_is_fe_active = 0x0804dd41); -PROVIDE(sys_clock_disable = 0x0805e117); -PROVIDE(arm_irq_disable = 0x0804915d); -PROVIDE(stm32_dma_get_pburst = 0x0804df71); -PROVIDE(z_shell_print_stream = 0x0805b313); -PROVIDE(HAL_QSPI_IRQHandler = 0x080550a1); -PROVIDE(__kernel_sin = 0x080429a1); +PROVIDE(__aeabi_memmove = 0x08060e99); +PROVIDE(HAL_QSPI_ErrorCallback = 0x0805cfd1); +PROVIDE(dma_stm32_is_fe_active = 0x0804df31); +PROVIDE(sys_clock_disable = 0x0805e317); +PROVIDE(arm_irq_disable = 0x0804934d); +PROVIDE(stm32_dma_get_pburst = 0x0804e161); +PROVIDE(z_shell_print_stream = 0x0805b513); +PROVIDE(HAL_QSPI_IRQHandler = 0x08055291); +PROVIDE(__kernel_sin = 0x08042b79); PROVIDE(__extendsfdf2 = 0x080405f5); -PROVIDE(USB_SetTurnaroundTime = 0x080559a9); -PROVIDE(dmamux_stm32_stop = 0x0804e0fd); +PROVIDE(USB_SetTurnaroundTime = 0x08055b99); +PROVIDE(dmamux_stm32_stop = 0x0804e2ed); PROVIDE(__aeabi_ddiv = 0x080408f9); -PROVIDE(shell_hexdump_line = 0x08047265); -PROVIDE(char2hex = 0x08059f59); -PROVIDE(llext_find_sym = 0x08049a19); +PROVIDE(shell_hexdump_line = 0x08047455); +PROVIDE(char2hex = 0x0805a159); +PROVIDE(llext_find_sym = 0x08049c09); PROVIDE(__adddf3 = 0x08040339); PROVIDE(__nesf2 = 0x08040f61); -PROVIDE(k_work_reschedule_for_queue = 0x08056ce1); +PROVIDE(k_work_reschedule_for_queue = 0x08056ed1); PROVIDE(CONFIG_ARCH_HAS_TIMING_FUNCTIONS = 0x00000001); -PROVIDE(z_impl_k_busy_wait = 0x0805fbbd); -PROVIDE(filter_set = 0x08043c35); +PROVIDE(z_impl_k_busy_wait = 0x0805fdbd); +PROVIDE(filter_set = 0x08043e25); PROVIDE(__aeabi_dmul = 0x080406a5); -PROVIDE(__aeabi_memcpy4 = 0x08060c7d); -PROVIDE(log_backend_disable = 0x0805a227); -PROVIDE(__do_init_array_aux = 0x0805640d); -PROVIDE(HAL_LTDC_ConfigLayer = 0x0805ead1); -PROVIDE(z_bss_zero = 0x080562a5); -PROVIDE(usb_dc_set_address = 0x0804b499); -PROVIDE(HAL_QSPI_Receive_IT = 0x0805f405); -PROVIDE(z_thread_monitor_exit = 0x08057ac5); -PROVIDE(sys_multi_heap_aligned_alloc = 0x08059ddb); -PROVIDE(arch_cpu_idle = 0x0805bd1f); -PROVIDE(z_impl_k_stack_push = 0x080601cd); -PROVIDE(HAL_PCD_EP_Open = 0x0805ed4d); -PROVIDE(z_shell_make_argv = 0x0805acd9); -PROVIDE(HAL_PCD_IRQHandler = 0x08054939); -PROVIDE(abort = 0x08049515); +PROVIDE(__aeabi_memcpy4 = 0x08060e7d); +PROVIDE(log_backend_disable = 0x0805a427); +PROVIDE(__do_init_array_aux = 0x080565fd); +PROVIDE(HAL_LTDC_ConfigLayer = 0x0805ecd1); +PROVIDE(z_bss_zero = 0x08056495); +PROVIDE(usb_dc_set_address = 0x0804b689); +PROVIDE(HAL_QSPI_Receive_IT = 0x0805f605); +PROVIDE(z_thread_monitor_exit = 0x08057cb5); +PROVIDE(sys_multi_heap_aligned_alloc = 0x08059fdb); +PROVIDE(arch_cpu_idle = 0x0805bf1f); +PROVIDE(z_impl_k_stack_push = 0x080603cd); +PROVIDE(HAL_PCD_EP_Open = 0x0805ef4d); +PROVIDE(z_shell_make_argv = 0x0805aed9); +PROVIDE(HAL_PCD_IRQHandler = 0x08054b29); +PROVIDE(abort = 0x08049705); PROVIDE(__floatunsidf = 0x080405b1); -PROVIDE(usb_transfer_ep_callback = 0x08045299); -PROVIDE(HAL_DSI_ConfigErrorMonitor = 0x0805e4b5); -PROVIDE(z_shell_print_cmd = 0x08047591); -PROVIDE(LL_TIM_StructInit = 0x0805f651); -PROVIDE(k_thread_foreach_unlocked = 0x08057b35); -PROVIDE(z_impl_k_sem_init = 0x08060171); -PROVIDE(z_shell_history_put = 0x0805b8f3); -PROVIDE(isxdigit = 0x08060d69); -PROVIDE(usb_dc_ep_is_stalled = 0x0805c243); -PROVIDE(stm32_clock_control_init = 0x0804c705); -PROVIDE(HAL_PCD_ConnectCallback = 0x0804ba79); -PROVIDE(strtol = 0x0805829d); -PROVIDE(__d_vfprintf = 0x0805858d); -PROVIDE(log_output_timestamp_freq_set = 0x08044245); -PROVIDE(strnlen = 0x08060e87); -PROVIDE(video_buffer_aligned_alloc = 0x08051ad9); +PROVIDE(usb_transfer_ep_callback = 0x08045489); +PROVIDE(HAL_DSI_ConfigErrorMonitor = 0x0805e6b5); +PROVIDE(z_shell_print_cmd = 0x08047781); +PROVIDE(LL_TIM_StructInit = 0x0805f851); +PROVIDE(k_thread_foreach_unlocked = 0x08057d25); +PROVIDE(z_impl_k_sem_init = 0x08060371); +PROVIDE(z_shell_history_put = 0x0805baf3); +PROVIDE(isxdigit = 0x08060f69); +PROVIDE(usb_dc_ep_is_stalled = 0x0805c443); +PROVIDE(stm32_clock_control_init = 0x0804c8f5); +PROVIDE(HAL_PCD_ConnectCallback = 0x0804bc69); +PROVIDE(strtol = 0x0805848d); +PROVIDE(__d_vfprintf = 0x0805877d); +PROVIDE(log_output_timestamp_freq_set = 0x08044435); +PROVIDE(strnlen = 0x08061087); +PROVIDE(video_buffer_aligned_alloc = 0x08051cc9); PROVIDE(__aeabi_d2f = 0x08040c95); -PROVIDE(llext_buf_peek = 0x0805c19d); -PROVIDE(z_log_vprintk = 0x0805a1bf); +PROVIDE(llext_buf_peek = 0x0805c39d); +PROVIDE(z_log_vprintk = 0x0805a3bf); PROVIDE(__aeabi_d2ulz = 0x08040299); -PROVIDE(z_impl_k_float_disable = 0x0805fdc7); +PROVIDE(z_impl_k_float_disable = 0x0805ffc7); PROVIDE(__aeabi_fsub = 0x08040d3d); -PROVIDE(__kernel_rem_pio2 = 0x08042499); -PROVIDE(HAL_DSI_ConfigFlowControl = 0x0805e595); -PROVIDE(z_sched_wake = 0x08060581); -PROVIDE(HAL_QSPI_TimeOutCallback = 0x0805cdf5); -PROVIDE(log_source_id_get = 0x08043bfd); -PROVIDE(USB_ReadPacket = 0x0805f9b9); -PROVIDE(HAL_QSPI_Command = 0x0805f1c5); -PROVIDE(USB_EPStopXfer = 0x0805f8f7); -PROVIDE(z_shell_print_prompt_and_cmd = 0x080478ad); +PROVIDE(__kernel_rem_pio2 = 0x08042671); +PROVIDE(HAL_DSI_ConfigFlowControl = 0x0805e795); +PROVIDE(z_sched_wake = 0x08060781); +PROVIDE(HAL_QSPI_TimeOutCallback = 0x0805cff5); +PROVIDE(log_source_id_get = 0x08043ded); +PROVIDE(USB_ReadPacket = 0x0805fbb9); +PROVIDE(HAL_QSPI_Command = 0x0805f3c5); +PROVIDE(USB_EPStopXfer = 0x0805faf7); +PROVIDE(z_shell_print_prompt_and_cmd = 0x08047a9d); PROVIDE(__aeabi_fcmpun = 0x0804103d); -PROVIDE(USB_DevConnect = 0x0805fb01); -PROVIDE(HAL_PCD_ISOOUTIncompleteCallback = 0x0805ed25); -PROVIDE(strrchr = 0x08060e9f); -PROVIDE(z_early_memcpy = 0x0805fc8b); -PROVIDE(z_impl_k_float_enable = 0x0805fdcb); +PROVIDE(USB_DevConnect = 0x0805fd01); +PROVIDE(HAL_PCD_ISOOUTIncompleteCallback = 0x0805ef25); +PROVIDE(strrchr = 0x0806109f); +PROVIDE(z_early_memcpy = 0x0805fe8b); +PROVIDE(z_impl_k_float_enable = 0x0805ffcb); PROVIDE(atanl = 0x08041d79); PROVIDE(__aeabi_fcmpge = 0x08041015); PROVIDE(__fixdfsi = 0x08040c05); -PROVIDE(z_impl_k_timer_status_sync = 0x08057f31); -PROVIDE(__wrap_calloc = 0x080495fd); -PROVIDE(z_impl_k_msgq_peek_at = 0x0805fea3); -PROVIDE(HAL_DSI_ShortWrite = 0x0805e691); -PROVIDE(usb_dc_ep_get_read_count = 0x0804b565); -PROVIDE(USB_ReadInterrupts = 0x0805fb39); -PROVIDE(HAL_PCD_ISOINIncompleteCallback = 0x0805c2db); -PROVIDE(z_timer_expiration_handler = 0x08057ddd); -PROVIDE(z_shell_cmd_trim = 0x0805afdb); +PROVIDE(z_impl_k_timer_status_sync = 0x08058121); +PROVIDE(__wrap_calloc = 0x080497ed); +PROVIDE(z_impl_k_msgq_peek_at = 0x080600a3); +PROVIDE(HAL_DSI_ShortWrite = 0x0805e891); +PROVIDE(usb_dc_ep_get_read_count = 0x0804b755); +PROVIDE(USB_ReadInterrupts = 0x0805fd39); +PROVIDE(HAL_PCD_ISOINIncompleteCallback = 0x0805c4db); +PROVIDE(z_timer_expiration_handler = 0x08057fcd); +PROVIDE(z_shell_cmd_trim = 0x0805b1db); PROVIDE(__floatdisf = 0x08040ed5); PROVIDE(strtod = 0x08041819); -PROVIDE(USB_EPClearStall = 0x0805fa4f); -PROVIDE(z_shell_cursor_in_empty_line = 0x0805b08d); -PROVIDE(z_impl_k_str_out = 0x08043819); -PROVIDE(k_aligned_alloc = 0x080580e5); -PROVIDE(HAL_DMAEx_MultiBufferStart_IT = 0x0805401d); -PROVIDE(stm32_dma_is_tc_irq_active = 0x0804ddcd); -PROVIDE(LL_TIM_Init = 0x080555f9); -PROVIDE(z_arm_exc_exit = 0x08048979); -PROVIDE(z_impl_hwinfo_get_reset_cause = 0x0804fad5); -PROVIDE(atof = 0x08060d9d); -PROVIDE(shell_init = 0x08047331); +PROVIDE(USB_EPClearStall = 0x0805fc4f); +PROVIDE(z_shell_cursor_in_empty_line = 0x0805b28d); +PROVIDE(z_impl_k_str_out = 0x08043a09); +PROVIDE(k_aligned_alloc = 0x080582d5); +PROVIDE(HAL_DMAEx_MultiBufferStart_IT = 0x0805420d); +PROVIDE(stm32_dma_is_tc_irq_active = 0x0804dfbd); +PROVIDE(LL_TIM_Init = 0x080557e9); +PROVIDE(z_arm_exc_exit = 0x08048b69); +PROVIDE(z_impl_hwinfo_get_reset_cause = 0x0804fcc5); +PROVIDE(atof = 0x08060f9d); +PROVIDE(shell_init = 0x08047521); PROVIDE(__gtsf2 = 0x08040f51); -PROVIDE(z_impl_log_buffered_cnt = 0x08043afd); -PROVIDE(stm32_dma_disable_fifo_irq = 0x0804def9); +PROVIDE(z_impl_log_buffered_cnt = 0x08043ced); +PROVIDE(stm32_dma_disable_fifo_irq = 0x0804e0e9); PROVIDE(__aeabi_dadd = 0x08040339); -PROVIDE(k_work_reschedule = 0x08056d3d); -PROVIDE(HAL_QSPI_Transmit_IT = 0x0805f395); +PROVIDE(k_work_reschedule = 0x08056f2d); +PROVIDE(HAL_QSPI_Transmit_IT = 0x0805f595); PROVIDE(__ledf2 = 0x08040ad1); -PROVIDE(__aeabi_memcpy8 = 0x08060c7d); -PROVIDE(z_impl_k_timer_status_get = 0x080609c3); -PROVIDE(k_free = 0x08060c5d); -PROVIDE(z_stack_space_get = 0x08060397); -PROVIDE(strcat = 0x08060e0b); +PROVIDE(__aeabi_memcpy8 = 0x08060e7d); +PROVIDE(z_impl_k_timer_status_get = 0x08060bc3); +PROVIDE(k_free = 0x08060e5d); +PROVIDE(z_stack_space_get = 0x08060597); +PROVIDE(strcat = 0x0806100b); PROVIDE(__aeabi_fcmple = 0x08041001); -PROVIDE(__math_oflow = 0x08042d81); -PROVIDE(z_shell_op_cursor_home_move = 0x0805b1f1); -PROVIDE(HAL_PCD_MspDeInit = 0x0805ec6f); +PROVIDE(__math_oflow = 0x08042f59); +PROVIDE(z_shell_op_cursor_home_move = 0x0805b3f1); +PROVIDE(HAL_PCD_MspDeInit = 0x0805ee6f); PROVIDE(__aeabi_ul2d = 0x08040639); -PROVIDE(usb_dc_ep_write = 0x0804b775); +PROVIDE(usb_dc_ep_write = 0x0804b965); PROVIDE(__popcountsi2 = 0x0804116d); -PROVIDE(z_impl_k_stack_alloc_init = 0x080601a5); -PROVIDE(arch_switch_to_main_thread = 0x080492ad); -PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x0805a32b); -PROVIDE(scalbnl = 0x08042c89); -PROVIDE(z_data_copy = 0x08057b7d); +PROVIDE(z_impl_k_stack_alloc_init = 0x080603a5); +PROVIDE(arch_switch_to_main_thread = 0x0804949d); +PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x0805a52b); +PROVIDE(scalbnl = 0x08042e61); +PROVIDE(z_data_copy = 0x08057d6d); PROVIDE(__aeabi_idiv = 0x080402fd); -PROVIDE(HAL_PCDEx_ActivateLPM = 0x0805efd9); -PROVIDE(z_shell_get_last_command = 0x0805af1f); -PROVIDE(__start = 0x08048ff5); -PROVIDE(USB_GetMode = 0x0805fb95); -PROVIDE(z_impl_k_condvar_signal = 0x08056d49); -PROVIDE(z_impl_flash_get_page_info_by_idx = 0x0805cc79); -PROVIDE(dma_stm32_clear_tc = 0x0804dcb1); -PROVIDE(LL_RCC_GetPLL1ClockFreq = 0x0805548d); -PROVIDE(mipi_dsi_generic_write = 0x0805bbb7); -PROVIDE(z_impl_k_thread_abort = 0x0804905d); -PROVIDE(z_early_memset = 0x0805fc87); -PROVIDE(z_impl_k_queue_init = 0x0806009f); -PROVIDE(__log2pow5 = 0x08059439); -PROVIDE(dma_stm32_is_ht_active = 0x0804dcbd); -PROVIDE(llext_bringup = 0x0805bff5); -PROVIDE(k_thread_name_get = 0x0806036d); +PROVIDE(HAL_PCDEx_ActivateLPM = 0x0805f1d9); +PROVIDE(z_shell_get_last_command = 0x0805b11f); +PROVIDE(__start = 0x080491e5); +PROVIDE(USB_GetMode = 0x0805fd95); +PROVIDE(z_impl_k_condvar_signal = 0x08056f39); +PROVIDE(z_impl_flash_get_page_info_by_idx = 0x0805ce79); +PROVIDE(dma_stm32_clear_tc = 0x0804dea1); +PROVIDE(LL_RCC_GetPLL1ClockFreq = 0x0805567d); +PROVIDE(mipi_dsi_generic_write = 0x0805bdb7); +PROVIDE(z_impl_k_thread_abort = 0x0804924d); +PROVIDE(z_early_memset = 0x0805fe87); +PROVIDE(z_impl_k_queue_init = 0x0806029f); +PROVIDE(__log2pow5 = 0x08059629); +PROVIDE(dma_stm32_is_ht_active = 0x0804dead); +PROVIDE(llext_bringup = 0x0805c1f5); +PROVIDE(k_thread_name_get = 0x0806056d); PROVIDE(__aeabi_dcmpgt = 0x08040bc5); -PROVIDE(ring_buf_put = 0x0805a095); -PROVIDE(ring_buf_area_finish = 0x0805a063); -PROVIDE(z_impl_k_queue_peek_head = 0x08060161); -PROVIDE(USB_ReadDevOutEPInterrupt = 0x0805fb61); -PROVIDE(cos = 0x08041f79); -PROVIDE(shell_fprintf_error = 0x0805ab4f); -PROVIDE(usb_cancel_transfers = 0x0804548d); -PROVIDE(z_impl_k_uptime_ticks = 0x080608e5); -PROVIDE(arch_printk_char_out = 0x08059ec9); -PROVIDE(z_impl_flash_get_page_count = 0x0805cc83); +PROVIDE(ring_buf_put = 0x0805a295); +PROVIDE(ring_buf_area_finish = 0x0805a263); +PROVIDE(z_impl_k_queue_peek_head = 0x08060361); +PROVIDE(USB_ReadDevOutEPInterrupt = 0x0805fd61); +PROVIDE(cos = 0x08042151); +PROVIDE(shell_fprintf_error = 0x0805ad4f); +PROVIDE(usb_cancel_transfers = 0x0804567d); +PROVIDE(z_impl_k_uptime_ticks = 0x08060ae5); +PROVIDE(arch_printk_char_out = 0x0805a0c9); +PROVIDE(z_impl_flash_get_page_count = 0x0805ce83); PROVIDE(__aeabi_dcmpge = 0x08040bb1); -PROVIDE(dma_stm32_clear_fe = 0x0804dd05); -PROVIDE(HAL_PCDEx_SetTxFiFo = 0x0805ef93); -PROVIDE(FMC_SDRAM_SendCommand = 0x0805f5d7); -PROVIDE(__umul128 = 0x08061123); -PROVIDE(usb_dc_ep_configure = 0x0805c219); -PROVIDE(HAL_DCMI_Start_DMA = 0x080528bd); -PROVIDE(usb_dc_ep_start_read = 0x0804b4dd); -PROVIDE(z_shell_op_char_delete = 0x0805b3f9); +PROVIDE(dma_stm32_clear_fe = 0x0804def5); +PROVIDE(HAL_PCDEx_SetTxFiFo = 0x0805f193); +PROVIDE(FMC_SDRAM_SendCommand = 0x0805f7d7); +PROVIDE(__umul128 = 0x08061323); +PROVIDE(usb_dc_ep_configure = 0x0805c419); +PROVIDE(HAL_DCMI_Start_DMA = 0x08052aad); +PROVIDE(usb_dc_ep_start_read = 0x0804b6cd); +PROVIDE(z_shell_op_char_delete = 0x0805b5f9); PROVIDE(__aeabi_dsub = 0x08040335); -PROVIDE(HAL_PCD_DataOutStageCallback = 0x0805c28b); -PROVIDE(idle = 0x0805fdd3); -PROVIDE(z_shell_log_backend_enable = 0x0805b5a1); -PROVIDE(z_impl_flash_copy = 0x0805bac1); -PROVIDE(z_impl_k_sem_give = 0x0805681d); -PROVIDE(strstr = 0x08060ecb); -PROVIDE(k_stack_init = 0x08060191); -PROVIDE(HAL_PCD_EP_GetRxCount = 0x0805ee57); -PROVIDE(do_llext_load = 0x08049de9); -PROVIDE(sin = 0x08042291); +PROVIDE(HAL_PCD_DataOutStageCallback = 0x0805c48b); +PROVIDE(idle = 0x0805ffd3); +PROVIDE(z_shell_log_backend_enable = 0x0805b7a1); +PROVIDE(z_impl_flash_copy = 0x0805bcc1); +PROVIDE(z_impl_k_sem_give = 0x08056a0d); +PROVIDE(strstr = 0x080610cb); +PROVIDE(k_stack_init = 0x08060391); +PROVIDE(HAL_PCD_EP_GetRxCount = 0x0805f057); +PROVIDE(do_llext_load = 0x08049fd9); +PROVIDE(sin = 0x08042469); PROVIDE(__floatundidf = 0x08040639); -PROVIDE(rand = 0x08060db3); -PROVIDE(z_impl_k_pipe_close = 0x0806083b); -PROVIDE(__cxa_pure_virtual = 0x080596cf); -PROVIDE(thread_is_sliceable = 0x080579d9); -PROVIDE(z_impl_log_filter_set = 0x0805a1e9); -PROVIDE(HAL_PCDEx_LPM_Callback = 0x0805efff); -PROVIDE(k_heap_free = 0x0805fd5b); -PROVIDE(llext_by_name = 0x080499a5); -PROVIDE(HAL_DMA_Abort = 0x08053475); -PROVIDE(z_impl_log_panic = 0x08043ac1); -PROVIDE(__rem_pio2 = 0x08042011); +PROVIDE(rand = 0x08060fb3); +PROVIDE(z_impl_k_pipe_close = 0x08060a3b); +PROVIDE(__cxa_pure_virtual = 0x080598bf); +PROVIDE(thread_is_sliceable = 0x08057bc9); +PROVIDE(z_impl_log_filter_set = 0x0805a3e9); +PROVIDE(HAL_PCDEx_LPM_Callback = 0x0805f1ff); +PROVIDE(k_heap_free = 0x0805ff5b); +PROVIDE(llext_by_name = 0x08049b95); +PROVIDE(atan2 = 0x08041f79); +PROVIDE(HAL_DMA_Abort = 0x08053665); +PROVIDE(z_impl_log_panic = 0x08043cb1); +PROVIDE(__rem_pio2 = 0x080421e9); PROVIDE(__floatsisf = 0x08040ea9); -PROVIDE(z_impl_k_poll = 0x08057fe5); -PROVIDE(usb_update_sn_string_descriptor = 0x08044e01); -PROVIDE(USB_StopDevice = 0x0805faa1); -PROVIDE(z_impl_k_sleep = 0x08060511); -PROVIDE(vprintk = 0x08059ecd); -PROVIDE(HAL_DSI_Start = 0x0805e643); -PROVIDE(z_queue_node_peek = 0x08060087); -PROVIDE(log_output_msg_process = 0x0805a3bd); -PROVIDE(dma_stm32_configure = 0x0804d691); -PROVIDE(isupper = 0x08060d5d); -PROVIDE(HAL_PCD_SetAddress = 0x0805ed27); -PROVIDE(strncmp = 0x08060e43); -PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x0805d047); -PROVIDE(k_thread_state_str = 0x08056e91); -PROVIDE(k_work_init = 0x080602c9); -PROVIDE(HAL_QSPI_FifoThresholdCallback = 0x0805f4bb); -PROVIDE(z_thread_timeout = 0x080604a7); -PROVIDE(z_impl_k_msgq_alloc_init = 0x0805fe2b); -PROVIDE(z_impl_device_is_ready = 0x0805fbdd); -PROVIDE(z_thread_prio_set = 0x08057345); -PROVIDE(z_impl_flash_flatten = 0x0805ba99); -PROVIDE(ring_buf_get = 0x0805a0d5); -PROVIDE(usb_get_dev_data_by_iface = 0x0805a4a5); -PROVIDE(__pow5Factor = 0x08059465); -PROVIDE(z_log_runtime_filters_init = 0x08043bc1); -PROVIDE(strncpy = 0x08060e67); -PROVIDE(z_thread_abort = 0x080576e9); -PROVIDE(z_pend_curr = 0x080572ed); +PROVIDE(z_impl_k_poll = 0x080581d5); +PROVIDE(usb_update_sn_string_descriptor = 0x08044ff1); +PROVIDE(USB_StopDevice = 0x0805fca1); +PROVIDE(z_impl_k_sleep = 0x08060711); +PROVIDE(vprintk = 0x0805a0cd); +PROVIDE(HAL_DSI_Start = 0x0805e843); +PROVIDE(z_queue_node_peek = 0x08060287); +PROVIDE(log_output_msg_process = 0x0805a5bd); +PROVIDE(dma_stm32_configure = 0x0804d881); +PROVIDE(isupper = 0x08060f5d); +PROVIDE(HAL_PCD_SetAddress = 0x0805ef27); +PROVIDE(strncmp = 0x08061043); +PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x0805d247); +PROVIDE(k_thread_state_str = 0x08057081); +PROVIDE(k_work_init = 0x080604c9); +PROVIDE(HAL_QSPI_FifoThresholdCallback = 0x0805f6bb); +PROVIDE(z_thread_timeout = 0x080606a7); +PROVIDE(z_impl_k_msgq_alloc_init = 0x0806002b); +PROVIDE(z_impl_device_is_ready = 0x0805fddd); +PROVIDE(z_thread_prio_set = 0x08057535); +PROVIDE(z_impl_flash_flatten = 0x0805bc99); +PROVIDE(ring_buf_get = 0x0805a2d5); +PROVIDE(usb_get_dev_data_by_iface = 0x0805a6a5); +PROVIDE(__pow5Factor = 0x08059655); +PROVIDE(z_log_runtime_filters_init = 0x08043db1); +PROVIDE(strncpy = 0x08061067); +PROVIDE(z_thread_abort = 0x080578d9); +PROVIDE(z_pend_curr = 0x080574dd); PROVIDE(__eqsf2 = 0x08040f61); -PROVIDE(_isr_wrapper = 0x08049325); -PROVIDE(strcasecmp = 0x08060ddb); -PROVIDE(tanl = 0x08042331); -PROVIDE(HAL_DSI_PatternGeneratorStart = 0x0805e873); -PROVIDE(HAL_QSPI_StatusMatchCallback = 0x0805cdef); -PROVIDE(z_arm_fault = 0x08048d91); -PROVIDE(z_impl_k_queue_cancel_wait = 0x080600b9); -PROVIDE(llext_adjust_mmu_permissions = 0x0805c05b); -PROVIDE(z_impl_k_poll_signal_check = 0x08060c2d); -PROVIDE(__wrap_realloc = 0x080495a9); -PROVIDE(HAL_DCMI_MspInit = 0x0805e419); -PROVIDE(HAL_PCD_SuspendCallback = 0x0804baa1); -PROVIDE(__file_str_put = 0x080612c5); -PROVIDE(z_reschedule = 0x080573e5); -PROVIDE(HAL_PCD_Stop = 0x0805ecdb); -PROVIDE(shell_help = 0x0805abcd); -PROVIDE(z_impl_k_msgq_peek = 0x0805fe71); -PROVIDE(sys_multi_heap_get_heap = 0x08059de7); +PROVIDE(_isr_wrapper = 0x08049515); +PROVIDE(strcasecmp = 0x08060fdb); +PROVIDE(tanl = 0x08042509); +PROVIDE(HAL_DSI_PatternGeneratorStart = 0x0805ea73); +PROVIDE(HAL_QSPI_StatusMatchCallback = 0x0805cfef); +PROVIDE(z_arm_fault = 0x08048f81); +PROVIDE(z_impl_k_queue_cancel_wait = 0x080602b9); +PROVIDE(llext_adjust_mmu_permissions = 0x0805c25b); +PROVIDE(z_impl_k_poll_signal_check = 0x08060e2d); +PROVIDE(__wrap_realloc = 0x08049799); +PROVIDE(HAL_DCMI_MspInit = 0x0805e619); +PROVIDE(HAL_PCD_SuspendCallback = 0x0804bc91); +PROVIDE(__file_str_put = 0x080614c5); +PROVIDE(z_reschedule = 0x080575d5); +PROVIDE(HAL_PCD_Stop = 0x0805eedb); +PROVIDE(shell_help = 0x0805adcd); +PROVIDE(z_impl_k_msgq_peek = 0x08060071); +PROVIDE(sys_multi_heap_get_heap = 0x08059fe7); PROVIDE(__aeabi_i2d = 0x080405d1); -PROVIDE(dma_stm32_start = 0x0805c84b); -PROVIDE(__aeabi_memmove4 = 0x08060c99); -PROVIDE(llext_read_symbol = 0x0805c137); -PROVIDE(usb_dc_ep_mps = 0x0805c279); -PROVIDE(_ConfigAbsSyms = 0x0805a15b); -PROVIDE(__dtoa_engine = 0x08058f71); -PROVIDE(memcmp = 0x08060dbb); -PROVIDE(stm32_gpio_intc_get_pin_irq_line = 0x0805c1cd); -PROVIDE(arm_irq_enable = 0x08049141); -PROVIDE(sys_reboot = 0x08043869); +PROVIDE(dma_stm32_start = 0x0805ca4b); +PROVIDE(__aeabi_memmove4 = 0x08060e99); +PROVIDE(llext_read_symbol = 0x0805c337); +PROVIDE(usb_dc_ep_mps = 0x0805c479); +PROVIDE(_ConfigAbsSyms = 0x0805a35b); +PROVIDE(__dtoa_engine = 0x08059161); +PROVIDE(memcmp = 0x08060fbb); +PROVIDE(stm32_gpio_intc_get_pin_irq_line = 0x0805c3cd); +PROVIDE(arm_irq_enable = 0x08049331); +PROVIDE(sys_reboot = 0x08043a59); PROVIDE(__floatundisf = 0x08040ec5); -PROVIDE(z_device_get_all_static = 0x08055fdd); -PROVIDE(z_arm_exc_spurious = 0x08048fe1); -PROVIDE(printk = 0x08059ed1); -PROVIDE(ring_buf_area_claim = 0x08059ff7); -PROVIDE(arch_system_halt = 0x0805fc43); -PROVIDE(log_filter_get = 0x08043d21); +PROVIDE(z_device_get_all_static = 0x080561cd); +PROVIDE(z_arm_exc_spurious = 0x080491d1); +PROVIDE(printk = 0x0805a0d1); +PROVIDE(ring_buf_area_claim = 0x0805a1f7); +PROVIDE(arch_system_halt = 0x0805fe43); +PROVIDE(log_filter_get = 0x08043f11); PROVIDE(__aeabi_ldiv0 = 0x08040329); -PROVIDE(isalpha = 0x08060cf7); +PROVIDE(isalpha = 0x08060ef7); PROVIDE(__divdf3 = 0x080408f9); -PROVIDE(usb_get_dev_data_by_cfg = 0x0805a48f); -PROVIDE(HAL_DMAEx_ChangeMemory = 0x08054381); -PROVIDE(z_log_msg_commit = 0x08043b39); -PROVIDE(usb_dc_ep_disable = 0x0804b725); +PROVIDE(usb_get_dev_data_by_cfg = 0x0805a68f); +PROVIDE(HAL_DMAEx_ChangeMemory = 0x08054571); +PROVIDE(z_log_msg_commit = 0x08043d29); +PROVIDE(usb_dc_ep_disable = 0x0804b915); PROVIDE(__aeabi_ui2f = 0x08040ea1); -PROVIDE(sys_heap_aligned_realloc = 0x08059b83); -PROVIDE(z_thread_aligned_alloc = 0x08058101); -PROVIDE(USB_GetDevSpeed = 0x0805f863); -PROVIDE(usb_get_dev_data_by_ep = 0x0805a4bf); -PROVIDE(k_sched_unlock = 0x08057495); -PROVIDE(z_arm_interrupt_init = 0x0804930d); -PROVIDE(HAL_QSPI_Command_IT = 0x0805f24d); +PROVIDE(sys_heap_aligned_realloc = 0x08059d73); +PROVIDE(z_thread_aligned_alloc = 0x080582f1); +PROVIDE(USB_GetDevSpeed = 0x0805fa63); +PROVIDE(usb_get_dev_data_by_ep = 0x0805a6bf); +PROVIDE(k_sched_unlock = 0x08057685); +PROVIDE(z_arm_interrupt_init = 0x080494fd); +PROVIDE(HAL_QSPI_Command_IT = 0x0805f44d); PROVIDE(__muldf3 = 0x080406a5); -PROVIDE(llext_copy_regions = 0x0805c025); -PROVIDE(HAL_GetTick = 0x0805a15d); -PROVIDE(z_shell_op_cond_next_line = 0x0805b0bd); -PROVIDE(LL_SetFlashLatency = 0x08055edd); -PROVIDE(stm32_i2c_event_isr = 0x0805d103); -PROVIDE(sys_multi_heap_add_heap = 0x08059d7f); -PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x0805a351); -PROVIDE(HAL_PCDEx_SetRxFiFo = 0x0805efd1); -PROVIDE(flash_stm32_write_range = 0x0805ce17); -PROVIDE(dma_stm32_stop = 0x0804d619); -PROVIDE(z_impl_k_poll_signal_init = 0x08060c1d); -PROVIDE(flash_area_open = 0x08044271); -PROVIDE(stm32_dma_dump_stream_irq = 0x0804dd59); +PROVIDE(llext_copy_regions = 0x0805c225); +PROVIDE(HAL_GetTick = 0x0805a35d); +PROVIDE(z_shell_op_cond_next_line = 0x0805b2bd); +PROVIDE(LL_SetFlashLatency = 0x080560cd); +PROVIDE(stm32_i2c_event_isr = 0x0805d303); +PROVIDE(sys_multi_heap_add_heap = 0x08059f6f); +PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x0805a551); +PROVIDE(HAL_PCDEx_SetRxFiFo = 0x0805f1d1); +PROVIDE(flash_stm32_write_range = 0x0805d017); +PROVIDE(dma_stm32_stop = 0x0804d809); +PROVIDE(z_impl_k_poll_signal_init = 0x08060e1d); +PROVIDE(flash_area_open = 0x08044461); +PROVIDE(stm32_dma_dump_stream_irq = 0x0804df49); PROVIDE(__cmpsf2 = 0x08040f61); -PROVIDE(shared_multi_heap_free = 0x08043069); -PROVIDE(HAL_QSPI_TxCpltCallback = 0x0805cde9); -PROVIDE(getopt = 0x08049679); -PROVIDE(memset = 0x08060ccd); -PROVIDE(fnmatch = 0x0805bf9b); -PROVIDE(k_timer_init = 0x08060973); -PROVIDE(HAL_DCMI_Stop = 0x080529bd); -PROVIDE(sys_heap_init = 0x08059cc7); -PROVIDE(main = 0x080596c3); -PROVIDE(z_impl_k_pipe_reset = 0x080607fb); -PROVIDE(z_impl_k_msgq_purge = 0x0805fee9); -PROVIDE(dma_stm32_clear_te = 0x0804dced); -PROVIDE(HAL_SDRAM_MspInit = 0x0805f4bd); +PROVIDE(shared_multi_heap_free = 0x08043241); +PROVIDE(HAL_QSPI_TxCpltCallback = 0x0805cfe9); +PROVIDE(getopt = 0x08049869); +PROVIDE(memset = 0x08060ecd); +PROVIDE(fnmatch = 0x0805c19b); +PROVIDE(k_timer_init = 0x08060b73); +PROVIDE(HAL_DCMI_Stop = 0x08052bad); +PROVIDE(sys_heap_init = 0x08059eb7); +PROVIDE(main = 0x080598b3); +PROVIDE(z_impl_k_pipe_reset = 0x080609fb); +PROVIDE(z_impl_k_msgq_purge = 0x080600e9); +PROVIDE(dma_stm32_clear_te = 0x0804dedd); +PROVIDE(HAL_SDRAM_MspInit = 0x0805f6bd); PROVIDE(__aeabi_l2f = 0x08040ed5); -PROVIDE(srand = 0x08060db7); +PROVIDE(srand = 0x08060fb7); PROVIDE(__ltsf2 = 0x08040f59); -PROVIDE(z_impl_k_thread_priority_set = 0x0805750d); -PROVIDE(z_impl_k_timer_start = 0x08057ebd); -PROVIDE(stm32_exti_get_line_src_port = 0x0804b195); -PROVIDE(z_row_span_with_buffer_offsets_get = 0x0805ac97); +PROVIDE(z_impl_k_thread_priority_set = 0x080576fd); +PROVIDE(z_impl_k_timer_start = 0x080580ad); +PROVIDE(stm32_exti_get_line_src_port = 0x0804b385); +PROVIDE(z_row_span_with_buffer_offsets_get = 0x0805ae97); PROVIDE(__aeabi_uidiv = 0x080402d9); -PROVIDE(flash_stm32_valid_range = 0x0804f31d); -PROVIDE(cbvprintf_package = 0x08043105); -PROVIDE(dmamux_stm32_reload = 0x0804e085); -PROVIDE(z_SysNmiOnReset = 0x08048555); -PROVIDE(z_irq_spurious = 0x0805bd03); -PROVIDE(z_impl_k_thread_stack_alloc = 0x08060c73); -PROVIDE(HAL_PCD_DeInit = 0x0805ec71); -PROVIDE(arm_irq_priority_set = 0x080491a1); +PROVIDE(flash_stm32_valid_range = 0x0804f50d); +PROVIDE(cbvprintf_package = 0x080432f5); +PROVIDE(dmamux_stm32_reload = 0x0804e275); +PROVIDE(z_SysNmiOnReset = 0x08048745); +PROVIDE(z_irq_spurious = 0x0805bf03); +PROVIDE(z_impl_k_thread_stack_alloc = 0x08060e73); +PROVIDE(HAL_PCD_DeInit = 0x0805ee71); +PROVIDE(arm_irq_priority_set = 0x08049391); PROVIDE(__truncdfsf2 = 0x08040c95); -PROVIDE(k_work_submit_to_queue = 0x08060301); -PROVIDE(assert_post_action = 0x08059eeb); -PROVIDE(enabled_clock = 0x0804c9a9); -PROVIDE(HAL_DCMI_LineEventCallback = 0x0805e46f); -PROVIDE(stm32_gpio_intc_remove_irq_callback = 0x0804b121); -PROVIDE(z_shell_has_wildcard = 0x0805b9ef); -PROVIDE(getopt_init = 0x08049631); +PROVIDE(k_work_submit_to_queue = 0x08060501); +PROVIDE(assert_post_action = 0x0805a0eb); +PROVIDE(enabled_clock = 0x0804cb99); +PROVIDE(HAL_DCMI_LineEventCallback = 0x0805e66f); +PROVIDE(stm32_gpio_intc_remove_irq_callback = 0x0804b311); +PROVIDE(z_shell_has_wildcard = 0x0805bbef); +PROVIDE(getopt_init = 0x08049821); PROVIDE(__aeabi_l2d = 0x08040649); -PROVIDE(HAL_DCMI_Resume = 0x0805e41b); -PROVIDE(isgraph = 0x08060d25); -PROVIDE(z_impl_k_queue_peek_tail = 0x08060169); -PROVIDE(arch_icache_disable = 0x0804945d); -PROVIDE(llext_buf_read = 0x0805c15f); -PROVIDE(sys_multi_heap_free = 0x08059e09); -PROVIDE(dma_stm32_id_to_stream = 0x0804dc99); -PROVIDE(log_source_name_get = 0x08043ba5); -PROVIDE(isalnum = 0x08060cdd); -PROVIDE(cosl = 0x08041f79); -PROVIDE(isprint = 0x08060d3d); -PROVIDE(sys_timepoint_calc = 0x080608e9); +PROVIDE(HAL_DCMI_Resume = 0x0805e61b); +PROVIDE(isgraph = 0x08060f25); +PROVIDE(z_impl_k_queue_peek_tail = 0x08060369); +PROVIDE(arch_icache_disable = 0x0804964d); +PROVIDE(llext_buf_read = 0x0805c35f); +PROVIDE(sys_multi_heap_free = 0x0805a009); +PROVIDE(dma_stm32_id_to_stream = 0x0804de89); +PROVIDE(log_source_name_get = 0x08043d95); +PROVIDE(isalnum = 0x08060edd); +PROVIDE(cosl = 0x08042151); +PROVIDE(isprint = 0x08060f3d); +PROVIDE(sys_timepoint_calc = 0x08060ae9); PROVIDE(__aeabi_ul2f = 0x08040ec5); -PROVIDE(__log10Pow2 = 0x08059421); -PROVIDE(arch_float_disable = 0x08049265); -PROVIDE(putc = 0x080612d5); +PROVIDE(__log10Pow2 = 0x08059611); +PROVIDE(arch_float_disable = 0x08049455); +PROVIDE(putc = 0x080614d5); PROVIDE(__aeabi_cfcmple = 0x08040fc9); PROVIDE(__divsi3 = 0x080402fd); -PROVIDE(camera_ext_clock_enable = 0x08042df9); -PROVIDE(dma_stm32_is_tc_active = 0x0804dcd5); -PROVIDE(z_arm_int_exit = 0x08048979); -PROVIDE(USB_CoreInit = 0x0805f6bd); -PROVIDE(z_thread_is_valid = 0x08045bdd); -PROVIDE(z_impl_k_condvar_broadcast = 0x08056d95); +PROVIDE(camera_ext_clock_enable = 0x08042fd1); +PROVIDE(dma_stm32_is_tc_active = 0x0804dec5); +PROVIDE(z_arm_int_exit = 0x08048b69); +PROVIDE(USB_CoreInit = 0x0805f8bd); +PROVIDE(z_thread_is_valid = 0x08045dcd); +PROVIDE(z_impl_k_condvar_broadcast = 0x08056f85); PROVIDE(strcmp = 0x08041139); -PROVIDE(z_impl_k_queue_alloc_append = 0x08060139); -PROVIDE(z_unpend1_no_timeout = 0x080604af); -PROVIDE(tan = 0x08042331); -PROVIDE(__stdout_hook_install = 0x080494fd); -PROVIDE(stm32_gpio_intc_enable_line = 0x0804b049); -PROVIDE(USB_DisableGlobalInt = 0x0805f765); +PROVIDE(z_impl_k_queue_alloc_append = 0x08060339); +PROVIDE(z_unpend1_no_timeout = 0x080606af); +PROVIDE(tan = 0x08042509); +PROVIDE(__stdout_hook_install = 0x080496ed); +PROVIDE(stm32_gpio_intc_enable_line = 0x0804b239); +PROVIDE(USB_DisableGlobalInt = 0x0805f965); PROVIDE(__fixunsdfdi = 0x08040299); PROVIDE(__nedf2 = 0x08040ad9); -PROVIDE(llext_dependency_remove_all = 0x0805c119); -PROVIDE(stm32_exti_set_line_src_port = 0x0804b145); -PROVIDE(LL_DMA_StructInit = 0x0805f52d); -PROVIDE(llext_copy_strings = 0x0805c001); -PROVIDE(sys_heap_alloc = 0x08059a27); -PROVIDE(HAL_PCD_Start = 0x0805ec9b); -PROVIDE(pinctrl_lookup_state = 0x0805d67d); -PROVIDE(z_arm_debug_monitor = 0x08048fe1); -PROVIDE(USB_SetCurrentMode = 0x0805f771); -PROVIDE(z_shell_wildcard_prepare = 0x0805ba17); -PROVIDE(z_device_state_init = 0x0805fbdb); +PROVIDE(llext_dependency_remove_all = 0x0805c319); +PROVIDE(stm32_exti_set_line_src_port = 0x0804b335); +PROVIDE(LL_DMA_StructInit = 0x0805f72d); +PROVIDE(llext_copy_strings = 0x0805c201); +PROVIDE(sys_heap_alloc = 0x08059c17); +PROVIDE(HAL_PCD_Start = 0x0805ee9b); +PROVIDE(pinctrl_lookup_state = 0x0805d87d); +PROVIDE(z_arm_debug_monitor = 0x080491d1); +PROVIDE(USB_SetCurrentMode = 0x0805f971); +PROVIDE(z_shell_wildcard_prepare = 0x0805bc17); +PROVIDE(z_device_state_init = 0x0805fddb); PROVIDE(atan = 0x08041d79); -PROVIDE(sprintf = 0x0805824d); +PROVIDE(sprintf = 0x0805843d); PROVIDE(__fixdfdi = 0x08041193); -PROVIDE(HAL_LTDC_MspInit = 0x0805ea13); +PROVIDE(HAL_LTDC_MspInit = 0x0805ec13); PROVIDE(__gesf2 = 0x08040f51); -PROVIDE(__math_inexact64 = 0x08042da9); -PROVIDE(i2c_stm32_get_config = 0x0804fda1); -PROVIDE(z_column_span_with_buffer_offsets_get = 0x0805ac79); -PROVIDE(HAL_QSPI_CmdCpltCallback = 0x0805cddd); +PROVIDE(__math_inexact64 = 0x08042f81); +PROVIDE(i2c_stm32_get_config = 0x0804ff91); +PROVIDE(z_column_span_with_buffer_offsets_get = 0x0805ae79); +PROVIDE(HAL_QSPI_CmdCpltCallback = 0x0805cfdd); PROVIDE(CONFIG_LOG_FUNC_NAME_PREFIX_DBG = 0x00000001); PROVIDE(__aeabi_frsub = 0x08040d35); -PROVIDE(usb_dc_ep_clear_stall = 0x0804b659); -PROVIDE(__pow5bits = 0x08059455); -PROVIDE(z_shell_wildcard_finalize = 0x0805ba59); -PROVIDE(z_shell_log_backend_disable = 0x0805b5fb); -PROVIDE(k_work_submit = 0x08056bf9); +PROVIDE(usb_dc_ep_clear_stall = 0x0804b849); +PROVIDE(__pow5bits = 0x08059645); +PROVIDE(z_shell_wildcard_finalize = 0x0805bc59); +PROVIDE(z_shell_log_backend_disable = 0x0805b7fb); +PROVIDE(k_work_submit = 0x08056de9); PROVIDE(__aeabi_fcmpeq = 0x08040fd9); -PROVIDE(z_shell_fprintf_fmt = 0x08047425); -PROVIDE(scalbn = 0x08042c89); -PROVIDE(z_impl_k_queue_alloc_prepend = 0x0806014d); -PROVIDE(log_set_timestamp_func = 0x08043a51); -PROVIDE(srandom = 0x08058169); -PROVIDE(is_ptr = 0x08059e7f); -PROVIDE(HAL_DMA_IRQHandler = 0x080539c1); -PROVIDE(z_shell_op_left_arrow = 0x0805b211); -PROVIDE(LL_RCC_CalcPLLClockFreq = 0x0805f60f); -PROVIDE(z_impl_k_thread_suspend = 0x080571fd); -PROVIDE(z_add_timeout = 0x08057c11); +PROVIDE(z_shell_fprintf_fmt = 0x08047615); +PROVIDE(scalbn = 0x08042e61); +PROVIDE(z_impl_k_queue_alloc_prepend = 0x0806034d); +PROVIDE(log_set_timestamp_func = 0x08043c41); +PROVIDE(srandom = 0x08058359); +PROVIDE(is_ptr = 0x0805a07f); +PROVIDE(HAL_DMA_IRQHandler = 0x08053bb1); +PROVIDE(z_shell_op_left_arrow = 0x0805b411); +PROVIDE(LL_RCC_CalcPLLClockFreq = 0x0805f80f); +PROVIDE(z_impl_k_thread_suspend = 0x080573ed); +PROVIDE(z_add_timeout = 0x08057e01); PROVIDE(__aeabi_cfrcmple = 0x08040fc1); -PROVIDE(z_impl_k_condvar_init = 0x08060353); -PROVIDE(putchar_unlocked = 0x080581a9); +PROVIDE(z_impl_k_condvar_init = 0x08060553); +PROVIDE(putchar_unlocked = 0x08058399); PROVIDE(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT = 0x00000001); -PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x0805a33d); -PROVIDE(shell_backend_uart_get_ptr = 0x08046625); -PROVIDE(fputc = 0x080612d5); -PROVIDE(z_impl_log_process = 0x0805a1dd); -PROVIDE(z_impl_k_queue_get = 0x080567b9); -PROVIDE(_cos = 0x08041f79); -PROVIDE(z_impl_z_log_msg_static_create = 0x08043e21); -PROVIDE(video_buffer_alloc = 0x0805e125); -PROVIDE(HAL_PCD_Init = 0x0805eb95); -PROVIDE(gpio_stm32_configure = 0x0805cfed); -PROVIDE(z_init_cpu = 0x080562bd); +PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x0805a53d); +PROVIDE(shell_backend_uart_get_ptr = 0x08046815); +PROVIDE(fputc = 0x080614d5); +PROVIDE(z_impl_log_process = 0x0805a3dd); +PROVIDE(z_impl_k_queue_get = 0x080569a9); +PROVIDE(_cos = 0x08042151); +PROVIDE(z_impl_z_log_msg_static_create = 0x08044011); +PROVIDE(video_buffer_alloc = 0x0805e325); +PROVIDE(HAL_PCD_Init = 0x0805ed95); +PROVIDE(gpio_stm32_configure = 0x0805d1ed); +PROVIDE(z_init_cpu = 0x080564ad); PROVIDE(__aeabi_d2uiz = 0x08040c55); -PROVIDE(HAL_DCMI_Suspend = 0x08052a31); -PROVIDE(_sin = 0x08042291); -PROVIDE(arch_tls_stack_setup = 0x0804855d); -PROVIDE(z_shell_op_completion_insert = 0x0805b3f5); +PROVIDE(HAL_DCMI_Suspend = 0x08052c21); +PROVIDE(_sin = 0x08042469); +PROVIDE(arch_tls_stack_setup = 0x0804874d); +PROVIDE(z_shell_op_completion_insert = 0x0805b5f5); PROVIDE(__aeabi_fcmplt = 0x08040fed); -PROVIDE(i2c_stm32_runtime_configure = 0x0804fe25); -PROVIDE(HAL_PCD_SetupStageCallback = 0x0804bac9); -PROVIDE(z_shell_op_char_backspace = 0x0805b437); -PROVIDE(z_shell_help_subcmd_print = 0x080478e9); -PROVIDE(shell_set_bypass = 0x0805ac0d); +PROVIDE(i2c_stm32_runtime_configure = 0x08050015); +PROVIDE(HAL_PCD_SetupStageCallback = 0x0804bcb9); +PROVIDE(z_shell_op_char_backspace = 0x0805b637); +PROVIDE(z_shell_help_subcmd_print = 0x08047ad9); +PROVIDE(shell_set_bypass = 0x0805ae0d); PROVIDE(__aeabi_uidivmod = 0x080402ed); -PROVIDE(isdigit = 0x08060d19); -PROVIDE(dmamux_stm32_configure = 0x0804e1e5); -PROVIDE(dma_stm32_clear_dme = 0x0804dcf9); +PROVIDE(isdigit = 0x08060f19); +PROVIDE(dmamux_stm32_configure = 0x0804e3d5); +PROVIDE(dma_stm32_clear_dme = 0x0804dee9); PROVIDE(__aeabi_dcmpeq = 0x08040b75); -PROVIDE(usb_get_device_descriptor = 0x08044e8d); -PROVIDE(mpsc_pbuf_init = 0x08059f17); -PROVIDE(sys_clock_elapsed = 0x08051a45); -PROVIDE(jesd216_bfp_erase = 0x0805cbe3); -PROVIDE(z_ready_thread = 0x0806042d); -PROVIDE(llext_free_regions = 0x08049d71); +PROVIDE(usb_get_device_descriptor = 0x0804507d); +PROVIDE(mpsc_pbuf_init = 0x0805a117); +PROVIDE(sys_clock_elapsed = 0x08051c35); +PROVIDE(jesd216_bfp_erase = 0x0805cde3); +PROVIDE(z_ready_thread = 0x0806062d); +PROVIDE(llext_free_regions = 0x08049f61); PROVIDE(__unordsf2 = 0x0804103d); -PROVIDE(llext_loaded_sect_ptr = 0x0805c08f); -PROVIDE(usb_dc_ep_check_cap = 0x0804b5ad); -PROVIDE(stm32_dma_check_fifo_mburst = 0x0805cb5d); -PROVIDE(z_impl_k_thread_resume = 0x08057409); -PROVIDE(z_shell_fprintf_buffer_flush = 0x0805ac19); -PROVIDE(z_prep_c = 0x080491cd); +PROVIDE(llext_loaded_sect_ptr = 0x0805c28f); +PROVIDE(usb_dc_ep_check_cap = 0x0804b79d); +PROVIDE(stm32_dma_check_fifo_mburst = 0x0805cd5d); +PROVIDE(z_impl_k_thread_resume = 0x080575f9); +PROVIDE(z_shell_fprintf_buffer_flush = 0x0805ae19); +PROVIDE(z_prep_c = 0x080493bd); PROVIDE(vfscanf = 0x00000001); -PROVIDE(USB_ReadDevInEPInterrupt = 0x0805fb73); -PROVIDE(k_poll_event_init = 0x08060bc1); -PROVIDE(flash_stm32_wait_flash_idle = 0x0804f471); -PROVIDE(k_malloc = 0x08060c6b); -PROVIDE(shell_vfprintf = 0x0805aa6b); -PROVIDE(USB_ReadDevAllInEpInterrupt = 0x0805fb51); -PROVIDE(z_impl_k_poll_signal_raise = 0x08058095); -PROVIDE(z_shell_write = 0x0805b28b); -PROVIDE(LL_DMA_Init = 0x080552e1); -PROVIDE(arch_cache_init = 0x0805bd39); -PROVIDE(z_unpend_thread = 0x080604db); -PROVIDE(z_impl_llext_get_fn_table = 0x0804ac35); -PROVIDE(z_impl_k_mutex_unlock = 0x08056719); -PROVIDE(arch_new_thread = 0x0804922d); -PROVIDE(cbvprintf = 0x080494b5); -PROVIDE(llext_bootstrap = 0x08049bed); -PROVIDE(log_backend_enable = 0x0805a205); -PROVIDE(__ceil_log2pow5 = 0x08059445); -PROVIDE(pinctrl_configure_pins = 0x08050631); -PROVIDE(k_thread_system_pool_assign = 0x080580f5); +PROVIDE(USB_ReadDevInEPInterrupt = 0x0805fd73); +PROVIDE(k_poll_event_init = 0x08060dc1); +PROVIDE(flash_stm32_wait_flash_idle = 0x0804f661); +PROVIDE(k_malloc = 0x08060e6b); +PROVIDE(shell_vfprintf = 0x0805ac6b); +PROVIDE(USB_ReadDevAllInEpInterrupt = 0x0805fd51); +PROVIDE(z_impl_k_poll_signal_raise = 0x08058285); +PROVIDE(z_shell_write = 0x0805b48b); +PROVIDE(LL_DMA_Init = 0x080554d1); +PROVIDE(arch_cache_init = 0x0805bf39); +PROVIDE(z_unpend_thread = 0x080606db); +PROVIDE(z_impl_llext_get_fn_table = 0x0804ae25); +PROVIDE(z_impl_k_mutex_unlock = 0x08056909); +PROVIDE(arch_new_thread = 0x0804941d); +PROVIDE(cbvprintf = 0x080496a5); +PROVIDE(llext_bootstrap = 0x08049ddd); +PROVIDE(log_backend_enable = 0x0805a405); +PROVIDE(__ceil_log2pow5 = 0x08059635); +PROVIDE(pinctrl_configure_pins = 0x08050821); +PROVIDE(k_thread_system_pool_assign = 0x080582e5); PROVIDE(__floatunsisf = 0x08040ea1); -PROVIDE(z_reschedule_irqlock = 0x08057445); +PROVIDE(z_reschedule_irqlock = 0x08057635); PROVIDE(__aeabi_d2iz = 0x08040c05); -PROVIDE(__math_uflow = 0x08042d59); -PROVIDE(z_log_dropped = 0x08043b09); -PROVIDE(z_setup_new_thread = 0x08056f15); -PROVIDE(z_handle_obj_poll_events = 0x08060bdf); -PROVIDE(stm32_dma_get_mburst = 0x0804df19); -PROVIDE(llext_lookup_symbol = 0x0804a94d); -PROVIDE(z_log_msg_alloc = 0x0805a1e1); +PROVIDE(__math_uflow = 0x08042f31); +PROVIDE(z_log_dropped = 0x08043cf9); +PROVIDE(z_setup_new_thread = 0x08057105); +PROVIDE(z_handle_obj_poll_events = 0x08060ddf); +PROVIDE(stm32_dma_get_mburst = 0x0804e109); +PROVIDE(llext_lookup_symbol = 0x0804ab3d); +PROVIDE(z_log_msg_alloc = 0x0805a3e1); PROVIDE(__aeabi_cfcmpeq = 0x08040fc9); -PROVIDE(LL_TIM_OC_Init = 0x080556a5); -PROVIDE(z_shell_help_request = 0x080479dd); -PROVIDE(atoi = 0x08060da3); -PROVIDE(dmamux_stm32_start = 0x0804e171); -PROVIDE(z_shell_history_init = 0x0805b9e3); -PROVIDE(iscntrl = 0x08060d07); -PROVIDE(z_arm_fault_init = 0x08048fc9); -PROVIDE(USB_DeactivateEndpoint = 0x08055c09); -PROVIDE(LL_RCC_GetSystemClocksFreq = 0x080555b1); -PROVIDE(usb_write = 0x08044a81); -PROVIDE(USB_WritePacket = 0x0805f993); -PROVIDE(shell_thread = 0x08047139); -PROVIDE(HAL_DSI_MspInit = 0x0805e593); -PROVIDE(arch_dcache_disable = 0x080493a5); +PROVIDE(LL_TIM_OC_Init = 0x08055895); +PROVIDE(z_shell_help_request = 0x08047bcd); +PROVIDE(atoi = 0x08060fa3); +PROVIDE(dmamux_stm32_start = 0x0804e361); +PROVIDE(z_shell_history_init = 0x0805bbe3); +PROVIDE(iscntrl = 0x08060f07); +PROVIDE(z_arm_fault_init = 0x080491b9); +PROVIDE(USB_DeactivateEndpoint = 0x08055df9); +PROVIDE(LL_RCC_GetSystemClocksFreq = 0x080557a1); +PROVIDE(usb_write = 0x08044c71); +PROVIDE(USB_WritePacket = 0x0805fb93); +PROVIDE(shell_thread = 0x08047329); +PROVIDE(HAL_DSI_MspInit = 0x0805e793); +PROVIDE(arch_dcache_disable = 0x08049595); PROVIDE(__aeabi_idiv0 = 0x08040329); PROVIDE(__unorddf2 = 0x08040bd9); -PROVIDE(sys_multi_heap_init = 0x08059d77); -PROVIDE(llext_load = 0x08049a75); -PROVIDE(z_shell_help_cmd_print = 0x0804799d); -PROVIDE(z_arm_fatal_error = 0x080483e1); -PROVIDE(USB_ReadDevAllOutEpInterrupt = 0x0805fb41); -PROVIDE(z_arm_svc = 0x0804911d); -PROVIDE(z_shell_op_cursor_horiz_move = 0x08047565); -PROVIDE(shell_fprintf_impl = 0x0805aafd); -PROVIDE(z_shell_op_cursor_word_move = 0x0805b175); -PROVIDE(ring_buf_peek = 0x0805a119); -PROVIDE(z_shell_history_purge = 0x0805b8db); +PROVIDE(sys_multi_heap_init = 0x08059f67); +PROVIDE(llext_load = 0x08049c65); +PROVIDE(z_shell_help_cmd_print = 0x08047b8d); +PROVIDE(z_arm_fatal_error = 0x080485d1); +PROVIDE(USB_ReadDevAllOutEpInterrupt = 0x0805fd41); +PROVIDE(z_arm_svc = 0x0804930d); +PROVIDE(z_shell_op_cursor_horiz_move = 0x08047755); +PROVIDE(shell_fprintf_impl = 0x0805acfd); +PROVIDE(z_shell_op_cursor_word_move = 0x0805b375); +PROVIDE(ring_buf_peek = 0x0805a319); +PROVIDE(z_shell_history_purge = 0x0805badb); PROVIDE(strlen = 0x0804115d); -PROVIDE(HAL_QSPI_Init = 0x08055005); -PROVIDE(z_arm_cpu_idle_init = 0x08049301); -PROVIDE(shell_fprintf_normal = 0x0805ab17); -PROVIDE(__double_computeInvPow5 = 0x0805957d); -PROVIDE(z_shell_op_cursor_end_move = 0x0805b1ff); -PROVIDE(toupper = 0x08060d91); +PROVIDE(HAL_QSPI_Init = 0x080551f5); +PROVIDE(z_arm_cpu_idle_init = 0x080494f1); +PROVIDE(shell_fprintf_normal = 0x0805ad17); +PROVIDE(__double_computeInvPow5 = 0x0805976d); +PROVIDE(z_shell_op_cursor_end_move = 0x0805b3ff); +PROVIDE(toupper = 0x08060f91); PROVIDE(__aeabi_cdcmpeq = 0x08040b65); PROVIDE(__gedf2 = 0x08040ac9); -PROVIDE(USB_DevDisconnect = 0x0805fb1d); -PROVIDE(usb_set_config = 0x08044c41); -PROVIDE(z_shell_op_cursor_position_synchronize = 0x0805b0db); -PROVIDE(dma_stm32_is_dme_active = 0x0804dd29); -PROVIDE(assert_print = 0x08059efd); -PROVIDE(z_impl_k_wakeup = 0x08057695); -PROVIDE(z_shell_vt100_color_set = 0x08047609); -PROVIDE(jesd216_bfp_decode_dw16 = 0x0804e759); -PROVIDE(HAL_QSPI_AbortCpltCallback = 0x0805f4b9); -PROVIDE(shell_get_return_value = 0x0805abf9); -PROVIDE(strchr = 0x08060e29); -PROVIDE(LL_TIM_OC_StructInit = 0x0805f663); -PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x0805d041); -PROVIDE(z_reset_time_slice = 0x08057a15); -PROVIDE(arm_irq_is_enabled = 0x08049185); +PROVIDE(USB_DevDisconnect = 0x0805fd1d); +PROVIDE(shared_multi_heap_alloc = 0x0804324d); +PROVIDE(usb_set_config = 0x08044e31); +PROVIDE(z_shell_op_cursor_position_synchronize = 0x0805b2db); +PROVIDE(dma_stm32_is_dme_active = 0x0804df19); +PROVIDE(assert_print = 0x0805a0fd); +PROVIDE(z_impl_k_wakeup = 0x08057885); +PROVIDE(z_shell_vt100_color_set = 0x080477f9); +PROVIDE(jesd216_bfp_decode_dw16 = 0x0804e949); +PROVIDE(HAL_QSPI_AbortCpltCallback = 0x0805f6b9); +PROVIDE(shell_get_return_value = 0x0805adf9); +PROVIDE(strchr = 0x08061029); +PROVIDE(LL_TIM_OC_StructInit = 0x0805f863); +PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x0805d241); +PROVIDE(z_reset_time_slice = 0x08057c05); +PROVIDE(arm_irq_is_enabled = 0x08049375); PROVIDE(__aeabi_f2d = 0x080405f5); -PROVIDE(k_heap_alloc = 0x0805fd47); -PROVIDE(usb_dc_ep_enable = 0x0804b6b1); -PROVIDE(z_impl_k_mutex_init = 0x0805ff7f); -PROVIDE(z_log_msg_runtime_vcreate = 0x08043d6d); -PROVIDE(z_arm_nmi = 0x08048541); -PROVIDE(z_time_slice = 0x08057a65); -PROVIDE(z_impl_device_deinit = 0x0805fbf3); -PROVIDE(z_impl_k_sched_current_thread_query = 0x080576dd); -PROVIDE(llext_link = 0x0804aa49); -PROVIDE(HAL_SDRAM_Init = 0x08055291); -PROVIDE(llext_teardown = 0x0805bffb); -PROVIDE(z_fatal_error = 0x080560c9); +PROVIDE(k_heap_alloc = 0x0805ff47); +PROVIDE(usb_dc_ep_enable = 0x0804b8a1); +PROVIDE(z_impl_k_mutex_init = 0x0806017f); +PROVIDE(z_log_msg_runtime_vcreate = 0x08043f5d); +PROVIDE(z_arm_nmi = 0x08048731); +PROVIDE(z_time_slice = 0x08057c55); +PROVIDE(z_impl_device_deinit = 0x0805fdf3); +PROVIDE(z_impl_k_sched_current_thread_query = 0x080578cd); +PROVIDE(llext_link = 0x0804ac39); +PROVIDE(HAL_SDRAM_Init = 0x08055481); +PROVIDE(llext_teardown = 0x0805c1fb); +PROVIDE(z_fatal_error = 0x080562b9); PROVIDE(__subdf3 = 0x08040335); -PROVIDE(boot_banner = 0x08055fd1); -PROVIDE(shell_prompt_change = 0x0805ab6b); -PROVIDE(usb_disable = 0x08044a21); -PROVIDE(USB_FlushTxFifo = 0x0805f7cd); -PROVIDE(HAL_DSI_Init = 0x080543d9); -PROVIDE(shared_multi_heap_add = 0x08043015); -PROVIDE(HAL_QSPI_MspInit = 0x0805f1c3); -PROVIDE(USB_SetDevAddress = 0x0805fae1); -PROVIDE(log_core_init = 0x08043a71); -PROVIDE(ldexpl = 0x08042c89); -PROVIDE(usb_enable = 0x08044c6d); +PROVIDE(boot_banner = 0x080561c1); +PROVIDE(shell_prompt_change = 0x0805ad6b); +PROVIDE(usb_disable = 0x08044c11); +PROVIDE(USB_FlushTxFifo = 0x0805f9cd); +PROVIDE(HAL_DSI_Init = 0x080545c9); +PROVIDE(shared_multi_heap_add = 0x080431ed); +PROVIDE(HAL_QSPI_MspInit = 0x0805f3c3); +PROVIDE(USB_SetDevAddress = 0x0805fce1); +PROVIDE(log_core_init = 0x08043c61); +PROVIDE(ldexpl = 0x08042e61); +PROVIDE(usb_enable = 0x08044e5d); PROVIDE(__aeabi_idivmod = 0x08040319); -PROVIDE(HAL_MDMA_Abort_IT = 0x0805eb6d); +PROVIDE(HAL_MDMA_Abort_IT = 0x0805ed6d); PROVIDE(__aeabi_ldivmod = 0x08041069); -PROVIDE(HAL_PCD_EP_Receive = 0x0805ee1b); -PROVIDE(z_impl_log_frontend_filter_set = 0x0805a1f9); -PROVIDE(__kernel_tan = 0x08042a51); -PROVIDE(k_work_schedule_for_queue = 0x08056c81); -PROVIDE(shell_strtoul = 0x080474c1); -PROVIDE(z_impl_device_get_binding = 0x08055ff5); -PROVIDE(z_impl_k_poll_signal_reset = 0x08060c27); -PROVIDE(arch_dcache_flush_range = 0x080493f9); -PROVIDE(z_shell_op_cursor_move = 0x0805b125); +PROVIDE(HAL_PCD_EP_Receive = 0x0805f01b); +PROVIDE(z_impl_log_frontend_filter_set = 0x0805a3f9); +PROVIDE(__kernel_tan = 0x08042c29); +PROVIDE(k_work_schedule_for_queue = 0x08056e71); +PROVIDE(shell_strtoul = 0x080476b1); +PROVIDE(z_impl_device_get_binding = 0x080561e5); +PROVIDE(z_impl_k_poll_signal_reset = 0x08060e27); +PROVIDE(arch_dcache_flush_range = 0x080495e9); +PROVIDE(z_shell_op_cursor_move = 0x0805b325); PROVIDE(__addsf3 = 0x08040d41); -PROVIDE(video_buffer_release = 0x08051b21); -PROVIDE(z_impl_k_sem_reset = 0x080568e1); -PROVIDE(cdc_acm_dte_rate_callback_set = 0x08045a99); -PROVIDE(USB_EP0_OutStart = 0x08055e91); -PROVIDE(HAL_DMA_Abort_IT = 0x0805379d); -PROVIDE(z_shell_pattern_remove = 0x0805ae79); -PROVIDE(vfprintf = 0x0805858d); -PROVIDE(i2c_stm32_set_smbus_mode = 0x0804fddd); -PROVIDE(HAL_DCMI_VsyncEventCallback = 0x0805e471); -PROVIDE(arch_irq_unlock_outlined = 0x0805bd11); -PROVIDE(HAL_DCMI_ErrorCallback = 0x08052601); -PROVIDE(__wrap_free = 0x080495e1); -PROVIDE(HAL_SDRAM_SendCommand = 0x0805f4bf); -PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x0805603d); -PROVIDE(z_arm_hard_fault = 0x08048fe1); +PROVIDE(video_buffer_release = 0x08051d11); +PROVIDE(z_impl_k_sem_reset = 0x08056ad1); +PROVIDE(cdc_acm_dte_rate_callback_set = 0x08045c89); +PROVIDE(USB_EP0_OutStart = 0x08056081); +PROVIDE(HAL_DMA_Abort_IT = 0x0805398d); +PROVIDE(z_shell_pattern_remove = 0x0805b079); +PROVIDE(vfprintf = 0x0805877d); +PROVIDE(i2c_stm32_set_smbus_mode = 0x0804ffcd); +PROVIDE(HAL_DCMI_VsyncEventCallback = 0x0805e671); +PROVIDE(arch_irq_unlock_outlined = 0x0805bf11); +PROVIDE(HAL_DCMI_ErrorCallback = 0x080527f1); +PROVIDE(__wrap_free = 0x080497d1); +PROVIDE(HAL_SDRAM_SendCommand = 0x0805f6bf); +PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x0805622d); +PROVIDE(z_arm_hard_fault = 0x080491d1); PROVIDE(kheap_llext_heap = 0x2400e218); PROVIDE(kheap_llext_heap_size = 0x20000); PROVIDE(kheap__system_heap = 0x24037278); PROVIDE(kheap__system_heap_size = 2048); -PROVIDE(__device_dts_ord_9 = 0x0000000008061508); -PROVIDE(__device_dts_ord_250 = 0x000000000806152c); -PROVIDE(__device_dts_ord_251 = 0x0000000008061550); -PROVIDE(__device_dts_ord_59 = 0x0000000008061574); -PROVIDE(__device_dts_ord_146 = 0x0000000008061598); -PROVIDE(__device_dts_ord_179 = 0x00000000080615bc); -PROVIDE(__device_dts_ord_86 = 0x00000000080615e0); -PROVIDE(__device_dts_ord_85 = 0x0000000008061604); -PROVIDE(__device_dts_ord_18 = 0x0000000008061628); -PROVIDE(__device_dts_ord_84 = 0x000000000806164c); -PROVIDE(__device_dts_ord_83 = 0x0000000008061670); -PROVIDE(__device_dts_ord_253 = 0x0000000008061694); -PROVIDE(__device_dts_ord_82 = 0x00000000080616b8); -PROVIDE(__device_dts_ord_81 = 0x00000000080616dc); -PROVIDE(__device_dts_ord_80 = 0x0000000008061700); -PROVIDE(__device_dts_ord_79 = 0x0000000008061724); -PROVIDE(__device_dts_ord_78 = 0x0000000008061748); -PROVIDE(__device_dts_ord_142 = 0x000000000806176c); -PROVIDE(__device_dts_ord_111 = 0x0000000008061790); -PROVIDE(__device_dts_ord_149 = 0x00000000080617b4); -PROVIDE(__device_dts_ord_260 = 0x00000000080617d8); -PROVIDE(__device_dts_ord_69 = 0x00000000080617fc); -PROVIDE(__device_dts_ord_63 = 0x0000000008061820); -PROVIDE(__device_dts_ord_60 = 0x0000000008061844); -PROVIDE(__device_dts_ord_66 = 0x0000000008061868); -PROVIDE(__device_dts_ord_40 = 0x000000000806188c); -PROVIDE(__device_dts_ord_13 = 0x00000000080618b0); -PROVIDE(__device_dts_ord_53 = 0x00000000080618d4); -PROVIDE(__device_dts_ord_56 = 0x00000000080618f8); -PROVIDE(__device_dts_ord_270 = 0x000000000806191c); -PROVIDE(__device_dts_ord_203 = 0x0000000008061940); -PROVIDE(__device_dts_ord_17 = 0x0000000008061964); -PROVIDE(__device_dts_ord_33 = 0x0000000008061988); -PROVIDE(__device_dts_ord_29 = 0x00000000080619ac); -PROVIDE(__device_dts_ord_106 = 0x00000000080619d0); -PROVIDE(__device_dts_ord_99 = 0x00000000080619f4); -PROVIDE(__device_dts_ord_94 = 0x0000000008061a18); -PROVIDE(__device_dts_ord_90 = 0x0000000008061a3c); -PROVIDE(__device_dts_ord_103 = 0x0000000008061a60); -PROVIDE(__device_dts_ord_77 = 0x0000000008061a84); -PROVIDE(__device_dts_ord_73 = 0x0000000008061aa8); -PROVIDE(__device_dts_ord_293 = 0x0000000008061acc); -PROVIDE(__device_dts_ord_180 = 0x0000000008061af0); -PROVIDE(__device_dts_ord_192 = 0x0000000008061b14); -PROVIDE(__device_dts_ord_198 = 0x0000000008061b38); -PROVIDE(__device_dts_ord_196 = 0x0000000008061b5c); -PROVIDE(__device_dts_ord_199 = 0x0000000008061b80); -PROVIDE(__device_dts_ord_124 = 0x0000000008061ba4); -PROVIDE(__device_dts_ord_19 = 0x0000000008061bc8); +PROVIDE(__device_dts_ord_9 = 0x0000000008061708); +PROVIDE(__device_dts_ord_251 = 0x000000000806172c); +PROVIDE(__device_dts_ord_252 = 0x0000000008061750); +PROVIDE(__device_dts_ord_59 = 0x0000000008061774); +PROVIDE(__device_dts_ord_147 = 0x0000000008061798); +PROVIDE(__device_dts_ord_180 = 0x00000000080617bc); +PROVIDE(__device_dts_ord_87 = 0x00000000080617e0); +PROVIDE(__device_dts_ord_86 = 0x0000000008061804); +PROVIDE(__device_dts_ord_18 = 0x0000000008061828); +PROVIDE(__device_dts_ord_85 = 0x000000000806184c); +PROVIDE(__device_dts_ord_84 = 0x0000000008061870); +PROVIDE(__device_dts_ord_83 = 0x0000000008061894); +PROVIDE(__device_dts_ord_82 = 0x00000000080618b8); +PROVIDE(__device_dts_ord_81 = 0x00000000080618dc); +PROVIDE(__device_dts_ord_80 = 0x0000000008061900); +PROVIDE(__device_dts_ord_79 = 0x0000000008061924); +PROVIDE(__device_dts_ord_78 = 0x0000000008061948); +PROVIDE(__device_dts_ord_143 = 0x000000000806196c); +PROVIDE(__device_dts_ord_112 = 0x0000000008061990); +PROVIDE(__device_dts_ord_150 = 0x00000000080619b4); +PROVIDE(__device_dts_ord_260 = 0x00000000080619d8); +PROVIDE(__device_dts_ord_69 = 0x00000000080619fc); +PROVIDE(__device_dts_ord_63 = 0x0000000008061a20); +PROVIDE(__device_dts_ord_60 = 0x0000000008061a44); +PROVIDE(__device_dts_ord_66 = 0x0000000008061a68); +PROVIDE(__device_dts_ord_40 = 0x0000000008061a8c); +PROVIDE(__device_dts_ord_13 = 0x0000000008061ab0); +PROVIDE(__device_dts_ord_53 = 0x0000000008061ad4); +PROVIDE(__device_dts_ord_56 = 0x0000000008061af8); +PROVIDE(__device_dts_ord_270 = 0x0000000008061b1c); +PROVIDE(__device_dts_ord_204 = 0x0000000008061b40); +PROVIDE(__device_dts_ord_17 = 0x0000000008061b64); +PROVIDE(__device_dts_ord_33 = 0x0000000008061b88); +PROVIDE(__device_dts_ord_29 = 0x0000000008061bac); +PROVIDE(__device_dts_ord_107 = 0x0000000008061bd0); +PROVIDE(__device_dts_ord_100 = 0x0000000008061bf4); +PROVIDE(__device_dts_ord_95 = 0x0000000008061c18); +PROVIDE(__device_dts_ord_91 = 0x0000000008061c3c); +PROVIDE(__device_dts_ord_104 = 0x0000000008061c60); +PROVIDE(__device_dts_ord_77 = 0x0000000008061c84); +PROVIDE(__device_dts_ord_73 = 0x0000000008061ca8); +PROVIDE(__device_dts_ord_293 = 0x0000000008061ccc); +PROVIDE(__device_dts_ord_181 = 0x0000000008061cf0); +PROVIDE(__device_dts_ord_193 = 0x0000000008061d14); +PROVIDE(__device_dts_ord_199 = 0x0000000008061d38); +PROVIDE(__device_dts_ord_197 = 0x0000000008061d5c); +PROVIDE(__device_dts_ord_200 = 0x0000000008061d80); +PROVIDE(__device_dts_ord_125 = 0x0000000008061da4); +PROVIDE(__device_dts_ord_19 = 0x0000000008061dc8); PROVIDE(_sketch_start = 0xe0000 ); diff --git a/variants/arduino_giga_r1_stm32h747xx_m7/variant.h b/variants/arduino_giga_r1_stm32h747xx_m7/variant.h index 938fa328..ead6e1d4 100644 --- a/variants/arduino_giga_r1_stm32h747xx_m7/variant.h +++ b/variants/arduino_giga_r1_stm32h747xx_m7/variant.h @@ -5,6 +5,7 @@ */ #include "pure_analog_pins.h" +#include "PinNames.h" // TODO: correctly handle these legacy defines #define MOSI 0 diff --git a/variants/arduino_nano_33_ble_nrf52840_sense/cflags.txt b/variants/arduino_nano_33_ble_nrf52840_sense/cflags.txt index 6e51c3f3..85c6ffd5 100644 --- a/variants/arduino_nano_33_ble_nrf52840_sense/cflags.txt +++ b/variants/arduino_nano_33_ble_nrf52840_sense/cflags.txt @@ -7,8 +7,6 @@ -DK_HEAP_MEM_POOL_SIZE=16384 -DLL_EXTENSION_BUILD -fno-strict-aliasing --fstack-protector --mstack-protector-guard=global -fno-common -mcpu=cortex-m4 -mthumb @@ -33,7 +31,6 @@ -fno-reorder-functions --param=min-pagesize=0 -fno-defer-pop --fstack-usage -specs=picolibc.specs -D_POSIX_THREADS -std=c99 diff --git a/variants/arduino_nano_33_ble_nrf52840_sense/cxxflags.txt b/variants/arduino_nano_33_ble_nrf52840_sense/cxxflags.txt index 27975dd9..aba920a6 100644 --- a/variants/arduino_nano_33_ble_nrf52840_sense/cxxflags.txt +++ b/variants/arduino_nano_33_ble_nrf52840_sense/cxxflags.txt @@ -7,8 +7,6 @@ -DK_HEAP_MEM_POOL_SIZE=16384 -DLL_EXTENSION_BUILD -fno-strict-aliasing --fstack-protector --mstack-protector-guard=global -fno-common -mcpu=cortex-m4 -mthumb @@ -31,7 +29,6 @@ -fno-reorder-functions --param=min-pagesize=0 -fno-defer-pop --fstack-usage -specs=picolibc.specs -D_POSIX_THREADS -mlong-calls diff --git a/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/Makefile.cflags b/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/Makefile.cflags index 5bd22e60..1c5db80c 100644 --- a/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/Makefile.cflags +++ b/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/Makefile.cflags @@ -6,9 +6,9 @@ LLEXT_EDK_BOARD_REVISION = "" LLEXT_EDK_BOARD_TARGET = "arduino_nano_33_ble_nrf52840_sense" # Compile flags -LLEXT_CFLAGS = "-DKERNEL" "-D__ZEPHYR__=1" "-D__LINUX_ERRNO_EXTENSIONS__" "-DPICOLIBC_DOUBLE_PRINTF_SCANF" "-D__PROGRAM_START" "-DNRF52840_XXAA" "-DK_HEAP_MEM_POOL_SIZE=16384" "-DLL_EXTENSION_BUILD" "-fno-strict-aliasing" "-fstack-protector" "-mstack-protector-guard=global" "-fno-common" "-fdiagnostics-color=always" "-mcpu=cortex-m4" "-mthumb" "-mabi=aapcs" "-mfpu=fpv4-sp-d16" "-mfloat-abi=hard" "-mfp16-format=ieee" "-mtp=soft" "-Wall" "-Wformat" "-Wformat-security" "-Wformat" "-Wno-format-zero-length" "-Wdouble-promotion" "-Wno-pointer-sign" "-Wpointer-arith" "-Wexpansion-to-defined" "-Wno-unused-but-set-variable" "-Werror=implicit-int" "-fno-asynchronous-unwind-tables" "-ftls-model=local-exec" "-fno-reorder-functions" "--param=min-pagesize=0" "-fno-defer-pop" "-fstack-usage" "-specs=picolibc.specs" "-D_POSIX_THREADS" "-std=c99" "-mlong-calls" "-mthumb" "-nodefaultlibs" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr/autoconf.h" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/libc/common/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/posix/options/getopt/" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/cpp/minimal/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic/nrf52/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic/common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/usb/device" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/nrfx_glue" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/bluetooth" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/shell/modules/kernel_service/thread/../" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/drivers/usb/common/nrf_usbd_common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/cmsis/CMSIS/Core/Include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/cmsis/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx/drivers/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx/mdk" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/hal_nordic/nrfx/." +LLEXT_CFLAGS = "-DKERNEL" "-D__ZEPHYR__=1" "-D__LINUX_ERRNO_EXTENSIONS__" "-DPICOLIBC_DOUBLE_PRINTF_SCANF" "-D__PROGRAM_START" "-DNRF52840_XXAA" "-DK_HEAP_MEM_POOL_SIZE=16384" "-DLL_EXTENSION_BUILD" "-fno-strict-aliasing" "-fno-common" "-fdiagnostics-color=always" "-mcpu=cortex-m4" "-mthumb" "-mabi=aapcs" "-mfpu=fpv4-sp-d16" "-mfloat-abi=hard" "-mfp16-format=ieee" "-mtp=soft" "-Wall" "-Wformat" "-Wformat-security" "-Wformat" "-Wno-format-zero-length" "-Wdouble-promotion" "-Wno-pointer-sign" "-Wpointer-arith" "-Wexpansion-to-defined" "-Wno-unused-but-set-variable" "-Werror=implicit-int" "-fno-asynchronous-unwind-tables" "-ftls-model=local-exec" "-fno-reorder-functions" "--param=min-pagesize=0" "-fno-defer-pop" "-specs=picolibc.specs" "-D_POSIX_THREADS" "-std=c99" "-mlong-calls" "-mthumb" "-nodefaultlibs" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr/autoconf.h" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/libc/common/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/posix/options/getopt/" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/cpp/minimal/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic/nrf52/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic/common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/usb/device" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/nrfx_glue" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/bluetooth" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/shell/modules/kernel_service/thread/../" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/drivers/usb/common/nrf_usbd_common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/cmsis/CMSIS/Core/Include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/cmsis/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx/drivers/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx/mdk" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/hal_nordic/nrfx/." LLEXT_ALL_INCLUDE_CFLAGS = "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/libc/common/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/posix/options/getopt/" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/cpp/minimal/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic/nrf52/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic/common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/usb/device" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/nrfx_glue" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/bluetooth" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/shell/modules/kernel_service/thread/../" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/drivers/usb/common/nrf_usbd_common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/cmsis/CMSIS/Core/Include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/cmsis/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx/drivers/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx/mdk" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/hal_nordic/nrfx/." LLEXT_INCLUDE_CFLAGS = "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/libc/common/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/posix/options/getopt/" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/cpp/minimal/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic/nrf52/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/nordic/common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/usb/device" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/nrfx_glue" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/bluetooth" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/shell/modules/kernel_service/thread/../" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/drivers/usb/common/nrf_usbd_common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/cmsis/CMSIS/Core/Include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/cmsis/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx/drivers/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/nordic/nrfx/mdk" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/hal_nordic/nrfx/." LLEXT_GENERATED_INCLUDE_CFLAGS = "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated" -LLEXT_BASE_CFLAGS = "-DKERNEL" "-D__ZEPHYR__=1" "-D__LINUX_ERRNO_EXTENSIONS__" "-DPICOLIBC_DOUBLE_PRINTF_SCANF" "-D__PROGRAM_START" "-DNRF52840_XXAA" "-DK_HEAP_MEM_POOL_SIZE=16384" "-DLL_EXTENSION_BUILD" "-fno-strict-aliasing" "-fstack-protector" "-mstack-protector-guard=global" "-fno-common" "-fdiagnostics-color=always" "-mcpu=cortex-m4" "-mthumb" "-mabi=aapcs" "-mfpu=fpv4-sp-d16" "-mfloat-abi=hard" "-mfp16-format=ieee" "-mtp=soft" "-Wall" "-Wformat" "-Wformat-security" "-Wformat" "-Wno-format-zero-length" "-Wdouble-promotion" "-Wno-pointer-sign" "-Wpointer-arith" "-Wexpansion-to-defined" "-Wno-unused-but-set-variable" "-Werror=implicit-int" "-fno-asynchronous-unwind-tables" "-ftls-model=local-exec" "-fno-reorder-functions" "--param=min-pagesize=0" "-fno-defer-pop" "-fstack-usage" "-specs=picolibc.specs" "-D_POSIX_THREADS" "-std=c99" "-mlong-calls" "-mthumb" "-nodefaultlibs" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h" +LLEXT_BASE_CFLAGS = "-DKERNEL" "-D__ZEPHYR__=1" "-D__LINUX_ERRNO_EXTENSIONS__" "-DPICOLIBC_DOUBLE_PRINTF_SCANF" "-D__PROGRAM_START" "-DNRF52840_XXAA" "-DK_HEAP_MEM_POOL_SIZE=16384" "-DLL_EXTENSION_BUILD" "-fno-strict-aliasing" "-fno-common" "-fdiagnostics-color=always" "-mcpu=cortex-m4" "-mthumb" "-mabi=aapcs" "-mfpu=fpv4-sp-d16" "-mfloat-abi=hard" "-mfp16-format=ieee" "-mtp=soft" "-Wall" "-Wformat" "-Wformat-security" "-Wformat" "-Wno-format-zero-length" "-Wdouble-promotion" "-Wno-pointer-sign" "-Wpointer-arith" "-Wexpansion-to-defined" "-Wno-unused-but-set-variable" "-Werror=implicit-int" "-fno-asynchronous-unwind-tables" "-ftls-model=local-exec" "-fno-reorder-functions" "--param=min-pagesize=0" "-fno-defer-pop" "-specs=picolibc.specs" "-D_POSIX_THREADS" "-std=c99" "-mlong-calls" "-mthumb" "-nodefaultlibs" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h" LLEXT_GENERATED_IMACROS_CFLAGS = "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr/autoconf.h" diff --git a/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/cmake.cflags b/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/cmake.cflags index 18b393d5..1e43aa45 100644 --- a/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/cmake.cflags +++ b/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/cmake.cflags @@ -6,9 +6,9 @@ set(LLEXT_EDK_BOARD_REVISION "") set(LLEXT_EDK_BOARD_TARGET "arduino_nano_33_ble_nrf52840_sense") # Compile flags -set(LLEXT_CFLAGS "-DKERNEL;-D__ZEPHYR__=1;-D__LINUX_ERRNO_EXTENSIONS__;-DPICOLIBC_DOUBLE_PRINTF_SCANF;-D__PROGRAM_START;-DNRF52840_XXAA;-DK_HEAP_MEM_POOL_SIZE=16384;-DLL_EXTENSION_BUILD;-fno-strict-aliasing;-fstack-protector;-mstack-protector-guard=global;-fno-common;-fdiagnostics-color=always;-mcpu=cortex-m4;-mthumb;-mabi=aapcs;-mfpu=fpv4-sp-d16;-mfloat-abi=hard;-mfp16-format=ieee;-mtp=soft;-Wall;-Wformat;-Wformat-security;-Wformat;-Wno-format-zero-length;-Wdouble-promotion;-Wno-pointer-sign;-Wpointer-arith;-Wexpansion-to-defined;-Wno-unused-but-set-variable;-Werror=implicit-int;-fno-asynchronous-unwind-tables;-ftls-model=local-exec;-fno-reorder-functions;--param=min-pagesize=0;-fno-defer-pop;-fstack-usage;-specs=picolibc.specs;-D_POSIX_THREADS;-std=c99;-mlong-calls;-mthumb;-nodefaultlibs;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr/autoconf.h;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/libc/common/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/posix/options/getopt/;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/cpp/minimal/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic/nrf52/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic/common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/usb/device;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/nrfx_glue;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/bluetooth;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/shell/modules/kernel_service/thread/../;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/drivers/usb/common/nrf_usbd_common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/cmsis/CMSIS/Core/Include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/cmsis/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx/drivers/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx/mdk;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/hal_nordic/nrfx/.") +set(LLEXT_CFLAGS "-DKERNEL;-D__ZEPHYR__=1;-D__LINUX_ERRNO_EXTENSIONS__;-DPICOLIBC_DOUBLE_PRINTF_SCANF;-D__PROGRAM_START;-DNRF52840_XXAA;-DK_HEAP_MEM_POOL_SIZE=16384;-DLL_EXTENSION_BUILD;-fno-strict-aliasing;-fno-common;-fdiagnostics-color=always;-mcpu=cortex-m4;-mthumb;-mabi=aapcs;-mfpu=fpv4-sp-d16;-mfloat-abi=hard;-mfp16-format=ieee;-mtp=soft;-Wall;-Wformat;-Wformat-security;-Wformat;-Wno-format-zero-length;-Wdouble-promotion;-Wno-pointer-sign;-Wpointer-arith;-Wexpansion-to-defined;-Wno-unused-but-set-variable;-Werror=implicit-int;-fno-asynchronous-unwind-tables;-ftls-model=local-exec;-fno-reorder-functions;--param=min-pagesize=0;-fno-defer-pop;-specs=picolibc.specs;-D_POSIX_THREADS;-std=c99;-mlong-calls;-mthumb;-nodefaultlibs;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr/autoconf.h;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/libc/common/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/posix/options/getopt/;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/cpp/minimal/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic/nrf52/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic/common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/usb/device;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/nrfx_glue;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/bluetooth;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/shell/modules/kernel_service/thread/../;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/drivers/usb/common/nrf_usbd_common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/cmsis/CMSIS/Core/Include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/cmsis/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx/drivers/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx/mdk;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/hal_nordic/nrfx/.") set(LLEXT_ALL_INCLUDE_CFLAGS "-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/libc/common/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/posix/options/getopt/;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/cpp/minimal/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic/nrf52/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic/common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/usb/device;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/nrfx_glue;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/bluetooth;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/shell/modules/kernel_service/thread/../;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/drivers/usb/common/nrf_usbd_common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/cmsis/CMSIS/Core/Include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/cmsis/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx/drivers/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx/mdk;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/hal_nordic/nrfx/.") set(LLEXT_INCLUDE_CFLAGS "-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/libc/common/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/posix/options/getopt/;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/cpp/minimal/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic/nrf52/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/nordic/common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/usb/device;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/bluetooth/controller/ll_sw/nordic/hal/nrf5/nrfx_glue;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/bluetooth;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/shell/modules/kernel_service/thread/../;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/drivers/usb/common/nrf_usbd_common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/cmsis/CMSIS/Core/Include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/cmsis/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx/drivers/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/nordic/nrfx/mdk;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/hal_nordic/nrfx/.") set(LLEXT_GENERATED_INCLUDE_CFLAGS "-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated") -set(LLEXT_BASE_CFLAGS "-DKERNEL;-D__ZEPHYR__=1;-D__LINUX_ERRNO_EXTENSIONS__;-DPICOLIBC_DOUBLE_PRINTF_SCANF;-D__PROGRAM_START;-DNRF52840_XXAA;-DK_HEAP_MEM_POOL_SIZE=16384;-DLL_EXTENSION_BUILD;-fno-strict-aliasing;-fstack-protector;-mstack-protector-guard=global;-fno-common;-fdiagnostics-color=always;-mcpu=cortex-m4;-mthumb;-mabi=aapcs;-mfpu=fpv4-sp-d16;-mfloat-abi=hard;-mfp16-format=ieee;-mtp=soft;-Wall;-Wformat;-Wformat-security;-Wformat;-Wno-format-zero-length;-Wdouble-promotion;-Wno-pointer-sign;-Wpointer-arith;-Wexpansion-to-defined;-Wno-unused-but-set-variable;-Werror=implicit-int;-fno-asynchronous-unwind-tables;-ftls-model=local-exec;-fno-reorder-functions;--param=min-pagesize=0;-fno-defer-pop;-fstack-usage;-specs=picolibc.specs;-D_POSIX_THREADS;-std=c99;-mlong-calls;-mthumb;-nodefaultlibs;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h") +set(LLEXT_BASE_CFLAGS "-DKERNEL;-D__ZEPHYR__=1;-D__LINUX_ERRNO_EXTENSIONS__;-DPICOLIBC_DOUBLE_PRINTF_SCANF;-D__PROGRAM_START;-DNRF52840_XXAA;-DK_HEAP_MEM_POOL_SIZE=16384;-DLL_EXTENSION_BUILD;-fno-strict-aliasing;-fno-common;-fdiagnostics-color=always;-mcpu=cortex-m4;-mthumb;-mabi=aapcs;-mfpu=fpv4-sp-d16;-mfloat-abi=hard;-mfp16-format=ieee;-mtp=soft;-Wall;-Wformat;-Wformat-security;-Wformat;-Wno-format-zero-length;-Wdouble-promotion;-Wno-pointer-sign;-Wpointer-arith;-Wexpansion-to-defined;-Wno-unused-but-set-variable;-Werror=implicit-int;-fno-asynchronous-unwind-tables;-ftls-model=local-exec;-fno-reorder-functions;--param=min-pagesize=0;-fno-defer-pop;-specs=picolibc.specs;-D_POSIX_THREADS;-std=c99;-mlong-calls;-mthumb;-nodefaultlibs;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h") set(LLEXT_GENERATED_IMACROS_CFLAGS "-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr/autoconf.h") diff --git a/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h b/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h index 53263464..6b8b39f3 100644 --- a/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h +++ b/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h @@ -309,8 +309,6 @@ #define CONFIG_SWAP_NONATOMIC 1 #define CONFIG_TIMEOUT_64BIT 1 #define CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS 365 -#define CONFIG_REQUIRES_STACK_CANARIES 1 -#define CONFIG_STACK_CANARIES 1 #define CONFIG_STACK_POINTER_RANDOM 0 #define CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE 1 #define CONFIG_THREAD_LOCAL_STORAGE 1 @@ -644,7 +642,6 @@ #define CONFIG_BT_RPA_LOG_LEVEL_INHERIT 1 #define CONFIG_BT_RPA_LOG_LEVEL 3 #define CONFIG_BT_COMPANY_ID 0x05F1 -#define CONFIG_STACK_USAGE 1 #define CONFIG_PRINTK 1 #define CONFIG_EARLY_CONSOLE 1 #define CONFIG_ASSERT_VERBOSE 1 diff --git a/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h b/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h index a50f699f..b1a1dcf3 100644 --- a/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h +++ b/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h @@ -2,7 +2,7 @@ * Generated by gen_defines.py * * DTS input file: - * /home/burellil/Work/ArduinoCore-zephyr/ArduinoCore-zephyr/build/arduino_nano_33_ble_nrf52840_sense/zephyr/zephyr.dts.pre + * /home/kurte/github/ArduinoCore-zephyr/build/arduino_nano_33_ble_nrf52840_sense/zephyr/zephyr.dts.pre * * Directories with bindings: * $ZEPHYR_BASE/dts/bindings diff --git a/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/version.h b/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/version.h index 9a30242a..76aa14d4 100644 --- a/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/version.h +++ b/variants/arduino_nano_33_ble_nrf52840_sense/llext-edk/include/zephyr/include/generated/zephyr/version.h @@ -19,7 +19,7 @@ #define KERNEL_VERSION_EXTENDED_STRING "4.1.99+0" #define KERNEL_VERSION_TWEAK_STRING "4.1.99+0" -#define BUILD_VERSION v4.1.0-894-g9f06fc60e255 +#define BUILD_VERSION v4.1.0-898-g6b32f4d75066 #endif /* _KERNEL_VERSION_H_ */ diff --git a/variants/arduino_nano_33_ble_nrf52840_sense/provides.ld b/variants/arduino_nano_33_ble_nrf52840_sense/provides.ld index bb68a08a..a4ede126 100644 --- a/variants/arduino_nano_33_ble_nrf52840_sense/provides.ld +++ b/variants/arduino_nano_33_ble_nrf52840_sense/provides.ld @@ -1,2088 +1,2087 @@ PROVIDE(cmd_kernel_uptime = 0x000112a1); -PROVIDE(perform_lll_reset = 0x000214f9); -PROVIDE(disabled_cb = 0x000215d5); -PROVIDE(tx_cmplt_get = 0x000215d9); -PROVIDE(rx_replenish = 0x0002168d); -PROVIDE(init_reset = 0x00021785); -PROVIDE(rx_demux = 0x000218bd); -PROVIDE(dup_ext_adv_adi_store = 0x00023355); -PROVIDE(dup_found = 0x000233c1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00023595); -PROVIDE(ext_adv_info_fill = 0x000235b5); -PROVIDE(ext_adv_pdu_frag.constprop.0 = 0x000236d5); -PROVIDE(ext_adv_data_frag.constprop.0 = 0x000237bd); -PROVIDE(le_remote_feat_complete = 0x0002393d); -PROVIDE(le_ext_adv_report = 0x000239b5); -PROVIDE(le_ext_adv_legacy_report = 0x00023fed); -PROVIDE(adv_cmds_ext_check.constprop.0 = 0x00024165); -PROVIDE(adv_cmds_legacy_check.constprop.0 = 0x00024195); -PROVIDE(adv_time_get = 0x00026ad1); -PROVIDE(ticker_stop_cb = 0x00026b95); -PROVIDE(ticker_stop_op_cb = 0x00026db9); -PROVIDE(ext_disabled_cb = 0x00026c21); -PROVIDE(disabled_cb = 0x00026c2d); -PROVIDE(ticker_update_op_cb = 0x00026d35); -PROVIDE(ticker_stop_ext_op_cb = 0x00026e01); -PROVIDE(ticker_stop_aux_op_cb = 0x00026e49); -PROVIDE(adv_disable = 0x00026eb5); -PROVIDE(aux_disabled_cb = 0x00026f41); -PROVIDE(aux_disable = 0x00026fa5); +PROVIDE(perform_lll_reset = 0x000214c5); +PROVIDE(disabled_cb = 0x000215a1); +PROVIDE(tx_cmplt_get = 0x000215a5); +PROVIDE(rx_replenish = 0x00021659); +PROVIDE(init_reset = 0x00021751); +PROVIDE(rx_demux = 0x00021889); +PROVIDE(dup_ext_adv_adi_store = 0x00023321); +PROVIDE(dup_found = 0x0002338d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00023561); +PROVIDE(ext_adv_info_fill = 0x00023581); +PROVIDE(ext_adv_pdu_frag.constprop.0 = 0x000236a1); +PROVIDE(ext_adv_data_frag.constprop.0 = 0x00023789); +PROVIDE(le_remote_feat_complete = 0x00023909); +PROVIDE(le_ext_adv_report = 0x00023981); +PROVIDE(le_ext_adv_legacy_report = 0x00023fb9); +PROVIDE(adv_cmds_ext_check.constprop.0 = 0x00024131); +PROVIDE(adv_cmds_legacy_check.constprop.0 = 0x00024161); +PROVIDE(adv_time_get = 0x00026989); +PROVIDE(ticker_stop_cb = 0x00026a4d); +PROVIDE(ticker_stop_op_cb = 0x00026c71); +PROVIDE(ext_disabled_cb = 0x00026ad9); +PROVIDE(disabled_cb = 0x00026ae5); +PROVIDE(ticker_update_op_cb = 0x00026bed); +PROVIDE(ticker_stop_ext_op_cb = 0x00026cb9); +PROVIDE(ticker_stop_aux_op_cb = 0x00026d01); +PROVIDE(adv_disable = 0x00026d6d); +PROVIDE(aux_disabled_cb = 0x00026df9); +PROVIDE(aux_disable = 0x00026e5d); PROVIDE(ticker_cb = 0x00011499); -PROVIDE(init_reset = 0x00026ff5); -PROVIDE(conn_release.constprop.0 = 0x00027045); -PROVIDE(disable = 0x000270cd); -PROVIDE(ext_disable = 0x00027269); -PROVIDE(adv_scan_pdu_addr_update.constprop.0 = 0x00027db9); -PROVIDE(aux_time_get = 0x00028019); -PROVIDE(aux_time_min_get = 0x000280dd); -PROVIDE(ticker_op_cb = 0x00028115); -PROVIDE(ticker_cb = 0x00028119); +PROVIDE(init_reset = 0x00026ead); +PROVIDE(conn_release.constprop.0 = 0x00026efd); +PROVIDE(disable = 0x00026f85); +PROVIDE(ext_disable = 0x00027121); +PROVIDE(adv_scan_pdu_addr_update.constprop.0 = 0x00027c71); +PROVIDE(aux_time_get = 0x00027ed1); +PROVIDE(aux_time_min_get = 0x00027f95); +PROVIDE(ticker_op_cb = 0x00027fcd); +PROVIDE(ticker_cb = 0x00027fd1); PROVIDE(mfy_aux_offset_get = 0x00012881); -PROVIDE(adv_type_check = 0x00028dcd); -PROVIDE(ticker_op_cb = 0x00028e49); -PROVIDE(sync_stop = 0x00028e4d); -PROVIDE(ticker_cb = 0x00028eb9); +PROVIDE(adv_type_check = 0x00028c3d); +PROVIDE(ticker_op_cb = 0x00028cb9); +PROVIDE(sync_stop = 0x00028cbd); +PROVIDE(ticker_cb = 0x00028d29); PROVIDE(mfy_sync_offset_get = 0x00012b91); -PROVIDE(duration_period_setup = 0x00029d95); -PROVIDE(duration_period_update = 0x00029e25); -PROVIDE(ticker_cb = 0x00029e89); -PROVIDE(ext_disabled_cb = 0x0002a055); -PROVIDE(ticker_stop_ext_op_cb = 0x0002a065); -PROVIDE(ext_disable = 0x0002a0ad); -PROVIDE(disable = 0x0002a1f9); -PROVIDE(ticker_cb = 0x0002a775); -PROVIDE(flush = 0x0002a809); -PROVIDE(flush_safe = 0x0002a88d); -PROVIDE(done_disabled_cb = 0x0002a935); -PROVIDE(ticker_op_cb = 0x0002a979); -PROVIDE(init_reset = 0x0002ac81); -PROVIDE(tx_lll_flush = 0x0002acf5); -PROVIDE(ticker_stop_op_cb = 0x0002ade1); -PROVIDE(disabled_cb = 0x0002ae4d); -PROVIDE(conn_disable = 0x0002ae91); -PROVIDE(conn_setup_adv_scan_disabled_cb = 0x0002af1d); -PROVIDE(ticker_update_conn_op_cb = 0x0002af35); -PROVIDE(ticker_start_conn_op_cb = 0x0002af79); -PROVIDE(ticker_stop_conn_op_cb = 0x0002afd9); +PROVIDE(duration_period_setup = 0x00029be9); +PROVIDE(duration_period_update = 0x00029c79); +PROVIDE(ticker_cb = 0x00029cdd); +PROVIDE(ext_disabled_cb = 0x00029ea9); +PROVIDE(ticker_stop_ext_op_cb = 0x00029eb9); +PROVIDE(ext_disable = 0x00029f01); +PROVIDE(disable = 0x0002a04d); +PROVIDE(ticker_cb = 0x0002a5c9); +PROVIDE(flush = 0x0002a65d); +PROVIDE(flush_safe = 0x0002a6e1); +PROVIDE(done_disabled_cb = 0x0002a789); +PROVIDE(ticker_op_cb = 0x0002a7cd); +PROVIDE(init_reset = 0x0002aad5); +PROVIDE(tx_lll_flush = 0x0002ab49); +PROVIDE(ticker_stop_op_cb = 0x0002ac35); +PROVIDE(disabled_cb = 0x0002aca1); +PROVIDE(conn_disable = 0x0002ace5); +PROVIDE(conn_setup_adv_scan_disabled_cb = 0x0002ad71); +PROVIDE(ticker_update_conn_op_cb = 0x0002ad89); +PROVIDE(ticker_start_conn_op_cb = 0x0002adcd); +PROVIDE(ticker_stop_conn_op_cb = 0x0002ae2d); PROVIDE(ull_conn_update_ticker.constprop.0 = 0x00013a59); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0002b039); -PROVIDE(conn_cleanup = 0x0002baf1); -PROVIDE(tx_demux = 0x0002bca9); -PROVIDE(ticker_update_latency_cancel_op_cb = 0x0003169d); -PROVIDE(ticker_op_cb = 0x000316e9); -PROVIDE(ticker_op_stop_adv_cb = 0x0003171d); -PROVIDE(ticker_op_stop_scan_cb = 0x000318d9); -PROVIDE(ticker_op_cb = 0x000318dd); -PROVIDE(ticker_op_stop_scan_other_cb = 0x00031911); -PROVIDE(ticker_op_cb = 0x00031ddd); -PROVIDE(ticker_match_any_op_cb = 0x00031de1); -PROVIDE(ticker_match_cen_op_cb = 0x00031df9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0002ae8d); +PROVIDE(conn_cleanup = 0x0002b945); +PROVIDE(tx_demux = 0x0002bafd); +PROVIDE(ticker_update_latency_cancel_op_cb = 0x00031441); +PROVIDE(ticker_op_cb = 0x0003148d); +PROVIDE(ticker_op_stop_adv_cb = 0x000314c1); +PROVIDE(ticker_op_stop_scan_cb = 0x0003167d); +PROVIDE(ticker_op_cb = 0x00031681); +PROVIDE(ticker_op_stop_scan_other_cb = 0x000316b5); +PROVIDE(ticker_op_cb = 0x00031b81); +PROVIDE(ticker_match_any_op_cb = 0x00031b85); +PROVIDE(ticker_match_cen_op_cb = 0x00031b9d); PROVIDE(ull_hdr_get_cb = 0x00014f41); -PROVIDE(after_match_slot_get.constprop.0 = 0x00031e05); -PROVIDE(rl_update = 0x000321b5); -PROVIDE(fal_update = 0x00032229); -PROVIDE(rpa_timeout = 0x00032d95); -PROVIDE(time_slot_callback_work = 0x0003342d); -PROVIDE(ticker_stop_prepare_cb = 0x00033471); -PROVIDE(ticker_stop_work_cb = 0x00033541); -PROVIDE(time_slot_delay = 0x000334a5); -PROVIDE(time_slot_callback_prepare = 0x00033511); -PROVIDE(time_slot_callback_abort = 0x00033521); -PROVIDE(isr_abort = 0x00034361); -PROVIDE(isr_tx = 0x00034379); -PROVIDE(isr_rx = 0x00034c4d); -PROVIDE(is_abort_cb = 0x00034475); -PROVIDE(resume_prepare_cb = 0x0003496d); -PROVIDE(isr_abort_all = 0x000344e5); -PROVIDE(abort_cb = 0x00034539); -PROVIDE(chan_prepare = 0x0003483d); -PROVIDE(isr_done = 0x00034995); +PROVIDE(after_match_slot_get.constprop.0 = 0x00031ba9); +PROVIDE(rl_update = 0x00031f59); +PROVIDE(fal_update = 0x00031fcd); +PROVIDE(rpa_timeout = 0x00032b19); +PROVIDE(time_slot_callback_work = 0x000331b1); +PROVIDE(ticker_stop_prepare_cb = 0x000331f5); +PROVIDE(ticker_stop_work_cb = 0x000332c5); +PROVIDE(time_slot_delay = 0x00033229); +PROVIDE(time_slot_callback_prepare = 0x00033295); +PROVIDE(time_slot_callback_abort = 0x000332a5); +PROVIDE(isr_abort = 0x000340e5); +PROVIDE(isr_tx = 0x000340fd); +PROVIDE(isr_rx = 0x000349d1); +PROVIDE(is_abort_cb = 0x000341f9); +PROVIDE(resume_prepare_cb = 0x000346f1); +PROVIDE(isr_abort_all = 0x00034269); +PROVIDE(abort_cb = 0x000342bd); +PROVIDE(chan_prepare = 0x000345c1); +PROVIDE(isr_done = 0x00034719); PROVIDE(prepare_cb = 0x000153f9); -PROVIDE(isr_done = 0x00034ea1); -PROVIDE(isr_tx_rx = 0x00034ef1); -PROVIDE(isr_rx = 0x000350ed); -PROVIDE(isr_tx_connect_rsp = 0x00035001); -PROVIDE(isr_early_abort = 0x00035055); -PROVIDE(isr_race = 0x000350e9); +PROVIDE(isr_done = 0x00034c25); +PROVIDE(isr_tx_rx = 0x00034c75); +PROVIDE(isr_rx = 0x00034e71); +PROVIDE(isr_tx_connect_rsp = 0x00034d85); +PROVIDE(isr_early_abort = 0x00034dd9); +PROVIDE(isr_race = 0x00034e6d); PROVIDE(prepare_cb = 0x00015581); -PROVIDE(isr_done = 0x00035459); +PROVIDE(isr_done = 0x000351dd); PROVIDE(prepare_cb = 0x00015841); -PROVIDE(abort_cb = 0x000354c9); -PROVIDE(is_abort_cb = 0x000355b5); -PROVIDE(isr_done_cleanup = 0x00035855); +PROVIDE(abort_cb = 0x0003524d); +PROVIDE(is_abort_cb = 0x00035339); +PROVIDE(isr_done_cleanup = 0x000355d9); PROVIDE(isr_window = 0x00015cf1); -PROVIDE(resume_prepare_cb = 0x00035945); +PROVIDE(resume_prepare_cb = 0x000356c9); PROVIDE(common_prepare_cb = 0x00015a01); PROVIDE(isr_rx = 0x00015d91); -PROVIDE(ticker_op_start_cb = 0x00035971); -PROVIDE(ticker_stop_cb = 0x000359a5); -PROVIDE(isr_abort = 0x00035715); -PROVIDE(prepare_cb = 0x00035655); -PROVIDE(isr_common_done = 0x0003565d); -PROVIDE(isr_done = 0x00035769); -PROVIDE(isr_tx = 0x0003577d); -PROVIDE(isr_scan_tgta_check = 0x000359ed); -PROVIDE(abort_cb = 0x00035a69); -PROVIDE(isr_rx_scan_report.constprop.0 = 0x00035ac9); +PROVIDE(ticker_op_start_cb = 0x000356f5); +PROVIDE(ticker_stop_cb = 0x00035729); +PROVIDE(isr_abort = 0x00035499); +PROVIDE(prepare_cb = 0x000353d9); +PROVIDE(isr_common_done = 0x000353e1); +PROVIDE(isr_done = 0x000354ed); +PROVIDE(isr_tx = 0x00035501); +PROVIDE(isr_scan_tgta_check = 0x00035771); +PROVIDE(abort_cb = 0x000357ed); +PROVIDE(isr_rx_scan_report.constprop.0 = 0x0003584d); PROVIDE(prepare_cb = 0x000163c1); -PROVIDE(isr_rx_ull_schedule = 0x00036a3d); -PROVIDE(isr_early_abort = 0x00036495); -PROVIDE(isr_done = 0x00035f95); -PROVIDE(isr_tx = 0x00035ff5); -PROVIDE(isr_tx_scan_req_lll_schedule = 0x000360c1); -PROVIDE(isr_rx_lll_schedule = 0x00036a59); -PROVIDE(isr_tx_scan_req_ull_schedule = 0x00036111); -PROVIDE(isr_tx_connect_req = 0x00036161); -PROVIDE(isr_rx_connect_rsp = 0x000361b1); -PROVIDE(abort_cb = 0x000364e1); -PROVIDE(is_abort_cb = 0x00036579); +PROVIDE(isr_rx_ull_schedule = 0x000367c1); +PROVIDE(isr_early_abort = 0x00036219); +PROVIDE(isr_done = 0x00035d19); +PROVIDE(isr_tx = 0x00035d79); +PROVIDE(isr_tx_scan_req_lll_schedule = 0x00035e45); +PROVIDE(isr_rx_lll_schedule = 0x000367dd); +PROVIDE(isr_tx_scan_req_ull_schedule = 0x00035e95); +PROVIDE(isr_tx_connect_req = 0x00035ee5); +PROVIDE(isr_rx_connect_rsp = 0x00035f35); +PROVIDE(abort_cb = 0x00036265); +PROVIDE(is_abort_cb = 0x000362fd); PROVIDE(isr_rx = 0x00016689); PROVIDE(prepare_cb = 0x00016e09); PROVIDE(prepare_cb = 0x00017071); -PROVIDE(mulShift64 = 0x00048b6b); -PROVIDE(loader = 0x00018b35); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00018cdd); -PROVIDE(sys_slist_find_and_remove = 0x00044697); -PROVIDE(process_recheck = 0x000446cd); -PROVIDE(validate_args = 0x00044705); -PROVIDE(notify_one = 0x00044725); -PROVIDE(process_event = 0x000194b9); -PROVIDE(transition_complete = 0x00044751); -PROVIDE(dummy_timestamp = 0x00044a7f); -PROVIDE(default_get_timestamp = 0x00044a83); -PROVIDE(atomic_inc = 0x00044a87); -PROVIDE(z_log_init.isra.0 = 0x000196d5); -PROVIDE(enable_logger = 0x00044aa1); -PROVIDE(backend_filter_set = 0x00019a49); -PROVIDE(z_cbprintf_cpy = 0x00044b2f); -PROVIDE(z_log_msg_simple_create = 0x00044b8d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00044bfb); -PROVIDE(log_output_write = 0x00044c59); -PROVIDE(out_func = 0x00044c75); -PROVIDE(cr_out_func = 0x00044c91); -PROVIDE(print_formatted = 0x00019c9d); -PROVIDE(newline_print = 0x00019cc1); -PROVIDE(class_handler = 0x0001a035); -PROVIDE(custom_handler = 0x0001a075); -PROVIDE(vendor_handler = 0x0001a0d5); -PROVIDE(usb_reset_alt_setting = 0x0001a111); -PROVIDE(is_ep_valid.part.0 = 0x0001a121); -PROVIDE(usb_handle_request.constprop.0 = 0x0001a159); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00044d41); -PROVIDE(get_ep_bm_from_addr = 0x0001a185); -PROVIDE(disable_endpoint = 0x0001a1cd); -PROVIDE(forward_status_cb = 0x0001a24d); -PROVIDE(usb_halt_endpoint_req.isra.0 = 0x0001a2fd); -PROVIDE(set_endpoint = 0x0001a399); -PROVIDE(usb_handle_standard_request = 0x0001a4ad); -PROVIDE(usb_data_to_host = 0x0001a85d); -PROVIDE(usb_handle_control_transfer = 0x0001a8bd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00044d5f); -PROVIDE(usb_ep_get_transfer = 0x0001aec5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00044ddd); -PROVIDE(usb_transfer_work = 0x0001aef1); -PROVIDE(cdc_interface_config = 0x00044e13); -PROVIDE(cdc_acm_irq_callback_work_handler = 0x00044e27); -PROVIDE(cdc_acm_irq_tx_disable = 0x00044e31); -PROVIDE(cdc_acm_irq_tx_ready = 0x00044e3b); -PROVIDE(cdc_acm_irq_rx_disable = 0x00044e5b); -PROVIDE(cdc_acm_irq_rx_ready = 0x00044e65); -PROVIDE(cdc_acm_irq_is_pending = 0x00044e73); -PROVIDE(cdc_acm_irq_callback_set = 0x00044e8f); -PROVIDE(cdc_acm_line_ctrl_get = 0x00044e97); -PROVIDE(cdc_acm_irq_rx_enable = 0x0001b29d); -PROVIDE(cdc_acm_irq_tx_enable = 0x0001b2bd); -PROVIDE(cdc_acm_fifo_fill = 0x0001b2dd); -PROVIDE(cdc_acm_write_cb = 0x0001b319); -PROVIDE(cdc_acm_reset_port = 0x0001b36d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00044ec9); -PROVIDE(cdc_acm_int_in = 0x0001b3a9); -PROVIDE(cdc_acm_init = 0x0001b48d); -PROVIDE(tx_work_handler = 0x0001b5ad); -PROVIDE(cdc_acm_send_notification.isra.0 = 0x0001b4d5); -PROVIDE(cdc_acm_line_ctrl_set = 0x00044ee7); -PROVIDE(cdc_acm_poll_out = 0x0001b519); -PROVIDE(cdc_acm_read_cb = 0x0001b625); -PROVIDE(cdc_acm_fifo_read = 0x00044fa5); -PROVIDE(cdc_acm_poll_in = 0x00044fed); -PROVIDE(cdc_acm_dev_status_cb = 0x0001b6c5); -PROVIDE(cdc_acm_irq_update = 0x00044fff); -PROVIDE(z_usb_work_q_init = 0x0001b84d); -PROVIDE(cmd_kernel_cycles = 0x0001b881); -PROVIDE(cmd_kernel_sleep = 0x0001b89d); -PROVIDE(cmd_kernel_version = 0x0001b8ed); -PROVIDE(cmd_kernel_log_level_set = 0x0001b905); -PROVIDE(thread_valid_cb = 0x0004502f); -PROVIDE(cmd_kernel_thread_list = 0x0001b9a9); -PROVIDE(shell_tdata_dump = 0x0001b9dd); -PROVIDE(cmd_kernel_thread_stacks = 0x0001babd); -PROVIDE(shell_stack_dump = 0x0001bb49); -PROVIDE(cmd_kernel_thread_suspend = 0x0001bba9); -PROVIDE(cmd_kernel_thread_resume = 0x0001bc0d); -PROVIDE(cmd_kernel_thread_kill = 0x0001bc71); -PROVIDE(cmd_device_list = 0x0001bcd5); -PROVIDE(cmd_devmem = 0x0001bdcd); -PROVIDE(cmd_dump = 0x0001be91); -PROVIDE(set_bypass.isra.0 = 0x0001c029); -PROVIDE(bypass_cb = 0x0001c075); -PROVIDE(cmd_load = 0x0001c189); -PROVIDE(log_msg_generic_get_wlen = 0x0004503b); -PROVIDE(uart_irq_tx_disable = 0x0004505b); -PROVIDE(enable = 0x00045065); -PROVIDE(read_uart = 0x00045077); -PROVIDE(uninit = 0x00045089); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001c261); -PROVIDE(enable_shell_uart = 0x0001c285); -PROVIDE(write_uart = 0x000450a9); -PROVIDE(init = 0x0001c2bd); -PROVIDE(uart_callback = 0x0001c311); -PROVIDE(cmd_buffer_clear = 0x00045115); -PROVIDE(atomic_or = 0x0004512b); -PROVIDE(atomic_and = 0x00045149); -PROVIDE(k_mutex_lock = 0x00045167); -PROVIDE(z_shell_raw_fprintf = 0x0004516b); -PROVIDE(shell_internal_help_print = 0x0001c455); -PROVIDE(z_shell_strlen = 0x00045185); -PROVIDE(shell_log_process = 0x00045191); -PROVIDE(transport_evt_handler = 0x000451c5); -PROVIDE(kill_handler = 0x0001c475); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x0001c4d1); -PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x000451dd); -PROVIDE(z_flag_history_exit_set.isra.0 = 0x000451f5); -PROVIDE(history_handle = 0x0001c4dd); -PROVIDE(z_flag_insert_mode_set.isra.0 = 0x0004520b); -PROVIDE(k_mutex_unlock.isra.0 = 0x0004522b); -PROVIDE(execute = 0x0001c58d); -PROVIDE(shell_signal_handle = 0x0004522f); -PROVIDE(state_set.constprop.0 = 0x0001c855); -PROVIDE(cmd_help = 0x0001d06d); -PROVIDE(out_func = 0x000454a1); -PROVIDE(z_shell_strlen = 0x000454dd); -PROVIDE(z_shell_raw_fprintf = 0x000458c1); -PROVIDE(z_clear_eos = 0x0001d361); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x0001d37d); -PROVIDE(full_line_cmd.isra.0 = 0x000458db); -PROVIDE(reprint_from_cursor = 0x0001d5a9); -PROVIDE(data_insert = 0x00045bf3); -PROVIDE(z_shell_raw_fprintf = 0x00045e59); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x0001d779); -PROVIDE(formatted_text_print.constprop.0 = 0x00045e73); -PROVIDE(cmd_comment = 0x00045f55); -PROVIDE(cmd_shell_stats_reset = 0x00045f59); -PROVIDE(z_shell_raw_fprintf = 0x00045f61); -PROVIDE(cmd_resize_default = 0x0001d8a1); -PROVIDE(cmd_shell_stats_show = 0x0001d8cd); -PROVIDE(cmd_backends = 0x0001d8e1); -PROVIDE(cmd_prompt_on = 0x00045f7b); -PROVIDE(cmd_prompt_off = 0x0001d92d); -PROVIDE(cmd_history = 0x0001d93d); -PROVIDE(cmd_get_retval = 0x0001d97d); -PROVIDE(cmd_echo = 0x0001d999); -PROVIDE(cmd_clear = 0x0001d9e9); -PROVIDE(cmd_resize = 0x0001da21); -PROVIDE(cmd_vt100_off = 0x00045f87); -PROVIDE(cmd_bacskpace_mode_delete = 0x00045fab); -PROVIDE(cmd_colors_off = 0x00045fcf); -PROVIDE(cmd_bacskpace_mode_backspace = 0x00045ff3); -PROVIDE(cmd_echo_off = 0x00046017); -PROVIDE(cmd_colors_on = 0x0004603b); -PROVIDE(cmd_vt100_on = 0x0004605f); -PROVIDE(cmd_echo_on = 0x00046083); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000462c5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000463fd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046433); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046453); -PROVIDE(mem_manage_fault.constprop.0 = 0x0001e331); -PROVIDE(bus_fault.constprop.0 = 0x0001e48d); -PROVIDE(usage_fault.constprop.0 = 0x0001e5f9); -PROVIDE(cbputc = 0x000464c7); -PROVIDE(picolibc_put = 0x000464d3); -PROVIDE(malloc_prepare = 0x0001ed45); -PROVIDE(malloc_lock = 0x0001ed69); -PROVIDE(malloc_unlock = 0x0001ed7d); -PROVIDE(fixed_data_unref = 0x0004672f); -PROVIDE(net_buf_destroy = 0x0001efc1); -PROVIDE(fixed_data_alloc = 0x0001f031); -PROVIDE(nordicsemi_nrf52_init = 0x0001f18d); -PROVIDE(gpio_pin_configure_dt.constprop.0 = 0x000467f9); -PROVIDE(board_init = 0x0001f1b1); -PROVIDE(ah = 0x0001f24d); -PROVIDE(hci_rx_buf_destroy = 0x0001f2a9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0004687b); -PROVIDE(ticker_dequeue = 0x0001fd41); -PROVIDE(ticks_to_expire_prep = 0x0001fdb5); -PROVIDE(start_us.constprop.0 = 0x0001fe01); -PROVIDE(ticker_job_list_insert = 0x0001fead); -PROVIDE(hci_driver_close = 0x00022c15); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00022c65); -PROVIDE(hci_driver_open = 0x00022c85); -PROVIDE(prio_recv_thread = 0x00022d95); -PROVIDE(recv_thread = 0x00022f25); -PROVIDE(bt_recv_prio.isra.0 = 0x00022d7d); -PROVIDE(hci_driver_send = 0x00022e65); -PROVIDE(llcp_lp_enc_tx = 0x0002c2d9); -PROVIDE(lp_enc_ntf = 0x0002c379); -PROVIDE(llcp_rp_enc_tx = 0x0002c401); -PROVIDE(lp_enc_send_start_enc_rsp.part.0 = 0x0002c4c9); -PROVIDE(rp_enc_send_enc_rsp.constprop.0 = 0x0002c571); -PROVIDE(rp_enc_send_start_enc_req.constprop.0 = 0x0002c601); -PROVIDE(rp_enc_execute_fsm = 0x0002c6b5); -PROVIDE(lp_enc_execute_fsm = 0x0002c951); -PROVIDE(pu_calc_eff_time = 0x0002cc8d); -PROVIDE(pu_check_update_ind = 0x0002cce9); -PROVIDE(pu_update_eff_times = 0x0002cd49); -PROVIDE(pu_ntf = 0x0002ce2d); -PROVIDE(pu_dle_ntf = 0x0002cedd); -PROVIDE(rp_pu_st_wait_tx_ack_phy.part.0 = 0x0002cf4d); -PROVIDE(pu_prep_update_ind.constprop.0 = 0x0002d051); -PROVIDE(lp_pu_tx.constprop.0 = 0x0002d0e9); -PROVIDE(lp_pu_send_phy_req.constprop.0.isra.0 = 0x0002d23d); -PROVIDE(lp_pu_send_phy_update_ind.isra.0 = 0x0002d299); -PROVIDE(pu_apply_phy_update.isra.0 = 0x0002d2d1); -PROVIDE(lp_pu_execute_fsm = 0x0002d359); -PROVIDE(rp_pu_tx.constprop.0 = 0x0002d785); -PROVIDE(rp_pu_send_phy_rsp.isra.0 = 0x0002d87d); -PROVIDE(rp_pu_send_phy_update_ind.isra.0 = 0x0002d8c9); -PROVIDE(rp_pu_execute_fsm = 0x0002d91d); -PROVIDE(pdu_validate_conn_update_ind = 0x0002dc55); -PROVIDE(pdu_validate_chan_map_ind = 0x0002dc65); -PROVIDE(pdu_validate_terminate_ind = 0x0002dc75); -PROVIDE(pdu_validate_enc_req = 0x0002dc85); -PROVIDE(pdu_validate_enc_rsp = 0x0002dc95); -PROVIDE(pdu_validate_start_enc_req = 0x0002dca5); -PROVIDE(pdu_validate_feature_req = 0x0002dcb5); -PROVIDE(pdu_validate_version_ind = 0x0002dcc5); -PROVIDE(pdu_validate_conn_param_req = 0x0002dcd5); -PROVIDE(pdu_validate_reject_ext_ind = 0x0002dce5); -PROVIDE(pdu_validate_phy_upd_ind = 0x0002dcf5); -PROVIDE(create_procedure = 0x0002dd05); -PROVIDE(pdu_validate_clock_accuracy_rsp = 0x0002dd3d); -PROVIDE(pdu_validate_start_enc_rsp = 0x0002dd4d); -PROVIDE(pdu_validate_unknown_rsp = 0x0002dd5d); -PROVIDE(pdu_validate_feature_rsp = 0x0002dd6d); -PROVIDE(pdu_validate_pause_enc_req = 0x0002dd7d); -PROVIDE(pdu_validate_pause_enc_rsp = 0x0002dd8d); -PROVIDE(pdu_validate_reject_ind = 0x0002dd9d); -PROVIDE(pdu_validate_per_init_feat_xchg = 0x0002ddad); -PROVIDE(pdu_validate_conn_param_rsp = 0x0002ddbd); -PROVIDE(pdu_validate_ping_req = 0x0002ddcd); -PROVIDE(pdu_validate_ping_rsp = 0x0002dddd); -PROVIDE(pdu_validate_length_req = 0x0002dded); -PROVIDE(pdu_validate_length_rsp = 0x0002ddfd); -PROVIDE(pdu_validate_phy_req = 0x0002de0d); -PROVIDE(pdu_validate_phy_rsp = 0x0002de1d); -PROVIDE(pdu_validate_min_used_chan_ind = 0x0002de2d); -PROVIDE(lp_comm_tx = 0x0002e851); -PROVIDE(rp_comm_tx_proxy = 0x0002e955); -PROVIDE(rp_comm_send_rsp.constprop.0 = 0x0002ea51); -PROVIDE(rp_comm_execute_fsm = 0x0002eaf5); -PROVIDE(lp_comm_ntf = 0x0002ed61); -PROVIDE(lp_comm_complete.constprop.0 = 0x0002ee49); -PROVIDE(lp_comm_send_req.constprop.0.isra.0 = 0x0002ef59); -PROVIDE(lp_comm_execute_fsm = 0x0002f0d1); -PROVIDE(lr_dequeue = 0x0002f2a1); -PROVIDE(lr_act_complete = 0x0002f309); -PROVIDE(llcp_lr_check_done.part.0 = 0x0002f42d); -PROVIDE(lr_act_run = 0x0002f4ad); -PROVIDE(lp_cu_tx = 0x00030089); -PROVIDE(cu_ntf = 0x0003013d); -PROVIDE(rp_cu_conn_param_req_ntf = 0x000301b9); -PROVIDE(cu_update_conn_parameters = 0x00030219); -PROVIDE(rp_cu_tx = 0x00030265); -PROVIDE(lp_cu_send_conn_param_req.constprop.0 = 0x00030331); -PROVIDE(cu_check_conn_parameters.constprop.0 = 0x000303a9); -PROVIDE(rp_cu_send_conn_update_ind_finalize.constprop.0 = 0x000303fd); -PROVIDE(rp_cu_send_conn_update_ind.constprop.0.isra.0 = 0x00030481); -PROVIDE(lp_cu_send_conn_update_ind.isra.0 = 0x000304c1); -PROVIDE(rp_cu_check_instant.constprop.0 = 0x00030551); -PROVIDE(rp_cu_send_reject_ext_ind.constprop.0 = 0x000305c9); -PROVIDE(rp_cu_st_wait_conn_param_req_available.part.0.isra.0 = 0x00030615); -PROVIDE(rp_cu_execute_fsm = 0x0003069d); -PROVIDE(lp_cu_send_reject_ext_ind.constprop.0 = 0x00030915); -PROVIDE(lp_cu_execute_fsm = 0x00030981); -PROVIDE(llcp_rr_check_done.part.0 = 0x00030f3d); -PROVIDE(rr_act_run = 0x00030fcd); -PROVIDE(rr_act_unsupported = 0x0003105d); -PROVIDE(rr_act_reject = 0x000310fd); -PROVIDE(rr_st_active.constprop.0 = 0x00031265); -PROVIDE(rr_execute_fsm = 0x000312d9); -PROVIDE(rtc0_nrf5_isr = 0x000335a5); -PROVIDE(swi_lll_nrf5_isr = 0x000335d5); -PROVIDE(ticker_start_op_cb = 0x000335dd); -PROVIDE(ticker_stop_op_cb = 0x0003368d); -PROVIDE(isr_race = 0x00033719); -PROVIDE(preempt_ticker_cb = 0x0003371d); -PROVIDE(preempt_ticker_start.constprop.0 = 0x000337a1); -PROVIDE(preempt = 0x00033901); -PROVIDE(clock_ready = 0x00034211); -PROVIDE(blocking_on = 0x00034219); -PROVIDE(isr_done = 0x00036a75); -PROVIDE(do_ecb = 0x00038885); -PROVIDE(isr_ecb = 0x000388d5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000468e7); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x000389a9); -PROVIDE(call_fn_table = 0x000389b5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00038d15); -PROVIDE(llext_copy_region = 0x00038d39); -PROVIDE(llext_read = 0x00046985); -PROVIDE(llext_seek = 0x00046989); -PROVIDE(llext_peek = 0x0004698d); -PROVIDE(llext_alloc = 0x00038e79); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046997); -PROVIDE(llext_find_extension_sym_iterate = 0x000469d9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000469f1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00039c71); -PROVIDE(llext_shell_name_cb = 0x00046acf); -PROVIDE(llext_name_get = 0x00039d45); -PROVIDE(llext_name_arg_get = 0x00046ae5); -PROVIDE(cmd_llext_list_symbols = 0x00039d75); -PROVIDE(cmd_llext_list = 0x00039de1); -PROVIDE(llext_shell_list_cb = 0x00039e01); -PROVIDE(cmd_llext_load_hex = 0x00039e19); -PROVIDE(cmd_llext_call_fn = 0x00039f0d); -PROVIDE(cmd_llext_unload = 0x00039f39); -PROVIDE(endpoint_ctx = 0x00039f79); -PROVIDE(ep_ctx_reset = 0x00046af7); -PROVIDE(usbd_work_schedule = 0x00039fd9); -PROVIDE(usbd_evt_put = 0x00039fe9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046b1d); -PROVIDE(usbd_evt_get = 0x00039ff5); -PROVIDE(usb_init = 0x0003a005); -PROVIDE(usbd_event_handler = 0x0003a2f5); -PROVIDE(usbd_work_handler = 0x0003a465); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00046b3b); -PROVIDE(hfxo_stop.constprop.0.isra.0 = 0x0003a075); -PROVIDE(k_mutex_unlock.isra.0 = 0x00046b3f); -PROVIDE(eps_ctx_init = 0x0003a0b5); -PROVIDE(usbd_evt_flush = 0x0003a11d); -PROVIDE(usbd_evt_alloc = 0x0003a139); -PROVIDE(usb_dc_power_event_handler = 0x0003a1c1); -PROVIDE(usbd_event_transfer_data = 0x0003a21d); -PROVIDE(nrf52_errata_187 = 0x0003ae05); -PROVIDE(ep_state_access = 0x0003ae2d); -PROVIDE(ep2bit = 0x00046b93); -PROVIDE(usbd_errata_187_211_begin = 0x0003ae4d); -PROVIDE(usbd_errata_187_211_end = 0x0003ae89); -PROVIDE(usbd_dma_pending_clear = 0x0003aec5); -PROVIDE(usbd_ep_abort = 0x0003b80d); -PROVIDE(adc_context_start_sampling = 0x0003baf5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046bd9); -PROVIDE(adc_nrfx_channel_setup = 0x0003bb11); -PROVIDE(adc_context_on_timer_expired = 0x00046bf9); -PROVIDE(adc_nrfx_read = 0x0003bc89); -PROVIDE(init_saadc = 0x0003bebd); -PROVIDE(saadc_irq_handler = 0x0003bf09); -PROVIDE(get_status = 0x00046c2b); -PROVIDE(stop = 0x00046c3d); -PROVIDE(api_stop = 0x00046c8d); -PROVIDE(async_start = 0x00046c93); -PROVIDE(api_start = 0x00046ced); -PROVIDE(onoff_stop = 0x0003c011); -PROVIDE(onoff_started_callback = 0x00046cfb); -PROVIDE(onoff_start = 0x0003c039); -PROVIDE(lfclk_start = 0x00046d07); -PROVIDE(generic_hfclk_stop = 0x0003c075); -PROVIDE(lfclk_stop = 0x00046d0d); -PROVIDE(blocking_start_callback = 0x00046d13); -PROVIDE(clk_init = 0x0003c0a9); -PROVIDE(clock_event_handler = 0x0003c205); -PROVIDE(api_blocking_start = 0x0003c101); -PROVIDE(clkstarted_handle.constprop.0 = 0x0003c13d); -PROVIDE(generic_hfclk_start = 0x0003c189); -PROVIDE(uart_console_init = 0x0003c38d); -PROVIDE(console_out = 0x0003c3b5); -PROVIDE(random_byte_get = 0x0003c3dd); -PROVIDE(rng_pool_get = 0x0003c419); -PROVIDE(entropy_nrf5_get_entropy_isr = 0x0003c4a1); -PROVIDE(entropy_nrf5_get_entropy = 0x0003c549); -PROVIDE(entropy_nrf5_init = 0x0003c5a1); -PROVIDE(isr = 0x0003c611); -PROVIDE(flash_nrf_pages_layout = 0x0003c685); -PROVIDE(flash_nrf_get_parameters = 0x0003c695); -PROVIDE(flash_nrf_get_size = 0x00046db9); -PROVIDE(is_regular_addr_valid = 0x00046dcb); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046ded); -PROVIDE(flash_nrf_read = 0x0003c69d); -PROVIDE(nrf_flash_init = 0x0003c6ed); -PROVIDE(restore_pofwarn.part.0 = 0x0003c719); -PROVIDE(suspend_pofwarn = 0x0003c745); -PROVIDE(erase_op = 0x0003c79d); -PROVIDE(flash_nrf_erase = 0x0003c801); -PROVIDE(write_op = 0x0003c8e5); -PROVIDE(flash_nrf_write = 0x0003c961); -PROVIDE(gpio_nrfx_port_get_raw = 0x00046e0d); -PROVIDE(gpio_nrfx_port_set_masked_raw = 0x00046e1b); -PROVIDE(gpio_nrfx_port_set_bits_raw = 0x00046e33); -PROVIDE(gpio_nrfx_port_clear_bits_raw = 0x00046e3f); -PROVIDE(gpio_nrfx_port_toggle_bits = 0x00046e4b); -PROVIDE(gpio_nrfx_manage_callback = 0x00046e65); -PROVIDE(gpio_nrfx_pin_interrupt_configure = 0x0003ca25); -PROVIDE(gpio_nrfx_init = 0x0003cb25); -PROVIDE(nrfx_gpio_handler = 0x0003cb6d); -PROVIDE(gpio_nrfx_pin_configure = 0x0003cbb9); -PROVIDE(irq_connect0 = 0x00046f51); -PROVIDE(irq_connect1 = 0x00046f5b); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003cd45); -PROVIDE(event_handler = 0x0003cd69); -PROVIDE(i2c_nrfx_twim_init = 0x00046f65); -PROVIDE(i2c_nrfx_twim_transfer = 0x0003cda1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046f8b); -PROVIDE(pinctrl_apply_state.isra.0 = 0x00046fab); -PROVIDE(nrf_gpio_pin_port_decode = 0x0003d0a9); -PROVIDE(nrf_gpio_pin_port_decode = 0x0003d245); -PROVIDE(pwm_handler = 0x00047021); -PROVIDE(pwm_nrfx_get_cycles_per_sec = 0x00047023); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0004702f); -PROVIDE(pwm_nrfx_set_cycles = 0x0003d265); -PROVIDE(pwm_nrfx_init = 0x0003d3fd); -PROVIDE(pwm_nrfx_init0 = 0x0004704f); -PROVIDE(pwm_nrfx_init1 = 0x00047067); -PROVIDE(pwm_nrfx_init2 = 0x0004707f); -PROVIDE(event_txdrdy_check = 0x0003d4c5); -PROVIDE(uart_nrfx_poll_in = 0x0003d4e5); -PROVIDE(uart_nrfx_err_check = 0x0003d509); -PROVIDE(uart_nrfx_fifo_read = 0x0003d519); -PROVIDE(uart_nrfx_irq_tx_enable = 0x0003d545); -PROVIDE(uart_nrfx_irq_tx_disable = 0x0003d58d); -PROVIDE(uart_nrfx_irq_rx_enable = 0x0003d599); -PROVIDE(uart_nrfx_irq_rx_disable = 0x0003d5a9); -PROVIDE(uart_nrfx_irq_tx_ready_complete = 0x0003d5b9); -PROVIDE(uart_nrfx_irq_rx_ready = 0x0003d5e1); -PROVIDE(uart_nrfx_irq_err_enable = 0x0003d5f5); -PROVIDE(uart_nrfx_irq_err_disable = 0x0003d605); -PROVIDE(uart_nrfx_irq_is_pending = 0x0003d615); -PROVIDE(uart_nrfx_irq_update = 0x00047097); -PROVIDE(uart_nrfx_irq_callback_set = 0x0003d649); -PROVIDE(uart_nrfx_isr = 0x0003d65d); -PROVIDE(uart_nrfx_poll_out = 0x0003d6a9); -PROVIDE(uart_nrfx_init = 0x0003d72d); -PROVIDE(uart_nrfx_fifo_fill = 0x0003d8f1); -PROVIDE(irq_connect2 = 0x0004709b); -PROVIDE(spi_context_get_next_buf.constprop.0 = 0x000470a5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000470cb); -PROVIDE(pinctrl_apply_state.constprop.0 = 0x000470e9); -PROVIDE(gpio_pin_set_dt.isra.0 = 0x00047109); -PROVIDE(_spi_context_cs_control = 0x00047131); -PROVIDE(spi_context_unlock_unconditionally = 0x00047171); -PROVIDE(spi_nrfx_release = 0x00047191); -PROVIDE(spi_nrfx_init = 0x0003d929); -PROVIDE(finish_transaction = 0x000471b5); -PROVIDE(transfer_next_chunk = 0x0003da45); -PROVIDE(event_handler = 0x0003db15); -PROVIDE(spi_nrfx_transceive = 0x0003dc11); -PROVIDE(nrf_gpio_cfg_input = 0x0003e051); -PROVIDE(event_clear = 0x00047227); -PROVIDE(compare_int_lock = 0x0003e0f1); -PROVIDE(sys_clock_timeout_handler = 0x0003e139); -PROVIDE(compare_int_unlock = 0x0003e181); -PROVIDE(compare_set = 0x0003e221); -PROVIDE(sys_clock_driver_init = 0x0003e351); -PROVIDE(nrf52_errata_98 = 0x0003e525); -PROVIDE(nrf52_errata_120 = 0x0003e525); -PROVIDE(nrf52_errata_115 = 0x0003e525); -PROVIDE(nrf52_errata_103 = 0x0003e525); -PROVIDE(clock_stop = 0x0003e7b9); -PROVIDE(nrf_gpio_pin_port_decode = 0x0003e9f1); -PROVIDE(nrf_gpio_reconfigure = 0x00047251); -PROVIDE(nrf_gpio_cfg_sense_set = 0x000472e3); -PROVIDE(get_pin_idx = 0x0003ea11); -PROVIDE(call_handler.constprop.0 = 0x0003ea25); -PROVIDE(pin_te_get.constprop.0 = 0x0003ea65); -PROVIDE(pin_is_output.constprop.0 = 0x0003ea7d); -PROVIDE(pin_in_use_by_te.constprop.0 = 0x0003ea95); -PROVIDE(latch_pending_read_and_check = 0x0003eaad); -PROVIDE(pin_in_event_get.isra.0 = 0x00047301); -PROVIDE(release_handler.isra.0 = 0x0003eaed); -PROVIDE(__nrfy_internal_gpiote_events_process.constprop.0 = 0x0003eb45); -PROVIDE(pin_trigger_disable = 0x00047323); -PROVIDE(pin_uninit = 0x0003eba1); -PROVIDE(nvmc_word_write = 0x0003f1d1); -PROVIDE(nrf_power_event_get_and_clear.constprop.0 = 0x00047395); -PROVIDE(nrf_gpio_pin_port_decode = 0x0003f385); -PROVIDE(start_playback = 0x000473d7); -PROVIDE(__nrfy_internal_pwm_event_handle.isra.0 = 0x0004741f); -PROVIDE(__nrfy_internal_pwm_events_process = 0x00047441); -PROVIDE(pwm_stopped_check = 0x0003f3a5); -PROVIDE(irq_handler = 0x00047495); -PROVIDE(pwm_configure = 0x0003f3d9); -PROVIDE(__nrfy_internal_spim_event_handle = 0x00047501); -PROVIDE(__nrfy_internal_spim_events_process = 0x0004752b); -PROVIDE(nrf_gpio_pin_port_decode = 0x0003f5fd); -PROVIDE(nrf_gpio_pin_set = 0x000475a7); -PROVIDE(nrf_gpio_pin_clear = 0x000475c1); -PROVIDE(spim_abort = 0x0003f61d); -PROVIDE(spim_frequency_valid_check.constprop.0 = 0x0003f691); -PROVIDE(pin_init = 0x0003f6f5); -PROVIDE(spim_configure = 0x0003f745); -PROVIDE(spim_pin_uninit = 0x0003f90d); -PROVIDE(xfer_completeness_check = 0x000475db); -PROVIDE(nrf_gpio_cfg.constprop.0 = 0x0003fbd9); -PROVIDE(pins_configure = 0x0004763d); -PROVIDE(__nrfy_internal_twim_event_handle.isra.0 = 0x00047661); -PROVIDE(__nrfy_internal_twim_events_process.constprop.0 = 0x00047683); -PROVIDE(twim_configure = 0x0003fc21); -PROVIDE(irq_handler = 0x0003fc61); -PROVIDE(nrf_gpio_pin_port_decode = 0x00040239); -PROVIDE(nrf_gpio_pin_set = 0x000476d7); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00047741); -PROVIDE(do_device_init = 0x00047777); -PROVIDE(z_sys_init_run_level = 0x00040515); -PROVIDE(bg_thread_main = 0x00040545); -PROVIDE(statics_init = 0x00040845); -PROVIDE(create_free_list = 0x000478b1); -PROVIDE(init_mem_slab_obj_core_list = 0x00040869); -PROVIDE(init_mbox_module = 0x000408e9); -PROVIDE(unpend_thread_no_timeout = 0x00047977); -PROVIDE(adjust_owner_prio.isra.0 = 0x00047afd); -PROVIDE(unpend_thread_no_timeout = 0x00047b1b); -PROVIDE(queue_insert = 0x00047b35); -PROVIDE(k_sys_work_q_init = 0x00040e41); -PROVIDE(flag_test_and_clear = 0x00047deb); -PROVIDE(unschedule_locked = 0x00047e01); -PROVIDE(notify_queue_locked.isra.0 = 0x00047e1f); -PROVIDE(work_queue_main = 0x00040e75); -PROVIDE(cancel_async_locked = 0x00047e2f); -PROVIDE(submit_to_queue_locked = 0x00040fc1); -PROVIDE(work_timeout = 0x00047e95); -PROVIDE(unpend_thread_no_timeout = 0x00047f67); -PROVIDE(sys_dlist_remove = 0x00047fe7); -PROVIDE(unpend_thread_no_timeout = 0x00047ff7); -PROVIDE(z_swap_irqlock = 0x0004146d); -PROVIDE(ready_thread = 0x000414a1); -PROVIDE(unready_thread = 0x00041525); -PROVIDE(add_to_waitq_locked = 0x0004800b); -PROVIDE(z_tick_sleep = 0x00041a21); -PROVIDE(wait_for = 0x000481d5); -PROVIDE(z_sched_wake_all.constprop.0 = 0x00048247); -PROVIDE(slice_timeout = 0x00041e01); -PROVIDE(first = 0x00041ffd); -PROVIDE(elapsed = 0x0004200d); -PROVIDE(next_timeout = 0x0004848d); -PROVIDE(remove_timeout = 0x00042021); -PROVIDE(clear_event_registrations = 0x000423cd); -PROVIDE(add_event = 0x00048607); -PROVIDE(register_events = 0x0004865b); -PROVIDE(signal_poll_event = 0x0004875f); -PROVIDE(z_heap_aligned_alloc = 0x0004885b); -PROVIDE(__ultoa_invert = 0x00048b1b); -PROVIDE(skip_to_arg = 0x00042c19); -PROVIDE(mulShiftAll64 = 0x00048bcd); -PROVIDE(div10 = 0x0004370d); -PROVIDE(chunk_size = 0x00043ffd); -PROVIDE(free_list_add = 0x00044007); -PROVIDE(free_list_remove_bidx = 0x00044055); -PROVIDE(free_list_remove = 0x0004408f); -PROVIDE(alloc_chunk = 0x000440a9); -PROVIDE(merge_chunks = 0x00044117); -PROVIDE(split_chunks = 0x00044143); -PROVIDE(free_chunk = 0x00044177); -PROVIDE(ring_buf_put_claim = 0x00044949); -PROVIDE(ring_buf_get_claim = 0x00044967); -PROVIDE(panic = 0x00045cd3); -PROVIDE(process_log_msg.constprop.0 = 0x00045cd5); -PROVIDE(process = 0x00045d61); -PROVIDE(dropped = 0x00045da1); -PROVIDE(remove_from_tail.part.0 = 0x000460a7); -PROVIDE(foldcase = 0x000464dd); -PROVIDE(fnmatchx = 0x000464ed); -PROVIDE(flash_get_page_info = 0x00046d19); -PROVIDE(isr_radio = 0x00037795); -PROVIDE(ull_chan_map_get = 0x00032021); -PROVIDE(main = 0x00043fef); +PROVIDE(mulShift64 = 0x00048835); +PROVIDE(loader = 0x00018d25); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00018ea9); +PROVIDE(sys_slist_find_and_remove = 0x0004430b); +PROVIDE(process_recheck = 0x00044341); +PROVIDE(validate_args = 0x00044379); +PROVIDE(notify_one = 0x00044399); +PROVIDE(process_event = 0x0001962d); +PROVIDE(transition_complete = 0x000443c5); +PROVIDE(dummy_timestamp = 0x000446f3); +PROVIDE(default_get_timestamp = 0x000446f7); +PROVIDE(atomic_inc = 0x000446fb); +PROVIDE(z_log_init.isra.0 = 0x00019849); +PROVIDE(enable_logger = 0x00044715); +PROVIDE(backend_filter_set = 0x00019bbd); +PROVIDE(z_cbprintf_cpy = 0x000447a3); +PROVIDE(z_log_msg_simple_create = 0x00044801); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0004486f); +PROVIDE(log_output_write = 0x000448cd); +PROVIDE(out_func = 0x000448e9); +PROVIDE(cr_out_func = 0x00044905); +PROVIDE(print_formatted = 0x00019df1); +PROVIDE(newline_print = 0x00019e15); +PROVIDE(class_handler = 0x0001a189); +PROVIDE(custom_handler = 0x0001a1c9); +PROVIDE(vendor_handler = 0x0001a229); +PROVIDE(usb_reset_alt_setting = 0x0001a265); +PROVIDE(is_ep_valid.part.0 = 0x0001a275); +PROVIDE(usb_handle_request.constprop.0 = 0x0001a2ad); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000449b5); +PROVIDE(get_ep_bm_from_addr = 0x0001a2d9); +PROVIDE(disable_endpoint = 0x0001a321); +PROVIDE(forward_status_cb = 0x0001a3a1); +PROVIDE(usb_halt_endpoint_req.isra.0 = 0x0001a451); +PROVIDE(set_endpoint = 0x0001a4ed); +PROVIDE(usb_handle_standard_request = 0x0001a601); +PROVIDE(usb_data_to_host = 0x0001a9b1); +PROVIDE(usb_handle_control_transfer = 0x0001aa11); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000449d3); +PROVIDE(usb_ep_get_transfer = 0x0001aff9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00044a51); +PROVIDE(usb_transfer_work = 0x0001b025); +PROVIDE(cdc_interface_config = 0x00044a87); +PROVIDE(cdc_acm_irq_callback_work_handler = 0x00044a9b); +PROVIDE(cdc_acm_irq_tx_disable = 0x00044aa5); +PROVIDE(cdc_acm_irq_tx_ready = 0x00044aaf); +PROVIDE(cdc_acm_irq_rx_disable = 0x00044acf); +PROVIDE(cdc_acm_irq_rx_ready = 0x00044ad9); +PROVIDE(cdc_acm_irq_is_pending = 0x00044ae7); +PROVIDE(cdc_acm_irq_callback_set = 0x00044b03); +PROVIDE(cdc_acm_line_ctrl_get = 0x00044b0b); +PROVIDE(cdc_acm_irq_rx_enable = 0x0001b3d1); +PROVIDE(cdc_acm_irq_tx_enable = 0x0001b3f1); +PROVIDE(cdc_acm_fifo_fill = 0x0001b411); +PROVIDE(cdc_acm_write_cb = 0x0001b44d); +PROVIDE(cdc_acm_reset_port = 0x0001b4a1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00044b3d); +PROVIDE(cdc_acm_int_in = 0x0001b4dd); +PROVIDE(cdc_acm_init = 0x0001b5c1); +PROVIDE(tx_work_handler = 0x0001b6e1); +PROVIDE(cdc_acm_send_notification.isra.0 = 0x0001b609); +PROVIDE(cdc_acm_line_ctrl_set = 0x00044b5b); +PROVIDE(cdc_acm_poll_out = 0x0001b64d); +PROVIDE(cdc_acm_read_cb = 0x0001b759); +PROVIDE(cdc_acm_fifo_read = 0x00044c19); +PROVIDE(cdc_acm_poll_in = 0x00044c61); +PROVIDE(cdc_acm_dev_status_cb = 0x0001b7f9); +PROVIDE(cdc_acm_irq_update = 0x00044c73); +PROVIDE(z_usb_work_q_init = 0x0001b981); +PROVIDE(cmd_kernel_cycles = 0x0001b9b5); +PROVIDE(cmd_kernel_sleep = 0x0001b9d1); +PROVIDE(cmd_kernel_version = 0x0001ba21); +PROVIDE(cmd_kernel_log_level_set = 0x0001ba39); +PROVIDE(thread_valid_cb = 0x00044ca3); +PROVIDE(cmd_kernel_thread_list = 0x0001badd); +PROVIDE(shell_tdata_dump = 0x0001bb11); +PROVIDE(cmd_kernel_thread_stacks = 0x0001bbd1); +PROVIDE(shell_stack_dump = 0x0001bc41); +PROVIDE(cmd_kernel_thread_suspend = 0x0001bca1); +PROVIDE(cmd_kernel_thread_resume = 0x0001bd05); +PROVIDE(cmd_kernel_thread_kill = 0x0001bd69); +PROVIDE(cmd_device_list = 0x0001bdcd); +PROVIDE(cmd_devmem = 0x0001bea5); +PROVIDE(cmd_dump = 0x0001bf69); +PROVIDE(set_bypass.isra.0 = 0x0001c0e1); +PROVIDE(bypass_cb = 0x0001c12d); +PROVIDE(cmd_load = 0x0001c241); +PROVIDE(log_msg_generic_get_wlen = 0x00044caf); +PROVIDE(uart_irq_tx_disable = 0x00044ccf); +PROVIDE(enable = 0x00044cd9); +PROVIDE(read_uart = 0x00044ceb); +PROVIDE(uninit = 0x00044cfd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001c319); +PROVIDE(enable_shell_uart = 0x0001c33d); +PROVIDE(write_uart = 0x00044d1d); +PROVIDE(init = 0x0001c375); +PROVIDE(uart_callback = 0x0001c3c9); +PROVIDE(cmd_buffer_clear = 0x00044d89); +PROVIDE(atomic_or = 0x00044d9f); +PROVIDE(atomic_and = 0x00044dbd); +PROVIDE(k_mutex_lock = 0x00044ddb); +PROVIDE(z_shell_raw_fprintf = 0x00044ddf); +PROVIDE(shell_internal_help_print = 0x0001c50d); +PROVIDE(z_shell_strlen = 0x00044df9); +PROVIDE(shell_log_process = 0x00044e05); +PROVIDE(transport_evt_handler = 0x00044e39); +PROVIDE(kill_handler = 0x0001c52d); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x0001c589); +PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x00044e51); +PROVIDE(z_flag_history_exit_set.isra.0 = 0x00044e69); +PROVIDE(history_handle = 0x0001c595); +PROVIDE(z_flag_insert_mode_set.isra.0 = 0x00044e7f); +PROVIDE(k_mutex_unlock.isra.0 = 0x00044e9f); +PROVIDE(execute = 0x0001c645); +PROVIDE(shell_signal_handle = 0x00044ea3); +PROVIDE(state_set.constprop.0 = 0x0001c90d); +PROVIDE(cmd_help = 0x0001d101); +PROVIDE(out_func = 0x00045115); +PROVIDE(z_shell_strlen = 0x00045151); +PROVIDE(z_shell_raw_fprintf = 0x00045535); +PROVIDE(z_clear_eos = 0x0001d3f5); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x0001d411); +PROVIDE(full_line_cmd.isra.0 = 0x0004554f); +PROVIDE(reprint_from_cursor = 0x0001d63d); +PROVIDE(data_insert = 0x00045867); +PROVIDE(z_shell_raw_fprintf = 0x00045af7); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x0001d7c1); +PROVIDE(formatted_text_print.constprop.0 = 0x00045b11); +PROVIDE(cmd_comment = 0x00045bf3); +PROVIDE(cmd_shell_stats_reset = 0x00045bf7); +PROVIDE(z_shell_raw_fprintf = 0x00045bff); +PROVIDE(cmd_resize_default = 0x0001d8e9); +PROVIDE(cmd_shell_stats_show = 0x0001d915); +PROVIDE(cmd_backends = 0x0001d929); +PROVIDE(cmd_prompt_on = 0x00045c19); +PROVIDE(cmd_prompt_off = 0x0001d975); +PROVIDE(cmd_history = 0x0001d985); +PROVIDE(cmd_get_retval = 0x0001d9c5); +PROVIDE(cmd_echo = 0x0001d9e1); +PROVIDE(cmd_clear = 0x0001da31); +PROVIDE(cmd_resize = 0x0001da69); +PROVIDE(cmd_vt100_off = 0x00045c25); +PROVIDE(cmd_bacskpace_mode_delete = 0x00045c49); +PROVIDE(cmd_colors_off = 0x00045c6d); +PROVIDE(cmd_bacskpace_mode_backspace = 0x00045c91); +PROVIDE(cmd_echo_off = 0x00045cb5); +PROVIDE(cmd_colors_on = 0x00045cd9); +PROVIDE(cmd_vt100_on = 0x00045cfd); +PROVIDE(cmd_echo_on = 0x00045d21); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00045f63); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0004609b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000460d1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000460f1); +PROVIDE(mem_manage_fault.constprop.0 = 0x0001e359); +PROVIDE(bus_fault.constprop.0 = 0x0001e4b5); +PROVIDE(usage_fault.constprop.0 = 0x0001e621); +PROVIDE(cbputc = 0x00046165); +PROVIDE(picolibc_put = 0x00046171); +PROVIDE(malloc_prepare = 0x0001ed6d); +PROVIDE(malloc_lock = 0x0001ed91); +PROVIDE(malloc_unlock = 0x0001eda5); +PROVIDE(fixed_data_unref = 0x000463cd); +PROVIDE(net_buf_destroy = 0x0001efe9); +PROVIDE(fixed_data_alloc = 0x0001f059); +PROVIDE(nordicsemi_nrf52_init = 0x0001f1b5); +PROVIDE(gpio_pin_configure_dt.constprop.0 = 0x00046497); +PROVIDE(board_init = 0x0001f1d9); +PROVIDE(hci_rx_buf_destroy = 0x0001f275); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046555); +PROVIDE(ticker_dequeue = 0x0001fd0d); +PROVIDE(ticks_to_expire_prep = 0x0001fd81); +PROVIDE(start_us.constprop.0 = 0x0001fdcd); +PROVIDE(ticker_job_list_insert = 0x0001fe79); +PROVIDE(hci_driver_close = 0x00022be1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00022c31); +PROVIDE(hci_driver_open = 0x00022c51); +PROVIDE(prio_recv_thread = 0x00022d61); +PROVIDE(recv_thread = 0x00022ef1); +PROVIDE(bt_recv_prio.isra.0 = 0x00022d49); +PROVIDE(hci_driver_send = 0x00022e31); +PROVIDE(llcp_lp_enc_tx = 0x0002c12d); +PROVIDE(lp_enc_ntf = 0x0002c1cd); +PROVIDE(llcp_rp_enc_tx = 0x0002c255); +PROVIDE(lp_enc_send_start_enc_rsp.part.0 = 0x0002c31d); +PROVIDE(rp_enc_send_enc_rsp.constprop.0 = 0x0002c3c5); +PROVIDE(rp_enc_send_start_enc_req.constprop.0 = 0x0002c455); +PROVIDE(rp_enc_execute_fsm = 0x0002c509); +PROVIDE(lp_enc_execute_fsm = 0x0002c7a5); +PROVIDE(pu_calc_eff_time = 0x0002cae1); +PROVIDE(pu_check_update_ind = 0x0002cb3d); +PROVIDE(pu_update_eff_times = 0x0002cb9d); +PROVIDE(pu_ntf = 0x0002cc81); +PROVIDE(pu_dle_ntf = 0x0002cd31); +PROVIDE(rp_pu_st_wait_tx_ack_phy.part.0 = 0x0002cda1); +PROVIDE(pu_prep_update_ind.constprop.0 = 0x0002ce85); +PROVIDE(lp_pu_tx.constprop.0 = 0x0002cf1d); +PROVIDE(lp_pu_send_phy_req.constprop.0.isra.0 = 0x0002d071); +PROVIDE(lp_pu_send_phy_update_ind.isra.0 = 0x0002d0cd); +PROVIDE(pu_apply_phy_update.isra.0 = 0x0002d105); +PROVIDE(lp_pu_execute_fsm = 0x0002d18d); +PROVIDE(rp_pu_tx.constprop.0 = 0x0002d529); +PROVIDE(rp_pu_send_phy_rsp.isra.0 = 0x0002d621); +PROVIDE(rp_pu_send_phy_update_ind.isra.0 = 0x0002d66d); +PROVIDE(rp_pu_execute_fsm = 0x0002d6c1); +PROVIDE(pdu_validate_conn_update_ind = 0x0002d9f9); +PROVIDE(pdu_validate_chan_map_ind = 0x0002da09); +PROVIDE(pdu_validate_terminate_ind = 0x0002da19); +PROVIDE(pdu_validate_enc_req = 0x0002da29); +PROVIDE(pdu_validate_enc_rsp = 0x0002da39); +PROVIDE(pdu_validate_start_enc_req = 0x0002da49); +PROVIDE(pdu_validate_feature_req = 0x0002da59); +PROVIDE(pdu_validate_version_ind = 0x0002da69); +PROVIDE(pdu_validate_conn_param_req = 0x0002da79); +PROVIDE(pdu_validate_reject_ext_ind = 0x0002da89); +PROVIDE(pdu_validate_phy_upd_ind = 0x0002da99); +PROVIDE(create_procedure = 0x0002daa9); +PROVIDE(pdu_validate_clock_accuracy_rsp = 0x0002dae1); +PROVIDE(pdu_validate_start_enc_rsp = 0x0002daf1); +PROVIDE(pdu_validate_unknown_rsp = 0x0002db01); +PROVIDE(pdu_validate_feature_rsp = 0x0002db11); +PROVIDE(pdu_validate_pause_enc_req = 0x0002db21); +PROVIDE(pdu_validate_pause_enc_rsp = 0x0002db31); +PROVIDE(pdu_validate_reject_ind = 0x0002db41); +PROVIDE(pdu_validate_per_init_feat_xchg = 0x0002db51); +PROVIDE(pdu_validate_conn_param_rsp = 0x0002db61); +PROVIDE(pdu_validate_ping_req = 0x0002db71); +PROVIDE(pdu_validate_ping_rsp = 0x0002db81); +PROVIDE(pdu_validate_length_req = 0x0002db91); +PROVIDE(pdu_validate_length_rsp = 0x0002dba1); +PROVIDE(pdu_validate_phy_req = 0x0002dbb1); +PROVIDE(pdu_validate_phy_rsp = 0x0002dbc1); +PROVIDE(pdu_validate_min_used_chan_ind = 0x0002dbd1); +PROVIDE(lp_comm_tx = 0x0002e5f5); +PROVIDE(rp_comm_tx_proxy = 0x0002e6f9); +PROVIDE(rp_comm_send_rsp.constprop.0 = 0x0002e7f5); +PROVIDE(rp_comm_execute_fsm = 0x0002e899); +PROVIDE(lp_comm_ntf = 0x0002eb05); +PROVIDE(lp_comm_complete.constprop.0 = 0x0002ebed); +PROVIDE(lp_comm_send_req.constprop.0.isra.0 = 0x0002ecfd); +PROVIDE(lp_comm_execute_fsm = 0x0002ee75); +PROVIDE(lr_dequeue = 0x0002f045); +PROVIDE(lr_act_complete = 0x0002f0ad); +PROVIDE(llcp_lr_check_done.part.0 = 0x0002f1d1); +PROVIDE(lr_act_run = 0x0002f251); +PROVIDE(lp_cu_tx = 0x0002fe2d); +PROVIDE(cu_ntf = 0x0002fee1); +PROVIDE(rp_cu_conn_param_req_ntf = 0x0002ff5d); +PROVIDE(cu_update_conn_parameters = 0x0002ffbd); +PROVIDE(rp_cu_tx = 0x00030009); +PROVIDE(lp_cu_send_conn_param_req.constprop.0 = 0x000300d5); +PROVIDE(cu_check_conn_parameters.constprop.0 = 0x0003014d); +PROVIDE(rp_cu_send_conn_update_ind_finalize.constprop.0 = 0x000301a1); +PROVIDE(rp_cu_send_conn_update_ind.constprop.0.isra.0 = 0x00030225); +PROVIDE(lp_cu_send_conn_update_ind.isra.0 = 0x00030265); +PROVIDE(rp_cu_check_instant.constprop.0 = 0x000302f5); +PROVIDE(rp_cu_send_reject_ext_ind.constprop.0 = 0x0003036d); +PROVIDE(rp_cu_st_wait_conn_param_req_available.part.0.isra.0 = 0x000303b9); +PROVIDE(rp_cu_execute_fsm = 0x00030441); +PROVIDE(lp_cu_send_reject_ext_ind.constprop.0 = 0x000306b9); +PROVIDE(lp_cu_execute_fsm = 0x00030725); +PROVIDE(llcp_rr_check_done.part.0 = 0x00030ce1); +PROVIDE(rr_act_run = 0x00030d71); +PROVIDE(rr_act_unsupported = 0x00030e01); +PROVIDE(rr_act_reject = 0x00030ea1); +PROVIDE(rr_st_active.constprop.0 = 0x00031009); +PROVIDE(rr_execute_fsm = 0x0003107d); +PROVIDE(rtc0_nrf5_isr = 0x00033329); +PROVIDE(swi_lll_nrf5_isr = 0x00033359); +PROVIDE(ticker_start_op_cb = 0x00033361); +PROVIDE(ticker_stop_op_cb = 0x00033411); +PROVIDE(isr_race = 0x0003349d); +PROVIDE(preempt_ticker_cb = 0x000334a1); +PROVIDE(preempt_ticker_start.constprop.0 = 0x00033525); +PROVIDE(preempt = 0x00033685); +PROVIDE(clock_ready = 0x00033f95); +PROVIDE(blocking_on = 0x00033f9d); +PROVIDE(isr_done = 0x000367f9); +PROVIDE(do_ecb = 0x00038609); +PROVIDE(isr_ecb = 0x00038659); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000465c1); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x0003870d); +PROVIDE(call_fn_table = 0x00038719); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00038a59); +PROVIDE(llext_copy_region = 0x00038a7d); +PROVIDE(llext_read = 0x0004665f); +PROVIDE(llext_seek = 0x00046663); +PROVIDE(llext_peek = 0x00046667); +PROVIDE(llext_alloc = 0x00038bbd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046671); +PROVIDE(llext_find_extension_sym_iterate = 0x000466b3); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000466cb); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000399b5); +PROVIDE(llext_shell_name_cb = 0x000467a9); +PROVIDE(llext_name_get = 0x00039a89); +PROVIDE(llext_name_arg_get = 0x000467bf); +PROVIDE(cmd_llext_list_symbols = 0x00039ab9); +PROVIDE(cmd_llext_list = 0x00039b25); +PROVIDE(llext_shell_list_cb = 0x00039b45); +PROVIDE(cmd_llext_load_hex = 0x00039b5d); +PROVIDE(cmd_llext_call_fn = 0x00039c31); +PROVIDE(cmd_llext_unload = 0x00039c5d); +PROVIDE(endpoint_ctx = 0x00039c9d); +PROVIDE(ep_ctx_reset = 0x000467d1); +PROVIDE(usbd_work_schedule = 0x00039cfd); +PROVIDE(usbd_evt_put = 0x00039d0d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000467f7); +PROVIDE(usbd_evt_get = 0x00039d19); +PROVIDE(usb_init = 0x00039d29); +PROVIDE(usbd_event_handler = 0x0003a019); +PROVIDE(usbd_work_handler = 0x0003a189); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00046815); +PROVIDE(hfxo_stop.constprop.0.isra.0 = 0x00039d99); +PROVIDE(k_mutex_unlock.isra.0 = 0x00046819); +PROVIDE(eps_ctx_init = 0x00039dd9); +PROVIDE(usbd_evt_flush = 0x00039e41); +PROVIDE(usbd_evt_alloc = 0x00039e5d); +PROVIDE(usb_dc_power_event_handler = 0x00039ee5); +PROVIDE(usbd_event_transfer_data = 0x00039f41); +PROVIDE(nrf52_errata_187 = 0x0003ab29); +PROVIDE(ep_state_access = 0x0003ab51); +PROVIDE(ep2bit = 0x0004686d); +PROVIDE(usbd_errata_187_211_begin = 0x0003ab71); +PROVIDE(usbd_errata_187_211_end = 0x0003abad); +PROVIDE(usbd_dma_pending_clear = 0x0003abe9); +PROVIDE(usbd_ep_abort = 0x0003b531); +PROVIDE(adc_context_start_sampling = 0x0003b819); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000468b3); +PROVIDE(adc_nrfx_channel_setup = 0x0003b835); +PROVIDE(adc_context_on_timer_expired = 0x000468d3); +PROVIDE(adc_nrfx_read = 0x0003b9ad); +PROVIDE(init_saadc = 0x0003bbe1); +PROVIDE(saadc_irq_handler = 0x0003bc2d); +PROVIDE(get_status = 0x00046905); +PROVIDE(stop = 0x00046917); +PROVIDE(api_stop = 0x00046967); +PROVIDE(async_start = 0x0004696d); +PROVIDE(api_start = 0x000469c7); +PROVIDE(onoff_stop = 0x0003bd35); +PROVIDE(onoff_started_callback = 0x000469d5); +PROVIDE(onoff_start = 0x0003bd5d); +PROVIDE(lfclk_start = 0x000469e1); +PROVIDE(generic_hfclk_stop = 0x0003bd99); +PROVIDE(lfclk_stop = 0x000469e7); +PROVIDE(blocking_start_callback = 0x000469ed); +PROVIDE(clk_init = 0x0003bdcd); +PROVIDE(clock_event_handler = 0x0003bf29); +PROVIDE(api_blocking_start = 0x0003be25); +PROVIDE(clkstarted_handle.constprop.0 = 0x0003be61); +PROVIDE(generic_hfclk_start = 0x0003bead); +PROVIDE(uart_console_init = 0x0003c0b1); +PROVIDE(console_out = 0x0003c0d9); +PROVIDE(random_byte_get = 0x0003c101); +PROVIDE(rng_pool_get = 0x0003c13d); +PROVIDE(entropy_nrf5_get_entropy_isr = 0x0003c1c5); +PROVIDE(entropy_nrf5_get_entropy = 0x0003c26d); +PROVIDE(entropy_nrf5_init = 0x0003c2c5); +PROVIDE(isr = 0x0003c335); +PROVIDE(flash_nrf_pages_layout = 0x0003c3a9); +PROVIDE(flash_nrf_get_parameters = 0x0003c3b9); +PROVIDE(flash_nrf_get_size = 0x00046a93); +PROVIDE(is_regular_addr_valid = 0x00046aa5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046ac7); +PROVIDE(flash_nrf_read = 0x0003c3c1); +PROVIDE(nrf_flash_init = 0x0003c411); +PROVIDE(restore_pofwarn.part.0 = 0x0003c43d); +PROVIDE(suspend_pofwarn = 0x0003c469); +PROVIDE(erase_op = 0x0003c4c1); +PROVIDE(flash_nrf_erase = 0x0003c525); +PROVIDE(write_op = 0x0003c609); +PROVIDE(flash_nrf_write = 0x0003c685); +PROVIDE(gpio_nrfx_port_get_raw = 0x00046ae7); +PROVIDE(gpio_nrfx_port_set_masked_raw = 0x00046af5); +PROVIDE(gpio_nrfx_port_set_bits_raw = 0x00046b0d); +PROVIDE(gpio_nrfx_port_clear_bits_raw = 0x00046b19); +PROVIDE(gpio_nrfx_port_toggle_bits = 0x00046b25); +PROVIDE(gpio_nrfx_manage_callback = 0x00046b3f); +PROVIDE(gpio_nrfx_pin_interrupt_configure = 0x0003c749); +PROVIDE(gpio_nrfx_init = 0x0003c849); +PROVIDE(nrfx_gpio_handler = 0x0003c891); +PROVIDE(gpio_nrfx_pin_configure = 0x0003c8dd); +PROVIDE(irq_connect0 = 0x00046c2b); +PROVIDE(irq_connect1 = 0x00046c35); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003ca69); +PROVIDE(event_handler = 0x0003ca8d); +PROVIDE(i2c_nrfx_twim_init = 0x00046c3f); +PROVIDE(i2c_nrfx_twim_transfer = 0x0003cac5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046c65); +PROVIDE(pinctrl_apply_state.isra.0 = 0x00046c85); +PROVIDE(nrf_gpio_pin_port_decode = 0x0003cdcd); +PROVIDE(nrf_gpio_pin_port_decode = 0x0003cf69); +PROVIDE(pwm_handler = 0x00046cfb); +PROVIDE(pwm_nrfx_get_cycles_per_sec = 0x00046cfd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046d09); +PROVIDE(pwm_nrfx_set_cycles = 0x0003cf89); +PROVIDE(pwm_nrfx_init = 0x0003d121); +PROVIDE(pwm_nrfx_init0 = 0x00046d29); +PROVIDE(pwm_nrfx_init1 = 0x00046d41); +PROVIDE(pwm_nrfx_init2 = 0x00046d59); +PROVIDE(event_txdrdy_check = 0x0003d1e9); +PROVIDE(uart_nrfx_poll_in = 0x0003d209); +PROVIDE(uart_nrfx_err_check = 0x0003d22d); +PROVIDE(uart_nrfx_fifo_read = 0x0003d23d); +PROVIDE(uart_nrfx_irq_tx_enable = 0x0003d269); +PROVIDE(uart_nrfx_irq_tx_disable = 0x0003d2b1); +PROVIDE(uart_nrfx_irq_rx_enable = 0x0003d2bd); +PROVIDE(uart_nrfx_irq_rx_disable = 0x0003d2cd); +PROVIDE(uart_nrfx_irq_tx_ready_complete = 0x0003d2dd); +PROVIDE(uart_nrfx_irq_rx_ready = 0x0003d305); +PROVIDE(uart_nrfx_irq_err_enable = 0x0003d319); +PROVIDE(uart_nrfx_irq_err_disable = 0x0003d329); +PROVIDE(uart_nrfx_irq_is_pending = 0x0003d339); +PROVIDE(uart_nrfx_irq_update = 0x00046d71); +PROVIDE(uart_nrfx_irq_callback_set = 0x0003d36d); +PROVIDE(uart_nrfx_isr = 0x0003d381); +PROVIDE(uart_nrfx_poll_out = 0x0003d3cd); +PROVIDE(uart_nrfx_init = 0x0003d451); +PROVIDE(uart_nrfx_fifo_fill = 0x0003d615); +PROVIDE(irq_connect2 = 0x00046d75); +PROVIDE(spi_context_get_next_buf.constprop.0 = 0x00046d7f); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046da5); +PROVIDE(pinctrl_apply_state.constprop.0 = 0x00046dc3); +PROVIDE(gpio_pin_set_dt.isra.0 = 0x00046de3); +PROVIDE(_spi_context_cs_control = 0x00046e0b); +PROVIDE(spi_context_unlock_unconditionally = 0x00046e4b); +PROVIDE(spi_nrfx_release = 0x00046e6b); +PROVIDE(spi_nrfx_init = 0x0003d64d); +PROVIDE(finish_transaction = 0x00046e8f); +PROVIDE(transfer_next_chunk = 0x0003d769); +PROVIDE(event_handler = 0x0003d839); +PROVIDE(spi_nrfx_transceive = 0x0003d935); +PROVIDE(nrf_gpio_cfg_input = 0x0003dd75); +PROVIDE(event_clear = 0x00046f01); +PROVIDE(compare_int_lock = 0x0003de15); +PROVIDE(sys_clock_timeout_handler = 0x0003de5d); +PROVIDE(compare_int_unlock = 0x0003dea5); +PROVIDE(compare_set = 0x0003df45); +PROVIDE(sys_clock_driver_init = 0x0003e075); +PROVIDE(nrf52_errata_98 = 0x0003e249); +PROVIDE(nrf52_errata_120 = 0x0003e249); +PROVIDE(nrf52_errata_115 = 0x0003e249); +PROVIDE(nrf52_errata_103 = 0x0003e249); +PROVIDE(clock_stop = 0x0003e4dd); +PROVIDE(nrf_gpio_pin_port_decode = 0x0003e715); +PROVIDE(nrf_gpio_reconfigure = 0x00046f2b); +PROVIDE(nrf_gpio_cfg_sense_set = 0x00046fbd); +PROVIDE(get_pin_idx = 0x0003e735); +PROVIDE(call_handler.constprop.0 = 0x0003e749); +PROVIDE(pin_te_get.constprop.0 = 0x0003e789); +PROVIDE(pin_is_output.constprop.0 = 0x0003e7a1); +PROVIDE(pin_in_use_by_te.constprop.0 = 0x0003e7b9); +PROVIDE(latch_pending_read_and_check = 0x0003e7d1); +PROVIDE(pin_in_event_get.isra.0 = 0x00046fdb); +PROVIDE(release_handler.isra.0 = 0x0003e811); +PROVIDE(__nrfy_internal_gpiote_events_process.constprop.0 = 0x0003e869); +PROVIDE(pin_trigger_disable = 0x00046ffd); +PROVIDE(pin_uninit = 0x0003e8c5); +PROVIDE(nvmc_word_write = 0x0003eef5); +PROVIDE(nrf_power_event_get_and_clear.constprop.0 = 0x0004706f); +PROVIDE(nrf_gpio_pin_port_decode = 0x0003f0a9); +PROVIDE(start_playback = 0x000470b1); +PROVIDE(__nrfy_internal_pwm_event_handle.isra.0 = 0x000470f9); +PROVIDE(__nrfy_internal_pwm_events_process = 0x0004711b); +PROVIDE(pwm_stopped_check = 0x0003f0c9); +PROVIDE(irq_handler = 0x0004716f); +PROVIDE(pwm_configure = 0x0003f0fd); +PROVIDE(__nrfy_internal_spim_event_handle = 0x000471db); +PROVIDE(__nrfy_internal_spim_events_process = 0x00047205); +PROVIDE(nrf_gpio_pin_port_decode = 0x0003f321); +PROVIDE(nrf_gpio_pin_set = 0x00047281); +PROVIDE(nrf_gpio_pin_clear = 0x0004729b); +PROVIDE(spim_abort = 0x0003f341); +PROVIDE(spim_frequency_valid_check.constprop.0 = 0x0003f3b5); +PROVIDE(pin_init = 0x0003f419); +PROVIDE(spim_configure = 0x0003f469); +PROVIDE(spim_pin_uninit = 0x0003f631); +PROVIDE(xfer_completeness_check = 0x000472b5); +PROVIDE(nrf_gpio_cfg.constprop.0 = 0x0003f8fd); +PROVIDE(pins_configure = 0x00047317); +PROVIDE(__nrfy_internal_twim_event_handle.isra.0 = 0x0004733b); +PROVIDE(__nrfy_internal_twim_events_process.constprop.0 = 0x0004735d); +PROVIDE(twim_configure = 0x0003f945); +PROVIDE(irq_handler = 0x0003f985); +PROVIDE(nrf_gpio_pin_port_decode = 0x0003ff5d); +PROVIDE(nrf_gpio_pin_set = 0x000473b1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0004741b); +PROVIDE(do_device_init = 0x00047451); +PROVIDE(z_sys_init_run_level = 0x00040239); +PROVIDE(bg_thread_main = 0x00040269); +PROVIDE(statics_init = 0x000404b9); +PROVIDE(create_free_list = 0x0004758b); +PROVIDE(init_mem_slab_obj_core_list = 0x000404dd); +PROVIDE(init_mbox_module = 0x0004055d); +PROVIDE(unpend_thread_no_timeout = 0x00047651); +PROVIDE(adjust_owner_prio.isra.0 = 0x000477d7); +PROVIDE(unpend_thread_no_timeout = 0x000477f5); +PROVIDE(queue_insert = 0x0004780f); +PROVIDE(k_sys_work_q_init = 0x00040ab5); +PROVIDE(flag_test_and_clear = 0x00047ac5); +PROVIDE(unschedule_locked = 0x00047adb); +PROVIDE(notify_queue_locked.isra.0 = 0x00047af9); +PROVIDE(work_queue_main = 0x00040ae9); +PROVIDE(cancel_async_locked = 0x00047b09); +PROVIDE(submit_to_queue_locked = 0x00040c35); +PROVIDE(work_timeout = 0x00047b6f); +PROVIDE(unpend_thread_no_timeout = 0x00047c41); +PROVIDE(sys_dlist_remove = 0x00047cc1); +PROVIDE(unpend_thread_no_timeout = 0x00047cd1); +PROVIDE(z_swap_irqlock = 0x000410e1); +PROVIDE(ready_thread = 0x00041115); +PROVIDE(unready_thread = 0x00041199); +PROVIDE(add_to_waitq_locked = 0x00047ce5); +PROVIDE(z_tick_sleep = 0x00041695); +PROVIDE(wait_for = 0x00047eaf); +PROVIDE(z_sched_wake_all.constprop.0 = 0x00047f21); +PROVIDE(slice_timeout = 0x00041a75); +PROVIDE(first = 0x00041c71); +PROVIDE(elapsed = 0x00041c81); +PROVIDE(next_timeout = 0x00048157); +PROVIDE(remove_timeout = 0x00041c95); +PROVIDE(clear_event_registrations = 0x00042041); +PROVIDE(add_event = 0x000482d1); +PROVIDE(register_events = 0x00048325); +PROVIDE(signal_poll_event = 0x00048429); +PROVIDE(z_heap_aligned_alloc = 0x00048525); +PROVIDE(__ultoa_invert = 0x000487e5); +PROVIDE(skip_to_arg = 0x0004288d); +PROVIDE(mulShiftAll64 = 0x00048897); +PROVIDE(div10 = 0x00043381); +PROVIDE(chunk_size = 0x00043c71); +PROVIDE(free_list_add = 0x00043c7b); +PROVIDE(free_list_remove_bidx = 0x00043cc9); +PROVIDE(free_list_remove = 0x00043d03); +PROVIDE(alloc_chunk = 0x00043d1d); +PROVIDE(merge_chunks = 0x00043d8b); +PROVIDE(split_chunks = 0x00043db7); +PROVIDE(free_chunk = 0x00043deb); +PROVIDE(ring_buf_put_claim = 0x000445bd); +PROVIDE(ring_buf_get_claim = 0x000445db); +PROVIDE(panic = 0x00045971); +PROVIDE(process_log_msg.constprop.0 = 0x00045973); +PROVIDE(process = 0x000459ff); +PROVIDE(dropped = 0x00045a3f); +PROVIDE(remove_from_tail.part.0 = 0x00045d45); +PROVIDE(foldcase = 0x0004617b); +PROVIDE(fnmatchx = 0x0004618b); +PROVIDE(ah = 0x000464c5); +PROVIDE(flash_get_page_info = 0x000469f3); +PROVIDE(isr_radio = 0x00037519); +PROVIDE(ull_chan_map_get = 0x00031dc5); +PROVIDE(main = 0x00043c63); PROVIDE(__aeabi_ul2d = 0x00010461); -PROVIDE(lll_adv_connect_ind_check = 0x00034b71); -PROVIDE(lll_preempt_calc = 0x00033e0d); -PROVIDE(ll_apto_get = 0x0002b6e1); -PROVIDE(ticker_update = 0x00021195); -PROVIDE(ull_scan_disable = 0x0002a149); -PROVIDE(llcp_pdu_encode_phy_req = 0x0002fc89); -PROVIDE(mem_acquire = 0x0001f5dd); -PROVIDE(radio_aa_set = 0x00037951); -PROVIDE(hci_disconn_complete_encode = 0x00025e65); +PROVIDE(lll_adv_connect_ind_check = 0x000348f5); +PROVIDE(lll_preempt_calc = 0x00033b91); +PROVIDE(ll_apto_get = 0x0002b535); +PROVIDE(ticker_update = 0x00021161); +PROVIDE(ull_scan_disable = 0x00029f9d); +PROVIDE(llcp_pdu_encode_phy_req = 0x0002fa2d); +PROVIDE(mem_acquire = 0x0001f5a9); +PROVIDE(radio_aa_set = 0x000376d5); +PROVIDE(hci_disconn_complete_encode = 0x00025d1d); PROVIDE(__floatdidf = 0x00010471); -PROVIDE(nrf_usbd_common_ep_stall = 0x0003b6f5); -PROVIDE(memcmp = 0x000489df); -PROVIDE(nrfx_pwm_stopped_check = 0x000474fd); -PROVIDE(lll_conn_force_md_cnt_set = 0x000374e9); -PROVIDE(z_shell_fprintf_fmt = 0x0001d275); -PROVIDE(llcp_rr_get_collision = 0x000311e9); -PROVIDE(ull_dle_max_time_get = 0x0002bf45); -PROVIDE(z_shell_op_cursor_vert_move = 0x0001d389); -PROVIDE(radio_tmr_start = 0x00037fcd); -PROVIDE(llcp_rp_chmu_run = 0x00030ed5); -PROVIDE(ll_adv_aux_ad_data_set = 0x00028bc1); -PROVIDE(ll_adv_set_by_hci_handle_get_or_new = 0x00027369); -PROVIDE(net_buf_alloc_len = 0x0001f055); -PROVIDE(radio_is_done = 0x00037abd); -PROVIDE(ll_pdu_rx_alloc = 0x000225c5); -PROVIDE(ull_prepare_dequeue_iter = 0x000229b1); -PROVIDE(nrf_usbd_common_setup_clear = 0x0003b79d); +PROVIDE(nrf_usbd_common_ep_stall = 0x0003b419); +PROVIDE(memcmp = 0x000486a9); +PROVIDE(nrfx_pwm_stopped_check = 0x000471d7); +PROVIDE(lll_conn_force_md_cnt_set = 0x0003726d); +PROVIDE(z_shell_fprintf_fmt = 0x0001d309); +PROVIDE(llcp_rr_get_collision = 0x00030f8d); +PROVIDE(ull_dle_max_time_get = 0x0002bd99); +PROVIDE(z_shell_op_cursor_vert_move = 0x0001d41d); +PROVIDE(radio_tmr_start = 0x00037d51); +PROVIDE(llcp_rp_chmu_run = 0x00030c79); +PROVIDE(ll_adv_aux_ad_data_set = 0x00028a49); +PROVIDE(ll_adv_set_by_hci_handle_get_or_new = 0x00027221); +PROVIDE(net_buf_alloc_len = 0x0001f07d); +PROVIDE(radio_is_done = 0x00037841); +PROVIDE(ll_pdu_rx_alloc = 0x00022591); +PROVIDE(ull_prepare_dequeue_iter = 0x0002297d); +PROVIDE(nrf_usbd_common_setup_clear = 0x0003b4c1); PROVIDE(__aeabi_cdcmple = 0x0001098d); -PROVIDE(z_shell_history_init = 0x0004622f); -PROVIDE(tanl = 0x00017c81); -PROVIDE(z_impl_k_timer_status_sync = 0x00042379); -PROVIDE(llext_call_fn = 0x00046907); -PROVIDE(disable_mpu_rasr_xn = 0x00018ae9); -PROVIDE(abort = 0x0001ed29); -PROVIDE(ull_conn_peer_connected = 0x0002b879); -PROVIDE(ticker_start_ext = 0x000210d5); -PROVIDE(ull_scan_aux_lll_handle_get = 0x0002aac1); -PROVIDE(ull_cp_feature_exchange = 0x0002e249); -PROVIDE(nrfx_gpiote_output_configure = 0x0003ed95); -PROVIDE(is_ptr = 0x0004451d); -PROVIDE(arch_irq_unlock_outlined = 0x00046481); -PROVIDE(ull_filter_lll_lrpa_get = 0x000330a9); -PROVIDE(__wrap_realloc = 0x0001edbd); -PROVIDE(z_row_span_with_buffer_offsets_get = 0x00045507); -PROVIDE(__pow5Factor = 0x00043c29); -PROVIDE(llcp_rp_comm_rx = 0x0002f285); -PROVIDE(char2hex = 0x000445f7); -PROVIDE(llcp_rp_pu_tx_ack = 0x0002dba9); -PROVIDE(usb_update_sn_string_descriptor = 0x0001ab79); -PROVIDE(shell_thread = 0x0001cf85); -PROVIDE(sys_clock_announce = 0x00042145); -PROVIDE(llcp_pdu_encode_enc_rsp = 0x0002fbc5); -PROVIDE(lll_adv_scan_req_report = 0x00034b2d); -PROVIDE(radio_crc_configure = 0x00037ae9); -PROVIDE(arch_system_halt = 0x00047761); -PROVIDE(cntr_cnt_get = 0x00037779); -PROVIDE(pinctrl_lookup_state = 0x00046ffb); -PROVIDE(log_filter_get = 0x00019a79); +PROVIDE(z_shell_history_init = 0x00045ecd); +PROVIDE(tanl = 0x00017e71); +PROVIDE(z_impl_k_timer_status_sync = 0x00041fed); +PROVIDE(llext_call_fn = 0x000465e1); +PROVIDE(disable_mpu_rasr_xn = 0x00018cd9); +PROVIDE(abort = 0x0001ed51); +PROVIDE(ull_conn_peer_connected = 0x0002b6cd); +PROVIDE(ticker_start_ext = 0x000210a1); +PROVIDE(ull_scan_aux_lll_handle_get = 0x0002a915); +PROVIDE(ull_cp_feature_exchange = 0x0002dfed); +PROVIDE(nrfx_gpiote_output_configure = 0x0003eab9); +PROVIDE(is_ptr = 0x00044191); +PROVIDE(arch_irq_unlock_outlined = 0x0004611f); +PROVIDE(ull_filter_lll_lrpa_get = 0x00032e2d); +PROVIDE(__wrap_realloc = 0x0001ede5); +PROVIDE(z_row_span_with_buffer_offsets_get = 0x0004517b); +PROVIDE(__pow5Factor = 0x0004389d); +PROVIDE(llcp_rp_comm_rx = 0x0002f029); +PROVIDE(char2hex = 0x0004426b); +PROVIDE(llcp_rp_pu_tx_ack = 0x0002d94d); +PROVIDE(usb_update_sn_string_descriptor = 0x0001accd); +PROVIDE(shell_thread = 0x0001d019); +PROVIDE(sys_clock_announce = 0x00041db9); +PROVIDE(llcp_pdu_encode_enc_rsp = 0x0002f969); +PROVIDE(lll_adv_scan_req_report = 0x000348b1); +PROVIDE(radio_crc_configure = 0x0003786d); +PROVIDE(arch_system_halt = 0x0004743b); +PROVIDE(cntr_cnt_get = 0x000374fd); +PROVIDE(pinctrl_lookup_state = 0x00046cd5); +PROVIDE(log_filter_get = 0x00019bed); PROVIDE(__aeabi_fcmplt = 0x00010e15); -PROVIDE(z_impl_k_queue_init = 0x00047c2d); -PROVIDE(nrf_usbd_common_ep_dtoggle_clear = 0x0003b739); -PROVIDE(net_buf_unref = 0x0001f155); +PROVIDE(z_impl_k_queue_init = 0x00047907); +PROVIDE(nrf_usbd_common_ep_dtoggle_clear = 0x0003b45d); +PROVIDE(net_buf_unref = 0x0001f17d); PROVIDE(__aeabi_fadd = 0x00010b69); -PROVIDE(ull_cp_prt_elapse = 0x0002e0e1); +PROVIDE(ull_cp_prt_elapse = 0x0002de85); PROVIDE(__aeabi_ui2f = 0x00010cc9); -PROVIDE(ull_adv_is_enabled = 0x00027b19); +PROVIDE(ull_adv_is_enabled = 0x000279d1); PROVIDE(__aeabi_ui2d = 0x000103d9); -PROVIDE(log_msg_get_source_id = 0x00019c85); -PROVIDE(z_impl_k_pipe_init = 0x00048261); -PROVIDE(nrfx_clock_irq_handler = 0x0003e975); -PROVIDE(z_log_msg_alloc = 0x00044ad1); -PROVIDE(ull_adv_is_enabled_get = 0x00027afd); -PROVIDE(_sin = 0x00017bd9); +PROVIDE(log_msg_get_source_id = 0x00019dd9); +PROVIDE(z_impl_k_pipe_init = 0x00047f3b); +PROVIDE(nrfx_clock_irq_handler = 0x0003e699); +PROVIDE(z_log_msg_alloc = 0x00044745); +PROVIDE(ull_adv_is_enabled_get = 0x000279b5); +PROVIDE(_sin = 0x00017dc9); PROVIDE(__aeabi_dsub = 0x0001015d); PROVIDE(__ltsf2 = 0x00010d81); -PROVIDE(llcp_rr_disconnect = 0x000315cd); +PROVIDE(llcp_rr_disconnect = 0x00031371); PROVIDE(vfscanf = 0x00000001); -PROVIDE(srandom = 0x000425b1); -PROVIDE(z_shell_vfprintf = 0x00045b8d); -PROVIDE(k_thread_name_get = 0x00047f9b); -PROVIDE(__printk_hook_install = 0x0001945d); -PROVIDE(ull_adv_aux_did_next_unique_get = 0x000287d1); -PROVIDE(lll_chan_id = 0x000320cd); -PROVIDE(ll_enc_req_send = 0x00031bd9); -PROVIDE(ll_addr_set = 0x00021465); -PROVIDE(llcp_pdu_decode_chan_map_update_ind = 0x0002ff3d); -PROVIDE(printk = 0x0004456f); -PROVIDE(z_arm_exc_spurious = 0x0001e979); -PROVIDE(ull_cp_state_set = 0x0002e181); -PROVIDE(radio_nrf5_isr = 0x00033589); -PROVIDE(tan = 0x00017c81); -PROVIDE(z_impl_k_queue_alloc_prepend = 0x00047cef); -PROVIDE(ull_conn_link_tx_release = 0x0002bcc1); -PROVIDE(lll_adv_pdu_latest_get = 0x000347d1); +PROVIDE(srandom = 0x00042225); +PROVIDE(z_shell_vfprintf = 0x00045801); +PROVIDE(k_thread_name_get = 0x00047c75); +PROVIDE(__printk_hook_install = 0x000195d1); +PROVIDE(ull_adv_aux_did_next_unique_get = 0x00028689); +PROVIDE(lll_chan_id = 0x00031e71); +PROVIDE(ll_enc_req_send = 0x0003197d); +PROVIDE(ll_addr_set = 0x00021431); +PROVIDE(llcp_pdu_decode_chan_map_update_ind = 0x0002fce1); +PROVIDE(printk = 0x000441e3); +PROVIDE(z_arm_exc_spurious = 0x0001e9a1); +PROVIDE(ull_cp_state_set = 0x0002df25); +PROVIDE(radio_nrf5_isr = 0x0003330d); +PROVIDE(tan = 0x00017e71); +PROVIDE(z_impl_k_queue_alloc_prepend = 0x000479c9); +PROVIDE(ull_conn_link_tx_release = 0x0002bb15); +PROVIDE(lll_adv_pdu_latest_get = 0x00034555); PROVIDE(__eqsf2 = 0x00010d89); -PROVIDE(z_impl_k_mutex_init = 0x00047b0d); -PROVIDE(lll_adv_scan_req_check = 0x00034abd); -PROVIDE(lll_rand_isr_get = 0x00033bed); -PROVIDE(llcp_pdu_decode_phy_update_ind = 0x0002fcfd); -PROVIDE(ull_conn_reset = 0x0002b7c1); -PROVIDE(llcp_pdu_encode_start_enc_rsp = 0x0002fc09); -PROVIDE(hci_get_class = 0x00026aa1); -PROVIDE(z_shell_print_stream = 0x00045b89); -PROVIDE(ull_tx_q_pause_data = 0x0002dbc9); -PROVIDE(z_shell_op_delete_from_cursor = 0x00045aad); -PROVIDE(lll_prepare_resolve = 0x00034029); -PROVIDE(z_arm_cpu_idle_init = 0x0001ec81); +PROVIDE(z_impl_k_mutex_init = 0x000477e7); +PROVIDE(lll_adv_scan_req_check = 0x00034841); +PROVIDE(lll_rand_isr_get = 0x00033971); +PROVIDE(llcp_pdu_decode_phy_update_ind = 0x0002faa1); +PROVIDE(ull_conn_reset = 0x0002b615); +PROVIDE(llcp_pdu_encode_start_enc_rsp = 0x0002f9ad); +PROVIDE(hci_get_class = 0x00026959); +PROVIDE(z_shell_print_stream = 0x000457fd); +PROVIDE(ull_tx_q_pause_data = 0x0002d96d); +PROVIDE(z_shell_op_delete_from_cursor = 0x00045721); +PROVIDE(lll_prepare_resolve = 0x00033dad); +PROVIDE(z_arm_cpu_idle_init = 0x0001eca9); PROVIDE(__floatundidf = 0x00010461); -PROVIDE(z_impl_k_msgq_purge = 0x00047a77); -PROVIDE(sys_clock_elapsed = 0x0003e511); -PROVIDE(z_impl_k_poll_signal_init = 0x00048841); -PROVIDE(__file_str_put = 0x00048ee9); -PROVIDE(ull_periph_latency_cancel = 0x00031819); -PROVIDE(z_do_kernel_oops = 0x0004641d); +PROVIDE(z_impl_k_msgq_purge = 0x00047751); +PROVIDE(sys_clock_elapsed = 0x0003e235); +PROVIDE(z_impl_k_poll_signal_init = 0x0004850b); +PROVIDE(__file_str_put = 0x00048bb3); +PROVIDE(ull_periph_latency_cancel = 0x000315bd); +PROVIDE(z_do_kernel_oops = 0x000460bb); PROVIDE(__floatsisf = 0x00010cd1); -PROVIDE(z_impl_k_thread_name_set = 0x0004127d); -PROVIDE(pinctrl_configure_pins = 0x0003d0c9); -PROVIDE(z_impl_log_filter_set = 0x00044ad9); -PROVIDE(ring_buf_area_claim = 0x00044919); -PROVIDE(srand = 0x000489db); -PROVIDE(z_thread_monitor_exit = 0x00041f0d); -PROVIDE(lll_adv_sync_prepare = 0x00035535); -PROVIDE(ll_tx_ack_put = 0x000225f1); -PROVIDE(ull_adv_aux_pdu_set_clear = 0x00028319); -PROVIDE(nrfx_power_irq_handler = 0x0003f2e5); -PROVIDE(llcp_pdu_encode_start_enc_req = 0x0002fbf5); -PROVIDE(z_impl_k_queue_get = 0x00040c35); -PROVIDE(shell_help = 0x0004543d); -PROVIDE(nrfx_pwm_stop = 0x0003f589); -PROVIDE(z_data_copy = 0x00041fc5); -PROVIDE(net_buf_frag_add = 0x00046757); -PROVIDE(ull_cp_terminate = 0x0002e3ad); -PROVIDE(llcp_rr_rx = 0x0003145d); -PROVIDE(radio_freq_chan_set = 0x0003791d); -PROVIDE(z_impl_k_msgq_put = 0x0004091d); -PROVIDE(ll_terminate_ind_send = 0x0002b3f9); -PROVIDE(nrfx_power_usbevt_enable = 0x000473ad); -PROVIDE(radio_is_address = 0x00037aa9); -PROVIDE(mayfly_pend = 0x000386b9); -PROVIDE(shell_backend_uart_get_ptr = 0x0001c44d); -PROVIDE(ull_adv_aux_chm_update = 0x000282c1); -PROVIDE(snprintf = 0x0004263d); -PROVIDE(radio_pkt_configure = 0x00037979); -PROVIDE(z_impl_k_thread_priority_get = 0x00047f95); -PROVIDE(nrfx_spim_xfer = 0x0003fa19); -PROVIDE(ull_conn_default_phy_rx_get = 0x0002b86d); +PROVIDE(z_impl_k_thread_name_set = 0x00040ef1); +PROVIDE(pinctrl_configure_pins = 0x0003cded); +PROVIDE(z_impl_log_filter_set = 0x0004474d); +PROVIDE(ring_buf_area_claim = 0x0004458d); +PROVIDE(srand = 0x000486a5); +PROVIDE(z_thread_monitor_exit = 0x00041b81); +PROVIDE(lll_adv_sync_prepare = 0x000352b9); +PROVIDE(ll_tx_ack_put = 0x000225bd); +PROVIDE(ull_adv_aux_pdu_set_clear = 0x000281d1); +PROVIDE(nrfx_power_irq_handler = 0x0003f009); +PROVIDE(llcp_pdu_encode_start_enc_req = 0x0002f999); +PROVIDE(z_impl_k_queue_get = 0x000408a9); +PROVIDE(shell_help = 0x000450b1); +PROVIDE(nrfx_pwm_stop = 0x0003f2ad); +PROVIDE(z_data_copy = 0x00041c39); +PROVIDE(net_buf_frag_add = 0x000463f5); +PROVIDE(ull_cp_terminate = 0x0002e151); +PROVIDE(llcp_rr_rx = 0x00031201); +PROVIDE(radio_freq_chan_set = 0x000376a1); +PROVIDE(z_impl_k_msgq_put = 0x00040591); +PROVIDE(ll_terminate_ind_send = 0x0002b24d); +PROVIDE(nrfx_power_usbevt_enable = 0x00047087); +PROVIDE(radio_is_address = 0x0003782d); +PROVIDE(mayfly_pend = 0x0003843d); +PROVIDE(shell_backend_uart_get_ptr = 0x0001c505); +PROVIDE(ull_adv_aux_chm_update = 0x00028179); +PROVIDE(snprintf = 0x000422b1); +PROVIDE(radio_pkt_configure = 0x000376fd); +PROVIDE(z_impl_k_thread_priority_get = 0x00047c6f); +PROVIDE(nrfx_spim_xfer = 0x0003f73d); +PROVIDE(ull_conn_default_phy_rx_get = 0x0002b6c1); PROVIDE(__gtdf2 = 0x000108f1); -PROVIDE(cosl = 0x00017739); -PROVIDE(k_queue_prepend = 0x00047cc7); -PROVIDE(lll_adv_aux_reset = 0x000353d5); -PROVIDE(nrfx_twim_disable = 0x0003fe61); -PROVIDE(bt_hci_cmd_status_create = 0x000468c3); -PROVIDE(isprint = 0x00048961); -PROVIDE(nrf_usbd_common_uninit = 0x0003aee1); -PROVIDE(z_work_submit_to_queue = 0x00047ee3); -PROVIDE(llcp_rp_enc_ltk_req_reply = 0x0002cc65); -PROVIDE(ull_conn_chan_map_set = 0x0002bf21); -PROVIDE(llext_adjust_mmu_permissions = 0x00046983); -PROVIDE(z_init_static = 0x000477bf); -PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x00046f37); +PROVIDE(cosl = 0x00017929); +PROVIDE(k_queue_prepend = 0x000479a1); +PROVIDE(lll_adv_aux_reset = 0x00035159); +PROVIDE(nrfx_twim_disable = 0x0003fb85); +PROVIDE(bt_hci_cmd_status_create = 0x0004659d); +PROVIDE(isprint = 0x0004862b); +PROVIDE(nrf_usbd_common_uninit = 0x0003ac05); +PROVIDE(z_work_submit_to_queue = 0x00047bbd); +PROVIDE(llcp_rp_enc_ltk_req_reply = 0x0002cab9); +PROVIDE(ull_conn_chan_map_set = 0x0002bd75); +PROVIDE(llext_adjust_mmu_permissions = 0x0004665d); +PROVIDE(z_init_static = 0x00047499); +PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x00046c11); PROVIDE(__aeabi_fcmple = 0x00010e29); -PROVIDE(z_impl_k_thread_abort = 0x0001e9d5); -PROVIDE(usb_dc_ep_set_callback = 0x0003adad); -PROVIDE(lll_conn_abort_cb = 0x00036bf9); -PROVIDE(llcp_pdu_decode_feature_req = 0x0002f9d1); -PROVIDE(shell_fprintf_impl = 0x0004536d); -PROVIDE(llext_by_name = 0x00038a75); +PROVIDE(z_impl_k_thread_abort = 0x0001e9fd); +PROVIDE(usb_dc_ep_set_callback = 0x0003aad1); +PROVIDE(lll_conn_abort_cb = 0x0003697d); +PROVIDE(llcp_pdu_decode_feature_req = 0x0002f775); +PROVIDE(shell_fprintf_impl = 0x00044fe1); +PROVIDE(llext_by_name = 0x000387b9); PROVIDE(__ltdf2 = 0x000108f9); -PROVIDE(radio_filter_configure = 0x00037f0d); -PROVIDE(onoff_request = 0x00044793); -PROVIDE(__d_vfprintf = 0x00042d51); -PROVIDE(ull_scan_aux_done = 0x0002aa29); +PROVIDE(radio_filter_configure = 0x00037c91); +PROVIDE(onoff_request = 0x00044407); +PROVIDE(__d_vfprintf = 0x000429c5); +PROVIDE(ull_scan_aux_done = 0x0002a87d); PROVIDE(ull_sched_after_cen_slot_get = 0x00015001); -PROVIDE(radio_rssi_is_ready = 0x00037ef9); -PROVIDE(radio_ar_match_get = 0x000384d5); -PROVIDE(shell_process = 0x0001c8a5); +PROVIDE(radio_rssi_is_ready = 0x00037c7d); +PROVIDE(radio_ar_match_get = 0x00038259); +PROVIDE(shell_process = 0x0001c95d); PROVIDE(CONFIG_LOG_FUNC_NAME_PREFIX_DBG = 0x00000001); -PROVIDE(z_reset_time_slice = 0x00041e5d); -PROVIDE(llcp_rr_peek = 0x000311f5); -PROVIDE(lll_done = 0x00033cc1); -PROVIDE(ull_scan_aux_release = 0x0002ab1d); -PROVIDE(z_impl_k_thread_priority_set = 0x00041919); -PROVIDE(cos = 0x00017739); +PROVIDE(z_reset_time_slice = 0x00041ad1); +PROVIDE(llcp_rr_peek = 0x00030f99); +PROVIDE(lll_done = 0x00033a45); +PROVIDE(ull_scan_aux_release = 0x0002a971); +PROVIDE(z_impl_k_thread_priority_set = 0x0004158d); +PROVIDE(cos = 0x00017929); PROVIDE(strcmp = 0x00010f9d); -PROVIDE(z_setup_new_thread = 0x00041321); +PROVIDE(z_setup_new_thread = 0x00040f95); PROVIDE(__lesf2 = 0x00010d81); -PROVIDE(z_shell_op_cursor_horiz_move = 0x0001d3b5); -PROVIDE(llcp_ntf_encode_feature_rsp = 0x0002f995); -PROVIDE(llcp_rr_tx_ack = 0x00031551); -PROVIDE(z_impl_k_thread_create = 0x000413f5); -PROVIDE(__umul128 = 0x00048d47); -PROVIDE(nrfx_gpiote_channel_get = 0x0003ee9d); -PROVIDE(ull_adv_aux_handle_get = 0x00028851); -PROVIDE(arch_cpu_idle = 0x0004648f); -PROVIDE(z_impl_log_frontend_filter_set = 0x00044ae9); -PROVIDE(ll_tx_pwr_lvl_get = 0x0002143d); -PROVIDE(z_impl_k_sleep = 0x00048141); -PROVIDE(ll_radio_state_abort = 0x0002265d); -PROVIDE(llcp_tx_alloc_peek = 0x0002de85); -PROVIDE(llcp_ntf_alloc = 0x0002debd); -PROVIDE(sys_heap_init = 0x00044441); -PROVIDE(net_buf_alloc_fixed = 0x00046731); -PROVIDE(nrfx_nvmc_flash_page_size_get = 0x00047385); -PROVIDE(usb_dc_ep_mps = 0x0003ade1); -PROVIDE(ull_pdu_rx_alloc = 0x00022895); -PROVIDE(ll_rl_clear = 0x00032579); -PROVIDE(z_shell_fprintf = 0x00045bd9); -PROVIDE(memq_peek = 0x0001f6a9); -PROVIDE(radio_tmr_status_reset = 0x00037f95); -PROVIDE(i2c_nrfx_twim_msg_transfer = 0x0003cfb1); -PROVIDE(ull_is_lll_tx_queue_empty = 0x0002c2c5); -PROVIDE(z_nrf_clock_control_lf_on = 0x0003c291); -PROVIDE(radio_tmr_aa_restore = 0x0003823d); +PROVIDE(z_shell_op_cursor_horiz_move = 0x0001d449); +PROVIDE(llcp_ntf_encode_feature_rsp = 0x0002f739); +PROVIDE(llcp_rr_tx_ack = 0x000312f5); +PROVIDE(z_impl_k_thread_create = 0x00041069); +PROVIDE(__umul128 = 0x00048a11); +PROVIDE(nrfx_gpiote_channel_get = 0x0003ebc1); +PROVIDE(ull_adv_aux_handle_get = 0x00028709); +PROVIDE(arch_cpu_idle = 0x0004612d); +PROVIDE(z_impl_log_frontend_filter_set = 0x0004475d); +PROVIDE(ll_tx_pwr_lvl_get = 0x00021409); +PROVIDE(z_impl_k_sleep = 0x00047e1b); +PROVIDE(ll_radio_state_abort = 0x00022629); +PROVIDE(llcp_tx_alloc_peek = 0x0002dc29); +PROVIDE(llcp_ntf_alloc = 0x0002dc61); +PROVIDE(sys_heap_init = 0x000440b5); +PROVIDE(net_buf_alloc_fixed = 0x000463cf); +PROVIDE(nrfx_nvmc_flash_page_size_get = 0x0004705f); +PROVIDE(usb_dc_ep_mps = 0x0003ab05); +PROVIDE(ull_pdu_rx_alloc = 0x00022861); +PROVIDE(ll_rl_clear = 0x0003231d); +PROVIDE(z_shell_fprintf = 0x0004584d); +PROVIDE(memq_peek = 0x0001f675); +PROVIDE(radio_tmr_status_reset = 0x00037d19); +PROVIDE(i2c_nrfx_twim_msg_transfer = 0x0003ccd5); +PROVIDE(ull_is_lll_tx_queue_empty = 0x0002c119); +PROVIDE(z_nrf_clock_control_lf_on = 0x0003bfb5); +PROVIDE(radio_tmr_aa_restore = 0x00037fc1); PROVIDE(ull_sched_mfy_after_cen_offset_get = 0x000150b1); -PROVIDE(ticker_worker = 0x000200c5); -PROVIDE(radio_switch_complete_and_rx = 0x00037e41); -PROVIDE(z_impl_k_queue_peek_head = 0x00047d03); -PROVIDE(memset = 0x000488f1); -PROVIDE(ull_filter_adv_scan_state_cb = 0x00032a61); +PROVIDE(ticker_worker = 0x00020091); +PROVIDE(radio_switch_complete_and_rx = 0x00037bc5); +PROVIDE(z_impl_k_queue_peek_head = 0x000479dd); +PROVIDE(memset = 0x000485bb); +PROVIDE(ull_filter_adv_scan_state_cb = 0x00032805); PROVIDE(__gedf2 = 0x000108f1); -PROVIDE(llcp_rr_run = 0x000315b5); -PROVIDE(ll_deinit = 0x00021e59); +PROVIDE(llcp_rr_run = 0x00031359); +PROVIDE(ll_deinit = 0x00021e25); PROVIDE(__floatdisf = 0x00010cfd); -PROVIDE(k_thread_foreach = 0x00041f49); -PROVIDE(onoff_cancel = 0x00044889); -PROVIDE(llcp_pdu_encode_chan_map_update_ind = 0x0002ff15); +PROVIDE(k_thread_foreach = 0x00041bbd); +PROVIDE(onoff_cancel = 0x000444fd); +PROVIDE(llcp_pdu_encode_chan_map_update_ind = 0x0002fcb9); PROVIDE(ull_conn_done = 0x00013ba1); -PROVIDE(ull_scan_set_get = 0x0002a629); -PROVIDE(sys_notify_finalize = 0x000448e7); -PROVIDE(usb_dc_detach = 0x0003a865); -PROVIDE(__do_global_ctors_aux = 0x0004080d); -PROVIDE(radio_tx_power_set = 0x00037911); -PROVIDE(z_time_slice = 0x00041ead); +PROVIDE(ull_scan_set_get = 0x0002a47d); +PROVIDE(sys_notify_finalize = 0x0004455b); +PROVIDE(usb_dc_detach = 0x0003a589); +PROVIDE(__do_global_ctors_aux = 0x00040481); +PROVIDE(radio_tx_power_set = 0x00037695); +PROVIDE(z_time_slice = 0x00041b21); PROVIDE(__aeabi_ddiv = 0x00010721); -PROVIDE(bt_rpa_create = 0x0004684d); -PROVIDE(ull_scan_term_dequeue = 0x0002a561); -PROVIDE(llcp_pdu_encode_conn_update_ind = 0x0002fe9d); -PROVIDE(z_nrf_clock_bt_ctlr_hf_release = 0x0003c25d); -PROVIDE(z_irq_spurious = 0x00046473); -PROVIDE(llcp_lr_connect = 0x0002f76d); -PROVIDE(z_shell_op_cursor_word_move = 0x000459e9); -PROVIDE(k_is_in_isr = 0x00047f89); -PROVIDE(lll_adv_init = 0x00034599); -PROVIDE(ull_event_done = 0x00022b55); -PROVIDE(ull_ticker_status_take = 0x000226a1); -PROVIDE(llcp_rr_get_paused_cmd = 0x000311e5); -PROVIDE(__kernel_rem_pio2 = 0x00017e81); -PROVIDE(ull_adv_lll_handle_get = 0x00027ae1); -PROVIDE(z_arm_int_exit = 0x0001e311); -PROVIDE(llcp_rp_enc_ltk_req_neg_reply = 0x0002cc6d); -PROVIDE(_ConfigAbsSyms = 0x00044a7d); -PROVIDE(nrfx_nvmc_page_erase = 0x0003f1e9); -PROVIDE(ring_buf_put = 0x000449b7); -PROVIDE(arm_irq_enable = 0x0001eab9); +PROVIDE(bt_rpa_create = 0x00046527); +PROVIDE(ull_scan_term_dequeue = 0x0002a3b5); +PROVIDE(llcp_pdu_encode_conn_update_ind = 0x0002fc41); +PROVIDE(z_nrf_clock_bt_ctlr_hf_release = 0x0003bf81); +PROVIDE(z_irq_spurious = 0x00046111); +PROVIDE(llcp_lr_connect = 0x0002f511); +PROVIDE(z_shell_op_cursor_word_move = 0x0004565d); +PROVIDE(k_is_in_isr = 0x00047c63); +PROVIDE(lll_adv_init = 0x0003431d); +PROVIDE(ull_event_done = 0x00022b21); +PROVIDE(ull_ticker_status_take = 0x0002266d); +PROVIDE(llcp_rr_get_paused_cmd = 0x00030f89); +PROVIDE(__kernel_rem_pio2 = 0x00018071); +PROVIDE(ull_adv_lll_handle_get = 0x00027999); +PROVIDE(z_arm_int_exit = 0x0001e339); +PROVIDE(llcp_rp_enc_ltk_req_neg_reply = 0x0002cac1); +PROVIDE(_ConfigAbsSyms = 0x000446f1); +PROVIDE(nrfx_nvmc_page_erase = 0x0003ef0d); +PROVIDE(ring_buf_put = 0x0004462b); +PROVIDE(arm_irq_enable = 0x0001eae1); PROVIDE(__extendsfdf2 = 0x0001041d); -PROVIDE(llcp_rr_prt_restart = 0x0003121d); -PROVIDE(z_impl_k_timer_stop = 0x000485af); -PROVIDE(ticker_start = 0x0002106d); -PROVIDE(llext_buf_peek = 0x00046ac7); -PROVIDE(llcp_lr_disconnect = 0x0002f7b5); -PROVIDE(lll_conn_flush = 0x00036b65); -PROVIDE(lll_isr_early_abort = 0x00033fc1); -PROVIDE(ull_adv_init = 0x00027a2d); -PROVIDE(__wrap_malloc = 0x0001ed89); -PROVIDE(ull_scan_lll_is_valid_get = 0x0002a691); -PROVIDE(flash_area_read = 0x00044d17); -PROVIDE(z_impl_k_poll = 0x0004242d); -PROVIDE(nrfx_pwm_simple_playback = 0x0003f50d); -PROVIDE(ull_adv_handle_get = 0x00027ac9); -PROVIDE(ll_length_default_set = 0x0002b591); -PROVIDE(SystemInit = 0x0003e559); -PROVIDE(sys_clock_cycle_get_32 = 0x0004723f); -PROVIDE(nrfx_twim_enable = 0x0003fe41); +PROVIDE(llcp_rr_prt_restart = 0x00030fc1); +PROVIDE(z_impl_k_timer_stop = 0x00048279); +PROVIDE(ticker_start = 0x00021039); +PROVIDE(llext_buf_peek = 0x000467a1); +PROVIDE(llcp_lr_disconnect = 0x0002f559); +PROVIDE(lll_conn_flush = 0x000368e9); +PROVIDE(lll_isr_early_abort = 0x00033d45); +PROVIDE(ull_adv_init = 0x000278e5); +PROVIDE(__wrap_malloc = 0x0001edb1); +PROVIDE(ull_scan_lll_is_valid_get = 0x0002a4e5); +PROVIDE(flash_area_read = 0x0004498b); +PROVIDE(z_impl_k_poll = 0x000420a1); +PROVIDE(nrfx_pwm_simple_playback = 0x0003f231); +PROVIDE(ull_adv_handle_get = 0x00027981); +PROVIDE(ll_length_default_set = 0x0002b3e5); +PROVIDE(SystemInit = 0x0003e27d); +PROVIDE(sys_clock_cycle_get_32 = 0x00046f19); +PROVIDE(nrfx_twim_enable = 0x0003fb65); PROVIDE(__fixdfdi = 0x00010fd1); -PROVIDE(llcp_pdu_encode_phy_rsp = 0x0002fcd1); -PROVIDE(usb_dc_set_status_callback = 0x0003add5); -PROVIDE(shell_init = 0x0001d17d); -PROVIDE(sys_heap_aligned_realloc = 0x00044319); -PROVIDE(llcp_pdu_decode_phy_rsp = 0x0002fd39); -PROVIDE(ll_rx_link_alloc = 0x00022511); +PROVIDE(llcp_pdu_encode_phy_rsp = 0x0002fa75); +PROVIDE(usb_dc_set_status_callback = 0x0003aaf9); +PROVIDE(shell_init = 0x0001d211); +PROVIDE(sys_heap_aligned_realloc = 0x00043f8d); +PROVIDE(llcp_pdu_decode_phy_rsp = 0x0002fadd); +PROVIDE(ll_rx_link_alloc = 0x000224dd); PROVIDE(__gtsf2 = 0x00010d79); -PROVIDE(radio_phy_flags_rx_get = 0x00037eb1); -PROVIDE(ull_adv_sync_add_to_acad = 0x00029c1d); -PROVIDE(ull_conn_lll_max_tx_octets_get = 0x0002be91); -PROVIDE(lll_clock_sca_local_get = 0x0003434d); -PROVIDE(spi_nrfx_wake_init = 0x0003e091); -PROVIDE(__wrap_random = 0x00042579); -PROVIDE(hci_vendor_read_key_hierarchy_roots = 0x00037699); -PROVIDE(llcp_lp_cu_run = 0x00030ce5); -PROVIDE(llcp_rp_conn_param_req_neg_reply = 0x00030d4d); -PROVIDE(__math_invalid = 0x00017ce9); -PROVIDE(ll_adv_aux_max_data_length_get = 0x000281ed); -PROVIDE(memmove = 0x000488bd); -PROVIDE(ll_adv_scan_rsp_set = 0x00028009); -PROVIDE(z_nrf_rtc_timer_read = 0x0003e1dd); -PROVIDE(mayfly_enqueue = 0x0001f785); +PROVIDE(radio_phy_flags_rx_get = 0x00037c35); +PROVIDE(ull_adv_sync_add_to_acad = 0x00029a8d); +PROVIDE(ull_conn_lll_max_tx_octets_get = 0x0002bce5); +PROVIDE(lll_clock_sca_local_get = 0x000340d1); +PROVIDE(spi_nrfx_wake_init = 0x0003ddb5); +PROVIDE(__wrap_random = 0x000421ed); +PROVIDE(hci_vendor_read_key_hierarchy_roots = 0x0003741d); +PROVIDE(llcp_lp_cu_run = 0x00030a89); +PROVIDE(llcp_rp_conn_param_req_neg_reply = 0x00030af1); +PROVIDE(__math_invalid = 0x00017ed9); +PROVIDE(ll_adv_aux_max_data_length_get = 0x000280a5); +PROVIDE(memmove = 0x00048587); +PROVIDE(ll_adv_scan_rsp_set = 0x00027ec1); +PROVIDE(z_nrf_rtc_timer_read = 0x0003df01); +PROVIDE(mayfly_enqueue = 0x0001f751); PROVIDE(hci_init = 0x00011419); PROVIDE(__nesf2 = 0x00010d89); -PROVIDE(iscntrl = 0x0004892b); -PROVIDE(islower = 0x00048955); -PROVIDE(ull_adv_done = 0x00027b6d); -PROVIDE(strcat = 0x00048a2f); -PROVIDE(llcp_pdu_encode_reject_ext_ind = 0x0002fc5d); -PROVIDE(rand = 0x000489d7); -PROVIDE(ull_filter_tgta_get = 0x00032e35); -PROVIDE(llext_file_offset = 0x00046a11); -PROVIDE(ull_tx_q_peek = 0x0002dc3d); -PROVIDE(radio_tmr_ready_get = 0x00038249); -PROVIDE(lll_conn_rx_pkt_set = 0x00036ce9); -PROVIDE(strncmp = 0x00048a67); -PROVIDE(spi_nrfx_wake_request = 0x000471d7); -PROVIDE(radio_tmr_aa_capture = 0x000381fd); -PROVIDE(ull_cp_init = 0x0002e031); -PROVIDE(nrf_usbd_common_start = 0x0003b03d); +PROVIDE(iscntrl = 0x000485f5); +PROVIDE(islower = 0x0004861f); +PROVIDE(ull_adv_done = 0x00027a25); +PROVIDE(strcat = 0x000486f9); +PROVIDE(llcp_pdu_encode_reject_ext_ind = 0x0002fa01); +PROVIDE(rand = 0x000486a1); +PROVIDE(ull_filter_tgta_get = 0x00032bb9); +PROVIDE(llext_file_offset = 0x000466eb); +PROVIDE(ull_tx_q_peek = 0x0002d9e1); +PROVIDE(radio_tmr_ready_get = 0x00037fcd); +PROVIDE(lll_conn_rx_pkt_set = 0x00036a6d); +PROVIDE(strncmp = 0x00048731); +PROVIDE(spi_nrfx_wake_request = 0x00046eb1); +PROVIDE(radio_tmr_aa_capture = 0x00037f81); +PROVIDE(ull_cp_init = 0x0002ddd5); +PROVIDE(nrf_usbd_common_start = 0x0003ad61); PROVIDE(ull_periph_setup = 0x00014221); -PROVIDE(ldexpl = 0x00043e85); -PROVIDE(__math_inexact64 = 0x00048f21); -PROVIDE(ull_adv_aux_reset_finalize = 0x000282a5); -PROVIDE(ull_update_mark = 0x00022701); -PROVIDE(isxdigit = 0x0004898d); +PROVIDE(ldexpl = 0x00043af9); +PROVIDE(__math_inexact64 = 0x00048beb); +PROVIDE(ull_adv_aux_reset_finalize = 0x0002815d); +PROVIDE(ull_update_mark = 0x000226cd); +PROVIDE(isxdigit = 0x00048657); PROVIDE(__aeabi_cdcmpeq = 0x0001098d); -PROVIDE(__aeabi_memcpy4 = 0x000488a1); -PROVIDE(bt_buf_get_evt = 0x00046899); +PROVIDE(__aeabi_memcpy4 = 0x0004856b); +PROVIDE(bt_buf_get_evt = 0x00046573); PROVIDE(ull_adv_aux_hdr_set_clear = 0x00011fb1); -PROVIDE(llcp_rr_ispaused = 0x000311fd); -PROVIDE(assert_post_action = 0x00044589); -PROVIDE(z_arm_usage_fault = 0x0001e979); -PROVIDE(radio_ccm_is_done = 0x000383c9); -PROVIDE(ull_periph_ticker_cb = 0x0003175d); +PROVIDE(llcp_rr_ispaused = 0x00030fa1); +PROVIDE(assert_post_action = 0x000441fd); +PROVIDE(z_arm_usage_fault = 0x0001e9a1); +PROVIDE(radio_ccm_is_done = 0x0003814d); +PROVIDE(ull_periph_ticker_cb = 0x00031501); PROVIDE(ull_drift_ticks_get = 0x00011389); -PROVIDE(ull_adv_sync_info_fill = 0x00029a29); +PROVIDE(ull_adv_sync_info_fill = 0x00029899); PROVIDE(strcpy = 0x00010fb1); -PROVIDE(net_buf_frag_insert = 0x00046741); -PROVIDE(ull_adv_aux_ptr_fill = 0x000287e9); -PROVIDE(llcp_lp_enc_run = 0x0002cc1d); -PROVIDE(z_shell_help_subcmd_print = 0x0001d785); -PROVIDE(lll_csrand_get = 0x00033ba1); -PROVIDE(usb_transfer_ep_callback = 0x0001b031); -PROVIDE(usb_dc_ep_enable = 0x0003aab9); -PROVIDE(ull_cp_min_used_chans = 0x0002e1e9); -PROVIDE(ll_rx_put = 0x00022541); -PROVIDE(llcp_lr_resume = 0x0002f561); -PROVIDE(lll_scan_aux_prepare = 0x000367b5); -PROVIDE(scalbnl = 0x00043e85); -PROVIDE(ll_fal_add = 0x00032315); -PROVIDE(usb_dc_ep_is_stalled = 0x0003aa81); -PROVIDE(z_impl_k_stack_alloc_init = 0x00047d47); -PROVIDE(__aeabi_memcpy = 0x000488a1); -PROVIDE(do_llext_load = 0x00038eb9); -PROVIDE(__aeabi_memcpy8 = 0x000488a1); +PROVIDE(net_buf_frag_insert = 0x000463df); +PROVIDE(ull_adv_aux_ptr_fill = 0x000286a1); +PROVIDE(llcp_lp_enc_run = 0x0002ca71); +PROVIDE(z_shell_help_subcmd_print = 0x0001d7cd); +PROVIDE(lll_csrand_get = 0x00033925); +PROVIDE(usb_transfer_ep_callback = 0x0001b165); +PROVIDE(usb_dc_ep_enable = 0x0003a7dd); +PROVIDE(ull_cp_min_used_chans = 0x0002df8d); +PROVIDE(ll_rx_put = 0x0002250d); +PROVIDE(llcp_lr_resume = 0x0002f305); +PROVIDE(lll_scan_aux_prepare = 0x00036539); +PROVIDE(scalbnl = 0x00043af9); +PROVIDE(ll_fal_add = 0x000320b9); +PROVIDE(usb_dc_ep_is_stalled = 0x0003a7a5); +PROVIDE(z_impl_k_stack_alloc_init = 0x00047a21); +PROVIDE(__aeabi_memcpy = 0x0004856b); +PROVIDE(do_llext_load = 0x00038bfd); +PROVIDE(__aeabi_memcpy8 = 0x0004856b); PROVIDE(__aeabi_fcmpun = 0x00010e65); -PROVIDE(z_impl_k_msgq_get_attrs = 0x000479f1); -PROVIDE(ull_conn_ack_dequeue = 0x0002bd2d); +PROVIDE(z_impl_k_msgq_get_attrs = 0x000476cb); +PROVIDE(ull_conn_ack_dequeue = 0x0002bb81); PROVIDE(__aeabi_fsub = 0x00010b65); -PROVIDE(strrchr = 0x00048ac3); -PROVIDE(z_thread_aligned_alloc = 0x00042549); -PROVIDE(ull_event_done_extra_get = 0x00022b15); -PROVIDE(z_impl_k_float_enable = 0x00047959); -PROVIDE(ull_cp_le_ping = 0x0002e225); -PROVIDE(ull_filter_lll_irk_in_fal = 0x00033285); -PROVIDE(llcp_pdu_decode_unknown_rsp = 0x0002f8e5); -PROVIDE(lll_resume = 0x00022bc5); +PROVIDE(strrchr = 0x0004878d); +PROVIDE(z_thread_aligned_alloc = 0x000421bd); +PROVIDE(ull_event_done_extra_get = 0x00022ae1); +PROVIDE(z_impl_k_float_enable = 0x00047633); +PROVIDE(ull_cp_le_ping = 0x0002dfc9); +PROVIDE(ull_filter_lll_irk_in_fal = 0x00033009); +PROVIDE(llcp_pdu_decode_unknown_rsp = 0x0002f689); +PROVIDE(lll_resume = 0x00022b91); PROVIDE(__atod_engine = 0x00017231); -PROVIDE(nrfx_gpiote_channel_free = 0x0003ef4d); -PROVIDE(lll_chan_set = 0x00033e31); -PROVIDE(ll_adv_sync_param_set = 0x00028f51); -PROVIDE(llcp_lp_comm_run = 0x0002f27d); -PROVIDE(z_shell_make_argv = 0x00045549); -PROVIDE(z_shell_history_get = 0x000460d1); +PROVIDE(nrfx_gpiote_channel_free = 0x0003ec71); +PROVIDE(lll_chan_set = 0x00033bb5); +PROVIDE(ll_adv_sync_param_set = 0x00028dc1); +PROVIDE(llcp_lp_comm_run = 0x0002f021); +PROVIDE(z_shell_make_argv = 0x000451bd); +PROVIDE(z_shell_history_get = 0x00045d6f); PROVIDE(ull_adv_sync_start = 0x00012eb1); -PROVIDE(radio_tmr_end_get = 0x00038265); -PROVIDE(ull_adv_sync_offset_get = 0x00029a4d); -PROVIDE(ull_scan_handle_get = 0x0002a645); +PROVIDE(radio_tmr_end_get = 0x00037fe9); +PROVIDE(ull_adv_sync_offset_get = 0x000298bd); +PROVIDE(ull_scan_handle_get = 0x0002a499); PROVIDE(ull_adv_aux_lll_offset_fill = 0x000127f1); -PROVIDE(ull_adv_sync_lll_handle_get = 0x0002919d); -PROVIDE(log_source_id_get = 0x00019955); -PROVIDE(nrf_usbd_common_setup_get = 0x0003b74d); -PROVIDE(llcp_tx_pause_data = 0x0002dec9); -PROVIDE(ull_dle_update_eff_tx = 0x0002c0f1); -PROVIDE(radio_tmr_start_now = 0x0003813d); -PROVIDE(lll_scan_aux_addr_match_get = 0x000369ad); +PROVIDE(ull_adv_sync_lll_handle_get = 0x0002900d); +PROVIDE(log_source_id_get = 0x00019ac9); +PROVIDE(nrf_usbd_common_setup_get = 0x0003b471); +PROVIDE(llcp_tx_pause_data = 0x0002dc6d); +PROVIDE(ull_dle_update_eff_tx = 0x0002bf45); +PROVIDE(radio_tmr_start_now = 0x00037ec1); +PROVIDE(lll_scan_aux_addr_match_get = 0x00036731); PROVIDE(__aeabi_cdrcmple = 0x0001097d); -PROVIDE(ll_conn_handle_get = 0x0002b071); -PROVIDE(nrfx_gpiote_pin_uninit = 0x0004736b); -PROVIDE(z_init_cpu = 0x00040621); -PROVIDE(ll_fal_remove = 0x0003243d); -PROVIDE(ll_adv_set_by_hci_handle_get = 0x00027349); -PROVIDE(radio_phy_set = 0x0003786d); -PROVIDE(z_impl_log_process = 0x00044acd); -PROVIDE(radio_filter_disable = 0x00037f4d); -PROVIDE(ull_cp_release_nodes = 0x0002e1a9); -PROVIDE(ll_conn_release = 0x0002b065); -PROVIDE(ull_conn_default_phy_tx_get = 0x0002b861); -PROVIDE(z_SysNmiOnReset = 0x0001def1); -PROVIDE(ull_done_extra_type_set = 0x00022b31); -PROVIDE(z_shell_history_put = 0x0004613f); -PROVIDE(strnlen = 0x00048aab); -PROVIDE(nrfx_gpiote_init_check = 0x0003ef39); -PROVIDE(isgraph = 0x00048949); -PROVIDE(ll_scan_enable = 0x0002a295); -PROVIDE(z_impl_log_panic = 0x00019819); -PROVIDE(net_buf_simple_add = 0x00046799); -PROVIDE(radio_tmr_hcto_configure_abs = 0x000381e1); +PROVIDE(ll_conn_handle_get = 0x0002aec5); +PROVIDE(nrfx_gpiote_pin_uninit = 0x00047045); +PROVIDE(z_init_cpu = 0x00040345); +PROVIDE(ll_fal_remove = 0x000321e1); +PROVIDE(ll_adv_set_by_hci_handle_get = 0x00027201); +PROVIDE(radio_phy_set = 0x000375f1); +PROVIDE(atan2l = 0x00017739); +PROVIDE(z_impl_log_process = 0x00044741); +PROVIDE(radio_filter_disable = 0x00037cd1); +PROVIDE(ull_cp_release_nodes = 0x0002df4d); +PROVIDE(ll_conn_release = 0x0002aeb9); +PROVIDE(ull_conn_default_phy_tx_get = 0x0002b6b5); +PROVIDE(z_SysNmiOnReset = 0x0001df19); +PROVIDE(ull_done_extra_type_set = 0x00022afd); +PROVIDE(z_shell_history_put = 0x00045ddd); +PROVIDE(strnlen = 0x00048775); +PROVIDE(nrfx_gpiote_init_check = 0x0003ec5d); +PROVIDE(isgraph = 0x00048613); +PROVIDE(ll_scan_enable = 0x0002a0e9); +PROVIDE(z_impl_log_panic = 0x0001998d); +PROVIDE(net_buf_simple_add = 0x00046437); +PROVIDE(radio_tmr_hcto_configure_abs = 0x00037f65); PROVIDE(__aeabi_cfcmple = 0x00010df1); -PROVIDE(llcp_pdu_encode_conn_param_req = 0x0002fd55); -PROVIDE(idle = 0x00047961); -PROVIDE(llcp_rp_pu_tx_ntf = 0x0002dbb1); -PROVIDE(z_shell_history_purge = 0x00046127); -PROVIDE(cntr_cmp_set = 0x00037785); -PROVIDE(llcp_pdu_decode_conn_param_req = 0x0002fe0d); -PROVIDE(radio_is_tx_done = 0x00037ad1); -PROVIDE(hci_disconn_complete_process = 0x00025ea5); -PROVIDE(log_backend_disable = 0x00044b17); -PROVIDE(ticker_yield_abs = 0x000211c5); -PROVIDE(ull_cp_run = 0x0002e16d); -PROVIDE(lll_adv_pdu_alloc = 0x0003478d); -PROVIDE(assert_print = 0x0004459b); -PROVIDE(ll_start_enc_req_send = 0x0003188d); -PROVIDE(k_heap_aligned_alloc = 0x000477e3); -PROVIDE(z_column_span_with_buffer_offsets_get = 0x000454e9); -PROVIDE(ull_filter_adva_get = 0x00032dd1); -PROVIDE(ull_scan_done = 0x0002a4ad); -PROVIDE(usb_dc_ep_clear_stall = 0x0003aa41); -PROVIDE(llext_unload = 0x00038c11); -PROVIDE(mayfly_is_running = 0x0003870d); -PROVIDE(lll_prepare_done = 0x00033cbd); -PROVIDE(z_impl_k_timer_status_get = 0x000485e7); -PROVIDE(z_shell_log_backend_disable = 0x00045e47); -PROVIDE(llcp_pdu_decode_version_ind = 0x0002fb29); -PROVIDE(strtold = 0x000426e5); -PROVIDE(k_heap_free = 0x00047879); -PROVIDE(net_buf_simple_push_u8 = 0x000467b7); -PROVIDE(llcp_pdu_encode_enc_req = 0x0002fb49); -PROVIDE(rtc_nrf_isr = 0x0003e3e1); -PROVIDE(z_shell_op_cursor_move = 0x00045997); -PROVIDE(ticker_ticks_diff_get = 0x00021429); -PROVIDE(ull_adv_data_set = 0x00027e61); -PROVIDE(ull_adv_sync_time_get = 0x000291c9); -PROVIDE(z_timer_expiration_handler = 0x00042225); -PROVIDE(nrf_usbd_common_suspend = 0x0003b089); +PROVIDE(llcp_pdu_encode_conn_param_req = 0x0002faf9); +PROVIDE(idle = 0x0004763b); +PROVIDE(llcp_rp_pu_tx_ntf = 0x0002d955); +PROVIDE(z_shell_history_purge = 0x00045dc5); +PROVIDE(cntr_cmp_set = 0x00037509); +PROVIDE(llcp_pdu_decode_conn_param_req = 0x0002fbb1); +PROVIDE(radio_is_tx_done = 0x00037855); +PROVIDE(hci_disconn_complete_process = 0x00025d5d); +PROVIDE(log_backend_disable = 0x0004478b); +PROVIDE(ticker_yield_abs = 0x00021191); +PROVIDE(ull_cp_run = 0x0002df11); +PROVIDE(lll_adv_pdu_alloc = 0x00034511); +PROVIDE(assert_print = 0x0004420f); +PROVIDE(ll_start_enc_req_send = 0x00031631); +PROVIDE(k_heap_aligned_alloc = 0x000474bd); +PROVIDE(z_column_span_with_buffer_offsets_get = 0x0004515d); +PROVIDE(ull_filter_adva_get = 0x00032b55); +PROVIDE(ull_scan_done = 0x0002a301); +PROVIDE(usb_dc_ep_clear_stall = 0x0003a765); +PROVIDE(llext_unload = 0x00038955); +PROVIDE(mayfly_is_running = 0x00038491); +PROVIDE(lll_prepare_done = 0x00033a41); +PROVIDE(z_impl_k_timer_status_get = 0x000482b1); +PROVIDE(z_shell_log_backend_disable = 0x00045ae5); +PROVIDE(llcp_pdu_decode_version_ind = 0x0002f8cd); +PROVIDE(strtold = 0x00042359); +PROVIDE(k_heap_free = 0x00047553); +PROVIDE(net_buf_simple_push_u8 = 0x00046455); +PROVIDE(llcp_pdu_encode_enc_req = 0x0002f8ed); +PROVIDE(rtc_nrf_isr = 0x0003e105); +PROVIDE(z_shell_op_cursor_move = 0x0004560b); +PROVIDE(ticker_ticks_diff_get = 0x000213f5); +PROVIDE(ull_adv_data_set = 0x00027d19); +PROVIDE(ull_adv_sync_time_get = 0x00029039); +PROVIDE(z_timer_expiration_handler = 0x00041e99); +PROVIDE(nrf_usbd_common_suspend = 0x0003adad); PROVIDE(__floatunsidf = 0x000103d9); -PROVIDE(mpsc_pbuf_init = 0x000445b5); +PROVIDE(mpsc_pbuf_init = 0x00044229); PROVIDE(__floatundisf = 0x00010ced); -PROVIDE(__kernel_sin = 0x00018539); -PROVIDE(usb_dc_ep_check_cap = 0x0003a8c9); -PROVIDE(z_abort_timeout = 0x000484bf); +PROVIDE(__kernel_sin = 0x00018729); +PROVIDE(usb_dc_ep_check_cap = 0x0003a5ed); +PROVIDE(z_abort_timeout = 0x00048189); PROVIDE(__aeabi_f2d = 0x0001041d); -PROVIDE(radio_is_ready = 0x00037a95); -PROVIDE(ull_filter_lll_rl_idx_allowed = 0x000332e9); -PROVIDE(nrf_usbd_common_ep_stall_check = 0x0003b705); -PROVIDE(z_impl_k_reschedule = 0x00041945); -PROVIDE(nrfx_twim_init = 0x0003fdcd); -PROVIDE(radio_crc_is_valid = 0x00037b01); -PROVIDE(z_reschedule = 0x000417f1); -PROVIDE(llcp_rr_resume = 0x00031215); -PROVIDE(sys_heap_free = 0x000441d9); -PROVIDE(nrfx_twim_1_irq_handler = 0x00040229); -PROVIDE(radio_tmr_aa_save = 0x00038231); -PROVIDE(ull_adv_is_created_get = 0x00027b51); -PROVIDE(ull_scan_aux_set_get = 0x0002aab1); -PROVIDE(ull_central_chm_update = 0x00031da1); -PROVIDE(ull_rx_put_sched = 0x000228f1); -PROVIDE(z_bss_zero = 0x00040609); +PROVIDE(radio_is_ready = 0x00037819); +PROVIDE(ull_filter_lll_rl_idx_allowed = 0x0003306d); +PROVIDE(nrf_usbd_common_ep_stall_check = 0x0003b429); +PROVIDE(z_impl_k_reschedule = 0x000415b9); +PROVIDE(nrfx_twim_init = 0x0003faf1); +PROVIDE(radio_crc_is_valid = 0x00037885); +PROVIDE(z_reschedule = 0x00041465); +PROVIDE(llcp_rr_resume = 0x00030fb9); +PROVIDE(sys_heap_free = 0x00043e4d); +PROVIDE(nrfx_twim_1_irq_handler = 0x0003ff4d); +PROVIDE(radio_tmr_aa_save = 0x00037fb5); +PROVIDE(ull_adv_is_created_get = 0x00027a09); +PROVIDE(ull_scan_aux_set_get = 0x0002a905); +PROVIDE(ull_central_chm_update = 0x00031b45); +PROVIDE(ull_rx_put_sched = 0x000228bd); +PROVIDE(z_bss_zero = 0x0004032d); PROVIDE(ull_conn_update_parameters = 0x00013f81); PROVIDE(__aeabi_uidivmod = 0x00010115); -PROVIDE(__math_oflow = 0x00018ac9); -PROVIDE(ll_fal_size_get = 0x000322bd); +PROVIDE(__math_oflow = 0x00018cb9); +PROVIDE(ll_fal_size_get = 0x00032061); PROVIDE(__aeabi_d2uiz = 0x00010a7d); -PROVIDE(lll_event_offset_get = 0x00033df1); -PROVIDE(net_buf_id = 0x0001f00d); -PROVIDE(z_shell_cursor_in_empty_line = 0x000458ff); -PROVIDE(shell_get_return_value = 0x00045469); -PROVIDE(llcp_rx_node_retain = 0x0002df09); -PROVIDE(lll_conn_prepare_reset = 0x00036b69); -PROVIDE(mayfly_enable = 0x0001f719); -PROVIDE(strstr = 0x00048aef); -PROVIDE(ull_adv_sync_reset_finalize = 0x00029171); -PROVIDE(usb_get_dev_data_by_ep = 0x00044db1); -PROVIDE(ll_init = 0x00021bdd); -PROVIDE(cntr_start = 0x00037709); -PROVIDE(llcp_rr_set_incompat = 0x000311d9); -PROVIDE(llcp_pdu_encode_pause_enc_rsp = 0x0002fc31); -PROVIDE(usb_cancel_transfers = 0x0001b225); -PROVIDE(vfprintf = 0x00042d51); -PROVIDE(ull_scan_lll_handle_get = 0x0002a65d); -PROVIDE(ull_conn_ack_peek = 0x0002bcd9); -PROVIDE(nrf_usbd_common_ep_enable_check = 0x0003b179); -PROVIDE(ull_cp_data_length_update = 0x0002e43d); -PROVIDE(ull_tx_q_dequeue = 0x0002dc41); -PROVIDE(z_impl_k_sem_take = 0x00040d0d); -PROVIDE(lll_adv_data_reset = 0x00034641); +PROVIDE(lll_event_offset_get = 0x00033b75); +PROVIDE(net_buf_id = 0x0001f035); +PROVIDE(z_shell_cursor_in_empty_line = 0x00045573); +PROVIDE(shell_get_return_value = 0x000450dd); +PROVIDE(llcp_rx_node_retain = 0x0002dcad); +PROVIDE(lll_conn_prepare_reset = 0x000368ed); +PROVIDE(mayfly_enable = 0x0001f6e5); +PROVIDE(strstr = 0x000487b9); +PROVIDE(ull_adv_sync_reset_finalize = 0x00028fe1); +PROVIDE(usb_get_dev_data_by_ep = 0x00044a25); +PROVIDE(ll_init = 0x00021ba9); +PROVIDE(cntr_start = 0x0003748d); +PROVIDE(llcp_rr_set_incompat = 0x00030f7d); +PROVIDE(llcp_pdu_encode_pause_enc_rsp = 0x0002f9d5); +PROVIDE(usb_cancel_transfers = 0x0001b359); +PROVIDE(vfprintf = 0x000429c5); +PROVIDE(ull_scan_lll_handle_get = 0x0002a4b1); +PROVIDE(ull_conn_ack_peek = 0x0002bb2d); +PROVIDE(nrf_usbd_common_ep_enable_check = 0x0003ae9d); +PROVIDE(ull_cp_data_length_update = 0x0002e1e1); +PROVIDE(ull_tx_q_dequeue = 0x0002d9e5); +PROVIDE(z_impl_k_sem_take = 0x00040981); +PROVIDE(lll_adv_data_reset = 0x000343c5); PROVIDE(__aeabi_fcmpeq = 0x00010e01); -PROVIDE(llcp_lp_pu_tx_ack = 0x0002db55); +PROVIDE(llcp_lp_pu_tx_ack = 0x0002d8f9); PROVIDE(ull_scan_params_set = 0x000130a1); -PROVIDE(ll_rl_timeout_set = 0x00032939); -PROVIDE(ull_conn_ack_last_idx_get = 0x0002bccd); -PROVIDE(lll_conn_isr_tx = 0x00036d81); -PROVIDE(z_thread_is_valid = 0x0001b989); -PROVIDE(log_output_msg_process = 0x00044cad); -PROVIDE(lll_isr_rx_status_reset = 0x00033ed1); -PROVIDE(usb_write = 0x0001a7f9); -PROVIDE(llext_buf_seek = 0x00046ab3); -PROVIDE(log_set_timestamp_func = 0x000197a9); -PROVIDE(llcp_pdu_encode_min_used_chans_ind = 0x0002fa85); -PROVIDE(ull_cp_conn_param_req_neg_reply = 0x0002e625); -PROVIDE(bt_encrypt_le = 0x00033421); -PROVIDE(mayfly_is_enabled = 0x00038649); -PROVIDE(ecb_encrypt = 0x00038945); -PROVIDE(z_device_state_init = 0x000476f9); -PROVIDE(sys_heap_alloc = 0x000441f7); +PROVIDE(ll_rl_timeout_set = 0x000326dd); +PROVIDE(ull_conn_ack_last_idx_get = 0x0002bb21); +PROVIDE(lll_conn_isr_tx = 0x00036b05); +PROVIDE(z_thread_is_valid = 0x0001babd); +PROVIDE(log_output_msg_process = 0x00044921); +PROVIDE(lll_isr_rx_status_reset = 0x00033c55); +PROVIDE(usb_write = 0x0001a94d); +PROVIDE(llext_buf_seek = 0x0004678d); +PROVIDE(log_set_timestamp_func = 0x0001991d); +PROVIDE(llcp_pdu_encode_min_used_chans_ind = 0x0002f829); +PROVIDE(ull_cp_conn_param_req_neg_reply = 0x0002e3c9); +PROVIDE(bt_encrypt_le = 0x000331a5); +PROVIDE(mayfly_is_enabled = 0x000383cd); +PROVIDE(ecb_encrypt = 0x000386c9); +PROVIDE(z_device_state_init = 0x000473d3); +PROVIDE(sys_heap_alloc = 0x00043e6b); PROVIDE(__floatunsisf = 0x00010cc9); -PROVIDE(ll_tx_mem_release = 0x0002b0c5); -PROVIDE(cntr_stop = 0x00037729); -PROVIDE(arm_irq_disable = 0x0001ead5); -PROVIDE(llcp_pdu_encode_version_ind = 0x0002fad9); -PROVIDE(ll_pdu_rx_alloc_peek = 0x0002258d); -PROVIDE(lll_conn_init = 0x00036b41); -PROVIDE(z_impl_k_str_out = 0x00019469); -PROVIDE(lll_clock_ppm_get = 0x00034355); -PROVIDE(ll_rx_mem_release = 0x00022335); -PROVIDE(hci_cmd_handle = 0x00024379); -PROVIDE(lll_chan_sel_2 = 0x000320d5); -PROVIDE(llcp_lr_tx_ack = 0x0002f62d); -PROVIDE(llcp_tx_resume_data = 0x0002def1); -PROVIDE(nrfx_clock_stop = 0x0004724d); -PROVIDE(ll_rl_crpa_set = 0x00032765); -PROVIDE(z_shell_log_backend_enable = 0x00045ded); -PROVIDE(ll_rx_alloc = 0x00022529); +PROVIDE(ll_tx_mem_release = 0x0002af19); +PROVIDE(cntr_stop = 0x000374ad); +PROVIDE(arm_irq_disable = 0x0001eafd); +PROVIDE(llcp_pdu_encode_version_ind = 0x0002f87d); +PROVIDE(ll_pdu_rx_alloc_peek = 0x00022559); +PROVIDE(lll_conn_init = 0x000368c5); +PROVIDE(z_impl_k_str_out = 0x000195dd); +PROVIDE(lll_clock_ppm_get = 0x000340d9); +PROVIDE(ll_rx_mem_release = 0x00022301); +PROVIDE(hci_cmd_handle = 0x00024325); +PROVIDE(lll_chan_sel_2 = 0x00031e79); +PROVIDE(llcp_lr_tx_ack = 0x0002f3d1); +PROVIDE(llcp_tx_resume_data = 0x0002dc95); +PROVIDE(nrfx_clock_stop = 0x00046f27); +PROVIDE(ll_rl_crpa_set = 0x00032509); +PROVIDE(z_shell_log_backend_enable = 0x00045a8b); +PROVIDE(ll_rx_alloc = 0x000224f5); PROVIDE(nrf_flash_sync_check_time_limit = 0x000153b1); -PROVIDE(lll_chan_sel_1 = 0x0003203d); -PROVIDE(soc_reset_hook = 0x0003e559); -PROVIDE(z_shell_backend_rx_buffer_flush = 0x0001d72d); -PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x00044c2d); -PROVIDE(llcp_pdu_encode_unknown_rsp = 0x0002f8c9); -PROVIDE(hci_acl_encode = 0x00025ed9); -PROVIDE(lll_clock_deinit = 0x0003428d); -PROVIDE(radio_tx_ready_delay_get = 0x000379f1); -PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x00044c1b); -PROVIDE(ll_conn_get = 0x0002b081); +PROVIDE(lll_chan_sel_1 = 0x00031de1); +PROVIDE(soc_reset_hook = 0x0003e27d); +PROVIDE(z_shell_backend_rx_buffer_flush = 0x00045947); +PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x000448a1); +PROVIDE(llcp_pdu_encode_unknown_rsp = 0x0002f66d); +PROVIDE(hci_acl_encode = 0x00025d91); +PROVIDE(lll_clock_deinit = 0x00034011); +PROVIDE(radio_tx_ready_delay_get = 0x00037775); +PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x0004488f); +PROVIDE(ll_conn_get = 0x0002aed5); PROVIDE(__aeabi_dcmpeq = 0x0001099d); -PROVIDE(radio_rx_enable = 0x00037a29); -PROVIDE(ull_cp_ltk_req_neq_reply = 0x0002e4c5); -PROVIDE(ticker_stop_abs = 0x000212d1); -PROVIDE(llcp_lp_cu_rx = 0x00030c3d); -PROVIDE(z_impl_k_stack_pop = 0x00040dd9); -PROVIDE(ll_phy_get = 0x0002b5d9); -PROVIDE(llcp_lr_ispaused = 0x0002f549); -PROVIDE(llcp_pdu_encode_feature_req = 0x0002f909); +PROVIDE(radio_rx_enable = 0x000377ad); +PROVIDE(ull_cp_ltk_req_neq_reply = 0x0002e269); +PROVIDE(ticker_stop_abs = 0x0002129d); +PROVIDE(llcp_lp_cu_rx = 0x000309e1); +PROVIDE(z_impl_k_stack_pop = 0x00040a4d); +PROVIDE(ll_phy_get = 0x0002b42d); +PROVIDE(llcp_lr_ispaused = 0x0002f2ed); +PROVIDE(llcp_pdu_encode_feature_req = 0x0002f6ad); PROVIDE(ll_scan_params_set = 0x00012ff1); -PROVIDE(ull_sched_adv_aux_sync_free_anchor_get = 0x00031f49); -PROVIDE(nrf_usbd_common_setup_data_clear = 0x0003b791); -PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x00044c41); -PROVIDE(ll_adv_set_hci_handle_get = 0x0002738d); -PROVIDE(nvmc_wait = 0x0003e549); -PROVIDE(nrf_usbd_common_ep_abort = 0x0003b8fd); -PROVIDE(llext_load = 0x00038b45); -PROVIDE(__start = 0x0001e98d); -PROVIDE(ull_conn_pause_rx_data = 0x0002bee5); -PROVIDE(z_stack_space_get = 0x00047fc5); +PROVIDE(ull_sched_adv_aux_sync_free_anchor_get = 0x00031ced); +PROVIDE(nrf_usbd_common_setup_data_clear = 0x0003b4b5); +PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x000448b5); +PROVIDE(ll_adv_set_hci_handle_get = 0x00027245); +PROVIDE(nvmc_wait = 0x0003e26d); +PROVIDE(nrf_usbd_common_ep_abort = 0x0003b621); +PROVIDE(llext_load = 0x00038889); +PROVIDE(__start = 0x0001e9b5); +PROVIDE(ull_conn_pause_rx_data = 0x0002bd39); +PROVIDE(z_stack_space_get = 0x00047c9f); PROVIDE(__cmpsf2 = 0x00010d89); -PROVIDE(strchr = 0x00048a4d); -PROVIDE(llcp_rp_comm_run = 0x0002f299); -PROVIDE(llext_iterate = 0x00038aad); -PROVIDE(__stdout_hook_install = 0x0001ed11); -PROVIDE(nrfx_pwm_0_irq_handler = 0x0003f5cd); -PROVIDE(z_thread_timeout = 0x000480d5); -PROVIDE(log_core_init = 0x000197c9); -PROVIDE(lll_radio_rx_ready_delay_get = 0x00033ebd); -PROVIDE(z_shell_help_cmd_print = 0x0001d839); -PROVIDE(z_early_memcpy = 0x000477a9); -PROVIDE(lll_conn_reset = 0x00036b59); +PROVIDE(strchr = 0x00048717); +PROVIDE(llcp_rp_comm_run = 0x0002f03d); +PROVIDE(llext_iterate = 0x000387f1); +PROVIDE(__stdout_hook_install = 0x0001ed39); +PROVIDE(nrfx_pwm_0_irq_handler = 0x0003f2f1); +PROVIDE(z_thread_timeout = 0x00047daf); +PROVIDE(log_core_init = 0x0001993d); +PROVIDE(lll_radio_rx_ready_delay_get = 0x00033c41); +PROVIDE(z_shell_help_cmd_print = 0x0001d881); +PROVIDE(z_early_memcpy = 0x00047483); +PROVIDE(lll_conn_reset = 0x000368dd); PROVIDE(ull_adv_sync_evt_init = 0x00012e21); -PROVIDE(ll_priv_mode_set = 0x0003294d); -PROVIDE(shell_vfprintf = 0x000452db); -PROVIDE(arch_tls_stack_setup = 0x0001def9); -PROVIDE(z_shell_fprintf_buffer_flush = 0x00045489); -PROVIDE(llcp_rp_comm_tx_ack = 0x0002f291); -PROVIDE(z_sched_init = 0x00041909); -PROVIDE(nrf_flash_sync_get_timestamp_begin = 0x00033579); -PROVIDE(nrf_usbd_common_transfer_out_drop = 0x0003b7c1); -PROVIDE(z_nrf_clock_bt_ctlr_hf_request = 0x0003c231); -PROVIDE(ull_prepare_dequeue = 0x000229e5); +PROVIDE(ll_priv_mode_set = 0x000326f1); +PROVIDE(shell_vfprintf = 0x00044f4f); +PROVIDE(arch_tls_stack_setup = 0x0001df21); +PROVIDE(z_shell_fprintf_buffer_flush = 0x000450fd); +PROVIDE(llcp_rp_comm_tx_ack = 0x0002f035); +PROVIDE(z_sched_init = 0x0004157d); +PROVIDE(nrf_flash_sync_get_timestamp_begin = 0x000332fd); +PROVIDE(nrf_usbd_common_transfer_out_drop = 0x0003b4e5); +PROVIDE(z_nrf_clock_bt_ctlr_hf_request = 0x0003bf55); +PROVIDE(ull_prepare_dequeue = 0x000229b1); PROVIDE(__addsf3 = 0x00010b69); -PROVIDE(__shiftright128 = 0x00048d7d); -PROVIDE(bt_hci_evt_create = 0x0001f541); -PROVIDE(nrf_flash_sync_set_context = 0x00033561); -PROVIDE(z_impl_flash_flatten = 0x000462e5); -PROVIDE(llcp_lr_prt_restart = 0x0002f569); -PROVIDE(z_shell_print_cmd = 0x0001d3e1); -PROVIDE(net_buf_simple_tailroom = 0x000467e9); -PROVIDE(z_shell_vt100_colors_restore = 0x0001d49d); -PROVIDE(hci_recv_fifo_reset = 0x00023335); -PROVIDE(nrfx_gpiote_in_event_get = 0x00047373); +PROVIDE(__shiftright128 = 0x00048a47); +PROVIDE(bt_hci_evt_create = 0x0001f50d); +PROVIDE(nrf_flash_sync_set_context = 0x000332e5); +PROVIDE(z_impl_flash_flatten = 0x00045f83); +PROVIDE(llcp_lr_prt_restart = 0x0002f30d); +PROVIDE(z_shell_print_cmd = 0x0001d475); +PROVIDE(net_buf_simple_tailroom = 0x00046487); +PROVIDE(z_shell_vt100_colors_restore = 0x0001d531); +PROVIDE(hci_recv_fifo_reset = 0x00023301); +PROVIDE(nrfx_gpiote_in_event_get = 0x0004704d); PROVIDE(__aeabi_frsub = 0x00010b5d); -PROVIDE(lll_scan_isr_resume = 0x00035cad); -PROVIDE(ll_conn_acquire = 0x0002b059); -PROVIDE(nrfx_power_usbevt_uninit = 0x0003f2b9); -PROVIDE(radio_tmr_stop = 0x000381ad); -PROVIDE(nrf_usbd_common_ep_status_get = 0x00046bad); -PROVIDE(cdc_acm_dte_rate_callback_set = 0x0001b835); -PROVIDE(k_malloc = 0x0004888f); -PROVIDE(z_impl_k_poll_signal_check = 0x00048851); -PROVIDE(sys_timepoint_timeout = 0x00048555); -PROVIDE(ull_filter_lll_rl_enabled = 0x0003340d); -PROVIDE(llcp_rr_connect = 0x000315c5); -PROVIDE(lll_isr_done = 0x00033f9d); -PROVIDE(ull_cp_remote_dle_pending = 0x0002e5ed); -PROVIDE(bt_hci_cmd_complete_create = 0x0004689f); -PROVIDE(z_shell_spaces_trim = 0x000457e9); -PROVIDE(radio_disable = 0x00037a35); -PROVIDE(scalbn = 0x00043e85); -PROVIDE(bt_send = 0x0001f479); -PROVIDE(ring_buf_peek = 0x00044a3b); -PROVIDE(llcp_lr_prt_stop = 0x0002f57d); -PROVIDE(nrfx_gpiote_trigger_enable = 0x0003ef65); -PROVIDE(radio_ccm_rx_pkt_set = 0x0003827d); -PROVIDE(ticker_next_slot_get_ext = 0x00021359); -PROVIDE(z_impl_device_get_binding = 0x00040359); -PROVIDE(ll_length_max_get = 0x0002b5c1); -PROVIDE(log_backend_enable = 0x00044af5); +PROVIDE(lll_scan_isr_resume = 0x00035a31); +PROVIDE(ll_conn_acquire = 0x0002aead); +PROVIDE(nrfx_power_usbevt_uninit = 0x0003efdd); +PROVIDE(radio_tmr_stop = 0x00037f31); +PROVIDE(nrf_usbd_common_ep_status_get = 0x00046887); +PROVIDE(cdc_acm_dte_rate_callback_set = 0x0001b969); +PROVIDE(k_malloc = 0x00048559); +PROVIDE(z_impl_k_poll_signal_check = 0x0004851b); +PROVIDE(sys_timepoint_timeout = 0x0004821f); +PROVIDE(ull_filter_lll_rl_enabled = 0x00033191); +PROVIDE(llcp_rr_connect = 0x00031369); +PROVIDE(lll_isr_done = 0x00033d21); +PROVIDE(ull_cp_remote_dle_pending = 0x0002e391); +PROVIDE(bt_hci_cmd_complete_create = 0x00046579); +PROVIDE(z_shell_spaces_trim = 0x0004545d); +PROVIDE(radio_disable = 0x000377b9); +PROVIDE(scalbn = 0x00043af9); +PROVIDE(bt_send = 0x0001f445); +PROVIDE(ring_buf_peek = 0x000446af); +PROVIDE(llcp_lr_prt_stop = 0x0002f321); +PROVIDE(nrfx_gpiote_trigger_enable = 0x0003ec89); +PROVIDE(radio_ccm_rx_pkt_set = 0x00038001); +PROVIDE(ticker_next_slot_get_ext = 0x00021325); +PROVIDE(z_impl_device_get_binding = 0x0004007d); +PROVIDE(ll_length_max_get = 0x0002b415); +PROVIDE(log_backend_enable = 0x00044769); PROVIDE(__aeabi_ldiv0 = 0x00010151); -PROVIDE(ull_adv_sync_get = 0x0002918d); -PROVIDE(__dtoa_engine = 0x00043735); -PROVIDE(ull_filter_lll_lrpa_used = 0x0003308d); -PROVIDE(nrf_usbd_common_ep_stall_clear = 0x0003bad5); -PROVIDE(llcp_pdu_encode_reject_ind = 0x0002fc45); -PROVIDE(z_arm_interrupt_init = 0x0001ec8d); -PROVIDE(z_shell_get_last_command = 0x0004578d); -PROVIDE(ull_cp_rx = 0x0002e6c5); -PROVIDE(ull_update_unmark = 0x00022719); -PROVIDE(llcp_ntf_alloc_is_available = 0x0002dead); -PROVIDE(radio_tx_chain_delay_get = 0x00037a05); -PROVIDE(isalpha = 0x0004891b); -PROVIDE(bt_enable_raw = 0x0001f4a5); -PROVIDE(nrfx_clock_enable = 0x0003e89d); -PROVIDE(z_sched_wake = 0x0004818f); -PROVIDE(printf = 0x000425cd); -PROVIDE(ull_filter_lll_rl_idx = 0x000330f1); -PROVIDE(nrfx_gpiote_channel_alloc = 0x0003ef59); -PROVIDE(z_shell_cmd_trim = 0x0004584b); +PROVIDE(ull_adv_sync_get = 0x00028ffd); +PROVIDE(__dtoa_engine = 0x000433a9); +PROVIDE(ull_filter_lll_lrpa_used = 0x00032e11); +PROVIDE(nrf_usbd_common_ep_stall_clear = 0x0003b7f9); +PROVIDE(llcp_pdu_encode_reject_ind = 0x0002f9e9); +PROVIDE(z_arm_interrupt_init = 0x0001ecb5); +PROVIDE(z_shell_get_last_command = 0x00045401); +PROVIDE(ull_cp_rx = 0x0002e469); +PROVIDE(ull_update_unmark = 0x000226e5); +PROVIDE(llcp_ntf_alloc_is_available = 0x0002dc51); +PROVIDE(radio_tx_chain_delay_get = 0x00037789); +PROVIDE(isalpha = 0x000485e5); +PROVIDE(bt_enable_raw = 0x0001f471); +PROVIDE(nrfx_clock_enable = 0x0003e5c1); +PROVIDE(z_sched_wake = 0x00047e69); +PROVIDE(printf = 0x00042241); +PROVIDE(ull_filter_lll_rl_idx = 0x00032e75); +PROVIDE(nrfx_gpiote_channel_alloc = 0x0003ec7d); +PROVIDE(z_shell_cmd_trim = 0x000454bf); PROVIDE(__aeabi_uldivmod = 0x00010f31); -PROVIDE(bt_buf_get_rx = 0x0001f34d); -PROVIDE(llcp_tx_enqueue = 0x0002dec1); -PROVIDE(z_impl_k_pipe_close = 0x0004844d); -PROVIDE(usb_dc_ep_disable = 0x00046b43); -PROVIDE(fnmatch = 0x00046729); +PROVIDE(bt_buf_get_rx = 0x0001f319); +PROVIDE(llcp_tx_enqueue = 0x0002dc65); +PROVIDE(z_impl_k_pipe_close = 0x00048127); +PROVIDE(usb_dc_ep_disable = 0x0004681d); +PROVIDE(fnmatch = 0x000463c7); PROVIDE(__aeabi_drsub = 0x00010155); PROVIDE(__aeabi_d2ulz = 0x00010f61); -PROVIDE(ull_scan_is_disabled_get = 0x0002a6dd); -PROVIDE(nrf_usbd_common_disable = 0x0003b931); -PROVIDE(llcp_lr_terminate = 0x0002f865); -PROVIDE(ull_filter_rpa_update = 0x00032b29); -PROVIDE(ull_adv_pdu_update_addrs = 0x00027c6d); -PROVIDE(shell_fprintf_warn = 0x000453a3); -PROVIDE(ll_addr_get = 0x000214b1); -PROVIDE(arch_switch_to_main_thread = 0x0001ec2d); -PROVIDE(z_shell_wildcard_prepare = 0x00046263); -PROVIDE(ull_filter_lll_rl_addr_allowed = 0x00033351); -PROVIDE(z_shell_wildcard_finalize = 0x000462a5); -PROVIDE(z_impl_k_queue_alloc_append = 0x00047cdb); -PROVIDE(usb_get_device_descriptor = 0x0001ac21); -PROVIDE(nrfx_nvmc_word_write = 0x0003f229); -PROVIDE(ull_cp_encryption_start = 0x0002e29d); -PROVIDE(ull_adv_sync_chm_update = 0x00029cc5); -PROVIDE(radio_rssi_status_reset = 0x00037ee5); -PROVIDE(ull_prepare_enqueue = 0x00022921); -PROVIDE(ll_rl_remove = 0x00032601); -PROVIDE(filter_set = 0x0001998d); -PROVIDE(nrfx_clock_start = 0x0003e8cd); -PROVIDE(ull_rx_put = 0x000228c1); -PROVIDE(arm_irq_priority_set = 0x0001eb19); -PROVIDE(z_shell_pattern_remove = 0x000456e9); -PROVIDE(__double_computeInvPow5 = 0x00043d41); -PROVIDE(k_work_init = 0x00047ed1); -PROVIDE(k_timer_init = 0x00048597); -PROVIDE(ull_adv_aux_done = 0x00028dc1); -PROVIDE(ll_rl_lrpa_get = 0x000328a1); -PROVIDE(net_buf_frag_del = 0x00046779); -PROVIDE(ull_adv_aux_stop = 0x00028879); +PROVIDE(ull_scan_is_disabled_get = 0x0002a531); +PROVIDE(nrf_usbd_common_disable = 0x0003b655); +PROVIDE(llcp_lr_terminate = 0x0002f609); +PROVIDE(ull_filter_rpa_update = 0x000328cd); +PROVIDE(ull_adv_pdu_update_addrs = 0x00027b25); +PROVIDE(shell_fprintf_warn = 0x00045017); +PROVIDE(ll_addr_get = 0x0002147d); +PROVIDE(arch_switch_to_main_thread = 0x0001ec55); +PROVIDE(z_shell_wildcard_prepare = 0x00045f01); +PROVIDE(ull_filter_lll_rl_addr_allowed = 0x000330d5); +PROVIDE(z_shell_wildcard_finalize = 0x00045f43); +PROVIDE(z_impl_k_queue_alloc_append = 0x000479b5); +PROVIDE(usb_get_device_descriptor = 0x0001ad55); +PROVIDE(nrfx_nvmc_word_write = 0x0003ef4d); +PROVIDE(ull_cp_encryption_start = 0x0002e041); +PROVIDE(ull_adv_sync_chm_update = 0x00029b35); +PROVIDE(radio_rssi_status_reset = 0x00037c69); +PROVIDE(ull_prepare_enqueue = 0x000228ed); +PROVIDE(ll_rl_remove = 0x000323a5); +PROVIDE(filter_set = 0x00019b01); +PROVIDE(nrfx_clock_start = 0x0003e5f1); +PROVIDE(ull_rx_put = 0x0002288d); +PROVIDE(arm_irq_priority_set = 0x0001eb41); +PROVIDE(z_shell_pattern_remove = 0x0004535d); +PROVIDE(__double_computeInvPow5 = 0x000439b5); +PROVIDE(k_work_init = 0x00047bab); +PROVIDE(k_timer_init = 0x00048261); +PROVIDE(ull_adv_aux_done = 0x00028c31); +PROVIDE(ll_rl_lrpa_get = 0x00032645); +PROVIDE(net_buf_frag_del = 0x00046417); +PROVIDE(ull_adv_aux_stop = 0x00028731); PROVIDE(ull_adv_time_update = 0x00011da9); -PROVIDE(llext_dependency_remove_all = 0x00046a43); -PROVIDE(llext_find_sym = 0x00038ae9); +PROVIDE(llext_dependency_remove_all = 0x0004671d); +PROVIDE(llext_find_sym = 0x0003882d); PROVIDE(__aeabi_d2iz = 0x00010a2d); -PROVIDE(z_unpend_all = 0x00048119); -PROVIDE(lll_disable = 0x00033c15); -PROVIDE(ll_rx_get = 0x00021e69); -PROVIDE(z_arm_svc = 0x0001ea95); -PROVIDE(ll_adv_aux_set_clear = 0x00028269); -PROVIDE(cbvprintf_package = 0x00018d01); -PROVIDE(usb_disable = 0x0001a799); +PROVIDE(z_unpend_all = 0x00047df3); +PROVIDE(lll_disable = 0x00033999); +PROVIDE(ll_rx_get = 0x00021e35); +PROVIDE(z_arm_svc = 0x0001eabd); +PROVIDE(ll_adv_aux_set_clear = 0x00028121); +PROVIDE(cbvprintf_package = 0x00018ecd); +PROVIDE(usb_disable = 0x0001a8ed); PROVIDE(__aeabi_idiv0 = 0x00010151); -PROVIDE(ring_buf_get = 0x000449f7); -PROVIDE(ull_cp_conn_param_req_reply = 0x0002e605); -PROVIDE(z_queue_node_peek = 0x00047c15); -PROVIDE(usb_transfer_init = 0x0001b269); -PROVIDE(memq_dequeue = 0x0001f6b9); -PROVIDE(llcp_lr_complete = 0x0002f719); -PROVIDE(llcp_pdu_encode_length_rsp = 0x0002ff81); -PROVIDE(llext_lookup_symbol = 0x00039a21); -PROVIDE(mem_release = 0x0001f609); -PROVIDE(llext_buf_read = 0x00046a89); -PROVIDE(z_early_memset = 0x000477a5); -PROVIDE(ull_conn_tx_ack = 0x0002bdb9); -PROVIDE(ull_llcp_init = 0x0002e069); -PROVIDE(llcp_pdu_encode_ping_rsp = 0x0002f8b5); -PROVIDE(strncpy = 0x00048a8b); -PROVIDE(llcp_rr_complete = 0x000315bd); -PROVIDE(ull_ticker_stop_with_mark = 0x000227b9); -PROVIDE(z_shell_op_cursor_end_move = 0x00045a73); -PROVIDE(llext_bootstrap = 0x00038cbd); -PROVIDE(z_impl_k_poll_signal_raise = 0x000424dd); -PROVIDE(radio_pkt_tx_set = 0x000379e5); -PROVIDE(ull_conn_resume_rx_data = 0x0002bef5); -PROVIDE(z_thread_prio_set = 0x00041751); +PROVIDE(ring_buf_get = 0x0004466b); +PROVIDE(ull_cp_conn_param_req_reply = 0x0002e3a9); +PROVIDE(z_queue_node_peek = 0x000478ef); +PROVIDE(usb_transfer_init = 0x0001b39d); +PROVIDE(memq_dequeue = 0x0001f685); +PROVIDE(llcp_lr_complete = 0x0002f4bd); +PROVIDE(llcp_pdu_encode_length_rsp = 0x0002fd25); +PROVIDE(llext_lookup_symbol = 0x00039765); +PROVIDE(mem_release = 0x0001f5d5); +PROVIDE(llext_buf_read = 0x00046763); +PROVIDE(z_early_memset = 0x0004747f); +PROVIDE(ull_conn_tx_ack = 0x0002bc0d); +PROVIDE(ull_llcp_init = 0x0002de0d); +PROVIDE(llcp_pdu_encode_ping_rsp = 0x0002f659); +PROVIDE(strncpy = 0x00048755); +PROVIDE(llcp_rr_complete = 0x00031361); +PROVIDE(ull_ticker_stop_with_mark = 0x00022785); +PROVIDE(z_shell_op_cursor_end_move = 0x000456e7); +PROVIDE(llext_bootstrap = 0x00038a01); +PROVIDE(z_impl_k_poll_signal_raise = 0x00042151); +PROVIDE(radio_pkt_tx_set = 0x00037769); +PROVIDE(ull_conn_resume_rx_data = 0x0002bd49); +PROVIDE(z_thread_prio_set = 0x000413c5); PROVIDE(__cmpdf2 = 0x00010901); -PROVIDE(z_arm_fault = 0x0001e729); -PROVIDE(lll_csrand_isr_get = 0x00033bb5); -PROVIDE(putchar = 0x000425f1); -PROVIDE(nrfx_flag32_alloc = 0x0003e731); -PROVIDE(nrfx_power_usbevt_init = 0x0003f2d1); -PROVIDE(ull_central_reset = 0x00031c1d); -PROVIDE(usb_enable = 0x0001a9e5); -PROVIDE(sys_notify_validate = 0x000448bf); -PROVIDE(ull_disable_unmark = 0x000226dd); -PROVIDE(ull_update_mark_get = 0x00022731); -PROVIDE(ll_chm_update = 0x00031fc9); -PROVIDE(nrfx_gpiote_trigger_disable = 0x0004736f); -PROVIDE(z_log_runtime_filters_init = 0x00019919); -PROVIDE(llcp_rr_flush_procedures = 0x00031231); -PROVIDE(z_arm_exc_exit = 0x0001e311); -PROVIDE(z_impl_k_mutex_lock = 0x00040aa5); -PROVIDE(llcp_rp_enc_rx = 0x0002cc25); -PROVIDE(bt_rand = 0x0003341d); -PROVIDE(nrf_usbd_common_ep_enable = 0x0003ba65); -PROVIDE(lll_adv_sync_reset = 0x00035531); -PROVIDE(z_log_msg_commit = 0x00019891); -PROVIDE(z_prep_c = 0x0001eb49); -PROVIDE(hci_vendor_cmd_handle_common = 0x000241c5); -PROVIDE(ull_conn_ack_by_last_peek = 0x0002bd09); -PROVIDE(llcp_tx_alloc = 0x0002de95); +PROVIDE(z_arm_fault = 0x0001e751); +PROVIDE(lll_csrand_isr_get = 0x00033939); +PROVIDE(putchar = 0x00042265); +PROVIDE(nrfx_flag32_alloc = 0x0003e455); +PROVIDE(nrfx_power_usbevt_init = 0x0003eff5); +PROVIDE(ull_central_reset = 0x000319c1); +PROVIDE(usb_enable = 0x0001ab39); +PROVIDE(sys_notify_validate = 0x00044533); +PROVIDE(ull_disable_unmark = 0x000226a9); +PROVIDE(ull_update_mark_get = 0x000226fd); +PROVIDE(ll_chm_update = 0x00031d6d); +PROVIDE(nrfx_gpiote_trigger_disable = 0x00047049); +PROVIDE(z_log_runtime_filters_init = 0x00019a8d); +PROVIDE(llcp_rr_flush_procedures = 0x00030fd5); +PROVIDE(z_arm_exc_exit = 0x0001e339); +PROVIDE(z_impl_k_mutex_lock = 0x00040719); +PROVIDE(llcp_rp_enc_rx = 0x0002ca79); +PROVIDE(bt_rand = 0x000331a1); +PROVIDE(nrf_usbd_common_ep_enable = 0x0003b789); +PROVIDE(lll_adv_sync_reset = 0x000352b5); +PROVIDE(z_log_msg_commit = 0x00019a05); +PROVIDE(z_prep_c = 0x0001eb71); +PROVIDE(hci_vendor_cmd_handle_common = 0x00024191); +PROVIDE(ull_conn_ack_by_last_peek = 0x0002bb5d); +PROVIDE(llcp_tx_alloc = 0x0002dc39); PROVIDE(__aeabi_cfcmpeq = 0x00010df1); -PROVIDE(lll_isr_abort = 0x00033f79); -PROVIDE(ull_filter_rl_find = 0x00032e5d); -PROVIDE(lll_is_done = 0x00033d6d); -PROVIDE(z_impl_k_pipe_reset = 0x0004840b); -PROVIDE(i2c_nrfx_twim_common_init = 0x0003d041); -PROVIDE(net_buf_pool_get = 0x0001effd); -PROVIDE(radio_tmr_start_tick = 0x00038091); -PROVIDE(lll_adv_aux_init = 0x000353d1); -PROVIDE(k_sched_unlock = 0x000418a1); -PROVIDE(ull_filter_adv_update = 0x00032a9d); -PROVIDE(z_impl_k_sched_current_thread_query = 0x00041b25); -PROVIDE(llcp_pdu_encode_length_req = 0x0002ff51); -PROVIDE(radio_switch_complete_and_disable = 0x00037e95); -PROVIDE(z_impl_k_condvar_init = 0x00047f81); -PROVIDE(ull_adv_aux_release = 0x00028d3d); -PROVIDE(llcp_lr_peek = 0x0002f3ed); -PROVIDE(ticker_ticks_now_get = 0x00021425); -PROVIDE(ull_scan_aux_reset = 0x0002aa0d); -PROVIDE(z_impl_hwinfo_get_reset_cause = 0x00046ee5); -PROVIDE(ull_disable = 0x0002273d); -PROVIDE(nrfx_spim_2_irq_handler = 0x0003fb85); -PROVIDE(ull_conn_setup = 0x0002b8ed); -PROVIDE(ull_tx_q_init = 0x0002dbb9); -PROVIDE(k_sys_fatal_error_handler = 0x000403fd); -PROVIDE(net_buf_simple_add_mem = 0x000467a5); +PROVIDE(lll_isr_abort = 0x00033cfd); +PROVIDE(ull_filter_rl_find = 0x00032be1); +PROVIDE(lll_is_done = 0x00033af1); +PROVIDE(z_impl_k_pipe_reset = 0x000480e5); +PROVIDE(i2c_nrfx_twim_common_init = 0x0003cd65); +PROVIDE(net_buf_pool_get = 0x0001f025); +PROVIDE(radio_tmr_start_tick = 0x00037e15); +PROVIDE(lll_adv_aux_init = 0x00035155); +PROVIDE(k_sched_unlock = 0x00041515); +PROVIDE(ull_filter_adv_update = 0x00032841); +PROVIDE(z_impl_k_sched_current_thread_query = 0x00041799); +PROVIDE(llcp_pdu_encode_length_req = 0x0002fcf5); +PROVIDE(radio_switch_complete_and_disable = 0x00037c19); +PROVIDE(z_impl_k_condvar_init = 0x00047c5b); +PROVIDE(ull_adv_aux_release = 0x00028bad); +PROVIDE(llcp_lr_peek = 0x0002f191); +PROVIDE(ticker_ticks_now_get = 0x000213f1); +PROVIDE(ull_scan_aux_reset = 0x0002a861); +PROVIDE(z_impl_hwinfo_get_reset_cause = 0x00046bbf); +PROVIDE(ull_disable = 0x00022709); +PROVIDE(nrfx_spim_2_irq_handler = 0x0003f8a9); +PROVIDE(ull_conn_setup = 0x0002b741); +PROVIDE(ull_tx_q_init = 0x0002d95d); +PROVIDE(k_sys_fatal_error_handler = 0x00040121); +PROVIDE(net_buf_simple_add_mem = 0x00046443); PROVIDE(CONFIG_SOC_HAS_TIMING_FUNCTIONS = 0x00000001); -PROVIDE(ticker_is_initialized = 0x00021021); -PROVIDE(_cos = 0x00017739); -PROVIDE(nrfx_nvmc_flash_page_count_get = 0x0004738d); -PROVIDE(vprintk = 0x0004456b); -PROVIDE(z_shell_op_completion_insert = 0x00045c6b); -PROVIDE(ull_cp_encryption_pause = 0x0002e2fd); -PROVIDE(ull_adv_reset = 0x00027a55); +PROVIDE(ticker_is_initialized = 0x00020fed); +PROVIDE(_cos = 0x00017929); +PROVIDE(nrfx_nvmc_flash_page_count_get = 0x00047067); +PROVIDE(vprintk = 0x000441df); +PROVIDE(z_shell_op_completion_insert = 0x000458df); +PROVIDE(ull_cp_encryption_pause = 0x0002e0a1); +PROVIDE(ull_adv_reset = 0x0002790d); PROVIDE(__aeabi_d2f = 0x00010abd); -PROVIDE(usb_dc_ep_read_continue = 0x0003ad01); -PROVIDE(ticker_stop = 0x0002124d); -PROVIDE(radio_rssi_get = 0x00037ed9); -PROVIDE(ull_pdu_rx_alloc_peek = 0x0002285d); -PROVIDE(usb_dc_ep_write = 0x0003ab0d); -PROVIDE(floor = 0x00043f45); -PROVIDE(shell_uninit = 0x0004525d); -PROVIDE(usb_dc_attach = 0x0003a801); -PROVIDE(ll_adv_aux_set_remove = 0x000281f5); +PROVIDE(usb_dc_ep_read_continue = 0x0003aa25); +PROVIDE(ticker_stop = 0x00021219); +PROVIDE(radio_rssi_get = 0x00037c5d); +PROVIDE(ull_pdu_rx_alloc_peek = 0x00022829); +PROVIDE(usb_dc_ep_write = 0x0003a831); +PROVIDE(floor = 0x00043bb9); +PROVIDE(shell_uninit = 0x00044ed1); +PROVIDE(usb_dc_attach = 0x0003a525); +PROVIDE(ll_adv_aux_set_remove = 0x000280ad); PROVIDE(__aeabi_idivmod = 0x00010141); -PROVIDE(llcp_proc_ctx_release = 0x0002de3d); -PROVIDE(z_shell_op_cursor_home_move = 0x00045a65); -PROVIDE(nrfx_power_clock_irq_handler = 0x000473c9); -PROVIDE(z_impl_k_sem_init = 0x00047d13); -PROVIDE(ull_central_cleanup = 0x00031ca1); -PROVIDE(ull_cp_prt_reload_set = 0x0002e159); -PROVIDE(__do_init_array_aux = 0x00040829); -PROVIDE(lll_clock_init = 0x0003426d); -PROVIDE(radio_tmr_end_capture = 0x00038255); +PROVIDE(llcp_proc_ctx_release = 0x0002dbe1); +PROVIDE(z_shell_op_cursor_home_move = 0x000456d9); +PROVIDE(nrfx_power_clock_irq_handler = 0x000470a3); +PROVIDE(z_impl_k_sem_init = 0x000479ed); +PROVIDE(ull_central_cleanup = 0x00031a45); +PROVIDE(ull_cp_prt_reload_set = 0x0002defd); +PROVIDE(__do_init_array_aux = 0x0004049d); +PROVIDE(lll_clock_init = 0x00033ff1); +PROVIDE(radio_tmr_end_capture = 0x00037fd9); PROVIDE(__fixunsdfsi = 0x00010a7d); -PROVIDE(llcp_rr_prt_stop = 0x00031229); -PROVIDE(z_shell_op_word_remove = 0x0001d4dd); -PROVIDE(ull_adv_aux_offset_get = 0x00028d7d); -PROVIDE(llcp_nodes_release = 0x0002df9d); -PROVIDE(k_work_schedule_for_queue = 0x000410f1); -PROVIDE(ull_adv_aux_acquire = 0x000288f1); -PROVIDE(arch_spin_relax = 0x0004795d); -PROVIDE(z_early_rand_get = 0x00040691); -PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x000403a1); -PROVIDE(z_unpend_thread = 0x00048109); +PROVIDE(llcp_rr_prt_stop = 0x00030fcd); +PROVIDE(z_shell_op_word_remove = 0x0001d571); +PROVIDE(ull_adv_aux_offset_get = 0x00028bed); +PROVIDE(llcp_nodes_release = 0x0002dd41); +PROVIDE(k_work_schedule_for_queue = 0x00040d65); +PROVIDE(ull_adv_aux_acquire = 0x000287a9); +PROVIDE(arch_spin_relax = 0x00047637); +PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x000400c5); +PROVIDE(z_unpend_thread = 0x00047de3); PROVIDE(__aeabi_dcmpge = 0x000109d9); -PROVIDE(lll_scan_init = 0x00035c25); -PROVIDE(z_cstart = 0x00040725); -PROVIDE(ull_filter_lll_get = 0x000329e1); -PROVIDE(_StackCheckHandler = 0x0004847d); -PROVIDE(z_shell_help_request = 0x0001d879); -PROVIDE(ull_prepare_dequeue_get = 0x00022995); -PROVIDE(z_impl_z_log_msg_static_create = 0x00019b99); -PROVIDE(arm_irq_is_enabled = 0x0001eafd); -PROVIDE(thread_is_sliceable = 0x00041e21); -PROVIDE(z_log_notify_backend_enabled = 0x00044acb); +PROVIDE(lll_scan_init = 0x000359a9); +PROVIDE(z_cstart = 0x000403b5); +PROVIDE(ull_filter_lll_get = 0x00032785); +PROVIDE(z_shell_help_request = 0x0001d8c1); +PROVIDE(ull_prepare_dequeue_get = 0x00022961); +PROVIDE(z_impl_z_log_msg_static_create = 0x00019ced); +PROVIDE(arm_irq_is_enabled = 0x0001eb25); +PROVIDE(thread_is_sliceable = 0x00041a95); +PROVIDE(z_log_notify_backend_enabled = 0x0004473f); PROVIDE(ll_create_connection = 0x000147f9); -PROVIDE(lll_clock_ppm_local_get = 0x00034351); -PROVIDE(ull_scan_filter_pol_get = 0x0002a74d); -PROVIDE(llcp_rp_enc_ltk_req_reply_allowed = 0x0002cc75); -PROVIDE(arch_cpu_atomic_idle = 0x000464a9); -PROVIDE(z_impl_k_thread_stack_space_get = 0x00047fdd); +PROVIDE(lll_clock_ppm_local_get = 0x000340d5); +PROVIDE(ull_scan_filter_pol_get = 0x0002a5a1); +PROVIDE(llcp_rp_enc_ltk_req_reply_allowed = 0x0002cac9); +PROVIDE(arch_cpu_atomic_idle = 0x00046147); +PROVIDE(z_impl_k_thread_stack_space_get = 0x00047cb7); PROVIDE(atan = 0x000173f9); -PROVIDE(llext_copy_regions = 0x0004694d); -PROVIDE(bt_hci_raw_set_mode = 0x0001f491); +PROVIDE(llext_copy_regions = 0x00046627); +PROVIDE(bt_hci_raw_set_mode = 0x0001f45d); PROVIDE(__aeabi_ldivmod = 0x00010e91); -PROVIDE(z_ready_thread = 0x0004805b); -PROVIDE(ll_adv_aux_random_addr_set = 0x000281d1); -PROVIDE(llcp_lr_init = 0x0002f699); -PROVIDE(k_msgq_init = 0x00047991); -PROVIDE(nrfx_gpiote_0_irq_handler = 0x0003f015); +PROVIDE(z_ready_thread = 0x00047d35); +PROVIDE(ll_adv_aux_random_addr_set = 0x00028089); +PROVIDE(llcp_lr_init = 0x0002f43d); +PROVIDE(k_msgq_init = 0x0004766b); +PROVIDE(nrfx_gpiote_0_irq_handler = 0x0003ed39); PROVIDE(__aeabi_dmul = 0x000104cd); -PROVIDE(onoff_release = 0x00044841); -PROVIDE(strtoul = 0x00042b4d); -PROVIDE(lll_periph_prepare = 0x000374f9); -PROVIDE(hex2bin = 0x00044627); -PROVIDE(getopt_state_get = 0x0001efb9); -PROVIDE(k_fatal_halt = 0x00047771); -PROVIDE(z_log_msg_runtime_vcreate = 0x00019ac5); -PROVIDE(boot_banner = 0x00040335); -PROVIDE(nrfx_pwm_init = 0x0003f4c1); -PROVIDE(llcp_rp_cu_run = 0x00030d3d); -PROVIDE(ull_adv_sync_remove_from_acad = 0x00029a91); -PROVIDE(nrf_usbd_common_ep_transfer = 0x0003b1a1); -PROVIDE(ull_adv_sync_reset = 0x000290ed); +PROVIDE(onoff_release = 0x000444b5); +PROVIDE(strtoul = 0x000427c1); +PROVIDE(lll_periph_prepare = 0x0003727d); +PROVIDE(hex2bin = 0x0004429b); +PROVIDE(getopt_state_get = 0x0001efe1); +PROVIDE(k_fatal_halt = 0x0004744b); +PROVIDE(z_log_msg_runtime_vcreate = 0x00019c39); +PROVIDE(boot_banner = 0x00040059); +PROVIDE(nrfx_pwm_init = 0x0003f1e5); +PROVIDE(llcp_rp_cu_run = 0x00030ae1); +PROVIDE(ull_adv_sync_remove_from_acad = 0x00029901); +PROVIDE(nrf_usbd_common_ep_transfer = 0x0003aec5); +PROVIDE(ull_adv_sync_reset = 0x00028f5d); PROVIDE(__aeabi_dcmpun = 0x00010a01); -PROVIDE(llcp_pdu_decode_reject_ext_ind = 0x0002fc79); -PROVIDE(nrfx_pwm_1_irq_handler = 0x0003f5dd); -PROVIDE(z_arm_mpu_fault = 0x0001e979); -PROVIDE(z_shell_history_mode_exit = 0x000460cb); -PROVIDE(z_impl_k_uptime_ticks = 0x00048509); -PROVIDE(llcp_pdu_encode_conn_param_rsp = 0x0002fdb1); -PROVIDE(bt_rpa_irk_matches = 0x00046827); +PROVIDE(llcp_pdu_decode_reject_ext_ind = 0x0002fa1d); +PROVIDE(nrfx_pwm_1_irq_handler = 0x0003f301); +PROVIDE(z_arm_mpu_fault = 0x0001e9a1); +PROVIDE(z_shell_history_mode_exit = 0x00045d69); +PROVIDE(z_impl_k_uptime_ticks = 0x000481d3); +PROVIDE(llcp_pdu_encode_conn_param_rsp = 0x0002fb55); +PROVIDE(bt_rpa_irk_matches = 0x00046501); PROVIDE(__aeabi_dcmple = 0x000109c5); PROVIDE(__subsf3 = 0x00010b65); PROVIDE(ull_scan_enable = 0x000130f9); -PROVIDE(memq_deinit = 0x0001f681); -PROVIDE(usb_get_dev_data_by_cfg = 0x00044d7d); -PROVIDE(ll_feature_req_send = 0x0002b469); -PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x00046f47); -PROVIDE(getopt_init = 0x0001ee45); -PROVIDE(z_impl_flash_copy = 0x0004630d); -PROVIDE(ull_tx_q_resume_data = 0x0002dbd1); -PROVIDE(__cxa_pure_virtual = 0x00043ffb); -PROVIDE(ull_conn_event_counter = 0x0002bf05); -PROVIDE(mem_nz = 0x0001f661); +PROVIDE(memq_deinit = 0x0001f64d); +PROVIDE(usb_get_dev_data_by_cfg = 0x000449f1); +PROVIDE(ll_feature_req_send = 0x0002b2bd); +PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x00046c21); +PROVIDE(getopt_init = 0x0001ee6d); +PROVIDE(z_impl_flash_copy = 0x00045fab); +PROVIDE(ull_tx_q_resume_data = 0x0002d975); +PROVIDE(__cxa_pure_virtual = 0x00043c6f); +PROVIDE(ull_conn_event_counter = 0x0002bd59); +PROVIDE(mem_nz = 0x0001f62d); PROVIDE(__gesf2 = 0x00010d79); -PROVIDE(z_arm_debug_monitor = 0x0001e979); -PROVIDE(z_impl_device_init = 0x000477ad); -PROVIDE(ull_cp_chan_map_update_pending = 0x0002e419); -PROVIDE(ll_adv_sync_enable = 0x000291fd); -PROVIDE(nrfx_gpiote_global_callback_set = 0x0003ee91); -PROVIDE(ull_central_ticker_cb = 0x00031969); -PROVIDE(lll_isr_status_reset = 0x00033ee5); -PROVIDE(putchar_unlocked = 0x000425f1); -PROVIDE(llcp_lr_rx = 0x0002f585); -PROVIDE(z_thread_entry = 0x00019485); -PROVIDE(k_mem_slab_alloc = 0x0004088d); -PROVIDE(arch_printk_char_out = 0x00044567); -PROVIDE(k_aligned_alloc = 0x0004252d); -PROVIDE(z_shell_wildcard_process = 0x0001dbcd); -PROVIDE(radio_rx_ready_delay_get = 0x00037a09); -PROVIDE(llcp_pdu_decode_terminate_ind = 0x0002fad1); +PROVIDE(z_arm_debug_monitor = 0x0001e9a1); +PROVIDE(z_impl_device_init = 0x00047487); +PROVIDE(ull_cp_chan_map_update_pending = 0x0002e1bd); +PROVIDE(ll_adv_sync_enable = 0x0002906d); +PROVIDE(nrfx_gpiote_global_callback_set = 0x0003ebb5); +PROVIDE(ull_central_ticker_cb = 0x0003170d); +PROVIDE(lll_isr_status_reset = 0x00033c69); +PROVIDE(putchar_unlocked = 0x00042265); +PROVIDE(llcp_lr_rx = 0x0002f329); +PROVIDE(z_thread_entry = 0x000195f9); +PROVIDE(k_mem_slab_alloc = 0x00040501); +PROVIDE(arch_printk_char_out = 0x000441db); +PROVIDE(k_aligned_alloc = 0x000421a1); +PROVIDE(z_shell_wildcard_process = 0x0001dc15); +PROVIDE(radio_rx_ready_delay_get = 0x0003778d); +PROVIDE(llcp_pdu_decode_terminate_ind = 0x0002f875); PROVIDE(__unorddf2 = 0x00010a01); -PROVIDE(sys_heap_aligned_alloc = 0x00044249); -PROVIDE(sin = 0x00017bd9); -PROVIDE(ticker_start_us = 0x000210a5); -PROVIDE(__wrap_calloc = 0x0001ee11); -PROVIDE(z_shell_print_prompt_and_cmd = 0x0001d6fd); -PROVIDE(net_buf_simple_reserve = 0x00046791); -PROVIDE(z_impl_k_sem_give = 0x00040c99); -PROVIDE(llcp_lp_pu_run = 0x0002db4d); -PROVIDE(z_impl_k_queue_cancel_wait = 0x00047c47); -PROVIDE(nrfx_gpiote_init = 0x0003eed1); -PROVIDE(lll_adv_data_init = 0x00034621); -PROVIDE(ll_adv_params_set = 0x000273d1); -PROVIDE(ll_connect_enable = 0x00031a35); -PROVIDE(nrfx_spim_init = 0x0003f93d); -PROVIDE(lll_conn_peripheral_is_abort_cb = 0x00036bcd); -PROVIDE(llcp_rp_conn_param_req_reply = 0x00030d45); -PROVIDE(radio_filter_has_match = 0x00037f75); -PROVIDE(usb_set_config = 0x0001a9b9); -PROVIDE(z_impl_k_condvar_broadcast = 0x0004119d); -PROVIDE(ticker_update_ext = 0x000210e5); -PROVIDE(z_impl_k_condvar_wait = 0x00041211); -PROVIDE(z_impl_k_mutex_unlock = 0x00040b95); -PROVIDE(nrfx_power_init = 0x0003f245); -PROVIDE(__fpclassifyd = 0x00043e39); -PROVIDE(llcp_lp_pu_rx = 0x0002daf1); -PROVIDE(z_impl_k_msgq_alloc_init = 0x000479b9); -PROVIDE(lll_conn_pdu_tx_prep = 0x00036ec9); -PROVIDE(llcp_rp_chmu_rx = 0x00030e49); -PROVIDE(nrfx_pwm_2_irq_handler = 0x0003f5ed); +PROVIDE(sys_heap_aligned_alloc = 0x00043ebd); +PROVIDE(sin = 0x00017dc9); +PROVIDE(ticker_start_us = 0x00021071); +PROVIDE(__wrap_calloc = 0x0001ee39); +PROVIDE(z_shell_print_prompt_and_cmd = 0x0001d791); +PROVIDE(net_buf_simple_reserve = 0x0004642f); +PROVIDE(z_impl_k_sem_give = 0x0004090d); +PROVIDE(llcp_lp_pu_run = 0x0002d8f1); +PROVIDE(z_impl_k_queue_cancel_wait = 0x00047921); +PROVIDE(nrfx_gpiote_init = 0x0003ebf5); +PROVIDE(lll_adv_data_init = 0x000343a5); +PROVIDE(ll_adv_params_set = 0x00027289); +PROVIDE(ll_connect_enable = 0x000317d9); +PROVIDE(nrfx_spim_init = 0x0003f661); +PROVIDE(lll_conn_peripheral_is_abort_cb = 0x00036951); +PROVIDE(llcp_rp_conn_param_req_reply = 0x00030ae9); +PROVIDE(radio_filter_has_match = 0x00037cf9); +PROVIDE(usb_set_config = 0x0001ab0d); +PROVIDE(z_impl_k_condvar_broadcast = 0x00040e11); +PROVIDE(ticker_update_ext = 0x000210b1); +PROVIDE(z_impl_k_condvar_wait = 0x00040e85); +PROVIDE(z_impl_k_mutex_unlock = 0x00040809); +PROVIDE(nrfx_power_init = 0x0003ef69); +PROVIDE(__fpclassifyd = 0x00043aad); +PROVIDE(llcp_lp_pu_rx = 0x0002d895); +PROVIDE(z_impl_k_msgq_alloc_init = 0x00047693); +PROVIDE(lll_conn_pdu_tx_prep = 0x00036c4d); +PROVIDE(llcp_rp_chmu_rx = 0x00030bed); +PROVIDE(nrfx_pwm_2_irq_handler = 0x0003f311); PROVIDE(ull_scan_aux_setup = 0x00013369); PROVIDE(__muldf3 = 0x000104cd); -PROVIDE(k_stack_init = 0x00047d33); -PROVIDE(ull_tx_q_enqueue_data = 0x0002dc01); -PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x00046eb7); -PROVIDE(radio_ar_status_reset = 0x000384e1); -PROVIDE(ull_cp_phy_update = 0x0002e35d); +PROVIDE(k_stack_init = 0x00047a0d); +PROVIDE(ull_tx_q_enqueue_data = 0x0002d9a5); +PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x00046b91); +PROVIDE(radio_ar_status_reset = 0x00038265); +PROVIDE(ull_cp_phy_update = 0x0002e101); PROVIDE(__aeabi_cfrcmple = 0x00010de9); -PROVIDE(z_impl_device_deinit = 0x00047711); -PROVIDE(ull_scan_is_enabled_get = 0x0002a6ad); -PROVIDE(cbpprintf_external = 0x000444bb); -PROVIDE(z_impl_log_buffered_cnt = 0x00019855); -PROVIDE(net_buf_ref = 0x00046739); -PROVIDE(nrf_usbd_common_setup_stall = 0x0003b7a9); -PROVIDE(lll_reset = 0x00033c11); -PROVIDE(sw_switch = 0x00037b25); -PROVIDE(lll_central_prepare = 0x00037579); -PROVIDE(z_shell_cmd_line_erase = 0x00045ac9); -PROVIDE(shell_hexdump_line = 0x0001d0b1); -PROVIDE(k_work_submit_to_queue = 0x00047f09); -PROVIDE(_isr_wrapper = 0x0001eca5); -PROVIDE(twim_nrfx_pm_action = 0x00046fc9); -PROVIDE(z_impl_k_wakeup = 0x00041add); +PROVIDE(z_impl_device_deinit = 0x000473eb); +PROVIDE(ull_scan_is_enabled_get = 0x0002a501); +PROVIDE(cbpprintf_external = 0x0004412f); +PROVIDE(z_impl_log_buffered_cnt = 0x000199c9); +PROVIDE(net_buf_ref = 0x000463d7); +PROVIDE(nrf_usbd_common_setup_stall = 0x0003b4cd); +PROVIDE(lll_reset = 0x00033995); +PROVIDE(sw_switch = 0x000378a9); +PROVIDE(lll_central_prepare = 0x000372fd); +PROVIDE(z_shell_cmd_line_erase = 0x0004573d); +PROVIDE(shell_hexdump_line = 0x0001d145); +PROVIDE(k_work_submit_to_queue = 0x00047be3); +PROVIDE(_isr_wrapper = 0x0001eccd); +PROVIDE(twim_nrfx_pm_action = 0x00046ca3); +PROVIDE(z_impl_k_wakeup = 0x00041751); PROVIDE(__divsi3 = 0x00010125); -PROVIDE(flash_area_open = 0x00019fe9); -PROVIDE(k_work_queue_start = 0x00041075); -PROVIDE(z_shell_op_left_arrow = 0x00045a85); -PROVIDE(arch_busy_wait = 0x0001f19d); -PROVIDE(nrfx_nvmc_flash_size_get = 0x00047379); -PROVIDE(z_log_vprintk = 0x00044aaf); -PROVIDE(ull_dle_init = 0x0002c1c9); +PROVIDE(flash_area_open = 0x0001a13d); +PROVIDE(k_work_queue_start = 0x00040ce9); +PROVIDE(z_shell_op_left_arrow = 0x000456f9); +PROVIDE(arch_busy_wait = 0x0001f1c5); +PROVIDE(nrfx_nvmc_flash_size_get = 0x00047053); +PROVIDE(z_log_vprintk = 0x00044723); +PROVIDE(ull_dle_init = 0x0002c01d); PROVIDE(__aeabi_d2lz = 0x00010fd1); -PROVIDE(llcp_pdu_encode_ping_req = 0x0002f8a1); -PROVIDE(llcp_pdu_decode_min_used_chans_ind = 0x0002faa9); -PROVIDE(k_poll_event_init = 0x000487e5); -PROVIDE(z_arm_fatal_error = 0x0001dd91); -PROVIDE(lll_scan_isr_rx_check = 0x00035ce1); -PROVIDE(z_arm_hard_fault = 0x0001e979); -PROVIDE(z_impl_llext_get_fn_table = 0x00039c95); -PROVIDE(hci_vendor_read_static_addr = 0x000375f9); -PROVIDE(z_impl_k_msgq_peek_at = 0x00047a31); -PROVIDE(radio_tmr_start_get = 0x0003819d); -PROVIDE(ull_adv_aux_get = 0x00028d59); -PROVIDE(nrf_usbd_common_is_enabled = 0x0003b075); -PROVIDE(z_shell_log_backend_output_func = 0x00045dd9); -PROVIDE(z_pend_curr = 0x000416f9); -PROVIDE(usb_dc_ep_configure = 0x0003a95d); -PROVIDE(radio_switch_complete_and_tx = 0x00037e69); -PROVIDE(log_output_timestamp_freq_set = 0x00019fbd); -PROVIDE(fputc = 0x00048ef9); -PROVIDE(__fpclassifyl = 0x00043e39); -PROVIDE(cbvprintf = 0x0001ecc9); -PROVIDE(z_impl_k_is_preempt_thread = 0x0004125d); -PROVIDE(llcp_pdu_encode_phy_update_ind = 0x0002fd11); -PROVIDE(lll_abort_cb = 0x00033d91); -PROVIDE(radio_status_reset = 0x00037a61); -PROVIDE(llcp_rr_terminate = 0x00031685); +PROVIDE(llcp_pdu_encode_ping_req = 0x0002f645); +PROVIDE(llcp_pdu_decode_min_used_chans_ind = 0x0002f84d); +PROVIDE(k_poll_event_init = 0x000484af); +PROVIDE(z_arm_fatal_error = 0x0001ddb9); +PROVIDE(lll_scan_isr_rx_check = 0x00035a65); +PROVIDE(z_arm_hard_fault = 0x0001e9a1); +PROVIDE(z_impl_llext_get_fn_table = 0x000399d9); +PROVIDE(hci_vendor_read_static_addr = 0x0003737d); +PROVIDE(z_impl_k_msgq_peek_at = 0x0004770b); +PROVIDE(radio_tmr_start_get = 0x00037f21); +PROVIDE(ull_adv_aux_get = 0x00028bc9); +PROVIDE(nrf_usbd_common_is_enabled = 0x0003ad99); +PROVIDE(z_shell_log_backend_output_func = 0x00045a77); +PROVIDE(z_pend_curr = 0x0004136d); +PROVIDE(usb_dc_ep_configure = 0x0003a681); +PROVIDE(radio_switch_complete_and_tx = 0x00037bed); +PROVIDE(log_output_timestamp_freq_set = 0x0001a111); +PROVIDE(fputc = 0x00048bc3); +PROVIDE(__fpclassifyl = 0x00043aad); +PROVIDE(cbvprintf = 0x0001ecf1); +PROVIDE(z_impl_k_is_preempt_thread = 0x00040ed1); +PROVIDE(llcp_pdu_encode_phy_update_ind = 0x0002fab5); +PROVIDE(lll_abort_cb = 0x00033b15); +PROVIDE(radio_status_reset = 0x000377e5); +PROVIDE(llcp_rr_terminate = 0x00031429); PROVIDE(ull_central_setup = 0x00014c21); -PROVIDE(z_impl_k_queue_peek_tail = 0x00047d0b); -PROVIDE(lll_prepare = 0x00022bb1); -PROVIDE(hci_acl_handle = 0x00025d25); -PROVIDE(nrfx_flag32_free = 0x0003e779); -PROVIDE(radio_pkt_rx_set = 0x000379d9); -PROVIDE(ll_length_default_get = 0x0002b579); -PROVIDE(ll_apto_set = 0x0002b751); -PROVIDE(z_impl_k_thread_suspend = 0x00041609); -PROVIDE(z_impl_k_thread_join = 0x00041c75); -PROVIDE(ull_filter_lll_fal_match = 0x000329f9); -PROVIDE(z_log_dropped = 0x00019861); +PROVIDE(z_impl_k_queue_peek_tail = 0x000479e5); +PROVIDE(lll_prepare = 0x00022b7d); +PROVIDE(hci_acl_handle = 0x00025bdd); +PROVIDE(nrfx_flag32_free = 0x0003e49d); +PROVIDE(radio_pkt_rx_set = 0x0003775d); +PROVIDE(ll_length_default_get = 0x0002b3cd); +PROVIDE(ll_apto_set = 0x0002b5a5); +PROVIDE(z_impl_k_thread_suspend = 0x0004127d); +PROVIDE(z_impl_k_thread_join = 0x000418e9); +PROVIDE(ull_filter_lll_fal_match = 0x0003279d); +PROVIDE(z_log_dropped = 0x000199d5); PROVIDE(ll_adv_enable = 0x000116d1); -PROVIDE(z_impl_sys_rand_get = 0x0001f1ed); -PROVIDE(_OffsetAbsSyms = 0x00043fed); -PROVIDE(shell_strtoul = 0x0001d311); -PROVIDE(llcp_ntf_encode_length_change = 0x0002ffb1); -PROVIDE(ull_filter_scan_update = 0x00032ae1); -PROVIDE(llcp_pdu_decode_feature_rsp = 0x0002fa2d); -PROVIDE(ll_fal_clear = 0x000322c1); -PROVIDE(ull_scan_rsp_set = 0x00027f3d); -PROVIDE(usb_transfer_is_busy = 0x00044dfd); -PROVIDE(ull_filter_lll_irks_get = 0x000330dd); -PROVIDE(k_heap_init = 0x000477cd); -PROVIDE(ll_adv_cmds_is_ext = 0x00027335); -PROVIDE(lll_scan_prepare_connect_req = 0x00035e49); -PROVIDE(lll_adv_prepare = 0x00034a39); -PROVIDE(isdigit = 0x0004893d); -PROVIDE(llcp_pdu_decode_phy_req = 0x0002fcb5); -PROVIDE(hal_ticker_instance0_trigger_set = 0x0003887d); +PROVIDE(z_impl_sys_rand_get = 0x0001f215); +PROVIDE(_OffsetAbsSyms = 0x00043c61); +PROVIDE(shell_strtoul = 0x0001d3a5); +PROVIDE(llcp_ntf_encode_length_change = 0x0002fd55); +PROVIDE(ull_filter_scan_update = 0x00032885); +PROVIDE(llcp_pdu_decode_feature_rsp = 0x0002f7d1); +PROVIDE(ll_fal_clear = 0x00032065); +PROVIDE(ull_scan_rsp_set = 0x00027df5); +PROVIDE(usb_transfer_is_busy = 0x00044a71); +PROVIDE(ull_filter_lll_irks_get = 0x00032e61); +PROVIDE(k_heap_init = 0x000474a7); +PROVIDE(ll_adv_cmds_is_ext = 0x000271ed); +PROVIDE(lll_scan_prepare_connect_req = 0x00035bcd); +PROVIDE(lll_adv_prepare = 0x000347bd); +PROVIDE(isdigit = 0x00048607); +PROVIDE(llcp_pdu_decode_phy_req = 0x0002fa59); +PROVIDE(hal_ticker_instance0_trigger_set = 0x00038601); PROVIDE(__aeabi_i2d = 0x000103f9); -PROVIDE(k_sched_lock = 0x00041879); -PROVIDE(ll_connect_disable = 0x00031b15); -PROVIDE(__aeabi_memmove8 = 0x000488bd); +PROVIDE(k_sched_lock = 0x000414ed); +PROVIDE(ll_connect_disable = 0x000318b9); +PROVIDE(__aeabi_memmove8 = 0x00048587); PROVIDE(__aeabi_i2f = 0x00010cd1); -PROVIDE(sys_clock_tick_get = 0x000421f5); -PROVIDE(llcp_create_remote_procedure = 0x0002dff5); -PROVIDE(lll_adv_reset = 0x000345dd); -PROVIDE(nrfx_power_usbevt_disable = 0x000473bb); +PROVIDE(sys_clock_tick_get = 0x00041e69); +PROVIDE(llcp_create_remote_procedure = 0x0002dd99); +PROVIDE(lll_adv_reset = 0x00034361); +PROVIDE(nrfx_power_usbevt_disable = 0x00047095); PROVIDE(ull_adv_aux_start = 0x00011f11); -PROVIDE(ull_adv_filter_pol_get = 0x00027b31); -PROVIDE(sinl = 0x00017bd9); -PROVIDE(z_arm_reset = 0x0001e98d); +PROVIDE(ull_adv_filter_pol_get = 0x000279e9); +PROVIDE(sinl = 0x00017dc9); +PROVIDE(z_arm_reset = 0x0001e9b5); PROVIDE(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT = 0x00000001); -PROVIDE(z_shell_has_wildcard = 0x0004623b); -PROVIDE(radio_tmr_start_latency_get = 0x000381a9); +PROVIDE(z_shell_has_wildcard = 0x00045ed9); +PROVIDE(radio_tmr_start_latency_get = 0x00037f2d); PROVIDE(ull_filter_reset = 0x000151c1); -PROVIDE(__aeabi_memmove4 = 0x000488bd); -PROVIDE(hal_ticker_instance0_sched = 0x0003877d); -PROVIDE(radio_whiten_iv_set = 0x00037929); -PROVIDE(lll_init = 0x00033b21); -PROVIDE(shell_set_bypass = 0x0004547d); -PROVIDE(putc_unlocked = 0x00048ef9); -PROVIDE(z_impl_device_is_ready = 0x000476fb); -PROVIDE(ll_tx_mem_enqueue = 0x0002b0d1); -PROVIDE(llcp_lp_chmu_run = 0x00030d69); -PROVIDE(cbprintf_package_convert = 0x000190cd); -PROVIDE(ull_conn_rx = 0x0002b941); -PROVIDE(z_impl_flash_fill = 0x0001dcb1); -PROVIDE(ull_filter_lll_rl_addr_resolve = 0x000333c5); -PROVIDE(lll_deinit = 0x00033b81); -PROVIDE(llcp_lr_run = 0x0002f6a9); -PROVIDE(z_log_msg_finalize = 0x00044b5b); -PROVIDE(lll_isr_cleanup = 0x00033f01); -PROVIDE(z_shell_write = 0x00045b01); -PROVIDE(__kernel_cos = 0x00017d01); -PROVIDE(lll_clock_wait = 0x000342ad); -PROVIDE(z_shell_vt100_color_set = 0x0001d459); -PROVIDE(radio_pkt_empty_get = 0x00037b15); -PROVIDE(shell_prompt_change = 0x000453db); -PROVIDE(radio_tmr_tifs_base_get = 0x00038271); -PROVIDE(z_impl_k_thread_stack_alloc = 0x00048897); -PROVIDE(hci_evt_encode = 0x00025fdd); -PROVIDE(isalnum = 0x00048901); -PROVIDE(z_arm_bus_fault = 0x0001e979); -PROVIDE(mem_init = 0x0001f591); -PROVIDE(lll_radio_tx_ready_delay_get = 0x00033eb9); -PROVIDE(nrfx_twim_xfer = 0x0003fec9); -PROVIDE(llcp_pdu_decode_conn_update_ind = 0x0002fee5); -PROVIDE(log_output_process = 0x00019cdd); -PROVIDE(ll_adv_sync_ad_data_set = 0x00029721); -PROVIDE(radio_stop = 0x00037869); -PROVIDE(llcp_rx_node_release = 0x0002df51); -PROVIDE(mayfly_init = 0x0001f6d9); -PROVIDE(z_arm_fault_init = 0x0001e961); -PROVIDE(llcp_rr_pause = 0x0003120d); -PROVIDE(llcp_pdu_decode_conn_param_rsp = 0x0002fe55); -PROVIDE(ull_scan_aux_init = 0x0002a9f1); -PROVIDE(lll_scan_ext_tgta_check = 0x00035d6d); -PROVIDE(arch_elf_relocate = 0x0001df39); -PROVIDE(llext_link = 0x00039b1d); -PROVIDE(z_impl_k_yield = 0x00041999); -PROVIDE(z_impl_hwinfo_get_device_id = 0x00046ebd); +PROVIDE(__aeabi_memmove4 = 0x00048587); +PROVIDE(hal_ticker_instance0_sched = 0x00038501); +PROVIDE(radio_whiten_iv_set = 0x000376ad); +PROVIDE(lll_init = 0x000338a5); +PROVIDE(shell_set_bypass = 0x000450f1); +PROVIDE(putc_unlocked = 0x00048bc3); +PROVIDE(z_impl_device_is_ready = 0x000473d5); +PROVIDE(ll_tx_mem_enqueue = 0x0002af25); +PROVIDE(llcp_lp_chmu_run = 0x00030b0d); +PROVIDE(cbprintf_package_convert = 0x00019271); +PROVIDE(ull_conn_rx = 0x0002b795); +PROVIDE(z_impl_flash_fill = 0x0001dcf9); +PROVIDE(ull_filter_lll_rl_addr_resolve = 0x00033149); +PROVIDE(lll_deinit = 0x00033905); +PROVIDE(llcp_lr_run = 0x0002f44d); +PROVIDE(z_log_msg_finalize = 0x000447cf); +PROVIDE(lll_isr_cleanup = 0x00033c85); +PROVIDE(z_shell_write = 0x00045775); +PROVIDE(__kernel_cos = 0x00017ef1); +PROVIDE(lll_clock_wait = 0x00034031); +PROVIDE(z_shell_vt100_color_set = 0x0001d4ed); +PROVIDE(radio_pkt_empty_get = 0x00037899); +PROVIDE(shell_prompt_change = 0x0004504f); +PROVIDE(radio_tmr_tifs_base_get = 0x00037ff5); +PROVIDE(z_impl_k_thread_stack_alloc = 0x00048561); +PROVIDE(hci_evt_encode = 0x00025e95); +PROVIDE(isalnum = 0x000485cb); +PROVIDE(z_arm_bus_fault = 0x0001e9a1); +PROVIDE(mem_init = 0x0001f55d); +PROVIDE(lll_radio_tx_ready_delay_get = 0x00033c3d); +PROVIDE(nrfx_twim_xfer = 0x0003fbed); +PROVIDE(llcp_pdu_decode_conn_update_ind = 0x0002fc89); +PROVIDE(log_output_process = 0x00019e31); +PROVIDE(ll_adv_sync_ad_data_set = 0x00029591); +PROVIDE(radio_stop = 0x000375ed); +PROVIDE(llcp_rx_node_release = 0x0002dcf5); +PROVIDE(mayfly_init = 0x0001f6a5); +PROVIDE(z_arm_fault_init = 0x0001e989); +PROVIDE(llcp_rr_pause = 0x00030fb1); +PROVIDE(llcp_pdu_decode_conn_param_rsp = 0x0002fbf9); +PROVIDE(ull_scan_aux_init = 0x0002a845); +PROVIDE(lll_scan_ext_tgta_check = 0x00035af1); +PROVIDE(arch_elf_relocate = 0x0001df61); +PROVIDE(llext_link = 0x00039861); +PROVIDE(z_impl_k_yield = 0x0004160d); +PROVIDE(z_impl_hwinfo_get_device_id = 0x00046b97); PROVIDE(__unordsf2 = 0x00010e65); -PROVIDE(usb_dc_ep_read_wait = 0x0003ac41); -PROVIDE(llcp_rr_tx_ntf = 0x00031581); -PROVIDE(radio_tmr_start_us = 0x000380ed); -PROVIDE(llcp_pdu_encode_feature_rsp = 0x0002f951); -PROVIDE(ll_adv_aux_sr_data_set = 0x00028975); -PROVIDE(lll_adv_data_release = 0x00034685); -PROVIDE(llcp_lr_enqueue = 0x0002f385); -PROVIDE(z_impl_flash_get_page_info_by_idx = 0x00046d87); -PROVIDE(__aeabi_memmove = 0x000488bd); -PROVIDE(ll_timeslice_ticker_id_get = 0x00022651); -PROVIDE(ll_rl_add = 0x00032ec5); -PROVIDE(z_shell_multiline_data_calc = 0x0004551d); -PROVIDE(radio_ar_has_match = 0x00038511); -PROVIDE(k_thread_foreach_unlocked = 0x00041f7d); -PROVIDE(lll_scan_prepare = 0x00035c2d); -PROVIDE(ull_disable_mark_get = 0x000226f5); -PROVIDE(tolower = 0x000489a9); -PROVIDE(llcp_lr_prt_restart_with_value = 0x0002f575); -PROVIDE(llcp_lp_comm_tx_ack = 0x0002f269); -PROVIDE(llcp_pdu_encode_pause_enc_req = 0x0002fc1d); -PROVIDE(ll_adv_data_set = 0x00027f2d); -PROVIDE(ull_adv_aux_lll_handle_get = 0x00028865); -PROVIDE(z_impl_sys_csrand_get = 0x0001f22d); -PROVIDE(__double_computePow5 = 0x00043c59); -PROVIDE(cdc_acm_class_handle_req = 0x0001b3ed); -PROVIDE(llcp_pdu_decode_length_rsp = 0x00030035); -PROVIDE(nrf_usbd_common_epout_size_get = 0x0003b239); -PROVIDE(llcp_lp_chmu_rx = 0x00030d55); -PROVIDE(ll_length_req_send = 0x0002b4f9); -PROVIDE(ull_adv_set_get = 0x00027ab9); -PROVIDE(z_nrf_clock_control_get_onoff = 0x0003c221); -PROVIDE(z_log_get_tag = 0x00044ad5); -PROVIDE(i2c_nrfx_twim_configure = 0x0003cf59); -PROVIDE(ll_rl_size_get = 0x00032575); -PROVIDE(nrf_usbd_common_init = 0x0003b0f5); -PROVIDE(nrf_usbd_common_ep_max_packet_size_set = 0x00046ba3); -PROVIDE(ull_adv_sync_init = 0x000290d1); -PROVIDE(ll_rl_enable = 0x00032909); -PROVIDE(lll_hfclock_off = 0x00034315); -PROVIDE(ull_adv_sync_chm_complete = 0x00029b79); -PROVIDE(ll_connected_get = 0x0002b091); -PROVIDE(llcp_rp_pu_run = 0x0002dba1); -PROVIDE(mem_index_get = 0x0001f639); -PROVIDE(atof = 0x000489c1); -PROVIDE(lll_adv_pdu_alloc_pdu_adv = 0x000346c1); -PROVIDE(isupper = 0x00048981); -PROVIDE(nrf_usbd_common_enable = 0x0003aef5); -PROVIDE(z_shell_op_char_insert = 0x0001d689); -PROVIDE(k_thread_state_str = 0x0004129d); -PROVIDE(ull_dle_update_eff_rx = 0x0002c081); -PROVIDE(nrfx_twim_0_irq_handler = 0x00040219); -PROVIDE(llcp_ntf_encode_unknown_rsp = 0x0002f8ed); -PROVIDE(lll_adv_aux_prepare = 0x000353d9); -PROVIDE(move_thread_to_end_of_prio_q = 0x00041579); -PROVIDE(k_mem_slab_free = 0x000478e5); +PROVIDE(usb_dc_ep_read_wait = 0x0003a965); +PROVIDE(llcp_rr_tx_ntf = 0x00031325); +PROVIDE(radio_tmr_start_us = 0x00037e71); +PROVIDE(llcp_pdu_encode_feature_rsp = 0x0002f6f5); +PROVIDE(ll_adv_aux_sr_data_set = 0x0002882d); +PROVIDE(lll_adv_data_release = 0x00034409); +PROVIDE(llcp_lr_enqueue = 0x0002f129); +PROVIDE(z_impl_flash_get_page_info_by_idx = 0x00046a61); +PROVIDE(__aeabi_memmove = 0x00048587); +PROVIDE(ll_timeslice_ticker_id_get = 0x0002261d); +PROVIDE(ll_rl_add = 0x00032c49); +PROVIDE(z_shell_multiline_data_calc = 0x00045191); +PROVIDE(radio_ar_has_match = 0x00038295); +PROVIDE(k_thread_foreach_unlocked = 0x00041bf1); +PROVIDE(lll_scan_prepare = 0x000359b1); +PROVIDE(ull_disable_mark_get = 0x000226c1); +PROVIDE(tolower = 0x00048673); +PROVIDE(llcp_lr_prt_restart_with_value = 0x0002f319); +PROVIDE(llcp_lp_comm_tx_ack = 0x0002f00d); +PROVIDE(llcp_pdu_encode_pause_enc_req = 0x0002f9c1); +PROVIDE(ll_adv_data_set = 0x00027de5); +PROVIDE(ull_adv_aux_lll_handle_get = 0x0002871d); +PROVIDE(z_impl_sys_csrand_get = 0x0001f255); +PROVIDE(__double_computePow5 = 0x000438cd); +PROVIDE(cdc_acm_class_handle_req = 0x0001b521); +PROVIDE(llcp_pdu_decode_length_rsp = 0x0002fdd9); +PROVIDE(nrf_usbd_common_epout_size_get = 0x0003af5d); +PROVIDE(llcp_lp_chmu_rx = 0x00030af9); +PROVIDE(ll_length_req_send = 0x0002b34d); +PROVIDE(ull_adv_set_get = 0x00027971); +PROVIDE(z_nrf_clock_control_get_onoff = 0x0003bf45); +PROVIDE(z_log_get_tag = 0x00044749); +PROVIDE(i2c_nrfx_twim_configure = 0x0003cc7d); +PROVIDE(ll_rl_size_get = 0x00032319); +PROVIDE(nrf_usbd_common_init = 0x0003ae19); +PROVIDE(nrf_usbd_common_ep_max_packet_size_set = 0x0004687d); +PROVIDE(ull_adv_sync_init = 0x00028f41); +PROVIDE(ll_rl_enable = 0x000326ad); +PROVIDE(lll_hfclock_off = 0x00034099); +PROVIDE(ull_adv_sync_chm_complete = 0x000299e9); +PROVIDE(ll_connected_get = 0x0002aee5); +PROVIDE(llcp_rp_pu_run = 0x0002d945); +PROVIDE(mem_index_get = 0x0001f605); +PROVIDE(atof = 0x0004868b); +PROVIDE(lll_adv_pdu_alloc_pdu_adv = 0x00034445); +PROVIDE(isupper = 0x0004864b); +PROVIDE(nrf_usbd_common_enable = 0x0003ac19); +PROVIDE(z_shell_op_char_insert = 0x0001d71d); +PROVIDE(k_thread_state_str = 0x00040f11); +PROVIDE(ull_dle_update_eff_rx = 0x0002bed5); +PROVIDE(nrfx_twim_0_irq_handler = 0x0003ff3d); +PROVIDE(llcp_ntf_encode_unknown_rsp = 0x0002f691); +PROVIDE(lll_adv_aux_prepare = 0x0003515d); +PROVIDE(move_thread_to_end_of_prio_q = 0x000411ed); +PROVIDE(k_mem_slab_free = 0x000475bf); PROVIDE(__udivmoddi4 = 0x00010fff); PROVIDE(__aeabi_fcmpge = 0x00010e3d); -PROVIDE(llcp_ntf_encode_enc_req = 0x0002fb95); -PROVIDE(util_aa_le32 = 0x0001f9dd); -PROVIDE(radio_pkt_scratch_get = 0x00037b1d); -PROVIDE(__ceil_log2pow5 = 0x00043c09); -PROVIDE(getopt = 0x0001ee8d); -PROVIDE(ull_cp_conn_update = 0x0002e4f5); -PROVIDE(z_handle_obj_poll_events = 0x00048803); -PROVIDE(lll_adv_data_dequeue = 0x0003464d); -PROVIDE(z_impl_k_thread_name_copy = 0x00047f9f); -PROVIDE(__wrap_free = 0x0001edf5); -PROVIDE(z_shell_cmd_get = 0x0001d29d); -PROVIDE(toupper = 0x000489b5); +PROVIDE(llcp_ntf_encode_enc_req = 0x0002f939); +PROVIDE(util_aa_le32 = 0x0001f9a9); +PROVIDE(radio_pkt_scratch_get = 0x000378a1); +PROVIDE(__ceil_log2pow5 = 0x0004387d); +PROVIDE(getopt = 0x0001eeb5); +PROVIDE(ull_cp_conn_update = 0x0002e299); +PROVIDE(z_handle_obj_poll_events = 0x000484cd); +PROVIDE(lll_adv_data_dequeue = 0x000343d1); +PROVIDE(z_impl_k_thread_name_copy = 0x00047c79); +PROVIDE(__wrap_free = 0x0001ee1d); +PROVIDE(z_shell_cmd_get = 0x0001d331); +PROVIDE(toupper = 0x0004867f); PROVIDE(__udivsi3 = 0x00010101); -PROVIDE(__rem_pio2 = 0x000177e1); -PROVIDE(shell_start = 0x0004526d); -PROVIDE(llcp_lp_comm_rx = 0x0002f271); -PROVIDE(llext_read_symbol = 0x00046a61); -PROVIDE(llext_copy_strings = 0x00046929); -PROVIDE(z_shell_find_cmd = 0x00045737); -PROVIDE(lll_conn_isr_rx = 0x00036f99); -PROVIDE(llcp_ntf_encode_version_ind = 0x0002fafd); -PROVIDE(nrfx_spim_uninit = 0x0003f9a5); -PROVIDE(z_shell_op_cond_next_line = 0x0004592f); +PROVIDE(__rem_pio2 = 0x000179d1); +PROVIDE(shell_start = 0x00044ee1); +PROVIDE(llcp_lp_comm_rx = 0x0002f015); +PROVIDE(llext_read_symbol = 0x0004673b); +PROVIDE(llext_copy_strings = 0x00046603); +PROVIDE(z_shell_find_cmd = 0x000453ab); +PROVIDE(lll_conn_isr_rx = 0x00036d1d); +PROVIDE(llcp_ntf_encode_version_ind = 0x0002f8a1); +PROVIDE(nrfx_spim_uninit = 0x0003f6c9); +PROVIDE(z_shell_op_cond_next_line = 0x000455a3); PROVIDE(CONFIG_ARCH_HAS_TIMING_FUNCTIONS = 0x00000001); -PROVIDE(ull_pdu_data_init = 0x0002bee1); -PROVIDE(z_shell_op_char_backspace = 0x00045cad); +PROVIDE(ull_pdu_data_init = 0x0002bd35); +PROVIDE(z_shell_op_char_backspace = 0x00045921); PROVIDE(__subdf3 = 0x0001015d); -PROVIDE(atoi = 0x000489c7); -PROVIDE(ticker_job_sched = 0x000213f5); -PROVIDE(nrf_flash_sync_is_required = 0x00033571); +PROVIDE(atoi = 0x00048691); +PROVIDE(ticker_job_sched = 0x000213c1); +PROVIDE(nrf_flash_sync_is_required = 0x000332f5); PROVIDE(__ledf2 = 0x000108f9); -PROVIDE(k_work_cancel_delayable = 0x00047f41); -PROVIDE(floorl = 0x00043f45); -PROVIDE(llcp_pdu_encode_terminate_ind = 0x0002fab9); -PROVIDE(nrfx_twi_twim_bus_recover = 0x00040259); +PROVIDE(k_work_cancel_delayable = 0x00047c1b); +PROVIDE(floorl = 0x00043bb9); +PROVIDE(llcp_pdu_encode_terminate_ind = 0x0002f85d); +PROVIDE(nrfx_twi_twim_bus_recover = 0x0003ff7d); PROVIDE(__adddf3 = 0x00010161); -PROVIDE(arch_float_disable = 0x0001ebe5); +PROVIDE(arch_float_disable = 0x0001ec0d); PROVIDE(__divdf3 = 0x00010721); -PROVIDE(ll_rx_dequeue = 0x00021fc1); -PROVIDE(lll_scan_adva_check = 0x00035d15); +PROVIDE(ll_rx_dequeue = 0x00021f8d); +PROVIDE(lll_scan_adva_check = 0x00035a99); PROVIDE(__aeabi_idiv = 0x00010125); -PROVIDE(ull_adv_aux_time_get = 0x00028d69); -PROVIDE(ull_conn_llcp = 0x0002b9b9); -PROVIDE(ull_cp_version_exchange = 0x0002e279); -PROVIDE(radio_is_idle = 0x00037ad5); -PROVIDE(lll_conn_tx_pkt_set = 0x00036e71); -PROVIDE(cntr_init = 0x000376ed); +PROVIDE(ull_adv_aux_time_get = 0x00028bd9); +PROVIDE(ull_conn_llcp = 0x0002b80d); +PROVIDE(ull_cp_version_exchange = 0x0002e01d); +PROVIDE(radio_is_idle = 0x00037859); +PROVIDE(lll_conn_tx_pkt_set = 0x00036bf5); +PROVIDE(cntr_init = 0x00037471); PROVIDE(__aeabi_dcmplt = 0x000109b1); -PROVIDE(ll_conn_update = 0x0002b31d); -PROVIDE(radio_filter_match_get = 0x00037f89); -PROVIDE(nrf_usbd_common_last_setup_dir_get = 0x0003b7b5); -PROVIDE(usb_dc_set_address = 0x0003a8a5); -PROVIDE(ull_chan_reset = 0x00031ffd); +PROVIDE(ll_conn_update = 0x0002b171); +PROVIDE(radio_filter_match_get = 0x00037d0d); +PROVIDE(nrf_usbd_common_last_setup_dir_get = 0x0003b4d9); +PROVIDE(usb_dc_set_address = 0x0003a5c9); +PROVIDE(ull_chan_reset = 0x00031da1); PROVIDE(nrf_flash_sync_exe = 0x000152b9); -PROVIDE(radio_ccm_mic_is_valid = 0x00038419); -PROVIDE(ull_cp_tx_ntf = 0x0002e69d); -PROVIDE(llext_bringup = 0x0004691d); -PROVIDE(z_thread_abort = 0x00041b31); -PROVIDE(k_free = 0x00048881); -PROVIDE(ull_cp_release_tx = 0x0002e0d5); -PROVIDE(__kernel_tan = 0x000186a9); -PROVIDE(radio_rx_chain_delay_get = 0x00037a0d); -PROVIDE(usb_transfer = 0x0001b0ad); -PROVIDE(z_unpend1_no_timeout = 0x000480dd); -PROVIDE(z_impl_k_usleep = 0x00041aa1); -PROVIDE(radio_tmr_tifs_set = 0x00037fb5); -PROVIDE(lll_scan_aux_isr_aux_setup = 0x000365c1); +PROVIDE(radio_ccm_mic_is_valid = 0x0003819d); +PROVIDE(ull_cp_tx_ntf = 0x0002e441); +PROVIDE(llext_bringup = 0x000465f7); +PROVIDE(z_thread_abort = 0x000417a5); +PROVIDE(k_free = 0x0004854b); +PROVIDE(ull_cp_release_tx = 0x0002de79); +PROVIDE(__kernel_tan = 0x00018899); +PROVIDE(radio_rx_chain_delay_get = 0x00037791); +PROVIDE(usb_transfer = 0x0001b1e1); +PROVIDE(z_unpend1_no_timeout = 0x00047db7); +PROVIDE(z_impl_k_usleep = 0x00041715); +PROVIDE(radio_tmr_tifs_set = 0x00037d39); +PROVIDE(lll_scan_aux_isr_aux_setup = 0x00036345); PROVIDE(ull_adv_sync_time_update = 0x00012f51); -PROVIDE(mem_rcopy = 0x0001f645); +PROVIDE(mem_rcopy = 0x0001f611); PROVIDE(__aeabi_dcmpgt = 0x000109ed); -PROVIDE(ull_conn_tx_lll_enqueue = 0x0002bc19); -PROVIDE(z_impl_k_stack_push = 0x00047d6f); -PROVIDE(ll_chm_get = 0x0002b3ad); -PROVIDE(__log10Pow5 = 0x00043bf1); -PROVIDE(nrf_usbd_common_irq_handler = 0x0003b261); -PROVIDE(z_getopt_global_state_update = 0x0001ef85); -PROVIDE(arch_new_thread = 0x0001eba5); -PROVIDE(puts = 0x000425fd); -PROVIDE(z_add_timeout = 0x00042059); -PROVIDE(i2c_nrfx_twim_recover_bus = 0x0003cf19); -PROVIDE(z_impl_flash_get_page_info_by_offs = 0x00046d7f); -PROVIDE(ll_rl_crpa_get = 0x0003282d); -PROVIDE(z_impl_k_float_disable = 0x00047955); -PROVIDE(z_impl_k_pipe_read = 0x00041d19); -PROVIDE(llext_free_inspection_data = 0x00038e89); -PROVIDE(k_work_schedule = 0x00041145); -PROVIDE(ull_adv_aux_init = 0x00028279); -PROVIDE(__log10Pow2 = 0x00043be5); -PROVIDE(ll_addr_read = 0x000214d1); -PROVIDE(ull_scan_init = 0x0002a145); -PROVIDE(ll_rl_id_addr_get = 0x000324dd); -PROVIDE(shell_fprintf_error = 0x000453bf); -PROVIDE(k_thread_system_pool_assign = 0x0004253d); -PROVIDE(ldexp = 0x00043e85); -PROVIDE(ll_adv_disable_all = 0x00027a49); -PROVIDE(ull_conn_init = 0x0002b7bd); -PROVIDE(ull_dle_local_tx_update = 0x0002c175); -PROVIDE(ull_scan_is_valid_get = 0x0002a679); -PROVIDE(isspace = 0x0004896d); -PROVIDE(nrfx_isr = 0x00047247); -PROVIDE(llcp_rp_enc_run = 0x0002cc85); -PROVIDE(ull_ticker_status_give = 0x000215c9); -PROVIDE(ll_set_min_used_chans = 0x000318b1); -PROVIDE(z_impl_k_condvar_signal = 0x00041151); -PROVIDE(ull_cp_remote_cpr_pending = 0x0002e649); -PROVIDE(radio_filter_status_reset = 0x00037f61); +PROVIDE(ull_conn_tx_lll_enqueue = 0x0002ba6d); +PROVIDE(z_impl_k_stack_push = 0x00047a49); +PROVIDE(ll_chm_get = 0x0002b201); +PROVIDE(__log10Pow5 = 0x00043865); +PROVIDE(nrf_usbd_common_irq_handler = 0x0003af85); +PROVIDE(z_getopt_global_state_update = 0x0001efad); +PROVIDE(arch_new_thread = 0x0001ebcd); +PROVIDE(puts = 0x00042271); +PROVIDE(z_add_timeout = 0x00041ccd); +PROVIDE(i2c_nrfx_twim_recover_bus = 0x0003cc3d); +PROVIDE(z_impl_flash_get_page_info_by_offs = 0x00046a59); +PROVIDE(ll_rl_crpa_get = 0x000325d1); +PROVIDE(z_impl_k_float_disable = 0x0004762f); +PROVIDE(z_impl_k_pipe_read = 0x0004198d); +PROVIDE(llext_free_inspection_data = 0x00038bcd); +PROVIDE(k_work_schedule = 0x00040db9); +PROVIDE(ull_adv_aux_init = 0x00028131); +PROVIDE(__log10Pow2 = 0x00043859); +PROVIDE(ll_addr_read = 0x0002149d); +PROVIDE(ull_scan_init = 0x00029f99); +PROVIDE(ll_rl_id_addr_get = 0x00032281); +PROVIDE(shell_fprintf_error = 0x00045033); +PROVIDE(k_thread_system_pool_assign = 0x000421b1); +PROVIDE(ldexp = 0x00043af9); +PROVIDE(ll_adv_disable_all = 0x00027901); +PROVIDE(ull_conn_init = 0x0002b611); +PROVIDE(ull_dle_local_tx_update = 0x0002bfc9); +PROVIDE(ull_scan_is_valid_get = 0x0002a4cd); +PROVIDE(isspace = 0x00048637); +PROVIDE(nrfx_isr = 0x00046f21); +PROVIDE(llcp_rp_enc_run = 0x0002cad9); +PROVIDE(ull_ticker_status_give = 0x00021595); +PROVIDE(ll_set_min_used_chans = 0x00031655); +PROVIDE(z_impl_k_condvar_signal = 0x00040dc5); +PROVIDE(ull_cp_remote_cpr_pending = 0x0002e3ed); +PROVIDE(radio_filter_status_reset = 0x00037ce5); PROVIDE(__floatsidf = 0x000103f9); -PROVIDE(z_init_thread_base = 0x00047fb1); -PROVIDE(llcp_lp_enc_rx = 0x0002cbd1); -PROVIDE(ull_cp_ltk_req_reply = 0x0002e479); -PROVIDE(ull_scan_reset = 0x0002a261); -PROVIDE(z_impl_k_msgq_peek = 0x000479ff); -PROVIDE(z_impl_flash_get_page_count = 0x00046d91); -PROVIDE(net_buf_simple_pull_mem = 0x000467d9); -PROVIDE(__math_uflow = 0x00018aa9); -PROVIDE(shell_fprintf_normal = 0x00045387); -PROVIDE(z_sched_wait = 0x00041cf5); -PROVIDE(mayfly_run = 0x0001f841); -PROVIDE(mayfly_enable_cb = 0x00038609); -PROVIDE(z_reschedule_irqlock = 0x00041851); -PROVIDE(ull_conn_tx_demux = 0x0002ba21); -PROVIDE(ull_disable_mark = 0x000226c5); -PROVIDE(radio_ar_resolve = 0x00038579); -PROVIDE(ticker_init = 0x00020fbd); -PROVIDE(lll_rand_get = 0x00033bd9); -PROVIDE(atol = 0x000489cf); -PROVIDE(ull_tx_q_enqueue_ctrl = 0x0002dc29); -PROVIDE(z_impl_k_busy_wait = 0x000476f1); -PROVIDE(ll_feat_get = 0x00021431); -PROVIDE(bt_hci_recv = 0x0001f2e9); -PROVIDE(usb_get_dev_data_by_iface = 0x00044d95); -PROVIDE(radio_ar_configure = 0x0003842d); -PROVIDE(llcp_pdu_decode_length_req = 0x0002ffe1); -PROVIDE(llcp_lp_pu_tx_ntf = 0x0002db5d); -PROVIDE(ull_cp_tx_ack = 0x0002e661); -PROVIDE(ull_scan_is_enabled = 0x0002a70d); -PROVIDE(__aeabi_read_tp = 0x00048f25); -PROVIDE(usb_dc_ep_set_stall = 0x0003a9c9); -PROVIDE(lll_scan_reset = 0x00035c29); -PROVIDE(ll_tx_mem_acquire = 0x0002b0b9); -PROVIDE(__dtox_engine = 0x00048dbb); -PROVIDE(ull_dle_update_eff = 0x0002bf81); -PROVIDE(k_heap_alloc = 0x00047865); -PROVIDE(z_impl_zephyr_fputc = 0x0001ed01); -PROVIDE(ull_adv_reset_finalize = 0x00027a71); -PROVIDE(lll_isr_tx_status_reset = 0x00033ec1); -PROVIDE(llext_teardown = 0x00046923); -PROVIDE(putc = 0x00048ef9); -PROVIDE(ull_cp_chan_map_update = 0x0002e3e1); +PROVIDE(z_init_thread_base = 0x00047c8b); +PROVIDE(llcp_lp_enc_rx = 0x0002ca25); +PROVIDE(ull_cp_ltk_req_reply = 0x0002e21d); +PROVIDE(ull_scan_reset = 0x0002a0b5); +PROVIDE(z_impl_k_msgq_peek = 0x000476d9); +PROVIDE(z_impl_flash_get_page_count = 0x00046a6b); +PROVIDE(net_buf_simple_pull_mem = 0x00046477); +PROVIDE(__math_uflow = 0x00018c99); +PROVIDE(shell_fprintf_normal = 0x00044ffb); +PROVIDE(z_sched_wait = 0x00041969); +PROVIDE(mayfly_run = 0x0001f80d); +PROVIDE(mayfly_enable_cb = 0x0003838d); +PROVIDE(z_reschedule_irqlock = 0x000414c5); +PROVIDE(ull_conn_tx_demux = 0x0002b875); +PROVIDE(ull_disable_mark = 0x00022691); +PROVIDE(radio_ar_resolve = 0x000382fd); +PROVIDE(ticker_init = 0x00020f89); +PROVIDE(lll_rand_get = 0x0003395d); +PROVIDE(atol = 0x00048699); +PROVIDE(ull_tx_q_enqueue_ctrl = 0x0002d9cd); +PROVIDE(z_impl_k_busy_wait = 0x000473cb); +PROVIDE(ll_feat_get = 0x000213fd); +PROVIDE(bt_hci_recv = 0x0001f2b5); +PROVIDE(usb_get_dev_data_by_iface = 0x00044a09); +PROVIDE(radio_ar_configure = 0x000381b1); +PROVIDE(llcp_pdu_decode_length_req = 0x0002fd85); +PROVIDE(llcp_lp_pu_tx_ntf = 0x0002d901); +PROVIDE(ull_cp_tx_ack = 0x0002e405); +PROVIDE(ull_scan_is_enabled = 0x0002a561); +PROVIDE(__aeabi_read_tp = 0x00048bed); +PROVIDE(usb_dc_ep_set_stall = 0x0003a6ed); +PROVIDE(lll_scan_reset = 0x000359ad); +PROVIDE(ll_tx_mem_acquire = 0x0002af0d); +PROVIDE(atan2 = 0x00017739); +PROVIDE(__dtox_engine = 0x00048a85); +PROVIDE(ull_dle_update_eff = 0x0002bdd5); +PROVIDE(k_heap_alloc = 0x0004753f); +PROVIDE(z_impl_zephyr_fputc = 0x0001ed29); +PROVIDE(ull_adv_reset_finalize = 0x00027929); +PROVIDE(lll_isr_tx_status_reset = 0x00033c45); +PROVIDE(llext_teardown = 0x000465fd); +PROVIDE(putc = 0x00048bc3); +PROVIDE(ull_cp_chan_map_update = 0x0002e185); PROVIDE(ull_adv_aux_evt_init = 0x00011e81); -PROVIDE(sprintf = 0x00042695); -PROVIDE(z_device_get_all_static = 0x00040341); -PROVIDE(radio_reset = 0x00037839); -PROVIDE(sys_clock_tick_get_32 = 0x00048501); -PROVIDE(z_impl_k_poll_signal_reset = 0x0004884b); -PROVIDE(z_impl_k_thread_resume = 0x00041815); -PROVIDE(bt_buf_get_tx = 0x0001f3b1); -PROVIDE(arch_float_enable = 0x0004647b); -PROVIDE(z_arm_nmi = 0x00046425); -PROVIDE(k_work_init_delayable = 0x00047f29); -PROVIDE(memq_enqueue = 0x0001f695); -PROVIDE(ll_phy_default_set = 0x0002b61d); -PROVIDE(__log2pow5 = 0x00043bfd); -PROVIDE(llcp_rp_pu_rx = 0x0002db65); -PROVIDE(ull_rx_sched = 0x000228e1); -PROVIDE(log_source_name_get = 0x000198fd); -PROVIDE(memq_init = 0x0001f679); -PROVIDE(ring_buf_area_finish = 0x00044985); -PROVIDE(memcpy = 0x000488a1); -PROVIDE(lll_adv_sync_init = 0x0003552d); +PROVIDE(sprintf = 0x00042309); +PROVIDE(z_device_get_all_static = 0x00040065); +PROVIDE(radio_reset = 0x000375bd); +PROVIDE(sys_clock_tick_get_32 = 0x000481cb); +PROVIDE(z_impl_k_poll_signal_reset = 0x00048515); +PROVIDE(z_impl_k_thread_resume = 0x00041489); +PROVIDE(bt_buf_get_tx = 0x0001f37d); +PROVIDE(arch_float_enable = 0x00046119); +PROVIDE(z_arm_nmi = 0x000460c3); +PROVIDE(k_work_init_delayable = 0x00047c03); +PROVIDE(memq_enqueue = 0x0001f661); +PROVIDE(ll_phy_default_set = 0x0002b471); +PROVIDE(__log2pow5 = 0x00043871); +PROVIDE(llcp_rp_pu_rx = 0x0002d909); +PROVIDE(ull_rx_sched = 0x000228ad); +PROVIDE(log_source_name_get = 0x00019a71); +PROVIDE(memq_init = 0x0001f645); +PROVIDE(ring_buf_area_finish = 0x000445f9); +PROVIDE(memcpy = 0x0004856b); +PROVIDE(lll_adv_sync_init = 0x000352b1); PROVIDE(__nedf2 = 0x00010901); -PROVIDE(lll_is_abort_cb = 0x00033d89); -PROVIDE(z_shell_op_char_delete = 0x00045c6f); -PROVIDE(radio_rssi_measure = 0x00037ec5); -PROVIDE(ll_reset = 0x00021ce9); -PROVIDE(z_shell_op_cursor_position_synchronize = 0x0004594d); -PROVIDE(z_fatal_error = 0x0004042d); -PROVIDE(llext_free_regions = 0x00038e41); -PROVIDE(z_shell_op_right_arrow = 0x00045a97); +PROVIDE(lll_is_abort_cb = 0x00033b0d); +PROVIDE(z_shell_op_char_delete = 0x000458e3); +PROVIDE(radio_rssi_measure = 0x00037c49); +PROVIDE(ll_reset = 0x00021cb5); +PROVIDE(z_shell_op_cursor_position_synchronize = 0x000455c1); +PROVIDE(z_fatal_error = 0x00040151); +PROVIDE(llext_free_regions = 0x00038b85); +PROVIDE(z_shell_op_right_arrow = 0x0004570b); PROVIDE(__aeabi_fcmpgt = 0x00010e51); -PROVIDE(hal_ticker_instance0_caller_id_get = 0x00038715); +PROVIDE(hal_ticker_instance0_caller_id_get = 0x00038499); PROVIDE(__aeabi_l2f = 0x00010cfd); -PROVIDE(__pow5bits = 0x00043c19); -PROVIDE(ull_filter_lll_rl_irk_idx = 0x000331d5); -PROVIDE(radio_ccm_tx_pkt_set = 0x00038355); +PROVIDE(__pow5bits = 0x0004388d); +PROVIDE(ull_filter_lll_rl_irk_idx = 0x00032f59); +PROVIDE(radio_ccm_tx_pkt_set = 0x000380d9); PROVIDE(atanl = 0x000173f9); -PROVIDE(sys_timepoint_calc = 0x0004850d); -PROVIDE(z_sched_wake_thread = 0x0004809b); -PROVIDE(z_impl_k_pipe_write = 0x00048291); -PROVIDE(sys_clock_set_timeout = 0x0003e4b5); -PROVIDE(ll_rx_release = 0x00022535); -PROVIDE(strtod = 0x000426e5); +PROVIDE(sys_timepoint_calc = 0x000481d7); +PROVIDE(z_sched_wake_thread = 0x00047d75); +PROVIDE(z_impl_k_pipe_write = 0x00047f6b); +PROVIDE(sys_clock_set_timeout = 0x0003e1d9); +PROVIDE(ll_rx_release = 0x00022501); +PROVIDE(strtod = 0x00042359); PROVIDE(__aeabi_dadd = 0x00010161); -PROVIDE(llcp_rr_set_paused_cmd = 0x000311e1); -PROVIDE(ll_adv_aux_set_count_get = 0x000281f1); -PROVIDE(nrfx_clock_init = 0x0003e87d); +PROVIDE(llcp_rr_set_paused_cmd = 0x00030f85); +PROVIDE(ll_adv_aux_set_count_get = 0x000280a9); +PROVIDE(nrfx_clock_init = 0x0003e5a1); PROVIDE(__aeabi_l2d = 0x00010471); -PROVIDE(radio_tmr_aa_get = 0x00038225); +PROVIDE(radio_tmr_aa_get = 0x00037fa9); PROVIDE(strlen = 0x00010fc1); -PROVIDE(lll_scan_aux_setup = 0x00036835); -PROVIDE(net_buf_simple_pull = 0x000467c9); -PROVIDE(radio_tmr_hcto_configure = 0x000381c5); -PROVIDE(z_arm_pendsv = 0x0001ea01); -PROVIDE(mayfly_prio_is_equal = 0x0003868d); -PROVIDE(nrf_usbd_common_ep_disable = 0x0003ba05); -PROVIDE(llcp_lr_tx_ntf = 0x0002f675); -PROVIDE(llcp_rr_init = 0x000315a5); +PROVIDE(lll_scan_aux_setup = 0x000365b9); +PROVIDE(net_buf_simple_pull = 0x00046467); +PROVIDE(radio_tmr_hcto_configure = 0x00037f49); +PROVIDE(z_arm_pendsv = 0x0001ea29); +PROVIDE(mayfly_prio_is_equal = 0x00038411); +PROVIDE(nrf_usbd_common_ep_disable = 0x0003b729); +PROVIDE(llcp_lr_tx_ntf = 0x0002f419); +PROVIDE(llcp_rr_init = 0x00031349); PROVIDE(__fixunsdfdi = 0x00010f61); -PROVIDE(z_impl_k_msgq_get = 0x000409dd); -PROVIDE(hci_num_cmplt_encode = 0x00026a71); -PROVIDE(strtol = 0x00042a61); -PROVIDE(z_impl_k_thread_stack_free = 0x0004889b); -PROVIDE(ticker_job = 0x00020451); -PROVIDE(disable_bootloader_mpu = 0x00018b19); -PROVIDE(ticker_trigger = 0x00021039); -PROVIDE(lll_hfclock_on = 0x000342e5); -PROVIDE(usb_cancel_transfer = 0x0001b1e9); -PROVIDE(llext_loaded_sect_ptr = 0x000469b7); +PROVIDE(z_impl_k_msgq_get = 0x00040651); +PROVIDE(hci_num_cmplt_encode = 0x00026929); +PROVIDE(strtol = 0x000426d5); +PROVIDE(z_impl_k_thread_stack_free = 0x00048565); +PROVIDE(ticker_job = 0x0002041d); +PROVIDE(disable_bootloader_mpu = 0x00018d09); +PROVIDE(ticker_trigger = 0x00021005); +PROVIDE(lll_hfclock_on = 0x00034069); +PROVIDE(usb_cancel_transfer = 0x0001b31d); +PROVIDE(llext_loaded_sect_ptr = 0x00046691); PROVIDE(__truncdfsf2 = 0x00010abd); -PROVIDE(ll_rx_link_release = 0x0002251d); -PROVIDE(__stack_chk_fail = 0x0004847d); -PROVIDE(llcp_lr_pause = 0x0002f559); -PROVIDE(llcp_rr_new = 0x000315d5); -PROVIDE(ull_adv_sync_release = 0x000291ad); -PROVIDE(nrfx_gpiote_input_configure = 0x0003ec21); +PROVIDE(ll_rx_link_release = 0x000224e9); +PROVIDE(llcp_lr_pause = 0x0002f2fd); +PROVIDE(llcp_rr_new = 0x00031379); +PROVIDE(ull_adv_sync_release = 0x0002901d); +PROVIDE(nrfx_gpiote_input_configure = 0x0003e945); PROVIDE(__aeabi_uidiv = 0x00010101); -PROVIDE(ll_adv_cmds_set = 0x000272fd); -PROVIDE(ll_tx_pwr_get = 0x0002145d); -PROVIDE(ll_phy_req_send = 0x0002b631); -PROVIDE(ll_rx_sched = 0x00022559); -PROVIDE(usb_dc_ep_read = 0x00046b75); -PROVIDE(radio_setup = 0x000377f5); -PROVIDE(k_queue_append = 0x00047cb1); -PROVIDE(lll_conn_central_is_abort_cb = 0x00036ba1); -PROVIDE(onoff_manager_init = 0x0004476d); -PROVIDE(ull_scan_aux_lll_parent_get = 0x0002aad5); -PROVIDE(strcasecmp = 0x000489ff); -PROVIDE(z_unpend_thread_no_timeout = 0x00048079); -PROVIDE(z_impl_k_sem_reset = 0x00040d59); -PROVIDE(nrfx_busy_wait = 0x00047249); -PROVIDE(nrf_flash_sync_init = 0x0003354d); -PROVIDE(llcp_rp_cu_rx = 0x00030ced); +PROVIDE(ll_adv_cmds_set = 0x000271b5); +PROVIDE(ll_tx_pwr_get = 0x00021429); +PROVIDE(ll_phy_req_send = 0x0002b485); +PROVIDE(ll_rx_sched = 0x00022525); +PROVIDE(usb_dc_ep_read = 0x0004684f); +PROVIDE(radio_setup = 0x00037579); +PROVIDE(k_queue_append = 0x0004798b); +PROVIDE(lll_conn_central_is_abort_cb = 0x00036925); +PROVIDE(onoff_manager_init = 0x000443e1); +PROVIDE(ull_scan_aux_lll_parent_get = 0x0002a929); +PROVIDE(strcasecmp = 0x000486c9); +PROVIDE(z_unpend_thread_no_timeout = 0x00047d53); +PROVIDE(z_impl_k_sem_reset = 0x000409cd); +PROVIDE(nrfx_busy_wait = 0x00046f23); +PROVIDE(nrf_flash_sync_init = 0x000332d1); +PROVIDE(llcp_rp_cu_rx = 0x00030a91); PROVIDE(__eqdf2 = 0x00010901); -PROVIDE(mem_get = 0x0001f631); -PROVIDE(ll_version_ind_send = 0x0002b4b1); +PROVIDE(mem_get = 0x0001f5fd); +PROVIDE(ll_version_ind_send = 0x0002b305); PROVIDE(__fixdfsi = 0x00010a2d); -PROVIDE(ull_conn_lll_ack_enqueue = 0x0002bd59); -PROVIDE(util_ones_count_get = 0x0001f9b5); -PROVIDE(z_dummy_thread_init = 0x0004144d); -PROVIDE(radio_isr_set = 0x000377b5); -PROVIDE(ull_scan_aux_stop = 0x0002abf9); -PROVIDE(z_impl_k_timer_start = 0x00042305); -PROVIDE(ll_rssi_get = 0x0002b6ad); +PROVIDE(ull_conn_lll_ack_enqueue = 0x0002bbad); +PROVIDE(util_ones_count_get = 0x0001f981); +PROVIDE(z_dummy_thread_init = 0x000410c1); +PROVIDE(radio_isr_set = 0x00037539); +PROVIDE(ull_scan_aux_stop = 0x0002aa4d); +PROVIDE(z_impl_k_timer_start = 0x00041f79); +PROVIDE(ll_rssi_get = 0x0002b501); PROVIDE(__aeabi_ul2f = 0x00010ced); -PROVIDE(ll_rx_put_sched = 0x00022565); -PROVIDE(kheap_llext_heap = 0x2000aa80); +PROVIDE(ll_rx_put_sched = 0x00022531); +PROVIDE(kheap_llext_heap = 0x2000aa78); PROVIDE(kheap_llext_heap_size = 98304); -PROVIDE(kheap__system_heap = 0x200282e0); +PROVIDE(kheap__system_heap = 0x200282d8); PROVIDE(kheap__system_heap_size = 16384); -PROVIDE(__device_dts_ord_75 = 0x0000000000049020); -PROVIDE(__device_dts_ord_14 = 0x0000000000049044); -PROVIDE(__device_dts_ord_8 = 0x0000000000049068); -PROVIDE(__device_dts_ord_32 = 0x000000000004908c); -PROVIDE(__device_dts_ord_95 = 0x00000000000490b0); -PROVIDE(__device_dts_ord_30 = 0x00000000000490d4); -PROVIDE(__device_dts_ord_137 = 0x00000000000490f8); -PROVIDE(__device_dts_ord_13 = 0x000000000004911c); -PROVIDE(__device_dts_ord_120 = 0x0000000000049140); -PROVIDE(__device_dts_ord_21 = 0x0000000000049164); -PROVIDE(__device_dts_ord_18 = 0x0000000000049188); -PROVIDE(__device_dts_ord_27 = 0x00000000000491ac); -PROVIDE(__device_dts_ord_24 = 0x00000000000491d0); -PROVIDE(__device_dts_ord_65 = 0x00000000000491f4); -PROVIDE(__device_dts_ord_101 = 0x0000000000049218); +PROVIDE(__device_dts_ord_75 = 0x0000000000048ce8); +PROVIDE(__device_dts_ord_14 = 0x0000000000048d0c); +PROVIDE(__device_dts_ord_8 = 0x0000000000048d30); +PROVIDE(__device_dts_ord_32 = 0x0000000000048d54); +PROVIDE(__device_dts_ord_95 = 0x0000000000048d78); +PROVIDE(__device_dts_ord_30 = 0x0000000000048d9c); +PROVIDE(__device_dts_ord_137 = 0x0000000000048dc0); +PROVIDE(__device_dts_ord_13 = 0x0000000000048de4); +PROVIDE(__device_dts_ord_120 = 0x0000000000048e08); +PROVIDE(__device_dts_ord_21 = 0x0000000000048e2c); +PROVIDE(__device_dts_ord_18 = 0x0000000000048e50); +PROVIDE(__device_dts_ord_27 = 0x0000000000048e74); +PROVIDE(__device_dts_ord_24 = 0x0000000000048e98); +PROVIDE(__device_dts_ord_65 = 0x0000000000048ebc); +PROVIDE(__device_dts_ord_101 = 0x0000000000048ee0); PROVIDE(_sketch_start = 0xe0000 ); diff --git a/variants/arduino_nicla_sense_me_nrf52832/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h b/variants/arduino_nicla_sense_me_nrf52832/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h index 7a5b5ef9..27688149 100644 --- a/variants/arduino_nicla_sense_me_nrf52832/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h +++ b/variants/arduino_nicla_sense_me_nrf52832/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h @@ -2,7 +2,7 @@ * Generated by gen_defines.py * * DTS input file: - * /home/burellil/Work/ArduinoCore-zephyr/ArduinoCore-zephyr/build/arduino_nicla_sense_me_nrf52832/zephyr/zephyr.dts.pre + * /home/kurte/github/ArduinoCore-zephyr/build/arduino_nicla_sense_me_nrf52832/zephyr/zephyr.dts.pre * * Directories with bindings: * $ZEPHYR_BASE/dts/bindings diff --git a/variants/arduino_nicla_sense_me_nrf52832/llext-edk/include/zephyr/include/generated/zephyr/version.h b/variants/arduino_nicla_sense_me_nrf52832/llext-edk/include/zephyr/include/generated/zephyr/version.h index 9a30242a..76aa14d4 100644 --- a/variants/arduino_nicla_sense_me_nrf52832/llext-edk/include/zephyr/include/generated/zephyr/version.h +++ b/variants/arduino_nicla_sense_me_nrf52832/llext-edk/include/zephyr/include/generated/zephyr/version.h @@ -19,7 +19,7 @@ #define KERNEL_VERSION_EXTENDED_STRING "4.1.99+0" #define KERNEL_VERSION_TWEAK_STRING "4.1.99+0" -#define BUILD_VERSION v4.1.0-894-g9f06fc60e255 +#define BUILD_VERSION v4.1.0-898-g6b32f4d75066 #endif /* _KERNEL_VERSION_H_ */ diff --git a/variants/arduino_nicla_sense_me_nrf52832/provides.ld b/variants/arduino_nicla_sense_me_nrf52832/provides.ld index 38279b14..a3c186f9 100644 --- a/variants/arduino_nicla_sense_me_nrf52832/provides.ld +++ b/variants/arduino_nicla_sense_me_nrf52832/provides.ld @@ -1,1900 +1,1902 @@ PROVIDE(cmd_kernel_uptime = 0x00001281); -PROVIDE(perform_lll_reset = 0x0000e7a9); -PROVIDE(disabled_cb = 0x0000e885); -PROVIDE(tx_cmplt_get = 0x0000e889); -PROVIDE(rx_replenish = 0x0000e93d); -PROVIDE(init_reset = 0x0000ea35); -PROVIDE(rx_demux = 0x0000eb6d); -PROVIDE(ticker_stop_cb = 0x00013bf9); -PROVIDE(ticker_stop_op_cb = 0x00013e1d); -PROVIDE(ext_disabled_cb = 0x00013c85); -PROVIDE(disabled_cb = 0x00013c91); -PROVIDE(ticker_update_op_cb = 0x00013d99); -PROVIDE(ticker_stop_ext_op_cb = 0x00013e65); -PROVIDE(ticker_stop_aux_op_cb = 0x00013ead); -PROVIDE(adv_disable = 0x00013f19); -PROVIDE(aux_disabled_cb = 0x00013fa5); -PROVIDE(aux_disable = 0x00014009); +PROVIDE(perform_lll_reset = 0x0000e9a9); +PROVIDE(disabled_cb = 0x0000ea85); +PROVIDE(tx_cmplt_get = 0x0000ea89); +PROVIDE(rx_replenish = 0x0000eb3d); +PROVIDE(init_reset = 0x0000ec35); +PROVIDE(rx_demux = 0x0000ed6d); +PROVIDE(ticker_stop_cb = 0x00013df9); +PROVIDE(ticker_stop_op_cb = 0x0001401d); +PROVIDE(ext_disabled_cb = 0x00013e85); +PROVIDE(disabled_cb = 0x00013e91); +PROVIDE(ticker_update_op_cb = 0x00013f99); +PROVIDE(ticker_stop_ext_op_cb = 0x00014065); +PROVIDE(ticker_stop_aux_op_cb = 0x000140ad); +PROVIDE(adv_disable = 0x00014119); +PROVIDE(aux_disabled_cb = 0x000141a5); +PROVIDE(aux_disable = 0x00014209); PROVIDE(ticker_cb = 0x000013f9); -PROVIDE(init_reset = 0x00014059); -PROVIDE(conn_release.constprop.0 = 0x000140a9); -PROVIDE(disable = 0x00014131); -PROVIDE(adv_time_get.constprop.0 = 0x000142cd); -PROVIDE(ext_disable = 0x00014375); -PROVIDE(adv_scan_pdu_addr_update.constprop.0 = 0x00014ed5); -PROVIDE(aux_time_get = 0x00015135); -PROVIDE(aux_time_min_get = 0x000151b5); -PROVIDE(ticker_op_cb = 0x000151ed); -PROVIDE(ticker_cb = 0x000151f1); +PROVIDE(init_reset = 0x00014259); +PROVIDE(conn_release.constprop.0 = 0x000142a9); +PROVIDE(disable = 0x00014331); +PROVIDE(adv_time_get.constprop.0 = 0x000144cd); +PROVIDE(ext_disable = 0x00014575); +PROVIDE(adv_scan_pdu_addr_update.constprop.0 = 0x000150d5); +PROVIDE(aux_time_get = 0x00015335); +PROVIDE(aux_time_min_get = 0x000153b5); +PROVIDE(ticker_op_cb = 0x000153ed); +PROVIDE(ticker_cb = 0x000153f1); PROVIDE(mfy_aux_offset_get = 0x000027f1); -PROVIDE(adv_type_check = 0x00015e45); -PROVIDE(ticker_op_cb = 0x00015ec1); -PROVIDE(sync_stop = 0x00015ec5); -PROVIDE(ticker_cb = 0x00015f31); +PROVIDE(adv_type_check = 0x00016045); +PROVIDE(ticker_op_cb = 0x000160c1); +PROVIDE(sync_stop = 0x000160c5); +PROVIDE(ticker_cb = 0x00016131); PROVIDE(mfy_sync_offset_get = 0x00002ad9); -PROVIDE(ticker_cb = 0x00016dd9); -PROVIDE(ext_disabled_cb = 0x00016fa9); -PROVIDE(ticker_stop_ext_op_cb = 0x00016fb9); -PROVIDE(ext_disable = 0x00017001); -PROVIDE(disable.constprop.0 = 0x0001714d); -PROVIDE(ticker_cb = 0x00017581); -PROVIDE(flush = 0x00017615); -PROVIDE(flush_safe = 0x00017699); -PROVIDE(done_disabled_cb = 0x00017741); -PROVIDE(ticker_op_cb = 0x00017785); -PROVIDE(init_reset = 0x00017a8d); -PROVIDE(tx_lll_flush = 0x00017b01); -PROVIDE(ticker_stop_op_cb = 0x00017bed); -PROVIDE(disabled_cb = 0x00017c59); -PROVIDE(conn_disable = 0x00017c9d); -PROVIDE(conn_setup_adv_scan_disabled_cb = 0x00017d29); -PROVIDE(ticker_update_conn_op_cb = 0x00017d41); -PROVIDE(ticker_start_conn_op_cb = 0x00017d85); -PROVIDE(ticker_stop_conn_op_cb = 0x00017de5); +PROVIDE(ticker_cb = 0x00016fd9); +PROVIDE(ext_disabled_cb = 0x000171a9); +PROVIDE(ticker_stop_ext_op_cb = 0x000171b9); +PROVIDE(ext_disable = 0x00017201); +PROVIDE(disable.constprop.0 = 0x0001734d); +PROVIDE(ticker_cb = 0x00017781); +PROVIDE(flush = 0x00017815); +PROVIDE(flush_safe = 0x00017899); +PROVIDE(done_disabled_cb = 0x00017941); +PROVIDE(ticker_op_cb = 0x00017985); +PROVIDE(init_reset = 0x00017c8d); +PROVIDE(tx_lll_flush = 0x00017d01); +PROVIDE(ticker_stop_op_cb = 0x00017ded); +PROVIDE(disabled_cb = 0x00017e59); +PROVIDE(conn_disable = 0x00017e9d); +PROVIDE(conn_setup_adv_scan_disabled_cb = 0x00017f29); +PROVIDE(ticker_update_conn_op_cb = 0x00017f41); +PROVIDE(ticker_start_conn_op_cb = 0x00017f85); +PROVIDE(ticker_stop_conn_op_cb = 0x00017fe5); PROVIDE(ull_conn_update_ticker.constprop.0 = 0x00003831); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00017e45); -PROVIDE(conn_cleanup = 0x000188c9); -PROVIDE(tx_demux = 0x00018a81); -PROVIDE(ticker_update_latency_cancel_op_cb = 0x0001e29d); -PROVIDE(ticker_op_cb = 0x0001e2e9); -PROVIDE(ticker_op_stop_adv_cb = 0x0001e31d); -PROVIDE(ticker_op_stop_scan_cb = 0x0001e4d9); -PROVIDE(ticker_op_cb = 0x0001e4dd); -PROVIDE(ticker_op_cb = 0x0001e8c1); -PROVIDE(ticker_match_any_op_cb = 0x0001e8c5); -PROVIDE(ticker_match_cen_op_cb = 0x0001e8dd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00018045); +PROVIDE(conn_cleanup = 0x00018ac9); +PROVIDE(tx_demux = 0x00018c81); +PROVIDE(ticker_update_latency_cancel_op_cb = 0x0001e49d); +PROVIDE(ticker_op_cb = 0x0001e4e9); +PROVIDE(ticker_op_stop_adv_cb = 0x0001e51d); +PROVIDE(ticker_op_stop_scan_cb = 0x0001e6d9); +PROVIDE(ticker_op_cb = 0x0001e6dd); +PROVIDE(ticker_op_cb = 0x0001eac1); +PROVIDE(ticker_match_any_op_cb = 0x0001eac5); +PROVIDE(ticker_match_cen_op_cb = 0x0001eadd); PROVIDE(ull_hdr_get_cb = 0x00004c71); -PROVIDE(after_match_slot_get.constprop.0 = 0x0001e8e9); -PROVIDE(time_slot_callback_work = 0x0001ffd5); -PROVIDE(ticker_stop_prepare_cb = 0x00020019); -PROVIDE(ticker_stop_work_cb = 0x000200e9); -PROVIDE(time_slot_delay = 0x0002004d); -PROVIDE(time_slot_callback_prepare = 0x000200b9); -PROVIDE(time_slot_callback_abort = 0x000200c9); -PROVIDE(isr_abort = 0x00020f09); -PROVIDE(isr_tx = 0x00020f21); -PROVIDE(isr_rx = 0x000217f5); -PROVIDE(is_abort_cb = 0x0002101d); -PROVIDE(resume_prepare_cb = 0x00021515); -PROVIDE(isr_abort_all = 0x0002108d); -PROVIDE(abort_cb = 0x000210e1); -PROVIDE(chan_prepare = 0x000213e5); -PROVIDE(isr_done = 0x0002153d); +PROVIDE(after_match_slot_get.constprop.0 = 0x0001eae9); +PROVIDE(time_slot_callback_work = 0x000201d5); +PROVIDE(ticker_stop_prepare_cb = 0x00020219); +PROVIDE(ticker_stop_work_cb = 0x000202e9); +PROVIDE(time_slot_delay = 0x0002024d); +PROVIDE(time_slot_callback_prepare = 0x000202b9); +PROVIDE(time_slot_callback_abort = 0x000202c9); +PROVIDE(isr_abort = 0x00021109); +PROVIDE(isr_tx = 0x00021121); +PROVIDE(isr_rx = 0x000219f5); +PROVIDE(is_abort_cb = 0x0002121d); +PROVIDE(resume_prepare_cb = 0x00021715); +PROVIDE(isr_abort_all = 0x0002128d); +PROVIDE(abort_cb = 0x000212e1); +PROVIDE(chan_prepare = 0x000215e5); +PROVIDE(isr_done = 0x0002173d); PROVIDE(prepare_cb = 0x00005029); -PROVIDE(isr_done = 0x00021a49); -PROVIDE(isr_tx_rx = 0x00021a99); -PROVIDE(isr_rx = 0x00021c95); -PROVIDE(isr_tx_connect_rsp = 0x00021ba9); -PROVIDE(isr_early_abort = 0x00021bfd); -PROVIDE(isr_race = 0x00021c91); +PROVIDE(isr_done = 0x00021c49); +PROVIDE(isr_tx_rx = 0x00021c99); +PROVIDE(isr_rx = 0x00021e95); +PROVIDE(isr_tx_connect_rsp = 0x00021da9); +PROVIDE(isr_early_abort = 0x00021dfd); +PROVIDE(isr_race = 0x00021e91); PROVIDE(prepare_cb = 0x000051b1); -PROVIDE(isr_done = 0x00022001); +PROVIDE(isr_done = 0x00022201); PROVIDE(prepare_cb = 0x00005471); -PROVIDE(abort_cb = 0x00022071); -PROVIDE(is_abort_cb = 0x0002215d); -PROVIDE(isr_done_cleanup = 0x000223fd); +PROVIDE(abort_cb = 0x00022271); +PROVIDE(is_abort_cb = 0x0002235d); +PROVIDE(isr_done_cleanup = 0x000225fd); PROVIDE(isr_window = 0x00005921); -PROVIDE(resume_prepare_cb = 0x000224ed); +PROVIDE(resume_prepare_cb = 0x000226ed); PROVIDE(common_prepare_cb = 0x00005631); PROVIDE(isr_rx = 0x000059c1); -PROVIDE(ticker_op_start_cb = 0x00022519); -PROVIDE(ticker_stop_cb = 0x0002254d); -PROVIDE(isr_abort = 0x000222bd); -PROVIDE(prepare_cb = 0x000221fd); -PROVIDE(isr_common_done = 0x00022205); -PROVIDE(isr_done = 0x00022311); -PROVIDE(isr_tx = 0x00022325); -PROVIDE(isr_scan_tgta_check = 0x00022595); -PROVIDE(abort_cb = 0x00022611); -PROVIDE(isr_rx_scan_report.constprop.0 = 0x00022671); +PROVIDE(ticker_op_start_cb = 0x00022719); +PROVIDE(ticker_stop_cb = 0x0002274d); +PROVIDE(isr_abort = 0x000224bd); +PROVIDE(prepare_cb = 0x000223fd); +PROVIDE(isr_common_done = 0x00022405); +PROVIDE(isr_done = 0x00022511); +PROVIDE(isr_tx = 0x00022525); +PROVIDE(isr_scan_tgta_check = 0x00022795); +PROVIDE(abort_cb = 0x00022811); +PROVIDE(isr_rx_scan_report.constprop.0 = 0x00022871); PROVIDE(prepare_cb = 0x00005ff1); -PROVIDE(isr_rx_ull_schedule = 0x000235a5); -PROVIDE(isr_early_abort = 0x00023015); -PROVIDE(isr_done = 0x00022b2d); -PROVIDE(isr_tx = 0x00022b8d); -PROVIDE(isr_tx_scan_req_lll_schedule = 0x00022c59); -PROVIDE(isr_rx_lll_schedule = 0x000235c1); -PROVIDE(isr_tx_scan_req_ull_schedule = 0x00022ca9); -PROVIDE(isr_tx_connect_req = 0x00022cf9); -PROVIDE(isr_rx_connect_rsp = 0x00022d49); -PROVIDE(abort_cb = 0x00023061); -PROVIDE(is_abort_cb = 0x000230f9); +PROVIDE(isr_rx_ull_schedule = 0x000237a5); +PROVIDE(isr_early_abort = 0x00023215); +PROVIDE(isr_done = 0x00022d2d); +PROVIDE(isr_tx = 0x00022d8d); +PROVIDE(isr_tx_scan_req_lll_schedule = 0x00022e59); +PROVIDE(isr_rx_lll_schedule = 0x000237c1); +PROVIDE(isr_tx_scan_req_ull_schedule = 0x00022ea9); +PROVIDE(isr_tx_connect_req = 0x00022ef9); +PROVIDE(isr_rx_connect_rsp = 0x00022f49); +PROVIDE(abort_cb = 0x00023261); +PROVIDE(is_abort_cb = 0x000232f9); PROVIDE(isr_rx = 0x000062b9); PROVIDE(prepare_cb = 0x00006a31); PROVIDE(prepare_cb = 0x00006c99); -PROVIDE(loader = 0x00007c45); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00007d51); -PROVIDE(sys_slist_find_and_remove = 0x0002ef67); -PROVIDE(process_recheck = 0x0002ef9d); -PROVIDE(validate_args = 0x0002efd5); -PROVIDE(notify_one = 0x0002eff5); -PROVIDE(process_event = 0x000084d5); -PROVIDE(transition_complete = 0x0002f021); -PROVIDE(dummy_timestamp = 0x0002f34d); -PROVIDE(default_get_timestamp = 0x0002f351); -PROVIDE(atomic_inc = 0x0002f355); -PROVIDE(z_log_init.isra.0 = 0x000086f1); -PROVIDE(enable_logger = 0x0002f36f); -PROVIDE(backend_filter_set = 0x00008a65); -PROVIDE(z_cbprintf_cpy = 0x0002f3fd); -PROVIDE(z_log_msg_simple_create = 0x0002f45b); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0002f4c9); -PROVIDE(log_output_write = 0x0002f527); -PROVIDE(out_func = 0x0002f543); -PROVIDE(cr_out_func = 0x0002f55f); -PROVIDE(print_formatted = 0x00008c99); -PROVIDE(newline_print = 0x00008cbd); -PROVIDE(cmd_kernel_cycles = 0x00009031); -PROVIDE(cmd_kernel_sleep = 0x0000904d); -PROVIDE(cmd_kernel_version = 0x0000909d); -PROVIDE(cmd_kernel_log_level_set = 0x000090b5); -PROVIDE(thread_valid_cb = 0x0002f60f); -PROVIDE(cmd_kernel_thread_list = 0x00009159); -PROVIDE(shell_tdata_dump = 0x0000918d); -PROVIDE(cmd_kernel_thread_stacks = 0x0000924d); -PROVIDE(shell_stack_dump = 0x000092bd); -PROVIDE(cmd_kernel_thread_suspend = 0x0000931d); -PROVIDE(cmd_kernel_thread_resume = 0x00009381); -PROVIDE(cmd_kernel_thread_kill = 0x000093e5); -PROVIDE(cmd_device_list = 0x00009449); -PROVIDE(cmd_devmem = 0x00009521); -PROVIDE(cmd_dump = 0x000095e5); -PROVIDE(set_bypass.isra.0 = 0x0000975d); -PROVIDE(bypass_cb = 0x000097a9); -PROVIDE(cmd_load = 0x000098bd); -PROVIDE(log_msg_generic_get_wlen = 0x0002f61b); -PROVIDE(uart_irq_tx_disable = 0x0002f63b); -PROVIDE(enable = 0x0002f645); -PROVIDE(read_uart = 0x0002f657); -PROVIDE(uninit = 0x0002f669); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00009995); -PROVIDE(enable_shell_uart = 0x000099b9); -PROVIDE(write_uart = 0x0002f689); -PROVIDE(init = 0x000099f1); -PROVIDE(uart_callback = 0x00009a45); -PROVIDE(cmd_buffer_clear = 0x0002f6f5); -PROVIDE(atomic_or = 0x0002f70b); -PROVIDE(atomic_and = 0x0002f729); -PROVIDE(k_mutex_lock = 0x0002f747); -PROVIDE(z_shell_raw_fprintf = 0x0002f74b); -PROVIDE(shell_internal_help_print = 0x00009b81); -PROVIDE(z_shell_strlen = 0x0002f765); -PROVIDE(shell_log_process = 0x0002f771); -PROVIDE(transport_evt_handler = 0x0002f7a5); -PROVIDE(kill_handler = 0x00009ba1); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x00009bfd); -PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x0002f7bd); -PROVIDE(z_flag_history_exit_set.isra.0 = 0x0002f7d5); -PROVIDE(history_handle = 0x00009c09); -PROVIDE(z_flag_insert_mode_set.isra.0 = 0x0002f7eb); -PROVIDE(k_mutex_unlock.isra.0 = 0x0002f80b); -PROVIDE(execute = 0x00009cb9); -PROVIDE(shell_signal_handle = 0x0002f80f); -PROVIDE(state_set.constprop.0 = 0x00009f81); -PROVIDE(cmd_help = 0x0000a775); -PROVIDE(out_func = 0x0002fa71); -PROVIDE(z_shell_strlen = 0x0002faad); -PROVIDE(z_shell_raw_fprintf = 0x0002fe91); -PROVIDE(z_clear_eos = 0x0000aa69); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x0000aa85); -PROVIDE(full_line_cmd.isra.0 = 0x0002feab); -PROVIDE(reprint_from_cursor = 0x0000acb1); -PROVIDE(data_insert = 0x000301c3); -PROVIDE(z_shell_raw_fprintf = 0x00030453); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x0000ae35); -PROVIDE(formatted_text_print.constprop.0 = 0x0003046d); -PROVIDE(cmd_comment = 0x0003054f); -PROVIDE(cmd_shell_stats_reset = 0x00030553); -PROVIDE(z_shell_raw_fprintf = 0x0003055b); -PROVIDE(cmd_resize_default = 0x0000af5d); -PROVIDE(cmd_shell_stats_show = 0x0000af89); -PROVIDE(cmd_backends = 0x0000af9d); -PROVIDE(cmd_prompt_on = 0x00030575); -PROVIDE(cmd_prompt_off = 0x0000afe9); -PROVIDE(cmd_history = 0x0000aff9); -PROVIDE(cmd_get_retval = 0x0000b039); -PROVIDE(cmd_echo = 0x0000b055); -PROVIDE(cmd_clear = 0x0000b0a5); -PROVIDE(cmd_resize = 0x0000b0dd); -PROVIDE(cmd_vt100_off = 0x00030581); -PROVIDE(cmd_bacskpace_mode_delete = 0x000305a5); -PROVIDE(cmd_colors_off = 0x000305c9); -PROVIDE(cmd_bacskpace_mode_backspace = 0x000305ed); -PROVIDE(cmd_echo_off = 0x00030611); -PROVIDE(cmd_colors_on = 0x00030635); -PROVIDE(cmd_vt100_on = 0x00030659); -PROVIDE(cmd_echo_on = 0x0003067d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000308bf); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000309eb); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00030a21); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00030a41); -PROVIDE(mem_manage_fault.constprop.0 = 0x0000b951); -PROVIDE(bus_fault.constprop.0 = 0x0000baad); -PROVIDE(usage_fault.constprop.0 = 0x0000bc19); -PROVIDE(cbputc = 0x00030aaf); -PROVIDE(picolibc_put = 0x00030abb); -PROVIDE(malloc_prepare = 0x0000c2b9); -PROVIDE(malloc_lock = 0x0000c2dd); -PROVIDE(malloc_unlock = 0x0000c2f1); -PROVIDE(fixed_data_unref = 0x00030d17); -PROVIDE(net_buf_destroy = 0x0000c535); -PROVIDE(fixed_data_alloc = 0x0000c5a5); -PROVIDE(nordicsemi_nrf52_init = 0x0000c701); -PROVIDE(hci_rx_buf_destroy = 0x0000c785); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00030e71); -PROVIDE(ticker_dequeue = 0x0000cffd); -PROVIDE(ticks_to_expire_prep = 0x0000d071); -PROVIDE(start_us.constprop.0 = 0x0000d0b9); -PROVIDE(ticker_job_list_insert = 0x0000d165); -PROVIDE(hci_driver_close = 0x0000fe89); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0000fed9); -PROVIDE(hci_driver_open = 0x0000fef9); -PROVIDE(prio_recv_thread = 0x00010009); -PROVIDE(recv_thread = 0x00010199); -PROVIDE(bt_recv_prio.isra.0 = 0x0000fff1); -PROVIDE(hci_driver_send = 0x000100d9); -PROVIDE(dup_ext_adv_adi_store = 0x000105c9); -PROVIDE(dup_found = 0x00010635); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00010809); -PROVIDE(ext_adv_info_fill = 0x00010829); -PROVIDE(ext_adv_pdu_frag.constprop.0 = 0x00010949); -PROVIDE(ext_adv_data_frag.constprop.0 = 0x00010a31); -PROVIDE(le_remote_feat_complete = 0x00010bb1); -PROVIDE(le_ext_adv_report = 0x00010c29); -PROVIDE(le_ext_adv_legacy_report = 0x00011261); -PROVIDE(adv_cmds_ext_check.constprop.0 = 0x000113d9); -PROVIDE(adv_cmds_legacy_check.constprop.0 = 0x00011409); -PROVIDE(llcp_lp_enc_tx = 0x00019005); -PROVIDE(lp_enc_ntf = 0x000190a5); -PROVIDE(llcp_rp_enc_tx = 0x0001912d); -PROVIDE(lp_enc_send_start_enc_rsp.part.0 = 0x000191f5); -PROVIDE(rp_enc_send_enc_rsp.constprop.0 = 0x0001929d); -PROVIDE(rp_enc_send_start_enc_req.constprop.0 = 0x0001932d); -PROVIDE(rp_enc_execute_fsm = 0x000193e1); -PROVIDE(lp_enc_execute_fsm = 0x0001967d); -PROVIDE(pu_check_update_ind = 0x000199b9); -PROVIDE(pu_update_eff_times = 0x00019a19); -PROVIDE(pu_ntf = 0x00019b15); -PROVIDE(pu_dle_ntf = 0x00019bc5); -PROVIDE(rp_pu_st_wait_tx_ack_phy.part.0 = 0x00019c35); -PROVIDE(pu_prep_update_ind.constprop.0 = 0x00019d19); -PROVIDE(lp_pu_tx.constprop.0 = 0x00019db1); -PROVIDE(lp_pu_send_phy_req.constprop.0.isra.0 = 0x00019f05); -PROVIDE(lp_pu_send_phy_update_ind.isra.0 = 0x00019f61); -PROVIDE(pu_apply_phy_update.isra.0 = 0x00019f99); -PROVIDE(lp_pu_execute_fsm = 0x0001a019); -PROVIDE(rp_pu_tx.constprop.0 = 0x0001a3b5); -PROVIDE(rp_pu_send_phy_rsp.isra.0 = 0x0001a4ad); -PROVIDE(rp_pu_send_phy_update_ind.isra.0 = 0x0001a4f9); -PROVIDE(rp_pu_execute_fsm = 0x0001a54d); -PROVIDE(pdu_validate_conn_update_ind = 0x0001a885); -PROVIDE(pdu_validate_chan_map_ind = 0x0001a895); -PROVIDE(pdu_validate_terminate_ind = 0x0001a8a5); -PROVIDE(pdu_validate_enc_req = 0x0001a8b5); -PROVIDE(pdu_validate_enc_rsp = 0x0001a8c5); -PROVIDE(pdu_validate_start_enc_req = 0x0001a8d5); -PROVIDE(pdu_validate_feature_req = 0x0001a8e5); -PROVIDE(pdu_validate_version_ind = 0x0001a8f5); -PROVIDE(pdu_validate_conn_param_req = 0x0001a905); -PROVIDE(pdu_validate_reject_ext_ind = 0x0001a915); -PROVIDE(pdu_validate_phy_upd_ind = 0x0001a925); -PROVIDE(create_procedure = 0x0001a935); -PROVIDE(pdu_validate_clock_accuracy_rsp = 0x0001a96d); -PROVIDE(pdu_validate_start_enc_rsp = 0x0001a97d); -PROVIDE(pdu_validate_unknown_rsp = 0x0001a98d); -PROVIDE(pdu_validate_feature_rsp = 0x0001a99d); -PROVIDE(pdu_validate_pause_enc_req = 0x0001a9ad); -PROVIDE(pdu_validate_pause_enc_rsp = 0x0001a9bd); -PROVIDE(pdu_validate_reject_ind = 0x0001a9cd); -PROVIDE(pdu_validate_per_init_feat_xchg = 0x0001a9dd); -PROVIDE(pdu_validate_conn_param_rsp = 0x0001a9ed); -PROVIDE(pdu_validate_ping_req = 0x0001a9fd); -PROVIDE(pdu_validate_ping_rsp = 0x0001aa0d); -PROVIDE(pdu_validate_length_req = 0x0001aa1d); -PROVIDE(pdu_validate_length_rsp = 0x0001aa2d); -PROVIDE(pdu_validate_phy_req = 0x0001aa3d); -PROVIDE(pdu_validate_phy_rsp = 0x0001aa4d); -PROVIDE(pdu_validate_min_used_chan_ind = 0x0001aa5d); -PROVIDE(lp_comm_tx = 0x0001b481); -PROVIDE(rp_comm_tx_proxy = 0x0001b585); -PROVIDE(rp_comm_send_rsp.constprop.0 = 0x0001b681); -PROVIDE(rp_comm_execute_fsm = 0x0001b725); -PROVIDE(lp_comm_ntf = 0x0001b975); -PROVIDE(lp_comm_complete.constprop.0 = 0x0001ba5d); -PROVIDE(lp_comm_send_req.constprop.0.isra.0 = 0x0001bb6d); -PROVIDE(lp_comm_execute_fsm = 0x0001bce5); -PROVIDE(lr_dequeue = 0x0001bea1); -PROVIDE(lr_act_complete = 0x0001bf09); -PROVIDE(llcp_lr_check_done.part.0 = 0x0001c02d); -PROVIDE(lr_act_run = 0x0001c0ad); -PROVIDE(lp_cu_tx = 0x0001cc89); -PROVIDE(cu_ntf = 0x0001cd3d); -PROVIDE(rp_cu_conn_param_req_ntf = 0x0001cdb9); -PROVIDE(cu_update_conn_parameters = 0x0001ce19); -PROVIDE(rp_cu_tx = 0x0001ce65); -PROVIDE(lp_cu_send_conn_param_req.constprop.0 = 0x0001cf31); -PROVIDE(cu_check_conn_parameters.constprop.0 = 0x0001cfa9); -PROVIDE(rp_cu_send_conn_update_ind_finalize.constprop.0 = 0x0001cffd); -PROVIDE(rp_cu_send_conn_update_ind.constprop.0.isra.0 = 0x0001d081); -PROVIDE(lp_cu_send_conn_update_ind.isra.0 = 0x0001d0c1); -PROVIDE(rp_cu_check_instant.constprop.0 = 0x0001d151); -PROVIDE(rp_cu_send_reject_ext_ind.constprop.0 = 0x0001d1c9); -PROVIDE(rp_cu_st_wait_conn_param_req_available.part.0.isra.0 = 0x0001d215); -PROVIDE(rp_cu_execute_fsm = 0x0001d29d); -PROVIDE(lp_cu_send_reject_ext_ind.constprop.0 = 0x0001d515); -PROVIDE(lp_cu_execute_fsm = 0x0001d581); -PROVIDE(llcp_rr_check_done.part.0 = 0x0001db3d); -PROVIDE(rr_act_run = 0x0001dbcd); -PROVIDE(rr_act_unsupported = 0x0001dc5d); -PROVIDE(rr_act_reject = 0x0001dcfd); -PROVIDE(rr_st_active.constprop.0 = 0x0001de65); -PROVIDE(rr_execute_fsm = 0x0001ded9); -PROVIDE(rl_update = 0x0001ec95); -PROVIDE(fal_update = 0x0001ed09); -PROVIDE(rpa_timeout = 0x0001f941); -PROVIDE(rtc0_nrf5_isr = 0x0002014d); -PROVIDE(swi_lll_nrf5_isr = 0x0002017d); -PROVIDE(ticker_start_op_cb = 0x00020185); -PROVIDE(ticker_stop_op_cb = 0x00020235); -PROVIDE(isr_race = 0x000202c1); -PROVIDE(preempt_ticker_cb = 0x000202c5); -PROVIDE(preempt_ticker_start.constprop.0 = 0x00020349); -PROVIDE(preempt = 0x000204a9); -PROVIDE(clock_ready = 0x00020db9); -PROVIDE(blocking_on = 0x00020dc1); -PROVIDE(isr_done = 0x000235dd); -PROVIDE(do_ecb = 0x0002516d); -PROVIDE(isr_ecb = 0x000251bd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00030edd); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x00025271); -PROVIDE(call_fn_table = 0x0002527d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000255bd); -PROVIDE(llext_copy_region = 0x000255e1); -PROVIDE(llext_read = 0x00030f7b); -PROVIDE(llext_seek = 0x00030f7f); -PROVIDE(llext_peek = 0x00030f83); -PROVIDE(llext_alloc = 0x00025721); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00030f8d); -PROVIDE(llext_find_extension_sym_iterate = 0x00030fcf); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00030fe7); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00026519); -PROVIDE(llext_shell_name_cb = 0x000310c5); -PROVIDE(llext_name_get = 0x000265ed); -PROVIDE(llext_name_arg_get = 0x000310db); -PROVIDE(cmd_llext_list_symbols = 0x0002661d); -PROVIDE(cmd_llext_list = 0x00026689); -PROVIDE(llext_shell_list_cb = 0x000266a9); -PROVIDE(cmd_llext_load_hex = 0x000266c1); -PROVIDE(cmd_llext_call_fn = 0x00026795); -PROVIDE(cmd_llext_unload = 0x000267c1); -PROVIDE(get_status = 0x000310ed); -PROVIDE(stop = 0x000310ff); -PROVIDE(api_stop = 0x0003114f); -PROVIDE(async_start = 0x00031155); -PROVIDE(api_start = 0x000311af); -PROVIDE(onoff_stop = 0x00026801); -PROVIDE(onoff_started_callback = 0x000311bd); -PROVIDE(onoff_start = 0x00026829); -PROVIDE(lfclk_stop = 0x000311c9); -PROVIDE(blocking_start_callback = 0x000311cf); -PROVIDE(clk_init = 0x00026865); -PROVIDE(clock_event_handler = 0x00026a15); -PROVIDE(api_blocking_start = 0x000268bd); -PROVIDE(lfclk_start = 0x000268f9); -PROVIDE(generic_hfclk_stop = 0x0002691d); -PROVIDE(clkstarted_handle.constprop.0 = 0x00026951); -PROVIDE(generic_hfclk_start = 0x0002699d); -PROVIDE(uart_console_init = 0x00026b9d); -PROVIDE(console_out = 0x00026bc5); -PROVIDE(random_byte_get = 0x00026bed); -PROVIDE(rng_pool_get = 0x00026c29); -PROVIDE(entropy_nrf5_get_entropy_isr = 0x00026cb1); -PROVIDE(entropy_nrf5_get_entropy = 0x00026d59); -PROVIDE(entropy_nrf5_init = 0x00026db1); -PROVIDE(isr = 0x00026e21); -PROVIDE(flash_nrf_pages_layout = 0x00026e95); -PROVIDE(flash_nrf_get_parameters = 0x00026ea5); -PROVIDE(flash_nrf_get_size = 0x00031271); -PROVIDE(erase_op = 0x00031283); -PROVIDE(is_regular_addr_valid = 0x000312cb); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000312ed); -PROVIDE(flash_nrf_read = 0x00026ead); -PROVIDE(nrf_flash_init = 0x00026efd); -PROVIDE(flash_nrf_erase = 0x00026f29); -PROVIDE(write_op = 0x0002700d); -PROVIDE(flash_nrf_write = 0x00027071); -PROVIDE(spi_nor_pages_layout = 0x0003130d); -PROVIDE(flash_nor_get_parameters = 0x00027135); -PROVIDE(flash_nor_get_size = 0x00031319); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00031325); -PROVIDE(release_device.isra.0 = 0x00031343); -PROVIDE(acquire_device.isra.0 = 0x00031347); -PROVIDE(spi_nor_access = 0x00031353); -PROVIDE(spi_nor_write_protection_set = 0x000313d7); -PROVIDE(spi_nor_rdsr = 0x00031413); -PROVIDE(spi_nor_wait_until_ready = 0x00031435); -PROVIDE(spi_nor_erase = 0x0002713d); -PROVIDE(spi_nor_write = 0x0003146f); -PROVIDE(spi_nor_read = 0x00031541); -PROVIDE(exit_dpd = 0x00031581); -PROVIDE(spi_nor_init = 0x00027255); -PROVIDE(gpio_nrfx_port_get_raw = 0x0003161f); -PROVIDE(gpio_nrfx_port_set_masked_raw = 0x0003162d); -PROVIDE(gpio_nrfx_port_set_bits_raw = 0x00031645); -PROVIDE(gpio_nrfx_port_clear_bits_raw = 0x00031651); -PROVIDE(gpio_nrfx_port_toggle_bits = 0x0003165d); -PROVIDE(gpio_nrfx_manage_callback = 0x00031677); -PROVIDE(gpio_nrfx_init = 0x00027559); -PROVIDE(nrfx_gpio_handler = 0x000275a1); -PROVIDE(gpio_nrfx_pin_configure = 0x000275dd); -PROVIDE(gpio_nrfx_pin_interrupt_configure = 0x00027759); -PROVIDE(irq_connect0 = 0x000316c9); -PROVIDE(irq_connect1 = 0x000316d3); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0002784d); -PROVIDE(event_handler = 0x00027871); -PROVIDE(i2c_nrfx_twim_init = 0x000316dd); -PROVIDE(i2c_nrfx_twim_transfer = 0x000278a9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00031703); -PROVIDE(pinctrl_apply_state.isra.0 = 0x00031723); -PROVIDE(uarte_nrfx_err_check = 0x00031799); -PROVIDE(uarte_nrfx_poll_in = 0x000317a7); -PROVIDE(uarte_nrfx_fifo_read = 0x000317cd); -PROVIDE(uarte_nrfx_irq_tx_enable = 0x000317f5); -PROVIDE(uarte_nrfx_irq_tx_disable = 0x00031829); -PROVIDE(uarte_nrfx_irq_tx_ready_complete = 0x00031839); -PROVIDE(uarte_nrfx_irq_rx_ready = 0x00031857); -PROVIDE(uarte_nrfx_irq_rx_enable = 0x00031867); -PROVIDE(uarte_nrfx_irq_rx_disable = 0x00031873); -PROVIDE(uarte_nrfx_irq_err_enable = 0x0003187f); -PROVIDE(uarte_nrfx_irq_err_disable = 0x0003188d); -PROVIDE(uarte_nrfx_irq_is_pending = 0x0003189b); -PROVIDE(uarte_nrfx_irq_update = 0x000318d1); -PROVIDE(uarte_nrfx_irq_callback_set = 0x000318d5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00027cfd); -PROVIDE(is_tx_ready.isra.0 = 0x000318e1); -PROVIDE(uarte_nrfx_isr_int = 0x00031901); -PROVIDE(uarte_nrfx_poll_out = 0x00027d21); -PROVIDE(uarte_0_init = 0x00027dd5); -PROVIDE(uarte_nrfx_fifo_fill = 0x00031989); -PROVIDE(irq_connect2 = 0x00031a1b); -PROVIDE(spi_context_get_next_buf.constprop.0 = 0x00031a25); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00031a4b); -PROVIDE(gpio_pin_set_dt.isra.0 = 0x00031a69); -PROVIDE(spi_context_unlock_unconditionally = 0x00031a91); -PROVIDE(spi_nrfx_release = 0x00031ac1); -PROVIDE(spi_nrfx_init = 0x00027efd); -PROVIDE(transfer_next_chunk = 0x00028021); -PROVIDE(event_handler = 0x00028091); -PROVIDE(spi_nrfx_transceive = 0x00028175); -PROVIDE(event_clear = 0x00031ae5); -PROVIDE(compare_int_lock = 0x00028699); -PROVIDE(sys_clock_timeout_handler = 0x000286e1); -PROVIDE(compare_int_unlock = 0x00028729); -PROVIDE(compare_set = 0x000287c9); -PROVIDE(sys_clock_driver_init = 0x000288f9); -PROVIDE(nrf52_errata_12 = 0x00031b05); -PROVIDE(nrf52_errata_136 = 0x00031b05); -PROVIDE(nrf52_errata_108 = 0x00031b05); -PROVIDE(nrf52_errata_36 = 0x00031b05); -PROVIDE(nrf52_errata_31 = 0x00031b05); -PROVIDE(nrf52_errata_16 = 0x00028acd); -PROVIDE(nrf52_errata_57 = 0x00028acd); -PROVIDE(nrf52_errata_37 = 0x00028acd); -PROVIDE(nrf52_errata_32 = 0x00028acd); -PROVIDE(clock_stop = 0x00028e11); -PROVIDE(nrf_gpio_pin_port_decode = 0x00031b43); -PROVIDE(nrf_gpio_reconfigure = 0x00031b57); -PROVIDE(nrf_gpio_cfg_sense_set = 0x00031be9); -PROVIDE(call_handler.constprop.0 = 0x00029081); -PROVIDE(latch_pending_read_and_check = 0x00031c07); -PROVIDE(release_handler.isra.0 = 0x000290bd); -PROVIDE(__nrfy_internal_gpiote_events_process.constprop.0 = 0x00029111); -PROVIDE(pin_in_event_get.isra.0 = 0x0002916d); -PROVIDE(pin_trigger_disable = 0x0002918d); -PROVIDE(pin_uninit = 0x000291cd); -PROVIDE(nvmc_word_write = 0x00029745); -PROVIDE(nrf_gpio_pin_port_decode = 0x00031c4d); -PROVIDE(nrf_gpio_pin_set = 0x00031c61); -PROVIDE(nrf_gpio_pin_clear = 0x00031c7b); -PROVIDE(transfer_byte = 0x00031c95); -PROVIDE(nrf_gpio_cfg_output = 0x000297c5); -PROVIDE(spi_configure = 0x000297f1); -PROVIDE(nrf_gpio_cfg_default = 0x00029911); -PROVIDE(xfer_completeness_check = 0x00031cfb); -PROVIDE(__nrfy_internal_twim_event_handle.isra.0 = 0x00031d5d); -PROVIDE(__nrfy_internal_twim_events_process.constprop.0 = 0x00031d7f); -PROVIDE(twim_configure = 0x00029b51); -PROVIDE(pins_configure = 0x00029b8d); -PROVIDE(irq_handler = 0x00029bed); -PROVIDE(nrf_gpio_pin_port_decode = 0x00031dd3); -PROVIDE(nrf_gpio_pin_set = 0x00031de7); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00031e51); -PROVIDE(do_device_init = 0x00031e87); -PROVIDE(z_sys_init_run_level = 0x0002a549); -PROVIDE(bg_thread_main = 0x0002a579); -PROVIDE(statics_init = 0x0002a7c9); -PROVIDE(create_free_list = 0x00031fbf); -PROVIDE(init_mem_slab_obj_core_list = 0x0002a7ed); -PROVIDE(init_mbox_module = 0x0002a811); -PROVIDE(unpend_thread_no_timeout = 0x00032019); -PROVIDE(adjust_owner_prio.isra.0 = 0x0003219f); -PROVIDE(unpend_thread_no_timeout = 0x000321bd); -PROVIDE(queue_insert = 0x000321d7); -PROVIDE(k_sys_work_q_init = 0x0002ad69); -PROVIDE(flag_test_and_clear = 0x0003248d); -PROVIDE(unschedule_locked = 0x000324a3); -PROVIDE(notify_queue_locked.isra.0 = 0x000324c1); -PROVIDE(work_queue_main = 0x0002ad9d); -PROVIDE(cancel_async_locked = 0x000324cf); -PROVIDE(submit_to_queue_locked = 0x0002aee9); -PROVIDE(work_timeout = 0x00032535); -PROVIDE(unpend_thread_no_timeout = 0x000325d5); -PROVIDE(sys_dlist_remove = 0x00032655); -PROVIDE(unpend_thread_no_timeout = 0x00032665); -PROVIDE(z_swap_irqlock = 0x0002b395); -PROVIDE(ready_thread = 0x0002b3c9); -PROVIDE(unready_thread = 0x0002b44d); -PROVIDE(add_to_waitq_locked = 0x00032679); -PROVIDE(z_tick_sleep = 0x0002b949); -PROVIDE(wait_for = 0x00032843); -PROVIDE(z_sched_wake_all.constprop.0 = 0x000328b5); -PROVIDE(slice_timeout = 0x0002bd29); -PROVIDE(first = 0x0002bf25); -PROVIDE(elapsed = 0x0002bf35); -PROVIDE(next_timeout = 0x00032aeb); -PROVIDE(remove_timeout = 0x0002bf49); -PROVIDE(clear_event_registrations = 0x0002c301); -PROVIDE(add_event = 0x00032c65); -PROVIDE(register_events = 0x00032cb9); -PROVIDE(signal_poll_event = 0x00032dbd); -PROVIDE(z_heap_aligned_alloc = 0x00032eb9); -PROVIDE(__ultoa_invert = 0x00033179); -PROVIDE(skip_to_arg = 0x0002cb4d); -PROVIDE(mulShift64 = 0x000331c9); -PROVIDE(mulShiftAll64 = 0x0003322b); -PROVIDE(div10 = 0x0002d805); -PROVIDE(chunk_size = 0x0002e8cd); -PROVIDE(free_list_add = 0x0002e8d7); -PROVIDE(free_list_remove_bidx = 0x0002e925); -PROVIDE(free_list_remove = 0x0002e95f); -PROVIDE(alloc_chunk = 0x0002e979); -PROVIDE(merge_chunks = 0x0002e9e7); -PROVIDE(split_chunks = 0x0002ea13); -PROVIDE(free_chunk = 0x0002ea47); -PROVIDE(ring_buf_put_claim = 0x0002f217); -PROVIDE(ring_buf_get_claim = 0x0002f235); -PROVIDE(panic = 0x000302cd); -PROVIDE(process_log_msg.constprop.0 = 0x000302cf); -PROVIDE(process = 0x0003035b); -PROVIDE(dropped = 0x0003039b); -PROVIDE(remove_from_tail.part.0 = 0x000306a1); -PROVIDE(foldcase = 0x00030ac5); -PROVIDE(fnmatchx = 0x00030ad5); -PROVIDE(ah = 0x00030de1); -PROVIDE(flash_get_page_info = 0x000311d5); -PROVIDE(isr_radio = 0x00024355); -PROVIDE(ull_chan_map_get = 0x0001eb01); -PROVIDE(main = 0x0002e8bf); +PROVIDE(loader = 0x00007e45); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00007f51); +PROVIDE(sys_slist_find_and_remove = 0x0002f167); +PROVIDE(process_recheck = 0x0002f19d); +PROVIDE(validate_args = 0x0002f1d5); +PROVIDE(notify_one = 0x0002f1f5); +PROVIDE(process_event = 0x000086d5); +PROVIDE(transition_complete = 0x0002f221); +PROVIDE(dummy_timestamp = 0x0002f54d); +PROVIDE(default_get_timestamp = 0x0002f551); +PROVIDE(atomic_inc = 0x0002f555); +PROVIDE(z_log_init.isra.0 = 0x000088f1); +PROVIDE(enable_logger = 0x0002f56f); +PROVIDE(backend_filter_set = 0x00008c65); +PROVIDE(z_cbprintf_cpy = 0x0002f5fd); +PROVIDE(z_log_msg_simple_create = 0x0002f65b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0002f6c9); +PROVIDE(log_output_write = 0x0002f727); +PROVIDE(out_func = 0x0002f743); +PROVIDE(cr_out_func = 0x0002f75f); +PROVIDE(print_formatted = 0x00008e99); +PROVIDE(newline_print = 0x00008ebd); +PROVIDE(cmd_kernel_cycles = 0x00009231); +PROVIDE(cmd_kernel_sleep = 0x0000924d); +PROVIDE(cmd_kernel_version = 0x0000929d); +PROVIDE(cmd_kernel_log_level_set = 0x000092b5); +PROVIDE(thread_valid_cb = 0x0002f80f); +PROVIDE(cmd_kernel_thread_list = 0x00009359); +PROVIDE(shell_tdata_dump = 0x0000938d); +PROVIDE(cmd_kernel_thread_stacks = 0x0000944d); +PROVIDE(shell_stack_dump = 0x000094bd); +PROVIDE(cmd_kernel_thread_suspend = 0x0000951d); +PROVIDE(cmd_kernel_thread_resume = 0x00009581); +PROVIDE(cmd_kernel_thread_kill = 0x000095e5); +PROVIDE(cmd_device_list = 0x00009649); +PROVIDE(cmd_devmem = 0x00009721); +PROVIDE(cmd_dump = 0x000097e5); +PROVIDE(set_bypass.isra.0 = 0x0000995d); +PROVIDE(bypass_cb = 0x000099a9); +PROVIDE(cmd_load = 0x00009abd); +PROVIDE(log_msg_generic_get_wlen = 0x0002f81b); +PROVIDE(uart_irq_tx_disable = 0x0002f83b); +PROVIDE(enable = 0x0002f845); +PROVIDE(read_uart = 0x0002f857); +PROVIDE(uninit = 0x0002f869); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00009b95); +PROVIDE(enable_shell_uart = 0x00009bb9); +PROVIDE(write_uart = 0x0002f889); +PROVIDE(init = 0x00009bf1); +PROVIDE(uart_callback = 0x00009c45); +PROVIDE(cmd_buffer_clear = 0x0002f8f5); +PROVIDE(atomic_or = 0x0002f90b); +PROVIDE(atomic_and = 0x0002f929); +PROVIDE(k_mutex_lock = 0x0002f947); +PROVIDE(z_shell_raw_fprintf = 0x0002f94b); +PROVIDE(shell_internal_help_print = 0x00009d81); +PROVIDE(z_shell_strlen = 0x0002f965); +PROVIDE(shell_log_process = 0x0002f971); +PROVIDE(transport_evt_handler = 0x0002f9a5); +PROVIDE(kill_handler = 0x00009da1); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x00009dfd); +PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x0002f9bd); +PROVIDE(z_flag_history_exit_set.isra.0 = 0x0002f9d5); +PROVIDE(history_handle = 0x00009e09); +PROVIDE(z_flag_insert_mode_set.isra.0 = 0x0002f9eb); +PROVIDE(k_mutex_unlock.isra.0 = 0x0002fa0b); +PROVIDE(execute = 0x00009eb9); +PROVIDE(shell_signal_handle = 0x0002fa0f); +PROVIDE(state_set.constprop.0 = 0x0000a181); +PROVIDE(cmd_help = 0x0000a975); +PROVIDE(out_func = 0x0002fc71); +PROVIDE(z_shell_strlen = 0x0002fcad); +PROVIDE(z_shell_raw_fprintf = 0x00030091); +PROVIDE(z_clear_eos = 0x0000ac69); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x0000ac85); +PROVIDE(full_line_cmd.isra.0 = 0x000300ab); +PROVIDE(reprint_from_cursor = 0x0000aeb1); +PROVIDE(data_insert = 0x000303c3); +PROVIDE(z_shell_raw_fprintf = 0x00030653); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x0000b035); +PROVIDE(formatted_text_print.constprop.0 = 0x0003066d); +PROVIDE(cmd_comment = 0x0003074f); +PROVIDE(cmd_shell_stats_reset = 0x00030753); +PROVIDE(z_shell_raw_fprintf = 0x0003075b); +PROVIDE(cmd_resize_default = 0x0000b15d); +PROVIDE(cmd_shell_stats_show = 0x0000b189); +PROVIDE(cmd_backends = 0x0000b19d); +PROVIDE(cmd_prompt_on = 0x00030775); +PROVIDE(cmd_prompt_off = 0x0000b1e9); +PROVIDE(cmd_history = 0x0000b1f9); +PROVIDE(cmd_get_retval = 0x0000b239); +PROVIDE(cmd_echo = 0x0000b255); +PROVIDE(cmd_clear = 0x0000b2a5); +PROVIDE(cmd_resize = 0x0000b2dd); +PROVIDE(cmd_vt100_off = 0x00030781); +PROVIDE(cmd_bacskpace_mode_delete = 0x000307a5); +PROVIDE(cmd_colors_off = 0x000307c9); +PROVIDE(cmd_bacskpace_mode_backspace = 0x000307ed); +PROVIDE(cmd_echo_off = 0x00030811); +PROVIDE(cmd_colors_on = 0x00030835); +PROVIDE(cmd_vt100_on = 0x00030859); +PROVIDE(cmd_echo_on = 0x0003087d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00030abf); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00030beb); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00030c21); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00030c41); +PROVIDE(mem_manage_fault.constprop.0 = 0x0000bb51); +PROVIDE(bus_fault.constprop.0 = 0x0000bcad); +PROVIDE(usage_fault.constprop.0 = 0x0000be19); +PROVIDE(cbputc = 0x00030caf); +PROVIDE(picolibc_put = 0x00030cbb); +PROVIDE(malloc_prepare = 0x0000c4b9); +PROVIDE(malloc_lock = 0x0000c4dd); +PROVIDE(malloc_unlock = 0x0000c4f1); +PROVIDE(fixed_data_unref = 0x00030f17); +PROVIDE(net_buf_destroy = 0x0000c735); +PROVIDE(fixed_data_alloc = 0x0000c7a5); +PROVIDE(nordicsemi_nrf52_init = 0x0000c901); +PROVIDE(hci_rx_buf_destroy = 0x0000c985); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00031071); +PROVIDE(ticker_dequeue = 0x0000d1fd); +PROVIDE(ticks_to_expire_prep = 0x0000d271); +PROVIDE(start_us.constprop.0 = 0x0000d2b9); +PROVIDE(ticker_job_list_insert = 0x0000d365); +PROVIDE(hci_driver_close = 0x00010089); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000100d9); +PROVIDE(hci_driver_open = 0x000100f9); +PROVIDE(prio_recv_thread = 0x00010209); +PROVIDE(recv_thread = 0x00010399); +PROVIDE(bt_recv_prio.isra.0 = 0x000101f1); +PROVIDE(hci_driver_send = 0x000102d9); +PROVIDE(dup_ext_adv_adi_store = 0x000107c9); +PROVIDE(dup_found = 0x00010835); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00010a09); +PROVIDE(ext_adv_info_fill = 0x00010a29); +PROVIDE(ext_adv_pdu_frag.constprop.0 = 0x00010b49); +PROVIDE(ext_adv_data_frag.constprop.0 = 0x00010c31); +PROVIDE(le_remote_feat_complete = 0x00010db1); +PROVIDE(le_ext_adv_report = 0x00010e29); +PROVIDE(le_ext_adv_legacy_report = 0x00011461); +PROVIDE(adv_cmds_ext_check.constprop.0 = 0x000115d9); +PROVIDE(adv_cmds_legacy_check.constprop.0 = 0x00011609); +PROVIDE(llcp_lp_enc_tx = 0x00019205); +PROVIDE(lp_enc_ntf = 0x000192a5); +PROVIDE(llcp_rp_enc_tx = 0x0001932d); +PROVIDE(lp_enc_send_start_enc_rsp.part.0 = 0x000193f5); +PROVIDE(rp_enc_send_enc_rsp.constprop.0 = 0x0001949d); +PROVIDE(rp_enc_send_start_enc_req.constprop.0 = 0x0001952d); +PROVIDE(rp_enc_execute_fsm = 0x000195e1); +PROVIDE(lp_enc_execute_fsm = 0x0001987d); +PROVIDE(pu_check_update_ind = 0x00019bb9); +PROVIDE(pu_update_eff_times = 0x00019c19); +PROVIDE(pu_ntf = 0x00019d15); +PROVIDE(pu_dle_ntf = 0x00019dc5); +PROVIDE(rp_pu_st_wait_tx_ack_phy.part.0 = 0x00019e35); +PROVIDE(pu_prep_update_ind.constprop.0 = 0x00019f19); +PROVIDE(lp_pu_tx.constprop.0 = 0x00019fb1); +PROVIDE(lp_pu_send_phy_req.constprop.0.isra.0 = 0x0001a105); +PROVIDE(lp_pu_send_phy_update_ind.isra.0 = 0x0001a161); +PROVIDE(pu_apply_phy_update.isra.0 = 0x0001a199); +PROVIDE(lp_pu_execute_fsm = 0x0001a219); +PROVIDE(rp_pu_tx.constprop.0 = 0x0001a5b5); +PROVIDE(rp_pu_send_phy_rsp.isra.0 = 0x0001a6ad); +PROVIDE(rp_pu_send_phy_update_ind.isra.0 = 0x0001a6f9); +PROVIDE(rp_pu_execute_fsm = 0x0001a74d); +PROVIDE(pdu_validate_conn_update_ind = 0x0001aa85); +PROVIDE(pdu_validate_chan_map_ind = 0x0001aa95); +PROVIDE(pdu_validate_terminate_ind = 0x0001aaa5); +PROVIDE(pdu_validate_enc_req = 0x0001aab5); +PROVIDE(pdu_validate_enc_rsp = 0x0001aac5); +PROVIDE(pdu_validate_start_enc_req = 0x0001aad5); +PROVIDE(pdu_validate_feature_req = 0x0001aae5); +PROVIDE(pdu_validate_version_ind = 0x0001aaf5); +PROVIDE(pdu_validate_conn_param_req = 0x0001ab05); +PROVIDE(pdu_validate_reject_ext_ind = 0x0001ab15); +PROVIDE(pdu_validate_phy_upd_ind = 0x0001ab25); +PROVIDE(create_procedure = 0x0001ab35); +PROVIDE(pdu_validate_clock_accuracy_rsp = 0x0001ab6d); +PROVIDE(pdu_validate_start_enc_rsp = 0x0001ab7d); +PROVIDE(pdu_validate_unknown_rsp = 0x0001ab8d); +PROVIDE(pdu_validate_feature_rsp = 0x0001ab9d); +PROVIDE(pdu_validate_pause_enc_req = 0x0001abad); +PROVIDE(pdu_validate_pause_enc_rsp = 0x0001abbd); +PROVIDE(pdu_validate_reject_ind = 0x0001abcd); +PROVIDE(pdu_validate_per_init_feat_xchg = 0x0001abdd); +PROVIDE(pdu_validate_conn_param_rsp = 0x0001abed); +PROVIDE(pdu_validate_ping_req = 0x0001abfd); +PROVIDE(pdu_validate_ping_rsp = 0x0001ac0d); +PROVIDE(pdu_validate_length_req = 0x0001ac1d); +PROVIDE(pdu_validate_length_rsp = 0x0001ac2d); +PROVIDE(pdu_validate_phy_req = 0x0001ac3d); +PROVIDE(pdu_validate_phy_rsp = 0x0001ac4d); +PROVIDE(pdu_validate_min_used_chan_ind = 0x0001ac5d); +PROVIDE(lp_comm_tx = 0x0001b681); +PROVIDE(rp_comm_tx_proxy = 0x0001b785); +PROVIDE(rp_comm_send_rsp.constprop.0 = 0x0001b881); +PROVIDE(rp_comm_execute_fsm = 0x0001b925); +PROVIDE(lp_comm_ntf = 0x0001bb75); +PROVIDE(lp_comm_complete.constprop.0 = 0x0001bc5d); +PROVIDE(lp_comm_send_req.constprop.0.isra.0 = 0x0001bd6d); +PROVIDE(lp_comm_execute_fsm = 0x0001bee5); +PROVIDE(lr_dequeue = 0x0001c0a1); +PROVIDE(lr_act_complete = 0x0001c109); +PROVIDE(llcp_lr_check_done.part.0 = 0x0001c22d); +PROVIDE(lr_act_run = 0x0001c2ad); +PROVIDE(lp_cu_tx = 0x0001ce89); +PROVIDE(cu_ntf = 0x0001cf3d); +PROVIDE(rp_cu_conn_param_req_ntf = 0x0001cfb9); +PROVIDE(cu_update_conn_parameters = 0x0001d019); +PROVIDE(rp_cu_tx = 0x0001d065); +PROVIDE(lp_cu_send_conn_param_req.constprop.0 = 0x0001d131); +PROVIDE(cu_check_conn_parameters.constprop.0 = 0x0001d1a9); +PROVIDE(rp_cu_send_conn_update_ind_finalize.constprop.0 = 0x0001d1fd); +PROVIDE(rp_cu_send_conn_update_ind.constprop.0.isra.0 = 0x0001d281); +PROVIDE(lp_cu_send_conn_update_ind.isra.0 = 0x0001d2c1); +PROVIDE(rp_cu_check_instant.constprop.0 = 0x0001d351); +PROVIDE(rp_cu_send_reject_ext_ind.constprop.0 = 0x0001d3c9); +PROVIDE(rp_cu_st_wait_conn_param_req_available.part.0.isra.0 = 0x0001d415); +PROVIDE(rp_cu_execute_fsm = 0x0001d49d); +PROVIDE(lp_cu_send_reject_ext_ind.constprop.0 = 0x0001d715); +PROVIDE(lp_cu_execute_fsm = 0x0001d781); +PROVIDE(llcp_rr_check_done.part.0 = 0x0001dd3d); +PROVIDE(rr_act_run = 0x0001ddcd); +PROVIDE(rr_act_unsupported = 0x0001de5d); +PROVIDE(rr_act_reject = 0x0001defd); +PROVIDE(rr_st_active.constprop.0 = 0x0001e065); +PROVIDE(rr_execute_fsm = 0x0001e0d9); +PROVIDE(rl_update = 0x0001ee95); +PROVIDE(fal_update = 0x0001ef09); +PROVIDE(rpa_timeout = 0x0001fb41); +PROVIDE(rtc0_nrf5_isr = 0x0002034d); +PROVIDE(swi_lll_nrf5_isr = 0x0002037d); +PROVIDE(ticker_start_op_cb = 0x00020385); +PROVIDE(ticker_stop_op_cb = 0x00020435); +PROVIDE(isr_race = 0x000204c1); +PROVIDE(preempt_ticker_cb = 0x000204c5); +PROVIDE(preempt_ticker_start.constprop.0 = 0x00020549); +PROVIDE(preempt = 0x000206a9); +PROVIDE(clock_ready = 0x00020fb9); +PROVIDE(blocking_on = 0x00020fc1); +PROVIDE(isr_done = 0x000237dd); +PROVIDE(do_ecb = 0x0002536d); +PROVIDE(isr_ecb = 0x000253bd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000310dd); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x00025471); +PROVIDE(call_fn_table = 0x0002547d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000257bd); +PROVIDE(llext_copy_region = 0x000257e1); +PROVIDE(llext_read = 0x0003117b); +PROVIDE(llext_seek = 0x0003117f); +PROVIDE(llext_peek = 0x00031183); +PROVIDE(llext_alloc = 0x00025921); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003118d); +PROVIDE(llext_find_extension_sym_iterate = 0x000311cf); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000311e7); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00026719); +PROVIDE(llext_shell_name_cb = 0x000312c5); +PROVIDE(llext_name_get = 0x000267ed); +PROVIDE(llext_name_arg_get = 0x000312db); +PROVIDE(cmd_llext_list_symbols = 0x0002681d); +PROVIDE(cmd_llext_list = 0x00026889); +PROVIDE(llext_shell_list_cb = 0x000268a9); +PROVIDE(cmd_llext_load_hex = 0x000268c1); +PROVIDE(cmd_llext_call_fn = 0x00026995); +PROVIDE(cmd_llext_unload = 0x000269c1); +PROVIDE(get_status = 0x000312ed); +PROVIDE(stop = 0x000312ff); +PROVIDE(api_stop = 0x0003134f); +PROVIDE(async_start = 0x00031355); +PROVIDE(api_start = 0x000313af); +PROVIDE(onoff_stop = 0x00026a01); +PROVIDE(onoff_started_callback = 0x000313bd); +PROVIDE(onoff_start = 0x00026a29); +PROVIDE(lfclk_stop = 0x000313c9); +PROVIDE(blocking_start_callback = 0x000313cf); +PROVIDE(clk_init = 0x00026a65); +PROVIDE(clock_event_handler = 0x00026c15); +PROVIDE(api_blocking_start = 0x00026abd); +PROVIDE(lfclk_start = 0x00026af9); +PROVIDE(generic_hfclk_stop = 0x00026b1d); +PROVIDE(clkstarted_handle.constprop.0 = 0x00026b51); +PROVIDE(generic_hfclk_start = 0x00026b9d); +PROVIDE(uart_console_init = 0x00026d9d); +PROVIDE(console_out = 0x00026dc5); +PROVIDE(random_byte_get = 0x00026ded); +PROVIDE(rng_pool_get = 0x00026e29); +PROVIDE(entropy_nrf5_get_entropy_isr = 0x00026eb1); +PROVIDE(entropy_nrf5_get_entropy = 0x00026f59); +PROVIDE(entropy_nrf5_init = 0x00026fb1); +PROVIDE(isr = 0x00027021); +PROVIDE(flash_nrf_pages_layout = 0x00027095); +PROVIDE(flash_nrf_get_parameters = 0x000270a5); +PROVIDE(flash_nrf_get_size = 0x00031471); +PROVIDE(erase_op = 0x00031483); +PROVIDE(is_regular_addr_valid = 0x000314cb); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000314ed); +PROVIDE(flash_nrf_read = 0x000270ad); +PROVIDE(nrf_flash_init = 0x000270fd); +PROVIDE(flash_nrf_erase = 0x00027129); +PROVIDE(write_op = 0x0002720d); +PROVIDE(flash_nrf_write = 0x00027271); +PROVIDE(spi_nor_pages_layout = 0x0003150d); +PROVIDE(flash_nor_get_parameters = 0x00027335); +PROVIDE(flash_nor_get_size = 0x00031519); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00031525); +PROVIDE(release_device.isra.0 = 0x00031543); +PROVIDE(acquire_device.isra.0 = 0x00031547); +PROVIDE(spi_nor_access = 0x00031553); +PROVIDE(spi_nor_write_protection_set = 0x000315d7); +PROVIDE(spi_nor_rdsr = 0x00031613); +PROVIDE(spi_nor_wait_until_ready = 0x00031635); +PROVIDE(spi_nor_erase = 0x0002733d); +PROVIDE(spi_nor_write = 0x0003166f); +PROVIDE(spi_nor_read = 0x00031741); +PROVIDE(exit_dpd = 0x00031781); +PROVIDE(spi_nor_init = 0x00027455); +PROVIDE(gpio_nrfx_port_get_raw = 0x0003181f); +PROVIDE(gpio_nrfx_port_set_masked_raw = 0x0003182d); +PROVIDE(gpio_nrfx_port_set_bits_raw = 0x00031845); +PROVIDE(gpio_nrfx_port_clear_bits_raw = 0x00031851); +PROVIDE(gpio_nrfx_port_toggle_bits = 0x0003185d); +PROVIDE(gpio_nrfx_manage_callback = 0x00031877); +PROVIDE(gpio_nrfx_init = 0x00027759); +PROVIDE(nrfx_gpio_handler = 0x000277a1); +PROVIDE(gpio_nrfx_pin_configure = 0x000277dd); +PROVIDE(gpio_nrfx_pin_interrupt_configure = 0x00027959); +PROVIDE(irq_connect0 = 0x000318c9); +PROVIDE(irq_connect1 = 0x000318d3); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00027a4d); +PROVIDE(event_handler = 0x00027a71); +PROVIDE(i2c_nrfx_twim_init = 0x000318dd); +PROVIDE(i2c_nrfx_twim_transfer = 0x00027aa9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00031903); +PROVIDE(pinctrl_apply_state.isra.0 = 0x00031923); +PROVIDE(uarte_nrfx_err_check = 0x00031999); +PROVIDE(uarte_nrfx_poll_in = 0x000319a7); +PROVIDE(uarte_nrfx_fifo_read = 0x000319cd); +PROVIDE(uarte_nrfx_irq_tx_enable = 0x000319f5); +PROVIDE(uarte_nrfx_irq_tx_disable = 0x00031a29); +PROVIDE(uarte_nrfx_irq_tx_ready_complete = 0x00031a39); +PROVIDE(uarte_nrfx_irq_rx_ready = 0x00031a57); +PROVIDE(uarte_nrfx_irq_rx_enable = 0x00031a67); +PROVIDE(uarte_nrfx_irq_rx_disable = 0x00031a73); +PROVIDE(uarte_nrfx_irq_err_enable = 0x00031a7f); +PROVIDE(uarte_nrfx_irq_err_disable = 0x00031a8d); +PROVIDE(uarte_nrfx_irq_is_pending = 0x00031a9b); +PROVIDE(uarte_nrfx_irq_update = 0x00031ad1); +PROVIDE(uarte_nrfx_irq_callback_set = 0x00031ad5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00027efd); +PROVIDE(is_tx_ready.isra.0 = 0x00031ae1); +PROVIDE(uarte_nrfx_isr_int = 0x00031b01); +PROVIDE(uarte_nrfx_poll_out = 0x00027f21); +PROVIDE(uarte_0_init = 0x00027fd5); +PROVIDE(uarte_nrfx_fifo_fill = 0x00031b89); +PROVIDE(irq_connect2 = 0x00031c1b); +PROVIDE(spi_context_get_next_buf.constprop.0 = 0x00031c25); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00031c4b); +PROVIDE(gpio_pin_set_dt.isra.0 = 0x00031c69); +PROVIDE(spi_context_unlock_unconditionally = 0x00031c91); +PROVIDE(spi_nrfx_release = 0x00031cc1); +PROVIDE(spi_nrfx_init = 0x000280fd); +PROVIDE(transfer_next_chunk = 0x00028221); +PROVIDE(event_handler = 0x00028291); +PROVIDE(spi_nrfx_transceive = 0x00028375); +PROVIDE(event_clear = 0x00031ce5); +PROVIDE(compare_int_lock = 0x00028899); +PROVIDE(sys_clock_timeout_handler = 0x000288e1); +PROVIDE(compare_int_unlock = 0x00028929); +PROVIDE(compare_set = 0x000289c9); +PROVIDE(sys_clock_driver_init = 0x00028af9); +PROVIDE(nrf52_errata_12 = 0x00031d05); +PROVIDE(nrf52_errata_136 = 0x00031d05); +PROVIDE(nrf52_errata_108 = 0x00031d05); +PROVIDE(nrf52_errata_36 = 0x00031d05); +PROVIDE(nrf52_errata_31 = 0x00031d05); +PROVIDE(nrf52_errata_16 = 0x00028ccd); +PROVIDE(nrf52_errata_57 = 0x00028ccd); +PROVIDE(nrf52_errata_37 = 0x00028ccd); +PROVIDE(nrf52_errata_32 = 0x00028ccd); +PROVIDE(clock_stop = 0x00029011); +PROVIDE(nrf_gpio_pin_port_decode = 0x00031d43); +PROVIDE(nrf_gpio_reconfigure = 0x00031d57); +PROVIDE(nrf_gpio_cfg_sense_set = 0x00031de9); +PROVIDE(call_handler.constprop.0 = 0x00029281); +PROVIDE(latch_pending_read_and_check = 0x00031e07); +PROVIDE(release_handler.isra.0 = 0x000292bd); +PROVIDE(__nrfy_internal_gpiote_events_process.constprop.0 = 0x00029311); +PROVIDE(pin_in_event_get.isra.0 = 0x0002936d); +PROVIDE(pin_trigger_disable = 0x0002938d); +PROVIDE(pin_uninit = 0x000293cd); +PROVIDE(nvmc_word_write = 0x00029945); +PROVIDE(nrf_gpio_pin_port_decode = 0x00031e4d); +PROVIDE(nrf_gpio_pin_set = 0x00031e61); +PROVIDE(nrf_gpio_pin_clear = 0x00031e7b); +PROVIDE(transfer_byte = 0x00031e95); +PROVIDE(nrf_gpio_cfg_output = 0x000299c5); +PROVIDE(spi_configure = 0x000299f1); +PROVIDE(nrf_gpio_cfg_default = 0x00029b11); +PROVIDE(xfer_completeness_check = 0x00031efb); +PROVIDE(__nrfy_internal_twim_event_handle.isra.0 = 0x00031f5d); +PROVIDE(__nrfy_internal_twim_events_process.constprop.0 = 0x00031f7f); +PROVIDE(twim_configure = 0x00029d51); +PROVIDE(pins_configure = 0x00029d8d); +PROVIDE(irq_handler = 0x00029ded); +PROVIDE(nrf_gpio_pin_port_decode = 0x00031fd3); +PROVIDE(nrf_gpio_pin_set = 0x00031fe7); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00032051); +PROVIDE(do_device_init = 0x00032087); +PROVIDE(z_sys_init_run_level = 0x0002a749); +PROVIDE(bg_thread_main = 0x0002a779); +PROVIDE(statics_init = 0x0002a9c9); +PROVIDE(create_free_list = 0x000321bf); +PROVIDE(init_mem_slab_obj_core_list = 0x0002a9ed); +PROVIDE(init_mbox_module = 0x0002aa11); +PROVIDE(unpend_thread_no_timeout = 0x00032219); +PROVIDE(adjust_owner_prio.isra.0 = 0x0003239f); +PROVIDE(unpend_thread_no_timeout = 0x000323bd); +PROVIDE(queue_insert = 0x000323d7); +PROVIDE(k_sys_work_q_init = 0x0002af69); +PROVIDE(flag_test_and_clear = 0x0003268d); +PROVIDE(unschedule_locked = 0x000326a3); +PROVIDE(notify_queue_locked.isra.0 = 0x000326c1); +PROVIDE(work_queue_main = 0x0002af9d); +PROVIDE(cancel_async_locked = 0x000326cf); +PROVIDE(submit_to_queue_locked = 0x0002b0e9); +PROVIDE(work_timeout = 0x00032735); +PROVIDE(unpend_thread_no_timeout = 0x000327d5); +PROVIDE(sys_dlist_remove = 0x00032855); +PROVIDE(unpend_thread_no_timeout = 0x00032865); +PROVIDE(z_swap_irqlock = 0x0002b595); +PROVIDE(ready_thread = 0x0002b5c9); +PROVIDE(unready_thread = 0x0002b64d); +PROVIDE(add_to_waitq_locked = 0x00032879); +PROVIDE(z_tick_sleep = 0x0002bb49); +PROVIDE(wait_for = 0x00032a43); +PROVIDE(z_sched_wake_all.constprop.0 = 0x00032ab5); +PROVIDE(slice_timeout = 0x0002bf29); +PROVIDE(first = 0x0002c125); +PROVIDE(elapsed = 0x0002c135); +PROVIDE(next_timeout = 0x00032ceb); +PROVIDE(remove_timeout = 0x0002c149); +PROVIDE(clear_event_registrations = 0x0002c501); +PROVIDE(add_event = 0x00032e65); +PROVIDE(register_events = 0x00032eb9); +PROVIDE(signal_poll_event = 0x00032fbd); +PROVIDE(z_heap_aligned_alloc = 0x000330b9); +PROVIDE(__ultoa_invert = 0x00033379); +PROVIDE(skip_to_arg = 0x0002cd4d); +PROVIDE(mulShift64 = 0x000333c9); +PROVIDE(mulShiftAll64 = 0x0003342b); +PROVIDE(div10 = 0x0002da05); +PROVIDE(chunk_size = 0x0002eacd); +PROVIDE(free_list_add = 0x0002ead7); +PROVIDE(free_list_remove_bidx = 0x0002eb25); +PROVIDE(free_list_remove = 0x0002eb5f); +PROVIDE(alloc_chunk = 0x0002eb79); +PROVIDE(merge_chunks = 0x0002ebe7); +PROVIDE(split_chunks = 0x0002ec13); +PROVIDE(free_chunk = 0x0002ec47); +PROVIDE(ring_buf_put_claim = 0x0002f417); +PROVIDE(ring_buf_get_claim = 0x0002f435); +PROVIDE(panic = 0x000304cd); +PROVIDE(process_log_msg.constprop.0 = 0x000304cf); +PROVIDE(process = 0x0003055b); +PROVIDE(dropped = 0x0003059b); +PROVIDE(remove_from_tail.part.0 = 0x000308a1); +PROVIDE(foldcase = 0x00030cc5); +PROVIDE(fnmatchx = 0x00030cd5); +PROVIDE(ah = 0x00030fe1); +PROVIDE(flash_get_page_info = 0x000313d5); +PROVIDE(isr_radio = 0x00024555); +PROVIDE(ull_chan_map_get = 0x0001ed01); +PROVIDE(main = 0x0002eabf); PROVIDE(__aeabi_ul2d = 0x00000441); -PROVIDE(lll_adv_connect_ind_check = 0x00021719); -PROVIDE(lll_preempt_calc = 0x000209b5); -PROVIDE(ll_apto_get = 0x000184b9); -PROVIDE(ticker_update = 0x0000e445); -PROVIDE(ull_scan_disable = 0x0001709d); -PROVIDE(llcp_pdu_encode_phy_req = 0x0001c889); -PROVIDE(mem_acquire = 0x0000cab5); -PROVIDE(radio_aa_set = 0x000244e5); -PROVIDE(hci_disconn_complete_encode = 0x00012f11); +PROVIDE(lll_adv_connect_ind_check = 0x00021919); +PROVIDE(lll_preempt_calc = 0x00020bb5); +PROVIDE(ll_apto_get = 0x000186b9); +PROVIDE(ticker_update = 0x0000e645); +PROVIDE(ull_scan_disable = 0x0001729d); +PROVIDE(llcp_pdu_encode_phy_req = 0x0001ca89); +PROVIDE(mem_acquire = 0x0000ccb5); +PROVIDE(radio_aa_set = 0x000246e5); +PROVIDE(hci_disconn_complete_encode = 0x00013111); PROVIDE(__floatdidf = 0x00000451); -PROVIDE(memcmp = 0x0003303d); -PROVIDE(lll_conn_force_md_cnt_set = 0x000240a9); -PROVIDE(z_shell_fprintf_fmt = 0x0000a97d); -PROVIDE(llcp_rr_get_collision = 0x0001dde9); -PROVIDE(ull_dle_max_time_get = 0x00018d01); -PROVIDE(z_shell_op_cursor_vert_move = 0x0000aa91); -PROVIDE(radio_tmr_start = 0x00024909); -PROVIDE(llcp_rp_chmu_run = 0x0001dad5); -PROVIDE(ll_adv_aux_ad_data_set = 0x00015c51); -PROVIDE(ll_adv_set_by_hci_handle_get_or_new = 0x00014475); -PROVIDE(net_buf_alloc_len = 0x0000c5c9); -PROVIDE(radio_is_done = 0x00024621); -PROVIDE(ll_pdu_rx_alloc = 0x0000f839); -PROVIDE(ull_prepare_dequeue_iter = 0x0000fc25); +PROVIDE(memcmp = 0x0003323d); +PROVIDE(lll_conn_force_md_cnt_set = 0x000242a9); +PROVIDE(z_shell_fprintf_fmt = 0x0000ab7d); +PROVIDE(llcp_rr_get_collision = 0x0001dfe9); +PROVIDE(ull_dle_max_time_get = 0x00018f01); +PROVIDE(z_shell_op_cursor_vert_move = 0x0000ac91); +PROVIDE(radio_tmr_start = 0x00024b09); +PROVIDE(llcp_rp_chmu_run = 0x0001dcd5); +PROVIDE(ll_adv_aux_ad_data_set = 0x00015e51); +PROVIDE(ll_adv_set_by_hci_handle_get_or_new = 0x00014675); +PROVIDE(net_buf_alloc_len = 0x0000c7c9); +PROVIDE(radio_is_done = 0x00024821); +PROVIDE(ll_pdu_rx_alloc = 0x0000fa39); +PROVIDE(ull_prepare_dequeue_iter = 0x0000fe25); PROVIDE(__aeabi_cdcmple = 0x0000096d); -PROVIDE(z_shell_history_init = 0x00030829); -PROVIDE(tanl = 0x0002e035); -PROVIDE(z_impl_k_timer_status_sync = 0x0002c2ad); -PROVIDE(llext_call_fn = 0x00030efd); -PROVIDE(abort = 0x0000c29d); -PROVIDE(ull_conn_peer_connected = 0x00018651); -PROVIDE(ticker_start_ext = 0x0000e385); -PROVIDE(ull_scan_aux_lll_handle_get = 0x000178cd); -PROVIDE(ull_cp_feature_exchange = 0x0001ae79); -PROVIDE(nrfx_gpiote_output_configure = 0x000293a1); -PROVIDE(is_ptr = 0x0002eded); -PROVIDE(arch_irq_unlock_outlined = 0x00030a69); -PROVIDE(ull_filter_lll_lrpa_get = 0x0001fc55); -PROVIDE(__wrap_realloc = 0x0000c331); -PROVIDE(z_row_span_with_buffer_offsets_get = 0x0002fad7); -PROVIDE(__pow5Factor = 0x0002dd0d); -PROVIDE(llcp_rp_comm_rx = 0x0001be85); -PROVIDE(char2hex = 0x0002eec7); -PROVIDE(llcp_rp_pu_tx_ack = 0x0001a7d9); -PROVIDE(shell_thread = 0x0000a68d); -PROVIDE(sys_clock_announce = 0x0002c06d); -PROVIDE(llcp_pdu_encode_enc_rsp = 0x0001c7c5); -PROVIDE(lll_adv_scan_req_report = 0x000216d5); -PROVIDE(radio_crc_configure = 0x0002464d); -PROVIDE(arch_system_halt = 0x00031e71); -PROVIDE(cntr_cnt_get = 0x00024339); -PROVIDE(pinctrl_lookup_state = 0x00031773); -PROVIDE(log_filter_get = 0x00008a95); -PROVIDE(z_impl_k_queue_init = 0x000322cf); +PROVIDE(z_shell_history_init = 0x00030a29); +PROVIDE(tanl = 0x0002e235); +PROVIDE(z_impl_k_timer_status_sync = 0x0002c4ad); +PROVIDE(llext_call_fn = 0x000310fd); +PROVIDE(abort = 0x0000c49d); +PROVIDE(ull_conn_peer_connected = 0x00018851); +PROVIDE(ticker_start_ext = 0x0000e585); +PROVIDE(ull_scan_aux_lll_handle_get = 0x00017acd); +PROVIDE(ull_cp_feature_exchange = 0x0001b079); +PROVIDE(nrfx_gpiote_output_configure = 0x000295a1); +PROVIDE(is_ptr = 0x0002efed); +PROVIDE(arch_irq_unlock_outlined = 0x00030c69); +PROVIDE(ull_filter_lll_lrpa_get = 0x0001fe55); +PROVIDE(__wrap_realloc = 0x0000c531); +PROVIDE(z_row_span_with_buffer_offsets_get = 0x0002fcd7); +PROVIDE(__pow5Factor = 0x0002df0d); +PROVIDE(llcp_rp_comm_rx = 0x0001c085); +PROVIDE(char2hex = 0x0002f0c7); +PROVIDE(llcp_rp_pu_tx_ack = 0x0001a9d9); +PROVIDE(shell_thread = 0x0000a88d); +PROVIDE(sys_clock_announce = 0x0002c26d); +PROVIDE(llcp_pdu_encode_enc_rsp = 0x0001c9c5); +PROVIDE(lll_adv_scan_req_report = 0x000218d5); +PROVIDE(radio_crc_configure = 0x0002484d); +PROVIDE(arch_system_halt = 0x00032071); +PROVIDE(cntr_cnt_get = 0x00024539); +PROVIDE(pinctrl_lookup_state = 0x00031973); +PROVIDE(log_filter_get = 0x00008c95); +PROVIDE(z_impl_k_queue_init = 0x000324cf); PROVIDE(__aeabi_fcmplt = 0x00000df5); -PROVIDE(net_buf_unref = 0x0000c6c9); +PROVIDE(net_buf_unref = 0x0000c8c9); PROVIDE(__aeabi_fadd = 0x00000b49); -PROVIDE(ull_cp_prt_elapse = 0x0001ad11); +PROVIDE(ull_cp_prt_elapse = 0x0001af11); PROVIDE(__aeabi_ui2f = 0x00000ca9); -PROVIDE(ull_adv_is_enabled = 0x00014c35); +PROVIDE(ull_adv_is_enabled = 0x00014e35); PROVIDE(__aeabi_ui2d = 0x000003b9); -PROVIDE(log_msg_get_source_id = 0x00008c81); -PROVIDE(z_impl_k_pipe_init = 0x000328cf); -PROVIDE(z_log_msg_alloc = 0x0002f39f); -PROVIDE(ull_adv_is_enabled_get = 0x00014c19); -PROVIDE(_sin = 0x0002dfa9); +PROVIDE(log_msg_get_source_id = 0x00008e81); +PROVIDE(z_impl_k_pipe_init = 0x00032acf); +PROVIDE(z_log_msg_alloc = 0x0002f59f); +PROVIDE(ull_adv_is_enabled_get = 0x00014e19); +PROVIDE(_sin = 0x0002e1a9); PROVIDE(__aeabi_dsub = 0x0000013d); PROVIDE(__ltsf2 = 0x00000d61); -PROVIDE(llcp_rr_disconnect = 0x0001e1cd); +PROVIDE(llcp_rr_disconnect = 0x0001e3cd); PROVIDE(vfscanf = 0x00000001); -PROVIDE(srandom = 0x0002c4e5); -PROVIDE(z_shell_vfprintf = 0x0003015d); -PROVIDE(k_thread_name_get = 0x00032609); -PROVIDE(__printk_hook_install = 0x00008479); -PROVIDE(ull_adv_aux_did_next_unique_get = 0x00015891); -PROVIDE(lll_chan_id = 0x0001ebad); -PROVIDE(ll_enc_req_send = 0x0001e741); -PROVIDE(ll_addr_set = 0x0000e715); -PROVIDE(llcp_pdu_decode_chan_map_update_ind = 0x0001cb3d); -PROVIDE(printk = 0x0002ee3f); -PROVIDE(z_arm_exc_spurious = 0x0000bfa5); -PROVIDE(ull_cp_state_set = 0x0001adb1); -PROVIDE(radio_nrf5_isr = 0x00020131); -PROVIDE(tan = 0x0002e035); -PROVIDE(z_impl_k_queue_alloc_prepend = 0x00032391); -PROVIDE(ull_conn_link_tx_release = 0x00018a99); -PROVIDE(lll_adv_pdu_latest_get = 0x00021379); +PROVIDE(srandom = 0x0002c6e5); +PROVIDE(z_shell_vfprintf = 0x0003035d); +PROVIDE(k_thread_name_get = 0x00032809); +PROVIDE(__printk_hook_install = 0x00008679); +PROVIDE(ull_adv_aux_did_next_unique_get = 0x00015a91); +PROVIDE(lll_chan_id = 0x0001edad); +PROVIDE(ll_enc_req_send = 0x0001e941); +PROVIDE(ll_addr_set = 0x0000e915); +PROVIDE(llcp_pdu_decode_chan_map_update_ind = 0x0001cd3d); +PROVIDE(printk = 0x0002f03f); +PROVIDE(z_arm_exc_spurious = 0x0000c1a5); +PROVIDE(ull_cp_state_set = 0x0001afb1); +PROVIDE(radio_nrf5_isr = 0x00020331); +PROVIDE(tan = 0x0002e235); +PROVIDE(z_impl_k_queue_alloc_prepend = 0x00032591); +PROVIDE(ull_conn_link_tx_release = 0x00018c99); +PROVIDE(lll_adv_pdu_latest_get = 0x00021579); PROVIDE(__eqsf2 = 0x00000d69); -PROVIDE(z_impl_k_mutex_init = 0x000321af); -PROVIDE(lll_adv_scan_req_check = 0x00021665); -PROVIDE(lll_rand_isr_get = 0x00020795); -PROVIDE(llcp_pdu_decode_phy_update_ind = 0x0001c8fd); -PROVIDE(ull_conn_reset = 0x00018599); -PROVIDE(radio_pkt_decrypt_get = 0x00024689); -PROVIDE(llcp_pdu_encode_start_enc_rsp = 0x0001c809); -PROVIDE(hci_get_class = 0x00013b51); -PROVIDE(z_shell_print_stream = 0x00030159); -PROVIDE(ull_tx_q_pause_data = 0x0001a7f9); -PROVIDE(z_shell_op_delete_from_cursor = 0x0003007d); -PROVIDE(lll_prepare_resolve = 0x00020bd1); -PROVIDE(z_arm_cpu_idle_init = 0x0000c1f5); +PROVIDE(z_impl_k_mutex_init = 0x000323af); +PROVIDE(lll_adv_scan_req_check = 0x00021865); +PROVIDE(lll_rand_isr_get = 0x00020995); +PROVIDE(llcp_pdu_decode_phy_update_ind = 0x0001cafd); +PROVIDE(ull_conn_reset = 0x00018799); +PROVIDE(radio_pkt_decrypt_get = 0x00024889); +PROVIDE(llcp_pdu_encode_start_enc_rsp = 0x0001ca09); +PROVIDE(hci_get_class = 0x00013d51); +PROVIDE(z_shell_print_stream = 0x00030359); +PROVIDE(ull_tx_q_pause_data = 0x0001a9f9); +PROVIDE(z_shell_op_delete_from_cursor = 0x0003027d); +PROVIDE(lll_prepare_resolve = 0x00020dd1); +PROVIDE(z_arm_cpu_idle_init = 0x0000c3f5); PROVIDE(__floatundidf = 0x00000441); -PROVIDE(z_impl_k_msgq_purge = 0x00032119); -PROVIDE(sys_clock_elapsed = 0x00028ab9); -PROVIDE(z_impl_k_poll_signal_init = 0x00032e9f); -PROVIDE(__file_str_put = 0x0003353d); -PROVIDE(ull_periph_latency_cancel = 0x0001e419); -PROVIDE(z_do_kernel_oops = 0x00030a0b); +PROVIDE(z_impl_k_msgq_purge = 0x00032319); +PROVIDE(sys_clock_elapsed = 0x00028cb9); +PROVIDE(z_impl_k_poll_signal_init = 0x0003309f); +PROVIDE(__file_str_put = 0x0003373d); +PROVIDE(ull_periph_latency_cancel = 0x0001e619); +PROVIDE(z_do_kernel_oops = 0x00030c0b); PROVIDE(__floatsisf = 0x00000cb1); -PROVIDE(z_impl_k_thread_name_set = 0x0002b1a5); -PROVIDE(pinctrl_configure_pins = 0x00027bb1); -PROVIDE(z_impl_log_filter_set = 0x0002f3a7); -PROVIDE(ring_buf_area_claim = 0x0002f1e7); -PROVIDE(srand = 0x00033039); -PROVIDE(z_thread_monitor_exit = 0x0002be35); -PROVIDE(lll_adv_sync_prepare = 0x000220dd); -PROVIDE(ll_tx_ack_put = 0x0000f865); -PROVIDE(ull_adv_aux_pdu_set_clear = 0x000153f1); -PROVIDE(llcp_pdu_encode_start_enc_req = 0x0001c7f5); -PROVIDE(z_impl_k_queue_get = 0x0002ab5d); -PROVIDE(shell_help = 0x0002fa0d); -PROVIDE(z_data_copy = 0x0002beed); -PROVIDE(net_buf_frag_add = 0x00030d3f); -PROVIDE(ull_cp_terminate = 0x0001afdd); -PROVIDE(llcp_rr_rx = 0x0001e05d); -PROVIDE(radio_freq_chan_set = 0x000244b1); -PROVIDE(z_impl_k_msgq_put = 0x0002a845); -PROVIDE(ll_terminate_ind_send = 0x000181e1); -PROVIDE(radio_is_address = 0x0002460d); -PROVIDE(mayfly_pend = 0x00024fa1); -PROVIDE(ull_adv_aux_chm_update = 0x00015399); -PROVIDE(snprintf = 0x0002c571); -PROVIDE(radio_pkt_configure = 0x0002450d); -PROVIDE(z_impl_k_thread_priority_get = 0x00032603); -PROVIDE(ull_conn_default_phy_rx_get = 0x00018645); +PROVIDE(z_impl_k_thread_name_set = 0x0002b3a5); +PROVIDE(pinctrl_configure_pins = 0x00027db1); +PROVIDE(z_impl_log_filter_set = 0x0002f5a7); +PROVIDE(ring_buf_area_claim = 0x0002f3e7); +PROVIDE(srand = 0x00033239); +PROVIDE(z_thread_monitor_exit = 0x0002c035); +PROVIDE(lll_adv_sync_prepare = 0x000222dd); +PROVIDE(ll_tx_ack_put = 0x0000fa65); +PROVIDE(ull_adv_aux_pdu_set_clear = 0x000155f1); +PROVIDE(llcp_pdu_encode_start_enc_req = 0x0001c9f5); +PROVIDE(z_impl_k_queue_get = 0x0002ad5d); +PROVIDE(shell_help = 0x0002fc0d); +PROVIDE(z_data_copy = 0x0002c0ed); +PROVIDE(net_buf_frag_add = 0x00030f3f); +PROVIDE(ull_cp_terminate = 0x0001b1dd); +PROVIDE(llcp_rr_rx = 0x0001e25d); +PROVIDE(radio_freq_chan_set = 0x000246b1); +PROVIDE(z_impl_k_msgq_put = 0x0002aa45); +PROVIDE(ll_terminate_ind_send = 0x000183e1); +PROVIDE(radio_is_address = 0x0002480d); +PROVIDE(mayfly_pend = 0x000251a1); +PROVIDE(ull_adv_aux_chm_update = 0x00015599); +PROVIDE(snprintf = 0x0002c771); +PROVIDE(radio_pkt_configure = 0x0002470d); +PROVIDE(z_impl_k_thread_priority_get = 0x00032803); +PROVIDE(ull_conn_default_phy_rx_get = 0x00018845); PROVIDE(__gtdf2 = 0x000008d1); -PROVIDE(cosl = 0x0002df1d); -PROVIDE(k_queue_prepend = 0x00032369); -PROVIDE(lll_adv_aux_reset = 0x00021f7d); -PROVIDE(nrfx_twim_disable = 0x00029e61); -PROVIDE(bt_hci_cmd_status_create = 0x00030eb9); -PROVIDE(isprint = 0x00032fbf); -PROVIDE(z_work_submit_to_queue = 0x00032571); -PROVIDE(llcp_rp_enc_ltk_req_reply = 0x00019991); -PROVIDE(ull_conn_chan_map_set = 0x00018cdd); -PROVIDE(llext_adjust_mmu_permissions = 0x00030f79); -PROVIDE(z_init_static = 0x00031ecf); +PROVIDE(cosl = 0x0002e11d); +PROVIDE(k_queue_prepend = 0x00032569); +PROVIDE(lll_adv_aux_reset = 0x0002217d); +PROVIDE(nrfx_twim_disable = 0x0002a061); +PROVIDE(bt_hci_cmd_status_create = 0x000310b9); +PROVIDE(isprint = 0x000331bf); +PROVIDE(z_work_submit_to_queue = 0x00032771); +PROVIDE(llcp_rp_enc_ltk_req_reply = 0x00019b91); +PROVIDE(ull_conn_chan_map_set = 0x00018edd); +PROVIDE(llext_adjust_mmu_permissions = 0x00031179); +PROVIDE(z_init_static = 0x000320cf); PROVIDE(__aeabi_fcmple = 0x00000e09); -PROVIDE(z_impl_k_thread_abort = 0x0000c001); -PROVIDE(lll_conn_abort_cb = 0x00023761); -PROVIDE(llcp_pdu_decode_feature_req = 0x0001c5d1); -PROVIDE(shell_fprintf_impl = 0x0002f93d); -PROVIDE(llext_by_name = 0x0002531d); +PROVIDE(z_impl_k_thread_abort = 0x0000c201); +PROVIDE(lll_conn_abort_cb = 0x00023961); +PROVIDE(llcp_pdu_decode_feature_req = 0x0001c7d1); +PROVIDE(shell_fprintf_impl = 0x0002fb3d); +PROVIDE(llext_by_name = 0x0002551d); PROVIDE(__ltdf2 = 0x000008d9); -PROVIDE(radio_filter_configure = 0x00024849); -PROVIDE(onoff_request = 0x0002f061); -PROVIDE(__d_vfprintf = 0x0002cc85); -PROVIDE(ull_scan_aux_done = 0x00017835); +PROVIDE(radio_filter_configure = 0x00024a49); +PROVIDE(onoff_request = 0x0002f261); +PROVIDE(__d_vfprintf = 0x0002ce85); +PROVIDE(ull_scan_aux_done = 0x00017a35); PROVIDE(ull_sched_after_cen_slot_get = 0x00004d29); -PROVIDE(radio_rssi_is_ready = 0x00024835); -PROVIDE(radio_ar_match_get = 0x00024dbd); -PROVIDE(shell_process = 0x00009fd1); +PROVIDE(radio_rssi_is_ready = 0x00024a35); +PROVIDE(radio_ar_match_get = 0x00024fbd); +PROVIDE(shell_process = 0x0000a1d1); PROVIDE(CONFIG_LOG_FUNC_NAME_PREFIX_DBG = 0x00000001); -PROVIDE(z_reset_time_slice = 0x0002bd85); -PROVIDE(llcp_rr_peek = 0x0001ddf5); -PROVIDE(lll_done = 0x00020869); -PROVIDE(ull_scan_aux_release = 0x00017929); -PROVIDE(z_impl_k_thread_priority_set = 0x0002b841); -PROVIDE(cos = 0x0002df1d); +PROVIDE(z_reset_time_slice = 0x0002bf85); +PROVIDE(llcp_rr_peek = 0x0001dff5); +PROVIDE(lll_done = 0x00020a69); +PROVIDE(ull_scan_aux_release = 0x00017b29); +PROVIDE(z_impl_k_thread_priority_set = 0x0002ba41); +PROVIDE(cos = 0x0002e11d); PROVIDE(strcmp = 0x00000f7d); -PROVIDE(z_setup_new_thread = 0x0002b249); +PROVIDE(z_setup_new_thread = 0x0002b449); PROVIDE(__lesf2 = 0x00000d61); -PROVIDE(z_shell_op_cursor_horiz_move = 0x0000aabd); -PROVIDE(llcp_ntf_encode_feature_rsp = 0x0001c595); -PROVIDE(llcp_rr_tx_ack = 0x0001e151); -PROVIDE(z_impl_k_thread_create = 0x0002b31d); -PROVIDE(__umul128 = 0x000333a1); -PROVIDE(nrfx_gpiote_channel_get = 0x00029499); -PROVIDE(ull_adv_aux_handle_get = 0x00015911); -PROVIDE(arch_cpu_idle = 0x00030a77); -PROVIDE(z_impl_log_frontend_filter_set = 0x0002f3b7); -PROVIDE(ll_tx_pwr_lvl_get = 0x0000e6ed); -PROVIDE(z_impl_k_sleep = 0x000327af); -PROVIDE(ll_radio_state_abort = 0x0000f8d1); -PROVIDE(llcp_tx_alloc_peek = 0x0001aab5); -PROVIDE(llcp_ntf_alloc = 0x0001aaed); -PROVIDE(sys_heap_init = 0x0002ed11); -PROVIDE(net_buf_alloc_fixed = 0x00030d19); -PROVIDE(nrfx_nvmc_flash_page_size_get = 0x00031c3d); -PROVIDE(ull_pdu_rx_alloc = 0x0000fb09); -PROVIDE(ll_rl_clear = 0x0001f059); -PROVIDE(z_shell_fprintf = 0x000301a9); -PROVIDE(memq_peek = 0x0000cb81); -PROVIDE(radio_tmr_status_reset = 0x000248d1); -PROVIDE(i2c_nrfx_twim_msg_transfer = 0x00027ab9); -PROVIDE(ull_is_lll_tx_queue_empty = 0x00018ff1); -PROVIDE(z_nrf_clock_control_lf_on = 0x00026aa1); -PROVIDE(radio_tmr_aa_restore = 0x00024b9d); +PROVIDE(z_shell_op_cursor_horiz_move = 0x0000acbd); +PROVIDE(llcp_ntf_encode_feature_rsp = 0x0001c795); +PROVIDE(llcp_rr_tx_ack = 0x0001e351); +PROVIDE(z_impl_k_thread_create = 0x0002b51d); +PROVIDE(__umul128 = 0x000335a1); +PROVIDE(nrfx_gpiote_channel_get = 0x00029699); +PROVIDE(ull_adv_aux_handle_get = 0x00015b11); +PROVIDE(arch_cpu_idle = 0x00030c77); +PROVIDE(z_impl_log_frontend_filter_set = 0x0002f5b7); +PROVIDE(ll_tx_pwr_lvl_get = 0x0000e8ed); +PROVIDE(z_impl_k_sleep = 0x000329af); +PROVIDE(ll_radio_state_abort = 0x0000fad1); +PROVIDE(llcp_tx_alloc_peek = 0x0001acb5); +PROVIDE(llcp_ntf_alloc = 0x0001aced); +PROVIDE(sys_heap_init = 0x0002ef11); +PROVIDE(net_buf_alloc_fixed = 0x00030f19); +PROVIDE(nrfx_nvmc_flash_page_size_get = 0x00031e3d); +PROVIDE(ull_pdu_rx_alloc = 0x0000fd09); +PROVIDE(ll_rl_clear = 0x0001f259); +PROVIDE(z_shell_fprintf = 0x000303a9); +PROVIDE(memq_peek = 0x0000cd81); +PROVIDE(radio_tmr_status_reset = 0x00024ad1); +PROVIDE(i2c_nrfx_twim_msg_transfer = 0x00027cb9); +PROVIDE(ull_is_lll_tx_queue_empty = 0x000191f1); +PROVIDE(z_nrf_clock_control_lf_on = 0x00026ca1); +PROVIDE(radio_tmr_aa_restore = 0x00024d9d); PROVIDE(ull_sched_mfy_after_cen_offset_get = 0x00004dd9); -PROVIDE(ticker_worker = 0x0000d379); -PROVIDE(radio_switch_complete_and_rx = 0x00024691); -PROVIDE(z_impl_k_queue_peek_head = 0x000323a5); -PROVIDE(memset = 0x00032f4f); -PROVIDE(ull_filter_adv_scan_state_cb = 0x0001f62d); +PROVIDE(ticker_worker = 0x0000d579); +PROVIDE(radio_switch_complete_and_rx = 0x00024891); +PROVIDE(z_impl_k_queue_peek_head = 0x000325a5); +PROVIDE(memset = 0x0003314f); +PROVIDE(ull_filter_adv_scan_state_cb = 0x0001f82d); PROVIDE(__gedf2 = 0x000008d1); -PROVIDE(nrfx_spi_init = 0x0002993d); -PROVIDE(llcp_rr_run = 0x0001e1b5); -PROVIDE(ll_deinit = 0x0000f119); -PROVIDE(k_thread_foreach = 0x0002be71); -PROVIDE(onoff_cancel = 0x0002f157); +PROVIDE(nrfx_spi_init = 0x00029b3d); +PROVIDE(llcp_rr_run = 0x0001e3b5); +PROVIDE(ll_deinit = 0x0000f319); +PROVIDE(k_thread_foreach = 0x0002c071); +PROVIDE(onoff_cancel = 0x0002f357); PROVIDE(__floatdisf = 0x00000cdd); -PROVIDE(llcp_pdu_encode_chan_map_update_ind = 0x0001cb15); +PROVIDE(llcp_pdu_encode_chan_map_update_ind = 0x0001cd15); PROVIDE(ull_conn_done = 0x00003979); -PROVIDE(ull_scan_set_get = 0x00017491); -PROVIDE(sys_notify_finalize = 0x0002f1b5); -PROVIDE(__do_global_ctors_aux = 0x0002a791); -PROVIDE(radio_tx_power_set = 0x000244a5); -PROVIDE(z_time_slice = 0x0002bdd5); +PROVIDE(ull_scan_set_get = 0x00017691); +PROVIDE(sys_notify_finalize = 0x0002f3b5); +PROVIDE(__do_global_ctors_aux = 0x0002a991); +PROVIDE(radio_tx_power_set = 0x000246a5); +PROVIDE(z_time_slice = 0x0002bfd5); PROVIDE(__aeabi_ddiv = 0x00000701); -PROVIDE(bt_rpa_create = 0x00030e43); -PROVIDE(ull_scan_term_dequeue = 0x00017441); -PROVIDE(llcp_pdu_encode_conn_update_ind = 0x0001ca9d); -PROVIDE(z_nrf_clock_bt_ctlr_hf_release = 0x00026a6d); -PROVIDE(z_irq_spurious = 0x00030a61); -PROVIDE(llcp_lr_connect = 0x0001c36d); -PROVIDE(z_shell_op_cursor_word_move = 0x0002ffb9); -PROVIDE(k_is_in_isr = 0x000325f7); -PROVIDE(lll_adv_init = 0x00021141); -PROVIDE(ull_event_done = 0x0000fdc9); -PROVIDE(ull_ticker_status_take = 0x0000f915); -PROVIDE(llcp_rr_get_paused_cmd = 0x0001dde5); -PROVIDE(__kernel_rem_pio2 = 0x0002e0e1); -PROVIDE(ull_adv_lll_handle_get = 0x00014bfd); -PROVIDE(z_arm_int_exit = 0x0000b931); -PROVIDE(llcp_rp_enc_ltk_req_neg_reply = 0x00019999); -PROVIDE(_ConfigAbsSyms = 0x0002f34b); -PROVIDE(nrfx_nvmc_page_erase = 0x0002975d); -PROVIDE(ring_buf_put = 0x0002f285); -PROVIDE(arm_irq_enable = 0x0000c0a9); +PROVIDE(bt_rpa_create = 0x00031043); +PROVIDE(ull_scan_term_dequeue = 0x00017641); +PROVIDE(llcp_pdu_encode_conn_update_ind = 0x0001cc9d); +PROVIDE(z_nrf_clock_bt_ctlr_hf_release = 0x00026c6d); +PROVIDE(z_irq_spurious = 0x00030c61); +PROVIDE(llcp_lr_connect = 0x0001c56d); +PROVIDE(z_shell_op_cursor_word_move = 0x000301b9); +PROVIDE(k_is_in_isr = 0x000327f7); +PROVIDE(lll_adv_init = 0x00021341); +PROVIDE(ull_event_done = 0x0000ffc9); +PROVIDE(ull_ticker_status_take = 0x0000fb15); +PROVIDE(llcp_rr_get_paused_cmd = 0x0001dfe5); +PROVIDE(__kernel_rem_pio2 = 0x0002e2e1); +PROVIDE(ull_adv_lll_handle_get = 0x00014dfd); +PROVIDE(z_arm_int_exit = 0x0000bb31); +PROVIDE(llcp_rp_enc_ltk_req_neg_reply = 0x00019b99); +PROVIDE(_ConfigAbsSyms = 0x0002f54b); +PROVIDE(nrfx_nvmc_page_erase = 0x0002995d); +PROVIDE(ring_buf_put = 0x0002f485); +PROVIDE(arm_irq_enable = 0x0000c2a9); PROVIDE(__extendsfdf2 = 0x000003fd); -PROVIDE(llcp_rr_prt_restart = 0x0001de1d); -PROVIDE(z_impl_k_timer_stop = 0x00032c0d); -PROVIDE(ticker_start = 0x0000e31d); -PROVIDE(llext_buf_peek = 0x000310bd); -PROVIDE(llcp_lr_disconnect = 0x0001c3b5); -PROVIDE(lll_conn_flush = 0x000236cd); -PROVIDE(lll_isr_early_abort = 0x00020b69); -PROVIDE(ull_adv_init = 0x00014b49); -PROVIDE(__wrap_malloc = 0x0000c2fd); -PROVIDE(ull_scan_lll_is_valid_get = 0x000174e5); -PROVIDE(flash_area_read = 0x0002f5e5); -PROVIDE(z_impl_k_poll = 0x0002c361); -PROVIDE(ull_adv_handle_get = 0x00014be5); -PROVIDE(ll_length_default_set = 0x00018379); -PROVIDE(SystemInit = 0x00028b05); -PROVIDE(sys_clock_cycle_get_32 = 0x00031afd); -PROVIDE(nrfx_twim_enable = 0x00029e41); -PROVIDE(llcp_pdu_encode_phy_rsp = 0x0001c8d1); +PROVIDE(llcp_rr_prt_restart = 0x0001e01d); +PROVIDE(z_impl_k_timer_stop = 0x00032e0d); +PROVIDE(ticker_start = 0x0000e51d); +PROVIDE(llext_buf_peek = 0x000312bd); +PROVIDE(llcp_lr_disconnect = 0x0001c5b5); +PROVIDE(lll_conn_flush = 0x000238cd); +PROVIDE(lll_isr_early_abort = 0x00020d69); +PROVIDE(ull_adv_init = 0x00014d49); +PROVIDE(__wrap_malloc = 0x0000c4fd); +PROVIDE(ull_scan_lll_is_valid_get = 0x000176e5); +PROVIDE(flash_area_read = 0x0002f7e5); +PROVIDE(z_impl_k_poll = 0x0002c561); +PROVIDE(ull_adv_handle_get = 0x00014de5); +PROVIDE(ll_length_default_set = 0x00018579); +PROVIDE(SystemInit = 0x00028d05); +PROVIDE(sys_clock_cycle_get_32 = 0x00031cfd); +PROVIDE(nrfx_twim_enable = 0x0002a041); +PROVIDE(llcp_pdu_encode_phy_rsp = 0x0001cad1); PROVIDE(__fixdfdi = 0x00000fb1); -PROVIDE(shell_init = 0x0000a885); -PROVIDE(sys_heap_aligned_realloc = 0x0002ebe9); -PROVIDE(llcp_pdu_decode_phy_rsp = 0x0001c939); -PROVIDE(ll_rx_link_alloc = 0x0000f785); +PROVIDE(shell_init = 0x0000aa85); +PROVIDE(sys_heap_aligned_realloc = 0x0002ede9); +PROVIDE(llcp_pdu_decode_phy_rsp = 0x0001cb39); +PROVIDE(ll_rx_link_alloc = 0x0000f985); PROVIDE(__gtsf2 = 0x00000d59); -PROVIDE(radio_phy_flags_rx_get = 0x000247fd); -PROVIDE(ull_adv_sync_add_to_acad = 0x00016c7d); -PROVIDE(ull_conn_lll_max_tx_octets_get = 0x00018c69); -PROVIDE(lll_clock_sca_local_get = 0x00020ef5); -PROVIDE(spi_nrfx_wake_init = 0x000285b5); -PROVIDE(__wrap_random = 0x0002c4ad); -PROVIDE(hci_vendor_read_key_hierarchy_roots = 0x00024259); -PROVIDE(llcp_lp_cu_run = 0x0001d8e5); -PROVIDE(nrfx_spi_2_irq_handler = 0x00029b11); -PROVIDE(llcp_rp_conn_param_req_neg_reply = 0x0001d94d); -PROVIDE(__math_invalid = 0x0002e0d1); -PROVIDE(ll_adv_aux_max_data_length_get = 0x000152c5); -PROVIDE(memmove = 0x00032f1b); -PROVIDE(ll_adv_scan_rsp_set = 0x00015125); -PROVIDE(z_nrf_rtc_timer_read = 0x00028785); -PROVIDE(mayfly_enqueue = 0x0000cc59); -PROVIDE(hci_init = 0x00013b81); +PROVIDE(radio_phy_flags_rx_get = 0x000249fd); +PROVIDE(ull_adv_sync_add_to_acad = 0x00016e7d); +PROVIDE(ull_conn_lll_max_tx_octets_get = 0x00018e69); +PROVIDE(lll_clock_sca_local_get = 0x000210f5); +PROVIDE(spi_nrfx_wake_init = 0x000287b5); +PROVIDE(__wrap_random = 0x0002c6ad); +PROVIDE(hci_vendor_read_key_hierarchy_roots = 0x00024459); +PROVIDE(llcp_lp_cu_run = 0x0001dae5); +PROVIDE(nrfx_spi_2_irq_handler = 0x00029d11); +PROVIDE(llcp_rp_conn_param_req_neg_reply = 0x0001db4d); +PROVIDE(__math_invalid = 0x0002e2d1); +PROVIDE(ll_adv_aux_max_data_length_get = 0x000154c5); +PROVIDE(memmove = 0x0003311b); +PROVIDE(ll_adv_scan_rsp_set = 0x00015325); +PROVIDE(z_nrf_rtc_timer_read = 0x00028985); +PROVIDE(mayfly_enqueue = 0x0000ce59); +PROVIDE(hci_init = 0x00013d81); PROVIDE(__nesf2 = 0x00000d69); -PROVIDE(iscntrl = 0x00032f89); -PROVIDE(islower = 0x00032fb3); -PROVIDE(ull_adv_done = 0x00014c89); -PROVIDE(strcat = 0x0003308d); -PROVIDE(llcp_pdu_encode_reject_ext_ind = 0x0001c85d); -PROVIDE(rand = 0x00033035); -PROVIDE(ull_filter_tgta_get = 0x0001f9e1); -PROVIDE(llext_file_offset = 0x00031007); -PROVIDE(ull_tx_q_peek = 0x0001a86d); -PROVIDE(radio_tmr_ready_get = 0x00024ba9); -PROVIDE(lll_conn_rx_pkt_set = 0x00023851); -PROVIDE(strncmp = 0x000330c5); -PROVIDE(spi_nrfx_wake_request = 0x00028615); -PROVIDE(radio_tmr_aa_capture = 0x00024b5d); -PROVIDE(ull_cp_init = 0x0001ac61); +PROVIDE(iscntrl = 0x00033189); +PROVIDE(islower = 0x000331b3); +PROVIDE(ull_adv_done = 0x00014e89); +PROVIDE(strcat = 0x0003328d); +PROVIDE(llcp_pdu_encode_reject_ext_ind = 0x0001ca5d); +PROVIDE(rand = 0x00033235); +PROVIDE(ull_filter_tgta_get = 0x0001fbe1); +PROVIDE(llext_file_offset = 0x00031207); +PROVIDE(ull_tx_q_peek = 0x0001aa6d); +PROVIDE(radio_tmr_ready_get = 0x00024da9); +PROVIDE(lll_conn_rx_pkt_set = 0x00023a51); +PROVIDE(strncmp = 0x000332c5); +PROVIDE(spi_nrfx_wake_request = 0x00028815); +PROVIDE(radio_tmr_aa_capture = 0x00024d5d); +PROVIDE(ull_cp_init = 0x0001ae61); PROVIDE(ull_periph_setup = 0x00003ff9); -PROVIDE(ldexpl = 0x0002e741); -PROVIDE(ull_adv_aux_reset_finalize = 0x0001537d); -PROVIDE(ull_update_mark = 0x0000f975); -PROVIDE(isxdigit = 0x00032feb); +PROVIDE(ldexpl = 0x0002e941); +PROVIDE(ull_adv_aux_reset_finalize = 0x0001557d); +PROVIDE(ull_update_mark = 0x0000fb75); +PROVIDE(isxdigit = 0x000331eb); PROVIDE(__aeabi_cdcmpeq = 0x0000096d); -PROVIDE(__aeabi_memcpy4 = 0x00032eff); -PROVIDE(bt_buf_get_evt = 0x00030e8f); +PROVIDE(__aeabi_memcpy4 = 0x000330ff); +PROVIDE(bt_buf_get_evt = 0x0003108f); PROVIDE(ull_adv_aux_hdr_set_clear = 0x00001ef9); -PROVIDE(llcp_rr_ispaused = 0x0001ddfd); -PROVIDE(assert_post_action = 0x0002ee59); -PROVIDE(z_arm_usage_fault = 0x0000bfa5); -PROVIDE(radio_ccm_is_done = 0x00024cc9); -PROVIDE(ull_periph_ticker_cb = 0x0001e35d); +PROVIDE(llcp_rr_ispaused = 0x0001dffd); +PROVIDE(assert_post_action = 0x0002f059); +PROVIDE(z_arm_usage_fault = 0x0000c1a5); +PROVIDE(radio_ccm_is_done = 0x00024ec9); +PROVIDE(ull_periph_ticker_cb = 0x0001e55d); PROVIDE(ull_drift_ticks_get = 0x00001369); -PROVIDE(ull_adv_sync_info_fill = 0x00016a89); +PROVIDE(ull_adv_sync_info_fill = 0x00016c89); PROVIDE(strcpy = 0x00000f91); -PROVIDE(net_buf_frag_insert = 0x00030d29); -PROVIDE(ull_adv_aux_ptr_fill = 0x000158a9); -PROVIDE(llcp_lp_enc_run = 0x00019949); -PROVIDE(z_shell_help_subcmd_print = 0x0000ae41); -PROVIDE(lll_csrand_get = 0x00020749); -PROVIDE(ull_cp_min_used_chans = 0x0001ae19); -PROVIDE(ll_rx_put = 0x0000f7b5); -PROVIDE(llcp_lr_resume = 0x0001c161); -PROVIDE(lll_scan_aux_prepare = 0x00023335); -PROVIDE(scalbnl = 0x0002e741); -PROVIDE(ll_fal_add = 0x0001edf5); -PROVIDE(z_impl_k_stack_alloc_init = 0x000323e9); -PROVIDE(__aeabi_memcpy = 0x00032eff); -PROVIDE(do_llext_load = 0x00025761); -PROVIDE(__aeabi_memcpy8 = 0x00032eff); +PROVIDE(net_buf_frag_insert = 0x00030f29); +PROVIDE(ull_adv_aux_ptr_fill = 0x00015aa9); +PROVIDE(llcp_lp_enc_run = 0x00019b49); +PROVIDE(z_shell_help_subcmd_print = 0x0000b041); +PROVIDE(lll_csrand_get = 0x00020949); +PROVIDE(ull_cp_min_used_chans = 0x0001b019); +PROVIDE(ll_rx_put = 0x0000f9b5); +PROVIDE(llcp_lr_resume = 0x0001c361); +PROVIDE(lll_scan_aux_prepare = 0x00023535); +PROVIDE(scalbnl = 0x0002e941); +PROVIDE(ll_fal_add = 0x0001eff5); +PROVIDE(z_impl_k_stack_alloc_init = 0x000325e9); +PROVIDE(__aeabi_memcpy = 0x000330ff); +PROVIDE(do_llext_load = 0x00025961); +PROVIDE(__aeabi_memcpy8 = 0x000330ff); PROVIDE(__aeabi_fcmpun = 0x00000e45); -PROVIDE(z_impl_k_msgq_get_attrs = 0x00032093); -PROVIDE(ull_conn_ack_dequeue = 0x00018b05); +PROVIDE(z_impl_k_msgq_get_attrs = 0x00032293); +PROVIDE(ull_conn_ack_dequeue = 0x00018d05); PROVIDE(__aeabi_fsub = 0x00000b45); -PROVIDE(strrchr = 0x00033121); -PROVIDE(z_thread_aligned_alloc = 0x0002c47d); -PROVIDE(ull_event_done_extra_get = 0x0000fd89); -PROVIDE(z_impl_k_float_enable = 0x00031ff9); -PROVIDE(ull_cp_le_ping = 0x0001ae55); -PROVIDE(ull_filter_lll_irk_in_fal = 0x0001fe31); -PROVIDE(llcp_pdu_decode_unknown_rsp = 0x0001c4e5); -PROVIDE(lll_resume = 0x0000fe39); -PROVIDE(__atod_engine = 0x0002d649); -PROVIDE(nrfx_gpiote_channel_free = 0x00029539); -PROVIDE(lll_chan_set = 0x000209d9); -PROVIDE(ll_adv_sync_param_set = 0x00015fc9); -PROVIDE(llcp_lp_comm_run = 0x0001be7d); -PROVIDE(z_shell_make_argv = 0x0002fb19); -PROVIDE(z_shell_history_get = 0x000306cb); +PROVIDE(strrchr = 0x00033321); +PROVIDE(z_thread_aligned_alloc = 0x0002c67d); +PROVIDE(ull_event_done_extra_get = 0x0000ff89); +PROVIDE(z_impl_k_float_enable = 0x000321f9); +PROVIDE(ull_cp_le_ping = 0x0001b055); +PROVIDE(ull_filter_lll_irk_in_fal = 0x00020031); +PROVIDE(llcp_pdu_decode_unknown_rsp = 0x0001c6e5); +PROVIDE(lll_resume = 0x00010039); +PROVIDE(__atod_engine = 0x0002d849); +PROVIDE(nrfx_gpiote_channel_free = 0x00029739); +PROVIDE(lll_chan_set = 0x00020bd9); +PROVIDE(ll_adv_sync_param_set = 0x000161c9); +PROVIDE(llcp_lp_comm_run = 0x0001c07d); +PROVIDE(z_shell_make_argv = 0x0002fd19); +PROVIDE(z_shell_history_get = 0x000308cb); PROVIDE(ull_adv_sync_start = 0x00002de1); -PROVIDE(radio_tmr_end_get = 0x00024bc5); -PROVIDE(ull_adv_sync_offset_get = 0x00016aad); -PROVIDE(ull_scan_handle_get = 0x000174a1); +PROVIDE(radio_tmr_end_get = 0x00024dc5); +PROVIDE(ull_adv_sync_offset_get = 0x00016cad); +PROVIDE(ull_scan_handle_get = 0x000176a1); PROVIDE(ull_adv_aux_lll_offset_fill = 0x00002761); -PROVIDE(ull_adv_sync_lll_handle_get = 0x00016215); -PROVIDE(log_source_id_get = 0x00008971); -PROVIDE(llcp_tx_pause_data = 0x0001aaf9); -PROVIDE(ull_dle_update_eff_tx = 0x00018e7d); -PROVIDE(radio_tmr_start_now = 0x00024a9d); -PROVIDE(lll_scan_aux_addr_match_get = 0x00023515); +PROVIDE(ull_adv_sync_lll_handle_get = 0x00016415); +PROVIDE(log_source_id_get = 0x00008b71); +PROVIDE(llcp_tx_pause_data = 0x0001acf9); +PROVIDE(ull_dle_update_eff_tx = 0x0001907d); +PROVIDE(radio_tmr_start_now = 0x00024c9d); +PROVIDE(lll_scan_aux_addr_match_get = 0x00023715); PROVIDE(__aeabi_cdrcmple = 0x0000095d); -PROVIDE(ll_conn_handle_get = 0x00017e7d); -PROVIDE(nrfx_gpiote_pin_uninit = 0x00031c23); -PROVIDE(z_init_cpu = 0x0002a655); -PROVIDE(ll_fal_remove = 0x0001ef1d); -PROVIDE(ll_adv_set_by_hci_handle_get = 0x00014455); -PROVIDE(radio_phy_set = 0x00024489); -PROVIDE(z_impl_log_process = 0x0002f39b); -PROVIDE(radio_filter_disable = 0x00024889); -PROVIDE(ull_cp_release_nodes = 0x0001add9); -PROVIDE(ll_conn_release = 0x00017e71); -PROVIDE(ull_conn_default_phy_tx_get = 0x00018639); -PROVIDE(z_SysNmiOnReset = 0x0000b511); -PROVIDE(ull_done_extra_type_set = 0x0000fda5); -PROVIDE(z_shell_history_put = 0x00030739); -PROVIDE(strnlen = 0x00033109); -PROVIDE(nrfx_gpiote_init_check = 0x00029525); -PROVIDE(isgraph = 0x00032fa7); -PROVIDE(ll_scan_enable = 0x000171a1); -PROVIDE(z_impl_log_panic = 0x00008835); -PROVIDE(net_buf_simple_add = 0x00030d81); -PROVIDE(radio_tmr_hcto_configure_abs = 0x00024b41); +PROVIDE(ll_conn_handle_get = 0x0001807d); +PROVIDE(nrfx_gpiote_pin_uninit = 0x00031e23); +PROVIDE(z_init_cpu = 0x0002a855); +PROVIDE(ll_fal_remove = 0x0001f11d); +PROVIDE(ll_adv_set_by_hci_handle_get = 0x00014655); +PROVIDE(radio_phy_set = 0x00024689); +PROVIDE(atan2l = 0x00007191); +PROVIDE(z_impl_log_process = 0x0002f59b); +PROVIDE(radio_filter_disable = 0x00024a89); +PROVIDE(ull_cp_release_nodes = 0x0001afd9); +PROVIDE(ll_conn_release = 0x00018071); +PROVIDE(ull_conn_default_phy_tx_get = 0x00018839); +PROVIDE(z_SysNmiOnReset = 0x0000b711); +PROVIDE(ull_done_extra_type_set = 0x0000ffa5); +PROVIDE(z_shell_history_put = 0x00030939); +PROVIDE(strnlen = 0x00033309); +PROVIDE(nrfx_gpiote_init_check = 0x00029725); +PROVIDE(isgraph = 0x000331a7); +PROVIDE(ll_scan_enable = 0x000173a1); +PROVIDE(z_impl_log_panic = 0x00008a35); +PROVIDE(net_buf_simple_add = 0x00030f81); +PROVIDE(radio_tmr_hcto_configure_abs = 0x00024d41); PROVIDE(__aeabi_cfcmple = 0x00000dd1); -PROVIDE(llcp_pdu_encode_conn_param_req = 0x0001c955); -PROVIDE(idle = 0x00032003); -PROVIDE(llcp_rp_pu_tx_ntf = 0x0001a7e1); -PROVIDE(z_shell_history_purge = 0x00030721); -PROVIDE(cntr_cmp_set = 0x00024345); -PROVIDE(llcp_pdu_decode_conn_param_req = 0x0001ca0d); -PROVIDE(radio_is_tx_done = 0x00024635); -PROVIDE(hci_disconn_complete_process = 0x00012f51); -PROVIDE(log_backend_disable = 0x0002f3e5); -PROVIDE(ticker_yield_abs = 0x0000e475); -PROVIDE(ull_cp_run = 0x0001ad9d); -PROVIDE(lll_adv_pdu_alloc = 0x00021335); -PROVIDE(assert_print = 0x0002ee6b); -PROVIDE(ll_start_enc_req_send = 0x0001e48d); -PROVIDE(k_heap_aligned_alloc = 0x00031ef1); -PROVIDE(z_column_span_with_buffer_offsets_get = 0x0002fab9); -PROVIDE(ull_filter_adva_get = 0x0001f97d); -PROVIDE(ull_scan_done = 0x00017395); -PROVIDE(llext_unload = 0x000254b9); -PROVIDE(mayfly_is_running = 0x00024ff5); -PROVIDE(lll_prepare_done = 0x00020865); -PROVIDE(z_impl_k_timer_status_get = 0x00032c45); -PROVIDE(z_shell_log_backend_disable = 0x00030441); -PROVIDE(llcp_pdu_decode_version_ind = 0x0001c729); -PROVIDE(strtold = 0x0002c619); -PROVIDE(k_heap_free = 0x00031f87); -PROVIDE(net_buf_simple_push_u8 = 0x00030d9f); -PROVIDE(llcp_pdu_encode_enc_req = 0x0001c749); -PROVIDE(rtc_nrf_isr = 0x00028989); -PROVIDE(z_shell_op_cursor_move = 0x0002ff67); -PROVIDE(ticker_ticks_diff_get = 0x0000e6d9); -PROVIDE(ull_adv_data_set = 0x00014f7d); -PROVIDE(ull_adv_sync_time_get = 0x00016241); -PROVIDE(z_timer_expiration_handler = 0x0002c159); +PROVIDE(llcp_pdu_encode_conn_param_req = 0x0001cb55); +PROVIDE(idle = 0x00032203); +PROVIDE(llcp_rp_pu_tx_ntf = 0x0001a9e1); +PROVIDE(z_shell_history_purge = 0x00030921); +PROVIDE(cntr_cmp_set = 0x00024545); +PROVIDE(llcp_pdu_decode_conn_param_req = 0x0001cc0d); +PROVIDE(radio_is_tx_done = 0x00024835); +PROVIDE(hci_disconn_complete_process = 0x00013151); +PROVIDE(log_backend_disable = 0x0002f5e5); +PROVIDE(ticker_yield_abs = 0x0000e675); +PROVIDE(ull_cp_run = 0x0001af9d); +PROVIDE(lll_adv_pdu_alloc = 0x00021535); +PROVIDE(assert_print = 0x0002f06b); +PROVIDE(ll_start_enc_req_send = 0x0001e68d); +PROVIDE(k_heap_aligned_alloc = 0x000320f1); +PROVIDE(z_column_span_with_buffer_offsets_get = 0x0002fcb9); +PROVIDE(ull_filter_adva_get = 0x0001fb7d); +PROVIDE(ull_scan_done = 0x00017595); +PROVIDE(llext_unload = 0x000256b9); +PROVIDE(mayfly_is_running = 0x000251f5); +PROVIDE(lll_prepare_done = 0x00020a65); +PROVIDE(z_impl_k_timer_status_get = 0x00032e45); +PROVIDE(z_shell_log_backend_disable = 0x00030641); +PROVIDE(llcp_pdu_decode_version_ind = 0x0001c929); +PROVIDE(strtold = 0x0002c819); +PROVIDE(k_heap_free = 0x00032187); +PROVIDE(net_buf_simple_push_u8 = 0x00030f9f); +PROVIDE(llcp_pdu_encode_enc_req = 0x0001c949); +PROVIDE(rtc_nrf_isr = 0x00028b89); +PROVIDE(z_shell_op_cursor_move = 0x00030167); +PROVIDE(ticker_ticks_diff_get = 0x0000e8d9); +PROVIDE(ull_adv_data_set = 0x0001517d); +PROVIDE(ull_adv_sync_time_get = 0x00016441); +PROVIDE(z_timer_expiration_handler = 0x0002c359); PROVIDE(__floatunsidf = 0x000003b9); -PROVIDE(mpsc_pbuf_init = 0x0002ee85); +PROVIDE(mpsc_pbuf_init = 0x0002f085); PROVIDE(__floatundisf = 0x00000ccd); -PROVIDE(__kernel_sin = 0x000076e9); -PROVIDE(z_abort_timeout = 0x00032b1d); +PROVIDE(__kernel_sin = 0x000078e9); +PROVIDE(z_abort_timeout = 0x00032d1d); PROVIDE(__aeabi_f2d = 0x000003fd); -PROVIDE(radio_is_ready = 0x000245f9); -PROVIDE(ull_filter_lll_rl_idx_allowed = 0x0001fe95); -PROVIDE(z_impl_k_reschedule = 0x0002b86d); -PROVIDE(nrfx_twim_init = 0x00029dc9); -PROVIDE(radio_crc_is_valid = 0x00024665); -PROVIDE(z_reschedule = 0x0002b719); -PROVIDE(llcp_rr_resume = 0x0001de15); -PROVIDE(sys_heap_free = 0x0002eaa9); -PROVIDE(nrfx_twim_1_irq_handler = 0x0002a27d); -PROVIDE(radio_tmr_aa_save = 0x00024b91); -PROVIDE(ull_adv_is_created_get = 0x00014c6d); -PROVIDE(ull_scan_aux_set_get = 0x000178bd); -PROVIDE(ull_central_chm_update = 0x0001e885); -PROVIDE(ull_rx_put_sched = 0x0000fb65); -PROVIDE(z_bss_zero = 0x0002a63d); +PROVIDE(radio_is_ready = 0x000247f9); +PROVIDE(ull_filter_lll_rl_idx_allowed = 0x00020095); +PROVIDE(z_impl_k_reschedule = 0x0002ba6d); +PROVIDE(nrfx_twim_init = 0x00029fc9); +PROVIDE(radio_crc_is_valid = 0x00024865); +PROVIDE(z_reschedule = 0x0002b919); +PROVIDE(llcp_rr_resume = 0x0001e015); +PROVIDE(sys_heap_free = 0x0002eca9); +PROVIDE(nrfx_twim_1_irq_handler = 0x0002a47d); +PROVIDE(radio_tmr_aa_save = 0x00024d91); +PROVIDE(ull_adv_is_created_get = 0x00014e6d); +PROVIDE(ull_scan_aux_set_get = 0x00017abd); +PROVIDE(ull_central_chm_update = 0x0001ea85); +PROVIDE(ull_rx_put_sched = 0x0000fd65); +PROVIDE(z_bss_zero = 0x0002a83d); PROVIDE(ull_conn_update_parameters = 0x00003d59); PROVIDE(__aeabi_uidivmod = 0x000000f5); -PROVIDE(__math_oflow = 0x0002e7f9); -PROVIDE(ll_fal_size_get = 0x0001ed9d); +PROVIDE(__math_oflow = 0x0002e9f9); +PROVIDE(ll_fal_size_get = 0x0001ef9d); PROVIDE(__aeabi_d2uiz = 0x00000a5d); -PROVIDE(lll_event_offset_get = 0x00020999); -PROVIDE(net_buf_id = 0x0000c581); -PROVIDE(z_shell_cursor_in_empty_line = 0x0002fecf); -PROVIDE(shell_get_return_value = 0x0002fa39); -PROVIDE(llcp_rx_node_retain = 0x0001ab39); -PROVIDE(lll_conn_prepare_reset = 0x000236d1); -PROVIDE(mayfly_enable = 0x0000cbf1); -PROVIDE(strstr = 0x0003314d); -PROVIDE(ull_adv_sync_reset_finalize = 0x000161e9); -PROVIDE(ll_init = 0x0000ee9d); -PROVIDE(cntr_start = 0x000242c9); -PROVIDE(llcp_rr_set_incompat = 0x0001ddd9); -PROVIDE(llcp_pdu_encode_pause_enc_rsp = 0x0001c831); -PROVIDE(vfprintf = 0x0002cc85); -PROVIDE(ull_scan_lll_handle_get = 0x000174b9); -PROVIDE(ull_conn_ack_peek = 0x00018ab1); -PROVIDE(ull_cp_data_length_update = 0x0001b06d); -PROVIDE(ull_tx_q_dequeue = 0x0001a871); -PROVIDE(z_impl_k_sem_take = 0x0002ac35); -PROVIDE(lll_adv_data_reset = 0x000211e9); +PROVIDE(lll_event_offset_get = 0x00020b99); +PROVIDE(net_buf_id = 0x0000c781); +PROVIDE(z_shell_cursor_in_empty_line = 0x000300cf); +PROVIDE(shell_get_return_value = 0x0002fc39); +PROVIDE(llcp_rx_node_retain = 0x0001ad39); +PROVIDE(lll_conn_prepare_reset = 0x000238d1); +PROVIDE(mayfly_enable = 0x0000cdf1); +PROVIDE(strstr = 0x0003334d); +PROVIDE(ull_adv_sync_reset_finalize = 0x000163e9); +PROVIDE(ll_init = 0x0000f09d); +PROVIDE(cntr_start = 0x000244c9); +PROVIDE(llcp_rr_set_incompat = 0x0001dfd9); +PROVIDE(llcp_pdu_encode_pause_enc_rsp = 0x0001ca31); +PROVIDE(vfprintf = 0x0002ce85); +PROVIDE(ull_scan_lll_handle_get = 0x000176b9); +PROVIDE(ull_conn_ack_peek = 0x00018cb1); +PROVIDE(ull_cp_data_length_update = 0x0001b26d); +PROVIDE(ull_tx_q_dequeue = 0x0001aa71); +PROVIDE(z_impl_k_sem_take = 0x0002ae35); +PROVIDE(lll_adv_data_reset = 0x000213e9); PROVIDE(__aeabi_fcmpeq = 0x00000de1); -PROVIDE(llcp_lp_pu_tx_ack = 0x0001a785); +PROVIDE(llcp_lp_pu_tx_ack = 0x0001a985); PROVIDE(ull_scan_params_set = 0x00002fc9); -PROVIDE(ll_rl_timeout_set = 0x0001f419); -PROVIDE(ull_conn_ack_last_idx_get = 0x00018aa5); -PROVIDE(lll_conn_isr_tx = 0x000238ed); -PROVIDE(z_thread_is_valid = 0x00009139); -PROVIDE(log_output_msg_process = 0x0002f57b); -PROVIDE(lll_isr_rx_status_reset = 0x00020a79); -PROVIDE(llext_buf_seek = 0x000310a9); -PROVIDE(log_set_timestamp_func = 0x000087c5); -PROVIDE(llcp_pdu_encode_min_used_chans_ind = 0x0001c685); -PROVIDE(ull_cp_conn_param_req_neg_reply = 0x0001b255); -PROVIDE(bt_encrypt_le = 0x0001ffc9); -PROVIDE(mayfly_is_enabled = 0x00024f31); -PROVIDE(ecb_encrypt = 0x0002522d); -PROVIDE(z_device_state_init = 0x00031e09); -PROVIDE(sys_heap_alloc = 0x0002eac7); +PROVIDE(ll_rl_timeout_set = 0x0001f619); +PROVIDE(ull_conn_ack_last_idx_get = 0x00018ca5); +PROVIDE(lll_conn_isr_tx = 0x00023aed); +PROVIDE(z_thread_is_valid = 0x00009339); +PROVIDE(log_output_msg_process = 0x0002f77b); +PROVIDE(lll_isr_rx_status_reset = 0x00020c79); +PROVIDE(llext_buf_seek = 0x000312a9); +PROVIDE(log_set_timestamp_func = 0x000089c5); +PROVIDE(llcp_pdu_encode_min_used_chans_ind = 0x0001c885); +PROVIDE(ull_cp_conn_param_req_neg_reply = 0x0001b455); +PROVIDE(bt_encrypt_le = 0x000201c9); +PROVIDE(mayfly_is_enabled = 0x00025131); +PROVIDE(ecb_encrypt = 0x0002542d); +PROVIDE(z_device_state_init = 0x00032009); +PROVIDE(sys_heap_alloc = 0x0002ecc7); PROVIDE(__floatunsisf = 0x00000ca9); -PROVIDE(ll_tx_mem_release = 0x00017ed1); -PROVIDE(cntr_stop = 0x000242e9); -PROVIDE(arm_irq_disable = 0x0000c0c5); -PROVIDE(llcp_pdu_encode_version_ind = 0x0001c6d9); -PROVIDE(ll_pdu_rx_alloc_peek = 0x0000f801); -PROVIDE(lll_conn_init = 0x000236a9); -PROVIDE(z_impl_k_str_out = 0x00008485); -PROVIDE(lll_clock_ppm_get = 0x00020efd); -PROVIDE(ll_rx_mem_release = 0x0000f5a9); -PROVIDE(hci_cmd_handle = 0x000115cd); -PROVIDE(lll_chan_sel_2 = 0x0001ebb5); -PROVIDE(llcp_lr_tx_ack = 0x0001c22d); -PROVIDE(llcp_tx_resume_data = 0x0001ab21); -PROVIDE(nrfx_clock_stop = 0x00031b3f); -PROVIDE(ll_rl_crpa_set = 0x0001f245); -PROVIDE(z_shell_log_backend_enable = 0x000303e7); -PROVIDE(ll_rx_alloc = 0x0000f79d); +PROVIDE(ll_tx_mem_release = 0x000180d1); +PROVIDE(cntr_stop = 0x000244e9); +PROVIDE(arm_irq_disable = 0x0000c2c5); +PROVIDE(llcp_pdu_encode_version_ind = 0x0001c8d9); +PROVIDE(ll_pdu_rx_alloc_peek = 0x0000fa01); +PROVIDE(lll_conn_init = 0x000238a9); +PROVIDE(z_impl_k_str_out = 0x00008685); +PROVIDE(lll_clock_ppm_get = 0x000210fd); +PROVIDE(ll_rx_mem_release = 0x0000f7a9); +PROVIDE(hci_cmd_handle = 0x000117cd); +PROVIDE(lll_chan_sel_2 = 0x0001edb5); +PROVIDE(llcp_lr_tx_ack = 0x0001c42d); +PROVIDE(llcp_tx_resume_data = 0x0001ad21); +PROVIDE(nrfx_clock_stop = 0x00031d3f); +PROVIDE(ll_rl_crpa_set = 0x0001f445); +PROVIDE(z_shell_log_backend_enable = 0x000305e7); +PROVIDE(ll_rx_alloc = 0x0000f99d); PROVIDE(nrf_flash_sync_check_time_limit = 0x00004fe1); -PROVIDE(lll_chan_sel_1 = 0x0001eb1d); -PROVIDE(soc_reset_hook = 0x00028b05); -PROVIDE(z_shell_backend_rx_buffer_flush = 0x000302a3); -PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x0002f4fb); -PROVIDE(llcp_pdu_encode_unknown_rsp = 0x0001c4c9); -PROVIDE(hci_acl_encode = 0x00012f89); -PROVIDE(lll_clock_deinit = 0x00020e35); -PROVIDE(radio_tx_ready_delay_get = 0x00024579); -PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x0002f4e9); -PROVIDE(ll_conn_get = 0x00017e8d); +PROVIDE(lll_chan_sel_1 = 0x0001ed1d); +PROVIDE(soc_reset_hook = 0x00028d05); +PROVIDE(z_shell_backend_rx_buffer_flush = 0x000304a3); +PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x0002f6fb); +PROVIDE(llcp_pdu_encode_unknown_rsp = 0x0001c6c9); +PROVIDE(hci_acl_encode = 0x00013189); +PROVIDE(lll_clock_deinit = 0x00021035); +PROVIDE(radio_tx_ready_delay_get = 0x00024779); +PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x0002f6e9); +PROVIDE(ll_conn_get = 0x0001808d); PROVIDE(__aeabi_dcmpeq = 0x0000097d); -PROVIDE(radio_rx_enable = 0x00024599); -PROVIDE(ull_cp_ltk_req_neq_reply = 0x0001b0f5); -PROVIDE(ticker_stop_abs = 0x0000e581); -PROVIDE(llcp_lp_cu_rx = 0x0001d83d); -PROVIDE(z_impl_k_stack_pop = 0x0002ad01); -PROVIDE(ll_phy_get = 0x000183c1); -PROVIDE(llcp_lr_ispaused = 0x0001c149); -PROVIDE(llcp_pdu_encode_feature_req = 0x0001c509); +PROVIDE(radio_rx_enable = 0x00024799); +PROVIDE(ull_cp_ltk_req_neq_reply = 0x0001b2f5); +PROVIDE(ticker_stop_abs = 0x0000e781); +PROVIDE(llcp_lp_cu_rx = 0x0001da3d); +PROVIDE(z_impl_k_stack_pop = 0x0002af01); +PROVIDE(ll_phy_get = 0x000185c1); +PROVIDE(llcp_lr_ispaused = 0x0001c349); +PROVIDE(llcp_pdu_encode_feature_req = 0x0001c709); PROVIDE(ll_scan_params_set = 0x00002f31); -PROVIDE(ull_sched_adv_aux_sync_free_anchor_get = 0x0001ea2d); -PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x0002f50f); -PROVIDE(ll_adv_set_hci_handle_get = 0x00014499); -PROVIDE(nvmc_wait = 0x00028af5); -PROVIDE(llext_load = 0x000253ed); -PROVIDE(__start = 0x0000bfb9); -PROVIDE(ull_conn_pause_rx_data = 0x00018ca1); -PROVIDE(z_stack_space_get = 0x00032633); +PROVIDE(ull_sched_adv_aux_sync_free_anchor_get = 0x0001ec2d); +PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x0002f70f); +PROVIDE(ll_adv_set_hci_handle_get = 0x00014699); +PROVIDE(nvmc_wait = 0x00028cf5); +PROVIDE(llext_load = 0x000255ed); +PROVIDE(__start = 0x0000c1b9); +PROVIDE(ull_conn_pause_rx_data = 0x00018ea1); +PROVIDE(z_stack_space_get = 0x00032833); PROVIDE(__cmpsf2 = 0x00000d69); -PROVIDE(strchr = 0x000330ab); -PROVIDE(llcp_rp_comm_run = 0x0001be99); -PROVIDE(llext_iterate = 0x00025355); -PROVIDE(__stdout_hook_install = 0x0000c285); -PROVIDE(z_thread_timeout = 0x00032743); -PROVIDE(log_core_init = 0x000087e5); -PROVIDE(lll_radio_rx_ready_delay_get = 0x00020a65); -PROVIDE(z_shell_help_cmd_print = 0x0000aef5); -PROVIDE(z_early_memcpy = 0x00031eb9); -PROVIDE(lll_conn_reset = 0x000236c1); +PROVIDE(strchr = 0x000332ab); +PROVIDE(llcp_rp_comm_run = 0x0001c099); +PROVIDE(llext_iterate = 0x00025555); +PROVIDE(__stdout_hook_install = 0x0000c485); +PROVIDE(z_thread_timeout = 0x00032943); +PROVIDE(log_core_init = 0x000089e5); +PROVIDE(lll_radio_rx_ready_delay_get = 0x00020c65); +PROVIDE(z_shell_help_cmd_print = 0x0000b0f5); +PROVIDE(z_early_memcpy = 0x000320b9); +PROVIDE(lll_conn_reset = 0x000238c1); PROVIDE(ull_adv_sync_evt_init = 0x00002d69); -PROVIDE(ll_priv_mode_set = 0x0001f42d); -PROVIDE(shell_vfprintf = 0x0002f8ab); -PROVIDE(arch_tls_stack_setup = 0x0000b519); -PROVIDE(z_shell_fprintf_buffer_flush = 0x0002fa59); -PROVIDE(llcp_rp_comm_tx_ack = 0x0001be91); -PROVIDE(z_sched_init = 0x0002b831); -PROVIDE(nrf_flash_sync_get_timestamp_begin = 0x00020121); -PROVIDE(z_nrf_clock_bt_ctlr_hf_request = 0x00026a41); -PROVIDE(ull_prepare_dequeue = 0x0000fc59); +PROVIDE(ll_priv_mode_set = 0x0001f62d); +PROVIDE(shell_vfprintf = 0x0002faab); +PROVIDE(arch_tls_stack_setup = 0x0000b719); +PROVIDE(z_shell_fprintf_buffer_flush = 0x0002fc59); +PROVIDE(llcp_rp_comm_tx_ack = 0x0001c091); +PROVIDE(z_sched_init = 0x0002ba31); +PROVIDE(nrf_flash_sync_get_timestamp_begin = 0x00020321); +PROVIDE(z_nrf_clock_bt_ctlr_hf_request = 0x00026c41); +PROVIDE(ull_prepare_dequeue = 0x0000fe59); PROVIDE(__addsf3 = 0x00000b49); -PROVIDE(__shiftright128 = 0x000333d7); -PROVIDE(bt_hci_evt_create = 0x0000ca1d); -PROVIDE(nrf_flash_sync_set_context = 0x00020109); -PROVIDE(z_impl_flash_flatten = 0x000308df); -PROVIDE(llcp_lr_prt_restart = 0x0001c169); -PROVIDE(z_shell_print_cmd = 0x0000aae9); -PROVIDE(net_buf_simple_tailroom = 0x00030dd1); -PROVIDE(z_shell_vt100_colors_restore = 0x0000aba5); -PROVIDE(hci_recv_fifo_reset = 0x000105a9); -PROVIDE(nrfx_gpiote_in_event_get = 0x00031c2b); +PROVIDE(__shiftright128 = 0x000335d7); +PROVIDE(bt_hci_evt_create = 0x0000cc1d); +PROVIDE(nrf_flash_sync_set_context = 0x00020309); +PROVIDE(z_impl_flash_flatten = 0x00030adf); +PROVIDE(llcp_lr_prt_restart = 0x0001c369); +PROVIDE(z_shell_print_cmd = 0x0000ace9); +PROVIDE(net_buf_simple_tailroom = 0x00030fd1); +PROVIDE(z_shell_vt100_colors_restore = 0x0000ada5); +PROVIDE(hci_recv_fifo_reset = 0x000107a9); +PROVIDE(nrfx_gpiote_in_event_get = 0x00031e2b); PROVIDE(__aeabi_frsub = 0x00000b3d); -PROVIDE(lll_scan_isr_resume = 0x00022855); -PROVIDE(ll_conn_acquire = 0x00017e65); -PROVIDE(radio_tmr_stop = 0x00024b0d); -PROVIDE(k_malloc = 0x00032eed); -PROVIDE(z_impl_k_poll_signal_check = 0x00032eaf); -PROVIDE(sys_timepoint_timeout = 0x00032bb3); -PROVIDE(ull_filter_lll_rl_enabled = 0x0001ffb5); -PROVIDE(llcp_rr_connect = 0x0001e1c5); -PROVIDE(lll_isr_done = 0x00020b45); -PROVIDE(ull_cp_remote_dle_pending = 0x0001b21d); -PROVIDE(bt_hci_cmd_complete_create = 0x00030e95); -PROVIDE(z_shell_spaces_trim = 0x0002fdb9); -PROVIDE(radio_disable = 0x000245a5); -PROVIDE(scalbn = 0x0002e741); -PROVIDE(bt_send = 0x0000c955); -PROVIDE(ring_buf_peek = 0x0002f309); -PROVIDE(llcp_lr_prt_stop = 0x0001c17d); -PROVIDE(nrfx_gpiote_trigger_enable = 0x00029551); -PROVIDE(radio_ccm_rx_pkt_set = 0x00024bdd); -PROVIDE(ticker_next_slot_get_ext = 0x0000e609); -PROVIDE(z_impl_device_get_binding = 0x0002a38d); -PROVIDE(ll_length_max_get = 0x000183a9); -PROVIDE(log_backend_enable = 0x0002f3c3); +PROVIDE(lll_scan_isr_resume = 0x00022a55); +PROVIDE(ll_conn_acquire = 0x00018065); +PROVIDE(radio_tmr_stop = 0x00024d0d); +PROVIDE(k_malloc = 0x000330ed); +PROVIDE(z_impl_k_poll_signal_check = 0x000330af); +PROVIDE(sys_timepoint_timeout = 0x00032db3); +PROVIDE(ull_filter_lll_rl_enabled = 0x000201b5); +PROVIDE(llcp_rr_connect = 0x0001e3c5); +PROVIDE(lll_isr_done = 0x00020d45); +PROVIDE(ull_cp_remote_dle_pending = 0x0001b41d); +PROVIDE(bt_hci_cmd_complete_create = 0x00031095); +PROVIDE(z_shell_spaces_trim = 0x0002ffb9); +PROVIDE(radio_disable = 0x000247a5); +PROVIDE(scalbn = 0x0002e941); +PROVIDE(bt_send = 0x0000cb55); +PROVIDE(ring_buf_peek = 0x0002f509); +PROVIDE(llcp_lr_prt_stop = 0x0001c37d); +PROVIDE(nrfx_gpiote_trigger_enable = 0x00029751); +PROVIDE(radio_ccm_rx_pkt_set = 0x00024ddd); +PROVIDE(ticker_next_slot_get_ext = 0x0000e809); +PROVIDE(z_impl_device_get_binding = 0x0002a58d); +PROVIDE(ll_length_max_get = 0x000185a9); +PROVIDE(log_backend_enable = 0x0002f5c3); PROVIDE(__aeabi_ldiv0 = 0x00000131); -PROVIDE(ull_adv_sync_get = 0x00016205); -PROVIDE(__dtoa_engine = 0x0002d82d); -PROVIDE(ull_filter_lll_lrpa_used = 0x0001fc39); -PROVIDE(llcp_pdu_encode_reject_ind = 0x0001c845); -PROVIDE(z_arm_interrupt_init = 0x0000c201); -PROVIDE(z_shell_get_last_command = 0x0002fd5d); -PROVIDE(ull_cp_rx = 0x0001b2f5); -PROVIDE(ull_update_unmark = 0x0000f98d); -PROVIDE(llcp_ntf_alloc_is_available = 0x0001aadd); -PROVIDE(radio_tx_chain_delay_get = 0x00024585); -PROVIDE(isalpha = 0x00032f79); -PROVIDE(bt_enable_raw = 0x0000c981); -PROVIDE(nrfx_clock_enable = 0x00028ef5); -PROVIDE(z_sched_wake = 0x000327fd); -PROVIDE(printf = 0x0002c501); -PROVIDE(ull_filter_lll_rl_idx = 0x0001fc9d); -PROVIDE(nrfx_gpiote_channel_alloc = 0x00029545); -PROVIDE(z_shell_cmd_trim = 0x0002fe1b); +PROVIDE(ull_adv_sync_get = 0x00016405); +PROVIDE(__dtoa_engine = 0x0002da2d); +PROVIDE(ull_filter_lll_lrpa_used = 0x0001fe39); +PROVIDE(llcp_pdu_encode_reject_ind = 0x0001ca45); +PROVIDE(z_arm_interrupt_init = 0x0000c401); +PROVIDE(z_shell_get_last_command = 0x0002ff5d); +PROVIDE(ull_cp_rx = 0x0001b4f5); +PROVIDE(ull_update_unmark = 0x0000fb8d); +PROVIDE(llcp_ntf_alloc_is_available = 0x0001acdd); +PROVIDE(radio_tx_chain_delay_get = 0x00024785); +PROVIDE(isalpha = 0x00033179); +PROVIDE(bt_enable_raw = 0x0000cb81); +PROVIDE(nrfx_clock_enable = 0x000290f5); +PROVIDE(z_sched_wake = 0x000329fd); +PROVIDE(printf = 0x0002c701); +PROVIDE(ull_filter_lll_rl_idx = 0x0001fe9d); +PROVIDE(nrfx_gpiote_channel_alloc = 0x00029745); +PROVIDE(z_shell_cmd_trim = 0x0003001b); PROVIDE(__aeabi_uldivmod = 0x00000f11); -PROVIDE(bt_buf_get_rx = 0x0000c829); -PROVIDE(llcp_tx_enqueue = 0x0001aaf1); -PROVIDE(z_impl_k_pipe_close = 0x00032abb); -PROVIDE(fnmatch = 0x00030d11); +PROVIDE(bt_buf_get_rx = 0x0000ca29); +PROVIDE(llcp_tx_enqueue = 0x0001acf1); +PROVIDE(z_impl_k_pipe_close = 0x00032cbb); +PROVIDE(fnmatch = 0x00030f11); PROVIDE(__aeabi_drsub = 0x00000135); PROVIDE(__aeabi_d2ulz = 0x00000f41); -PROVIDE(ull_scan_is_disabled_get = 0x00017515); -PROVIDE(llcp_lr_terminate = 0x0001c465); -PROVIDE(nrfx_gppi_channel_alloc = 0x00031b3b); -PROVIDE(ull_filter_rpa_update = 0x0001f6f5); -PROVIDE(ull_adv_pdu_update_addrs = 0x00014d89); -PROVIDE(shell_fprintf_warn = 0x0002f973); -PROVIDE(ll_addr_get = 0x0000e761); -PROVIDE(arch_switch_to_main_thread = 0x0000c1b9); -PROVIDE(z_shell_wildcard_prepare = 0x0003085d); -PROVIDE(ull_filter_lll_rl_addr_allowed = 0x0001fefd); -PROVIDE(z_shell_wildcard_finalize = 0x0003089f); -PROVIDE(z_impl_k_queue_alloc_append = 0x0003237d); -PROVIDE(nrfx_nvmc_word_write = 0x0002979d); -PROVIDE(ull_cp_encryption_start = 0x0001aecd); -PROVIDE(ull_adv_sync_chm_update = 0x00016d25); -PROVIDE(radio_rssi_status_reset = 0x00024821); -PROVIDE(ull_prepare_enqueue = 0x0000fb95); -PROVIDE(ll_rl_remove = 0x0001f0e1); -PROVIDE(filter_set = 0x000089a9); -PROVIDE(nrfx_clock_start = 0x00028f19); -PROVIDE(ull_rx_put = 0x0000fb35); -PROVIDE(arm_irq_priority_set = 0x0000c109); -PROVIDE(z_shell_pattern_remove = 0x0002fcb9); -PROVIDE(__double_computeInvPow5 = 0x0002de25); -PROVIDE(k_timer_init = 0x00032bf5); -PROVIDE(ull_adv_aux_done = 0x00015e39); -PROVIDE(ll_rl_lrpa_get = 0x0001f381); -PROVIDE(net_buf_frag_del = 0x00030d61); -PROVIDE(ull_adv_aux_stop = 0x00015939); +PROVIDE(ull_scan_is_disabled_get = 0x00017715); +PROVIDE(llcp_lr_terminate = 0x0001c665); +PROVIDE(nrfx_gppi_channel_alloc = 0x00031d3b); +PROVIDE(ull_filter_rpa_update = 0x0001f8f5); +PROVIDE(ull_adv_pdu_update_addrs = 0x00014f89); +PROVIDE(shell_fprintf_warn = 0x0002fb73); +PROVIDE(ll_addr_get = 0x0000e961); +PROVIDE(arch_switch_to_main_thread = 0x0000c3b9); +PROVIDE(z_shell_wildcard_prepare = 0x00030a5d); +PROVIDE(ull_filter_lll_rl_addr_allowed = 0x000200fd); +PROVIDE(z_shell_wildcard_finalize = 0x00030a9f); +PROVIDE(z_impl_k_queue_alloc_append = 0x0003257d); +PROVIDE(nrfx_nvmc_word_write = 0x0002999d); +PROVIDE(ull_cp_encryption_start = 0x0001b0cd); +PROVIDE(ull_adv_sync_chm_update = 0x00016f25); +PROVIDE(radio_rssi_status_reset = 0x00024a21); +PROVIDE(ull_prepare_enqueue = 0x0000fd95); +PROVIDE(ll_rl_remove = 0x0001f2e1); +PROVIDE(filter_set = 0x00008ba9); +PROVIDE(nrfx_clock_start = 0x00029119); +PROVIDE(ull_rx_put = 0x0000fd35); +PROVIDE(arm_irq_priority_set = 0x0000c309); +PROVIDE(z_shell_pattern_remove = 0x0002feb9); +PROVIDE(__double_computeInvPow5 = 0x0002e025); +PROVIDE(k_timer_init = 0x00032df5); +PROVIDE(ull_adv_aux_done = 0x00016039); +PROVIDE(ll_rl_lrpa_get = 0x0001f581); +PROVIDE(net_buf_frag_del = 0x00030f61); +PROVIDE(ull_adv_aux_stop = 0x00015b39); PROVIDE(ull_adv_time_update = 0x00001d01); -PROVIDE(llext_dependency_remove_all = 0x00031039); -PROVIDE(llext_find_sym = 0x00025391); +PROVIDE(llext_dependency_remove_all = 0x00031239); +PROVIDE(llext_find_sym = 0x00025591); PROVIDE(__aeabi_d2iz = 0x00000a0d); -PROVIDE(z_unpend_all = 0x00032787); -PROVIDE(lll_disable = 0x000207bd); -PROVIDE(ll_rx_get = 0x0000f129); -PROVIDE(z_arm_svc = 0x0000c085); -PROVIDE(ll_adv_aux_set_clear = 0x00015341); -PROVIDE(cbvprintf_package = 0x00007d75); +PROVIDE(z_unpend_all = 0x00032987); +PROVIDE(lll_disable = 0x000209bd); +PROVIDE(ll_rx_get = 0x0000f329); +PROVIDE(z_arm_svc = 0x0000c285); +PROVIDE(ll_adv_aux_set_clear = 0x00015541); +PROVIDE(cbvprintf_package = 0x00007f75); PROVIDE(__aeabi_idiv0 = 0x00000131); -PROVIDE(ring_buf_get = 0x0002f2c5); -PROVIDE(ull_cp_conn_param_req_reply = 0x0001b235); -PROVIDE(z_queue_node_peek = 0x000322b7); -PROVIDE(memq_dequeue = 0x0000cb91); -PROVIDE(llcp_lr_complete = 0x0001c319); -PROVIDE(llcp_pdu_encode_length_rsp = 0x0001cb81); -PROVIDE(llext_lookup_symbol = 0x000262c9); -PROVIDE(mem_release = 0x0000cae1); -PROVIDE(llext_buf_read = 0x0003107f); -PROVIDE(z_early_memset = 0x00031eb5); -PROVIDE(ull_conn_tx_ack = 0x00018b91); -PROVIDE(ull_llcp_init = 0x0001ac99); -PROVIDE(llcp_pdu_encode_ping_rsp = 0x0001c4b5); -PROVIDE(strncpy = 0x000330e9); -PROVIDE(llcp_rr_complete = 0x0001e1bd); -PROVIDE(ull_ticker_stop_with_mark = 0x0000fa2d); -PROVIDE(z_shell_op_cursor_end_move = 0x00030043); -PROVIDE(llext_bootstrap = 0x00025565); -PROVIDE(z_impl_k_poll_signal_raise = 0x0002c411); -PROVIDE(radio_pkt_tx_set = 0x0002456d); -PROVIDE(ull_conn_resume_rx_data = 0x00018cb1); -PROVIDE(z_thread_prio_set = 0x0002b679); +PROVIDE(ring_buf_get = 0x0002f4c5); +PROVIDE(ull_cp_conn_param_req_reply = 0x0001b435); +PROVIDE(z_queue_node_peek = 0x000324b7); +PROVIDE(memq_dequeue = 0x0000cd91); +PROVIDE(llcp_lr_complete = 0x0001c519); +PROVIDE(llcp_pdu_encode_length_rsp = 0x0001cd81); +PROVIDE(llext_lookup_symbol = 0x000264c9); +PROVIDE(mem_release = 0x0000cce1); +PROVIDE(llext_buf_read = 0x0003127f); +PROVIDE(z_early_memset = 0x000320b5); +PROVIDE(ull_conn_tx_ack = 0x00018d91); +PROVIDE(ull_llcp_init = 0x0001ae99); +PROVIDE(llcp_pdu_encode_ping_rsp = 0x0001c6b5); +PROVIDE(strncpy = 0x000332e9); +PROVIDE(llcp_rr_complete = 0x0001e3bd); +PROVIDE(ull_ticker_stop_with_mark = 0x0000fc2d); +PROVIDE(z_shell_op_cursor_end_move = 0x00030243); +PROVIDE(llext_bootstrap = 0x00025765); +PROVIDE(z_impl_k_poll_signal_raise = 0x0002c611); +PROVIDE(radio_pkt_tx_set = 0x0002476d); +PROVIDE(ull_conn_resume_rx_data = 0x00018eb1); +PROVIDE(z_thread_prio_set = 0x0002b879); PROVIDE(__cmpdf2 = 0x000008e1); -PROVIDE(z_arm_fault = 0x0000bd49); -PROVIDE(lll_csrand_isr_get = 0x0002075d); -PROVIDE(putchar = 0x0002c525); -PROVIDE(nrfx_flag32_alloc = 0x00028d7d); -PROVIDE(ull_central_reset = 0x0001e785); -PROVIDE(sys_notify_validate = 0x0002f18d); -PROVIDE(ull_disable_unmark = 0x0000f951); -PROVIDE(ull_update_mark_get = 0x0000f9a5); -PROVIDE(ll_chm_update = 0x0001eaad); -PROVIDE(nrfx_gpiote_trigger_disable = 0x00031c27); -PROVIDE(z_log_runtime_filters_init = 0x00008935); -PROVIDE(llcp_rr_flush_procedures = 0x0001de31); -PROVIDE(z_arm_exc_exit = 0x0000b931); -PROVIDE(z_impl_k_mutex_lock = 0x0002a9cd); -PROVIDE(llcp_rp_enc_rx = 0x00019951); -PROVIDE(nrfx_spi_xfer = 0x00029a15); -PROVIDE(bt_rand = 0x0001ffc5); -PROVIDE(lll_adv_sync_reset = 0x000220d9); -PROVIDE(z_log_msg_commit = 0x000088ad); -PROVIDE(z_prep_c = 0x0000c139); -PROVIDE(hci_vendor_cmd_handle_common = 0x00011439); -PROVIDE(ull_conn_ack_by_last_peek = 0x00018ae1); -PROVIDE(llcp_tx_alloc = 0x0001aac5); +PROVIDE(z_arm_fault = 0x0000bf49); +PROVIDE(lll_csrand_isr_get = 0x0002095d); +PROVIDE(putchar = 0x0002c725); +PROVIDE(nrfx_flag32_alloc = 0x00028f7d); +PROVIDE(ull_central_reset = 0x0001e985); +PROVIDE(sys_notify_validate = 0x0002f38d); +PROVIDE(ull_disable_unmark = 0x0000fb51); +PROVIDE(ull_update_mark_get = 0x0000fba5); +PROVIDE(ll_chm_update = 0x0001ecad); +PROVIDE(nrfx_gpiote_trigger_disable = 0x00031e27); +PROVIDE(z_log_runtime_filters_init = 0x00008b35); +PROVIDE(llcp_rr_flush_procedures = 0x0001e031); +PROVIDE(z_arm_exc_exit = 0x0000bb31); +PROVIDE(z_impl_k_mutex_lock = 0x0002abcd); +PROVIDE(llcp_rp_enc_rx = 0x00019b51); +PROVIDE(nrfx_spi_xfer = 0x00029c15); +PROVIDE(bt_rand = 0x000201c5); +PROVIDE(lll_adv_sync_reset = 0x000222d9); +PROVIDE(z_log_msg_commit = 0x00008aad); +PROVIDE(z_prep_c = 0x0000c339); +PROVIDE(hci_vendor_cmd_handle_common = 0x00011639); +PROVIDE(ull_conn_ack_by_last_peek = 0x00018ce1); +PROVIDE(llcp_tx_alloc = 0x0001acc5); PROVIDE(__aeabi_cfcmpeq = 0x00000dd1); -PROVIDE(lll_isr_abort = 0x00020b21); -PROVIDE(ull_filter_rl_find = 0x0001fa09); -PROVIDE(lll_is_done = 0x00020915); -PROVIDE(z_impl_k_pipe_reset = 0x00032a79); -PROVIDE(i2c_nrfx_twim_common_init = 0x00027b49); -PROVIDE(net_buf_pool_get = 0x0000c571); -PROVIDE(radio_tmr_start_tick = 0x000249f1); -PROVIDE(lll_adv_aux_init = 0x00021f79); -PROVIDE(k_sched_unlock = 0x0002b7c9); -PROVIDE(ull_filter_adv_update = 0x0001f669); -PROVIDE(z_impl_k_sched_current_thread_query = 0x0002ba4d); -PROVIDE(llcp_pdu_encode_length_req = 0x0001cb51); -PROVIDE(radio_switch_complete_and_disable = 0x000247e1); -PROVIDE(z_impl_k_condvar_init = 0x000325ef); -PROVIDE(ull_adv_aux_release = 0x00015db5); -PROVIDE(llcp_lr_peek = 0x0001bfed); -PROVIDE(ticker_ticks_now_get = 0x0000e6d5); -PROVIDE(ull_scan_aux_reset = 0x00017819); -PROVIDE(ull_disable = 0x0000f9b1); -PROVIDE(ull_conn_setup = 0x000186c5); -PROVIDE(ull_tx_q_init = 0x0001a7e9); -PROVIDE(k_sys_fatal_error_handler = 0x0002a431); -PROVIDE(net_buf_simple_add_mem = 0x00030d8d); +PROVIDE(lll_isr_abort = 0x00020d21); +PROVIDE(ull_filter_rl_find = 0x0001fc09); +PROVIDE(lll_is_done = 0x00020b15); +PROVIDE(z_impl_k_pipe_reset = 0x00032c79); +PROVIDE(i2c_nrfx_twim_common_init = 0x00027d49); +PROVIDE(net_buf_pool_get = 0x0000c771); +PROVIDE(radio_tmr_start_tick = 0x00024bf1); +PROVIDE(lll_adv_aux_init = 0x00022179); +PROVIDE(k_sched_unlock = 0x0002b9c9); +PROVIDE(ull_filter_adv_update = 0x0001f869); +PROVIDE(z_impl_k_sched_current_thread_query = 0x0002bc4d); +PROVIDE(llcp_pdu_encode_length_req = 0x0001cd51); +PROVIDE(radio_switch_complete_and_disable = 0x000249e1); +PROVIDE(z_impl_k_condvar_init = 0x000327ef); +PROVIDE(ull_adv_aux_release = 0x00015fb5); +PROVIDE(llcp_lr_peek = 0x0001c1ed); +PROVIDE(ticker_ticks_now_get = 0x0000e8d5); +PROVIDE(ull_scan_aux_reset = 0x00017a19); +PROVIDE(ull_disable = 0x0000fbb1); +PROVIDE(ull_conn_setup = 0x000188c5); +PROVIDE(ull_tx_q_init = 0x0001a9e9); +PROVIDE(k_sys_fatal_error_handler = 0x0002a631); +PROVIDE(net_buf_simple_add_mem = 0x00030f8d); PROVIDE(CONFIG_SOC_HAS_TIMING_FUNCTIONS = 0x00000001); -PROVIDE(ticker_is_initialized = 0x0000e2d5); -PROVIDE(_cos = 0x0002df1d); -PROVIDE(nrfx_nvmc_flash_page_count_get = 0x00031c45); -PROVIDE(vprintk = 0x0002ee3b); -PROVIDE(z_shell_op_completion_insert = 0x0003023b); -PROVIDE(ull_cp_encryption_pause = 0x0001af2d); -PROVIDE(ull_adv_reset = 0x00014b71); +PROVIDE(ticker_is_initialized = 0x0000e4d5); +PROVIDE(_cos = 0x0002e11d); +PROVIDE(nrfx_nvmc_flash_page_count_get = 0x00031e45); +PROVIDE(vprintk = 0x0002f03b); +PROVIDE(z_shell_op_completion_insert = 0x0003043b); +PROVIDE(ull_cp_encryption_pause = 0x0001b12d); +PROVIDE(ull_adv_reset = 0x00014d71); PROVIDE(__aeabi_d2f = 0x00000a9d); -PROVIDE(nrfx_gppi_channel_endpoints_setup = 0x00031b27); -PROVIDE(ticker_stop = 0x0000e4fd); -PROVIDE(radio_rssi_get = 0x00024815); -PROVIDE(ull_pdu_rx_alloc_peek = 0x0000fad1); -PROVIDE(floor = 0x0002e811); -PROVIDE(ll_adv_aux_set_remove = 0x000152cd); +PROVIDE(nrfx_gppi_channel_endpoints_setup = 0x00031d27); +PROVIDE(ticker_stop = 0x0000e6fd); +PROVIDE(radio_rssi_get = 0x00024a15); +PROVIDE(ull_pdu_rx_alloc_peek = 0x0000fcd1); +PROVIDE(floor = 0x0002ea11); +PROVIDE(ll_adv_aux_set_remove = 0x000154cd); PROVIDE(__aeabi_idivmod = 0x00000121); -PROVIDE(llcp_proc_ctx_release = 0x0001aa6d); -PROVIDE(z_shell_op_cursor_home_move = 0x00030035); -PROVIDE(nrfx_power_clock_irq_handler = 0x00029005); -PROVIDE(z_impl_k_sem_init = 0x000323b5); -PROVIDE(ull_central_cleanup = 0x0001e7e1); -PROVIDE(ull_cp_prt_reload_set = 0x0001ad89); -PROVIDE(__do_init_array_aux = 0x0002a7ad); -PROVIDE(lll_clock_init = 0x00020e15); -PROVIDE(radio_tmr_end_capture = 0x00024bb5); +PROVIDE(llcp_proc_ctx_release = 0x0001ac6d); +PROVIDE(z_shell_op_cursor_home_move = 0x00030235); +PROVIDE(nrfx_power_clock_irq_handler = 0x00029205); +PROVIDE(z_impl_k_sem_init = 0x000325b5); +PROVIDE(ull_central_cleanup = 0x0001e9e1); +PROVIDE(ull_cp_prt_reload_set = 0x0001af89); +PROVIDE(__do_init_array_aux = 0x0002a9ad); +PROVIDE(lll_clock_init = 0x00021015); +PROVIDE(radio_tmr_end_capture = 0x00024db5); PROVIDE(__fixunsdfsi = 0x00000a5d); -PROVIDE(llcp_rr_prt_stop = 0x0001de29); -PROVIDE(z_shell_op_word_remove = 0x0000abe5); -PROVIDE(ull_adv_aux_offset_get = 0x00015df5); -PROVIDE(llcp_nodes_release = 0x0001abcd); -PROVIDE(k_work_schedule_for_queue = 0x0002b019); -PROVIDE(ull_adv_aux_acquire = 0x000159b1); -PROVIDE(arch_spin_relax = 0x00031fff); -PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x0002a3d5); -PROVIDE(z_unpend_thread = 0x00032777); -PROVIDE(nrfx_gppi_channels_enable = 0x00028e05); +PROVIDE(llcp_rr_prt_stop = 0x0001e029); +PROVIDE(z_shell_op_word_remove = 0x0000ade5); +PROVIDE(ull_adv_aux_offset_get = 0x00015ff5); +PROVIDE(llcp_nodes_release = 0x0001adcd); +PROVIDE(k_work_schedule_for_queue = 0x0002b219); +PROVIDE(ull_adv_aux_acquire = 0x00015bb1); +PROVIDE(arch_spin_relax = 0x000321ff); +PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x0002a5d5); +PROVIDE(z_unpend_thread = 0x00032977); +PROVIDE(nrfx_gppi_channels_enable = 0x00029005); PROVIDE(__aeabi_dcmpge = 0x000009b9); -PROVIDE(lll_scan_init = 0x000227cd); -PROVIDE(z_cstart = 0x0002a6c5); -PROVIDE(ull_filter_lll_get = 0x0001f5ad); -PROVIDE(z_shell_help_request = 0x0000af35); -PROVIDE(ull_prepare_dequeue_get = 0x0000fc09); -PROVIDE(z_impl_z_log_msg_static_create = 0x00008b95); -PROVIDE(arm_irq_is_enabled = 0x0000c0ed); -PROVIDE(thread_is_sliceable = 0x0002bd49); -PROVIDE(z_log_notify_backend_enabled = 0x0002f399); +PROVIDE(lll_scan_init = 0x000229cd); +PROVIDE(z_cstart = 0x0002a8c5); +PROVIDE(ull_filter_lll_get = 0x0001f7ad); +PROVIDE(z_shell_help_request = 0x0000b135); +PROVIDE(ull_prepare_dequeue_get = 0x0000fe09); +PROVIDE(z_impl_z_log_msg_static_create = 0x00008d95); +PROVIDE(arm_irq_is_enabled = 0x0000c2ed); +PROVIDE(thread_is_sliceable = 0x0002bf49); +PROVIDE(z_log_notify_backend_enabled = 0x0002f599); PROVIDE(ll_create_connection = 0x000045d1); -PROVIDE(lll_clock_ppm_local_get = 0x00020ef9); -PROVIDE(ull_scan_filter_pol_get = 0x00017561); -PROVIDE(llcp_rp_enc_ltk_req_reply_allowed = 0x000199a1); -PROVIDE(arch_cpu_atomic_idle = 0x00030a91); -PROVIDE(z_impl_k_thread_stack_space_get = 0x0003264b); +PROVIDE(lll_clock_ppm_local_get = 0x000210f9); +PROVIDE(ull_scan_filter_pol_get = 0x00017761); +PROVIDE(llcp_rp_enc_ltk_req_reply_allowed = 0x00019ba1); +PROVIDE(arch_cpu_atomic_idle = 0x00030c91); +PROVIDE(z_impl_k_thread_stack_space_get = 0x0003284b); PROVIDE(atan = 0x00006e59); -PROVIDE(llext_copy_regions = 0x00030f43); -PROVIDE(bt_hci_raw_set_mode = 0x0000c96d); +PROVIDE(llext_copy_regions = 0x00031143); +PROVIDE(bt_hci_raw_set_mode = 0x0000cb6d); PROVIDE(__aeabi_ldivmod = 0x00000e71); -PROVIDE(z_ready_thread = 0x000326c9); -PROVIDE(ll_adv_aux_random_addr_set = 0x000152a9); -PROVIDE(llcp_lr_init = 0x0001c299); -PROVIDE(k_msgq_init = 0x00032033); -PROVIDE(nrfx_gpiote_0_irq_handler = 0x000295e5); +PROVIDE(z_ready_thread = 0x000328c9); +PROVIDE(ll_adv_aux_random_addr_set = 0x000154a9); +PROVIDE(llcp_lr_init = 0x0001c499); +PROVIDE(k_msgq_init = 0x00032233); +PROVIDE(nrfx_gpiote_0_irq_handler = 0x000297e5); PROVIDE(__aeabi_dmul = 0x000004ad); -PROVIDE(onoff_release = 0x0002f10f); -PROVIDE(strtoul = 0x0002ca81); -PROVIDE(lll_periph_prepare = 0x000240b9); -PROVIDE(hex2bin = 0x0002eef7); -PROVIDE(getopt_state_get = 0x0000c52d); -PROVIDE(k_fatal_halt = 0x00031e81); -PROVIDE(z_log_msg_runtime_vcreate = 0x00008ae1); -PROVIDE(boot_banner = 0x0002a369); -PROVIDE(llcp_rp_cu_run = 0x0001d93d); -PROVIDE(ull_adv_sync_remove_from_acad = 0x00016af1); -PROVIDE(ull_adv_sync_reset = 0x00016165); +PROVIDE(onoff_release = 0x0002f30f); +PROVIDE(strtoul = 0x0002cc81); +PROVIDE(lll_periph_prepare = 0x000242b9); +PROVIDE(hex2bin = 0x0002f0f7); +PROVIDE(getopt_state_get = 0x0000c72d); +PROVIDE(k_fatal_halt = 0x00032081); +PROVIDE(z_log_msg_runtime_vcreate = 0x00008ce1); +PROVIDE(boot_banner = 0x0002a569); +PROVIDE(llcp_rp_cu_run = 0x0001db3d); +PROVIDE(ull_adv_sync_remove_from_acad = 0x00016cf1); +PROVIDE(ull_adv_sync_reset = 0x00016365); PROVIDE(__aeabi_dcmpun = 0x000009e1); -PROVIDE(llcp_pdu_decode_reject_ext_ind = 0x0001c879); -PROVIDE(z_arm_mpu_fault = 0x0000bfa5); -PROVIDE(nrfx_ppi_channel_alloc = 0x000297b9); -PROVIDE(z_shell_history_mode_exit = 0x000306c5); -PROVIDE(z_impl_k_uptime_ticks = 0x00032b67); -PROVIDE(llcp_pdu_encode_conn_param_rsp = 0x0001c9b1); -PROVIDE(bt_rpa_irk_matches = 0x00030e1d); +PROVIDE(llcp_pdu_decode_reject_ext_ind = 0x0001ca79); +PROVIDE(z_arm_mpu_fault = 0x0000c1a5); +PROVIDE(nrfx_ppi_channel_alloc = 0x000299b9); +PROVIDE(z_shell_history_mode_exit = 0x000308c5); +PROVIDE(z_impl_k_uptime_ticks = 0x00032d67); +PROVIDE(llcp_pdu_encode_conn_param_rsp = 0x0001cbb1); +PROVIDE(bt_rpa_irk_matches = 0x0003101d); PROVIDE(__aeabi_dcmple = 0x000009a5); PROVIDE(__subsf3 = 0x00000b45); PROVIDE(ull_scan_enable = 0x00003021); -PROVIDE(memq_deinit = 0x0000cb59); -PROVIDE(ll_feature_req_send = 0x00018251); -PROVIDE(getopt_init = 0x0000c3b9); -PROVIDE(z_impl_flash_copy = 0x00030907); -PROVIDE(ull_tx_q_resume_data = 0x0001a801); -PROVIDE(__cxa_pure_virtual = 0x0002e8cb); -PROVIDE(ull_conn_event_counter = 0x00018cc1); -PROVIDE(mem_nz = 0x0000cb39); +PROVIDE(memq_deinit = 0x0000cd59); +PROVIDE(ll_feature_req_send = 0x00018451); +PROVIDE(getopt_init = 0x0000c5b9); +PROVIDE(z_impl_flash_copy = 0x00030b07); +PROVIDE(ull_tx_q_resume_data = 0x0001aa01); +PROVIDE(__cxa_pure_virtual = 0x0002eacb); +PROVIDE(ull_conn_event_counter = 0x00018ec1); +PROVIDE(mem_nz = 0x0000cd39); PROVIDE(__gesf2 = 0x00000d59); -PROVIDE(z_arm_debug_monitor = 0x0000bfa5); -PROVIDE(z_impl_device_init = 0x00031ebd); -PROVIDE(ull_cp_chan_map_update_pending = 0x0001b049); -PROVIDE(ll_adv_sync_enable = 0x0001625d); -PROVIDE(nrfx_gpiote_global_callback_set = 0x0002948d); -PROVIDE(ull_central_ticker_cb = 0x0001e511); -PROVIDE(lll_isr_status_reset = 0x00020a8d); -PROVIDE(putchar_unlocked = 0x0002c525); -PROVIDE(llcp_lr_rx = 0x0001c185); -PROVIDE(z_thread_entry = 0x000084a1); -PROVIDE(arch_printk_char_out = 0x0002ee37); -PROVIDE(k_aligned_alloc = 0x0002c461); -PROVIDE(z_shell_wildcard_process = 0x0000b289); -PROVIDE(radio_rx_ready_delay_get = 0x00024589); -PROVIDE(llcp_pdu_decode_terminate_ind = 0x0001c6d1); +PROVIDE(z_arm_debug_monitor = 0x0000c1a5); +PROVIDE(z_impl_device_init = 0x000320bd); +PROVIDE(ull_cp_chan_map_update_pending = 0x0001b249); +PROVIDE(ll_adv_sync_enable = 0x0001645d); +PROVIDE(nrfx_gpiote_global_callback_set = 0x0002968d); +PROVIDE(ull_central_ticker_cb = 0x0001e711); +PROVIDE(lll_isr_status_reset = 0x00020c8d); +PROVIDE(putchar_unlocked = 0x0002c725); +PROVIDE(llcp_lr_rx = 0x0001c385); +PROVIDE(z_thread_entry = 0x000086a1); +PROVIDE(arch_printk_char_out = 0x0002f037); +PROVIDE(k_aligned_alloc = 0x0002c661); +PROVIDE(z_shell_wildcard_process = 0x0000b489); +PROVIDE(radio_rx_ready_delay_get = 0x00024789); +PROVIDE(llcp_pdu_decode_terminate_ind = 0x0001c8d1); PROVIDE(__unorddf2 = 0x000009e1); -PROVIDE(sys_heap_aligned_alloc = 0x0002eb19); -PROVIDE(sin = 0x0002dfa9); -PROVIDE(ticker_start_us = 0x0000e355); -PROVIDE(__wrap_calloc = 0x0000c385); -PROVIDE(z_shell_print_prompt_and_cmd = 0x0000ae05); -PROVIDE(net_buf_simple_reserve = 0x00030d79); -PROVIDE(z_impl_k_sem_give = 0x0002abc1); -PROVIDE(llcp_lp_pu_run = 0x0001a77d); -PROVIDE(z_impl_k_queue_cancel_wait = 0x000322e9); -PROVIDE(nrfx_gpiote_init = 0x000294bd); -PROVIDE(lll_adv_data_init = 0x000211c9); -PROVIDE(ll_adv_params_set = 0x000144dd); -PROVIDE(ll_connect_enable = 0x0001e5dd); -PROVIDE(lll_conn_peripheral_is_abort_cb = 0x00023735); -PROVIDE(llcp_rp_conn_param_req_reply = 0x0001d945); -PROVIDE(radio_filter_has_match = 0x000248b1); -PROVIDE(z_impl_k_condvar_broadcast = 0x0002b0c5); -PROVIDE(ticker_update_ext = 0x0000e395); -PROVIDE(z_impl_k_condvar_wait = 0x0002b139); -PROVIDE(z_impl_k_mutex_unlock = 0x0002aabd); -PROVIDE(__fpclassifyd = 0x0002e089); -PROVIDE(llcp_lp_pu_rx = 0x0001a721); -PROVIDE(z_impl_k_msgq_alloc_init = 0x0003205b); -PROVIDE(lll_conn_pdu_tx_prep = 0x00023a35); -PROVIDE(llcp_rp_chmu_rx = 0x0001da49); +PROVIDE(sys_heap_aligned_alloc = 0x0002ed19); +PROVIDE(sin = 0x0002e1a9); +PROVIDE(ticker_start_us = 0x0000e555); +PROVIDE(__wrap_calloc = 0x0000c585); +PROVIDE(z_shell_print_prompt_and_cmd = 0x0000b005); +PROVIDE(net_buf_simple_reserve = 0x00030f79); +PROVIDE(z_impl_k_sem_give = 0x0002adc1); +PROVIDE(llcp_lp_pu_run = 0x0001a97d); +PROVIDE(z_impl_k_queue_cancel_wait = 0x000324e9); +PROVIDE(nrfx_gpiote_init = 0x000296bd); +PROVIDE(lll_adv_data_init = 0x000213c9); +PROVIDE(ll_adv_params_set = 0x000146dd); +PROVIDE(ll_connect_enable = 0x0001e7dd); +PROVIDE(lll_conn_peripheral_is_abort_cb = 0x00023935); +PROVIDE(llcp_rp_conn_param_req_reply = 0x0001db45); +PROVIDE(radio_filter_has_match = 0x00024ab1); +PROVIDE(z_impl_k_condvar_broadcast = 0x0002b2c5); +PROVIDE(ticker_update_ext = 0x0000e595); +PROVIDE(z_impl_k_condvar_wait = 0x0002b339); +PROVIDE(z_impl_k_mutex_unlock = 0x0002acbd); +PROVIDE(__fpclassifyd = 0x0002e289); +PROVIDE(llcp_lp_pu_rx = 0x0001a921); +PROVIDE(z_impl_k_msgq_alloc_init = 0x0003225b); +PROVIDE(lll_conn_pdu_tx_prep = 0x00023c35); +PROVIDE(llcp_rp_chmu_rx = 0x0001dc49); PROVIDE(ull_scan_aux_setup = 0x000031c9); PROVIDE(__muldf3 = 0x000004ad); -PROVIDE(k_stack_init = 0x000323d5); -PROVIDE(ull_tx_q_enqueue_data = 0x0001a831); -PROVIDE(radio_ar_status_reset = 0x00024dc9); -PROVIDE(ull_cp_phy_update = 0x0001af8d); +PROVIDE(k_stack_init = 0x000325d5); +PROVIDE(ull_tx_q_enqueue_data = 0x0001aa31); +PROVIDE(radio_ar_status_reset = 0x00024fc9); +PROVIDE(ull_cp_phy_update = 0x0001b18d); PROVIDE(__aeabi_cfrcmple = 0x00000dc9); -PROVIDE(z_impl_device_deinit = 0x00031e21); -PROVIDE(ull_scan_is_enabled_get = 0x000174f9); -PROVIDE(cbpprintf_external = 0x0002ed8b); -PROVIDE(z_impl_log_buffered_cnt = 0x00008871); -PROVIDE(net_buf_ref = 0x00030d21); -PROVIDE(lll_reset = 0x000207b9); -PROVIDE(lll_central_prepare = 0x00024139); -PROVIDE(z_shell_cmd_line_erase = 0x00030099); -PROVIDE(shell_hexdump_line = 0x0000a7b9); -PROVIDE(_isr_wrapper = 0x0000c219); -PROVIDE(twim_nrfx_pm_action = 0x00031741); -PROVIDE(z_impl_k_wakeup = 0x0002ba05); +PROVIDE(z_impl_device_deinit = 0x00032021); +PROVIDE(ull_scan_is_enabled_get = 0x000176f9); +PROVIDE(cbpprintf_external = 0x0002ef8b); +PROVIDE(z_impl_log_buffered_cnt = 0x00008a71); +PROVIDE(net_buf_ref = 0x00030f21); +PROVIDE(lll_reset = 0x000209b9); +PROVIDE(lll_central_prepare = 0x00024339); +PROVIDE(z_shell_cmd_line_erase = 0x00030299); +PROVIDE(shell_hexdump_line = 0x0000a9b9); +PROVIDE(_isr_wrapper = 0x0000c419); +PROVIDE(twim_nrfx_pm_action = 0x00031941); +PROVIDE(z_impl_k_wakeup = 0x0002bc05); PROVIDE(__divsi3 = 0x00000105); -PROVIDE(flash_area_open = 0x00008fe5); -PROVIDE(k_work_queue_start = 0x0002af9d); -PROVIDE(z_shell_op_left_arrow = 0x00030055); -PROVIDE(arch_busy_wait = 0x0000c711); -PROVIDE(nrfx_nvmc_flash_size_get = 0x00031c31); -PROVIDE(z_log_vprintk = 0x0002f37d); -PROVIDE(ull_dle_init = 0x00018f29); +PROVIDE(flash_area_open = 0x000091e5); +PROVIDE(k_work_queue_start = 0x0002b19d); +PROVIDE(z_shell_op_left_arrow = 0x00030255); +PROVIDE(arch_busy_wait = 0x0000c911); +PROVIDE(nrfx_nvmc_flash_size_get = 0x00031e31); +PROVIDE(z_log_vprintk = 0x0002f57d); +PROVIDE(ull_dle_init = 0x00019129); PROVIDE(__aeabi_d2lz = 0x00000fb1); -PROVIDE(llcp_pdu_encode_ping_req = 0x0001c4a1); -PROVIDE(llcp_pdu_decode_min_used_chans_ind = 0x0001c6a9); -PROVIDE(k_poll_event_init = 0x00032e43); -PROVIDE(z_arm_fatal_error = 0x0000b42d); -PROVIDE(lll_scan_isr_rx_check = 0x00022889); -PROVIDE(z_arm_hard_fault = 0x0000bfa5); -PROVIDE(z_impl_llext_get_fn_table = 0x0002653d); -PROVIDE(hci_vendor_read_static_addr = 0x000241b9); -PROVIDE(z_impl_k_msgq_peek_at = 0x000320d3); -PROVIDE(radio_tmr_start_get = 0x00024afd); -PROVIDE(ull_adv_aux_get = 0x00015dd1); -PROVIDE(z_shell_log_backend_output_func = 0x000303d3); -PROVIDE(z_pend_curr = 0x0002b621); -PROVIDE(radio_switch_complete_and_tx = 0x00024721); -PROVIDE(log_output_timestamp_freq_set = 0x00008fb9); -PROVIDE(fputc = 0x0003354d); -PROVIDE(__fpclassifyl = 0x0002e089); -PROVIDE(cbvprintf = 0x0000c23d); -PROVIDE(z_impl_k_is_preempt_thread = 0x0002b185); -PROVIDE(llcp_pdu_encode_phy_update_ind = 0x0001c911); -PROVIDE(lll_abort_cb = 0x00020939); -PROVIDE(radio_status_reset = 0x000245cd); -PROVIDE(llcp_rr_terminate = 0x0001e285); +PROVIDE(llcp_pdu_encode_ping_req = 0x0001c6a1); +PROVIDE(llcp_pdu_decode_min_used_chans_ind = 0x0001c8a9); +PROVIDE(k_poll_event_init = 0x00033043); +PROVIDE(z_arm_fatal_error = 0x0000b62d); +PROVIDE(lll_scan_isr_rx_check = 0x00022a89); +PROVIDE(z_arm_hard_fault = 0x0000c1a5); +PROVIDE(z_impl_llext_get_fn_table = 0x0002673d); +PROVIDE(hci_vendor_read_static_addr = 0x000243b9); +PROVIDE(z_impl_k_msgq_peek_at = 0x000322d3); +PROVIDE(radio_tmr_start_get = 0x00024cfd); +PROVIDE(ull_adv_aux_get = 0x00015fd1); +PROVIDE(z_shell_log_backend_output_func = 0x000305d3); +PROVIDE(z_pend_curr = 0x0002b821); +PROVIDE(radio_switch_complete_and_tx = 0x00024921); +PROVIDE(log_output_timestamp_freq_set = 0x000091b9); +PROVIDE(fputc = 0x0003374d); +PROVIDE(__fpclassifyl = 0x0002e289); +PROVIDE(cbvprintf = 0x0000c43d); +PROVIDE(z_impl_k_is_preempt_thread = 0x0002b385); +PROVIDE(llcp_pdu_encode_phy_update_ind = 0x0001cb11); +PROVIDE(lll_abort_cb = 0x00020b39); +PROVIDE(radio_status_reset = 0x000247cd); +PROVIDE(llcp_rr_terminate = 0x0001e485); PROVIDE(ull_central_setup = 0x000049b9); -PROVIDE(z_impl_k_queue_peek_tail = 0x000323ad); -PROVIDE(lll_prepare = 0x0000fe25); -PROVIDE(hci_acl_handle = 0x00012dd1); -PROVIDE(nrfx_flag32_free = 0x00028dc5); -PROVIDE(radio_pkt_rx_set = 0x00024561); -PROVIDE(ll_length_default_get = 0x00018361); -PROVIDE(ll_apto_set = 0x00018529); -PROVIDE(z_impl_k_thread_suspend = 0x0002b531); -PROVIDE(z_impl_k_thread_join = 0x0002bb99); -PROVIDE(ull_filter_lll_fal_match = 0x0001f5c5); -PROVIDE(z_log_dropped = 0x0000887d); +PROVIDE(z_impl_k_queue_peek_tail = 0x000325ad); +PROVIDE(lll_prepare = 0x00010025); +PROVIDE(hci_acl_handle = 0x00012fd1); +PROVIDE(nrfx_flag32_free = 0x00028fc5); +PROVIDE(radio_pkt_rx_set = 0x00024761); +PROVIDE(ll_length_default_get = 0x00018561); +PROVIDE(ll_apto_set = 0x00018729); +PROVIDE(z_impl_k_thread_suspend = 0x0002b731); +PROVIDE(z_impl_k_thread_join = 0x0002bd99); +PROVIDE(ull_filter_lll_fal_match = 0x0001f7c5); +PROVIDE(z_log_dropped = 0x00008a7d); PROVIDE(ll_adv_enable = 0x00001631); -PROVIDE(z_impl_sys_rand_get = 0x0000c725); -PROVIDE(_OffsetAbsSyms = 0x0002e8bd); -PROVIDE(shell_strtoul = 0x0000aa19); -PROVIDE(llcp_ntf_encode_length_change = 0x0001cbb1); -PROVIDE(ull_filter_scan_update = 0x0001f6ad); -PROVIDE(llcp_pdu_decode_feature_rsp = 0x0001c62d); -PROVIDE(ll_fal_clear = 0x0001eda1); -PROVIDE(ull_scan_rsp_set = 0x00015059); -PROVIDE(ull_filter_lll_irks_get = 0x0001fc89); -PROVIDE(k_heap_init = 0x00031edd); -PROVIDE(ll_adv_cmds_is_ext = 0x00014441); -PROVIDE(lll_scan_prepare_connect_req = 0x000229f1); -PROVIDE(lll_adv_prepare = 0x000215e1); -PROVIDE(isdigit = 0x00032f9b); -PROVIDE(llcp_pdu_decode_phy_req = 0x0001c8b5); -PROVIDE(hal_ticker_instance0_trigger_set = 0x00025165); +PROVIDE(z_impl_sys_rand_get = 0x0000c925); +PROVIDE(_OffsetAbsSyms = 0x0002eabd); +PROVIDE(shell_strtoul = 0x0000ac19); +PROVIDE(llcp_ntf_encode_length_change = 0x0001cdb1); +PROVIDE(ull_filter_scan_update = 0x0001f8ad); +PROVIDE(llcp_pdu_decode_feature_rsp = 0x0001c82d); +PROVIDE(ll_fal_clear = 0x0001efa1); +PROVIDE(ull_scan_rsp_set = 0x00015259); +PROVIDE(ull_filter_lll_irks_get = 0x0001fe89); +PROVIDE(k_heap_init = 0x000320dd); +PROVIDE(ll_adv_cmds_is_ext = 0x00014641); +PROVIDE(lll_scan_prepare_connect_req = 0x00022bf1); +PROVIDE(lll_adv_prepare = 0x000217e1); +PROVIDE(isdigit = 0x0003319b); +PROVIDE(llcp_pdu_decode_phy_req = 0x0001cab5); +PROVIDE(hal_ticker_instance0_trigger_set = 0x00025365); PROVIDE(__aeabi_i2d = 0x000003d9); -PROVIDE(k_sched_lock = 0x0002b7a1); -PROVIDE(ll_connect_disable = 0x0001e6a5); -PROVIDE(__aeabi_memmove8 = 0x00032f1b); +PROVIDE(k_sched_lock = 0x0002b9a1); +PROVIDE(ll_connect_disable = 0x0001e8a5); +PROVIDE(__aeabi_memmove8 = 0x0003311b); PROVIDE(__aeabi_i2f = 0x00000cb1); -PROVIDE(sys_clock_tick_get = 0x0002c129); -PROVIDE(llcp_create_remote_procedure = 0x0001ac25); -PROVIDE(lll_adv_reset = 0x00021185); +PROVIDE(sys_clock_tick_get = 0x0002c329); +PROVIDE(llcp_create_remote_procedure = 0x0001ae25); +PROVIDE(lll_adv_reset = 0x00021385); PROVIDE(ull_adv_aux_start = 0x00001e59); -PROVIDE(ull_adv_filter_pol_get = 0x00014c4d); -PROVIDE(sinl = 0x0002dfa9); -PROVIDE(z_arm_reset = 0x0000bfb9); +PROVIDE(ull_adv_filter_pol_get = 0x00014e4d); +PROVIDE(sinl = 0x0002e1a9); +PROVIDE(z_arm_reset = 0x0000c1b9); PROVIDE(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT = 0x00000001); -PROVIDE(z_shell_has_wildcard = 0x00030835); -PROVIDE(radio_tmr_start_latency_get = 0x00024b09); -PROVIDE(ull_filter_reset = 0x0001f4c1); -PROVIDE(__aeabi_memmove4 = 0x00032f1b); -PROVIDE(hal_ticker_instance0_sched = 0x00025065); -PROVIDE(radio_whiten_iv_set = 0x000244bd); -PROVIDE(lll_init = 0x000206c9); -PROVIDE(shell_set_bypass = 0x0002fa4d); -PROVIDE(putc_unlocked = 0x0003354d); -PROVIDE(z_impl_device_is_ready = 0x00031e0b); -PROVIDE(ll_tx_mem_enqueue = 0x00017edd); -PROVIDE(llcp_lp_chmu_run = 0x0001d969); -PROVIDE(cbprintf_package_convert = 0x00008119); -PROVIDE(ull_conn_rx = 0x00018719); -PROVIDE(z_impl_flash_fill = 0x0000b36d); -PROVIDE(ull_filter_lll_rl_addr_resolve = 0x0001ff71); -PROVIDE(lll_deinit = 0x00020729); -PROVIDE(llcp_lr_run = 0x0001c2a9); -PROVIDE(nrfx_spi_uninit = 0x000299a5); -PROVIDE(z_log_msg_finalize = 0x0002f429); -PROVIDE(lll_isr_cleanup = 0x00020aa9); -PROVIDE(z_shell_write = 0x000300d1); -PROVIDE(__kernel_cos = 0x00007579); -PROVIDE(lll_clock_wait = 0x00020e55); -PROVIDE(z_shell_vt100_color_set = 0x0000ab61); -PROVIDE(radio_pkt_empty_get = 0x00024679); -PROVIDE(shell_prompt_change = 0x0002f9ab); -PROVIDE(radio_tmr_tifs_base_get = 0x00024bd1); -PROVIDE(z_impl_k_thread_stack_alloc = 0x00032ef5); -PROVIDE(hci_evt_encode = 0x0001308d); -PROVIDE(isalnum = 0x00032f5f); -PROVIDE(z_arm_bus_fault = 0x0000bfa5); -PROVIDE(mem_init = 0x0000ca6d); -PROVIDE(lll_radio_tx_ready_delay_get = 0x00020a61); -PROVIDE(nrfx_twim_xfer = 0x00029ee5); -PROVIDE(llcp_pdu_decode_conn_update_ind = 0x0001cae5); -PROVIDE(log_output_process = 0x00008cd9); -PROVIDE(ll_adv_sync_ad_data_set = 0x00016781); -PROVIDE(radio_stop = 0x00024485); -PROVIDE(llcp_rx_node_release = 0x0001ab81); -PROVIDE(mayfly_init = 0x0000cbb1); -PROVIDE(z_arm_fault_init = 0x0000bf8d); -PROVIDE(llcp_rr_pause = 0x0001de0d); -PROVIDE(llcp_pdu_decode_conn_param_rsp = 0x0001ca55); -PROVIDE(ull_scan_aux_init = 0x000177fd); -PROVIDE(lll_scan_ext_tgta_check = 0x00022915); -PROVIDE(arch_elf_relocate = 0x0000b559); -PROVIDE(llext_link = 0x000263c5); -PROVIDE(z_impl_k_yield = 0x0002b8c1); +PROVIDE(z_shell_has_wildcard = 0x00030a35); +PROVIDE(radio_tmr_start_latency_get = 0x00024d09); +PROVIDE(ull_filter_reset = 0x0001f6c1); +PROVIDE(__aeabi_memmove4 = 0x0003311b); +PROVIDE(hal_ticker_instance0_sched = 0x00025265); +PROVIDE(radio_whiten_iv_set = 0x000246bd); +PROVIDE(lll_init = 0x000208c9); +PROVIDE(shell_set_bypass = 0x0002fc4d); +PROVIDE(putc_unlocked = 0x0003374d); +PROVIDE(z_impl_device_is_ready = 0x0003200b); +PROVIDE(ll_tx_mem_enqueue = 0x000180dd); +PROVIDE(llcp_lp_chmu_run = 0x0001db69); +PROVIDE(cbprintf_package_convert = 0x00008319); +PROVIDE(ull_conn_rx = 0x00018919); +PROVIDE(z_impl_flash_fill = 0x0000b56d); +PROVIDE(ull_filter_lll_rl_addr_resolve = 0x00020171); +PROVIDE(lll_deinit = 0x00020929); +PROVIDE(llcp_lr_run = 0x0001c4a9); +PROVIDE(nrfx_spi_uninit = 0x00029ba5); +PROVIDE(z_log_msg_finalize = 0x0002f629); +PROVIDE(lll_isr_cleanup = 0x00020ca9); +PROVIDE(z_shell_write = 0x000302d1); +PROVIDE(__kernel_cos = 0x00007779); +PROVIDE(lll_clock_wait = 0x00021055); +PROVIDE(z_shell_vt100_color_set = 0x0000ad61); +PROVIDE(radio_pkt_empty_get = 0x00024879); +PROVIDE(shell_prompt_change = 0x0002fbab); +PROVIDE(radio_tmr_tifs_base_get = 0x00024dd1); +PROVIDE(z_impl_k_thread_stack_alloc = 0x000330f5); +PROVIDE(hci_evt_encode = 0x0001328d); +PROVIDE(isalnum = 0x0003315f); +PROVIDE(z_arm_bus_fault = 0x0000c1a5); +PROVIDE(mem_init = 0x0000cc6d); +PROVIDE(lll_radio_tx_ready_delay_get = 0x00020c61); +PROVIDE(nrfx_twim_xfer = 0x0002a0e5); +PROVIDE(llcp_pdu_decode_conn_update_ind = 0x0001cce5); +PROVIDE(log_output_process = 0x00008ed9); +PROVIDE(ll_adv_sync_ad_data_set = 0x00016981); +PROVIDE(radio_stop = 0x00024685); +PROVIDE(llcp_rx_node_release = 0x0001ad81); +PROVIDE(mayfly_init = 0x0000cdb1); +PROVIDE(z_arm_fault_init = 0x0000c18d); +PROVIDE(llcp_rr_pause = 0x0001e00d); +PROVIDE(llcp_pdu_decode_conn_param_rsp = 0x0001cc55); +PROVIDE(ull_scan_aux_init = 0x000179fd); +PROVIDE(lll_scan_ext_tgta_check = 0x00022b15); +PROVIDE(arch_elf_relocate = 0x0000b759); +PROVIDE(llext_link = 0x000265c5); +PROVIDE(z_impl_k_yield = 0x0002bac1); PROVIDE(__unordsf2 = 0x00000e45); -PROVIDE(llcp_rr_tx_ntf = 0x0001e181); -PROVIDE(radio_tmr_start_us = 0x00024a4d); -PROVIDE(llcp_pdu_encode_feature_rsp = 0x0001c551); -PROVIDE(ll_adv_aux_sr_data_set = 0x00015a35); -PROVIDE(lll_adv_data_release = 0x0002122d); -PROVIDE(llcp_lr_enqueue = 0x0001bf85); -PROVIDE(z_impl_flash_get_page_info_by_idx = 0x0003123f); -PROVIDE(__aeabi_memmove = 0x00032f1b); -PROVIDE(ll_timeslice_ticker_id_get = 0x0000f8c5); -PROVIDE(ll_rl_add = 0x0001fa71); -PROVIDE(z_shell_multiline_data_calc = 0x0002faed); -PROVIDE(radio_ar_has_match = 0x00024df9); -PROVIDE(k_thread_foreach_unlocked = 0x0002bea5); -PROVIDE(lll_scan_prepare = 0x000227d5); -PROVIDE(ull_disable_mark_get = 0x0000f969); -PROVIDE(tolower = 0x00033007); -PROVIDE(llcp_lr_prt_restart_with_value = 0x0001c175); -PROVIDE(llcp_lp_comm_tx_ack = 0x0001be69); -PROVIDE(llcp_pdu_encode_pause_enc_req = 0x0001c81d); -PROVIDE(ll_adv_data_set = 0x00015049); -PROVIDE(ull_adv_aux_lll_handle_get = 0x00015925); -PROVIDE(z_impl_sys_csrand_get = 0x0000c765); -PROVIDE(__double_computePow5 = 0x0002dd3d); -PROVIDE(llcp_pdu_decode_length_rsp = 0x0001cc35); -PROVIDE(llcp_lp_chmu_rx = 0x0001d955); -PROVIDE(ll_length_req_send = 0x000182e1); -PROVIDE(ull_adv_set_get = 0x00014bd5); -PROVIDE(z_nrf_clock_control_get_onoff = 0x00026a31); -PROVIDE(z_log_get_tag = 0x0002f3a3); -PROVIDE(i2c_nrfx_twim_configure = 0x00027a61); -PROVIDE(ll_rl_size_get = 0x0001f055); -PROVIDE(ull_adv_sync_init = 0x00016149); -PROVIDE(ll_rl_enable = 0x0001f3e9); -PROVIDE(lll_hfclock_off = 0x00020ebd); -PROVIDE(ull_adv_sync_chm_complete = 0x00016bd9); -PROVIDE(ll_connected_get = 0x00017e9d); -PROVIDE(llcp_rp_pu_run = 0x0001a7d1); -PROVIDE(mem_index_get = 0x0000cb11); -PROVIDE(atof = 0x0003301f); -PROVIDE(lll_adv_pdu_alloc_pdu_adv = 0x00021269); -PROVIDE(isupper = 0x00032fdf); -PROVIDE(z_shell_op_char_insert = 0x0000ad91); -PROVIDE(k_thread_state_str = 0x0002b1c5); -PROVIDE(ull_dle_update_eff_rx = 0x00018e0d); -PROVIDE(nrfx_twim_0_irq_handler = 0x0002a26d); -PROVIDE(llcp_ntf_encode_unknown_rsp = 0x0001c4ed); -PROVIDE(lll_adv_aux_prepare = 0x00021f81); -PROVIDE(move_thread_to_end_of_prio_q = 0x0002b4a1); +PROVIDE(llcp_rr_tx_ntf = 0x0001e381); +PROVIDE(radio_tmr_start_us = 0x00024c4d); +PROVIDE(llcp_pdu_encode_feature_rsp = 0x0001c751); +PROVIDE(ll_adv_aux_sr_data_set = 0x00015c35); +PROVIDE(lll_adv_data_release = 0x0002142d); +PROVIDE(llcp_lr_enqueue = 0x0001c185); +PROVIDE(z_impl_flash_get_page_info_by_idx = 0x0003143f); +PROVIDE(__aeabi_memmove = 0x0003311b); +PROVIDE(ll_timeslice_ticker_id_get = 0x0000fac5); +PROVIDE(ll_rl_add = 0x0001fc71); +PROVIDE(z_shell_multiline_data_calc = 0x0002fced); +PROVIDE(radio_ar_has_match = 0x00024ff9); +PROVIDE(k_thread_foreach_unlocked = 0x0002c0a5); +PROVIDE(lll_scan_prepare = 0x000229d5); +PROVIDE(ull_disable_mark_get = 0x0000fb69); +PROVIDE(tolower = 0x00033207); +PROVIDE(llcp_lr_prt_restart_with_value = 0x0001c375); +PROVIDE(llcp_lp_comm_tx_ack = 0x0001c069); +PROVIDE(llcp_pdu_encode_pause_enc_req = 0x0001ca1d); +PROVIDE(ll_adv_data_set = 0x00015249); +PROVIDE(ull_adv_aux_lll_handle_get = 0x00015b25); +PROVIDE(z_impl_sys_csrand_get = 0x0000c965); +PROVIDE(__double_computePow5 = 0x0002df3d); +PROVIDE(llcp_pdu_decode_length_rsp = 0x0001ce35); +PROVIDE(llcp_lp_chmu_rx = 0x0001db55); +PROVIDE(ll_length_req_send = 0x000184e1); +PROVIDE(ull_adv_set_get = 0x00014dd5); +PROVIDE(z_nrf_clock_control_get_onoff = 0x00026c31); +PROVIDE(z_log_get_tag = 0x0002f5a3); +PROVIDE(i2c_nrfx_twim_configure = 0x00027c61); +PROVIDE(ll_rl_size_get = 0x0001f255); +PROVIDE(ull_adv_sync_init = 0x00016349); +PROVIDE(ll_rl_enable = 0x0001f5e9); +PROVIDE(lll_hfclock_off = 0x000210bd); +PROVIDE(ull_adv_sync_chm_complete = 0x00016dd9); +PROVIDE(ll_connected_get = 0x0001809d); +PROVIDE(llcp_rp_pu_run = 0x0001a9d1); +PROVIDE(mem_index_get = 0x0000cd11); +PROVIDE(atof = 0x0003321f); +PROVIDE(lll_adv_pdu_alloc_pdu_adv = 0x00021469); +PROVIDE(isupper = 0x000331df); +PROVIDE(z_shell_op_char_insert = 0x0000af91); +PROVIDE(k_thread_state_str = 0x0002b3c5); +PROVIDE(ull_dle_update_eff_rx = 0x0001900d); +PROVIDE(nrfx_twim_0_irq_handler = 0x0002a46d); +PROVIDE(llcp_ntf_encode_unknown_rsp = 0x0001c6ed); +PROVIDE(lll_adv_aux_prepare = 0x00022181); +PROVIDE(move_thread_to_end_of_prio_q = 0x0002b6a1); PROVIDE(__udivmoddi4 = 0x00000fdf); PROVIDE(__aeabi_fcmpge = 0x00000e1d); -PROVIDE(llcp_ntf_encode_enc_req = 0x0001c795); -PROVIDE(util_aa_le32 = 0x0000ceb1); -PROVIDE(radio_pkt_scratch_get = 0x00024681); -PROVIDE(__ceil_log2pow5 = 0x0002dced); -PROVIDE(getopt = 0x0000c401); -PROVIDE(ull_cp_conn_update = 0x0001b125); -PROVIDE(z_handle_obj_poll_events = 0x00032e61); -PROVIDE(lll_adv_data_dequeue = 0x000211f5); -PROVIDE(z_impl_k_thread_name_copy = 0x0003260d); -PROVIDE(__wrap_free = 0x0000c369); -PROVIDE(z_shell_cmd_get = 0x0000a9a5); -PROVIDE(toupper = 0x00033013); +PROVIDE(llcp_ntf_encode_enc_req = 0x0001c995); +PROVIDE(util_aa_le32 = 0x0000d0b1); +PROVIDE(radio_pkt_scratch_get = 0x00024881); +PROVIDE(__ceil_log2pow5 = 0x0002deed); +PROVIDE(getopt = 0x0000c601); +PROVIDE(ull_cp_conn_update = 0x0001b325); +PROVIDE(z_handle_obj_poll_events = 0x00033061); +PROVIDE(lll_adv_data_dequeue = 0x000213f5); +PROVIDE(z_impl_k_thread_name_copy = 0x0003280d); +PROVIDE(__wrap_free = 0x0000c569); +PROVIDE(z_shell_cmd_get = 0x0000aba5); +PROVIDE(toupper = 0x00033213); PROVIDE(__udivsi3 = 0x000000e1); -PROVIDE(__rem_pio2 = 0x00007191); -PROVIDE(shell_start = 0x0002f83d); -PROVIDE(llcp_lp_comm_rx = 0x0001be71); -PROVIDE(llext_read_symbol = 0x00031057); -PROVIDE(llext_copy_strings = 0x00030f1f); -PROVIDE(z_shell_find_cmd = 0x0002fd07); -PROVIDE(lll_conn_isr_rx = 0x00023b05); -PROVIDE(llcp_ntf_encode_version_ind = 0x0001c6fd); -PROVIDE(z_shell_op_cond_next_line = 0x0002feff); +PROVIDE(__rem_pio2 = 0x00007391); +PROVIDE(shell_start = 0x0002fa3d); +PROVIDE(llcp_lp_comm_rx = 0x0001c071); +PROVIDE(llext_read_symbol = 0x00031257); +PROVIDE(llext_copy_strings = 0x0003111f); +PROVIDE(z_shell_find_cmd = 0x0002ff07); +PROVIDE(lll_conn_isr_rx = 0x00023d05); +PROVIDE(llcp_ntf_encode_version_ind = 0x0001c8fd); +PROVIDE(z_shell_op_cond_next_line = 0x000300ff); PROVIDE(CONFIG_ARCH_HAS_TIMING_FUNCTIONS = 0x00000001); -PROVIDE(ull_pdu_data_init = 0x00018c9d); -PROVIDE(z_shell_op_char_backspace = 0x0003027d); +PROVIDE(ull_pdu_data_init = 0x00018e9d); +PROVIDE(z_shell_op_char_backspace = 0x0003047d); PROVIDE(__subdf3 = 0x0000013d); -PROVIDE(atoi = 0x00033025); -PROVIDE(ticker_job_sched = 0x0000e6a5); -PROVIDE(nrf_flash_sync_is_required = 0x00020119); +PROVIDE(atoi = 0x00033225); +PROVIDE(ticker_job_sched = 0x0000e8a5); +PROVIDE(nrf_flash_sync_is_required = 0x00020319); PROVIDE(__ledf2 = 0x000008d9); -PROVIDE(k_work_cancel_delayable = 0x000325af); -PROVIDE(floorl = 0x0002e811); -PROVIDE(llcp_pdu_encode_terminate_ind = 0x0001c6b9); -PROVIDE(nrfx_twi_twim_bus_recover = 0x0002a28d); +PROVIDE(k_work_cancel_delayable = 0x000327af); +PROVIDE(floorl = 0x0002ea11); +PROVIDE(llcp_pdu_encode_terminate_ind = 0x0001c8b9); +PROVIDE(nrfx_twi_twim_bus_recover = 0x0002a48d); PROVIDE(__adddf3 = 0x00000141); PROVIDE(__divdf3 = 0x00000701); -PROVIDE(ll_rx_dequeue = 0x0000f281); -PROVIDE(lll_scan_adva_check = 0x000228bd); +PROVIDE(ll_rx_dequeue = 0x0000f481); +PROVIDE(lll_scan_adva_check = 0x00022abd); PROVIDE(__aeabi_idiv = 0x00000105); -PROVIDE(ull_adv_aux_time_get = 0x00015de1); -PROVIDE(ull_conn_llcp = 0x00018791); -PROVIDE(ull_cp_version_exchange = 0x0001aea9); -PROVIDE(radio_is_idle = 0x00024639); -PROVIDE(lll_conn_tx_pkt_set = 0x000239dd); -PROVIDE(cntr_init = 0x000242ad); +PROVIDE(ull_adv_aux_time_get = 0x00015fe1); +PROVIDE(ull_conn_llcp = 0x00018991); +PROVIDE(ull_cp_version_exchange = 0x0001b0a9); +PROVIDE(radio_is_idle = 0x00024839); +PROVIDE(lll_conn_tx_pkt_set = 0x00023bdd); +PROVIDE(cntr_init = 0x000244ad); PROVIDE(__aeabi_dcmplt = 0x00000991); -PROVIDE(ll_conn_update = 0x00018105); -PROVIDE(radio_filter_match_get = 0x000248c5); -PROVIDE(ull_chan_reset = 0x0001eae1); +PROVIDE(ll_conn_update = 0x00018305); +PROVIDE(radio_filter_match_get = 0x00024ac5); +PROVIDE(ull_chan_reset = 0x0001ece1); PROVIDE(nrf_flash_sync_exe = 0x00004ee9); -PROVIDE(radio_ccm_mic_is_valid = 0x00024d19); -PROVIDE(ull_cp_tx_ntf = 0x0001b2cd); -PROVIDE(llext_bringup = 0x00030f13); -PROVIDE(z_thread_abort = 0x0002ba59); -PROVIDE(k_free = 0x00032edf); -PROVIDE(ull_cp_release_tx = 0x0001ad05); -PROVIDE(__kernel_tan = 0x00007851); -PROVIDE(radio_rx_chain_delay_get = 0x0002458d); -PROVIDE(z_unpend1_no_timeout = 0x0003274b); -PROVIDE(z_impl_k_usleep = 0x0002b9c9); -PROVIDE(radio_tmr_tifs_set = 0x000248f1); -PROVIDE(lll_scan_aux_isr_aux_setup = 0x00023141); +PROVIDE(radio_ccm_mic_is_valid = 0x00024f19); +PROVIDE(ull_cp_tx_ntf = 0x0001b4cd); +PROVIDE(llext_bringup = 0x00031113); +PROVIDE(z_thread_abort = 0x0002bc59); +PROVIDE(k_free = 0x000330df); +PROVIDE(ull_cp_release_tx = 0x0001af05); +PROVIDE(__kernel_tan = 0x00007a51); +PROVIDE(radio_rx_chain_delay_get = 0x0002478d); +PROVIDE(z_unpend1_no_timeout = 0x0003294b); +PROVIDE(z_impl_k_usleep = 0x0002bbc9); +PROVIDE(radio_tmr_tifs_set = 0x00024af1); +PROVIDE(lll_scan_aux_isr_aux_setup = 0x00023341); PROVIDE(ull_adv_sync_time_update = 0x00002e81); -PROVIDE(mem_rcopy = 0x0000cb1d); +PROVIDE(mem_rcopy = 0x0000cd1d); PROVIDE(__aeabi_dcmpgt = 0x000009cd); -PROVIDE(ull_conn_tx_lll_enqueue = 0x000189f1); -PROVIDE(z_impl_k_stack_push = 0x00032411); -PROVIDE(ll_chm_get = 0x00018195); -PROVIDE(__log10Pow5 = 0x0002dcd5); -PROVIDE(z_getopt_global_state_update = 0x0000c4f9); -PROVIDE(arch_new_thread = 0x0000c181); -PROVIDE(puts = 0x0002c531); -PROVIDE(z_add_timeout = 0x0002bf81); -PROVIDE(i2c_nrfx_twim_recover_bus = 0x00027a21); -PROVIDE(z_impl_flash_get_page_info_by_offs = 0x00031237); -PROVIDE(ll_rl_crpa_get = 0x0001f30d); -PROVIDE(z_impl_k_float_disable = 0x00031ff3); -PROVIDE(z_impl_k_pipe_read = 0x0002bc3d); -PROVIDE(llext_free_inspection_data = 0x00025731); -PROVIDE(k_work_schedule = 0x0002b06d); -PROVIDE(ull_adv_aux_init = 0x00015351); -PROVIDE(__log10Pow2 = 0x0002dcc9); -PROVIDE(ll_addr_read = 0x0000e781); -PROVIDE(ull_scan_init = 0x00017099); -PROVIDE(ll_rl_id_addr_get = 0x0001efbd); -PROVIDE(shell_fprintf_error = 0x0002f98f); -PROVIDE(k_thread_system_pool_assign = 0x0002c471); -PROVIDE(ldexp = 0x0002e741); -PROVIDE(ll_adv_disable_all = 0x00014b65); -PROVIDE(ull_conn_init = 0x00018595); -PROVIDE(ull_dle_local_tx_update = 0x00018f01); -PROVIDE(ull_scan_is_valid_get = 0x000174d5); -PROVIDE(isspace = 0x00032fcb); -PROVIDE(nrfx_isr = 0x00031b21); -PROVIDE(llcp_rp_enc_run = 0x000199b1); -PROVIDE(ull_ticker_status_give = 0x0000e879); -PROVIDE(ll_set_min_used_chans = 0x0001e4b1); -PROVIDE(z_impl_k_condvar_signal = 0x0002b079); -PROVIDE(ull_cp_remote_cpr_pending = 0x0001b279); -PROVIDE(radio_filter_status_reset = 0x0002489d); +PROVIDE(ull_conn_tx_lll_enqueue = 0x00018bf1); +PROVIDE(z_impl_k_stack_push = 0x00032611); +PROVIDE(ll_chm_get = 0x00018395); +PROVIDE(__log10Pow5 = 0x0002ded5); +PROVIDE(z_getopt_global_state_update = 0x0000c6f9); +PROVIDE(arch_new_thread = 0x0000c381); +PROVIDE(puts = 0x0002c731); +PROVIDE(z_add_timeout = 0x0002c181); +PROVIDE(i2c_nrfx_twim_recover_bus = 0x00027c21); +PROVIDE(z_impl_flash_get_page_info_by_offs = 0x00031437); +PROVIDE(ll_rl_crpa_get = 0x0001f50d); +PROVIDE(z_impl_k_float_disable = 0x000321f3); +PROVIDE(z_impl_k_pipe_read = 0x0002be3d); +PROVIDE(llext_free_inspection_data = 0x00025931); +PROVIDE(k_work_schedule = 0x0002b26d); +PROVIDE(ull_adv_aux_init = 0x00015551); +PROVIDE(__log10Pow2 = 0x0002dec9); +PROVIDE(ll_addr_read = 0x0000e981); +PROVIDE(ull_scan_init = 0x00017299); +PROVIDE(ll_rl_id_addr_get = 0x0001f1bd); +PROVIDE(shell_fprintf_error = 0x0002fb8f); +PROVIDE(k_thread_system_pool_assign = 0x0002c671); +PROVIDE(ldexp = 0x0002e941); +PROVIDE(ll_adv_disable_all = 0x00014d65); +PROVIDE(ull_conn_init = 0x00018795); +PROVIDE(ull_dle_local_tx_update = 0x00019101); +PROVIDE(ull_scan_is_valid_get = 0x000176d5); +PROVIDE(isspace = 0x000331cb); +PROVIDE(nrfx_isr = 0x00031d21); +PROVIDE(llcp_rp_enc_run = 0x00019bb1); +PROVIDE(ull_ticker_status_give = 0x0000ea79); +PROVIDE(ll_set_min_used_chans = 0x0001e6b1); +PROVIDE(z_impl_k_condvar_signal = 0x0002b279); +PROVIDE(ull_cp_remote_cpr_pending = 0x0001b479); +PROVIDE(radio_filter_status_reset = 0x00024a9d); PROVIDE(__floatsidf = 0x000003d9); -PROVIDE(z_init_thread_base = 0x0003261f); -PROVIDE(llcp_lp_enc_rx = 0x000198fd); -PROVIDE(ull_cp_ltk_req_reply = 0x0001b0a9); -PROVIDE(ull_scan_reset = 0x00017375); -PROVIDE(z_impl_k_msgq_peek = 0x000320a1); -PROVIDE(z_impl_flash_get_page_count = 0x00031249); -PROVIDE(net_buf_simple_pull_mem = 0x00030dc1); -PROVIDE(__math_uflow = 0x00033575); -PROVIDE(shell_fprintf_normal = 0x0002f957); -PROVIDE(z_sched_wait = 0x0002bc19); -PROVIDE(mayfly_run = 0x0000cd15); -PROVIDE(mayfly_enable_cb = 0x00024ef1); -PROVIDE(z_reschedule_irqlock = 0x0002b779); -PROVIDE(ull_conn_tx_demux = 0x000187f9); -PROVIDE(ull_disable_mark = 0x0000f939); -PROVIDE(radio_ar_resolve = 0x00024e61); -PROVIDE(ticker_init = 0x0000e271); -PROVIDE(lll_rand_get = 0x00020781); -PROVIDE(atol = 0x0003302d); -PROVIDE(ull_tx_q_enqueue_ctrl = 0x0001a859); -PROVIDE(z_impl_k_busy_wait = 0x00031e01); -PROVIDE(ll_feat_get = 0x0000e6e1); -PROVIDE(bt_hci_recv = 0x0000c7c5); -PROVIDE(radio_ar_configure = 0x00024d2d); -PROVIDE(llcp_pdu_decode_length_req = 0x0001cbe1); -PROVIDE(llcp_lp_pu_tx_ntf = 0x0001a78d); -PROVIDE(ull_cp_tx_ack = 0x0001b291); -PROVIDE(ull_scan_is_enabled = 0x0001752d); -PROVIDE(__aeabi_read_tp = 0x00033585); -PROVIDE(lll_scan_reset = 0x000227d1); -PROVIDE(ll_tx_mem_acquire = 0x00017ec5); -PROVIDE(__dtox_engine = 0x00033415); -PROVIDE(ull_dle_update_eff = 0x00018d0d); -PROVIDE(k_heap_alloc = 0x00031f73); -PROVIDE(z_impl_zephyr_fputc = 0x0000c275); -PROVIDE(ull_adv_reset_finalize = 0x00014b8d); -PROVIDE(lll_isr_tx_status_reset = 0x00020a69); -PROVIDE(llext_teardown = 0x00030f19); -PROVIDE(putc = 0x0003354d); -PROVIDE(ull_cp_chan_map_update = 0x0001b011); +PROVIDE(z_init_thread_base = 0x0003281f); +PROVIDE(llcp_lp_enc_rx = 0x00019afd); +PROVIDE(ull_cp_ltk_req_reply = 0x0001b2a9); +PROVIDE(ull_scan_reset = 0x00017575); +PROVIDE(z_impl_k_msgq_peek = 0x000322a1); +PROVIDE(z_impl_flash_get_page_count = 0x00031449); +PROVIDE(net_buf_simple_pull_mem = 0x00030fc1); +PROVIDE(__math_uflow = 0x00033775); +PROVIDE(shell_fprintf_normal = 0x0002fb57); +PROVIDE(z_sched_wait = 0x0002be19); +PROVIDE(mayfly_run = 0x0000cf15); +PROVIDE(mayfly_enable_cb = 0x000250f1); +PROVIDE(z_reschedule_irqlock = 0x0002b979); +PROVIDE(ull_conn_tx_demux = 0x000189f9); +PROVIDE(ull_disable_mark = 0x0000fb39); +PROVIDE(radio_ar_resolve = 0x00025061); +PROVIDE(ticker_init = 0x0000e471); +PROVIDE(lll_rand_get = 0x00020981); +PROVIDE(atol = 0x0003322d); +PROVIDE(ull_tx_q_enqueue_ctrl = 0x0001aa59); +PROVIDE(z_impl_k_busy_wait = 0x00032001); +PROVIDE(ll_feat_get = 0x0000e8e1); +PROVIDE(bt_hci_recv = 0x0000c9c5); +PROVIDE(radio_ar_configure = 0x00024f2d); +PROVIDE(llcp_pdu_decode_length_req = 0x0001cde1); +PROVIDE(llcp_lp_pu_tx_ntf = 0x0001a98d); +PROVIDE(ull_cp_tx_ack = 0x0001b491); +PROVIDE(ull_scan_is_enabled = 0x0001772d); +PROVIDE(__aeabi_read_tp = 0x00033785); +PROVIDE(lll_scan_reset = 0x000229d1); +PROVIDE(ll_tx_mem_acquire = 0x000180c5); +PROVIDE(atan2 = 0x00007191); +PROVIDE(__dtox_engine = 0x00033615); +PROVIDE(ull_dle_update_eff = 0x00018f0d); +PROVIDE(k_heap_alloc = 0x00032173); +PROVIDE(z_impl_zephyr_fputc = 0x0000c475); +PROVIDE(ull_adv_reset_finalize = 0x00014d8d); +PROVIDE(lll_isr_tx_status_reset = 0x00020c69); +PROVIDE(llext_teardown = 0x00031119); +PROVIDE(putc = 0x0003374d); +PROVIDE(ull_cp_chan_map_update = 0x0001b211); PROVIDE(ull_adv_aux_evt_init = 0x00001dc9); -PROVIDE(sprintf = 0x0002c5c9); -PROVIDE(z_device_get_all_static = 0x0002a375); -PROVIDE(radio_reset = 0x000243f9); -PROVIDE(sys_clock_tick_get_32 = 0x00032b5f); -PROVIDE(z_impl_k_poll_signal_reset = 0x00032ea9); -PROVIDE(z_impl_k_thread_resume = 0x0002b73d); -PROVIDE(bt_buf_get_tx = 0x0000c88d); -PROVIDE(z_arm_nmi = 0x00030a13); -PROVIDE(k_work_init_delayable = 0x00032597); -PROVIDE(memq_enqueue = 0x0000cb6d); -PROVIDE(ll_phy_default_set = 0x00018405); -PROVIDE(__log2pow5 = 0x0002dce1); -PROVIDE(llcp_rp_pu_rx = 0x0001a795); -PROVIDE(ull_rx_sched = 0x0000fb55); -PROVIDE(log_source_name_get = 0x00008919); -PROVIDE(memq_init = 0x0000cb51); -PROVIDE(ring_buf_area_finish = 0x0002f253); -PROVIDE(memcpy = 0x00032eff); -PROVIDE(lll_adv_sync_init = 0x000220d5); +PROVIDE(sprintf = 0x0002c7c9); +PROVIDE(z_device_get_all_static = 0x0002a575); +PROVIDE(radio_reset = 0x000245f9); +PROVIDE(sys_clock_tick_get_32 = 0x00032d5f); +PROVIDE(z_impl_k_poll_signal_reset = 0x000330a9); +PROVIDE(z_impl_k_thread_resume = 0x0002b93d); +PROVIDE(bt_buf_get_tx = 0x0000ca8d); +PROVIDE(z_arm_nmi = 0x00030c13); +PROVIDE(k_work_init_delayable = 0x00032797); +PROVIDE(memq_enqueue = 0x0000cd6d); +PROVIDE(ll_phy_default_set = 0x00018605); +PROVIDE(__log2pow5 = 0x0002dee1); +PROVIDE(llcp_rp_pu_rx = 0x0001a995); +PROVIDE(ull_rx_sched = 0x0000fd55); +PROVIDE(log_source_name_get = 0x00008b19); +PROVIDE(memq_init = 0x0000cd51); +PROVIDE(ring_buf_area_finish = 0x0002f453); +PROVIDE(memcpy = 0x000330ff); +PROVIDE(lll_adv_sync_init = 0x000222d5); PROVIDE(__nedf2 = 0x000008e1); -PROVIDE(lll_is_abort_cb = 0x00020931); -PROVIDE(z_shell_op_char_delete = 0x0003023f); -PROVIDE(radio_rssi_measure = 0x00024801); -PROVIDE(ll_reset = 0x0000efa9); -PROVIDE(z_shell_op_cursor_position_synchronize = 0x0002ff1d); -PROVIDE(z_fatal_error = 0x0002a461); -PROVIDE(llext_free_regions = 0x000256e9); -PROVIDE(z_shell_op_right_arrow = 0x00030067); +PROVIDE(lll_is_abort_cb = 0x00020b31); +PROVIDE(z_shell_op_char_delete = 0x0003043f); +PROVIDE(radio_rssi_measure = 0x00024a01); +PROVIDE(ll_reset = 0x0000f1a9); +PROVIDE(z_shell_op_cursor_position_synchronize = 0x0003011d); +PROVIDE(z_fatal_error = 0x0002a661); +PROVIDE(llext_free_regions = 0x000258e9); +PROVIDE(z_shell_op_right_arrow = 0x00030267); PROVIDE(__aeabi_fcmpgt = 0x00000e31); -PROVIDE(hal_ticker_instance0_caller_id_get = 0x00024ffd); +PROVIDE(hal_ticker_instance0_caller_id_get = 0x000251fd); PROVIDE(__aeabi_l2f = 0x00000cdd); -PROVIDE(__pow5bits = 0x0002dcfd); -PROVIDE(ull_filter_lll_rl_irk_idx = 0x0001fd81); -PROVIDE(radio_ccm_tx_pkt_set = 0x00024c69); +PROVIDE(__pow5bits = 0x0002defd); +PROVIDE(ull_filter_lll_rl_irk_idx = 0x0001ff81); +PROVIDE(radio_ccm_tx_pkt_set = 0x00024e69); PROVIDE(atanl = 0x00006e59); -PROVIDE(sys_timepoint_calc = 0x00032b6b); -PROVIDE(z_sched_wake_thread = 0x00032709); -PROVIDE(z_impl_k_pipe_write = 0x000328ff); -PROVIDE(sys_clock_set_timeout = 0x00028a5d); -PROVIDE(ll_rx_release = 0x0000f7a9); -PROVIDE(strtod = 0x0002c619); +PROVIDE(sys_timepoint_calc = 0x00032d6b); +PROVIDE(z_sched_wake_thread = 0x00032909); +PROVIDE(z_impl_k_pipe_write = 0x00032aff); +PROVIDE(sys_clock_set_timeout = 0x00028c5d); +PROVIDE(ll_rx_release = 0x0000f9a9); +PROVIDE(strtod = 0x0002c819); PROVIDE(__aeabi_dadd = 0x00000141); -PROVIDE(llcp_rr_set_paused_cmd = 0x0001dde1); -PROVIDE(ll_adv_aux_set_count_get = 0x000152c9); -PROVIDE(nrfx_clock_init = 0x00028ed5); +PROVIDE(llcp_rr_set_paused_cmd = 0x0001dfe1); +PROVIDE(ll_adv_aux_set_count_get = 0x000154c9); +PROVIDE(nrfx_clock_init = 0x000290d5); PROVIDE(__aeabi_l2d = 0x00000451); -PROVIDE(radio_tmr_aa_get = 0x00024b85); +PROVIDE(radio_tmr_aa_get = 0x00024d85); PROVIDE(strlen = 0x00000fa1); -PROVIDE(lll_scan_aux_setup = 0x000233b5); -PROVIDE(net_buf_simple_pull = 0x00030db1); -PROVIDE(radio_tmr_hcto_configure = 0x00024b25); -PROVIDE(z_arm_pendsv = 0x0000c02d); -PROVIDE(mayfly_prio_is_equal = 0x00024f75); -PROVIDE(llcp_lr_tx_ntf = 0x0001c275); -PROVIDE(llcp_rr_init = 0x0001e1a5); +PROVIDE(lll_scan_aux_setup = 0x000235b5); +PROVIDE(net_buf_simple_pull = 0x00030fb1); +PROVIDE(radio_tmr_hcto_configure = 0x00024d25); +PROVIDE(z_arm_pendsv = 0x0000c22d); +PROVIDE(mayfly_prio_is_equal = 0x00025175); +PROVIDE(llcp_lr_tx_ntf = 0x0001c475); +PROVIDE(llcp_rr_init = 0x0001e3a5); PROVIDE(__fixunsdfdi = 0x00000f41); -PROVIDE(z_impl_k_msgq_get = 0x0002a905); -PROVIDE(hci_num_cmplt_encode = 0x00013b21); -PROVIDE(strtol = 0x0002c995); -PROVIDE(z_impl_k_thread_stack_free = 0x00032ef9); -PROVIDE(ticker_job = 0x0000d701); -PROVIDE(ticker_trigger = 0x0000e2ed); -PROVIDE(lll_hfclock_on = 0x00020e8d); -PROVIDE(llext_loaded_sect_ptr = 0x00030fad); +PROVIDE(z_impl_k_msgq_get = 0x0002ab05); +PROVIDE(hci_num_cmplt_encode = 0x00013d21); +PROVIDE(strtol = 0x0002cb95); +PROVIDE(z_impl_k_thread_stack_free = 0x000330f9); +PROVIDE(ticker_job = 0x0000d901); +PROVIDE(ticker_trigger = 0x0000e4ed); +PROVIDE(lll_hfclock_on = 0x0002108d); +PROVIDE(llext_loaded_sect_ptr = 0x000311ad); PROVIDE(__truncdfsf2 = 0x00000a9d); -PROVIDE(ll_rx_link_release = 0x0000f791); -PROVIDE(llcp_lr_pause = 0x0001c159); -PROVIDE(llcp_rr_new = 0x0001e1d5); -PROVIDE(ull_adv_sync_release = 0x00016225); -PROVIDE(nrfx_gpiote_input_configure = 0x00029241); +PROVIDE(ll_rx_link_release = 0x0000f991); +PROVIDE(llcp_lr_pause = 0x0001c359); +PROVIDE(llcp_rr_new = 0x0001e3d5); +PROVIDE(ull_adv_sync_release = 0x00016425); +PROVIDE(nrfx_gpiote_input_configure = 0x00029441); PROVIDE(__aeabi_uidiv = 0x000000e1); -PROVIDE(ll_adv_cmds_set = 0x00014409); -PROVIDE(ll_tx_pwr_get = 0x0000e70d); -PROVIDE(ll_phy_req_send = 0x00018419); -PROVIDE(ll_rx_sched = 0x0000f7cd); -PROVIDE(radio_setup = 0x000243b5); -PROVIDE(k_queue_append = 0x00032353); -PROVIDE(lll_conn_central_is_abort_cb = 0x00023709); -PROVIDE(onoff_manager_init = 0x0002f03b); -PROVIDE(ull_scan_aux_lll_parent_get = 0x000178e1); -PROVIDE(strcasecmp = 0x0003305d); -PROVIDE(z_unpend_thread_no_timeout = 0x000326e7); -PROVIDE(z_impl_k_sem_reset = 0x0002ac81); -PROVIDE(nrfx_busy_wait = 0x00031b23); -PROVIDE(nrf_flash_sync_init = 0x000200f5); -PROVIDE(llcp_rp_cu_rx = 0x0001d8ed); +PROVIDE(ll_adv_cmds_set = 0x00014609); +PROVIDE(ll_tx_pwr_get = 0x0000e90d); +PROVIDE(ll_phy_req_send = 0x00018619); +PROVIDE(ll_rx_sched = 0x0000f9cd); +PROVIDE(radio_setup = 0x000245b5); +PROVIDE(k_queue_append = 0x00032553); +PROVIDE(lll_conn_central_is_abort_cb = 0x00023909); +PROVIDE(onoff_manager_init = 0x0002f23b); +PROVIDE(ull_scan_aux_lll_parent_get = 0x00017ae1); +PROVIDE(strcasecmp = 0x0003325d); +PROVIDE(z_unpend_thread_no_timeout = 0x000328e7); +PROVIDE(z_impl_k_sem_reset = 0x0002ae81); +PROVIDE(nrfx_busy_wait = 0x00031d23); +PROVIDE(nrf_flash_sync_init = 0x000202f5); +PROVIDE(llcp_rp_cu_rx = 0x0001daed); PROVIDE(__eqdf2 = 0x000008e1); -PROVIDE(mem_get = 0x0000cb09); -PROVIDE(ll_version_ind_send = 0x00018299); +PROVIDE(mem_get = 0x0000cd09); +PROVIDE(ll_version_ind_send = 0x00018499); PROVIDE(__fixdfsi = 0x00000a0d); -PROVIDE(ull_conn_lll_ack_enqueue = 0x00018b31); -PROVIDE(util_ones_count_get = 0x0000ce89); -PROVIDE(z_dummy_thread_init = 0x0002b375); -PROVIDE(radio_isr_set = 0x00024375); -PROVIDE(ull_scan_aux_stop = 0x00017a05); -PROVIDE(z_impl_k_timer_start = 0x0002c239); -PROVIDE(ll_rssi_get = 0x00018485); +PROVIDE(ull_conn_lll_ack_enqueue = 0x00018d31); +PROVIDE(util_ones_count_get = 0x0000d089); +PROVIDE(z_dummy_thread_init = 0x0002b575); +PROVIDE(radio_isr_set = 0x00024575); +PROVIDE(ull_scan_aux_stop = 0x00017c05); +PROVIDE(z_impl_k_timer_start = 0x0002c439); +PROVIDE(ll_rssi_get = 0x00018685); PROVIDE(__aeabi_ul2f = 0x00000ccd); -PROVIDE(ll_rx_put_sched = 0x0000f7d9); +PROVIDE(ll_rx_put_sched = 0x0000f9d9); PROVIDE(kheap_llext_heap = 0x20008ea0); PROVIDE(kheap_llext_heap_size = 15360); PROVIDE(kheap__system_heap = 0x2000dd00); PROVIDE(kheap__system_heap_size = 1024); -PROVIDE(__device_dts_ord_43 = 0x0000000000033638); -PROVIDE(__device_dts_ord_9 = 0x000000000003365c); -PROVIDE(__device_dts_ord_63 = 0x0000000000033680); -PROVIDE(__device_dts_ord_19 = 0x00000000000336a4); -PROVIDE(__device_dts_ord_92 = 0x00000000000336c8); -PROVIDE(__device_dts_ord_76 = 0x00000000000336ec); -PROVIDE(__device_dts_ord_13 = 0x0000000000033710); -PROVIDE(__device_dts_ord_84 = 0x0000000000033734); -PROVIDE(__device_dts_ord_93 = 0x0000000000033758); -PROVIDE(__device_dts_ord_94 = 0x000000000003377c); +PROVIDE(__device_dts_ord_43 = 0x0000000000033838); +PROVIDE(__device_dts_ord_9 = 0x000000000003385c); +PROVIDE(__device_dts_ord_63 = 0x0000000000033880); +PROVIDE(__device_dts_ord_19 = 0x00000000000338a4); +PROVIDE(__device_dts_ord_92 = 0x00000000000338c8); +PROVIDE(__device_dts_ord_76 = 0x00000000000338ec); +PROVIDE(__device_dts_ord_13 = 0x0000000000033910); +PROVIDE(__device_dts_ord_84 = 0x0000000000033934); +PROVIDE(__device_dts_ord_93 = 0x0000000000033958); +PROVIDE(__device_dts_ord_94 = 0x000000000003397c); PROVIDE(_sketch_start = 0x70000 ); diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h index 48be8994..184e288f 100644 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h @@ -1,6 +1,6 @@ /* - * This file is generated by /home/burellil/Work/ArduinoCore-zephyr/zephyr/scripts/build/gen_strsignal_table.py + * This file is generated by /home/kurte/github/zephyr/scripts/build/gen_strsignal_table.py */ #include diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h index 9d2a1503..51728302 100644 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h @@ -2,7 +2,7 @@ * Generated by gen_defines.py * * DTS input file: - * /home/burellil/Work/ArduinoCore-zephyr/ArduinoCore-zephyr/build/arduino_portenta_c33_r7fa6m5bh3cfc/zephyr/zephyr.dts.pre + * /home/kurte/github/ArduinoCore-zephyr/build/arduino_portenta_c33_r7fa6m5bh3cfc/zephyr/zephyr.dts.pre * * Directories with bindings: * $ZEPHYR_BASE/dts/bindings diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/zephyr/version.h b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/zephyr/version.h index 9a30242a..76aa14d4 100644 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/zephyr/version.h +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/include/generated/zephyr/version.h @@ -19,7 +19,7 @@ #define KERNEL_VERSION_EXTENDED_STRING "4.1.99+0" #define KERNEL_VERSION_TWEAK_STRING "4.1.99+0" -#define BUILD_VERSION v4.1.0-894-g9f06fc60e255 +#define BUILD_VERSION v4.1.0-898-g6b32f4d75066 #endif /* _KERNEL_VERSION_H_ */ diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include index 39a6a78f..f627b553 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include \ No newline at end of file +/home/kurte/github/zephyr/include \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr index 339f71c5..903f7400 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_acpi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_acpi index 54f6cba0..42a770fb 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_acpi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_acpi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/acpi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/acpi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_app_memory b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_app_memory index 25d0ae08..646bde5e 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_app_memory +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_app_memory @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/app_memory \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/app_memory \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch index 82c4b466..3aa1de70 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc index ae5571b2..524c2ec3 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat index ab5028cd..ba3db103 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_asm-compat @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arc/asm-compat \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arc/asm-compat \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 index ce321b28..8a3da722 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2 @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arc/v2 \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arc/v2 \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp index 72148dbf..b08bbd5d 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_dsp @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arc/v2/dsp \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arc/v2/dsp \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu index 794df2e6..97c45e48 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_mpu @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arc/v2/mpu \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arc/v2/mpu \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield index d07a4c3b..90733ec2 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_secureshield @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arc/v2/secureshield \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arc/v2/secureshield \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx index 2c944d8d..43303e69 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arc_v2_vpx @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arc/v2/vpx \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arc/v2/vpx \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm index d1625ac6..be4186b1 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arm \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arm \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 index 67159926..06cfaf0c 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64 @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arm64 \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arm64 \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r index 7321f573..cdab5904 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_cortex_r @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arm64/cortex_r \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arm64/cortex_r \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts index 864c2c65..9acef6e2 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm64_scripts @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arm64/scripts \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arm64/scripts \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r index 7b037fe4..999a544f 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arm/cortex_a_r \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arm/cortex_a_r \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts index 2db19d4b..01b6907b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_a_r_scripts @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arm/cortex_a_r/scripts \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arm/cortex_a_r/scripts \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m index 6a64b748..ad7ba94b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arm/cortex_m \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arm/cortex_m \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts index d4ca8359..89a43391 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_m_scripts @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arm/cortex_m/scripts \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arm/cortex_m/scripts \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r index b4e116cb..4816ce3c 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arm/cortex_r \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arm/cortex_r \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts index fc436a77..9ce7c4d7 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_cortex_r_scripts @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/arm/cortex_r/scripts \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/arm/cortex_r/scripts \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu index aee4d966..2eb0c5d4 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_arm_mmu @@ -1 +1 @@ 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b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips index be5e08ad..cad59115 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_mips @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/mips \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/mips \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_nios2 b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_nios2 index 6d715e25..21d70be5 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_nios2 +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_nios2 @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/nios2 \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/nios2 \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix index f077cd04..2bdb9b15 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_posix @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/posix \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/posix \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv index 1a5bab76..dcc54aff 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/riscv \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/riscv \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common index 08be8646..bbf835f4 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_common @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/riscv/common \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/riscv/common \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged index b97a6972..43c5a0be 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_riscv_riscv-privileged @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/riscv/riscv-privileged \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/riscv/riscv-privileged \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc index 0d99c563..266e53e4 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_sparc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/sparc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/sparc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 index 48d77b2c..caad3bd2 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86 @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/x86 \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/x86 \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 index baf9aa6d..59cd448a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32 @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/x86/ia32 \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/x86/ia32 \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts index 3e62f628..7c532a9e 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_ia32_scripts @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/x86/ia32/scripts \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/x86/ia32/scripts \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 index e72a9474..2755e483 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_x86_intel64 @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/x86/intel64 \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/x86/intel64 \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa index 112fa5c3..348f01a1 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_arch_xtensa @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/arch/xtensa \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/arch/xtensa \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_audio b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_audio index e27e8617..4f0366d8 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_audio +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_audio @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/audio \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/audio \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth index 38fe2cba..e2b13159 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/bluetooth \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/bluetooth \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio index 9bbc0d62..9ce0b3fd 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_audio @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/bluetooth/audio \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/bluetooth/audio \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic index 7e57bc67..bf43bb33 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_classic @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/bluetooth/classic \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/bluetooth/classic \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh index 5978c731..fad0c8a9 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_mesh @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/bluetooth/mesh \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/bluetooth/mesh \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services index dab257b9..33d112fc 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/bluetooth/services \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/bluetooth/services \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus index cfb494e0..c43065d3 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_bluetooth_services_nus @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/bluetooth/services/nus \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/bluetooth/services/nus \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_canbus b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_canbus index 38a67325..a49681a1 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_canbus +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_canbus @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/canbus \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/canbus \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_console b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_console index 4b1702a6..ebd65c5b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_console +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_console @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/console \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/console \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_crypto b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_crypto index 0d2acf52..53a0c302 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_crypto +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_crypto @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/crypto \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/crypto \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_data b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_data index 8e431e69..09e6510b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_data +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_data @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/data \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/data \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_debug b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_debug index 3e6a6845..f2021564 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_debug +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_debug @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/debug \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/debug \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight index 8ddc5ee8..189b604a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_debug_coresight @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/debug/coresight \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/debug/coresight \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_devicetree b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_devicetree index 5d86a78d..04d61c4f 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_devicetree +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_devicetree @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/devicetree \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/devicetree \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dfu b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dfu index 99c5f39d..2df95969 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dfu +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dfu @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dfu \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dfu \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_display b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_display index 202ec456..3dac2cd8 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_display +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_display @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/display \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/display \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers index b42c222c..92b084dc 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc index 7200fea9..4aba26c7 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_adc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/adc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/adc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth index ed8c7c30..949e50b4 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_bluetooth @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/bluetooth \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/bluetooth \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can index 7c8eb1db..1db27a79 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_can @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/can \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/can \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control index 4a2dfdc1..29259e18 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_clock_control @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/clock_control \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/clock_control \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator index 6e8131ac..da665ce3 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_comparator @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/comparator \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/comparator \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console index 5f7c92f0..c8a6a663 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_console @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/console \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/console \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma index 0cbabab5..af89bd81 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_dma @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/dma \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/dma \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom index 3ed6e0f2..1068f2e6 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_eeprom @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/eeprom \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/eeprom \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet index 8f59db75..b449ec71 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ethernet @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/ethernet \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/ethernet \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware index f9a5ffc7..c0698825 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/firmware \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/firmware \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi index 353fbc83..0a8ee164 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_firmware_scmi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/firmware/scmi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/firmware/scmi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash index 47ba6668..da47db87 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_flash @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/flash \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/flash \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss index b3f07d5b..bb0b36d5 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gnss @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/gnss \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/gnss \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio index 7a453c55..63a1643d 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_gpio @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/gpio \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/gpio \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics index b304b8e5..35bd6a88 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_haptics @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/haptics \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/haptics \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c index 2e0e6917..dc287cf6 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/i2c \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/i2c \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target index 3b9bba3d..cb56fd8a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i2c_target @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/i2c/target \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/i2c/target \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c index 781252ef..223412de 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_i3c @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/i3c \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/i3c \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 index f5df8058..a06de462 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_ieee802154 @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/ieee802154 \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/ieee802154 \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller index bd995a2d..c153bfc6 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_interrupt_controller @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/interrupt_controller \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/interrupt_controller \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led index 06bc056b..bba7c746 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/led \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/led \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip index 2314bf48..3091082e 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_led_strip @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/led_strip \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/led_strip \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd index 4398e8df..dcf884ea 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mfd @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/mfd \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/mfd \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy index 1b9278bc..7804a920 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/mic_privacy \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/mic_privacy \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel index 7a07dbc1..755a5571 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mic_privacy_intel @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/mic_privacy/intel \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/mic_privacy/intel \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi index 8c00b1e5..a30de951 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mipi_dsi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/mipi_dsi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/mipi_dsi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc index 317650f6..b3abc1aa 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/misc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/misc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_coresight b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_coresight index df463a32..130f7bf7 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_coresight +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_coresight @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/misc/coresight \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/misc/coresight \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux index 19336728..8857906e 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_devmux @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/misc/devmux \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/misc/devmux \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx index e157c8c1..5eeefeff 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_ft8xx @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/misc/ft8xx \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/misc/ft8xx \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd index cacf6222..b90975cc 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_grove_lcd @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/misc/grove_lcd \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/misc/grove_lcd \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio index 586f7589..415a4500 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_nxp_flexio @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/misc/nxp_flexio \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/misc/nxp_flexio \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico index 2471f358..33ca978c 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_pio_rpi_pico @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/misc/pio_rpi_pico \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/misc/pio_rpi_pico \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt index 7aabd9e7..ce105995 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_renesas_ra_external_interrupt @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/misc/renesas_ra_external_interrupt \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/misc/renesas_ra_external_interrupt \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins index fe1ecc4c..14e2e9e9 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_stm32_wkup_pins @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/misc/stm32_wkup_pins \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/misc/stm32_wkup_pins \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_timeaware_gpio b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_timeaware_gpio index 0b6db6d7..2429ece3 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_timeaware_gpio +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_misc_timeaware_gpio @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/misc/timeaware_gpio \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/misc/timeaware_gpio \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm index defe4089..e5f3cf92 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mm @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/mm \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/mm \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem index ed2554fc..f441b72b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_modem @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/modem \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/modem \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi index 426f3bc7..bb8d34fb 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_mspi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/mspi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/mspi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie index 388e266a..768f66f6 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/pcie \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/pcie \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint index cc5543d8..6e013a84 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pcie_endpoint @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/pcie/endpoint \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/pcie/endpoint \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl index 01d7bc80..7ed81b78 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pinctrl @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/pinctrl \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/pinctrl \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops index 783c0130..f6024283 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pm_cpu_ops @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/pm_cpu_ops \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/pm_cpu_ops \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power index 4d4ef7a9..483ad39f 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_power @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/power \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/power \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm index 4b0b6de4..74735c4e 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_pwm @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/pwm \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/pwm \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator index 4bd07503..8b7c91df 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_regulator @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/regulator \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/regulator \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem index 121de1c4..51eea26c 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_retained_mem @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/retained_mem \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/retained_mem \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc index 814edbd0..612c4e7a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_rtc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/rtc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/rtc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor index dd4aac51..54b1df13 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sensor @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/sensor \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/sensor \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial index 485ecc8d..11bb9867 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_serial @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/serial \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/serial \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc index 288a7c61..af7e07e5 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_sip_svc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/sip_svc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/sip_svc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_spi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_spi index 058dbdf3..4f8887dc 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_spi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_spi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/spi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/spi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper index 2a81636b..9ae7a8bc 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_stepper @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/stepper \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/stepper \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer index 901bc09f..f64da4a7 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_timer @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/timer \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/timer \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart index e43ba8db..174d5d84 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_uart @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/uart \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/uart \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb index 0af9090e..f6461fbe 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/usb \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/usb \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c index 3deb9cb7..be6e6478 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_usb_c @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/usb_c \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/usb_c \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization index 2f157932..9ce56eae 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_virtualization @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/virtualization \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/virtualization \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi index 22b08a70..a2a232b7 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/wifi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/wifi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi index 1d27259e..f6ac3885 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/wifi/nrf_wifi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/wifi/nrf_wifi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus index 52a4f014..ada3d3bb 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_bus @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/wifi/nrf_wifi/bus \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/wifi/nrf_wifi/bus \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx index 20f3f7de..c6b72208 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_drivers_wifi_nrf_wifi_off_raw_tx @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/drivers/wifi/nrf_wifi/off_raw_tx \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/drivers/wifi/nrf_wifi/off_raw_tx \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dsp b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dsp index 03cb7b59..4ea0d420 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dsp +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dsp @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dsp \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dsp \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings index 005c577b..8a2fa5df 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi index d7537f20..8af33b5f 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_acpi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/acpi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/acpi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc index c296c395..4ceb2481 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_adc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/adc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/adc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery index a2d03853..d3976322 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_battery @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/battery \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/battery \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock index fe94dd7d..23439409 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/clock \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/clock \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs index ff4eebf2..b2a30495 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_clock_silabs @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/clock/silabs \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/clock/silabs \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator index bdd6f894..2e7810aa 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_comparator @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/comparator \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/comparator \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac index 2e756270..012e2085 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dac @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/dac \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/dac \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai index eac84d2e..43af50b9 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dai @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/dai \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/dai \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display index 3e330798..41b47b52 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_display @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/display \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/display \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma index b8abdc59..f1231bbb 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/dma \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/dma \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs index 2bcc4179..f5132427 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_dma_silabs @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/dma/silabs \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/dma/silabs \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi index a62132bd..f8feb944 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_espi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/espi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/espi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet index eace4e17..abd50d3e 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ethernet @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/ethernet \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/ethernet \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller index a5b04fdc..d7bf50b1 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_flash_controller @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/flash_controller \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/flash_controller \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gnss b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gnss index dfe567ad..89c54f98 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gnss +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gnss @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/gnss \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/gnss \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio index d610f078..44142766 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_gpio @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/gpio \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/gpio \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c index d9b3e92f..70f5227a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_i2c @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/i2c \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/i2c \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input index ee2374cd..e2752d51 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_input @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/input \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/input \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux index 57d9880d..8b2c5e98 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_inputmux @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/inputmux \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/inputmux \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller index c5fbd546..8be63ac8 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_interrupt-controller @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/interrupt-controller \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/interrupt-controller \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service index 2c5b9d4d..f8d03be3 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_ipc_service @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/ipc_service \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/ipc_service \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led index beb4cd27..5d3b171e 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_led @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/led \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/led \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora index 1ff22442..5550b9c4 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lora @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/lora \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/lora \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl index 7b207550..da37846b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_lvgl @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/lvgl \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/lvgl \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr index 70fa8c4f..ef96dadf 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_memory-attr +++ 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of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi index 78953253..8913d5d9 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dbi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/mipi_dbi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/mipi_dbi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi index 27c3abdf..36bd3f90 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_mipi_dsi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/mipi_dsi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/mipi_dsi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc index eee16182..ae44742b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_misc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/misc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/misc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie index 7a95b702..2dc8a0f6 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pcie @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/pcie \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/pcie \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl index 15518468..de4aab46 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/pinctrl \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/pinctrl \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas index 4b4058fb..e925b050 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_renesas @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/pinctrl/renesas \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/pinctrl/renesas \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs index 9bd460fa..75de4f0a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pinctrl_silabs @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/pinctrl/silabs \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/pinctrl/silabs \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power index 29187986..b52adb0d 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_power @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/power \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/power \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm index 9e782cdb..2edb324d 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_pwm @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/pwm \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/pwm \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi index 296517b0..933325b8 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_qspi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/qspi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/qspi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc index e4b66ee8..f0307208 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_rdc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/rdc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/rdc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_regulator b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_regulator index e78285df..54f56766 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_regulator +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_regulator @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/regulator \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/regulator \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reserved-memory b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reserved-memory index 64be7ed0..4ab03295 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reserved-memory +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reserved-memory @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/reserved-memory \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/reserved-memory \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset index 2f3ae593..79f9cd5a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_reset @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/reset \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/reset \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor index e881f1e9..ce44faa6 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_sensor @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/sensor \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/sensor \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi index edad1cd2..68560506 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_spi @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/spi \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/spi \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer index 9c635296..e279dbd3 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_timer @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/timer \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/timer \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb index 0f605ed2..c51e5e99 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/usb \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/usb \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c index 08067b3e..e2e9ef19 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_usb-c @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/usb-c \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/usb-c \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video index 3a89c555..5301bc59 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_dt-bindings_video @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/dt-bindings/video \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/dt-bindings/video \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_fs b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_fs index d9f5e73e..09022daa 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_fs +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_fs @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/fs \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/fs \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_input b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_input index 1cd401ea..d88df21b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_input +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_input @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/input \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/input \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_internal b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_internal index f7ba22ed..190b98ec 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_internal +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_internal @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/internal \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/internal \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_ipc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_ipc index dabdbfa1..5fc8b1bc 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_ipc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_ipc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/ipc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/ipc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel index c8bbd34e..7e4891bf 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/kernel \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/kernel \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal index 90ca6b0a..d403bae8 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_internal @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/kernel/internal \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/kernel/internal \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm index 5ed31eed..0381c343 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_kernel_mm @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/kernel/mm \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/kernel/mm \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_linker b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_linker index 1c4001af..510af43a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_linker +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_linker @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/linker \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/linker \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom index 1cdf1dc2..030e16d9 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_linker_common-rom @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/linker/common-rom \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/linker/common-rom \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_llext b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_llext index 23036687..cf3a165a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_llext +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_llext @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/llext \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/llext \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_logging b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_logging index a7784462..7509a24b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_logging +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_logging @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/logging \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/logging \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_lorawan b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_lorawan index 70ad988c..fcd3fdf3 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_lorawan +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_lorawan @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/lorawan \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/lorawan \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_math b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_math index 288a50a9..634a13bd 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_math +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_math @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/math \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/math \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mctp b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mctp index 3402cb31..7491d58d 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mctp +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mctp @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mctp \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mctp \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt index 77b0bdf7..18b43956 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mem_mgmt @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mem_mgmt \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mem_mgmt \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt index d7df2d75..abe79456 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd index 18a17aa2..23566b9b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_ec_host_cmd @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/ec_host_cmd \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/ec_host_cmd \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit index b3a6665e..5a1a85d1 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_hawkbit @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/hawkbit \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/hawkbit \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr index 8fa1d4ae..0cdc0ace 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/mcumgr \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/mcumgr \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp index 1c27127e..1c9fc932 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/mcumgr/grp \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/mcumgr/grp \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt index 84308cd5..0356350a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_enum_mgmt @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/mcumgr/grp/enum_mgmt \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/mcumgr/grp/enum_mgmt \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt index 916994eb..b77d6a52 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_fs_mgmt @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/mcumgr/grp/fs_mgmt \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/mcumgr/grp/fs_mgmt \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt index 7e80edb7..071b7992 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_img_mgmt @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/mcumgr/grp/img_mgmt \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/mcumgr/grp/img_mgmt \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt index 54d96903..e74b08b9 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_os_mgmt @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/mcumgr/grp/os_mgmt \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/mcumgr/grp/os_mgmt \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt index e4f4704a..d753caf5 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_settings_mgmt @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/mcumgr/grp/settings_mgmt \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/mcumgr/grp/settings_mgmt \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt index 82a3e063..302f024d 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_shell_mgmt @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/mcumgr/grp/shell_mgmt \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/mcumgr/grp/shell_mgmt \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_stat_mgmt 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47aacef7..09329e01 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_grp_zephyr @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/mgmt/mcumgr/grp/zephyr \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/mgmt/mcumgr/grp/zephyr \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt index fb2690d9..12c4b15a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_mgmt_mcumgr_mgmt +++ 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end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_misc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_misc index 604b6406..e4229b94 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_misc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_misc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/misc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/misc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_modbus b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_modbus index b259e6f4..db350f5e 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_modbus +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_modbus @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/modbus \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/modbus \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_modem b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_modem index 3ddb12a7..83e93eeb 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_modem +++ 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b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_net_hdlc_rcp_if @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/net/hdlc_rcp_if \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/net/hdlc_rcp_if \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_net_http b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_net_http index fd5ca3a2..633a44f4 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_net_http +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_net_http @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/net/http \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/net/http \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus index 9c4cd8e4..c18a53fd 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_net_prometheus @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/net/prometheus \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/net/prometheus \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_platform 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-/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/portability \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/portability \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix index 004edc25..b206144a 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/posix \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/posix \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa index 0b0f4136..69d7bc8d 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_arpa @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/posix/arpa \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/posix/arpa \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net index deb33537..3793c173 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_net @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/posix/net \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/posix/net \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet index 299b3fb6..175c7999 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_netinet @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/posix/netinet \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/posix/netinet \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys index 52a5235c..c2cfbc25 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_posix_sys +++ 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\ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_random b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_random index 0016d3e5..0eebd45d 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_random +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_random @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/random \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/random \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_retention 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a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_rtio +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_rtio @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/rtio \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/rtio \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sd b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sd index 76762156..c482b102 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sd +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sd @@ -1 +1 @@ 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eb7878e6..a2fb1139 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_shell +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_shell @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/shell \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/shell \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc index c768806f..50415bc9 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sip_svc @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/sip_svc \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/sip_svc \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_stats b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_stats index 99bb7d4c..dd87dbc8 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_stats +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_stats @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/stats \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/stats \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_storage b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_storage index cf009b1f..e335bb23 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_storage +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_storage @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/storage \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/storage \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sys b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sys index e66d6341..7ff9b84b 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sys +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sys @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/sys \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/sys \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal index 0acc15fb..1556b483 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_sys_internal @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/sys/internal \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/sys/internal \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_task_wdt b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_task_wdt index 2cd80187..1cb8e74f 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_task_wdt +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_task_wdt @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/task_wdt \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/task_wdt \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_timing b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_timing index 91bceaf2..c5ac8017 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_timing +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_timing @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/timing \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/timing \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain index 1eaedc54..c1c8ab51 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/toolchain \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/toolchain \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar index 0a6049c8..0573dab9 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_toolchain_iar @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/toolchain/iar \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/toolchain/iar \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_tracing b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_tracing index 01f6548d..29bade9e 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_tracing +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_tracing @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/tracing \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/tracing \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb index d092a802..e0738efb 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/usb \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/usb \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb_c b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb_c index 10896df7..d92f5273 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb_c +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb_c @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/usb_c \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/usb_c \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb_class b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb_class index 710234dc..977a86ee 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb_class +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_usb_class @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/usb/class \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/usb/class \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen index f8acdfe2..5bbb5592 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/xen \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/xen \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 index 58538c25..bd58bc45 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_dom0 @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/xen/dom0 \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/xen/dom0 \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public index 103f091f..3e2d3df3 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/xen/public \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/xen/public \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm index 068ad8b9..ff7a47ba 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_hvm @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/xen/public/hvm \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/xen/public/hvm \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io index 6616b9c7..a393870f 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_xen_public_io @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/xen/public/io \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/xen/public/io \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_zbus b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_zbus index 554f679b..5472f3d5 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_zbus +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_zbus @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/zbus \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/zbus \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_zvfs b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_zvfs index cbe6d834..f4a2603f 120000 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_zvfs +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/llext-edk/include/zephyr/misc/generated/syscalls_links/include_zephyr_zvfs @@ -1 +1 @@ -/home/burellil/Work/ArduinoCore-zephyr/zephyr/include/zephyr/zvfs \ No newline at end of file +/home/kurte/github/zephyr/include/zephyr/zvfs \ No newline at end of file diff --git a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/provides.ld b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/provides.ld index 69ef25ed..5c2758d8 100644 --- a/variants/arduino_portenta_c33_r7fa6m5bh3cfc/provides.ld +++ b/variants/arduino_portenta_c33_r7fa6m5bh3cfc/provides.ld @@ -1,669 +1,669 @@ PROVIDE(cmd_kernel_uptime = 0x00011361); -PROVIDE(clock_control_pwm_get_rate = 0x000279d5); -PROVIDE(clock_control_pwm_init = 0x0004550f); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000279fd); +PROVIDE(clock_control_pwm_get_rate = 0x00027bed); +PROVIDE(clock_control_pwm_init = 0x00045727); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00027c15); PROVIDE(clock_control_pwm_on = 0x000114d9); -PROVIDE(clock_control_pwm_set_rate = 0x00045525); -PROVIDE(mulShift64 = 0x0004b007); -PROVIDE(loader = 0x00013085); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00013191); -PROVIDE(stdinout_read_vmeth = 0x0003d407); -PROVIDE(stdinout_ioctl_vmeth = 0x00013919); -PROVIDE(_check_fd = 0x00013931); -PROVIDE(zvfs_fdtable_call_ioctl = 0x0003d40b); -PROVIDE(stdinout_write_vmeth = 0x0003d429); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0003d42d); -PROVIDE(k_mutex_unlock.isra.0 = 0x0003d431); -PROVIDE(z_fd_unref.isra.0 = 0x00013965); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003d913); -PROVIDE(dummy_timestamp = 0x0003d931); -PROVIDE(default_lf_get_timestamp = 0x0003d935); -PROVIDE(atomic_inc = 0x0003d945); -PROVIDE(z_log_init.isra.0 = 0x00013e01); -PROVIDE(enable_logger = 0x0003d957); -PROVIDE(backend_filter_set = 0x0001416d); -PROVIDE(z_cbprintf_cpy = 0x0003d9e5); -PROVIDE(z_log_msg_simple_create = 0x0003da43); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003dab1); -PROVIDE(log_output_write = 0x0003db0f); -PROVIDE(out_func = 0x0003db2b); -PROVIDE(cr_out_func = 0x0003db47); -PROVIDE(print_formatted = 0x000143a1); -PROVIDE(newline_print = 0x000143c5); -PROVIDE(cmd_kernel_cycles = 0x00014739); -PROVIDE(cmd_kernel_sleep = 0x00014755); -PROVIDE(cmd_kernel_version = 0x00014795); -PROVIDE(cmd_kernel_log_level_set = 0x000147ad); -PROVIDE(thread_valid_cb = 0x0003dc55); -PROVIDE(cmd_kernel_thread_list = 0x00014851); -PROVIDE(shell_tdata_dump = 0x00014885); -PROVIDE(cmd_kernel_thread_stacks = 0x00014945); -PROVIDE(shell_stack_dump = 0x000149b5); -PROVIDE(cmd_kernel_thread_suspend = 0x00014a15); -PROVIDE(cmd_kernel_thread_resume = 0x00014a79); -PROVIDE(cmd_kernel_thread_kill = 0x00014add); -PROVIDE(cmd_device_list = 0x00014b41); -PROVIDE(date_print = 0x00014c19); -PROVIDE(cmd_date_get = 0x0003dc61); -PROVIDE(get_h_m_s = 0x00014c45); -PROVIDE(cmd_date_set = 0x00014cdd); -PROVIDE(cmd_devmem = 0x00014de9); -PROVIDE(cmd_dump = 0x00014ead); -PROVIDE(set_bypass.isra.0 = 0x00015025); -PROVIDE(bypass_cb = 0x00015071); -PROVIDE(cmd_load = 0x00015185); -PROVIDE(log_msg_generic_get_wlen = 0x0003dc85); -PROVIDE(uart_irq_tx_disable = 0x0003dca5); -PROVIDE(enable = 0x0003dcaf); -PROVIDE(read_uart = 0x0003dcc1); -PROVIDE(uninit = 0x0003dcd3); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001525d); -PROVIDE(enable_shell_uart = 0x00015281); -PROVIDE(write_uart = 0x0003dcf3); -PROVIDE(init = 0x000152b9); -PROVIDE(uart_callback = 0x0001530d); -PROVIDE(cmd_buffer_clear = 0x0003dd57); -PROVIDE(atomic_or = 0x0003dd6d); -PROVIDE(atomic_and = 0x0003dd83); -PROVIDE(k_mutex_lock = 0x0003dd99); -PROVIDE(z_shell_raw_fprintf = 0x0003dd9d); -PROVIDE(shell_internal_help_print = 0x00015449); -PROVIDE(z_shell_strlen = 0x0003ddb7); -PROVIDE(shell_log_process = 0x0003ddc3); -PROVIDE(transport_evt_handler = 0x0003ddf5); -PROVIDE(kill_handler = 0x00015469); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x000154c5); -PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x0003de0d); -PROVIDE(z_flag_history_exit_set.isra.0 = 0x0003de25); -PROVIDE(history_handle = 0x000154d1); -PROVIDE(z_flag_insert_mode_set.isra.0 = 0x0003de3b); -PROVIDE(k_mutex_unlock.isra.0 = 0x0003de5b); -PROVIDE(execute = 0x00015581); -PROVIDE(shell_signal_handle = 0x0003de5f); -PROVIDE(state_set.constprop.0 = 0x00015849); -PROVIDE(cmd_help = 0x0001603d); -PROVIDE(out_func = 0x0003e0c1); -PROVIDE(z_shell_strlen = 0x0003e0fd); -PROVIDE(z_shell_raw_fprintf = 0x0003e4df); -PROVIDE(z_clear_eos = 0x00016331); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x0001634d); -PROVIDE(full_line_cmd.isra.0 = 0x0003e4f9); -PROVIDE(reprint_from_cursor = 0x00016579); -PROVIDE(data_insert = 0x0003e809); -PROVIDE(z_shell_raw_fprintf = 0x0003ea81); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x000166fd); -PROVIDE(formatted_text_print.constprop.0 = 0x0003ea9b); -PROVIDE(cmd_comment = 0x0003eb7d); -PROVIDE(cmd_shell_stats_reset = 0x0003eb81); -PROVIDE(z_shell_raw_fprintf = 0x0003eb89); -PROVIDE(cmd_resize_default = 0x00016825); -PROVIDE(cmd_shell_stats_show = 0x00016851); -PROVIDE(cmd_backends = 0x00016865); -PROVIDE(cmd_prompt_on = 0x0003eba3); -PROVIDE(cmd_prompt_off = 0x000168b1); -PROVIDE(cmd_history = 0x000168c1); -PROVIDE(cmd_get_retval = 0x00016901); -PROVIDE(cmd_echo = 0x0001691d); -PROVIDE(cmd_clear = 0x0001696d); -PROVIDE(cmd_resize = 0x000169a5); -PROVIDE(cmd_vt100_off = 0x0003ebaf); -PROVIDE(cmd_bacskpace_mode_delete = 0x0003ebcb); -PROVIDE(cmd_colors_off = 0x0003ebe7); -PROVIDE(cmd_bacskpace_mode_backspace = 0x0003ec03); -PROVIDE(cmd_echo_off = 0x0003ec1f); -PROVIDE(cmd_colors_on = 0x0003ec3b); -PROVIDE(cmd_vt100_on = 0x0003ec57); -PROVIDE(cmd_echo_on = 0x0003ec73); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003eead); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003efe5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f01b); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f03b); -PROVIDE(mem_manage_fault.constprop.0 = 0x00017295); -PROVIDE(bus_fault.constprop.0 = 0x000173f1); -PROVIDE(usage_fault.constprop.0 = 0x0001755d); -PROVIDE(__NVIC_SetPriority = 0x00017a45); -PROVIDE(cbputc = 0x0003f099); -PROVIDE(picolibc_put = 0x0003f0a5); -PROVIDE(malloc_prepare = 0x00017cbd); -PROVIDE(malloc_lock = 0x00017ce1); -PROVIDE(malloc_unlock = 0x00017cf5); -PROVIDE(pthread_barrier_pool_init = 0x00017dbd); -PROVIDE(posix_fs_alloc_obj = 0x00017f61); -PROVIDE(fs_close_vmeth = 0x0003f325); -PROVIDE(fs_ioctl_vmeth = 0x00017fad); -PROVIDE(fs_write_vmeth = 0x00018009); -PROVIDE(fs_read_vmeth = 0x00018029); -PROVIDE(pthread_cond_pool_init = 0x000181ed); -PROVIDE(pthread_mutex_pool_init = 0x0001820d); -PROVIDE(posix_thread_pool_init = 0x0001822d); -PROVIDE(fixed_data_unref = 0x0003f3a1); -PROVIDE(net_buf_destroy = 0x00018265); -PROVIDE(fixed_data_alloc = 0x000182d5); -PROVIDE(zvfs_eventfd_ioctl_op = 0x00018431); -PROVIDE(zvfs_eventfd_write_locked = 0x0003f4f7); -PROVIDE(zvfs_eventfd_rw_op = 0x00018561); -PROVIDE(zvfs_eventfd_write_op = 0x0001865d); -PROVIDE(zvfs_eventfd_read_op = 0x00018669); -PROVIDE(zvfs_eventfd_read_locked = 0x0003f565); -PROVIDE(zvfs_eventfd_close_op = 0x00018675); -PROVIDE(zvfs_fdtable_call_ioctl = 0x0003f5c5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f60d); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00018bf5); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x00018c05); -PROVIDE(fs_get_mnt_point = 0x00018c11); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f62b); -PROVIDE(usbd_device_lock = 0x0003f64b); -PROVIDE(k_mutex_unlock.isra.0 = 0x0003f659); -PROVIDE(sreq_feature_halt_notify = 0x0003f8e1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f901); -PROVIDE(reqtype_is_to_device.isra.0 = 0x0003f921); -PROVIDE(udc_test_mode = 0x0003f92f); -PROVIDE(sreq_get_desc_cfg = 0x000192ad); -PROVIDE(udc_set_address = 0x0003f96f); -PROVIDE(nonstd_request = 0x000193bd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f9ad); -PROVIDE(usbd_class_bcast_event = 0x00019eb5); -PROVIDE(usbd_event_carrier = 0x00019f21); -PROVIDE(usbd_thread = 0x00019f31); -PROVIDE(usbd_pre_init = 0x0001a121); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f9cd); -PROVIDE(usbd_ep_bm_is_set.isra.0 = 0x0003f9ed); -PROVIDE(unassign_eps.constprop.0 = 0x0001a20d); -PROVIDE(init_configuration = 0x0001a2c5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f9ff); -PROVIDE(usbd_device_lock = 0x0003fa1f); -PROVIDE(k_mutex_unlock.isra.0 = 0x0003fa2d); -PROVIDE(is_blocklisted = 0x0003fa8b); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003faab); -PROVIDE(usbd_class_node_get = 0x0001a7f9); -PROVIDE(usbd_device_lock = 0x0003facb); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001aa85); -PROVIDE(usbd_interface_modify = 0x0001aaa9); -PROVIDE(usbd_ep_bm_clear = 0x0003fc99); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001ab81); -PROVIDE(msg_work_handler = 0x0001ac49); -PROVIDE(usbd_msg_pub = 0x0001acd9); -PROVIDE(usbd_cdc_acm_update = 0x0003fe1d); -PROVIDE(usbd_cdc_acm_get_desc = 0x0003fe1f); -PROVIDE(cdc_acm_irq_tx_ready = 0x0001ad49); -PROVIDE(cdc_acm_irq_rx_ready = 0x0001ad81); -PROVIDE(cdc_acm_irq_is_pending = 0x0001ada9); -PROVIDE(cdc_acm_irq_callback_set = 0x0003fe2f); -PROVIDE(cdc_acm_line_ctrl_get = 0x0003fe37); -PROVIDE(cdc_acm_configure = 0x0003fe5b); -PROVIDE(atomic_test_bit = 0x0003fe71); -PROVIDE(cdc_acm_get_int_in = 0x0003fe7d); -PROVIDE(cdc_acm_get_bulk_out = 0x0003fe99); -PROVIDE(cdc_acm_get_bulk_in = 0x0003feb5); -PROVIDE(cdc_acm_irq_rx_enable = 0x0001addd); -PROVIDE(cdc_acm_fifo_read = 0x0001ae29); -PROVIDE(cdc_acm_poll_in = 0x0001ae59); -PROVIDE(cdc_acm_fifo_fill = 0x0001ae89); -PROVIDE(cdc_acm_config_get = 0x0003fed1); -PROVIDE(usbd_cdc_acm_ctd = 0x0001aed1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003fedf); -PROVIDE(usbd_cdc_acm_init = 0x0001af75); -PROVIDE(usbd_cdc_acm_init_wq = 0x0001afcd); -PROVIDE(cdc_acm_get_bulk_mps.isra.0 = 0x0003feff); -PROVIDE(usbd_cdc_acm_cth = 0x0001b005); -PROVIDE(cdc_acm_poll_out = 0x0001b049); -PROVIDE(atomic_clear_bit = 0x0003ff11); -PROVIDE(cdc_acm_irq_rx_disable = 0x0003ff27); -PROVIDE(cdc_acm_irq_tx_disable = 0x0003ff31); -PROVIDE(usbd_cdc_acm_disable = 0x0003ff3b); -PROVIDE(usbd_cdc_acm_resumed = 0x0003ff53); -PROVIDE(usbd_cdc_acm_request = 0x0001b0b1); -PROVIDE(usbd_cdc_acm_preinit = 0x0001b1d9); -PROVIDE(cdc_acm_tx_fifo_handler = 0x0001b4d5); -PROVIDE(cdc_acm_rx_fifo_handler = 0x0001b419); -PROVIDE(cdc_acm_irq_cb_handler = 0x0001b21d); -PROVIDE(cdc_acm_line_ctrl_set = 0x0003ff5f); -PROVIDE(cdc_acm_irq_update = 0x0001b2fd); -PROVIDE(usbd_cdc_acm_suspended = 0x0004004b); -PROVIDE(usbd_cdc_acm_enable = 0x0001b361); -PROVIDE(cdc_acm_irq_tx_enable = 0x0001b3cd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00040063); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x0001b5c1); -PROVIDE(call_fn_table = 0x0001b5cd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001b90d); -PROVIDE(llext_copy_region = 0x0001b931); -PROVIDE(llext_read = 0x00040101); -PROVIDE(llext_seek = 0x00040105); -PROVIDE(llext_peek = 0x00040109); -PROVIDE(llext_alloc = 0x0001ba71); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00040113); -PROVIDE(llext_find_extension_sym_iterate = 0x00040155); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0004016d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001c86d); -PROVIDE(llext_shell_name_cb = 0x000402c5); -PROVIDE(llext_name_get = 0x0001c941); -PROVIDE(llext_name_arg_get = 0x000402db); -PROVIDE(cmd_llext_list_symbols = 0x0001c971); -PROVIDE(cmd_llext_list = 0x0001c9dd); -PROVIDE(llext_shell_list_cb = 0x0001c9fd); -PROVIDE(cmd_llext_load_hex = 0x0001ca15); -PROVIDE(cmd_llext_load_fs = 0x0001cae9); -PROVIDE(cmd_llext_call_fn = 0x0001cba9); -PROVIDE(cmd_llext_unload = 0x0001cbd5); -PROVIDE(trigger_net_event = 0x0001cc15); -PROVIDE(dns_resolve_cb = 0x000402ed); -PROVIDE(zvfs_fdtable_call_ioctl = 0x0004046b); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00040489); -PROVIDE(k_mutex_unlock.isra.0 = 0x0004048d); -PROVIDE(inet_is_supported = 0x000404cb); -PROVIDE(net_if_get_by_index = 0x000404d7); -PROVIDE(zsock_connected_cb = 0x000404db); -PROVIDE(ipv4_multicast_group.constprop.0 = 0x0001d489); -PROVIDE(zsock_socket_internal = 0x0001d4d9); -PROVIDE(zsock_accepted_cb = 0x0001d561); -PROVIDE(zsock_received_cb = 0x000404ed); -PROVIDE(send_check_and_wait = 0x0001d5ad); -PROVIDE(zsock_flush_queue = 0x0004056f); -PROVIDE(zsock_recv_stream_immediate = 0x000405b5); -PROVIDE(sock_ioctl_vmeth = 0x0001d6b1); -PROVIDE(sock_close2_vmeth = 0x000406ad); -PROVIDE(sock_shutdown_vmeth = 0x000406b1); -PROVIDE(sock_bind_vmeth = 0x000406b5); -PROVIDE(sock_connect_vmeth = 0x000406b9); -PROVIDE(sock_listen_vmeth = 0x000406bd); -PROVIDE(sock_sendto_vmeth = 0x000406c1); -PROVIDE(sock_write_vmeth = 0x000406c5); -PROVIDE(sock_sendmsg_vmeth = 0x000406d7); -PROVIDE(sock_accept_vmeth = 0x00040713); -PROVIDE(zsock_recv_dgram = 0x0001dd7d); -PROVIDE(zsock_recv_stream = 0x0001e02d); -PROVIDE(sock_recvfrom_vmeth = 0x00040717); -PROVIDE(sock_read_vmeth = 0x0004071b); -PROVIDE(sock_recvmsg_vmeth = 0x0004072d); -PROVIDE(sock_getsockopt_vmeth = 0x00040731); -PROVIDE(sock_setsockopt_vmeth = 0x00040735); -PROVIDE(sock_getpeername_vmeth = 0x00040739); -PROVIDE(sock_getsockname_vmeth = 0x0004073d); -PROVIDE(timeout_to_ms = 0x00040741); -PROVIDE(tls_release = 0x0001e665); -PROVIDE(zvfs_fdtable_call_ioctl = 0x00040777); -PROVIDE(zsock_fcntl_wrapper = 0x00040795); -PROVIDE(is_blocking = 0x000407b1); -PROVIDE(tls_ctr_drbg_random = 0x000407d7); -PROVIDE(crt_is_pem = 0x0001e6bd); -PROVIDE(tls_mbedtls_reset = 0x000407df); -PROVIDE(tls_sock_getsockname_vmeth = 0x000407f9); -PROVIDE(tls_sock_getpeername_vmeth = 0x000407ff); -PROVIDE(tls_sock_listen_vmeth = 0x00040805); -PROVIDE(tls_sock_bind_vmeth = 0x00040813); -PROVIDE(tls_sock_shutdown_vmeth = 0x00040819); -PROVIDE(ztls_poll_update_pollin.constprop.0 = 0x0004081f); -PROVIDE(tls_mbedtls_init = 0x0001e6e1); -PROVIDE(tls_rx = 0x0001e8fd); -PROVIDE(tls_tx = 0x0001e8c9); -PROVIDE(wait = 0x0004090d); -PROVIDE(tls_init = 0x0001e931); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0004096d); -PROVIDE(k_mutex_unlock.isra.0 = 0x00040971); -PROVIDE(tls_alloc = 0x0001e961); -PROVIDE(ztls_socket = 0x0001e9f9); -PROVIDE(wait_for_reason = 0x00040975); -PROVIDE(tls_mbedtls_handshake.constprop.0 = 0x0004099f); -PROVIDE(tls_is_supported = 0x00040a63); -PROVIDE(tls_sock_ioctl_vmeth = 0x0001ea95); -PROVIDE(tls_sock_close2_vmeth = 0x00040a7d); -PROVIDE(tls_sock_connect_vmeth = 0x00040a81); -PROVIDE(tls_sock_accept_vmeth = 0x00040a85); -PROVIDE(tls_sock_sendto_vmeth = 0x00040a89); -PROVIDE(tls_sock_write_vmeth = 0x00040a8d); -PROVIDE(tls_sock_sendmsg_vmeth = 0x00040a9f); -PROVIDE(tls_sock_recvfrom_vmeth = 0x00040aa3); -PROVIDE(tls_sock_read_vmeth = 0x00040aa7); -PROVIDE(tls_sock_getsockopt_vmeth = 0x00040ab9); -PROVIDE(tls_sock_setsockopt_vmeth = 0x00040abd); -PROVIDE(socket_service_thread = 0x0001f741); -PROVIDE(net_mgmt_sock_write = 0x0001f8f1); -PROVIDE(net_mgmt_sock_ioctl = 0x0001f911); -PROVIDE(net_mgmt_sock_connect = 0x00040adb); -PROVIDE(net_mgmt_sock_listen = 0x00040adf); -PROVIDE(net_mgmt_sock_accept = 0x00040ae3); -PROVIDE(net_mgmt_is_supported = 0x00040ae7); -PROVIDE(net_mgmt_sock_setsockopt = 0x0001f995); -PROVIDE(net_mgmt_sock_getsockopt = 0x0001f9dd); -PROVIDE(net_mgmt_sock_bind = 0x0001fa29); -PROVIDE(znet_mgmt_recvfrom.constprop.0 = 0x0001fa79); -PROVIDE(net_mgmt_sock_read = 0x00040af9); -PROVIDE(net_mgmt_sock_recvfrom = 0x00040b09); -PROVIDE(net_mgmt_sock_sendto = 0x0001fb45); -PROVIDE(spair_bind = 0x0001fb65); -PROVIDE(spair_listen = 0x0001fb7d); -PROVIDE(spair_accept = 0x0001fb95); -PROVIDE(spair_getsockopt = 0x0001fbad); -PROVIDE(spair_setsockopt = 0x0001fbc5); -PROVIDE(k_sem_take = 0x00040b0d); -PROVIDE(k_sem_give = 0x00040b11); -PROVIDE(spair_write_avail.isra.0 = 0x0001fbdd); -PROVIDE(sock_is_connected.isra.0 = 0x0001fbfd); -PROVIDE(k_poll_signal_raise.isra.0 = 0x00040b15); -PROVIDE(spair_delete = 0x0001fc15); -PROVIDE(spair_close = 0x00040b19); -PROVIDE(spair_connect = 0x0001fca1); -PROVIDE(spair_read = 0x0001fcb9); -PROVIDE(spair_recvfrom = 0x00040b35); -PROVIDE(spair_write = 0x0001fe01); -PROVIDE(spair_sendmsg = 0x0001ffd1); -PROVIDE(spair_sendto = 0x00040b47); -PROVIDE(spair_ioctl = 0x00020069); -PROVIDE(credentials_init = 0x000203d1); -PROVIDE(net_ipv4_is_addr_mcast = 0x00040b4b); -PROVIDE(net_if_l2_data = 0x00040b5b); -PROVIDE(net_if_get_device = 0x00040b65); -PROVIDE(net_eth_get_hw_capabilities = 0x00040b6f); -PROVIDE(ethernet_enable = 0x00040b91); -PROVIDE(net_eth_is_addr_broadcast = 0x00040bc7); -PROVIDE(ethernet_ip_recv = 0x00040bf5); -PROVIDE(carrier_on_off = 0x00040c55); -PROVIDE(ethernet_recv = 0x000204c1); -PROVIDE(ethernet_mcast_monitor_cb = 0x000205f9); -PROVIDE(ethernet_send = 0x00020661); -PROVIDE(is_hw_caps_supported = 0x00040d09); -PROVIDE(net_if_flag_is_set = 0x00040d25); -PROVIDE(net_if_is_up = 0x00040d39); -PROVIDE(ethernet_set_config = 0x0002083d); -PROVIDE(ethernet_get_config = 0x00020ab1); -PROVIDE(sys_slist_prepend = 0x00040d55); -PROVIDE(sys_slist_remove = 0x00040d63); -PROVIDE(net_if_get_link_addr = 0x00040d83); -PROVIDE(net_eth_is_addr_all_zeroes = 0x00040d8d); -PROVIDE(net_eth_is_addr_unspecified = 0x00040d8d); -PROVIDE(k_uptime_get_32 = 0x00040db5); -PROVIDE(net_eth_is_addr_broadcast = 0x00040dc5); -PROVIDE(net_if_flag_is_set.constprop.0 = 0x00040df3); -PROVIDE(arp_entry_get_last_from_table = 0x00020d19); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00040e05); -PROVIDE(net_linkaddr_set.constprop.0.isra.0 = 0x00040e09); -PROVIDE(if_get_addr.isra.0 = 0x00040e1b); -PROVIDE(arp_entry_find.isra.0 = 0x00040e43); -PROVIDE(k_mutex_unlock.isra.0 = 0x00040e5f); -PROVIDE(net_if_tx_unlock = 0x00040e63); -PROVIDE(arp_entry_cleanup = 0x00040e7b); -PROVIDE(arp_request_timeout = 0x00020d41); -PROVIDE(arp_recv = 0x00041099); -PROVIDE(sys_slist_find_and_remove = 0x0004132d); -PROVIDE(net_ipv4_is_ll_addr = 0x000212e9); -PROVIDE(net_if_l2 = 0x00041363); -PROVIDE(net_if_get_device = 0x0004136d); -PROVIDE(net_context_send_cb = 0x00041377); -PROVIDE(l2_flags_get = 0x0004138f); -PROVIDE(net_if_flag_is_set = 0x000413a9); -PROVIDE(k_uptime_get_32 = 0x000413bd); -PROVIDE(net_if_flag_set = 0x000413cd); -PROVIDE(net_if_flag_clear = 0x000413eb); -PROVIDE(need_calc_checksum = 0x00021301); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0004140b); -PROVIDE(net_if_lock = 0x0004140f); -PROVIDE(k_mutex_unlock.isra.0 = 0x0004141d); -PROVIDE(get_ifaddr.constprop.0 = 0x00041421); -PROVIDE(iface_router_update_timer = 0x00021365); -PROVIDE(net_if_ipv4_get_best_match = 0x000213e1); -PROVIDE(if_ipv4_get_addr = 0x0004145f); -PROVIDE(ipv4_is_broadcast_address = 0x000414b9); -PROVIDE(net_if_flag_test_and_set = 0x000414f5); -PROVIDE(net_if_flag_test_and_clear = 0x0004151f); -PROVIDE(iface_router_expired = 0x00021479); -PROVIDE(net_if_ipv4_set_netmask_deprecated = 0x000415a7); -PROVIDE(update_operational_state = 0x000218e9); -PROVIDE(net_if_tx.isra.0 = 0x00021b15); -PROVIDE(parse_ipv4 = 0x00041a5d); -PROVIDE(k_mutex_unlock.isra.0 = 0x00041d9d); -PROVIDE(mgmt_event_work_handler = 0x00022291); -PROVIDE(sys_slist_find_and_remove.constprop.0.isra.0 = 0x000223d5); -PROVIDE(mgmt_rebuild_global_event_mask = 0x0002240d); -PROVIDE(mgmt_event_wait_call = 0x00041da1); -PROVIDE(net_ipv4_is_addr_mcast = 0x00041e65); -PROVIDE(net_if_flag_is_set = 0x00041e75); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00041e89); -PROVIDE(k_mutex_unlock.isra.0 = 0x00041e8d); -PROVIDE(net_context_get_iface.isra.0 = 0x00041e91); -PROVIDE(check_used_port.constprop.0 = 0x00022671); -PROVIDE(find_available_port = 0x00041e95); -PROVIDE(bind_default = 0x0004204f); -PROVIDE(context_sendto = 0x0004212f); -PROVIDE(net_pkt_set_iface = 0x000426cd); -PROVIDE(clone_pkt_attributes = 0x000426e7); -PROVIDE(pkt_cursor_jump = 0x000427d9); -PROVIDE(pkt_cursor_advance = 0x00042805); -PROVIDE(pkt_cursor_update = 0x00042835); -PROVIDE(pkt_estimate_headers_length.part.0 = 0x0004288b); -PROVIDE(pkt_alloc_buffer.constprop.0 = 0x000428af); -PROVIDE(net_pkt_get_len.isra.0 = 0x0004294f); -PROVIDE(net_pkt_cursor_operate = 0x0004295f); -PROVIDE(pkt_alloc = 0x00022d0d); -PROVIDE(pkt_alloc_with_buffer = 0x00042c39); -PROVIDE(net_pkt_clone_internal = 0x00042e75); -PROVIDE(tc_rx_handler = 0x00043009); -PROVIDE(icmp_call_handlers = 0x00023021); -PROVIDE(net_conn_change_remote = 0x00043041); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x000230dd); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x000230ed); -PROVIDE(conn_set_unused = 0x000230f9); -PROVIDE(net_ipv4_is_addr_bcast = 0x00043095); -PROVIDE(icmpv4_handle_echo_request = 0x000430e9); -PROVIDE(sys_slist_get = 0x000436eb); -PROVIDE(tcp_window_full = 0x000436ff); -PROVIDE(tcp_unsent_len = 0x0004371d); -PROVIDE(tcp_validate_seq = 0x00043759); -PROVIDE(tcp_send = 0x00023699); -PROVIDE(tcp_setup_last_ack_timer = 0x000236d5); -PROVIDE(tcp_last_ack_timeout = 0x00043b6b); -PROVIDE(tcp_derive_rto = 0x00043777); -PROVIDE(k_sem_take = 0x0004379b); -PROVIDE(is_destination_local = 0x0004379f); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x000437e9); -PROVIDE(tcp_compute_new_length = 0x000437ed); -PROVIDE(net_pkt_get_len.isra.0 = 0x00043807); -PROVIDE(tcp_pkt_pull = 0x00043817); -PROVIDE(th_get = 0x00043851); -PROVIDE(tcp_data_len = 0x0004393f); -PROVIDE(tcp_endpoint_set = 0x00043969); -PROVIDE(tcp_endpoint_cmp = 0x000439b9); -PROVIDE(tcp_pkt_append = 0x000439e9); -PROVIDE(k_mutex_unlock.isra.0 = 0x00043a71); -PROVIDE(tcp_send_timer_cancel = 0x00023709); -PROVIDE(tcp_enter_time_wait = 0x00023789); -PROVIDE(tcp_cleanup_recv_queue = 0x00043a75); -PROVIDE(tcp_send_process_no_lock = 0x000237b1); -PROVIDE(atomic_inc.isra.0 = 0x00043aa7); -PROVIDE(tcp_conn_release = 0x000238d1); -PROVIDE(tcp_conn_unref.isra.0 = 0x00023a21); -PROVIDE(tcp_conn_close.isra.0 = 0x00043ab7); -PROVIDE(tcp_send_process = 0x00043b33); -PROVIDE(tcp_timewait_timeout = 0x00043b77); -PROVIDE(tcp_fin_timeout = 0x00043b83); -PROVIDE(tcp_resend_data = 0x00024069); -PROVIDE(tcp_send_zwp = 0x00023efd); -PROVIDE(tcp_send_ack = 0x00043d45); -PROVIDE(tcp_recv = 0x00025421); -PROVIDE(tcp_out_ext = 0x00023d2d); -PROVIDE(tcp_out = 0x00043d3b); -PROVIDE(tcp_send_data = 0x00043d6f); -PROVIDE(tcp_short_window = 0x00043e97); -PROVIDE(tcp_update_recv_wnd = 0x00043f21); -PROVIDE(tcp_data_get = 0x0002422d); -PROVIDE(tcp_send_queued_data.part.0 = 0x0002433d); -PROVIDE(tcp_new_reno_init = 0x00044141); -PROVIDE(tcp_in = 0x000243dd); -PROVIDE(dhcpv4_option_callback_get_unique_types = 0x00025751); -PROVIDE(k_uptime_get = 0x000442db); -PROVIDE(dhcpv4_set_timeout = 0x000257a9); -PROVIDE(dhcpv4_update_message_timeout = 0x000442eb); -PROVIDE(dhcpv4_enter_bound = 0x000257cd); -PROVIDE(net_if_flag_is_set = 0x00044337); -PROVIDE(net_send_data = 0x00044349); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00025835); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x00025845); -PROVIDE(dhcpv4_iface_event_handler = 0x00025851); -PROVIDE(dhcpv4_start_internal = 0x000258d5); -PROVIDE(dhcpv4_add_option_length_value = 0x00044361); -PROVIDE(dhcpv4_create_message = 0x0002595d); -PROVIDE(dhcpv4_send_discover = 0x000443a5); -PROVIDE(dhcpv4_send_request = 0x000443fb); -PROVIDE(dhcpv4_timeout = 0x00025b3d); -PROVIDE(net_dhcpv4_input = 0x00025d39); -PROVIDE(net_ipv4_is_addr_mcast = 0x000447e7); -PROVIDE(join_ipv4_mcast_group = 0x000447f7); -PROVIDE(invoke_query_callback = 0x000447f9); -PROVIDE(get_slot_by_id = 0x00044809); -PROVIDE(k_mutex_lock = 0x0004482d); -PROVIDE(release_query = 0x00044831); -PROVIDE(k_mutex_unlock.isra.0 = 0x00044845); -PROVIDE(dns_resolve_cancel_with_hash.constprop.0 = 0x00044849); -PROVIDE(dns_resolve_close_locked = 0x000264b1); -PROVIDE(query_timeout = 0x000448a5); -PROVIDE(join_ipv6_mcast_group = 0x000448df); -PROVIDE(dns_postprocess_server = 0x0002654d); -PROVIDE(dns_resolve_init_locked = 0x00026681); -PROVIDE(dispatcher_cb = 0x00026945); -PROVIDE(dns_write.constprop.0 = 0x000448e1); -PROVIDE(gpio_ra_interrupt_init = 0x00044a51); -PROVIDE(gpio_ra_irq_init0 = 0x00026fe9); -PROVIDE(gpio_ra_irq_init1 = 0x0002700d); -PROVIDE(udc_pool_data_unref = 0x00044b2d); -PROVIDE(udc_pool_data_alloc = 0x00044b45); -PROVIDE(udc_buf_destroy = 0x00044b73); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00044ba3); -PROVIDE(ep_check_config.constprop.0 = 0x00044bc3); -PROVIDE(udc_is_initialized.isra.0 = 0x00044c2b); -PROVIDE(udc_is_enabled.isra.0 = 0x00044c37); -PROVIDE(udc_renesas_ra_set_address = 0x00045291); -PROVIDE(udc_renesas_ra_device_speed = 0x00045295); -PROVIDE(udc_renesas_ra_interrupt_handler = 0x000452a3); -PROVIDE(udc_renesas_ra_disable = 0x000452a7); -PROVIDE(udc_renesas_ra_enable = 0x000452c1); -PROVIDE(udc_renesas_ra_host_wakeup = 0x000452db); -PROVIDE(udc_renesas_ra_ep_disable = 0x000452f5); -PROVIDE(udc_renesas_ra_ep_enable = 0x00045319); -PROVIDE(udc_renesas_ra_ep_clear_halt = 0x00045365); -PROVIDE(udc_renesas_ra_ep_set_halt = 0x0004538f); -PROVIDE(udc_renesas_ra_ep_dequeue = 0x000453b9); -PROVIDE(usbd_ctrl_feed_dout = 0x00045417); -PROVIDE(udc_event_xfer_ctrl_in = 0x00045463); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000454a7); -PROVIDE(udc_renesas_ra_init = 0x00027251); -PROVIDE(udc_renesas_ra_shutdown = 0x000272e5); -PROVIDE(udc_renesas_ra_event_handler = 0x00027345); -PROVIDE(udc_renesas_ra_lock = 0x000454c7); -PROVIDE(udc_renesas_ra_unlock = 0x000454d7); -PROVIDE(udc_renesas_ra_make_thread_0 = 0x000276d1); -PROVIDE(udc_renesas_ra_thread_0 = 0x0002771d); -PROVIDE(udc_renesas_ra_ep_enqueue = 0x00027935); -PROVIDE(clock_control_renesas_ra_on = 0x00027985); -PROVIDE(clock_control_renesas_ra_off = 0x000279ad); -PROVIDE(clock_control_ra_init_pclk = 0x000454df); -PROVIDE(clock_control_renesas_ra_get_rate = 0x000454e3); -PROVIDE(clock_control_ra_init = 0x00045505); -PROVIDE(uart_console_init = 0x00027a21); -PROVIDE(console_out = 0x00027a49); -PROVIDE(renesas_ra_eth_get_capabilities = 0x00045599); -PROVIDE(renesas_ra_eth_isr = 0x0004559d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000455a1); -PROVIDE(renesas_ra_eth_thread = 0x00027ba1); -PROVIDE(renesas_ra_eth_initialize = 0x00027af1); -PROVIDE(phy_link_state_changed = 0x000455c1); -PROVIDE(renesas_ra_eth_tx = 0x00027c7d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0004566b); -PROVIDE(phy_mii_reg_write.isra.0 = 0x00045689); -PROVIDE(phy_mii_write = 0x000456b3); -PROVIDE(phy_mii_reg_read.isra.0 = 0x000456bb); -PROVIDE(phy_mii_cfg_link = 0x000456e5); -PROVIDE(phy_mii_read = 0x000457d5); -PROVIDE(phy_mii_get_link_state = 0x000457db); -PROVIDE(invoke_link_cb = 0x00045803); -PROVIDE(phy_mii_link_cb_set = 0x0004581f); -PROVIDE(monitor_work_handler = 0x00027d05); -PROVIDE(phy_mii_initialize = 0x00027f25); -PROVIDE(flash_ra_valid_range = 0x000458cf); -PROVIDE(flash_ra_get_size = 0x000458ed); -PROVIDE(flash_ra_get_parameters = 0x000458f9); -PROVIDE(flash_ra_read = 0x000458fd); -PROVIDE(flash_controller_ra_irq_config_func = 0x000280dd); -PROVIDE(flash_ra_init = 0x00028115); -PROVIDE(flash_controller_ra_init = 0x00045927); -PROVIDE(flash_ra_write = 0x00028145); -PROVIDE(flash_ra_erase = 0x000281f9); -PROVIDE(gpio_ra_port_get_raw = 0x00045955); -PROVIDE(gpio_ra_port_set_masked_raw = 0x00045963); -PROVIDE(gpio_ra_port_set_bits_raw = 0x00045979); -PROVIDE(gpio_ra_port_clear_bits_raw = 0x00045989); -PROVIDE(gpio_ra_port_toggle_bits = 0x0004599b); -PROVIDE(gpio_ra_manage_callback = 0x000459ab); -PROVIDE(query_irq_info.isra.0 = 0x000459fd); -PROVIDE(gpio_ra_callback_adapter = 0x00045a2f); -PROVIDE(gpio_ra_pin_configure = 0x0002830d); -PROVIDE(gpio_ra_pin_interrupt_configure = 0x00028451); -PROVIDE(i2c_ra_iic_get_config = 0x00045a77); -PROVIDE(i2c_ra_iic_callback = 0x00045a83); -PROVIDE(i2c_ra_iic_irq_config_func0 = 0x000284b9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00045a95); -PROVIDE(calc_iic_master_bitrate = 0x0002851d); -PROVIDE(i2c_ra_iic_transfer = 0x00028615); -PROVIDE(calc_iic_master_clock_setting.isra.0 = 0x000287cd); -PROVIDE(i2c_ra_iic_init = 0x00028a19); -PROVIDE(i2c_ra_iic_configure = 0x00028b01); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00028bad); -PROVIDE(renesas_ra_mdio_read = 0x00045ab5); -PROVIDE(renesas_ra_mdio_initialize = 0x00028bd1); -PROVIDE(renesas_ra_mdio_write = 0x00045af5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00045b55); -PROVIDE(pwm_renesas_ra_get_cycles_per_sec = 0x00028cad); -PROVIDE(pwm_renesas_ra_init = 0x00028cf9); -PROVIDE(pwm_renesas_ra_init_0 = 0x00045b75); -PROVIDE(pwm_renesas_ra_init_1 = 0x00045b79); -PROVIDE(pwm_renesas_ra_set_cycles = 0x00028db9); -PROVIDE(gpio_pin_set = 0x00045d81); -PROVIDE(regulator_fixed_enable = 0x00045da1); -PROVIDE(regulator_fixed_count_voltages = 0x00045dbf); -PROVIDE(regulator_fixed_list_voltage = 0x00045dcd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00028ead); -PROVIDE(regulator_fixed_init = 0x00028ed1); -PROVIDE(regulator_fixed_disable = 0x00045de7); -PROVIDE(uart_ra_sci_poll_in = 0x00045dfd); -PROVIDE(uart_ra_sci_poll_out = 0x00045e27); -PROVIDE(uart_ra_sci_err_check = 0x00045e49); -PROVIDE(uart_ra_sci_fifo_fill = 0x00045e83); -PROVIDE(uart_ra_sci_fifo_read = 0x00045ec9); -PROVIDE(uart_ra_sci_irq_tx_enable = 0x00045f17); -PROVIDE(uart_ra_sci_irq_tx_disable = 0x00045f39); -PROVIDE(uart_ra_sci_irq_tx_ready = 0x00045f47); -PROVIDE(uart_ra_sci_irq_tx_complete = 0x00045f69); -PROVIDE(uart_ra_sci_irq_rx_enable = 0x00045f7f); -PROVIDE(uart_ra_sci_irq_rx_disable = 0x00045fa3); -PROVIDE(uart_ra_sci_irq_rx_ready = 0x00045fb1); -PROVIDE(uart_ra_sci_irq_err_enable = 0x00028f51); -PROVIDE(uart_ra_sci_irq_err_disable = 0x00028f75); -PROVIDE(uart_ra_sci_irq_is_pending = 0x00045fdf); -PROVIDE(uart_ra_sci_irq_update = 0x0004602f); -PROVIDE(uart_ra_sci_irq_callback_set = 0x0004604b); -PROVIDE(uart_ra_sci_rxi_isr = 0x00028fa1); -PROVIDE(uart_ra_sci_txi_isr = 0x00028fc9); -PROVIDE(uart_ra_sci_tei_isr = 0x00028ff1); -PROVIDE(uart_ra_sci_eri_isr = 0x00029019); -PROVIDE(uart_ra_sci_config_get = 0x00046053); -PROVIDE(uart_ra_sci_apply_config = 0x00029041); -PROVIDE(uart_ra_sci_configure = 0x00046061); -PROVIDE(uart_ra_sci_init = 0x000460ad); -PROVIDE(uart_ra_sci_init0 = 0x000290d9); -PROVIDE(uart_ra_sci_init1 = 0x00029149); -PROVIDE(spi_context_get_next_buf = 0x00046117); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00046143); -PROVIDE(gpio_pin_set_dt.isra.0 = 0x00046161); -PROVIDE(_spi_context_cs_control = 0x00046189); -PROVIDE(spi_context_unlock_unconditionally = 0x000461c9); -PROVIDE(ra_spi_release = 0x000461e9); -PROVIDE(spi_ra_init0 = 0x000291b9); -PROVIDE(ra_spi_transceive = 0x0002927d); -PROVIDE(spi_cb = 0x000461f5); -PROVIDE(elapsed = 0x00029739); -PROVIDE(sys_clock_driver_init = 0x00029785); -PROVIDE(r_sci_irq_cfg = 0x0004625f); -PROVIDE(r_flash_hp_call_callback = 0x00046281); -PROVIDE(flash_hp_enter_pe_df_mode = 0x0002a039); -PROVIDE(flash_hp_init = 0x0002a08d); +PROVIDE(clock_control_pwm_set_rate = 0x0004573d); +PROVIDE(mulShift64 = 0x0004b21f); +PROVIDE(loader = 0x00013275); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00013381); +PROVIDE(stdinout_read_vmeth = 0x0003d61f); +PROVIDE(stdinout_ioctl_vmeth = 0x00013b09); +PROVIDE(_check_fd = 0x00013b21); +PROVIDE(zvfs_fdtable_call_ioctl = 0x0003d623); +PROVIDE(stdinout_write_vmeth = 0x0003d641); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0003d645); +PROVIDE(k_mutex_unlock.isra.0 = 0x0003d649); +PROVIDE(z_fd_unref.isra.0 = 0x00013b55); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003db2b); +PROVIDE(dummy_timestamp = 0x0003db49); +PROVIDE(default_lf_get_timestamp = 0x0003db4d); +PROVIDE(atomic_inc = 0x0003db5d); +PROVIDE(z_log_init.isra.0 = 0x00013ff1); +PROVIDE(enable_logger = 0x0003db6f); +PROVIDE(backend_filter_set = 0x0001435d); +PROVIDE(z_cbprintf_cpy = 0x0003dbfd); +PROVIDE(z_log_msg_simple_create = 0x0003dc5b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003dcc9); +PROVIDE(log_output_write = 0x0003dd27); +PROVIDE(out_func = 0x0003dd43); +PROVIDE(cr_out_func = 0x0003dd5f); +PROVIDE(print_formatted = 0x00014591); +PROVIDE(newline_print = 0x000145b5); +PROVIDE(cmd_kernel_cycles = 0x00014929); +PROVIDE(cmd_kernel_sleep = 0x00014945); +PROVIDE(cmd_kernel_version = 0x00014985); +PROVIDE(cmd_kernel_log_level_set = 0x0001499d); +PROVIDE(thread_valid_cb = 0x0003de6d); +PROVIDE(cmd_kernel_thread_list = 0x00014a41); +PROVIDE(shell_tdata_dump = 0x00014a75); +PROVIDE(cmd_kernel_thread_stacks = 0x00014b35); +PROVIDE(shell_stack_dump = 0x00014ba5); +PROVIDE(cmd_kernel_thread_suspend = 0x00014c05); +PROVIDE(cmd_kernel_thread_resume = 0x00014c69); +PROVIDE(cmd_kernel_thread_kill = 0x00014ccd); +PROVIDE(cmd_device_list = 0x00014d31); +PROVIDE(date_print = 0x00014e09); +PROVIDE(cmd_date_get = 0x0003de79); +PROVIDE(get_h_m_s = 0x00014e35); +PROVIDE(cmd_date_set = 0x00014ecd); +PROVIDE(cmd_devmem = 0x00014fd9); +PROVIDE(cmd_dump = 0x0001509d); +PROVIDE(set_bypass.isra.0 = 0x00015215); +PROVIDE(bypass_cb = 0x00015261); +PROVIDE(cmd_load = 0x00015375); +PROVIDE(log_msg_generic_get_wlen = 0x0003de9d); +PROVIDE(uart_irq_tx_disable = 0x0003debd); +PROVIDE(enable = 0x0003dec7); +PROVIDE(read_uart = 0x0003ded9); +PROVIDE(uninit = 0x0003deeb); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001544d); +PROVIDE(enable_shell_uart = 0x00015471); +PROVIDE(write_uart = 0x0003df0b); +PROVIDE(init = 0x000154a9); +PROVIDE(uart_callback = 0x000154fd); +PROVIDE(cmd_buffer_clear = 0x0003df6f); +PROVIDE(atomic_or = 0x0003df85); +PROVIDE(atomic_and = 0x0003df9b); +PROVIDE(k_mutex_lock = 0x0003dfb1); +PROVIDE(z_shell_raw_fprintf = 0x0003dfb5); +PROVIDE(shell_internal_help_print = 0x00015639); +PROVIDE(z_shell_strlen = 0x0003dfcf); +PROVIDE(shell_log_process = 0x0003dfdb); +PROVIDE(transport_evt_handler = 0x0003e00d); +PROVIDE(kill_handler = 0x00015659); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x000156b5); +PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x0003e025); +PROVIDE(z_flag_history_exit_set.isra.0 = 0x0003e03d); +PROVIDE(history_handle = 0x000156c1); +PROVIDE(z_flag_insert_mode_set.isra.0 = 0x0003e053); +PROVIDE(k_mutex_unlock.isra.0 = 0x0003e073); +PROVIDE(execute = 0x00015771); +PROVIDE(shell_signal_handle = 0x0003e077); +PROVIDE(state_set.constprop.0 = 0x00015a39); +PROVIDE(cmd_help = 0x0001622d); +PROVIDE(out_func = 0x0003e2d9); +PROVIDE(z_shell_strlen = 0x0003e315); +PROVIDE(z_shell_raw_fprintf = 0x0003e6f7); +PROVIDE(z_clear_eos = 0x00016521); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x0001653d); +PROVIDE(full_line_cmd.isra.0 = 0x0003e711); +PROVIDE(reprint_from_cursor = 0x00016769); +PROVIDE(data_insert = 0x0003ea21); +PROVIDE(z_shell_raw_fprintf = 0x0003ec99); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x000168ed); +PROVIDE(formatted_text_print.constprop.0 = 0x0003ecb3); +PROVIDE(cmd_comment = 0x0003ed95); +PROVIDE(cmd_shell_stats_reset = 0x0003ed99); +PROVIDE(z_shell_raw_fprintf = 0x0003eda1); +PROVIDE(cmd_resize_default = 0x00016a15); +PROVIDE(cmd_shell_stats_show = 0x00016a41); +PROVIDE(cmd_backends = 0x00016a55); +PROVIDE(cmd_prompt_on = 0x0003edbb); +PROVIDE(cmd_prompt_off = 0x00016aa1); +PROVIDE(cmd_history = 0x00016ab1); +PROVIDE(cmd_get_retval = 0x00016af1); +PROVIDE(cmd_echo = 0x00016b0d); +PROVIDE(cmd_clear = 0x00016b5d); +PROVIDE(cmd_resize = 0x00016b95); +PROVIDE(cmd_vt100_off = 0x0003edc7); +PROVIDE(cmd_bacskpace_mode_delete = 0x0003ede3); +PROVIDE(cmd_colors_off = 0x0003edff); +PROVIDE(cmd_bacskpace_mode_backspace = 0x0003ee1b); +PROVIDE(cmd_echo_off = 0x0003ee37); +PROVIDE(cmd_colors_on = 0x0003ee53); +PROVIDE(cmd_vt100_on = 0x0003ee6f); +PROVIDE(cmd_echo_on = 0x0003ee8b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f0c5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f1fd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f233); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f253); +PROVIDE(mem_manage_fault.constprop.0 = 0x00017485); +PROVIDE(bus_fault.constprop.0 = 0x000175e1); +PROVIDE(usage_fault.constprop.0 = 0x0001774d); +PROVIDE(__NVIC_SetPriority = 0x00017c35); +PROVIDE(cbputc = 0x0003f2b1); +PROVIDE(picolibc_put = 0x0003f2bd); +PROVIDE(malloc_prepare = 0x00017ead); +PROVIDE(malloc_lock = 0x00017ed1); +PROVIDE(malloc_unlock = 0x00017ee5); +PROVIDE(pthread_barrier_pool_init = 0x00017fad); +PROVIDE(posix_fs_alloc_obj = 0x00018151); +PROVIDE(fs_close_vmeth = 0x0003f53d); +PROVIDE(fs_ioctl_vmeth = 0x0001819d); +PROVIDE(fs_write_vmeth = 0x000181f9); +PROVIDE(fs_read_vmeth = 0x00018219); +PROVIDE(pthread_cond_pool_init = 0x000183dd); +PROVIDE(pthread_mutex_pool_init = 0x000183fd); +PROVIDE(posix_thread_pool_init = 0x0001841d); +PROVIDE(fixed_data_unref = 0x0003f5b9); +PROVIDE(net_buf_destroy = 0x00018455); +PROVIDE(fixed_data_alloc = 0x000184c5); +PROVIDE(zvfs_eventfd_ioctl_op = 0x00018621); +PROVIDE(zvfs_eventfd_write_locked = 0x0003f70f); +PROVIDE(zvfs_eventfd_rw_op = 0x00018751); +PROVIDE(zvfs_eventfd_write_op = 0x0001884d); +PROVIDE(zvfs_eventfd_read_op = 0x00018859); +PROVIDE(zvfs_eventfd_read_locked = 0x0003f77d); +PROVIDE(zvfs_eventfd_close_op = 0x00018865); +PROVIDE(zvfs_fdtable_call_ioctl = 0x0003f7dd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f825); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00018de5); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x00018df5); +PROVIDE(fs_get_mnt_point = 0x00018e01); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003f843); +PROVIDE(usbd_device_lock = 0x0003f863); +PROVIDE(k_mutex_unlock.isra.0 = 0x0003f871); +PROVIDE(sreq_feature_halt_notify = 0x0003faf9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003fb19); +PROVIDE(reqtype_is_to_device.isra.0 = 0x0003fb39); +PROVIDE(udc_test_mode = 0x0003fb47); +PROVIDE(sreq_get_desc_cfg = 0x0001949d); +PROVIDE(udc_set_address = 0x0003fb87); +PROVIDE(nonstd_request = 0x000195ad); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003fbc5); +PROVIDE(usbd_class_bcast_event = 0x0001a0a5); +PROVIDE(usbd_event_carrier = 0x0001a111); +PROVIDE(usbd_thread = 0x0001a121); +PROVIDE(usbd_pre_init = 0x0001a311); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003fbe5); +PROVIDE(usbd_ep_bm_is_set.isra.0 = 0x0003fc05); +PROVIDE(unassign_eps.constprop.0 = 0x0001a3fd); +PROVIDE(init_configuration = 0x0001a4b5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003fc17); +PROVIDE(usbd_device_lock = 0x0003fc37); +PROVIDE(k_mutex_unlock.isra.0 = 0x0003fc45); +PROVIDE(is_blocklisted = 0x0003fca3); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0003fcc3); +PROVIDE(usbd_class_node_get = 0x0001a9e9); +PROVIDE(usbd_device_lock = 0x0003fce3); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001ac75); +PROVIDE(usbd_interface_modify = 0x0001ac99); +PROVIDE(usbd_ep_bm_clear = 0x0003feb1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001ad71); +PROVIDE(msg_work_handler = 0x0001ae39); +PROVIDE(usbd_msg_pub = 0x0001aec9); +PROVIDE(usbd_cdc_acm_update = 0x00040035); +PROVIDE(usbd_cdc_acm_get_desc = 0x00040037); +PROVIDE(cdc_acm_irq_tx_ready = 0x0001af39); +PROVIDE(cdc_acm_irq_rx_ready = 0x0001af71); +PROVIDE(cdc_acm_irq_is_pending = 0x0001af99); +PROVIDE(cdc_acm_irq_callback_set = 0x00040047); +PROVIDE(cdc_acm_line_ctrl_get = 0x0004004f); +PROVIDE(cdc_acm_configure = 0x00040073); +PROVIDE(atomic_test_bit = 0x00040089); +PROVIDE(cdc_acm_get_int_in = 0x00040095); +PROVIDE(cdc_acm_get_bulk_out = 0x000400b1); +PROVIDE(cdc_acm_get_bulk_in = 0x000400cd); +PROVIDE(cdc_acm_irq_rx_enable = 0x0001afcd); +PROVIDE(cdc_acm_fifo_read = 0x0001b019); +PROVIDE(cdc_acm_poll_in = 0x0001b049); +PROVIDE(cdc_acm_fifo_fill = 0x0001b079); +PROVIDE(cdc_acm_config_get = 0x000400e9); +PROVIDE(usbd_cdc_acm_ctd = 0x0001b0c1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000400f7); +PROVIDE(usbd_cdc_acm_init = 0x0001b165); +PROVIDE(usbd_cdc_acm_init_wq = 0x0001b1bd); +PROVIDE(cdc_acm_get_bulk_mps.isra.0 = 0x00040117); +PROVIDE(usbd_cdc_acm_cth = 0x0001b1f5); +PROVIDE(cdc_acm_poll_out = 0x0001b239); +PROVIDE(atomic_clear_bit = 0x00040129); +PROVIDE(cdc_acm_irq_rx_disable = 0x0004013f); +PROVIDE(cdc_acm_irq_tx_disable = 0x00040149); +PROVIDE(usbd_cdc_acm_disable = 0x00040153); +PROVIDE(usbd_cdc_acm_resumed = 0x0004016b); +PROVIDE(usbd_cdc_acm_request = 0x0001b2a1); +PROVIDE(usbd_cdc_acm_preinit = 0x0001b3c9); +PROVIDE(cdc_acm_tx_fifo_handler = 0x0001b6c5); +PROVIDE(cdc_acm_rx_fifo_handler = 0x0001b609); +PROVIDE(cdc_acm_irq_cb_handler = 0x0001b40d); +PROVIDE(cdc_acm_line_ctrl_set = 0x00040177); +PROVIDE(cdc_acm_irq_update = 0x0001b4ed); +PROVIDE(usbd_cdc_acm_suspended = 0x00040263); +PROVIDE(usbd_cdc_acm_enable = 0x0001b551); +PROVIDE(cdc_acm_irq_tx_enable = 0x0001b5bd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0004027b); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x0001b7b1); +PROVIDE(call_fn_table = 0x0001b7bd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001bafd); +PROVIDE(llext_copy_region = 0x0001bb21); +PROVIDE(llext_read = 0x00040319); +PROVIDE(llext_seek = 0x0004031d); +PROVIDE(llext_peek = 0x00040321); +PROVIDE(llext_alloc = 0x0001bc61); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0004032b); +PROVIDE(llext_find_extension_sym_iterate = 0x0004036d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00040385); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0001ca5d); +PROVIDE(llext_shell_name_cb = 0x000404dd); +PROVIDE(llext_name_get = 0x0001cb31); +PROVIDE(llext_name_arg_get = 0x000404f3); +PROVIDE(cmd_llext_list_symbols = 0x0001cb61); +PROVIDE(cmd_llext_list = 0x0001cbcd); +PROVIDE(llext_shell_list_cb = 0x0001cbed); +PROVIDE(cmd_llext_load_hex = 0x0001cc05); +PROVIDE(cmd_llext_load_fs = 0x0001ccd9); +PROVIDE(cmd_llext_call_fn = 0x0001cd99); +PROVIDE(cmd_llext_unload = 0x0001cdc5); +PROVIDE(trigger_net_event = 0x0001ce05); +PROVIDE(dns_resolve_cb = 0x00040505); +PROVIDE(zvfs_fdtable_call_ioctl = 0x00040683); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x000406a1); +PROVIDE(k_mutex_unlock.isra.0 = 0x000406a5); +PROVIDE(inet_is_supported = 0x000406e3); +PROVIDE(net_if_get_by_index = 0x000406ef); +PROVIDE(zsock_connected_cb = 0x000406f3); +PROVIDE(ipv4_multicast_group.constprop.0 = 0x0001d679); +PROVIDE(zsock_socket_internal = 0x0001d6c9); +PROVIDE(zsock_accepted_cb = 0x0001d751); +PROVIDE(zsock_received_cb = 0x00040705); +PROVIDE(send_check_and_wait = 0x0001d79d); +PROVIDE(zsock_flush_queue = 0x00040787); +PROVIDE(zsock_recv_stream_immediate = 0x000407cd); +PROVIDE(sock_ioctl_vmeth = 0x0001d8a1); +PROVIDE(sock_close2_vmeth = 0x000408c5); +PROVIDE(sock_shutdown_vmeth = 0x000408c9); +PROVIDE(sock_bind_vmeth = 0x000408cd); +PROVIDE(sock_connect_vmeth = 0x000408d1); +PROVIDE(sock_listen_vmeth = 0x000408d5); +PROVIDE(sock_sendto_vmeth = 0x000408d9); +PROVIDE(sock_write_vmeth = 0x000408dd); +PROVIDE(sock_sendmsg_vmeth = 0x000408ef); +PROVIDE(sock_accept_vmeth = 0x0004092b); +PROVIDE(zsock_recv_dgram = 0x0001df6d); +PROVIDE(zsock_recv_stream = 0x0001e21d); +PROVIDE(sock_recvfrom_vmeth = 0x0004092f); +PROVIDE(sock_read_vmeth = 0x00040933); +PROVIDE(sock_recvmsg_vmeth = 0x00040945); +PROVIDE(sock_getsockopt_vmeth = 0x00040949); +PROVIDE(sock_setsockopt_vmeth = 0x0004094d); +PROVIDE(sock_getpeername_vmeth = 0x00040951); +PROVIDE(sock_getsockname_vmeth = 0x00040955); +PROVIDE(timeout_to_ms = 0x00040959); +PROVIDE(tls_release = 0x0001e855); +PROVIDE(zvfs_fdtable_call_ioctl = 0x0004098f); +PROVIDE(zsock_fcntl_wrapper = 0x000409ad); +PROVIDE(is_blocking = 0x000409c9); +PROVIDE(tls_ctr_drbg_random = 0x000409ef); +PROVIDE(crt_is_pem = 0x0001e8ad); +PROVIDE(tls_mbedtls_reset = 0x000409f7); +PROVIDE(tls_sock_getsockname_vmeth = 0x00040a11); +PROVIDE(tls_sock_getpeername_vmeth = 0x00040a17); +PROVIDE(tls_sock_listen_vmeth = 0x00040a1d); +PROVIDE(tls_sock_bind_vmeth = 0x00040a2b); +PROVIDE(tls_sock_shutdown_vmeth = 0x00040a31); +PROVIDE(ztls_poll_update_pollin.constprop.0 = 0x00040a37); +PROVIDE(tls_mbedtls_init = 0x0001e8d1); +PROVIDE(tls_rx = 0x0001eaed); +PROVIDE(tls_tx = 0x0001eab9); +PROVIDE(wait = 0x00040b25); +PROVIDE(tls_init = 0x0001eb21); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00040b85); +PROVIDE(k_mutex_unlock.isra.0 = 0x00040b89); +PROVIDE(tls_alloc = 0x0001eb51); +PROVIDE(ztls_socket = 0x0001ebe9); +PROVIDE(wait_for_reason = 0x00040b8d); +PROVIDE(tls_mbedtls_handshake.constprop.0 = 0x00040bb7); +PROVIDE(tls_is_supported = 0x00040c7b); +PROVIDE(tls_sock_ioctl_vmeth = 0x0001ec85); +PROVIDE(tls_sock_close2_vmeth = 0x00040c95); +PROVIDE(tls_sock_connect_vmeth = 0x00040c99); +PROVIDE(tls_sock_accept_vmeth = 0x00040c9d); +PROVIDE(tls_sock_sendto_vmeth = 0x00040ca1); +PROVIDE(tls_sock_write_vmeth = 0x00040ca5); +PROVIDE(tls_sock_sendmsg_vmeth = 0x00040cb7); +PROVIDE(tls_sock_recvfrom_vmeth = 0x00040cbb); +PROVIDE(tls_sock_read_vmeth = 0x00040cbf); +PROVIDE(tls_sock_getsockopt_vmeth = 0x00040cd1); +PROVIDE(tls_sock_setsockopt_vmeth = 0x00040cd5); +PROVIDE(socket_service_thread = 0x0001f931); +PROVIDE(net_mgmt_sock_write = 0x0001fae1); +PROVIDE(net_mgmt_sock_ioctl = 0x0001fb01); +PROVIDE(net_mgmt_sock_connect = 0x00040cf3); +PROVIDE(net_mgmt_sock_listen = 0x00040cf7); +PROVIDE(net_mgmt_sock_accept = 0x00040cfb); +PROVIDE(net_mgmt_is_supported = 0x00040cff); +PROVIDE(net_mgmt_sock_setsockopt = 0x0001fb85); +PROVIDE(net_mgmt_sock_getsockopt = 0x0001fbcd); +PROVIDE(net_mgmt_sock_bind = 0x0001fc19); +PROVIDE(znet_mgmt_recvfrom.constprop.0 = 0x0001fc69); +PROVIDE(net_mgmt_sock_read = 0x00040d11); +PROVIDE(net_mgmt_sock_recvfrom = 0x00040d21); +PROVIDE(net_mgmt_sock_sendto = 0x0001fd35); +PROVIDE(spair_bind = 0x0001fd55); +PROVIDE(spair_listen = 0x0001fd6d); +PROVIDE(spair_accept = 0x0001fd85); +PROVIDE(spair_getsockopt = 0x0001fd9d); +PROVIDE(spair_setsockopt = 0x0001fdb5); +PROVIDE(k_sem_take = 0x00040d25); +PROVIDE(k_sem_give = 0x00040d29); +PROVIDE(spair_write_avail.isra.0 = 0x0001fdcd); +PROVIDE(sock_is_connected.isra.0 = 0x0001fded); +PROVIDE(k_poll_signal_raise.isra.0 = 0x00040d2d); +PROVIDE(spair_delete = 0x0001fe05); +PROVIDE(spair_close = 0x00040d31); +PROVIDE(spair_connect = 0x0001fe91); +PROVIDE(spair_read = 0x0001fea9); +PROVIDE(spair_recvfrom = 0x00040d4d); +PROVIDE(spair_write = 0x0001fff1); +PROVIDE(spair_sendmsg = 0x000201c1); +PROVIDE(spair_sendto = 0x00040d5f); +PROVIDE(spair_ioctl = 0x00020259); +PROVIDE(credentials_init = 0x000205c1); +PROVIDE(net_ipv4_is_addr_mcast = 0x00040d63); +PROVIDE(net_if_l2_data = 0x00040d73); +PROVIDE(net_if_get_device = 0x00040d7d); +PROVIDE(net_eth_get_hw_capabilities = 0x00040d87); +PROVIDE(ethernet_enable = 0x00040da9); +PROVIDE(net_eth_is_addr_broadcast = 0x00040ddf); +PROVIDE(ethernet_ip_recv = 0x00040e0d); +PROVIDE(carrier_on_off = 0x00040e6d); +PROVIDE(ethernet_recv = 0x000206b1); +PROVIDE(ethernet_mcast_monitor_cb = 0x000207e9); +PROVIDE(ethernet_send = 0x00020851); +PROVIDE(is_hw_caps_supported = 0x00040f21); +PROVIDE(net_if_flag_is_set = 0x00040f3d); +PROVIDE(net_if_is_up = 0x00040f51); +PROVIDE(ethernet_set_config = 0x00020a2d); +PROVIDE(ethernet_get_config = 0x00020ca1); +PROVIDE(sys_slist_prepend = 0x00040f6d); +PROVIDE(sys_slist_remove = 0x00040f7b); +PROVIDE(net_if_get_link_addr = 0x00040f9b); +PROVIDE(net_eth_is_addr_all_zeroes = 0x00040fa5); +PROVIDE(net_eth_is_addr_unspecified = 0x00040fa5); +PROVIDE(k_uptime_get_32 = 0x00040fcd); +PROVIDE(net_eth_is_addr_broadcast = 0x00040fdd); +PROVIDE(net_if_flag_is_set.constprop.0 = 0x0004100b); +PROVIDE(arp_entry_get_last_from_table = 0x00020f09); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0004101d); +PROVIDE(net_linkaddr_set.constprop.0.isra.0 = 0x00041021); +PROVIDE(if_get_addr.isra.0 = 0x00041033); +PROVIDE(arp_entry_find.isra.0 = 0x0004105b); +PROVIDE(k_mutex_unlock.isra.0 = 0x00041077); +PROVIDE(net_if_tx_unlock = 0x0004107b); +PROVIDE(arp_entry_cleanup = 0x00041093); +PROVIDE(arp_request_timeout = 0x00020f31); +PROVIDE(arp_recv = 0x000412b1); +PROVIDE(sys_slist_find_and_remove = 0x00041545); +PROVIDE(net_ipv4_is_ll_addr = 0x000214d9); +PROVIDE(net_if_l2 = 0x0004157b); +PROVIDE(net_if_get_device = 0x00041585); +PROVIDE(net_context_send_cb = 0x0004158f); +PROVIDE(l2_flags_get = 0x000415a7); +PROVIDE(net_if_flag_is_set = 0x000415c1); +PROVIDE(k_uptime_get_32 = 0x000415d5); +PROVIDE(net_if_flag_set = 0x000415e5); +PROVIDE(net_if_flag_clear = 0x00041603); +PROVIDE(need_calc_checksum = 0x000214f1); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00041623); +PROVIDE(net_if_lock = 0x00041627); +PROVIDE(k_mutex_unlock.isra.0 = 0x00041635); +PROVIDE(get_ifaddr.constprop.0 = 0x00041639); +PROVIDE(iface_router_update_timer = 0x00021555); +PROVIDE(net_if_ipv4_get_best_match = 0x000215d1); +PROVIDE(if_ipv4_get_addr = 0x00041677); +PROVIDE(ipv4_is_broadcast_address = 0x000416d1); +PROVIDE(net_if_flag_test_and_set = 0x0004170d); +PROVIDE(net_if_flag_test_and_clear = 0x00041737); +PROVIDE(iface_router_expired = 0x00021669); +PROVIDE(net_if_ipv4_set_netmask_deprecated = 0x000417bf); +PROVIDE(update_operational_state = 0x00021b01); +PROVIDE(net_if_tx.isra.0 = 0x00021d2d); +PROVIDE(parse_ipv4 = 0x00041c75); +PROVIDE(k_mutex_unlock.isra.0 = 0x00041fb5); +PROVIDE(mgmt_event_work_handler = 0x000224a9); +PROVIDE(sys_slist_find_and_remove.constprop.0.isra.0 = 0x000225ed); +PROVIDE(mgmt_rebuild_global_event_mask = 0x00022625); +PROVIDE(mgmt_event_wait_call = 0x00041fb9); +PROVIDE(net_ipv4_is_addr_mcast = 0x0004207d); +PROVIDE(net_if_flag_is_set = 0x0004208d); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x000420a1); +PROVIDE(k_mutex_unlock.isra.0 = 0x000420a5); +PROVIDE(net_context_get_iface.isra.0 = 0x000420a9); +PROVIDE(check_used_port.constprop.0 = 0x00022889); +PROVIDE(find_available_port = 0x000420ad); +PROVIDE(bind_default = 0x00042267); +PROVIDE(context_sendto = 0x00042347); +PROVIDE(net_pkt_set_iface = 0x000428e5); +PROVIDE(clone_pkt_attributes = 0x000428ff); +PROVIDE(pkt_cursor_jump = 0x000429f1); +PROVIDE(pkt_cursor_advance = 0x00042a1d); +PROVIDE(pkt_cursor_update = 0x00042a4d); +PROVIDE(pkt_estimate_headers_length.part.0 = 0x00042aa3); +PROVIDE(pkt_alloc_buffer.constprop.0 = 0x00042ac7); +PROVIDE(net_pkt_get_len.isra.0 = 0x00042b67); +PROVIDE(net_pkt_cursor_operate = 0x00042b77); +PROVIDE(pkt_alloc = 0x00022f25); +PROVIDE(pkt_alloc_with_buffer = 0x00042e51); +PROVIDE(net_pkt_clone_internal = 0x0004308d); +PROVIDE(tc_rx_handler = 0x00043221); +PROVIDE(icmp_call_handlers = 0x00023239); +PROVIDE(net_conn_change_remote = 0x00043259); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x000232f5); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x00023305); +PROVIDE(conn_set_unused = 0x00023311); +PROVIDE(net_ipv4_is_addr_bcast = 0x000432ad); +PROVIDE(icmpv4_handle_echo_request = 0x00043301); +PROVIDE(sys_slist_get = 0x00043903); +PROVIDE(tcp_window_full = 0x00043917); +PROVIDE(tcp_unsent_len = 0x00043935); +PROVIDE(tcp_validate_seq = 0x00043971); +PROVIDE(tcp_send = 0x000238b1); +PROVIDE(tcp_setup_last_ack_timer = 0x000238ed); +PROVIDE(tcp_last_ack_timeout = 0x00043d83); +PROVIDE(tcp_derive_rto = 0x0004398f); +PROVIDE(k_sem_take = 0x000439b3); +PROVIDE(is_destination_local = 0x000439b7); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00043a01); +PROVIDE(tcp_compute_new_length = 0x00043a05); +PROVIDE(net_pkt_get_len.isra.0 = 0x00043a1f); +PROVIDE(tcp_pkt_pull = 0x00043a2f); +PROVIDE(th_get = 0x00043a69); +PROVIDE(tcp_data_len = 0x00043b57); +PROVIDE(tcp_endpoint_set = 0x00043b81); +PROVIDE(tcp_endpoint_cmp = 0x00043bd1); +PROVIDE(tcp_pkt_append = 0x00043c01); +PROVIDE(k_mutex_unlock.isra.0 = 0x00043c89); +PROVIDE(tcp_send_timer_cancel = 0x00023921); +PROVIDE(tcp_enter_time_wait = 0x000239a1); +PROVIDE(tcp_cleanup_recv_queue = 0x00043c8d); +PROVIDE(tcp_send_process_no_lock = 0x000239c9); +PROVIDE(atomic_inc.isra.0 = 0x00043cbf); +PROVIDE(tcp_conn_release = 0x00023ae9); +PROVIDE(tcp_conn_unref.isra.0 = 0x00023c39); +PROVIDE(tcp_conn_close.isra.0 = 0x00043ccf); +PROVIDE(tcp_send_process = 0x00043d4b); +PROVIDE(tcp_timewait_timeout = 0x00043d8f); +PROVIDE(tcp_fin_timeout = 0x00043d9b); +PROVIDE(tcp_resend_data = 0x00024281); +PROVIDE(tcp_send_zwp = 0x00024115); +PROVIDE(tcp_send_ack = 0x00043f5d); +PROVIDE(tcp_recv = 0x00025639); +PROVIDE(tcp_out_ext = 0x00023f45); +PROVIDE(tcp_out = 0x00043f53); +PROVIDE(tcp_send_data = 0x00043f87); +PROVIDE(tcp_short_window = 0x000440af); +PROVIDE(tcp_update_recv_wnd = 0x00044139); +PROVIDE(tcp_data_get = 0x00024445); +PROVIDE(tcp_send_queued_data.part.0 = 0x00024555); +PROVIDE(tcp_new_reno_init = 0x00044359); +PROVIDE(tcp_in = 0x000245f5); +PROVIDE(dhcpv4_option_callback_get_unique_types = 0x00025969); +PROVIDE(k_uptime_get = 0x000444f3); +PROVIDE(dhcpv4_set_timeout = 0x000259c1); +PROVIDE(dhcpv4_update_message_timeout = 0x00044503); +PROVIDE(dhcpv4_enter_bound = 0x000259e5); +PROVIDE(net_if_flag_is_set = 0x0004454f); +PROVIDE(net_send_data = 0x00044561); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x00025a4d); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x00025a5d); +PROVIDE(dhcpv4_iface_event_handler = 0x00025a69); +PROVIDE(dhcpv4_start_internal = 0x00025aed); +PROVIDE(dhcpv4_add_option_length_value = 0x00044579); +PROVIDE(dhcpv4_create_message = 0x00025b75); +PROVIDE(dhcpv4_send_discover = 0x000445bd); +PROVIDE(dhcpv4_send_request = 0x00044613); +PROVIDE(dhcpv4_timeout = 0x00025d55); +PROVIDE(net_dhcpv4_input = 0x00025f51); +PROVIDE(net_ipv4_is_addr_mcast = 0x000449ff); +PROVIDE(join_ipv4_mcast_group = 0x00044a0f); +PROVIDE(invoke_query_callback = 0x00044a11); +PROVIDE(get_slot_by_id = 0x00044a21); +PROVIDE(k_mutex_lock = 0x00044a45); +PROVIDE(release_query = 0x00044a49); +PROVIDE(k_mutex_unlock.isra.0 = 0x00044a5d); +PROVIDE(dns_resolve_cancel_with_hash.constprop.0 = 0x00044a61); +PROVIDE(dns_resolve_close_locked = 0x000266c9); +PROVIDE(query_timeout = 0x00044abd); +PROVIDE(join_ipv6_mcast_group = 0x00044af7); +PROVIDE(dns_postprocess_server = 0x00026765); +PROVIDE(dns_resolve_init_locked = 0x00026899); +PROVIDE(dispatcher_cb = 0x00026b5d); +PROVIDE(dns_write.constprop.0 = 0x00044af9); +PROVIDE(gpio_ra_interrupt_init = 0x00044c69); +PROVIDE(gpio_ra_irq_init0 = 0x00027201); +PROVIDE(gpio_ra_irq_init1 = 0x00027225); +PROVIDE(udc_pool_data_unref = 0x00044d45); +PROVIDE(udc_pool_data_alloc = 0x00044d5d); +PROVIDE(udc_buf_destroy = 0x00044d8b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00044dbb); +PROVIDE(ep_check_config.constprop.0 = 0x00044ddb); +PROVIDE(udc_is_initialized.isra.0 = 0x00044e43); +PROVIDE(udc_is_enabled.isra.0 = 0x00044e4f); +PROVIDE(udc_renesas_ra_set_address = 0x000454a9); +PROVIDE(udc_renesas_ra_device_speed = 0x000454ad); +PROVIDE(udc_renesas_ra_interrupt_handler = 0x000454bb); +PROVIDE(udc_renesas_ra_disable = 0x000454bf); +PROVIDE(udc_renesas_ra_enable = 0x000454d9); +PROVIDE(udc_renesas_ra_host_wakeup = 0x000454f3); +PROVIDE(udc_renesas_ra_ep_disable = 0x0004550d); +PROVIDE(udc_renesas_ra_ep_enable = 0x00045531); +PROVIDE(udc_renesas_ra_ep_clear_halt = 0x0004557d); +PROVIDE(udc_renesas_ra_ep_set_halt = 0x000455a7); +PROVIDE(udc_renesas_ra_ep_dequeue = 0x000455d1); +PROVIDE(usbd_ctrl_feed_dout = 0x0004562f); +PROVIDE(udc_event_xfer_ctrl_in = 0x0004567b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000456bf); +PROVIDE(udc_renesas_ra_init = 0x00027469); +PROVIDE(udc_renesas_ra_shutdown = 0x000274fd); +PROVIDE(udc_renesas_ra_event_handler = 0x0002755d); +PROVIDE(udc_renesas_ra_lock = 0x000456df); +PROVIDE(udc_renesas_ra_unlock = 0x000456ef); +PROVIDE(udc_renesas_ra_make_thread_0 = 0x000278e9); +PROVIDE(udc_renesas_ra_thread_0 = 0x00027935); +PROVIDE(udc_renesas_ra_ep_enqueue = 0x00027b4d); +PROVIDE(clock_control_renesas_ra_on = 0x00027b9d); +PROVIDE(clock_control_renesas_ra_off = 0x00027bc5); +PROVIDE(clock_control_ra_init_pclk = 0x000456f7); +PROVIDE(clock_control_renesas_ra_get_rate = 0x000456fb); +PROVIDE(clock_control_ra_init = 0x0004571d); +PROVIDE(uart_console_init = 0x00027c39); +PROVIDE(console_out = 0x00027c61); +PROVIDE(renesas_ra_eth_get_capabilities = 0x000457b1); +PROVIDE(renesas_ra_eth_isr = 0x000457b5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000457b9); +PROVIDE(renesas_ra_eth_thread = 0x00027db9); +PROVIDE(renesas_ra_eth_initialize = 0x00027d09); +PROVIDE(phy_link_state_changed = 0x000457d9); +PROVIDE(renesas_ra_eth_tx = 0x00027e95); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00045883); +PROVIDE(phy_mii_reg_write.isra.0 = 0x000458a1); +PROVIDE(phy_mii_write = 0x000458cb); +PROVIDE(phy_mii_reg_read.isra.0 = 0x000458d3); +PROVIDE(phy_mii_cfg_link = 0x000458fd); +PROVIDE(phy_mii_read = 0x000459ed); +PROVIDE(phy_mii_get_link_state = 0x000459f3); +PROVIDE(invoke_link_cb = 0x00045a1b); +PROVIDE(phy_mii_link_cb_set = 0x00045a37); +PROVIDE(monitor_work_handler = 0x00027f1d); +PROVIDE(phy_mii_initialize = 0x0002813d); +PROVIDE(flash_ra_valid_range = 0x00045ae7); +PROVIDE(flash_ra_get_size = 0x00045b05); +PROVIDE(flash_ra_get_parameters = 0x00045b11); +PROVIDE(flash_ra_read = 0x00045b15); +PROVIDE(flash_controller_ra_irq_config_func = 0x000282f5); +PROVIDE(flash_ra_init = 0x0002832d); +PROVIDE(flash_controller_ra_init = 0x00045b3f); +PROVIDE(flash_ra_write = 0x0002835d); +PROVIDE(flash_ra_erase = 0x00028411); +PROVIDE(gpio_ra_port_get_raw = 0x00045b6d); +PROVIDE(gpio_ra_port_set_masked_raw = 0x00045b7b); +PROVIDE(gpio_ra_port_set_bits_raw = 0x00045b91); +PROVIDE(gpio_ra_port_clear_bits_raw = 0x00045ba1); +PROVIDE(gpio_ra_port_toggle_bits = 0x00045bb3); +PROVIDE(gpio_ra_manage_callback = 0x00045bc3); +PROVIDE(query_irq_info.isra.0 = 0x00045c15); +PROVIDE(gpio_ra_callback_adapter = 0x00045c47); +PROVIDE(gpio_ra_pin_configure = 0x00028525); +PROVIDE(gpio_ra_pin_interrupt_configure = 0x00028669); +PROVIDE(i2c_ra_iic_get_config = 0x00045c8f); +PROVIDE(i2c_ra_iic_callback = 0x00045c9b); +PROVIDE(i2c_ra_iic_irq_config_func0 = 0x000286d1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00045cad); +PROVIDE(calc_iic_master_bitrate = 0x00028735); +PROVIDE(i2c_ra_iic_transfer = 0x0002882d); +PROVIDE(calc_iic_master_clock_setting.isra.0 = 0x000289e5); +PROVIDE(i2c_ra_iic_init = 0x00028c31); +PROVIDE(i2c_ra_iic_configure = 0x00028d19); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00028dc5); +PROVIDE(renesas_ra_mdio_read = 0x00045ccd); +PROVIDE(renesas_ra_mdio_initialize = 0x00028de9); +PROVIDE(renesas_ra_mdio_write = 0x00045d0d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00045d6d); +PROVIDE(pwm_renesas_ra_get_cycles_per_sec = 0x00028ec5); +PROVIDE(pwm_renesas_ra_init = 0x00028f11); +PROVIDE(pwm_renesas_ra_init_0 = 0x00045d8d); +PROVIDE(pwm_renesas_ra_init_1 = 0x00045d91); +PROVIDE(pwm_renesas_ra_set_cycles = 0x00028fd1); +PROVIDE(gpio_pin_set = 0x00045f99); +PROVIDE(regulator_fixed_enable = 0x00045fb9); +PROVIDE(regulator_fixed_count_voltages = 0x00045fd7); +PROVIDE(regulator_fixed_list_voltage = 0x00045fe5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x000290c5); +PROVIDE(regulator_fixed_init = 0x000290e9); +PROVIDE(regulator_fixed_disable = 0x00045fff); +PROVIDE(uart_ra_sci_poll_in = 0x00046015); +PROVIDE(uart_ra_sci_poll_out = 0x0004603f); +PROVIDE(uart_ra_sci_err_check = 0x00046061); +PROVIDE(uart_ra_sci_fifo_fill = 0x0004609b); +PROVIDE(uart_ra_sci_fifo_read = 0x000460e1); +PROVIDE(uart_ra_sci_irq_tx_enable = 0x0004612f); +PROVIDE(uart_ra_sci_irq_tx_disable = 0x00046151); +PROVIDE(uart_ra_sci_irq_tx_ready = 0x0004615f); +PROVIDE(uart_ra_sci_irq_tx_complete = 0x00046181); +PROVIDE(uart_ra_sci_irq_rx_enable = 0x00046197); +PROVIDE(uart_ra_sci_irq_rx_disable = 0x000461bb); +PROVIDE(uart_ra_sci_irq_rx_ready = 0x000461c9); +PROVIDE(uart_ra_sci_irq_err_enable = 0x00029169); +PROVIDE(uart_ra_sci_irq_err_disable = 0x0002918d); +PROVIDE(uart_ra_sci_irq_is_pending = 0x000461f7); +PROVIDE(uart_ra_sci_irq_update = 0x00046247); +PROVIDE(uart_ra_sci_irq_callback_set = 0x00046263); +PROVIDE(uart_ra_sci_rxi_isr = 0x000291b9); +PROVIDE(uart_ra_sci_txi_isr = 0x000291e1); +PROVIDE(uart_ra_sci_tei_isr = 0x00029209); +PROVIDE(uart_ra_sci_eri_isr = 0x00029231); +PROVIDE(uart_ra_sci_config_get = 0x0004626b); +PROVIDE(uart_ra_sci_apply_config = 0x00029259); +PROVIDE(uart_ra_sci_configure = 0x00046279); +PROVIDE(uart_ra_sci_init = 0x000462c5); +PROVIDE(uart_ra_sci_init0 = 0x000292f1); +PROVIDE(uart_ra_sci_init1 = 0x00029361); +PROVIDE(spi_context_get_next_buf = 0x0004632f); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0004635b); +PROVIDE(gpio_pin_set_dt.isra.0 = 0x00046379); +PROVIDE(_spi_context_cs_control = 0x000463a1); +PROVIDE(spi_context_unlock_unconditionally = 0x000463e1); +PROVIDE(ra_spi_release = 0x00046401); +PROVIDE(spi_ra_init0 = 0x000293d1); +PROVIDE(ra_spi_transceive = 0x00029495); +PROVIDE(spi_cb = 0x0004640d); +PROVIDE(elapsed = 0x00029951); +PROVIDE(sys_clock_driver_init = 0x0002999d); +PROVIDE(r_sci_irq_cfg = 0x00046477); +PROVIDE(r_flash_hp_call_callback = 0x00046499); +PROVIDE(flash_hp_enter_pe_df_mode = 0x0002a251); +PROVIDE(flash_hp_init = 0x0002a2a5); PROVIDE(flash_hp_status_clear = 0x200000b9); PROVIDE(flash_hp_reset = 0x200000fd); PROVIDE(flash_hp_erase_block = 0x20000159); @@ -674,1703 +674,1706 @@ PROVIDE(flash_hp_bank_swap = 0x200003a5); PROVIDE(flash_hp_cf_erase = 0x20000409); PROVIDE(flash_hp_access_window_set = 0x20000471); PROVIDE(flash_hp_set_startup_area_boot = 0x200004c1); -PROVIDE(R_FSP_CurrentIrqGet = 0x0004632b); -PROVIDE(iic_master_notify = 0x0004633d); -PROVIDE(iic_master_run_hw_master = 0x0002a645); -PROVIDE(iic_master_open_hw_master = 0x0002a735); -PROVIDE(iic_master_abort_seq_master = 0x000463b7); -PROVIDE(gpt_hardware_events_disable = 0x00046475); -PROVIDE(gpt_calculate_duty_cycle = 0x00046491); -PROVIDE(r_gpt_enable_irq = 0x00046599); -PROVIDE(gpt_gtior_calculate.isra.0 = 0x000465a3); -PROVIDE(usb_enable_interrupt = 0x0002ae7d); -PROVIDE(r_usb_device_call_callback = 0x000465c5); -PROVIDE(usb_disable_interrupt = 0x0002aeb9); -PROVIDE(pipe_write_packet.isra.0 = 0x00046617); -PROVIDE(pipe_wait_for_ready.isra.0 = 0x0002af01); -PROVIDE(edpt_max_packet_size.isra.0 = 0x0002af39); -PROVIDE(pipe_xfer_in = 0x0002af59); -PROVIDE(pipe0_xfer_in = 0x0002b029); -PROVIDE(get_pipetre.isra.0 = 0x0002b0d9); -PROVIDE(get_pipectr.isra.0 = 0x0002b101); -PROVIDE(ether_phy_mii_write1 = 0x00046655); -PROVIDE(ether_phy_mii_write0 = 0x00046699); -PROVIDE(ether_phy_reg_set = 0x000466dd); -PROVIDE(ether_phy_mii_writez = 0x0004670f); -PROVIDE(ether_phy_targets_is_support_link_partner_ability = 0x00046753); -PROVIDE(ether_call_callback = 0x00046a2b); -PROVIDE(aes_gen_tables = 0x0002e18d); -PROVIDE(asn1_get_sequence_of_cb = 0x00046da1); -PROVIDE(asn1_get_tagged_int = 0x00046e65); -PROVIDE(mbedtls_ct_uchar_in_range_if = 0x0002ed75); -PROVIDE(mbedtls_ct_base64_dec_value = 0x000470df); -PROVIDE(mbedtls_ct_bool = 0x0002eec9); -PROVIDE(mbedtls_mpi_core_exp_mod_optionally_safe = 0x0002ef11); -PROVIDE(mbedtls_ct_mpi_sign_if = 0x0002f0b1); -PROVIDE(mbedtls_mpi_resize_clear = 0x000477c3); -PROVIDE(add_sub_mpi = 0x00047c2b); -PROVIDE(mbedtls_mpi_exp_mod_optionally_safe = 0x00047e99); -PROVIDE(get_no_padding = 0x0002f3fd); -PROVIDE(mbedtls_ct_bool = 0x0002f891); -PROVIDE(verify_header = 0x00030551); -PROVIDE(verify_chain = 0x00030591); -PROVIDE(buffer_alloc_calloc = 0x000305cd); -PROVIDE(buffer_alloc_free = 0x000306e1); -PROVIDE(oid_sig_alg_from_asn1.part.0 = 0x0003086d); -PROVIDE(mbedtls_ct_bool = 0x00030df1); -PROVIDE(mbedtls_ct_uint_lt = 0x00030e09); -PROVIDE(mbedtls_ct_uint_ne = 0x00030e3d); -PROVIDE(mbedtls_md_get_size_from_type = 0x000487eb); -PROVIDE(mgf_mask = 0x00030e51); -PROVIDE(hash_mprime = 0x00030f1d); -PROVIDE(rsa_rsassa_pkcs1_v15_encode = 0x00030fad); -PROVIDE(asn1_get_nonzero_mpi = 0x000310ad); -PROVIDE(rsa_check_context.constprop.0 = 0x000310d1); -PROVIDE(rsa_rsassa_pss_sign_no_mode_check = 0x0003191d); -PROVIDE(_mbedtls_init = 0x00033e6d); -PROVIDE(pem_aes_decrypt = 0x00048e79); -PROVIDE(mbedtls_pk_rsa = 0x00048fdb); -PROVIDE(pk_get_pk_alg.constprop.0 = 0x00034151); -PROVIDE(pk_parse_key_pkcs8_unencrypted_der.constprop.0 = 0x000341a5); -PROVIDE(pk_hashlen_helper = 0x00048ff7); -PROVIDE(rsa_can_do = 0x0004907f); -PROVIDE(rsa_debug = 0x00034681); -PROVIDE(rsa_free_wrap = 0x0004908b); -PROVIDE(rsa_alloc_wrap = 0x0004909d); -PROVIDE(rsa_check_pair_wrap = 0x000490b3); -PROVIDE(rsa_encrypt_wrap = 0x000346a5); -PROVIDE(rsa_decrypt_wrap = 0x000346e9); -PROVIDE(rsa_sign_wrap = 0x0003472d); -PROVIDE(rsa_verify_wrap = 0x00034775); -PROVIDE(rsa_get_bitlen = 0x000490bb); -PROVIDE(x509_parse2_int = 0x000490c1); -PROVIDE(x509_memcasecmp = 0x0004913f); -PROVIDE(x509_name_cmp = 0x0004916f); -PROVIDE(x509_profile_check_key = 0x000491ed); -PROVIDE(x509_crt_check_cn = 0x0004921b); -PROVIDE(x509_crt_verify_restartable_ca_cb.constprop.0.isra.0 = 0x00034ef9); -PROVIDE(mbedtls_x509_crt_parse_der_internal = 0x000352b9); -PROVIDE(mbedtls_ct_bool = 0x00035e89); -PROVIDE(mbedtls_ct_uint_lt = 0x00035ea1); -PROVIDE(mbedtls_ct_uint_eq = 0x00035ed5); -PROVIDE(mbedtls_ssl_own_key = 0x0004951d); -PROVIDE(mbedtls_ct_uint_ne = 0x00037059); -PROVIDE(ssl_ciphersuite_match = 0x0003707d); -PROVIDE(ssl_mfl_code_to_length = 0x00037a2d); -PROVIDE(tls_prf_generic = 0x00037a45); -PROVIDE(tls_prf_sha256 = 0x00049531); -PROVIDE(tls_prf_sha384 = 0x00049551); -PROVIDE(ssl_update_checksum_sha256 = 0x00049571); -PROVIDE(ssl_update_checksum_sha384 = 0x00049579); -PROVIDE(ssl_calc_finished_tls_generic = 0x00037bb1); -PROVIDE(ssl_calc_finished_tls_sha256 = 0x00049581); -PROVIDE(ssl_calc_finished_tls_sha384 = 0x0004959b); -PROVIDE(ssl_calc_verify_tls_legacy.constprop.0 = 0x000495b5); -PROVIDE(ssl_calc_verify_tls_sha384 = 0x00049609); -PROVIDE(ssl_calc_verify_tls_sha256 = 0x00049611); -PROVIDE(ssl_update_checksum_start = 0x00049619); -PROVIDE(ssl_handshake_init = 0x00038169); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00049b33); -PROVIDE(do_device_init = 0x00049b69); -PROVIDE(z_sys_init_run_level = 0x00038fbd); -PROVIDE(bg_thread_main = 0x00038fed); -PROVIDE(statics_init = 0x00039235); -PROVIDE(create_free_list = 0x00049ca3); -PROVIDE(init_mem_slab_obj_core_list = 0x00039259); -PROVIDE(init_mbox_module = 0x000392d9); -PROVIDE(unpend_thread_no_timeout = 0x00049d69); -PROVIDE(adjust_owner_prio.isra.0 = 0x00049eef); -PROVIDE(unpend_thread_no_timeout = 0x00049f0d); -PROVIDE(queue_insert = 0x00049f27); -PROVIDE(k_sys_work_q_init = 0x00039831); -PROVIDE(flag_test_and_clear = 0x0004a1fb); -PROVIDE(unschedule_locked = 0x0004a211); -PROVIDE(notify_queue_locked.isra.0 = 0x0004a22f); -PROVIDE(work_queue_main = 0x00039865); -PROVIDE(cancel_async_locked = 0x0004a23f); -PROVIDE(submit_to_queue_locked = 0x000399b1); -PROVIDE(work_timeout = 0x0004a2a5); -PROVIDE(unpend_thread_no_timeout = 0x0004a3a7); -PROVIDE(sys_dlist_remove = 0x0004a427); -PROVIDE(unpend_thread_no_timeout = 0x0004a437); -PROVIDE(z_swap_irqlock = 0x00039ecd); -PROVIDE(ready_thread = 0x00039f01); -PROVIDE(unready_thread = 0x00039f85); -PROVIDE(add_to_waitq_locked = 0x0004a44b); -PROVIDE(z_tick_sleep = 0x0003a481); -PROVIDE(wait_for = 0x0004a637); -PROVIDE(z_sched_wake_all.constprop.0 = 0x0004a6a9); -PROVIDE(slice_timeout = 0x0003a825); -PROVIDE(first = 0x0003aa21); -PROVIDE(elapsed = 0x0003aa31); -PROVIDE(next_timeout = 0x0004a8d9); -PROVIDE(remove_timeout = 0x0003aa45); -PROVIDE(timeout_rem = 0x0003aa7d); -PROVIDE(clear_event_registrations = 0x0003ae21); -PROVIDE(add_event = 0x0004aa8b); -PROVIDE(register_events = 0x0004aadf); -PROVIDE(signal_poll_event = 0x0004abe3); -PROVIDE(z_heap_aligned_alloc = 0x0004acdf); -PROVIDE(__ultoa_invert = 0x0004afb9); -PROVIDE(skip_to_arg = 0x0003b7c9); -PROVIDE(mulShiftAll64 = 0x0004b067); -PROVIDE(div10 = 0x0003c2a1); -PROVIDE(chunk_field = 0x0003cc9b); -PROVIDE(chunk_set = 0x0003ccb1); -PROVIDE(chunk_size = 0x0003ccc7); -PROVIDE(set_chunk_used = 0x0003ccd3); -PROVIDE(set_chunk_size = 0x0003cd03); -PROVIDE(mem_to_chunkid = 0x0003cd0b); -PROVIDE(bucket_idx.isra.0 = 0x0003cd1f); -PROVIDE(free_list_remove_bidx = 0x0003cd3b); -PROVIDE(free_list_remove = 0x0003cd97); -PROVIDE(alloc_chunk = 0x0003cdc5); -PROVIDE(split_chunks = 0x0003ce39); -PROVIDE(merge_chunks = 0x0003ce87); -PROVIDE(free_list_add = 0x0003cec3); -PROVIDE(free_chunk = 0x0003cf47); -PROVIDE(setup_bundle_data.constprop.0 = 0x0003d547); -PROVIDE(set_region = 0x0003d581); -PROVIDE(match_region = 0x0003d611); -PROVIDE(ring_buf_put_claim = 0x0003d7dd); -PROVIDE(ring_buf_get_claim = 0x0003d7fb); -PROVIDE(panic = 0x0003e913); -PROVIDE(process_log_msg.constprop.0 = 0x0003e915); -PROVIDE(process = 0x0003e9a1); -PROVIDE(dropped = 0x0003e9e1); -PROVIDE(remove_from_tail.part.0 = 0x0003ec8f); -PROVIDE(foldcase = 0x0003f0af); -PROVIDE(fnmatchx = 0x0003f0bf); -PROVIDE(processing_data = 0x000410b5); -PROVIDE(net_init = 0x0004111f); -PROVIDE(net_ipv4_is_addr_mcast = 0x00043397); -PROVIDE(net_ipv4_is_addr_bcast = 0x000433a7); -PROVIDE(net_ipv4_is_my_addr = 0x000433c9); -PROVIDE(entropy_renesas_ra_init = 0x00045551); -PROVIDE(entropy_renesas_ra_get_entropy = 0x0004555b); -PROVIDE(flash_get_page_info = 0x0004582f); -PROVIDE(regulator_delay = 0x00045b7d); -PROVIDE(aes_ctx_free = 0x00048467); -PROVIDE(aes_ctx_alloc = 0x00048479); -PROVIDE(aes_setkey_dec_wrap = 0x00048491); -PROVIDE(aes_setkey_enc_wrap = 0x00048495); -PROVIDE(aes_crypt_cbc_wrap = 0x00048499); -PROVIDE(aes_crypt_ecb_wrap = 0x0004849d); -PROVIDE(__memset_veneer = 0x20000531); -PROVIDE(__flash_hp_enter_pe_df_mode_veneer = 0x20000539); -PROVIDE(__R_BSP_IrqDisable_veneer = 0x20000541); +PROVIDE(R_FSP_CurrentIrqGet = 0x00046543); +PROVIDE(iic_master_notify = 0x00046555); +PROVIDE(iic_master_run_hw_master = 0x0002a85d); +PROVIDE(iic_master_open_hw_master = 0x0002a94d); +PROVIDE(iic_master_abort_seq_master = 0x000465cf); +PROVIDE(gpt_hardware_events_disable = 0x0004668d); +PROVIDE(gpt_calculate_duty_cycle = 0x000466a9); +PROVIDE(r_gpt_enable_irq = 0x000467b1); +PROVIDE(gpt_gtior_calculate.isra.0 = 0x000467bb); +PROVIDE(usb_enable_interrupt = 0x0002b095); +PROVIDE(r_usb_device_call_callback = 0x000467dd); +PROVIDE(usb_disable_interrupt = 0x0002b0d1); +PROVIDE(pipe_write_packet.isra.0 = 0x0004682f); +PROVIDE(pipe_wait_for_ready.isra.0 = 0x0002b119); +PROVIDE(edpt_max_packet_size.isra.0 = 0x0002b151); +PROVIDE(pipe_xfer_in = 0x0002b171); +PROVIDE(pipe0_xfer_in = 0x0002b241); +PROVIDE(get_pipetre.isra.0 = 0x0002b2f1); +PROVIDE(get_pipectr.isra.0 = 0x0002b319); +PROVIDE(ether_phy_mii_write1 = 0x0004686d); +PROVIDE(ether_phy_mii_write0 = 0x000468b1); +PROVIDE(ether_phy_reg_set = 0x000468f5); +PROVIDE(ether_phy_mii_writez = 0x00046927); +PROVIDE(ether_phy_targets_is_support_link_partner_ability = 0x0004696b); +PROVIDE(ether_call_callback = 0x00046c43); +PROVIDE(aes_gen_tables = 0x0002e3a5); +PROVIDE(asn1_get_sequence_of_cb = 0x00046fb9); +PROVIDE(asn1_get_tagged_int = 0x0004707d); +PROVIDE(mbedtls_ct_uchar_in_range_if = 0x0002ef8d); +PROVIDE(mbedtls_ct_base64_dec_value = 0x000472f7); +PROVIDE(mbedtls_ct_bool = 0x0002f0e1); +PROVIDE(mbedtls_mpi_core_exp_mod_optionally_safe = 0x0002f129); +PROVIDE(mbedtls_ct_mpi_sign_if = 0x0002f2c9); +PROVIDE(mbedtls_mpi_resize_clear = 0x000479db); +PROVIDE(add_sub_mpi = 0x00047e43); +PROVIDE(mbedtls_mpi_exp_mod_optionally_safe = 0x000480b1); +PROVIDE(get_no_padding = 0x0002f615); +PROVIDE(mbedtls_ct_bool = 0x0002faa9); +PROVIDE(verify_header = 0x00030769); +PROVIDE(verify_chain = 0x000307a9); +PROVIDE(buffer_alloc_calloc = 0x000307e5); +PROVIDE(buffer_alloc_free = 0x000308f9); +PROVIDE(oid_sig_alg_from_asn1.part.0 = 0x00030a85); +PROVIDE(mbedtls_ct_bool = 0x00031009); +PROVIDE(mbedtls_ct_uint_lt = 0x00031021); +PROVIDE(mbedtls_ct_uint_ne = 0x00031055); +PROVIDE(mbedtls_md_get_size_from_type = 0x00048a03); +PROVIDE(mgf_mask = 0x00031069); +PROVIDE(hash_mprime = 0x00031135); +PROVIDE(rsa_rsassa_pkcs1_v15_encode = 0x000311c5); +PROVIDE(asn1_get_nonzero_mpi = 0x000312c5); +PROVIDE(rsa_check_context.constprop.0 = 0x000312e9); +PROVIDE(rsa_rsassa_pss_sign_no_mode_check = 0x00031b35); +PROVIDE(_mbedtls_init = 0x00034085); +PROVIDE(pem_aes_decrypt = 0x00049091); +PROVIDE(mbedtls_pk_rsa = 0x000491f3); +PROVIDE(pk_get_pk_alg.constprop.0 = 0x00034369); +PROVIDE(pk_parse_key_pkcs8_unencrypted_der.constprop.0 = 0x000343bd); +PROVIDE(pk_hashlen_helper = 0x0004920f); +PROVIDE(rsa_can_do = 0x00049297); +PROVIDE(rsa_debug = 0x00034899); +PROVIDE(rsa_free_wrap = 0x000492a3); +PROVIDE(rsa_alloc_wrap = 0x000492b5); +PROVIDE(rsa_check_pair_wrap = 0x000492cb); +PROVIDE(rsa_encrypt_wrap = 0x000348bd); +PROVIDE(rsa_decrypt_wrap = 0x00034901); +PROVIDE(rsa_sign_wrap = 0x00034945); +PROVIDE(rsa_verify_wrap = 0x0003498d); +PROVIDE(rsa_get_bitlen = 0x000492d3); +PROVIDE(x509_parse2_int = 0x000492d9); +PROVIDE(x509_memcasecmp = 0x00049357); +PROVIDE(x509_name_cmp = 0x00049387); +PROVIDE(x509_profile_check_key = 0x00049405); +PROVIDE(x509_crt_check_cn = 0x00049433); +PROVIDE(x509_crt_verify_restartable_ca_cb.constprop.0.isra.0 = 0x00035111); +PROVIDE(mbedtls_x509_crt_parse_der_internal = 0x000354d1); +PROVIDE(mbedtls_ct_bool = 0x000360a1); +PROVIDE(mbedtls_ct_uint_lt = 0x000360b9); +PROVIDE(mbedtls_ct_uint_eq = 0x000360ed); +PROVIDE(mbedtls_ssl_own_key = 0x00049735); +PROVIDE(mbedtls_ct_uint_ne = 0x00037271); +PROVIDE(ssl_ciphersuite_match = 0x00037295); +PROVIDE(ssl_mfl_code_to_length = 0x00037c45); +PROVIDE(tls_prf_generic = 0x00037c5d); +PROVIDE(tls_prf_sha256 = 0x00049749); +PROVIDE(tls_prf_sha384 = 0x00049769); +PROVIDE(ssl_update_checksum_sha256 = 0x00049789); +PROVIDE(ssl_update_checksum_sha384 = 0x00049791); +PROVIDE(ssl_calc_finished_tls_generic = 0x00037dc9); +PROVIDE(ssl_calc_finished_tls_sha256 = 0x00049799); +PROVIDE(ssl_calc_finished_tls_sha384 = 0x000497b3); +PROVIDE(ssl_calc_verify_tls_legacy.constprop.0 = 0x000497cd); +PROVIDE(ssl_calc_verify_tls_sha384 = 0x00049821); +PROVIDE(ssl_calc_verify_tls_sha256 = 0x00049829); +PROVIDE(ssl_update_checksum_start = 0x00049831); +PROVIDE(ssl_handshake_init = 0x00038381); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x00049d4b); +PROVIDE(do_device_init = 0x00049d81); +PROVIDE(z_sys_init_run_level = 0x000391d5); +PROVIDE(bg_thread_main = 0x00039205); +PROVIDE(statics_init = 0x0003944d); +PROVIDE(create_free_list = 0x00049ebb); +PROVIDE(init_mem_slab_obj_core_list = 0x00039471); +PROVIDE(init_mbox_module = 0x000394f1); +PROVIDE(unpend_thread_no_timeout = 0x00049f81); +PROVIDE(adjust_owner_prio.isra.0 = 0x0004a107); +PROVIDE(unpend_thread_no_timeout = 0x0004a125); +PROVIDE(queue_insert = 0x0004a13f); +PROVIDE(k_sys_work_q_init = 0x00039a49); +PROVIDE(flag_test_and_clear = 0x0004a413); +PROVIDE(unschedule_locked = 0x0004a429); +PROVIDE(notify_queue_locked.isra.0 = 0x0004a447); +PROVIDE(work_queue_main = 0x00039a7d); +PROVIDE(cancel_async_locked = 0x0004a457); +PROVIDE(submit_to_queue_locked = 0x00039bc9); +PROVIDE(work_timeout = 0x0004a4bd); +PROVIDE(unpend_thread_no_timeout = 0x0004a5bf); +PROVIDE(sys_dlist_remove = 0x0004a63f); +PROVIDE(unpend_thread_no_timeout = 0x0004a64f); +PROVIDE(z_swap_irqlock = 0x0003a0e5); +PROVIDE(ready_thread = 0x0003a119); +PROVIDE(unready_thread = 0x0003a19d); +PROVIDE(add_to_waitq_locked = 0x0004a663); +PROVIDE(z_tick_sleep = 0x0003a699); +PROVIDE(wait_for = 0x0004a84f); +PROVIDE(z_sched_wake_all.constprop.0 = 0x0004a8c1); +PROVIDE(slice_timeout = 0x0003aa3d); +PROVIDE(first = 0x0003ac39); +PROVIDE(elapsed = 0x0003ac49); +PROVIDE(next_timeout = 0x0004aaf1); +PROVIDE(remove_timeout = 0x0003ac5d); +PROVIDE(timeout_rem = 0x0003ac95); +PROVIDE(clear_event_registrations = 0x0003b039); +PROVIDE(add_event = 0x0004aca3); +PROVIDE(register_events = 0x0004acf7); +PROVIDE(signal_poll_event = 0x0004adfb); +PROVIDE(z_heap_aligned_alloc = 0x0004aef7); +PROVIDE(__ultoa_invert = 0x0004b1d1); +PROVIDE(skip_to_arg = 0x0003b9e1); +PROVIDE(mulShiftAll64 = 0x0004b27f); +PROVIDE(div10 = 0x0003c4b9); +PROVIDE(chunk_field = 0x0003ceb3); +PROVIDE(chunk_set = 0x0003cec9); +PROVIDE(chunk_size = 0x0003cedf); +PROVIDE(set_chunk_used = 0x0003ceeb); +PROVIDE(set_chunk_size = 0x0003cf1b); +PROVIDE(mem_to_chunkid = 0x0003cf23); +PROVIDE(bucket_idx.isra.0 = 0x0003cf37); +PROVIDE(free_list_remove_bidx = 0x0003cf53); +PROVIDE(free_list_remove = 0x0003cfaf); +PROVIDE(alloc_chunk = 0x0003cfdd); +PROVIDE(split_chunks = 0x0003d051); +PROVIDE(merge_chunks = 0x0003d09f); +PROVIDE(free_list_add = 0x0003d0db); +PROVIDE(free_chunk = 0x0003d15f); +PROVIDE(setup_bundle_data.constprop.0 = 0x0003d75f); +PROVIDE(set_region = 0x0003d799); +PROVIDE(match_region = 0x0003d829); +PROVIDE(ring_buf_put_claim = 0x0003d9f5); +PROVIDE(ring_buf_get_claim = 0x0003da13); +PROVIDE(panic = 0x0003eb2b); +PROVIDE(process_log_msg.constprop.0 = 0x0003eb2d); +PROVIDE(process = 0x0003ebb9); +PROVIDE(dropped = 0x0003ebf9); +PROVIDE(remove_from_tail.part.0 = 0x0003eea7); +PROVIDE(foldcase = 0x0003f2c7); +PROVIDE(fnmatchx = 0x0003f2d7); +PROVIDE(processing_data = 0x000412cd); +PROVIDE(net_init = 0x00041337); +PROVIDE(net_ipv4_is_addr_mcast = 0x000435af); +PROVIDE(net_ipv4_is_addr_bcast = 0x000435bf); +PROVIDE(net_ipv4_is_my_addr = 0x000435e1); +PROVIDE(entropy_renesas_ra_init = 0x00045769); +PROVIDE(entropy_renesas_ra_get_entropy = 0x00045773); +PROVIDE(flash_get_page_info = 0x00045a47); +PROVIDE(regulator_delay = 0x00045d95); +PROVIDE(aes_ctx_free = 0x0004867f); +PROVIDE(aes_ctx_alloc = 0x00048691); +PROVIDE(aes_setkey_dec_wrap = 0x000486a9); +PROVIDE(aes_setkey_enc_wrap = 0x000486ad); +PROVIDE(aes_crypt_cbc_wrap = 0x000486b1); +PROVIDE(aes_crypt_ecb_wrap = 0x000486b5); +PROVIDE(__R_BSP_IrqDisable_veneer = 0x20000531); +PROVIDE(__memset_veneer = 0x20000539); +PROVIDE(__flash_hp_enter_pe_df_mode_veneer = 0x20000541); PROVIDE(__R_BSP_IrqEnableNoClear_veneer = 0x20000549); -PROVIDE(__flash_hp_erase_block_veneer = 0x0004b3d1); -PROVIDE(__flash_hp_reset_veneer = 0x0004b3d9); -PROVIDE(__flash_hp_cf_write_veneer = 0x0004b3e1); -PROVIDE(__flash_hp_cf_erase_veneer = 0x0004b3e9); -PROVIDE(__flash_hp_write_data_veneer = 0x0004b3f1); -PROVIDE(__flash_hp_check_errors_veneer = 0x0004b3f9); -PROVIDE(__flash_hp_pe_mode_exit_veneer = 0x0004b401); -PROVIDE(mbedtls_ssl_session_free = 0x0004986d); -PROVIDE(mbedtls_mpi_core_sub = 0x0004734d); -PROVIDE(dns_resolve_init_with_svc = 0x000449cf); -PROVIDE(net_conn_init = 0x00023645); -PROVIDE(net_ipv4_unspecified_address = 0x00022281); -PROVIDE(main = 0x0003cc63); +PROVIDE(__flash_hp_check_errors_veneer = 0x0004b5e9); +PROVIDE(__flash_hp_pe_mode_exit_veneer = 0x0004b5f1); +PROVIDE(__flash_hp_write_data_veneer = 0x0004b5f9); +PROVIDE(__flash_hp_erase_block_veneer = 0x0004b601); +PROVIDE(__flash_hp_reset_veneer = 0x0004b609); +PROVIDE(__flash_hp_cf_write_veneer = 0x0004b611); +PROVIDE(__flash_hp_cf_erase_veneer = 0x0004b619); +PROVIDE(mbedtls_ssl_session_free = 0x00049a85); +PROVIDE(mbedtls_mpi_core_sub = 0x00047565); +PROVIDE(dns_resolve_init_with_svc = 0x00044be7); +PROVIDE(net_conn_init = 0x0002385d); +PROVIDE(net_ipv4_unspecified_address = 0x00022499); +PROVIDE(main = 0x0003ce7b); PROVIDE(__aeabi_ul2d = 0x00010521); -PROVIDE(z_impl_net_if_ipv4_addr_add_by_index = 0x00041743); -PROVIDE(zsock_bind_ctx = 0x0001d959); -PROVIDE(mbedtls_ssl_init = 0x00049709); -PROVIDE(R_USBD_RemoteWakeup = 0x0002b631); -PROVIDE(mbedtls_internal_sha256_process = 0x000333cd); -PROVIDE(mbedtls_md5_free = 0x0004856f); -PROVIDE(mbedtls_oid_get_x509_ext_type = 0x00030899); -PROVIDE(mbedtls_sha256_update = 0x00048b03); -PROVIDE(mbedtls_ssl_conf_max_frag_len = 0x00037d1d); -PROVIDE(z_timeout_remaining = 0x0004a94d); -PROVIDE(R_USBD_EdptOpen = 0x0002b475); +PROVIDE(z_impl_net_if_ipv4_addr_add_by_index = 0x0004195b); +PROVIDE(zsock_bind_ctx = 0x0001db49); +PROVIDE(mbedtls_ssl_init = 0x00049921); +PROVIDE(R_USBD_RemoteWakeup = 0x0002b849); +PROVIDE(mbedtls_internal_sha256_process = 0x000335e5); +PROVIDE(mbedtls_md5_free = 0x00048787); +PROVIDE(mbedtls_oid_get_x509_ext_type = 0x00030ab1); +PROVIDE(mbedtls_sha256_update = 0x00048d1b); +PROVIDE(mbedtls_ssl_conf_max_frag_len = 0x00037f35); +PROVIDE(z_timeout_remaining = 0x0004ab65); +PROVIDE(R_USBD_EdptOpen = 0x0002b68d); PROVIDE(__floatdidf = 0x00010531); -PROVIDE(R_USBD_Close = 0x0002b2d5); -PROVIDE(memcmp = 0x0004ae7d); -PROVIDE(mbedtls_ssl_update_handshake_status = 0x000493f3); -PROVIDE(mbedtls_md_hmac_reset = 0x0002fd85); -PROVIDE(z_shell_fprintf_fmt = 0x00016245); -PROVIDE(mbedtls_internal_aes_encrypt = 0x0002e651); -PROVIDE(ethernet_mgmt_raise_carrier_on_event = 0x00020cf9); -PROVIDE(net_tcp_conn_sem_get = 0x0004426f); -PROVIDE(mbedtls_x509_get_serial = 0x000347c1); -PROVIDE(listen = 0x0003f34b); -PROVIDE(net_eth_carrier_off = 0x00040cdf); -PROVIDE(z_shell_op_cursor_vert_move = 0x00016359); -PROVIDE(usbd_register_all_classes = 0x0001a9b1); -PROVIDE(mbedtls_pk_decrypt = 0x0003454d); -PROVIDE(net_buf_alloc_len = 0x000182f9); -PROVIDE(mbedtls_mpi_core_read_be = 0x0004718b); -PROVIDE(zvfs_free_fd = 0x0003d435); -PROVIDE(ztls_close_ctx = 0x0001ee49); -PROVIDE(mbedtls_ssl_session_reset_int = 0x0004997b); -PROVIDE(credentials_lock = 0x00020451); -PROVIDE(mbedtls_md5_starts = 0x0002fdb1); -PROVIDE(mbedtls_ssl_ciphersuite_from_string = 0x00035bb1); +PROVIDE(R_USBD_Close = 0x0002b4ed); +PROVIDE(memcmp = 0x0004b095); +PROVIDE(mbedtls_ssl_update_handshake_status = 0x0004960b); +PROVIDE(mbedtls_md_hmac_reset = 0x0002ff9d); +PROVIDE(z_shell_fprintf_fmt = 0x00016435); +PROVIDE(mbedtls_internal_aes_encrypt = 0x0002e869); +PROVIDE(ethernet_mgmt_raise_carrier_on_event = 0x00020ee9); +PROVIDE(net_tcp_conn_sem_get = 0x00044487); +PROVIDE(mbedtls_x509_get_serial = 0x000349d9); +PROVIDE(listen = 0x0003f563); +PROVIDE(net_eth_carrier_off = 0x00040ef7); +PROVIDE(z_shell_op_cursor_vert_move = 0x00016549); +PROVIDE(usbd_register_all_classes = 0x0001aba1); +PROVIDE(mbedtls_pk_decrypt = 0x00034765); +PROVIDE(net_buf_alloc_len = 0x000184e9); +PROVIDE(mbedtls_mpi_core_read_be = 0x000473a3); +PROVIDE(zvfs_free_fd = 0x0003d64d); +PROVIDE(ztls_close_ctx = 0x0001f039); +PROVIDE(mbedtls_ssl_session_reset_int = 0x00049b93); +PROVIDE(credentials_lock = 0x00020641); +PROVIDE(mbedtls_md5_starts = 0x0002ffc9); +PROVIDE(mbedtls_ssl_ciphersuite_from_string = 0x00035dc9); PROVIDE(__aeabi_cdcmple = 0x00010a4d); -PROVIDE(net_pkt_get_data = 0x00042fc3); -PROVIDE(mbedtls_pk_encrypt = 0x00034575); -PROVIDE(crc16_reflect = 0x0003cc6f); -PROVIDE(mbedtls_pk_verify_ext = 0x0003459d); -PROVIDE(z_shell_history_init = 0x0003ee17); -PROVIDE(tanl = 0x00012191); -PROVIDE(z_impl_k_timer_status_sync = 0x0003adcd); -PROVIDE(llext_call_fn = 0x00040083); -PROVIDE(udc_shutdown = 0x00045119); -PROVIDE(abort = 0x00017ca1); -PROVIDE(usbd_class_desc_len = 0x0003fad9); -PROVIDE(net_pkt_get_reserve_rx_data = 0x00022cd1); -PROVIDE(fs_seek = 0x00018ee9); -PROVIDE(mbedtls_md5_finish = 0x000485f5); -PROVIDE(dns_resolve_cancel = 0x00044a17); -PROVIDE(HW_SCE_SelfCheck1Sub = 0x0002c2c5); -PROVIDE(dns_msg_pack_qname = 0x00044563); -PROVIDE(R_SCI_UART_BaudCalculate = 0x00029ed1); -PROVIDE(is_ptr = 0x0003d39b); -PROVIDE(net_tx_priority2tc = 0x00043025); -PROVIDE(arch_irq_unlock_outlined = 0x0003f071); -PROVIDE(mbedtls_base64_decode = 0x0002ed99); -PROVIDE(__wrap_realloc = 0x00017d35); -PROVIDE(connect = 0x0003f347); -PROVIDE(fs_read = 0x00018e59); -PROVIDE(usbd_add_configuration = 0x0001a619); -PROVIDE(z_row_span_with_buffer_offsets_get = 0x0003e127); -PROVIDE(__pow5Factor = 0x0003c7c1); -PROVIDE(udc_ctrl_submit_s_in_status = 0x000451b3); -PROVIDE(char2hex = 0x0003d4a7); -PROVIDE(shell_thread = 0x00015f55); -PROVIDE(sys_clock_announce = 0x0003ab99); -PROVIDE(mbedtls_platform_set_calloc_free = 0x00030959); -PROVIDE(arch_system_halt = 0x00049b53); -PROVIDE(ethernet_init = 0x000207e1); -PROVIDE(pinctrl_lookup_state = 0x00045b2f); -PROVIDE(log_filter_get = 0x0001419d); -PROVIDE(mbedtls_ssl_check_cert_usage = 0x00038a35); -PROVIDE(mbedtls_mpi_core_from_mont_rep = 0x00047735); +PROVIDE(net_pkt_get_data = 0x000431db); +PROVIDE(mbedtls_pk_encrypt = 0x0003478d); +PROVIDE(crc16_reflect = 0x0003ce87); +PROVIDE(mbedtls_pk_verify_ext = 0x000347b5); +PROVIDE(z_shell_history_init = 0x0003f02f); +PROVIDE(tanl = 0x00012381); +PROVIDE(z_impl_k_timer_status_sync = 0x0003afe5); +PROVIDE(llext_call_fn = 0x0004029b); +PROVIDE(udc_shutdown = 0x00045331); +PROVIDE(abort = 0x00017e91); +PROVIDE(usbd_class_desc_len = 0x0003fcf1); +PROVIDE(net_pkt_get_reserve_rx_data = 0x00022ee9); +PROVIDE(fs_seek = 0x000190d9); +PROVIDE(mbedtls_md5_finish = 0x0004880d); +PROVIDE(dns_resolve_cancel = 0x00044c2f); +PROVIDE(HW_SCE_SelfCheck1Sub = 0x0002c4dd); +PROVIDE(dns_msg_pack_qname = 0x0004477b); +PROVIDE(R_SCI_UART_BaudCalculate = 0x0002a0e9); +PROVIDE(is_ptr = 0x0003d5b3); +PROVIDE(net_tx_priority2tc = 0x0004323d); +PROVIDE(arch_irq_unlock_outlined = 0x0003f289); +PROVIDE(mbedtls_base64_decode = 0x0002efb1); +PROVIDE(__wrap_realloc = 0x00017f25); +PROVIDE(connect = 0x0003f55f); +PROVIDE(fs_read = 0x00019049); +PROVIDE(usbd_add_configuration = 0x0001a809); +PROVIDE(z_row_span_with_buffer_offsets_get = 0x0003e33f); +PROVIDE(__pow5Factor = 0x0003c9d9); +PROVIDE(udc_ctrl_submit_s_in_status = 0x000453cb); +PROVIDE(char2hex = 0x0003d6bf); +PROVIDE(shell_thread = 0x00016145); +PROVIDE(sys_clock_announce = 0x0003adb1); +PROVIDE(mbedtls_platform_set_calloc_free = 0x00030b71); +PROVIDE(arch_system_halt = 0x00049d6b); +PROVIDE(ethernet_init = 0x000209d1); +PROVIDE(pinctrl_lookup_state = 0x00045d47); +PROVIDE(log_filter_get = 0x0001438d); +PROVIDE(mbedtls_ssl_check_cert_usage = 0x00038c4d); +PROVIDE(mbedtls_mpi_core_from_mont_rep = 0x0004794d); PROVIDE(__aeabi_fcmplt = 0x00010ed5); -PROVIDE(z_impl_k_queue_init = 0x0004a01f); -PROVIDE(mbedtls_ssl_pend_fatal_alert = 0x0004950d); -PROVIDE(net_context_unref = 0x00041efb); -PROVIDE(net_buf_unref = 0x000183f9); +PROVIDE(z_impl_k_queue_init = 0x0004a237); +PROVIDE(mbedtls_ssl_pend_fatal_alert = 0x00049725); +PROVIDE(net_context_unref = 0x00042113); +PROVIDE(net_buf_unref = 0x000185e9); PROVIDE(__aeabi_fadd = 0x00010c29); -PROVIDE(_exit = 0x00017c69); -PROVIDE(dns_dispatcher_unregister = 0x00026411); -PROVIDE(net_process_rx_packet = 0x0004129f); +PROVIDE(_exit = 0x00017e59); +PROVIDE(dns_dispatcher_unregister = 0x00026629); +PROVIDE(net_process_rx_packet = 0x000414b7); PROVIDE(__aeabi_ui2f = 0x00010d89); -PROVIDE(mbedtls_mpi_read_binary = 0x00047957); -PROVIDE(mbedtls_rsa_get_len = 0x00048911); +PROVIDE(mbedtls_mpi_read_binary = 0x00047b6f); +PROVIDE(mbedtls_rsa_get_len = 0x00048b29); PROVIDE(__aeabi_ui2d = 0x00010499); -PROVIDE(udc_ctrl_stage_is_status_in = 0x00045275); -PROVIDE(log_msg_get_source_id = 0x00014389); -PROVIDE(z_impl_k_pipe_init = 0x0004a6c3); -PROVIDE(z_log_msg_alloc = 0x0003d987); -PROVIDE(net_conn_update = 0x000233c9); -PROVIDE(_sin = 0x000120e9); -PROVIDE(mbedtls_ssl_add_hs_hdr_to_checksum = 0x0004963d); +PROVIDE(udc_ctrl_stage_is_status_in = 0x0004548d); +PROVIDE(log_msg_get_source_id = 0x00014579); +PROVIDE(z_impl_k_pipe_init = 0x0004a8db); +PROVIDE(z_log_msg_alloc = 0x0003db9f); +PROVIDE(net_conn_update = 0x000235e1); +PROVIDE(_sin = 0x000122d9); +PROVIDE(mbedtls_ssl_add_hs_hdr_to_checksum = 0x00049855); PROVIDE(__aeabi_dsub = 0x0001021d); -PROVIDE(R_SCI_UART_Close = 0x00029c75); +PROVIDE(R_SCI_UART_Close = 0x00029e8d); PROVIDE(__ltsf2 = 0x00010e41); -PROVIDE(mbedtls_cipher_update = 0x0002f555); -PROVIDE(R_ETHER_PHY_ChipInit = 0x000468d5); -PROVIDE(mbedtls_ssl_set_timer = 0x000493ab); -PROVIDE(mbedtls_mpi_shift_r = 0x000479c9); +PROVIDE(mbedtls_cipher_update = 0x0002f76d); +PROVIDE(R_ETHER_PHY_ChipInit = 0x00046aed); +PROVIDE(mbedtls_ssl_set_timer = 0x000495c3); +PROVIDE(mbedtls_mpi_shift_r = 0x00047be1); PROVIDE(vfscanf = 0x00000001); -PROVIDE(srandom = 0x0003b005); -PROVIDE(udc_get_ep_cfg = 0x00044c43); -PROVIDE(net_tcp_finalize = 0x00023c65); -PROVIDE(z_shell_vfprintf = 0x0003e7a3); -PROVIDE(net_udp_register = 0x000442af); -PROVIDE(udc_ep_buf_has_zlp = 0x00044d1d); -PROVIDE(k_thread_name_get = 0x0004a3db); -PROVIDE(z_impl_zsock_close = 0x000404a1); -PROVIDE(__printk_hook_install = 0x000138bd); -PROVIDE(net_pkt_rx_alloc_with_buffer = 0x00022f65); -PROVIDE(net_hostname_get = 0x0001cc49); -PROVIDE(net_icmpv4_init = 0x00023685); -PROVIDE(net_ipv4_input = 0x00043545); -PROVIDE(ether_eint_isr = 0x0002e12d); -PROVIDE(mbedtls_aes_crypt_ecb = 0x00046ca9); -PROVIDE(udc_buf_get_all = 0x00044cbf); -PROVIDE(R_ETHER_BufferRelease = 0x0002de7d); -PROVIDE(mbedtls_internal_md5_process = 0x0002fddd); -PROVIDE(mbedtls_mpi_shift_l = 0x0004798f); -PROVIDE(mbedtls_x509_get_sig = 0x00034a8d); -PROVIDE(printk = 0x0003d3ed); -PROVIDE(z_arm_exc_spurious = 0x00017909); -PROVIDE(R_USBD_EdptStall = 0x0002b8cd); -PROVIDE(net_pkt_get_contiguous_len = 0x00042f3b); -PROVIDE(tan = 0x00012191); -PROVIDE(mbedtls_ssl_set_calc_verify_md = 0x000387c9); -PROVIDE(mbedtls_asn1_get_bitstring = 0x00046f2f); -PROVIDE(net_if_ipv4_is_addr_bcast = 0x00021615); -PROVIDE(z_impl_k_queue_alloc_prepend = 0x0004a0e1); +PROVIDE(srandom = 0x0003b21d); +PROVIDE(udc_get_ep_cfg = 0x00044e5b); +PROVIDE(net_tcp_finalize = 0x00023e7d); +PROVIDE(z_shell_vfprintf = 0x0003e9bb); +PROVIDE(net_udp_register = 0x000444c7); +PROVIDE(udc_ep_buf_has_zlp = 0x00044f35); +PROVIDE(k_thread_name_get = 0x0004a5f3); +PROVIDE(z_impl_zsock_close = 0x000406b9); +PROVIDE(__printk_hook_install = 0x00013aad); +PROVIDE(net_pkt_rx_alloc_with_buffer = 0x0002317d); +PROVIDE(net_hostname_get = 0x0001ce39); +PROVIDE(net_icmpv4_init = 0x0002389d); +PROVIDE(net_ipv4_input = 0x0004375d); +PROVIDE(ether_eint_isr = 0x0002e345); +PROVIDE(mbedtls_aes_crypt_ecb = 0x00046ec1); +PROVIDE(udc_buf_get_all = 0x00044ed7); +PROVIDE(R_ETHER_BufferRelease = 0x0002e095); +PROVIDE(mbedtls_internal_md5_process = 0x0002fff5); +PROVIDE(mbedtls_mpi_shift_l = 0x00047ba7); +PROVIDE(mbedtls_x509_get_sig = 0x00034ca5); +PROVIDE(printk = 0x0003d605); +PROVIDE(z_arm_exc_spurious = 0x00017af9); +PROVIDE(R_USBD_EdptStall = 0x0002bae5); +PROVIDE(net_pkt_get_contiguous_len = 0x00043153); +PROVIDE(tan = 0x00012381); +PROVIDE(mbedtls_ssl_set_calc_verify_md = 0x000389e1); +PROVIDE(mbedtls_asn1_get_bitstring = 0x00047147); +PROVIDE(net_if_ipv4_is_addr_bcast = 0x0002182d); +PROVIDE(z_impl_k_queue_alloc_prepend = 0x0004a2f9); PROVIDE(__eqsf2 = 0x00010e49); -PROVIDE(R_BSP_SoftwareDelay = 0x00029aed); -PROVIDE(net_if_ipv4_addr_rm = 0x0004182d); -PROVIDE(z_impl_k_mutex_init = 0x00049eff); -PROVIDE(udc_register_ep = 0x00044c7b); -PROVIDE(mbedtls_cipher_free = 0x0002f429); -PROVIDE(z_impl_zsock_getsockopt = 0x0001d309); -PROVIDE(z_shell_print_stream = 0x0003e79f); -PROVIDE(z_shell_op_delete_from_cursor = 0x0003e6cb); -PROVIDE(z_arm_cpu_idle_init = 0x00017be9); +PROVIDE(R_BSP_SoftwareDelay = 0x00029d05); +PROVIDE(net_if_ipv4_addr_rm = 0x00041a45); +PROVIDE(z_impl_k_mutex_init = 0x0004a117); +PROVIDE(udc_register_ep = 0x00044e93); +PROVIDE(mbedtls_cipher_free = 0x0002f641); +PROVIDE(z_impl_zsock_getsockopt = 0x0001d4f9); +PROVIDE(z_shell_print_stream = 0x0003e9b7); +PROVIDE(z_shell_op_delete_from_cursor = 0x0003e8e3); +PROVIDE(z_arm_cpu_idle_init = 0x00017dd9); PROVIDE(__floatundidf = 0x00010521); -PROVIDE(z_impl_k_msgq_purge = 0x00049e69); -PROVIDE(net_pkt_set_data = 0x00042fff); -PROVIDE(net_context_get_option = 0x00022b81); -PROVIDE(udc_ctrl_stage_is_data_in = 0x00045259); -PROVIDE(R_FLASH_HP_Write = 0x000462b5); -PROVIDE(sys_clock_elapsed = 0x00029919); -PROVIDE(z_impl_k_poll_signal_init = 0x0004acc5); -PROVIDE(mbedtls_mpi_copy = 0x0004785b); -PROVIDE(net_socket_service_callback = 0x00040ac1); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXTIME_PARAM = 0x0002083d); -PROVIDE(mbedtls_x509_crt_init = 0x000492c9); -PROVIDE(net_pkt_read = 0x00042cd5); -PROVIDE(__file_str_put = 0x0004b387); -PROVIDE(mbedtls_mpi_gcd = 0x00048099); -PROVIDE(z_do_kernel_oops = 0x0003f005); -PROVIDE(net_context_get_local_addr = 0x00042675); +PROVIDE(z_impl_k_msgq_purge = 0x0004a081); +PROVIDE(net_pkt_set_data = 0x00043217); +PROVIDE(net_context_get_option = 0x00022d99); +PROVIDE(udc_ctrl_stage_is_data_in = 0x00045471); +PROVIDE(R_FLASH_HP_Write = 0x000464cd); +PROVIDE(sys_clock_elapsed = 0x00029b31); +PROVIDE(z_impl_k_poll_signal_init = 0x0004aedd); +PROVIDE(mbedtls_mpi_copy = 0x00047a73); +PROVIDE(net_socket_service_callback = 0x00040cd9); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXTIME_PARAM = 0x00020a2d); +PROVIDE(mbedtls_x509_crt_init = 0x000494e1); +PROVIDE(net_pkt_read = 0x00042eed); +PROVIDE(__file_str_put = 0x0004b59f); +PROVIDE(mbedtls_mpi_gcd = 0x000482b1); +PROVIDE(z_do_kernel_oops = 0x0003f21d); +PROVIDE(net_context_get_local_addr = 0x0004288d); PROVIDE(__floatsisf = 0x00010d91); -PROVIDE(z_impl_k_thread_name_set = 0x00039cdd); -PROVIDE(z_impl_zsock_connect = 0x0001cfdd); -PROVIDE(udc_ep_buf_alloc = 0x0002715d); -PROVIDE(credential_get = 0x000203f1); -PROVIDE(udc_init = 0x000450bb); -PROVIDE(pinctrl_configure_pins = 0x00028c35); -PROVIDE(z_impl_log_filter_set = 0x0003d98f); -PROVIDE(ring_buf_area_claim = 0x0003d7ad); -PROVIDE(z_thread_monitor_exit = 0x0003a931); -PROVIDE(srand = 0x0004ae79); -PROVIDE(mbedtls_ct_memcpy_offset = 0x0002f975); -PROVIDE(mbedtls_x509_get_alg = 0x000490e1); -PROVIDE(z_impl_k_queue_get = 0x00039625); -PROVIDE(net_context_init = 0x00022cc1); -PROVIDE(shell_help = 0x0003e05d); -PROVIDE(mbedtls_mpi_inv_mod = 0x000481c1); -PROVIDE(z_data_copy = 0x0003a9e9); -PROVIDE(net_buf_frag_add = 0x0003f3cd); -PROVIDE(net_arp_update = 0x00021015); -PROVIDE(net_udp_input = 0x000256c5); -PROVIDE(mbedtls_cipher_finish = 0x0002f709); -PROVIDE(z_impl_k_msgq_put = 0x0003930d); -PROVIDE(R_BSP_IrqStatusClear = 0x00029be1); -PROVIDE(mbedtls_oid_get_oid_by_md = 0x00030901); -PROVIDE(net_if_need_calc_rx_checksum = 0x00041979); -PROVIDE(net_if_ipv4_addr_get_first_by_index = 0x00041629); -PROVIDE(snprintf = 0x0003b1f5); -PROVIDE(z_impl_k_thread_priority_get = 0x0004a3d5); -PROVIDE(dns_resolve_get_default = 0x00026fbd); +PROVIDE(z_impl_k_thread_name_set = 0x00039ef5); +PROVIDE(z_impl_zsock_connect = 0x0001d1cd); +PROVIDE(udc_ep_buf_alloc = 0x00027375); +PROVIDE(credential_get = 0x000205e1); +PROVIDE(udc_init = 0x000452d3); +PROVIDE(pinctrl_configure_pins = 0x00028e4d); +PROVIDE(z_impl_log_filter_set = 0x0003dba7); +PROVIDE(ring_buf_area_claim = 0x0003d9c5); +PROVIDE(z_thread_monitor_exit = 0x0003ab49); +PROVIDE(srand = 0x0004b091); +PROVIDE(mbedtls_ct_memcpy_offset = 0x0002fb8d); +PROVIDE(mbedtls_x509_get_alg = 0x000492f9); +PROVIDE(z_impl_k_queue_get = 0x0003983d); +PROVIDE(net_context_init = 0x00022ed9); +PROVIDE(shell_help = 0x0003e275); +PROVIDE(mbedtls_mpi_inv_mod = 0x000483d9); +PROVIDE(z_data_copy = 0x0003ac01); +PROVIDE(net_buf_frag_add = 0x0003f5e5); +PROVIDE(net_arp_update = 0x00021205); +PROVIDE(net_udp_input = 0x000258dd); +PROVIDE(mbedtls_cipher_finish = 0x0002f921); +PROVIDE(z_impl_k_msgq_put = 0x00039525); +PROVIDE(R_BSP_IrqStatusClear = 0x00029df9); +PROVIDE(mbedtls_oid_get_oid_by_md = 0x00030b19); +PROVIDE(net_if_need_calc_rx_checksum = 0x00041b91); +PROVIDE(net_if_ipv4_addr_get_first_by_index = 0x00041841); +PROVIDE(snprintf = 0x0003b40d); +PROVIDE(z_impl_k_thread_priority_get = 0x0004a5ed); +PROVIDE(dns_resolve_get_default = 0x000271d5); PROVIDE(__gtdf2 = 0x000109b1); -PROVIDE(cosl = 0x00011c49); -PROVIDE(mbedtls_ssl_parse_certificate = 0x00038ba5); -PROVIDE(k_queue_prepend = 0x0004a0b9); -PROVIDE(zsock_sendmsg_ctx = 0x0001dbb5); -PROVIDE(net_calc_chksum_ipv4 = 0x00041d3f); -PROVIDE(mbedtls_ssl_check_timer = 0x000493b9); -PROVIDE(net_dhcpv4_start = 0x00044517); -PROVIDE(R_ETHER_PHY_LinkPartnerAbilityGet = 0x00046929); -PROVIDE(isprint = 0x0004adff); -PROVIDE(net_buf_simple_add_le16 = 0x0003f493); -PROVIDE(usbd_config_get_current = 0x0003fa59); -PROVIDE(dns_unpack_response_query = 0x00044715); -PROVIDE(mbedtls_memory_buffer_alloc_init = 0x00030805); -PROVIDE(z_work_submit_to_queue = 0x0004a311); -PROVIDE(R_IIC_MASTER_SlaveAddressSet = 0x00046335); -PROVIDE(usbd_class_get_by_iface = 0x0003fb19); -PROVIDE(mbedtls_pk_sign_restartable = 0x000344f1); -PROVIDE(llext_adjust_mmu_permissions = 0x000400ff); -PROVIDE(mbedtls_mpi_core_add = 0x00047321); -PROVIDE(mbedtls_asn1_get_sequence_of = 0x0002ed39); -PROVIDE(mbedtls_ssl_pk_alg_from_sig = 0x00049973); +PROVIDE(cosl = 0x00011e39); +PROVIDE(mbedtls_ssl_parse_certificate = 0x00038dbd); +PROVIDE(k_queue_prepend = 0x0004a2d1); +PROVIDE(zsock_sendmsg_ctx = 0x0001dda5); +PROVIDE(net_calc_chksum_ipv4 = 0x00041f57); +PROVIDE(mbedtls_ssl_check_timer = 0x000495d1); +PROVIDE(net_dhcpv4_start = 0x0004472f); +PROVIDE(R_ETHER_PHY_LinkPartnerAbilityGet = 0x00046b41); +PROVIDE(isprint = 0x0004b017); +PROVIDE(net_buf_simple_add_le16 = 0x0003f6ab); +PROVIDE(usbd_config_get_current = 0x0003fc71); +PROVIDE(dns_unpack_response_query = 0x0004492d); +PROVIDE(mbedtls_memory_buffer_alloc_init = 0x00030a1d); +PROVIDE(z_work_submit_to_queue = 0x0004a529); +PROVIDE(R_IIC_MASTER_SlaveAddressSet = 0x0004654d); +PROVIDE(usbd_class_get_by_iface = 0x0003fd31); +PROVIDE(mbedtls_pk_sign_restartable = 0x00034709); +PROVIDE(llext_adjust_mmu_permissions = 0x00040317); +PROVIDE(mbedtls_mpi_core_add = 0x00047539); +PROVIDE(mbedtls_asn1_get_sequence_of = 0x0002ef51); +PROVIDE(mbedtls_ssl_pk_alg_from_sig = 0x00049b8b); PROVIDE(CONFIG_SYS_HASH_FUNC32_CHOICE_MURMUR3 = 0x00000001); -PROVIDE(mbedtls_ssl_reset_checksum = 0x00049661); -PROVIDE(mbedtls_ssl_session_load = 0x00037fb1); -PROVIDE(net_pkt_cursor_init = 0x00042c0b); -PROVIDE(z_init_static = 0x00049bb1); -PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x00045a6b); -PROVIDE(net_mgmt_event_init = 0x00022585); -PROVIDE(ztls_recvfrom_ctx = 0x0001f265); +PROVIDE(mbedtls_ssl_reset_checksum = 0x00049879); +PROVIDE(mbedtls_ssl_session_load = 0x000381c9); +PROVIDE(net_pkt_cursor_init = 0x00042e23); +PROVIDE(z_init_static = 0x00049dc9); +PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x00045c83); +PROVIDE(net_mgmt_event_init = 0x0002279d); +PROVIDE(ztls_recvfrom_ctx = 0x0001f455); PROVIDE(__aeabi_fcmple = 0x00010ee9); -PROVIDE(z_impl_k_thread_abort = 0x00017961); -PROVIDE(mbedtls_md_get_type = 0x0004855b); -PROVIDE(net_icmpv4_finalize = 0x000431e3); -PROVIDE(shell_fprintf_impl = 0x0003df8d); -PROVIDE(R_ETHER_PHY_Write = 0x0004676d); -PROVIDE(usbd_interface_shutdown = 0x0003fb79); -PROVIDE(llext_by_name = 0x0001b66d); +PROVIDE(z_impl_k_thread_abort = 0x00017b51); +PROVIDE(mbedtls_md_get_type = 0x00048773); +PROVIDE(net_icmpv4_finalize = 0x000433fb); +PROVIDE(shell_fprintf_impl = 0x0003e1a5); +PROVIDE(R_ETHER_PHY_Write = 0x00046985); +PROVIDE(usbd_interface_shutdown = 0x0003fd91); +PROVIDE(llext_by_name = 0x0001b85d); PROVIDE(__ltdf2 = 0x000109b9); -PROVIDE(credential_next_get = 0x0002041d); -PROVIDE(mbedtls_ssl_config_defaults = 0x000380d1); -PROVIDE(__d_vfprintf = 0x0003b8fd); -PROVIDE(mbedtls_free = 0x0003094d); -PROVIDE(net_conn_register = 0x0002312d); -PROVIDE(shell_process = 0x00015899); +PROVIDE(credential_next_get = 0x0002060d); +PROVIDE(mbedtls_ssl_config_defaults = 0x000382e9); +PROVIDE(__d_vfprintf = 0x0003bb15); +PROVIDE(mbedtls_free = 0x00030b65); +PROVIDE(net_conn_register = 0x00023345); +PROVIDE(shell_process = 0x00015a89); PROVIDE(CONFIG_LOG_FUNC_NAME_PREFIX_DBG = 0x00000001); -PROVIDE(z_reset_time_slice = 0x0003a881); -PROVIDE(mbedtls_sha512_clone = 0x00048c81); -PROVIDE(z_impl_k_thread_priority_set = 0x0003a379); -PROVIDE(cos = 0x00011c49); +PROVIDE(z_reset_time_slice = 0x0003aa99); +PROVIDE(mbedtls_sha512_clone = 0x00048e99); +PROVIDE(z_impl_k_thread_priority_set = 0x0003a591); +PROVIDE(cos = 0x00011e39); PROVIDE(strcmp = 0x0001105d); -PROVIDE(z_setup_new_thread = 0x00039d81); +PROVIDE(z_setup_new_thread = 0x00039f99); PROVIDE(__lesf2 = 0x00010e41); -PROVIDE(z_shell_op_cursor_horiz_move = 0x00016385); -PROVIDE(usbd_ep_buf_free = 0x0003fd51); -PROVIDE(mbedtls_sha512_update = 0x00048c8b); -PROVIDE(mbedtls_pk_init = 0x00049017); -PROVIDE(z_impl_k_thread_create = 0x00039e55); -PROVIDE(__umul128 = 0x0004b1e1); -PROVIDE(z_impl_zsock_bind = 0x0001cf85); -PROVIDE(HW_SCE_p_func102 = 0x0002c1a5); -PROVIDE(arch_cpu_idle = 0x0003f07f); -PROVIDE(z_impl_log_frontend_filter_set = 0x0003d99f); -PROVIDE(z_impl_k_sleep = 0x0004a57f); -PROVIDE(mbedtls_rsa_import_raw = 0x0004887f); -PROVIDE(ethernet_mgmt_raise_carrier_off_event = 0x00020d09); -PROVIDE(mbedtls_ssl_config_init = 0x00049925); -PROVIDE(udc_ctrl_stage_is_data_out = 0x0004524b); -PROVIDE(sys_heap_init = 0x0003d289); -PROVIDE(net_buf_alloc_fixed = 0x0003f3a3); -PROVIDE(usbd_ep_enable = 0x0003fcb5); -PROVIDE(mbedtls_md5_clone = 0x00048579); -PROVIDE(z_shell_fprintf = 0x0003e7ef); -PROVIDE(udc_ep_clear_halt = 0x00044ee1); -PROVIDE(zsock_recvfrom_ctx = 0x0001e1b1); -PROVIDE(ztls_sendto_ctx = 0x0001f119); -PROVIDE(mbedtls_ssl_session_copy = 0x00037ef9); -PROVIDE(HW_SCE_p_func101 = 0x0002c155); -PROVIDE(HW_SCE_p_func103 = 0x0002c1ed); -PROVIDE(mbedtls_rsa_get_bitlen = 0x0004890b); -PROVIDE(net_if_up = 0x00021c0d); -PROVIDE(net_if_config_ipv4_get = 0x000215ad); -PROVIDE(mbedtls_cipher_setkey = 0x0002f4a1); -PROVIDE(HW_SCE_p_func100 = 0x0002c105); -PROVIDE(z_impl_zsock_inet_pton = 0x000404a5); -PROVIDE(R_IIC_MASTER_Open = 0x0002a7f1); -PROVIDE(usbd_ep_enqueue = 0x0003fd21); -PROVIDE(mbedtls_ct_memcmp = 0x000484a9); -PROVIDE(net_tcp_endpoint_copy = 0x00043b8f); -PROVIDE(mbedtls_mpi_mul_int = 0x00047dd3); -PROVIDE(z_impl_k_queue_peek_head = 0x0004a113); -PROVIDE(net_conn_unregister = 0x00023351); -PROVIDE(memset = 0x0004ad8f); +PROVIDE(z_shell_op_cursor_horiz_move = 0x00016575); +PROVIDE(usbd_ep_buf_free = 0x0003ff69); +PROVIDE(mbedtls_sha512_update = 0x00048ea3); +PROVIDE(mbedtls_pk_init = 0x0004922f); +PROVIDE(z_impl_k_thread_create = 0x0003a06d); +PROVIDE(__umul128 = 0x0004b3f9); +PROVIDE(z_impl_zsock_bind = 0x0001d175); +PROVIDE(HW_SCE_p_func102 = 0x0002c3bd); +PROVIDE(arch_cpu_idle = 0x0003f297); +PROVIDE(z_impl_log_frontend_filter_set = 0x0003dbb7); +PROVIDE(z_impl_k_sleep = 0x0004a797); +PROVIDE(mbedtls_rsa_import_raw = 0x00048a97); +PROVIDE(ethernet_mgmt_raise_carrier_off_event = 0x00020ef9); +PROVIDE(mbedtls_ssl_config_init = 0x00049b3d); +PROVIDE(udc_ctrl_stage_is_data_out = 0x00045463); +PROVIDE(sys_heap_init = 0x0003d4a1); +PROVIDE(net_buf_alloc_fixed = 0x0003f5bb); +PROVIDE(usbd_ep_enable = 0x0003fecd); +PROVIDE(mbedtls_md5_clone = 0x00048791); +PROVIDE(z_shell_fprintf = 0x0003ea07); +PROVIDE(udc_ep_clear_halt = 0x000450f9); +PROVIDE(zsock_recvfrom_ctx = 0x0001e3a1); +PROVIDE(ztls_sendto_ctx = 0x0001f309); +PROVIDE(mbedtls_ssl_session_copy = 0x00038111); +PROVIDE(HW_SCE_p_func101 = 0x0002c36d); +PROVIDE(HW_SCE_p_func103 = 0x0002c405); +PROVIDE(mbedtls_rsa_get_bitlen = 0x00048b23); +PROVIDE(net_if_up = 0x00021e25); +PROVIDE(net_if_config_ipv4_get = 0x000217c5); +PROVIDE(mbedtls_cipher_setkey = 0x0002f6b9); +PROVIDE(HW_SCE_p_func100 = 0x0002c31d); +PROVIDE(z_impl_zsock_inet_pton = 0x000406bd); +PROVIDE(R_IIC_MASTER_Open = 0x0002aa09); +PROVIDE(usbd_ep_enqueue = 0x0003ff39); +PROVIDE(mbedtls_ct_memcmp = 0x000486c1); +PROVIDE(net_tcp_endpoint_copy = 0x00043da7); +PROVIDE(mbedtls_mpi_mul_int = 0x00047feb); +PROVIDE(z_impl_k_queue_peek_head = 0x0004a32b); +PROVIDE(net_conn_unregister = 0x00023569); +PROVIDE(memset = 0x0004afa7); PROVIDE(__gedf2 = 0x000109b1); -PROVIDE(net_context_get = 0x00022755); +PROVIDE(net_context_get = 0x0002296d); PROVIDE(__floatdisf = 0x00010dbd); -PROVIDE(k_thread_foreach = 0x0003a96d); -PROVIDE(net_mgmt_event_wait_on_iface = 0x00041e53); -PROVIDE(__do_global_ctors_aux = 0x000391fd); -PROVIDE(net_arp_prepare = 0x00020de9); -PROVIDE(z_time_slice = 0x0003a8d1); -PROVIDE(mbedtls_rsa_check_privkey = 0x000313c1); +PROVIDE(k_thread_foreach = 0x0003ab85); +PROVIDE(net_mgmt_event_wait_on_iface = 0x0004206b); +PROVIDE(__do_global_ctors_aux = 0x00039415); +PROVIDE(net_arp_prepare = 0x00020fd9); +PROVIDE(z_time_slice = 0x0003aae9); +PROVIDE(mbedtls_rsa_check_privkey = 0x000315d9); PROVIDE(__aeabi_ddiv = 0x000107e1); -PROVIDE(mbedtls_aes_setkey_enc = 0x0002e38d); -PROVIDE(net_pkt_remaining_data = 0x00042da1); -PROVIDE(mbedtls_md_finish = 0x0002fb85); -PROVIDE(recvfrom = 0x0003f35f); -PROVIDE(mbedtls_x509_get_ns_cert_type = 0x00034b51); -PROVIDE(z_irq_spurious = 0x0003f063); -PROVIDE(mbedtls_asn1_get_len = 0x00046dd5); -PROVIDE(renesas_ra_eth_init = 0x00027a8d); -PROVIDE(z_shell_op_cursor_word_move = 0x0003e607); -PROVIDE(k_is_in_isr = 0x0004a3c9); -PROVIDE(net_pkt_ref = 0x00042ab9); -PROVIDE(__kernel_rem_pio2 = 0x00012391); -PROVIDE(z_arm_int_exit = 0x00017275); -PROVIDE(mbedtls_mpi_write_binary = 0x00047983); -PROVIDE(usbd_handle_ctrl_xfer = 0x0001946d); -PROVIDE(_ConfigAbsSyms = 0x0003d911); -PROVIDE(udc_submit_ep_event = 0x00044d47); -PROVIDE(ring_buf_put = 0x0003d84b); -PROVIDE(arm_irq_enable = 0x00017a6d); -PROVIDE(R_ETHER_PHY_StartAutoNegotiate = 0x00046873); +PROVIDE(mbedtls_aes_setkey_enc = 0x0002e5a5); +PROVIDE(net_pkt_remaining_data = 0x00042fb9); +PROVIDE(mbedtls_md_finish = 0x0002fd9d); +PROVIDE(recvfrom = 0x0003f577); +PROVIDE(mbedtls_x509_get_ns_cert_type = 0x00034d69); +PROVIDE(z_irq_spurious = 0x0003f27b); +PROVIDE(mbedtls_asn1_get_len = 0x00046fed); +PROVIDE(renesas_ra_eth_init = 0x00027ca5); +PROVIDE(z_shell_op_cursor_word_move = 0x0003e81f); +PROVIDE(k_is_in_isr = 0x0004a5e1); +PROVIDE(net_pkt_ref = 0x00042cd1); +PROVIDE(__kernel_rem_pio2 = 0x00012581); +PROVIDE(z_arm_int_exit = 0x00017465); +PROVIDE(mbedtls_mpi_write_binary = 0x00047b9b); +PROVIDE(usbd_handle_ctrl_xfer = 0x0001965d); +PROVIDE(_ConfigAbsSyms = 0x0003db29); +PROVIDE(udc_submit_ep_event = 0x00044f5f); +PROVIDE(ring_buf_put = 0x0003da63); +PROVIDE(arm_irq_enable = 0x00017c5d); +PROVIDE(R_ETHER_PHY_StartAutoNegotiate = 0x00046a8b); PROVIDE(__extendsfdf2 = 0x000104dd); -PROVIDE(z_impl_k_timer_stop = 0x0004aa33); -PROVIDE(R_BSP_IrqClearPending = 0x00029bfd); +PROVIDE(z_impl_k_timer_stop = 0x0004ac4b); +PROVIDE(R_BSP_IrqClearPending = 0x00029e15); PROVIDE(CONFIG_SYS_HASH_FUNC32_MURMUR3 = 0x00000001); -PROVIDE(mbedtls_ssl_get_session = 0x00037f79); -PROVIDE(llext_buf_peek = 0x00040243); -PROVIDE(mbedtls_rsa_deduce_primes = 0x0003096d); -PROVIDE(__wrap_malloc = 0x00017d01); -PROVIDE(flash_area_read = 0x0003dbcd); -PROVIDE(z_impl_k_poll = 0x0003ae81); -PROVIDE(mbedtls_ssl_free = 0x00049893); -PROVIDE(mbedtls_ssl_session_reset_msg_layer = 0x00049711); -PROVIDE(z_impl_zvfs_poll = 0x0003f5e3); -PROVIDE(mbedtls_ssl_handshake_wrapup_free_hs_transform = 0x000499b5); -PROVIDE(mbedtls_mpi_size = 0x0004794b); -PROVIDE(sys_clock_cycle_get_32 = 0x00029955); -PROVIDE(mbedtls_asn1_free_named_data_list_shallow = 0x000470cf); +PROVIDE(mbedtls_ssl_get_session = 0x00038191); +PROVIDE(llext_buf_peek = 0x0004045b); +PROVIDE(mbedtls_rsa_deduce_primes = 0x00030b85); +PROVIDE(__wrap_malloc = 0x00017ef1); +PROVIDE(flash_area_read = 0x0003dde5); +PROVIDE(z_impl_k_poll = 0x0003b099); +PROVIDE(mbedtls_ssl_free = 0x00049aab); +PROVIDE(mbedtls_ssl_session_reset_msg_layer = 0x00049929); +PROVIDE(z_impl_zvfs_poll = 0x0003f7fb); +PROVIDE(mbedtls_ssl_handshake_wrapup_free_hs_transform = 0x00049bcd); +PROVIDE(mbedtls_mpi_size = 0x00047b63); +PROVIDE(sys_clock_cycle_get_32 = 0x00029b6d); +PROVIDE(mbedtls_asn1_free_named_data_list_shallow = 0x000472e7); PROVIDE(__fixdfdi = 0x00011091); -PROVIDE(shell_init = 0x0001614d); -PROVIDE(sys_heap_aligned_realloc = 0x0003d145); -PROVIDE(udc_buf_peek = 0x00044cf9); -PROVIDE(net_if_get_default = 0x00021545); +PROVIDE(shell_init = 0x0001633d); +PROVIDE(sys_heap_aligned_realloc = 0x0003d35d); +PROVIDE(udc_buf_peek = 0x00044f11); +PROVIDE(net_if_get_default = 0x0002175d); PROVIDE(__gtsf2 = 0x00010e39); -PROVIDE(mbedtls_sha512_finish = 0x00048d2d); -PROVIDE(HW_SCE_McuSpecificInit = 0x0002bfa5); -PROVIDE(mbedtls_internal_sha1_process = 0x00032459); -PROVIDE(R_SPI_Open = 0x0002a39d); -PROVIDE(__wrap_random = 0x0003afcd); -PROVIDE(__math_invalid = 0x000121f9); -PROVIDE(memmove = 0x0004ad5b); -PROVIDE(mbedtls_ssl_get_mode_from_transform = 0x0004979f); -PROVIDE(usbd_caps_speed = 0x0003f667); +PROVIDE(mbedtls_sha512_finish = 0x00048f45); +PROVIDE(HW_SCE_McuSpecificInit = 0x0002c1bd); +PROVIDE(mbedtls_internal_sha1_process = 0x00032671); +PROVIDE(R_SPI_Open = 0x0002a5b5); +PROVIDE(__wrap_random = 0x0003b1e5); +PROVIDE(__math_invalid = 0x000123e9); +PROVIDE(memmove = 0x0004af73); +PROVIDE(mbedtls_ssl_get_mode_from_transform = 0x000499b7); +PROVIDE(usbd_caps_speed = 0x0003f87f); PROVIDE(__nesf2 = 0x00010e49); -PROVIDE(iscntrl = 0x0004adc9); -PROVIDE(islower = 0x0004adf3); -PROVIDE(HW_SCE_p_func048 = 0x0002bff9); -PROVIDE(R_BSP_IrqCfg = 0x00029c21); -PROVIDE(mbedtls_ssl_verify_certificate = 0x00038aad); -PROVIDE(strcat = 0x0004aecd); -PROVIDE(net_pkt_copy = 0x00042cff); -PROVIDE(mbedtls_ssl_write_change_cipher_spec = 0x00049445); -PROVIDE(rand = 0x0004ae75); -PROVIDE(ether_configure_mac = 0x0002dfad); -PROVIDE(llext_file_offset = 0x0004018d); -PROVIDE(net_if_carrier_off = 0x000419c9); -PROVIDE(strncmp = 0x0004af05); -PROVIDE(mbedtls_ssl_tls12_get_preferred_hash_for_sig_alg = 0x00049a89); -PROVIDE(mbedtls_mpi_core_exp_mod_unsafe = 0x000476c1); -PROVIDE(z_impl_zsock_socket = 0x0001cecd); -PROVIDE(R_BSP_IrqDisable = 0x00029c55); -PROVIDE(usbd_interface_default = 0x0003fbcd); -PROVIDE(net_pkt_remove_tail = 0x00042bd5); -PROVIDE(recv = 0x0003f34f); -PROVIDE(net_buf_linearize = 0x0003f407); -PROVIDE(ldexpl = 0x0003cafd); -PROVIDE(__math_inexact64 = 0x0004b3bf); -PROVIDE(mbedtls_md_hmac_starts = 0x0002fc1d); -PROVIDE(mbedtls_md5_update = 0x00048583); -PROVIDE(isxdigit = 0x0004ae2b); -PROVIDE(udc_ctrl_submit_s_status = 0x000451ff); +PROVIDE(iscntrl = 0x0004afe1); +PROVIDE(islower = 0x0004b00b); +PROVIDE(HW_SCE_p_func048 = 0x0002c211); +PROVIDE(R_BSP_IrqCfg = 0x00029e39); +PROVIDE(mbedtls_ssl_verify_certificate = 0x00038cc5); +PROVIDE(strcat = 0x0004b0e5); +PROVIDE(net_pkt_copy = 0x00042f17); +PROVIDE(mbedtls_ssl_write_change_cipher_spec = 0x0004965d); +PROVIDE(rand = 0x0004b08d); +PROVIDE(ether_configure_mac = 0x0002e1c5); +PROVIDE(llext_file_offset = 0x000403a5); +PROVIDE(net_if_carrier_off = 0x00041be1); +PROVIDE(strncmp = 0x0004b11d); +PROVIDE(mbedtls_ssl_tls12_get_preferred_hash_for_sig_alg = 0x00049ca1); +PROVIDE(mbedtls_mpi_core_exp_mod_unsafe = 0x000478d9); +PROVIDE(z_impl_zsock_socket = 0x0001d0bd); +PROVIDE(R_BSP_IrqDisable = 0x00029e6d); +PROVIDE(usbd_interface_default = 0x0003fde5); +PROVIDE(net_pkt_remove_tail = 0x00042ded); +PROVIDE(recv = 0x0003f567); +PROVIDE(net_buf_linearize = 0x0003f61f); +PROVIDE(ldexpl = 0x0003cd15); +PROVIDE(__math_inexact64 = 0x0004b5d7); +PROVIDE(mbedtls_md_hmac_starts = 0x0002fe35); +PROVIDE(mbedtls_md5_update = 0x0004879b); +PROVIDE(isxdigit = 0x0004b043); +PROVIDE(udc_ctrl_submit_s_status = 0x00045417); PROVIDE(__aeabi_cdcmpeq = 0x00010a4d); -PROVIDE(__aeabi_memcpy4 = 0x0004ad41); -PROVIDE(net_hostname_init = 0x0001cc51); -PROVIDE(mbedtls_asn1_sequence_free = 0x0004702b); -PROVIDE(assert_post_action = 0x0003d439); -PROVIDE(z_arm_usage_fault = 0x00017909); -PROVIDE(net_tcp_set_option = 0x000441c3); -PROVIDE(mbedtls_rsa_pkcs1_verify = 0x00032251); +PROVIDE(__aeabi_memcpy4 = 0x0004af59); +PROVIDE(net_hostname_init = 0x0001ce41); +PROVIDE(mbedtls_asn1_sequence_free = 0x00047243); +PROVIDE(assert_post_action = 0x0003d651); +PROVIDE(z_arm_usage_fault = 0x00017af9); +PROVIDE(net_tcp_set_option = 0x000443db); +PROVIDE(mbedtls_rsa_pkcs1_verify = 0x00032469); PROVIDE(strcpy = 0x00011071); -PROVIDE(net_buf_frag_insert = 0x0003f3b7); -PROVIDE(mbedtls_asn1_get_bitstring_null = 0x00047003); -PROVIDE(z_shell_help_subcmd_print = 0x00016709); -PROVIDE(mbedtls_ssl_config_free = 0x0004992d); -PROVIDE(mbedtls_sha1_clone = 0x00048999); -PROVIDE(usbd_init_configurations = 0x0001a4b5); -PROVIDE(net_context_recv = 0x00022921); -PROVIDE(scalbnl = 0x0003cafd); -PROVIDE(net_if_ipv4_select_src_iface = 0x00041661); -PROVIDE(usbd_register_class = 0x0001a8e1); -PROVIDE(z_impl_k_stack_alloc_init = 0x0004a157); -PROVIDE(__aeabi_memcpy = 0x0004ad41); -PROVIDE(do_llext_load = 0x0001bab1); -PROVIDE(mbedtls_ssl_start_handshake_msg = 0x000493d3); -PROVIDE(__aeabi_memcpy8 = 0x0004ad41); +PROVIDE(net_buf_frag_insert = 0x0003f5cf); +PROVIDE(mbedtls_asn1_get_bitstring_null = 0x0004721b); +PROVIDE(z_shell_help_subcmd_print = 0x000168f9); +PROVIDE(mbedtls_ssl_config_free = 0x00049b45); +PROVIDE(mbedtls_sha1_clone = 0x00048bb1); +PROVIDE(usbd_init_configurations = 0x0001a6a5); +PROVIDE(net_context_recv = 0x00022b39); +PROVIDE(scalbnl = 0x0003cd15); +PROVIDE(net_if_ipv4_select_src_iface = 0x00041879); +PROVIDE(usbd_register_class = 0x0001aad1); +PROVIDE(z_impl_k_stack_alloc_init = 0x0004a36f); +PROVIDE(__aeabi_memcpy = 0x0004af59); +PROVIDE(do_llext_load = 0x0001bca1); +PROVIDE(mbedtls_ssl_start_handshake_msg = 0x000495eb); +PROVIDE(__aeabi_memcpy8 = 0x0004af59); PROVIDE(__aeabi_fcmpun = 0x00010f25); -PROVIDE(z_impl_k_msgq_get_attrs = 0x00049de3); +PROVIDE(z_impl_k_msgq_get_attrs = 0x00049ffb); PROVIDE(__aeabi_fsub = 0x00010c25); -PROVIDE(strrchr = 0x0004af61); -PROVIDE(z_thread_aligned_alloc = 0x0003af9d); -PROVIDE(udc_ctrl_stage_is_status_out = 0x00045267); -PROVIDE(net_pkt_memset = 0x00042cbf); -PROVIDE(z_impl_k_float_enable = 0x00049d4b); -PROVIDE(net_context_set_option = 0x00022a61); -PROVIDE(mbedtls_mpi_shrink = 0x000477f9); -PROVIDE(clock_gettime = 0x00018165); +PROVIDE(strrchr = 0x0004b179); +PROVIDE(z_thread_aligned_alloc = 0x0003b1b5); +PROVIDE(udc_ctrl_stage_is_status_out = 0x0004547f); +PROVIDE(net_pkt_memset = 0x00042ed7); +PROVIDE(z_impl_k_float_enable = 0x00049f63); +PROVIDE(net_context_set_option = 0x00022c79); +PROVIDE(mbedtls_mpi_shrink = 0x00047a11); +PROVIDE(clock_gettime = 0x00018355); PROVIDE(__atod_engine = 0x00011741); -PROVIDE(mbedtls_mpi_core_write_be = 0x000471d5); -PROVIDE(net_pkt_trim_buffer = 0x00042ba1); -PROVIDE(mbedtls_ssl_get_ciphersuite_sig_alg = 0x00049391); -PROVIDE(mbedtls_rsa_validate_params = 0x00030b55); -PROVIDE(z_shell_make_argv = 0x0003e169); -PROVIDE(__libc_fini_array = 0x0003cad1); -PROVIDE(net_if_is_wifi = 0x00021cd9); -PROVIDE(z_shell_history_get = 0x0003ecb9); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_DUPLEX = 0x0002083d); -PROVIDE(mbedtls_ssl_send_alert_message = 0x000366b1); -PROVIDE(mbedtls_asn1_get_bool = 0x00046ecf); -PROVIDE(mbedtls_md_hmac_update = 0x0002fd11); -PROVIDE(log_source_id_get = 0x00014079); -PROVIDE(ztls_sendmsg_ctx = 0x0001f1f1); -PROVIDE(usbd_msg_register_cb = 0x0003fdb9); +PROVIDE(mbedtls_mpi_core_write_be = 0x000473ed); +PROVIDE(net_pkt_trim_buffer = 0x00042db9); +PROVIDE(mbedtls_ssl_get_ciphersuite_sig_alg = 0x000495a9); +PROVIDE(mbedtls_rsa_validate_params = 0x00030d6d); +PROVIDE(z_shell_make_argv = 0x0003e381); +PROVIDE(__libc_fini_array = 0x0003cce9); +PROVIDE(net_if_is_wifi = 0x00021ef1); +PROVIDE(z_shell_history_get = 0x0003eed1); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_DUPLEX = 0x00020a2d); +PROVIDE(mbedtls_ssl_send_alert_message = 0x000368c9); +PROVIDE(mbedtls_asn1_get_bool = 0x000470e7); +PROVIDE(mbedtls_md_hmac_update = 0x0002ff29); +PROVIDE(log_source_id_get = 0x00014269); +PROVIDE(ztls_sendmsg_ctx = 0x0001f3e1); +PROVIDE(usbd_msg_register_cb = 0x0003ffd1); PROVIDE(__aeabi_cdrcmple = 0x00010a3d); -PROVIDE(net_tcp_get = 0x00023a49); -PROVIDE(z_init_cpu = 0x000390c9); -PROVIDE(mbedtls_ssl_get_output_max_frag_len = 0x000497d5); -PROVIDE(net_context_put = 0x000228d1); -PROVIDE(mbedtls_pk_can_do = 0x0004903f); -PROVIDE(mbedtls_ct_memmove_left = 0x0002f8a9); -PROVIDE(tls_credential_add = 0x00020471); -PROVIDE(dns_resolve_init_default = 0x00026fc5); -PROVIDE(z_impl_log_process = 0x0003d983); -PROVIDE(R_FLASH_HP_Open = 0x0002a169); -PROVIDE(net_pkt_write = 0x00042f8d); -PROVIDE(sys_bitarray_free = 0x0003d741); -PROVIDE(z_SysNmiOnReset = 0x00016e55); -PROVIDE(net_if_ipv4_addr_add = 0x0002175d); -PROVIDE(net_tcp_reply_rst = 0x00043bf1); -PROVIDE(z_shell_history_put = 0x0003ed27); -PROVIDE(strnlen = 0x0004af49); -PROVIDE(net_eth_broadcast_addr = 0x000205f1); -PROVIDE(mbedtls_pk_get_bitlen = 0x00049067); -PROVIDE(isgraph = 0x0004ade7); -PROVIDE(z_impl_log_panic = 0x00013f45); -PROVIDE(net_buf_simple_add = 0x0003f465); +PROVIDE(net_tcp_get = 0x00023c61); +PROVIDE(z_init_cpu = 0x000392e1); +PROVIDE(mbedtls_ssl_get_output_max_frag_len = 0x000499ed); +PROVIDE(net_context_put = 0x00022ae9); +PROVIDE(mbedtls_pk_can_do = 0x00049257); +PROVIDE(mbedtls_ct_memmove_left = 0x0002fac1); +PROVIDE(tls_credential_add = 0x00020661); +PROVIDE(dns_resolve_init_default = 0x000271dd); +PROVIDE(atan2l = 0x00011c49); +PROVIDE(z_impl_log_process = 0x0003db9b); +PROVIDE(R_FLASH_HP_Open = 0x0002a381); +PROVIDE(net_pkt_write = 0x000431a5); +PROVIDE(sys_bitarray_free = 0x0003d959); +PROVIDE(z_SysNmiOnReset = 0x00017045); +PROVIDE(net_if_ipv4_addr_add = 0x00021975); +PROVIDE(net_tcp_reply_rst = 0x00043e09); +PROVIDE(z_shell_history_put = 0x0003ef3f); +PROVIDE(strnlen = 0x0004b161); +PROVIDE(net_eth_broadcast_addr = 0x000207e1); +PROVIDE(mbedtls_pk_get_bitlen = 0x0004927f); +PROVIDE(isgraph = 0x0004afff); +PROVIDE(z_impl_log_panic = 0x00014135); +PROVIDE(net_buf_simple_add = 0x0003f67d); PROVIDE(__aeabi_cfcmple = 0x00010eb1); -PROVIDE(net_if_ipv4_select_src_addr = 0x00021645); -PROVIDE(idle = 0x00049d53); -PROVIDE(net_dhcpv4_init = 0x00026179); -PROVIDE(net_context_ref = 0x00041ee7); -PROVIDE(net_ipv4_create = 0x00043495); -PROVIDE(mbedtls_mpi_cmp_mpi = 0x00047a39); -PROVIDE(z_shell_history_purge = 0x0003ed0f); -PROVIDE(R_ETHER_PHY_Open = 0x0002de31); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QAV_PARAM = 0x00020ab1); -PROVIDE(log_backend_disable = 0x0003d9cd); -PROVIDE(assert_print = 0x0003d44b); -PROVIDE(k_heap_aligned_alloc = 0x00049bd5); -PROVIDE(mbedtls_calloc = 0x00030941); -PROVIDE(usbd_is_suspended = 0x0003f6f7); -PROVIDE(z_column_span_with_buffer_offsets_get = 0x0003e109); -PROVIDE(net_if_recv_data = 0x00041883); -PROVIDE(z_impl_zsock_get_context_object = 0x00040491); -PROVIDE(llext_unload = 0x0001b809); -PROVIDE(fs_stat = 0x00019009); -PROVIDE(udc_ep_set_halt = 0x00044e89); -PROVIDE(z_impl_k_timer_status_get = 0x0004aa6b); -PROVIDE(z_shell_log_backend_disable = 0x0003ea6f); -PROVIDE(strtold = 0x0003b29d); -PROVIDE(net_pkt_get_reserve_tx_data = 0x00022cdd); -PROVIDE(k_heap_free = 0x00049c6b); -PROVIDE(mbedtls_mpi_sub_abs = 0x00047b89); -PROVIDE(z_shell_op_cursor_move = 0x0003e5b5); -PROVIDE(net_pkt_frag_unref = 0x00042ae3); -PROVIDE(z_timer_expiration_handler = 0x0003ac79); -PROVIDE(net_pkt_clone = 0x00042f35); -PROVIDE(usbd_msg_pub_simple = 0x0003fde5); +PROVIDE(net_if_ipv4_select_src_addr = 0x0002185d); +PROVIDE(idle = 0x00049f6b); +PROVIDE(net_dhcpv4_init = 0x00026391); +PROVIDE(net_context_ref = 0x000420ff); +PROVIDE(net_ipv4_create = 0x000436ad); +PROVIDE(mbedtls_mpi_cmp_mpi = 0x00047c51); +PROVIDE(z_shell_history_purge = 0x0003ef27); +PROVIDE(R_ETHER_PHY_Open = 0x0002e049); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QAV_PARAM = 0x00020ca1); +PROVIDE(log_backend_disable = 0x0003dbe5); +PROVIDE(assert_print = 0x0003d663); +PROVIDE(k_heap_aligned_alloc = 0x00049ded); +PROVIDE(mbedtls_calloc = 0x00030b59); +PROVIDE(usbd_is_suspended = 0x0003f90f); +PROVIDE(z_column_span_with_buffer_offsets_get = 0x0003e321); +PROVIDE(net_if_recv_data = 0x00041a9b); +PROVIDE(z_impl_zsock_get_context_object = 0x000406a9); +PROVIDE(llext_unload = 0x0001b9f9); +PROVIDE(fs_stat = 0x000191f9); +PROVIDE(udc_ep_set_halt = 0x000450a1); +PROVIDE(z_impl_k_timer_status_get = 0x0004ac83); +PROVIDE(z_shell_log_backend_disable = 0x0003ec87); +PROVIDE(strtold = 0x0003b4b5); +PROVIDE(net_pkt_get_reserve_tx_data = 0x00022ef5); +PROVIDE(k_heap_free = 0x00049e83); +PROVIDE(mbedtls_mpi_sub_abs = 0x00047da1); +PROVIDE(z_shell_op_cursor_move = 0x0003e7cd); +PROVIDE(net_pkt_frag_unref = 0x00042cfb); +PROVIDE(z_timer_expiration_handler = 0x0003ae91); +PROVIDE(net_pkt_clone = 0x0004314d); +PROVIDE(usbd_msg_pub_simple = 0x0003fffd); PROVIDE(__floatunsidf = 0x00010499); -PROVIDE(mbedtls_md_starts = 0x0002fae9); -PROVIDE(net_tc_tx_init = 0x00043029); -PROVIDE(mpsc_pbuf_init = 0x0003d465); +PROVIDE(mbedtls_md_starts = 0x0002fd01); +PROVIDE(net_tc_tx_init = 0x00043241); +PROVIDE(mpsc_pbuf_init = 0x0003d67d); PROVIDE(__floatundisf = 0x00010dad); -PROVIDE(__kernel_sin = 0x00012a49); -PROVIDE(z_abort_timeout = 0x0004a90b); -PROVIDE(open = 0x0003f305); +PROVIDE(__kernel_sin = 0x00012c39); +PROVIDE(z_abort_timeout = 0x0004ab23); +PROVIDE(open = 0x0003f51d); PROVIDE(__aeabi_f2d = 0x000104dd); -PROVIDE(R_ETHER_PHY_Close = 0x00046645); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_ADDRESS = 0x0002083d); -PROVIDE(mbedtls_ssl_get_max_out_record_payload = 0x00049807); -PROVIDE(net_context_packet_received = 0x000225c1); -PROVIDE(net_if_try_queue_tx = 0x00041895); -PROVIDE(z_impl_k_reschedule = 0x0003a3a5); -PROVIDE(z_reschedule = 0x0003a251); -PROVIDE(mbedtls_md_update = 0x0002fb31); -PROVIDE(mbedtls_pk_parse_subpubkey = 0x00034279); -PROVIDE(sys_heap_free = 0x0003cfcb); -PROVIDE(HW_SCE_LoadHukSub = 0x0002cce5); -PROVIDE(z_impl_net_if_ipv4_set_netmask_by_index = 0x000416e5); -PROVIDE(net_ipv4_broadcast_address = 0x00022289); -PROVIDE(udc_ep_enable_internal = 0x00027031); -PROVIDE(mbedtls_ssl_handshake_server_step = 0x00037115); -PROVIDE(net_arp_clear_pending = 0x0002124d); -PROVIDE(z_bss_zero = 0x000390b1); -PROVIDE(__math_oflow = 0x00012fd9); +PROVIDE(R_ETHER_PHY_Close = 0x0004685d); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_ADDRESS = 0x00020a2d); +PROVIDE(mbedtls_ssl_get_max_out_record_payload = 0x00049a1f); +PROVIDE(net_context_packet_received = 0x000227d9); +PROVIDE(net_if_try_queue_tx = 0x00041aad); +PROVIDE(z_impl_k_reschedule = 0x0003a5bd); +PROVIDE(z_reschedule = 0x0003a469); +PROVIDE(mbedtls_md_update = 0x0002fd49); +PROVIDE(mbedtls_pk_parse_subpubkey = 0x00034491); +PROVIDE(sys_heap_free = 0x0003d1e3); +PROVIDE(HW_SCE_LoadHukSub = 0x0002cefd); +PROVIDE(z_impl_net_if_ipv4_set_netmask_by_index = 0x000418fd); +PROVIDE(net_ipv4_broadcast_address = 0x000224a1); +PROVIDE(udc_ep_enable_internal = 0x00027249); +PROVIDE(mbedtls_ssl_handshake_server_step = 0x0003732d); +PROVIDE(net_arp_clear_pending = 0x0002143d); +PROVIDE(z_bss_zero = 0x000392c9); +PROVIDE(__math_oflow = 0x000131c9); PROVIDE(__aeabi_uidivmod = 0x000101d5); PROVIDE(__aeabi_d2uiz = 0x00010b3d); -PROVIDE(net_buf_id = 0x000182b1); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_LINK = 0x0002083d); -PROVIDE(net_recv_data = 0x000412ab); -PROVIDE(k_work_submit = 0x00039a65); -PROVIDE(z_shell_cursor_in_empty_line = 0x0003e51d); -PROVIDE(shell_get_return_value = 0x0003e089); -PROVIDE(net_context_bind = 0x00041f4d); -PROVIDE(net_if_ipv4_set_netmask_by_addr = 0x00041693); -PROVIDE(strstr = 0x0004af8d); -PROVIDE(usbd_ep_is_halted = 0x0003fda3); -PROVIDE(net_pkt_available_buffer = 0x00042b3f); -PROVIDE(net_icmpv4_input = 0x00043335); -PROVIDE(mbedtls_pk_free = 0x0004901f); -PROVIDE(regulator_set_voltage = 0x00045bff); -PROVIDE(vfprintf = 0x0003b8fd); -PROVIDE(mbedtls_rsa_validate_crt = 0x00030cd9); -PROVIDE(ZVFS_FD_ZERO = 0x0003f5f7); -PROVIDE(mbedtls_sha1_update = 0x000489a3); -PROVIDE(z_impl_k_sem_take = 0x000396fd); -PROVIDE(mbedtls_rsa_rsaes_oaep_decrypt = 0x00031c2d); -PROVIDE(net_if_addr_ref = 0x000417ff); +PROVIDE(net_buf_id = 0x000184a1); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_LINK = 0x00020a2d); +PROVIDE(net_recv_data = 0x000414c3); +PROVIDE(k_work_submit = 0x00039c7d); +PROVIDE(z_shell_cursor_in_empty_line = 0x0003e735); +PROVIDE(shell_get_return_value = 0x0003e2a1); +PROVIDE(net_context_bind = 0x00042165); +PROVIDE(net_if_ipv4_set_netmask_by_addr = 0x000418ab); +PROVIDE(strstr = 0x0004b1a5); +PROVIDE(usbd_ep_is_halted = 0x0003ffbb); +PROVIDE(net_pkt_available_buffer = 0x00042d57); +PROVIDE(net_icmpv4_input = 0x0004354d); +PROVIDE(mbedtls_pk_free = 0x00049237); +PROVIDE(regulator_set_voltage = 0x00045e17); +PROVIDE(vfprintf = 0x0003bb15); +PROVIDE(mbedtls_rsa_validate_crt = 0x00030ef1); +PROVIDE(ZVFS_FD_ZERO = 0x0003f80f); +PROVIDE(mbedtls_sha1_update = 0x00048bbb); +PROVIDE(z_impl_k_sem_take = 0x00039915); +PROVIDE(mbedtls_rsa_rsaes_oaep_decrypt = 0x00031e45); +PROVIDE(net_if_addr_ref = 0x00041a17); PROVIDE(__aeabi_fcmpeq = 0x00010ec1); -PROVIDE(zvfs_get_fd_obj = 0x000139a5); -PROVIDE(mbedtls_x509_get_key_usage = 0x000490ef); -PROVIDE(mbedtls_mpi_grow = 0x0004777b); -PROVIDE(ethernet_flags = 0x00040b87); -PROVIDE(mbedtls_x509_get_sig_alg = 0x00034ac5); -PROVIDE(z_thread_is_valid = 0x00014831); -PROVIDE(log_output_msg_process = 0x0003db63); -PROVIDE(change_endian_long = 0x00046641); -PROVIDE(mbedtls_ssl_get_bytes_avail = 0x00049497); -PROVIDE(net_tcp_put = 0x00023fa5); -PROVIDE(llext_buf_seek = 0x0004022f); -PROVIDE(log_set_timestamp_func = 0x00013ed5); -PROVIDE(udc_ep_buf_free = 0x00044fe1); -PROVIDE(mbedtls_internal_aes_decrypt = 0x0002e9c5); -PROVIDE(mbedtls_mpi_div_mpi = 0x0002f0cd); -PROVIDE(z_device_state_init = 0x00049aeb); -PROVIDE(mbedtls_sha512_free = 0x00048c77); -PROVIDE(mbedtls_aes_setkey_dec = 0x0002e541); -PROVIDE(regulator_set_current_limit = 0x00045c27); -PROVIDE(sys_heap_alloc = 0x0003cfef); +PROVIDE(zvfs_get_fd_obj = 0x00013b95); +PROVIDE(mbedtls_x509_get_key_usage = 0x00049307); +PROVIDE(mbedtls_mpi_grow = 0x00047993); +PROVIDE(ethernet_flags = 0x00040d9f); +PROVIDE(mbedtls_x509_get_sig_alg = 0x00034cdd); +PROVIDE(z_thread_is_valid = 0x00014a21); +PROVIDE(log_output_msg_process = 0x0003dd7b); +PROVIDE(change_endian_long = 0x00046859); +PROVIDE(mbedtls_ssl_get_bytes_avail = 0x000496af); +PROVIDE(net_tcp_put = 0x000241bd); +PROVIDE(llext_buf_seek = 0x00040447); +PROVIDE(log_set_timestamp_func = 0x000140c5); +PROVIDE(udc_ep_buf_free = 0x000451f9); +PROVIDE(mbedtls_internal_aes_decrypt = 0x0002ebdd); +PROVIDE(mbedtls_mpi_div_mpi = 0x0002f2e5); +PROVIDE(z_device_state_init = 0x00049d03); +PROVIDE(mbedtls_sha512_free = 0x00048e8f); +PROVIDE(mbedtls_aes_setkey_dec = 0x0002e759); +PROVIDE(regulator_set_current_limit = 0x00045e3f); +PROVIDE(sys_heap_alloc = 0x0003d207); PROVIDE(__floatunsisf = 0x00010d89); -PROVIDE(fs_sync = 0x00018fc1); -PROVIDE(net_if_try_send_data = 0x000418b5); -PROVIDE(arm_irq_disable = 0x00017a89); -PROVIDE(flash_area_erase = 0x0003dc21); -PROVIDE(mbedtls_rsa_pkcs1_encrypt = 0x00031bf9); -PROVIDE(mbedtls_ssl_transform_free = 0x000494a1); -PROVIDE(mbedtls_ssl_handshake_step = 0x00037e4d); -PROVIDE(z_impl_k_str_out = 0x000138c9); -PROVIDE(mbedtls_ssl_write_finished = 0x00049a1d); -PROVIDE(usbd_ep_dequeue = 0x0003fd57); -PROVIDE(net_ipv4_prepare_for_send = 0x000436e5); -PROVIDE(z_shell_log_backend_enable = 0x0003ea1d); -PROVIDE(mbedtls_platform_zeroize = 0x00030929); -PROVIDE(net_pkt_frag_insert = 0x00042b2b); -PROVIDE(mbedtls_ssl_flush_output = 0x000364d1); -PROVIDE(usbd_config_exist = 0x0003fa7d); -PROVIDE(R_IIC_MASTER_Read = 0x000463e9); -PROVIDE(udc_ctrl_alloc = 0x00044fdd); -PROVIDE(z_impl_net_if_ipv4_addr_rm_by_index = 0x00041871); -PROVIDE(mbedtls_x509_crt_parse_cn_inet_pton = 0x0004927f); -PROVIDE(z_shell_backend_rx_buffer_flush = 0x0003e8e9); -PROVIDE(ether_do_link = 0x00046bbb); -PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x0003dae3); -PROVIDE(mbedtls_zeroize_and_free = 0x00048695); -PROVIDE(mbedtls_rsa_rsaes_pkcs1_v15_encrypt = 0x00031b69); -PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x0003dad1); +PROVIDE(fs_sync = 0x000191b1); +PROVIDE(net_if_try_send_data = 0x00041acd); +PROVIDE(arm_irq_disable = 0x00017c79); +PROVIDE(flash_area_erase = 0x0003de39); +PROVIDE(mbedtls_rsa_pkcs1_encrypt = 0x00031e11); +PROVIDE(mbedtls_ssl_transform_free = 0x000496b9); +PROVIDE(mbedtls_ssl_handshake_step = 0x00038065); +PROVIDE(z_impl_k_str_out = 0x00013ab9); +PROVIDE(mbedtls_ssl_write_finished = 0x00049c35); +PROVIDE(usbd_ep_dequeue = 0x0003ff6f); +PROVIDE(net_ipv4_prepare_for_send = 0x000438fd); +PROVIDE(z_shell_log_backend_enable = 0x0003ec35); +PROVIDE(mbedtls_platform_zeroize = 0x00030b41); +PROVIDE(net_pkt_frag_insert = 0x00042d43); +PROVIDE(mbedtls_ssl_flush_output = 0x000366e9); +PROVIDE(usbd_config_exist = 0x0003fc95); +PROVIDE(R_IIC_MASTER_Read = 0x00046601); +PROVIDE(udc_ctrl_alloc = 0x000451f5); +PROVIDE(z_impl_net_if_ipv4_addr_rm_by_index = 0x00041a89); +PROVIDE(mbedtls_x509_crt_parse_cn_inet_pton = 0x00049497); +PROVIDE(z_shell_backend_rx_buffer_flush = 0x0003eb01); +PROVIDE(ether_do_link = 0x00046dd3); +PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x0003dcfb); +PROVIDE(mbedtls_zeroize_and_free = 0x000488ad); +PROVIDE(mbedtls_rsa_rsaes_pkcs1_v15_encrypt = 0x00031d81); +PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x0003dce9); PROVIDE(__aeabi_dcmpeq = 0x00010a5d); -PROVIDE(z_impl_k_stack_pop = 0x000397c9); -PROVIDE(net_if_mcast_mon_register = 0x00021569); -PROVIDE(zvfs_finalize_typed_fd = 0x00013b05); -PROVIDE(mbedtls_ssl_write_certificate = 0x000387f1); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXINJECTION_MODE = 0x00020ab1); -PROVIDE(ztls_getsockopt_ctx = 0x0001f38d); -PROVIDE(mbedtls_mpi_core_exp_mod = 0x000476a1); -PROVIDE(net_mgmt_event_wait = 0x00041e3b); -PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x0003daf7); -PROVIDE(udc_ctrl_stage_is_no_data = 0x00045283); -PROVIDE(iic_master_txi_isr = 0x0002a9f9); -PROVIDE(llext_load = 0x0001b73d); -PROVIDE(__start = 0x0001791d); -PROVIDE(z_stack_space_get = 0x0004a405); +PROVIDE(z_impl_k_stack_pop = 0x000399e1); +PROVIDE(net_if_mcast_mon_register = 0x00021781); +PROVIDE(zvfs_finalize_typed_fd = 0x00013cf5); +PROVIDE(mbedtls_ssl_write_certificate = 0x00038a09); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXINJECTION_MODE = 0x00020ca1); +PROVIDE(ztls_getsockopt_ctx = 0x0001f57d); +PROVIDE(mbedtls_mpi_core_exp_mod = 0x000478b9); +PROVIDE(net_mgmt_event_wait = 0x00042053); +PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x0003dd0f); +PROVIDE(udc_ctrl_stage_is_no_data = 0x0004549b); +PROVIDE(iic_master_txi_isr = 0x0002ac11); +PROVIDE(llext_load = 0x0001b92d); +PROVIDE(__start = 0x00017b0d); +PROVIDE(z_stack_space_get = 0x0004a61d); PROVIDE(__cmpsf2 = 0x00010e49); -PROVIDE(strchr = 0x0004aeeb); -PROVIDE(net_tcp_input = 0x00023cd5); -PROVIDE(mbedtls_ssl_close_notify = 0x00036a55); -PROVIDE(R_ETHER_PHY_LinkStatusGet = 0x000468ad); -PROVIDE(llext_iterate = 0x0001b6a5); -PROVIDE(dns_unpack_response_header = 0x00044653); -PROVIDE(net_context_connect = 0x000423a1); -PROVIDE(__stdout_hook_install = 0x00017c89); -PROVIDE(z_thread_timeout = 0x0004a515); -PROVIDE(inet_pton = 0x0003f337); -PROVIDE(net_context_sendmsg = 0x000425ab); -PROVIDE(mbedtls_rsa_check_pub_priv = 0x00031429); -PROVIDE(log_core_init = 0x00013ef5); +PROVIDE(strchr = 0x0004b103); +PROVIDE(net_tcp_input = 0x00023eed); +PROVIDE(mbedtls_ssl_close_notify = 0x00036c6d); +PROVIDE(R_ETHER_PHY_LinkStatusGet = 0x00046ac5); +PROVIDE(llext_iterate = 0x0001b895); +PROVIDE(dns_unpack_response_header = 0x0004486b); +PROVIDE(net_context_connect = 0x000425b9); +PROVIDE(__stdout_hook_install = 0x00017e79); +PROVIDE(z_thread_timeout = 0x0004a72d); +PROVIDE(inet_pton = 0x0003f54f); +PROVIDE(net_context_sendmsg = 0x000427c3); +PROVIDE(mbedtls_rsa_check_pub_priv = 0x00031641); +PROVIDE(log_core_init = 0x000140e5); PROVIDE(CONFIG_SYS_HASH_FUNC32 = 0x00000001); -PROVIDE(z_impl_zsock_getsockname = 0x0001d431); -PROVIDE(udc_ep_dequeue = 0x00044f9b); -PROVIDE(z_shell_help_cmd_print = 0x000167bd); -PROVIDE(z_early_memcpy = 0x00049b9b); -PROVIDE(zvfs_eventfd_read = 0x000187d1); -PROVIDE(socket_service_init = 0x0001f8ad); -PROVIDE(mbedtls_ssl_setup = 0x0003829d); -PROVIDE(usbd_class_get_by_ep = 0x0001a875); -PROVIDE(shell_vfprintf = 0x0003defb); -PROVIDE(arch_tls_stack_setup = 0x00016e5d); -PROVIDE(z_shell_fprintf_buffer_flush = 0x0003e0a9); -PROVIDE(mbedtls_rsa_public = 0x00031469); -PROVIDE(z_impl_net_if_ipv4_set_netmask_by_addr_by_index = 0x000416f5); -PROVIDE(udc_ctrl_submit_s_out_status = 0x00045167); -PROVIDE(zvfs_reserve_fd = 0x00013a85); -PROVIDE(z_sched_init = 0x0003a369); +PROVIDE(z_impl_zsock_getsockname = 0x0001d621); +PROVIDE(udc_ep_dequeue = 0x000451b3); +PROVIDE(z_shell_help_cmd_print = 0x000169ad); +PROVIDE(z_early_memcpy = 0x00049db3); +PROVIDE(zvfs_eventfd_read = 0x000189c1); +PROVIDE(socket_service_init = 0x0001fa9d); +PROVIDE(mbedtls_ssl_setup = 0x000384b5); +PROVIDE(usbd_class_get_by_ep = 0x0001aa65); +PROVIDE(shell_vfprintf = 0x0003e113); +PROVIDE(arch_tls_stack_setup = 0x0001704d); +PROVIDE(z_shell_fprintf_buffer_flush = 0x0003e2c1); +PROVIDE(mbedtls_rsa_public = 0x00031681); +PROVIDE(z_impl_net_if_ipv4_set_netmask_by_addr_by_index = 0x0004190d); +PROVIDE(udc_ctrl_submit_s_out_status = 0x0004537f); +PROVIDE(zvfs_reserve_fd = 0x00013c75); +PROVIDE(z_sched_init = 0x0003a581); PROVIDE(__addsf3 = 0x00010c29); -PROVIDE(__shiftright128 = 0x0004b217); -PROVIDE(z_impl_flash_flatten = 0x0003eecd); -PROVIDE(z_shell_print_cmd = 0x000163b1); -PROVIDE(net_buf_simple_tailroom = 0x0003f4d9); -PROVIDE(z_shell_vt100_colors_restore = 0x0001646d); +PROVIDE(__shiftright128 = 0x0004b42f); +PROVIDE(z_impl_flash_flatten = 0x0003f0e5); +PROVIDE(z_shell_print_cmd = 0x000165a1); +PROVIDE(net_buf_simple_tailroom = 0x0003f6f1); +PROVIDE(z_shell_vt100_colors_restore = 0x0001665d); PROVIDE(__aeabi_frsub = 0x00010c1d); PROVIDE(flash_hp_stop = 0x20000075); -PROVIDE(bind = 0x0003f343); -PROVIDE(mbedtls_mpi_core_to_mont_rep = 0x0004771d); -PROVIDE(k_malloc = 0x0004ad13); -PROVIDE(z_impl_k_poll_signal_check = 0x0004acd5); -PROVIDE(sys_timepoint_timeout = 0x0004a9d9); -PROVIDE(mbedtls_asn1_get_mpi = 0x00046f09); -PROVIDE(z_impl_zsock_recvmsg = 0x0001d211); -PROVIDE(mbedtls_rsa_rsassa_pkcs1_v15_sign = 0x00031f41); -PROVIDE(iic_master_eri_isr = 0x0002abb1); -PROVIDE(z_shell_spaces_trim = 0x0003e409); -PROVIDE(mbedtls_mpi_cmp_int = 0x00047ac9); -PROVIDE(scalbn = 0x0003cafd); -PROVIDE(udc_ep_enable = 0x00044dff); -PROVIDE(ring_buf_peek = 0x0003d8cf); -PROVIDE(zsock_wait_data = 0x000406db); -PROVIDE(mbedtls_x509_crt_free = 0x000492d3); -PROVIDE(z_impl_device_get_binding = 0x00038e01); -PROVIDE(log_backend_enable = 0x0003d9ab); +PROVIDE(bind = 0x0003f55b); +PROVIDE(mbedtls_mpi_core_to_mont_rep = 0x00047935); +PROVIDE(k_malloc = 0x0004af2b); +PROVIDE(z_impl_k_poll_signal_check = 0x0004aeed); +PROVIDE(sys_timepoint_timeout = 0x0004abf1); +PROVIDE(mbedtls_asn1_get_mpi = 0x00047121); +PROVIDE(z_impl_zsock_recvmsg = 0x0001d401); +PROVIDE(mbedtls_rsa_rsassa_pkcs1_v15_sign = 0x00032159); +PROVIDE(iic_master_eri_isr = 0x0002adc9); +PROVIDE(z_shell_spaces_trim = 0x0003e621); +PROVIDE(mbedtls_mpi_cmp_int = 0x00047ce1); +PROVIDE(scalbn = 0x0003cd15); +PROVIDE(udc_ep_enable = 0x00045017); +PROVIDE(ring_buf_peek = 0x0003dae7); +PROVIDE(zsock_wait_data = 0x000408f3); +PROVIDE(mbedtls_x509_crt_free = 0x000494eb); +PROVIDE(z_impl_device_get_binding = 0x00039019); +PROVIDE(log_backend_enable = 0x0003dbc3); PROVIDE(__aeabi_ldiv0 = 0x00010211); -PROVIDE(udc_ep_disable = 0x00044e51); -PROVIDE(sys_bitarray_alloc = 0x0003d69d); -PROVIDE(__dtoa_engine = 0x0003c2c9); -PROVIDE(z_impl_net_eth_get_ptp_clock_by_index = 0x00040d05); -PROVIDE(z_arm_interrupt_init = 0x00017bf5); -PROVIDE(z_shell_get_last_command = 0x0003e3ad); -PROVIDE(R_USBD_Disconnect = 0x0002b455); -PROVIDE(net_context_create_ipv4_new = 0x000420cd); -PROVIDE(fs_write = 0x00018ea1); -PROVIDE(isalpha = 0x0004adb9); -PROVIDE(mbedtls_aes_free = 0x00046c9d); -PROVIDE(z_sched_wake = 0x0004a5f1); -PROVIDE(mbedtls_cipher_set_iv = 0x0002f50d); -PROVIDE(printf = 0x0003b185); -PROVIDE(z_shell_cmd_trim = 0x0003e469); +PROVIDE(udc_ep_disable = 0x00045069); +PROVIDE(sys_bitarray_alloc = 0x0003d8b5); +PROVIDE(__dtoa_engine = 0x0003c4e1); +PROVIDE(z_impl_net_eth_get_ptp_clock_by_index = 0x00040f1d); +PROVIDE(z_arm_interrupt_init = 0x00017de5); +PROVIDE(z_shell_get_last_command = 0x0003e5c5); +PROVIDE(R_USBD_Disconnect = 0x0002b66d); +PROVIDE(net_context_create_ipv4_new = 0x000422e5); +PROVIDE(fs_write = 0x00019091); +PROVIDE(isalpha = 0x0004afd1); +PROVIDE(mbedtls_aes_free = 0x00046eb5); +PROVIDE(z_sched_wake = 0x0004a809); +PROVIDE(mbedtls_cipher_set_iv = 0x0002f725); +PROVIDE(printf = 0x0003b39d); +PROVIDE(z_shell_cmd_trim = 0x0003e681); PROVIDE(__aeabi_uldivmod = 0x00010ff1); -PROVIDE(mbedtls_pk_verify_restartable = 0x000344a1); -PROVIDE(net_icmpv4_send_error = 0x00043233); -PROVIDE(mbedtls_sha1_init = 0x00048987); -PROVIDE(zsock_connect_ctx = 0x0001d9a5); -PROVIDE(fs_close = 0x00018e0d); -PROVIDE(ztls_connect_ctx = 0x0001ee81); -PROVIDE(mbedtls_rsa_parse_pubkey = 0x0003130d); -PROVIDE(z_impl_k_pipe_close = 0x0004a8ab); -PROVIDE(net_if_need_calc_tx_checksum = 0x00041971); -PROVIDE(fnmatch = 0x0003f2fb); +PROVIDE(mbedtls_pk_verify_restartable = 0x000346b9); +PROVIDE(net_icmpv4_send_error = 0x0004344b); +PROVIDE(mbedtls_sha1_init = 0x00048b9f); +PROVIDE(zsock_connect_ctx = 0x0001db95); +PROVIDE(fs_close = 0x00018ffd); +PROVIDE(ztls_connect_ctx = 0x0001f071); +PROVIDE(mbedtls_rsa_parse_pubkey = 0x00031525); +PROVIDE(z_impl_k_pipe_close = 0x0004aac3); +PROVIDE(net_if_need_calc_tx_checksum = 0x00041b89); +PROVIDE(fnmatch = 0x0003f513); PROVIDE(__aeabi_drsub = 0x00010215); PROVIDE(__aeabi_d2ulz = 0x00011021); -PROVIDE(usbd_msg_pub_device = 0x0003fe01); -PROVIDE(mbedtls_ssl_handshake = 0x00037ed5); -PROVIDE(shell_fprintf_warn = 0x0003dfc3); -PROVIDE(udc_disable = 0x0004507b); -PROVIDE(arch_switch_to_main_thread = 0x00017b95); -PROVIDE(z_shell_wildcard_prepare = 0x0003ee4b); -PROVIDE(z_shell_wildcard_finalize = 0x0003ee8d); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBU_PARAM = 0x00020ab1); -PROVIDE(timeutil_timegm64 = 0x00013bb5); -PROVIDE(z_impl_k_queue_alloc_append = 0x0004a0cd); -PROVIDE(z_impl_net_if_ipv4_addr_lookup_by_index = 0x00041981); -PROVIDE(mbedtls_aes_crypt_cbc = 0x00046cd1); -PROVIDE(mbedtls_ssl_sig_from_pk_alg = 0x0004995f); -PROVIDE(mbedtls_ssl_write_client_hello = 0x00035c4d); -PROVIDE(mbedtls_ssl_read_record = 0x000366f5); +PROVIDE(usbd_msg_pub_device = 0x00040019); +PROVIDE(mbedtls_ssl_handshake = 0x000380ed); +PROVIDE(shell_fprintf_warn = 0x0003e1db); +PROVIDE(udc_disable = 0x00045293); +PROVIDE(arch_switch_to_main_thread = 0x00017d85); +PROVIDE(z_shell_wildcard_prepare = 0x0003f063); +PROVIDE(z_shell_wildcard_finalize = 0x0003f0a5); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBU_PARAM = 0x00020ca1); +PROVIDE(timeutil_timegm64 = 0x00013da5); +PROVIDE(z_impl_k_queue_alloc_append = 0x0004a2e5); +PROVIDE(z_impl_net_if_ipv4_addr_lookup_by_index = 0x00041b99); +PROVIDE(mbedtls_aes_crypt_cbc = 0x00046ee9); +PROVIDE(mbedtls_ssl_sig_from_pk_alg = 0x00049b77); +PROVIDE(mbedtls_ssl_write_client_hello = 0x00035e65); +PROVIDE(mbedtls_ssl_read_record = 0x0003690d); PROVIDE(flash_hp_pe_mode_exit = 0x20000001); -PROVIDE(zsock_setsockopt_ctx = 0x0001e3cd); -PROVIDE(mbedtls_pk_verify = 0x00049051); -PROVIDE(mbedtls_ssl_update_out_pointers = 0x00049417); -PROVIDE(net_ipv4_init = 0x000436e9); -PROVIDE(R_GPT_InfoGet = 0x0002ae41); -PROVIDE(fs_truncate = 0x00018f79); -PROVIDE(filter_set = 0x000140b1); -PROVIDE(arm_irq_priority_set = 0x0003f05b); -PROVIDE(__double_computeInvPow5 = 0x0003c8d5); -PROVIDE(z_shell_pattern_remove = 0x0003e309); -PROVIDE(k_work_init = 0x0004a2e1); -PROVIDE(k_timer_init = 0x0004aa1b); -PROVIDE(mbedtls_pk_setup = 0x00034475); -PROVIDE(net_buf_frag_del = 0x0003f3ef); -PROVIDE(llext_fs_prepare = 0x0004024b); -PROVIDE(z_impl_zsock_sendmsg = 0x0001d14d); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBV_PARAM = 0x0002083d); -PROVIDE(net_pkt_unref = 0x00042aeb); -PROVIDE(llext_dependency_remove_all = 0x000401bf); -PROVIDE(llext_find_sym = 0x0001b6e1); -PROVIDE(usb_device_isr = 0x0002b999); -PROVIDE(net_if_get_name = 0x000419f1); +PROVIDE(zsock_setsockopt_ctx = 0x0001e5bd); +PROVIDE(mbedtls_pk_verify = 0x00049269); +PROVIDE(mbedtls_ssl_update_out_pointers = 0x0004962f); +PROVIDE(net_ipv4_init = 0x00043901); +PROVIDE(R_GPT_InfoGet = 0x0002b059); +PROVIDE(fs_truncate = 0x00019169); +PROVIDE(filter_set = 0x000142a1); +PROVIDE(arm_irq_priority_set = 0x0003f273); +PROVIDE(__double_computeInvPow5 = 0x0003caed); +PROVIDE(z_shell_pattern_remove = 0x0003e521); +PROVIDE(k_work_init = 0x0004a4f9); +PROVIDE(k_timer_init = 0x0004ac33); +PROVIDE(mbedtls_pk_setup = 0x0003468d); +PROVIDE(net_buf_frag_del = 0x0003f607); +PROVIDE(llext_fs_prepare = 0x00040463); +PROVIDE(z_impl_zsock_sendmsg = 0x0001d33d); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBV_PARAM = 0x00020a2d); +PROVIDE(net_pkt_unref = 0x00042d03); +PROVIDE(llext_dependency_remove_all = 0x000403d7); +PROVIDE(llext_find_sym = 0x0001b8d1); +PROVIDE(usb_device_isr = 0x0002bbb1); +PROVIDE(net_if_get_name = 0x00041c09); PROVIDE(__aeabi_d2iz = 0x00010aed); -PROVIDE(z_unpend_all = 0x0004a559); -PROVIDE(mbedtls_ssl_get_ciphersuite_id = 0x00049363); -PROVIDE(z_arm_svc = 0x00017a21); -PROVIDE(R_USBD_EdptClose = 0x0002b5a9); -PROVIDE(gpio_ra_interrupt_unset = 0x00044b07); -PROVIDE(cbvprintf_package = 0x000131b5); +PROVIDE(z_unpend_all = 0x0004a771); +PROVIDE(mbedtls_ssl_get_ciphersuite_id = 0x0004957b); +PROVIDE(z_arm_svc = 0x00017c11); +PROVIDE(R_USBD_EdptClose = 0x0002b7c1); +PROVIDE(gpio_ra_interrupt_unset = 0x00044d1f); +PROVIDE(cbvprintf_package = 0x000133a5); PROVIDE(__aeabi_idiv0 = 0x00010211); -PROVIDE(mbedtls_ssl_write_version = 0x000494d3); -PROVIDE(ring_buf_get = 0x0003d88b); -PROVIDE(z_queue_node_peek = 0x0004a007); -PROVIDE(R_USBD_Open = 0x0002b131); -PROVIDE(dns_resolve_name_internal = 0x00026cc5); -PROVIDE(net_pkt_alloc_buffer = 0x00022ec5); -PROVIDE(llext_lookup_symbol = 0x0001c61d); -PROVIDE(llext_buf_read = 0x00040205); -PROVIDE(z_early_memset = 0x00049b97); -PROVIDE(mbedtls_mpi_init = 0x00047755); -PROVIDE(strncpy = 0x0004af29); -PROVIDE(mbedtls_mpi_add_int = 0x00047c9b); -PROVIDE(z_shell_op_cursor_end_move = 0x0003e691); -PROVIDE(llext_bootstrap = 0x0001b8b5); -PROVIDE(z_impl_k_poll_signal_raise = 0x0003af31); -PROVIDE(mbedtls_rsa_check_pubkey = 0x000312c1); -PROVIDE(zsock_sendto_ctx = 0x0001dab1); -PROVIDE(udc_submit_event = 0x00044d2f); -PROVIDE(mbedtls_ssl_write_record = 0x0003652d); -PROVIDE(net_if_get_by_name = 0x00021d6d); -PROVIDE(mbedtls_ct_memcpy_if = 0x0002f929); -PROVIDE(z_thread_prio_set = 0x0003a1b1); -PROVIDE(net_ipaddr_parse = 0x00041d67); +PROVIDE(mbedtls_ssl_write_version = 0x000496eb); +PROVIDE(ring_buf_get = 0x0003daa3); +PROVIDE(z_queue_node_peek = 0x0004a21f); +PROVIDE(R_USBD_Open = 0x0002b349); +PROVIDE(dns_resolve_name_internal = 0x00026edd); +PROVIDE(net_pkt_alloc_buffer = 0x000230dd); +PROVIDE(llext_lookup_symbol = 0x0001c80d); +PROVIDE(llext_buf_read = 0x0004041d); +PROVIDE(z_early_memset = 0x00049daf); +PROVIDE(mbedtls_mpi_init = 0x0004796d); +PROVIDE(strncpy = 0x0004b141); +PROVIDE(mbedtls_mpi_add_int = 0x00047eb3); +PROVIDE(z_shell_op_cursor_end_move = 0x0003e8a9); +PROVIDE(llext_bootstrap = 0x0001baa5); +PROVIDE(z_impl_k_poll_signal_raise = 0x0003b149); +PROVIDE(mbedtls_rsa_check_pubkey = 0x000314d9); +PROVIDE(zsock_sendto_ctx = 0x0001dca1); +PROVIDE(udc_submit_event = 0x00044f47); +PROVIDE(mbedtls_ssl_write_record = 0x00036745); +PROVIDE(net_if_get_by_name = 0x00021f85); +PROVIDE(mbedtls_ct_memcpy_if = 0x0002fb41); +PROVIDE(z_thread_prio_set = 0x0003a3c9); +PROVIDE(net_ipaddr_parse = 0x00041f7f); PROVIDE(__cmpdf2 = 0x000109c1); -PROVIDE(z_arm_fault = 0x000176b9); -PROVIDE(mbedtls_md5_init = 0x00048567); -PROVIDE(usbd_ep_set_halt = 0x0003fd5d); -PROVIDE(putchar = 0x0003b1a9); -PROVIDE(zsock_listen_ctx = 0x0001da71); -PROVIDE(R_USBD_EdptClearStall = 0x0002b915); -PROVIDE(dns_msg_pack_query = 0x000446a7); +PROVIDE(z_arm_fault = 0x000178a9); +PROVIDE(mbedtls_md5_init = 0x0004877f); +PROVIDE(usbd_ep_set_halt = 0x0003ff75); +PROVIDE(putchar = 0x0003b3c1); +PROVIDE(zsock_listen_ctx = 0x0001dc61); +PROVIDE(R_USBD_EdptClearStall = 0x0002bb2d); +PROVIDE(dns_msg_pack_query = 0x000448bf); PROVIDE(CONFIG_POSIX_THREAD_SAFE_FUNCTIONS = 0x00000001); -PROVIDE(HW_SCE_GenerateRandomNumberSub = 0x0002cb6d); -PROVIDE(mbedtls_sha256_finish = 0x00048b81); -PROVIDE(z_log_runtime_filters_init = 0x0001403d); -PROVIDE(z_arm_exc_exit = 0x00017275); -PROVIDE(z_impl_k_mutex_lock = 0x00039495); -PROVIDE(zsock_accept_ctx = 0x0001dc69); -PROVIDE(znet_mgmt_socket = 0x0001f929); -PROVIDE(mbedtls_mpi_core_shift_l = 0x000472b5); -PROVIDE(usbd_enable = 0x000191a1); -PROVIDE(usbd_can_detect_vbus = 0x0003f701); -PROVIDE(zsock_getaddrinfo = 0x0004037b); -PROVIDE(usbd_device_set_bcd_usb = 0x0003f675); -PROVIDE(z_log_msg_commit = 0x00013fb5); -PROVIDE(z_prep_c = 0x00017ab1); -PROVIDE(HW_SCE_RNG_Read = 0x0002bfe5); -PROVIDE(mbedtls_x509_get_name = 0x0003480d); -PROVIDE(k_work_reschedule_for_queue = 0x00039b4d); +PROVIDE(HW_SCE_GenerateRandomNumberSub = 0x0002cd85); +PROVIDE(mbedtls_sha256_finish = 0x00048d99); +PROVIDE(z_log_runtime_filters_init = 0x0001422d); +PROVIDE(z_arm_exc_exit = 0x00017465); +PROVIDE(z_impl_k_mutex_lock = 0x000396ad); +PROVIDE(zsock_accept_ctx = 0x0001de59); +PROVIDE(znet_mgmt_socket = 0x0001fb19); +PROVIDE(mbedtls_mpi_core_shift_l = 0x000474cd); +PROVIDE(usbd_enable = 0x00019391); +PROVIDE(usbd_can_detect_vbus = 0x0003f919); +PROVIDE(zsock_getaddrinfo = 0x00040593); +PROVIDE(usbd_device_set_bcd_usb = 0x0003f88d); +PROVIDE(z_log_msg_commit = 0x000141a5); +PROVIDE(z_prep_c = 0x00017ca1); +PROVIDE(HW_SCE_RNG_Read = 0x0002c1fd); +PROVIDE(mbedtls_x509_get_name = 0x00034a25); +PROVIDE(k_work_reschedule_for_queue = 0x00039d65); PROVIDE(__aeabi_cfcmpeq = 0x00010eb1); -PROVIDE(z_impl_zvfs_select = 0x00018a3d); -PROVIDE(mbedtls_mpi_core_cond_assign = 0x0002eee1); -PROVIDE(z_impl_k_pipe_reset = 0x0004a86b); -PROVIDE(mbedtls_pem_free = 0x00048fb7); -PROVIDE(mbedtls_rsa_parse_key = 0x00032285); -PROVIDE(mbedtls_rsa_free = 0x00048915); -PROVIDE(udc_ctrl_submit_status = 0x0004523d); -PROVIDE(net_buf_pool_get = 0x000182a1); -PROVIDE(net_tcp_recv = 0x00043cff); -PROVIDE(mbedtls_ssl_update_in_pointers = 0x0004945f); -PROVIDE(k_sched_unlock = 0x0003a301); -PROVIDE(net_if_ipv4_get_ttl = 0x000417a7); -PROVIDE(llext_fs_finalize = 0x000402ab); -PROVIDE(z_impl_k_sched_current_thread_query = 0x0003a549); -PROVIDE(net_context_is_v6only_set = 0x00041ee3); -PROVIDE(z_impl_k_condvar_init = 0x0004a3c1); -PROVIDE(exit = 0x0003b021); -PROVIDE(mbedtls_ssl_conf_authmode = 0x0004977b); -PROVIDE(mbedtls_md_get_size = 0x00048555); -PROVIDE(z_impl_hwinfo_get_reset_cause = 0x00045a65); -PROVIDE(zsock_getsockopt_ctx = 0x0001e275); -PROVIDE(net_if_init = 0x00021db1); -PROVIDE(R_IIC_MASTER_Close = 0x0002a869); -PROVIDE(mbedtls_cipher_init = 0x000484a1); -PROVIDE(mbedtls_md_info_from_ctx = 0x00048561); -PROVIDE(k_sys_fatal_error_handler = 0x00038ea5); -PROVIDE(net_socket_is_tls = 0x0001ee29); -PROVIDE(net_buf_simple_add_mem = 0x0003f471); -PROVIDE(mbedtls_rsa_deduce_private_exponent = 0x000486a9); -PROVIDE(_cos = 0x00011c49); -PROVIDE(vprintk = 0x0003d3e9); -PROVIDE(z_shell_op_completion_insert = 0x0003e881); +PROVIDE(z_impl_zvfs_select = 0x00018c2d); +PROVIDE(mbedtls_mpi_core_cond_assign = 0x0002f0f9); +PROVIDE(z_impl_k_pipe_reset = 0x0004aa83); +PROVIDE(mbedtls_pem_free = 0x000491cf); +PROVIDE(mbedtls_rsa_parse_key = 0x0003249d); +PROVIDE(mbedtls_rsa_free = 0x00048b2d); +PROVIDE(udc_ctrl_submit_status = 0x00045455); +PROVIDE(net_buf_pool_get = 0x00018491); +PROVIDE(net_tcp_recv = 0x00043f17); +PROVIDE(mbedtls_ssl_update_in_pointers = 0x00049677); +PROVIDE(k_sched_unlock = 0x0003a519); +PROVIDE(net_if_ipv4_get_ttl = 0x000419bf); +PROVIDE(llext_fs_finalize = 0x000404c3); +PROVIDE(z_impl_k_sched_current_thread_query = 0x0003a761); +PROVIDE(net_context_is_v6only_set = 0x000420fb); +PROVIDE(z_impl_k_condvar_init = 0x0004a5d9); +PROVIDE(exit = 0x0003b239); +PROVIDE(mbedtls_ssl_conf_authmode = 0x00049993); +PROVIDE(mbedtls_md_get_size = 0x0004876d); +PROVIDE(z_impl_hwinfo_get_reset_cause = 0x00045c7d); +PROVIDE(zsock_getsockopt_ctx = 0x0001e465); +PROVIDE(net_if_init = 0x00021fc9); +PROVIDE(R_IIC_MASTER_Close = 0x0002aa81); +PROVIDE(mbedtls_cipher_init = 0x000486b9); +PROVIDE(mbedtls_md_info_from_ctx = 0x00048779); +PROVIDE(k_sys_fatal_error_handler = 0x000390bd); +PROVIDE(net_socket_is_tls = 0x0001f019); +PROVIDE(net_buf_simple_add_mem = 0x0003f689); +PROVIDE(mbedtls_rsa_deduce_private_exponent = 0x000488c1); +PROVIDE(_cos = 0x00011e39); +PROVIDE(vprintk = 0x0003d601); +PROVIDE(z_shell_op_completion_insert = 0x0003ea99); PROVIDE(__aeabi_d2f = 0x00010b7d); -PROVIDE(mbedtls_ssl_sig_from_pk = 0x0004994f); -PROVIDE(mbedtls_md_setup = 0x0002fa31); -PROVIDE(floor = 0x0003cbb9); -PROVIDE(R_ETHER_Write = 0x00046a7b); +PROVIDE(mbedtls_ssl_sig_from_pk = 0x00049b67); +PROVIDE(mbedtls_md_setup = 0x0002fc49); +PROVIDE(floor = 0x0003cdd1); +PROVIDE(R_ETHER_Write = 0x00046c93); PROVIDE(__aeabi_idivmod = 0x00010201); -PROVIDE(z_shell_op_cursor_home_move = 0x0003e683); -PROVIDE(bgo_callback = 0x0002808d); -PROVIDE(z_impl_k_sem_init = 0x0004a123); -PROVIDE(mbedtls_ssl_set_bio = 0x00049785); -PROVIDE(net_tcp_accept = 0x00023bdd); -PROVIDE(__do_init_array_aux = 0x00039219); -PROVIDE(net_if_get_by_iface = 0x00021bbd); -PROVIDE(send = 0x0003f36f); -PROVIDE(mbedtls_ssl_get_ciphersuite_sig_pk_alg = 0x0004936f); +PROVIDE(z_shell_op_cursor_home_move = 0x0003e89b); +PROVIDE(bgo_callback = 0x000282a5); +PROVIDE(z_impl_k_sem_init = 0x0004a33b); +PROVIDE(mbedtls_ssl_set_bio = 0x0004999d); +PROVIDE(net_tcp_accept = 0x00023df5); +PROVIDE(__do_init_array_aux = 0x00039431); +PROVIDE(net_if_get_by_iface = 0x00021dd5); +PROVIDE(send = 0x0003f587); +PROVIDE(mbedtls_ssl_get_ciphersuite_sig_pk_alg = 0x00049587); PROVIDE(__fixunsdfsi = 0x00010b3d); -PROVIDE(mbedtls_x509_crt_check_extended_key_usage = 0x00034ea5); -PROVIDE(mbedtls_oid_get_pk_alg = 0x000308cd); -PROVIDE(z_shell_op_word_remove = 0x000164ad); -PROVIDE(net_pkt_rx_alloc = 0x00022d6d); -PROVIDE(net_buf_frag_last = 0x0003f3ab); -PROVIDE(k_work_schedule_for_queue = 0x00039aed); -PROVIDE(arch_spin_relax = 0x00049d4f); -PROVIDE(mbedtls_rsa_init = 0x00048903); -PROVIDE(net_context_send = 0x00042539); -PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x00038e49); -PROVIDE(z_unpend_thread = 0x0004a549); +PROVIDE(mbedtls_x509_crt_check_extended_key_usage = 0x000350bd); +PROVIDE(mbedtls_oid_get_pk_alg = 0x00030ae5); +PROVIDE(z_shell_op_word_remove = 0x0001669d); +PROVIDE(net_pkt_rx_alloc = 0x00022f85); +PROVIDE(net_buf_frag_last = 0x0003f5c3); +PROVIDE(k_work_schedule_for_queue = 0x00039d05); +PROVIDE(arch_spin_relax = 0x00049f67); +PROVIDE(mbedtls_rsa_init = 0x00048b1b); +PROVIDE(net_context_send = 0x00042751); +PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x00039061); +PROVIDE(z_unpend_thread = 0x0004a761); PROVIDE(__aeabi_dcmpge = 0x00010a99); -PROVIDE(z_cstart = 0x00039139); -PROVIDE(sys_clock_isr = 0x000297bd); -PROVIDE(mbedtls_cipher_setup = 0x0002f461); -PROVIDE(z_shell_help_request = 0x000167fd); -PROVIDE(z_impl_z_log_msg_static_create = 0x0001429d); -PROVIDE(iic_master_rxi_isr = 0x0002a8cd); -PROVIDE(R_SPI_Close = 0x0002a339); -PROVIDE(net_eth_ipv4_mcast_to_mac_addr = 0x00040c99); -PROVIDE(mbedtls_ssl_read = 0x000368cd); -PROVIDE(thread_is_sliceable = 0x0003a845); -PROVIDE(z_log_notify_backend_enabled = 0x0003d981); -PROVIDE(net_buf_simple_remove_mem = 0x0003f4bb); -PROVIDE(mbedtls_ssl_handshake_wrapup = 0x000499df); -PROVIDE(mbedtls_ssl_set_session = 0x00037f41); -PROVIDE(ZVFS_FD_SET = 0x0003f5fd); -PROVIDE(mbedtls_ssl_parse_sig_alg_ext = 0x00038339); -PROVIDE(zvfs_get_obj_lock_and_cond = 0x000139e1); -PROVIDE(mbedtls_ssl_handle_pending_alert = 0x000494e1); -PROVIDE(mbedtls_mpi_core_montmul = 0x00047563); -PROVIDE(z_impl_k_thread_stack_space_get = 0x0004a41d); +PROVIDE(z_cstart = 0x00039351); +PROVIDE(sys_clock_isr = 0x000299d5); +PROVIDE(mbedtls_cipher_setup = 0x0002f679); +PROVIDE(z_shell_help_request = 0x000169ed); +PROVIDE(z_impl_z_log_msg_static_create = 0x0001448d); +PROVIDE(iic_master_rxi_isr = 0x0002aae5); +PROVIDE(R_SPI_Close = 0x0002a551); +PROVIDE(net_eth_ipv4_mcast_to_mac_addr = 0x00040eb1); +PROVIDE(mbedtls_ssl_read = 0x00036ae5); +PROVIDE(thread_is_sliceable = 0x0003aa5d); +PROVIDE(z_log_notify_backend_enabled = 0x0003db99); +PROVIDE(net_buf_simple_remove_mem = 0x0003f6d3); +PROVIDE(mbedtls_ssl_handshake_wrapup = 0x00049bf7); +PROVIDE(mbedtls_ssl_set_session = 0x00038159); +PROVIDE(ZVFS_FD_SET = 0x0003f815); +PROVIDE(mbedtls_ssl_parse_sig_alg_ext = 0x00038551); +PROVIDE(zvfs_get_obj_lock_and_cond = 0x00013bd1); +PROVIDE(mbedtls_ssl_handle_pending_alert = 0x000496f9); +PROVIDE(mbedtls_mpi_core_montmul = 0x0004777b); +PROVIDE(z_impl_k_thread_stack_space_get = 0x0004a635); PROVIDE(atan = 0x00011909); -PROVIDE(mbedtls_mpi_core_shift_r = 0x00047239); -PROVIDE(llext_copy_regions = 0x000400c9); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXINJECTION_MODE = 0x0002083d); +PROVIDE(mbedtls_mpi_core_shift_r = 0x00047451); +PROVIDE(llext_copy_regions = 0x000402e1); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXINJECTION_MODE = 0x00020a2d); PROVIDE(__aeabi_ldivmod = 0x00010f51); -PROVIDE(z_ready_thread = 0x0004a49b); -PROVIDE(net_pkt_get_frag = 0x00022ce9); -PROVIDE(k_msgq_init = 0x00049d83); -PROVIDE(usbd_disable = 0x00019229); +PROVIDE(z_ready_thread = 0x0004a6b3); +PROVIDE(net_pkt_get_frag = 0x00022f01); +PROVIDE(k_msgq_init = 0x00049f9b); +PROVIDE(usbd_disable = 0x00019419); PROVIDE(__aeabi_dmul = 0x0001058d); -PROVIDE(strtoul = 0x0003b6fd); -PROVIDE(usbd_class_get_by_req = 0x0003fb4b); -PROVIDE(mbedtls_x509_crt_verify_restartable = 0x000492b1); -PROVIDE(hex2bin = 0x0003d4d7); -PROVIDE(socket = 0x0003f39d); -PROVIDE(getopt_state_get = 0x00017f59); -PROVIDE(k_fatal_halt = 0x00049b63); -PROVIDE(z_log_msg_runtime_vcreate = 0x000141e9); -PROVIDE(boot_banner = 0x00038ddd); -PROVIDE(mbedtls_asn1_get_tag = 0x00046e3d); -PROVIDE(R_GPT_PeriodSet = 0x00046441); -PROVIDE(close = 0x0003f301); +PROVIDE(strtoul = 0x0003b915); +PROVIDE(usbd_class_get_by_req = 0x0003fd63); +PROVIDE(mbedtls_x509_crt_verify_restartable = 0x000494c9); +PROVIDE(hex2bin = 0x0003d6ef); +PROVIDE(socket = 0x0003f5b5); +PROVIDE(getopt_state_get = 0x00018149); +PROVIDE(k_fatal_halt = 0x00049d7b); +PROVIDE(z_log_msg_runtime_vcreate = 0x000143d9); +PROVIDE(boot_banner = 0x00038ff5); +PROVIDE(mbedtls_asn1_get_tag = 0x00047055); +PROVIDE(R_GPT_PeriodSet = 0x00046659); +PROVIDE(close = 0x0003f519); PROVIDE(__aeabi_dcmpun = 0x00010ac1); -PROVIDE(net_mgmt_add_event_callback = 0x00022469); -PROVIDE(z_arm_mpu_fault = 0x00017909); -PROVIDE(z_impl_net_if_get_by_index = 0x00021521); -PROVIDE(z_shell_history_mode_exit = 0x0003ecb3); -PROVIDE(mbedtls_mpi_get_bit = 0x000478fd); -PROVIDE(mbedtls_sha1_free = 0x0004898f); -PROVIDE(z_impl_k_uptime_ticks = 0x0004a98d); -PROVIDE(mbedtls_ssl_conf_ciphersuites = 0x00049791); +PROVIDE(net_mgmt_add_event_callback = 0x00022681); +PROVIDE(z_arm_mpu_fault = 0x00017af9); +PROVIDE(z_impl_net_if_get_by_index = 0x00021711); +PROVIDE(z_shell_history_mode_exit = 0x0003eecb); +PROVIDE(mbedtls_mpi_get_bit = 0x00047b15); +PROVIDE(mbedtls_sha1_free = 0x00048ba7); +PROVIDE(z_impl_k_uptime_ticks = 0x0004aba5); +PROVIDE(mbedtls_ssl_conf_ciphersuites = 0x000499a9); PROVIDE(__aeabi_dcmple = 0x00010a85); -PROVIDE(mbedtls_sha512_init = 0x00048c6f); -PROVIDE(usbd_config_get = 0x0003fa31); +PROVIDE(mbedtls_sha512_init = 0x00048e87); +PROVIDE(usbd_config_get = 0x0003fc49); PROVIDE(__subsf3 = 0x00010c25); -PROVIDE(mbedtls_md_info_from_type = 0x0002f9bd); -PROVIDE(net_if_ipv4_set_gw = 0x00041709); -PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x00045a71); -PROVIDE(getopt_init = 0x00017de5); -PROVIDE(dns_init_resolver = 0x00026fdd); -PROVIDE(mbedtls_ct_zeroize_if = 0x000484c3); -PROVIDE(z_impl_flash_copy = 0x0003eef5); -PROVIDE(mbedtls_mpi_core_check_zero_ct = 0x00047705); -PROVIDE(__cxa_pure_virtual = 0x0003cc99); -PROVIDE(flash_ra_page_layout = 0x000280a1); +PROVIDE(mbedtls_md_info_from_type = 0x0002fbd5); +PROVIDE(net_if_ipv4_set_gw = 0x00041921); +PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x00045c89); +PROVIDE(getopt_init = 0x00017fd5); +PROVIDE(dns_init_resolver = 0x000271f5); +PROVIDE(mbedtls_ct_zeroize_if = 0x000486db); +PROVIDE(z_impl_flash_copy = 0x0003f10d); +PROVIDE(mbedtls_mpi_core_check_zero_ct = 0x0004791d); +PROVIDE(__cxa_pure_virtual = 0x0003ceb1); +PROVIDE(flash_ra_page_layout = 0x000282b9); PROVIDE(__gesf2 = 0x00010e39); -PROVIDE(mbedtls_ssl_decrypt_buf = 0x00036099); -PROVIDE(mbedtls_rsa_pkcs1_decrypt = 0x00031ed5); -PROVIDE(z_arm_debug_monitor = 0x00017909); -PROVIDE(R_BSP_RegisterProtectEnable = 0x00029b39); -PROVIDE(z_impl_device_init = 0x00049b9f); -PROVIDE(net_tcp_send_data = 0x00043cf1); -PROVIDE(mbedtls_ssl_conf_rng = 0x0004977f); -PROVIDE(net_if_ipv4_get_mcast_ttl = 0x000417d3); -PROVIDE(usbd_ep_ctrl_enqueue = 0x0001aba5); -PROVIDE(usbd_ep_disable = 0x0003fced); -PROVIDE(R_ETHER_CallbackSet = 0x00046a21); -PROVIDE(bsp_clock_init = 0x000299d5); -PROVIDE(udc_buf_put = 0x00044d0b); -PROVIDE(mbedtls_x509_get_subject_alt_name_ext = 0x00034d65); -PROVIDE(regulator_disable = 0x00045bab); -PROVIDE(putchar_unlocked = 0x0003b1a9); -PROVIDE(mbedtls_ssl_prepare_handshake_record = 0x00036435); -PROVIDE(mbedtls_x509_crt_parse_der_nocopy = 0x0004933d); -PROVIDE(z_thread_entry = 0x000138e5); -PROVIDE(k_mem_slab_alloc = 0x0003927d); -PROVIDE(arch_printk_char_out = 0x0003d3e5); -PROVIDE(k_aligned_alloc = 0x0003af81); -PROVIDE(z_shell_wildcard_process = 0x00016b51); +PROVIDE(mbedtls_ssl_decrypt_buf = 0x000362b1); +PROVIDE(mbedtls_rsa_pkcs1_decrypt = 0x000320ed); +PROVIDE(z_arm_debug_monitor = 0x00017af9); +PROVIDE(R_BSP_RegisterProtectEnable = 0x00029d51); +PROVIDE(z_impl_device_init = 0x00049db7); +PROVIDE(net_tcp_send_data = 0x00043f09); +PROVIDE(mbedtls_ssl_conf_rng = 0x00049997); +PROVIDE(net_if_ipv4_get_mcast_ttl = 0x000419eb); +PROVIDE(usbd_ep_ctrl_enqueue = 0x0001ad95); +PROVIDE(usbd_ep_disable = 0x0003ff05); +PROVIDE(R_ETHER_CallbackSet = 0x00046c39); +PROVIDE(bsp_clock_init = 0x00029bed); +PROVIDE(udc_buf_put = 0x00044f23); +PROVIDE(mbedtls_x509_get_subject_alt_name_ext = 0x00034f7d); +PROVIDE(regulator_disable = 0x00045dc3); +PROVIDE(putchar_unlocked = 0x0003b3c1); +PROVIDE(mbedtls_ssl_prepare_handshake_record = 0x0003664d); +PROVIDE(mbedtls_x509_crt_parse_der_nocopy = 0x00049555); +PROVIDE(z_thread_entry = 0x00013ad5); +PROVIDE(k_mem_slab_alloc = 0x00039495); +PROVIDE(arch_printk_char_out = 0x0003d5fd); +PROVIDE(k_aligned_alloc = 0x0003b199); +PROVIDE(z_shell_wildcard_process = 0x00016d41); PROVIDE(__unorddf2 = 0x00010ac1); -PROVIDE(sys_heap_aligned_alloc = 0x0003d05d); -PROVIDE(sin = 0x000120e9); -PROVIDE(__wrap_calloc = 0x00017d89); -PROVIDE(zvfs_eventfd_write = 0x000187fd); -PROVIDE(z_shell_print_prompt_and_cmd = 0x000166cd); -PROVIDE(net_buf_simple_reserve = 0x0003f45d); -PROVIDE(net_arp_clear_cache = 0x0002117d); -PROVIDE(net_dhcpv4_accept_unicast = 0x0004451d); -PROVIDE(z_impl_k_sem_give = 0x00039689); -PROVIDE(mbedtls_x509_crt_check_key_usage = 0x00034e6d); -PROVIDE(z_impl_k_queue_cancel_wait = 0x0004a039); -PROVIDE(k_work_delayable_busy_get = 0x0004a37d); -PROVIDE(mbedtls_sha256 = 0x00048c21); -PROVIDE(SystemCoreClockUpdate = 0x000299ad); -PROVIDE(ztls_setsockopt_ctx = 0x0001f47d); -PROVIDE(R_ETHER_Open = 0x0002decd); -PROVIDE(HW_SCE_SelfCheck2Sub = 0x0002c4b1); -PROVIDE(z_impl_k_condvar_broadcast = 0x00039c01); -PROVIDE(calc_chksum = 0x00041b2f); -PROVIDE(z_impl_k_condvar_wait = 0x00039c71); -PROVIDE(z_impl_k_mutex_unlock = 0x00039585); -PROVIDE(net_pkt_alloc_buffer_with_reserve = 0x00022ddd); -PROVIDE(__fpclassifyd = 0x0003ca85); -PROVIDE(R_BSP_IrqEnableNoClear = 0x00029c3d); -PROVIDE(z_impl_k_msgq_alloc_init = 0x00049dab); -PROVIDE(usbd_device_init_core = 0x0001a1b5); -PROVIDE(mbedtls_mpi_exp_mod = 0x00048073); -PROVIDE(timeutil_timegm = 0x00013c9d); +PROVIDE(sys_heap_aligned_alloc = 0x0003d275); +PROVIDE(sin = 0x000122d9); +PROVIDE(__wrap_calloc = 0x00017f79); +PROVIDE(zvfs_eventfd_write = 0x000189ed); +PROVIDE(z_shell_print_prompt_and_cmd = 0x000168bd); +PROVIDE(net_buf_simple_reserve = 0x0003f675); +PROVIDE(net_arp_clear_cache = 0x0002136d); +PROVIDE(net_dhcpv4_accept_unicast = 0x00044735); +PROVIDE(z_impl_k_sem_give = 0x000398a1); +PROVIDE(mbedtls_x509_crt_check_key_usage = 0x00035085); +PROVIDE(z_impl_k_queue_cancel_wait = 0x0004a251); +PROVIDE(k_work_delayable_busy_get = 0x0004a595); +PROVIDE(mbedtls_sha256 = 0x00048e39); +PROVIDE(SystemCoreClockUpdate = 0x00029bc5); +PROVIDE(ztls_setsockopt_ctx = 0x0001f66d); +PROVIDE(R_ETHER_Open = 0x0002e0e5); +PROVIDE(HW_SCE_SelfCheck2Sub = 0x0002c6c9); +PROVIDE(z_impl_k_condvar_broadcast = 0x00039e19); +PROVIDE(calc_chksum = 0x00041d47); +PROVIDE(z_impl_k_condvar_wait = 0x00039e89); +PROVIDE(z_impl_k_mutex_unlock = 0x0003979d); +PROVIDE(net_pkt_alloc_buffer_with_reserve = 0x00022ff5); +PROVIDE(__fpclassifyd = 0x0003cc9d); +PROVIDE(R_BSP_IrqEnableNoClear = 0x00029e55); +PROVIDE(z_impl_k_msgq_alloc_init = 0x00049fc3); +PROVIDE(usbd_device_init_core = 0x0001a3a5); +PROVIDE(mbedtls_mpi_exp_mod = 0x0004828b); +PROVIDE(timeutil_timegm = 0x00013e8d); PROVIDE(__muldf3 = 0x0001058d); -PROVIDE(mbedtls_mpi_add_mpi = 0x00047c8d); -PROVIDE(fcu_fiferr_isr = 0x0002a261); -PROVIDE(mbedtls_ssl_handle_message_type = 0x00036469); -PROVIDE(k_stack_init = 0x0004a143); -PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x00045a5f); -PROVIDE(mbedtls_ssl_ciphersuite_from_id = 0x00035bdd); -PROVIDE(net_arp_init = 0x00021275); +PROVIDE(mbedtls_mpi_add_mpi = 0x00047ea5); +PROVIDE(fcu_fiferr_isr = 0x0002a479); +PROVIDE(mbedtls_ssl_handle_message_type = 0x00036681); +PROVIDE(k_stack_init = 0x0004a35b); +PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x00045c77); +PROVIDE(mbedtls_ssl_ciphersuite_from_id = 0x00035df5); +PROVIDE(net_arp_init = 0x00021465); PROVIDE(__aeabi_cfrcmple = 0x00010ea9); -PROVIDE(z_impl_device_deinit = 0x00049b03); -PROVIDE(ztls_accept_ctx = 0x0001f03d); -PROVIDE(cbpprintf_external = 0x0003d339); -PROVIDE(z_impl_log_buffered_cnt = 0x00013f81); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QAV_PARAM = 0x0002083d); -PROVIDE(mbedtls_ssl_read_version = 0x000494d9); -PROVIDE(mbedtls_rsa_rsassa_pss_sign = 0x00031f11); -PROVIDE(mbedtls_ssl_parse_finished = 0x000388e5); +PROVIDE(z_impl_device_deinit = 0x00049d1b); +PROVIDE(ztls_accept_ctx = 0x0001f22d); +PROVIDE(cbpprintf_external = 0x0003d551); +PROVIDE(z_impl_log_buffered_cnt = 0x00014171); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QAV_PARAM = 0x00020a2d); +PROVIDE(mbedtls_ssl_read_version = 0x000496f1); +PROVIDE(mbedtls_rsa_rsassa_pss_sign = 0x00032129); +PROVIDE(mbedtls_ssl_parse_finished = 0x00038afd); PROVIDE(flash_hp_enter_pe_cf_mode = 0x20000301); -PROVIDE(net_if_set_link_addr_locked = 0x0004154b); -PROVIDE(z_shell_cmd_line_erase = 0x0003e6e7); -PROVIDE(net_byte_to_hex = 0x00041a29); -PROVIDE(shell_hexdump_line = 0x00016081); -PROVIDE(k_work_submit_to_queue = 0x0004a337); -PROVIDE(usbd_config_set = 0x0001a555); -PROVIDE(_isr_wrapper = 0x00017c0d); -PROVIDE(mbedtls_ssl_fetch_input = 0x000363b5); -PROVIDE(R_USBD_XferAbort = 0x0002b801); -PROVIDE(z_impl_k_wakeup = 0x0003a501); +PROVIDE(net_if_set_link_addr_locked = 0x00041763); +PROVIDE(z_shell_cmd_line_erase = 0x0003e8ff); +PROVIDE(net_byte_to_hex = 0x00041c41); +PROVIDE(shell_hexdump_line = 0x00016271); +PROVIDE(k_work_submit_to_queue = 0x0004a54f); +PROVIDE(usbd_config_set = 0x0001a745); +PROVIDE(_isr_wrapper = 0x00017dfd); +PROVIDE(mbedtls_ssl_fetch_input = 0x000365cd); +PROVIDE(R_USBD_XferAbort = 0x0002ba19); +PROVIDE(z_impl_k_wakeup = 0x0003a719); PROVIDE(__divsi3 = 0x000101e5); -PROVIDE(flash_area_open = 0x000146ed); -PROVIDE(k_work_queue_start = 0x00039a71); -PROVIDE(z_shell_op_left_arrow = 0x0003e6a3); -PROVIDE(mbedtls_x509_parse_subject_alt_name = 0x00034b8d); -PROVIDE(net_tcp_update_recv_wnd = 0x00043ffb); -PROVIDE(usbd_ep_buf_alloc = 0x0003fd19); -PROVIDE(z_log_vprintk = 0x0003d965); -PROVIDE(net_if_carrier_on = 0x000419a1); +PROVIDE(flash_area_open = 0x000148dd); +PROVIDE(k_work_queue_start = 0x00039c89); +PROVIDE(z_shell_op_left_arrow = 0x0003e8bb); +PROVIDE(mbedtls_x509_parse_subject_alt_name = 0x00034da5); +PROVIDE(net_tcp_update_recv_wnd = 0x00044213); +PROVIDE(usbd_ep_buf_alloc = 0x0003ff31); +PROVIDE(z_log_vprintk = 0x0003db7d); +PROVIDE(net_if_carrier_on = 0x00041bb9); PROVIDE(__aeabi_d2lz = 0x00011091); -PROVIDE(mbedtls_pem_init = 0x00048fad); -PROVIDE(k_poll_event_init = 0x0004ac69); -PROVIDE(z_arm_fatal_error = 0x00016cf5); -PROVIDE(z_impl_net_socket_service_register = 0x0001f665); -PROVIDE(net_pkt_get_current_offset = 0x00042e49); -PROVIDE(net_pkt_available_payload_buffer = 0x00042b63); -PROVIDE(z_arm_hard_fault = 0x00017909); -PROVIDE(z_impl_llext_get_fn_table = 0x0001c891); -PROVIDE(z_impl_k_msgq_peek_at = 0x00049e23); -PROVIDE(z_shell_log_backend_output_func = 0x0003ea09); -PROVIDE(z_pend_curr = 0x0003a159); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXTIME_PARAM = 0x00020ab1); -PROVIDE(mbedtls_x509_crt_parse = 0x00035acd); -PROVIDE(net_pkt_append_buffer = 0x00042c17); -PROVIDE(net_eth_carrier_on = 0x00040cb9); -PROVIDE(k_work_busy_get = 0x0004a2f3); -PROVIDE(log_output_timestamp_freq_set = 0x000146c1); -PROVIDE(mbedtls_ssl_get_ciphersuite = 0x000497c5); -PROVIDE(fputc = 0x0004b397); -PROVIDE(__fpclassifyl = 0x0003ca85); -PROVIDE(mbedtls_ssl_parse_change_cipher_spec = 0x00036889); -PROVIDE(cbvprintf = 0x00017c31); -PROVIDE(z_impl_k_is_preempt_thread = 0x00039cbd); -PROVIDE(net_if_set_name = 0x00021d09); -PROVIDE(mbedtls_ssl_get_ciphersuite_name = 0x00035c39); -PROVIDE(net_udp_create = 0x00044275); -PROVIDE(z_impl_k_queue_peek_tail = 0x0004a11b); -PROVIDE(R_SCI_UART_Open = 0x00029cd5); -PROVIDE(z_impl_k_thread_suspend = 0x0003a069); -PROVIDE(net_if_ipv4_maddr_join = 0x00041783); -PROVIDE(regulator_common_data_init = 0x00045b9b); -PROVIDE(z_impl_k_thread_join = 0x0003a699); -PROVIDE(z_log_dropped = 0x00013f8d); -PROVIDE(net_pkt_alloc_with_buffer = 0x00022f41); -PROVIDE(mbedtls_ssl_list_ciphersuites = 0x00035bf5); -PROVIDE(mbedtls_rsa_complete = 0x00031189); -PROVIDE(R_ETHER_PHY_Read = 0x000467d5); -PROVIDE(net_calc_chksum = 0x00041c2d); -PROVIDE(udc_buf_get = 0x00044ca9); -PROVIDE(z_impl_sys_rand_get = 0x000190bd); -PROVIDE(_OffsetAbsSyms = 0x0003cc61); -PROVIDE(mbedtls_rsa_rsassa_pkcs1_v15_verify = 0x000321ad); -PROVIDE(shell_strtoul = 0x000162e1); -PROVIDE(usbd_device_get_vreq = 0x0003f70f); -PROVIDE(mbedtls_ssl_set_hostname = 0x00037cad); -PROVIDE(mbedtls_mpi_core_get_mont_r2_unsafe = 0x000475f9); -PROVIDE(net_icmp_init_ctx = 0x0002308d); -PROVIDE(mbedtls_ssl_md_alg_from_hash = 0x00038141); -PROVIDE(k_heap_init = 0x00049bbf); -PROVIDE(mbedtls_rsa_pkcs1_sign = 0x00032001); -PROVIDE(mbedtls_sha256_init = 0x00048ae7); -PROVIDE(mbedtls_pk_info_from_type = 0x00034465); -PROVIDE(isdigit = 0x0004addb); -PROVIDE(usbd_ep_clear_halt = 0x0003fd85); +PROVIDE(mbedtls_pem_init = 0x000491c5); +PROVIDE(k_poll_event_init = 0x0004ae81); +PROVIDE(z_arm_fatal_error = 0x00016ee5); +PROVIDE(z_impl_net_socket_service_register = 0x0001f855); +PROVIDE(net_pkt_get_current_offset = 0x00043061); +PROVIDE(net_pkt_available_payload_buffer = 0x00042d7b); +PROVIDE(z_arm_hard_fault = 0x00017af9); +PROVIDE(z_impl_llext_get_fn_table = 0x0001ca81); +PROVIDE(z_impl_k_msgq_peek_at = 0x0004a03b); +PROVIDE(z_shell_log_backend_output_func = 0x0003ec21); +PROVIDE(z_pend_curr = 0x0003a371); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXTIME_PARAM = 0x00020ca1); +PROVIDE(mbedtls_x509_crt_parse = 0x00035ce5); +PROVIDE(net_pkt_append_buffer = 0x00042e2f); +PROVIDE(net_eth_carrier_on = 0x00040ed1); +PROVIDE(k_work_busy_get = 0x0004a50b); +PROVIDE(log_output_timestamp_freq_set = 0x000148b1); +PROVIDE(mbedtls_ssl_get_ciphersuite = 0x000499dd); +PROVIDE(fputc = 0x0004b5af); +PROVIDE(__fpclassifyl = 0x0003cc9d); +PROVIDE(mbedtls_ssl_parse_change_cipher_spec = 0x00036aa1); +PROVIDE(cbvprintf = 0x00017e21); +PROVIDE(z_impl_k_is_preempt_thread = 0x00039ed5); +PROVIDE(net_if_set_name = 0x00021f21); +PROVIDE(mbedtls_ssl_get_ciphersuite_name = 0x00035e51); +PROVIDE(net_udp_create = 0x0004448d); +PROVIDE(z_impl_k_queue_peek_tail = 0x0004a333); +PROVIDE(R_SCI_UART_Open = 0x00029eed); +PROVIDE(z_impl_k_thread_suspend = 0x0003a281); +PROVIDE(net_if_ipv4_maddr_join = 0x0004199b); +PROVIDE(regulator_common_data_init = 0x00045db3); +PROVIDE(z_impl_k_thread_join = 0x0003a8b1); +PROVIDE(z_log_dropped = 0x0001417d); +PROVIDE(net_pkt_alloc_with_buffer = 0x00023159); +PROVIDE(mbedtls_ssl_list_ciphersuites = 0x00035e0d); +PROVIDE(mbedtls_rsa_complete = 0x000313a1); +PROVIDE(R_ETHER_PHY_Read = 0x000469ed); +PROVIDE(net_calc_chksum = 0x00041e45); +PROVIDE(udc_buf_get = 0x00044ec1); +PROVIDE(z_impl_sys_rand_get = 0x000192ad); +PROVIDE(_OffsetAbsSyms = 0x0003ce79); +PROVIDE(mbedtls_rsa_rsassa_pkcs1_v15_verify = 0x000323c5); +PROVIDE(shell_strtoul = 0x000164d1); +PROVIDE(usbd_device_get_vreq = 0x0003f927); +PROVIDE(mbedtls_ssl_set_hostname = 0x00037ec5); +PROVIDE(mbedtls_mpi_core_get_mont_r2_unsafe = 0x00047811); +PROVIDE(net_icmp_init_ctx = 0x000232a5); +PROVIDE(mbedtls_ssl_md_alg_from_hash = 0x00038359); +PROVIDE(k_heap_init = 0x00049dd7); +PROVIDE(mbedtls_rsa_pkcs1_sign = 0x00032219); +PROVIDE(mbedtls_sha256_init = 0x00048cff); +PROVIDE(mbedtls_pk_info_from_type = 0x0003467d); +PROVIDE(isdigit = 0x0004aff3); +PROVIDE(usbd_ep_clear_halt = 0x0003ff9d); PROVIDE(__aeabi_i2d = 0x000104b9); -PROVIDE(k_sched_lock = 0x0003a2d9); -PROVIDE(dns_resolve_reconfigure = 0x00026ed5); -PROVIDE(__aeabi_memmove8 = 0x0004ad5b); +PROVIDE(k_sched_lock = 0x0003a4f1); +PROVIDE(dns_resolve_reconfigure = 0x000270ed); +PROVIDE(__aeabi_memmove8 = 0x0004af73); PROVIDE(__aeabi_i2f = 0x00010d91); -PROVIDE(sys_clock_tick_get = 0x0003ac49); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_FILTER = 0x0002083d); -PROVIDE(bsp_prv_software_delay_loop = 0x00046235); -PROVIDE(net_context_sendto = 0x000425f5); -PROVIDE(z_impl_zsock_socketpair = 0x000202a5); -PROVIDE(mbedtls_cipher_info_from_type = 0x0002f411); -PROVIDE(mbedtls_ssl_reset_in_out_pointers = 0x00049473); -PROVIDE(sinl = 0x000120e9); -PROVIDE(z_arm_reset = 0x0001791d); +PROVIDE(sys_clock_tick_get = 0x0003ae61); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_FILTER = 0x00020a2d); +PROVIDE(bsp_prv_software_delay_loop = 0x0004644d); +PROVIDE(net_context_sendto = 0x0004280d); +PROVIDE(z_impl_zsock_socketpair = 0x00020495); +PROVIDE(mbedtls_cipher_info_from_type = 0x0002f629); +PROVIDE(mbedtls_ssl_reset_in_out_pointers = 0x0004968b); +PROVIDE(sinl = 0x000122d9); +PROVIDE(z_arm_reset = 0x00017b0d); PROVIDE(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT = 0x00000001); -PROVIDE(z_shell_has_wildcard = 0x0003ee23); -PROVIDE(R_SPI_CalculateBitrate = 0x0002a5cd); -PROVIDE(mbedtls_asn1_get_int = 0x00046f01); -PROVIDE(HW_SCE_SoftwareResetSub = 0x0002c2a9); -PROVIDE(__aeabi_memmove4 = 0x0004ad5b); -PROVIDE(z_impl_zsock_setsockopt = 0x0001d371); -PROVIDE(mbedtls_ssl_handshake_client_step = 0x00036ab1); -PROVIDE(net_if_ipv4_maddr_lookup = 0x00021885); -PROVIDE(mbedtls_mpi_sub_int = 0x00047ccb); -PROVIDE(net_mgmt_del_event_callback = 0x000224b1); -PROVIDE(putc_unlocked = 0x0004b397); -PROVIDE(shell_set_bypass = 0x0003e09d); -PROVIDE(net_ipv4_create_full = 0x000433e3); -PROVIDE(z_impl_device_is_ready = 0x00049aed); -PROVIDE(mbedtls_mpi_fill_random = 0x00048191); -PROVIDE(zvfs_get_fd_obj_and_vtable = 0x00013a51); -PROVIDE(mbedtls_x509_get_time = 0x00034929); -PROVIDE(udc_ep_enqueue = 0x00044f49); -PROVIDE(fcu_frdyi_isr = 0x0002a2bd); -PROVIDE(R_BSP_IrqCfgEnable = 0x00046251); -PROVIDE(cbprintf_package_convert = 0x00013559); -PROVIDE(ether_init_buffers = 0x00046b8b); -PROVIDE(net_pkt_init = 0x00043007); -PROVIDE(setsockopt = 0x0003f38f); -PROVIDE(z_impl_flash_fill = 0x00016c35); -PROVIDE(eth_pwm_clock_enable = 0x00013d39); -PROVIDE(net_context_accept = 0x000424d7); -PROVIDE(z_impl_zsock_listen = 0x0001d035); -PROVIDE(R_GPT_Stop = 0x0004642d); +PROVIDE(z_shell_has_wildcard = 0x0003f03b); +PROVIDE(R_SPI_CalculateBitrate = 0x0002a7e5); +PROVIDE(mbedtls_asn1_get_int = 0x00047119); +PROVIDE(HW_SCE_SoftwareResetSub = 0x0002c4c1); +PROVIDE(__aeabi_memmove4 = 0x0004af73); +PROVIDE(z_impl_zsock_setsockopt = 0x0001d561); +PROVIDE(mbedtls_ssl_handshake_client_step = 0x00036cc9); +PROVIDE(net_if_ipv4_maddr_lookup = 0x00021a9d); +PROVIDE(mbedtls_mpi_sub_int = 0x00047ee3); +PROVIDE(net_mgmt_del_event_callback = 0x000226c9); +PROVIDE(putc_unlocked = 0x0004b5af); +PROVIDE(shell_set_bypass = 0x0003e2b5); +PROVIDE(net_ipv4_create_full = 0x000435fb); +PROVIDE(z_impl_device_is_ready = 0x00049d05); +PROVIDE(mbedtls_mpi_fill_random = 0x000483a9); +PROVIDE(zvfs_get_fd_obj_and_vtable = 0x00013c41); +PROVIDE(mbedtls_x509_get_time = 0x00034b41); +PROVIDE(udc_ep_enqueue = 0x00045161); +PROVIDE(fcu_frdyi_isr = 0x0002a4d5); +PROVIDE(R_BSP_IrqCfgEnable = 0x00046469); +PROVIDE(cbprintf_package_convert = 0x00013749); +PROVIDE(ether_init_buffers = 0x00046da3); +PROVIDE(net_pkt_init = 0x0004321f); +PROVIDE(setsockopt = 0x0003f5a7); +PROVIDE(z_impl_flash_fill = 0x00016e25); +PROVIDE(eth_pwm_clock_enable = 0x00013f29); +PROVIDE(net_context_accept = 0x000426ef); +PROVIDE(z_impl_zsock_listen = 0x0001d225); +PROVIDE(R_GPT_Stop = 0x00046645); PROVIDE(clock_settime = 0x00011441); -PROVIDE(z_log_msg_finalize = 0x0003da11); -PROVIDE(mbedtls_ssl_finish_handshake_msg = 0x00049437); -PROVIDE(z_shell_write = 0x0003e71f); -PROVIDE(fs_open = 0x00018ca1); -PROVIDE(soc_early_init_hook = 0x00013cbd); -PROVIDE(zsock_getpeername_ctx = 0x0001e591); -PROVIDE(__kernel_cos = 0x00012211); -PROVIDE(mbedtls_md_free = 0x000484f9); -PROVIDE(z_shell_vt100_color_set = 0x00016429); -PROVIDE(net_tcp_get_supported_mss = 0x00043d0b); -PROVIDE(udc_ep_is_busy = 0x00044c55); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBU_PARAM = 0x0002083d); -PROVIDE(cdc_acm_buf_alloc = 0x0001b401); -PROVIDE(shell_prompt_change = 0x0003dffb); -PROVIDE(z_impl_k_thread_stack_alloc = 0x0004ad1b); -PROVIDE(net_tcp_tx_sem_get = 0x00044269); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_T1S_PARAM = 0x0002083d); -PROVIDE(isalnum = 0x0004ad9f); -PROVIDE(z_arm_bus_fault = 0x00017909); -PROVIDE(dns_unpack_answer = 0x000445d1); -PROVIDE(mbedtls_pk_get_type = 0x00049075); -PROVIDE(credentials_unlock = 0x00020465); -PROVIDE(net_pkt_alloc_buffer_raw = 0x00022d7d); -PROVIDE(R_BSP_IrqEnable = 0x0004623f); -PROVIDE(mbedtls_ssl_get_mode_from_ciphersuite = 0x000497af); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_PROMISC_MODE = 0x0002083d); -PROVIDE(log_output_process = 0x000143e1); -PROVIDE(usbd_get_descriptor = 0x0003f78d); -PROVIDE(net_pkt_update_length = 0x00042dc3); -PROVIDE(k_work_queue_init = 0x0004a357); -PROVIDE(mbedtls_md = 0x0002fbc1); -PROVIDE(z_arm_fault_init = 0x000178f1); -PROVIDE(usbd_device_register_vreq = 0x0003f737); -PROVIDE(net_buf_simple_max_len = 0x0003f4e9); -PROVIDE(arch_elf_relocate = 0x00016e9d); -PROVIDE(R_GPT_DutyCycleSet = 0x000464e7); -PROVIDE(llext_link = 0x0001c719); -PROVIDE(z_impl_k_yield = 0x0003a3f9); -PROVIDE(z_impl_hwinfo_get_device_id = 0x0002849d); +PROVIDE(z_log_msg_finalize = 0x0003dc29); +PROVIDE(mbedtls_ssl_finish_handshake_msg = 0x0004964f); +PROVIDE(z_shell_write = 0x0003e937); +PROVIDE(fs_open = 0x00018e91); +PROVIDE(soc_early_init_hook = 0x00013ead); +PROVIDE(zsock_getpeername_ctx = 0x0001e781); +PROVIDE(__kernel_cos = 0x00012401); +PROVIDE(mbedtls_md_free = 0x00048711); +PROVIDE(z_shell_vt100_color_set = 0x00016619); +PROVIDE(net_tcp_get_supported_mss = 0x00043f23); +PROVIDE(udc_ep_is_busy = 0x00044e6d); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBU_PARAM = 0x00020a2d); +PROVIDE(cdc_acm_buf_alloc = 0x0001b5f1); +PROVIDE(shell_prompt_change = 0x0003e213); +PROVIDE(z_impl_k_thread_stack_alloc = 0x0004af33); +PROVIDE(net_tcp_tx_sem_get = 0x00044481); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_T1S_PARAM = 0x00020a2d); +PROVIDE(isalnum = 0x0004afb7); +PROVIDE(z_arm_bus_fault = 0x00017af9); +PROVIDE(dns_unpack_answer = 0x000447e9); +PROVIDE(mbedtls_pk_get_type = 0x0004928d); +PROVIDE(credentials_unlock = 0x00020655); +PROVIDE(net_pkt_alloc_buffer_raw = 0x00022f95); +PROVIDE(R_BSP_IrqEnable = 0x00046457); +PROVIDE(mbedtls_ssl_get_mode_from_ciphersuite = 0x000499c7); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_PROMISC_MODE = 0x00020a2d); +PROVIDE(log_output_process = 0x000145d1); +PROVIDE(usbd_get_descriptor = 0x0003f9a5); +PROVIDE(net_pkt_update_length = 0x00042fdb); +PROVIDE(k_work_queue_init = 0x0004a56f); +PROVIDE(mbedtls_md = 0x0002fdd9); +PROVIDE(z_arm_fault_init = 0x00017ae1); +PROVIDE(usbd_device_register_vreq = 0x0003f94f); +PROVIDE(net_buf_simple_max_len = 0x0003f701); +PROVIDE(arch_elf_relocate = 0x0001708d); +PROVIDE(R_GPT_DutyCycleSet = 0x000466ff); +PROVIDE(llext_link = 0x0001c909); +PROVIDE(z_impl_k_yield = 0x0003a611); +PROVIDE(z_impl_hwinfo_get_device_id = 0x000286b5); PROVIDE(__unordsf2 = 0x00010f25); -PROVIDE(mbedtls_x509_crt_parse_der = 0x0004934f); -PROVIDE(net_tcp_listen = 0x00043ce1); -PROVIDE(maybe_flash_bootloader = 0x00012ff9); -PROVIDE(z_impl_flash_get_page_info_by_idx = 0x0004589d); -PROVIDE(__aeabi_memmove = 0x0004ad5b); -PROVIDE(z_shell_multiline_data_calc = 0x0003e13d); -PROVIDE(usbd_str_desc_get_idx = 0x0003f8d7); -PROVIDE(usbd_init_control_pipe = 0x0003f9a1); -PROVIDE(net_if_post_init = 0x00021ed5); -PROVIDE(udc_enable = 0x00045029); -PROVIDE(k_thread_foreach_unlocked = 0x0003a9a1); -PROVIDE(net_buf_simple_add_u8 = 0x0003f483); -PROVIDE(mbedtls_mpi_bitlen = 0x00047943); -PROVIDE(tolower = 0x0004ae47); -PROVIDE(net_arp_input = 0x00040ea9); -PROVIDE(z_impl_sys_csrand_get = 0x000190fd); -PROVIDE(__double_computePow5 = 0x0003c7f1); +PROVIDE(mbedtls_x509_crt_parse_der = 0x00049567); +PROVIDE(net_tcp_listen = 0x00043ef9); +PROVIDE(maybe_flash_bootloader = 0x000131e9); +PROVIDE(z_impl_flash_get_page_info_by_idx = 0x00045ab5); +PROVIDE(__aeabi_memmove = 0x0004af73); +PROVIDE(z_shell_multiline_data_calc = 0x0003e355); +PROVIDE(usbd_str_desc_get_idx = 0x0003faef); +PROVIDE(usbd_init_control_pipe = 0x0003fbb9); +PROVIDE(net_if_post_init = 0x000220ed); +PROVIDE(udc_enable = 0x00045241); +PROVIDE(k_thread_foreach_unlocked = 0x0003abb9); +PROVIDE(net_buf_simple_add_u8 = 0x0003f69b); +PROVIDE(mbedtls_mpi_bitlen = 0x00047b5b); +PROVIDE(tolower = 0x0004b05f); +PROVIDE(net_arp_input = 0x000410c1); +PROVIDE(z_impl_sys_csrand_get = 0x000192ed); +PROVIDE(__double_computePow5 = 0x0003ca09); PROVIDE(flash_hp_configuration_area_write = 0x2000027d); -PROVIDE(mbedtls_rsa_import = 0x000487f9); -PROVIDE(mbedtls_mpi_core_fill_random = 0x0004762d); -PROVIDE(net_context_is_reuseport_set = 0x00041edd); -PROVIDE(udc_ep_set_busy = 0x00044c65); -PROVIDE(z_log_get_tag = 0x0003d98b); -PROVIDE(mbedtls_mpi_mul_mpi = 0x00047cfb); -PROVIDE(net_if_ipv4_maddr_add = 0x0002181d); -PROVIDE(mbedtls_mpi_free = 0x0004775f); -PROVIDE(mbedtls_ssl_optimize_checksum = 0x00037c45); -PROVIDE(mbedtls_ssl_write_sig_alg_ext = 0x00038991); -PROVIDE(R_BSP_SourceClockHzGet = 0x00029ae1); -PROVIDE(net_buf_simple_add_be16 = 0x0003f4a7); -PROVIDE(net_tcp_connect = 0x00025289); -PROVIDE(mbedtls_mpi_core_sub_int = 0x000476e3); -PROVIDE(net_if_ipv4_get_ll = 0x0004161d); -PROVIDE(zsock_recvmsg_ctx = 0x0001e209); -PROVIDE(atof = 0x0004ae5f); -PROVIDE(isupper = 0x0004ae1f); -PROVIDE(z_impl_zsock_ioctl_impl = 0x0001d2b9); -PROVIDE(z_shell_op_char_insert = 0x00016659); -PROVIDE(k_thread_state_str = 0x00039cfd); -PROVIDE(net_pkt_read_be32 = 0x00042ce7); -PROVIDE(z_impl_net_addr_pton = 0x000220d1); -PROVIDE(net_context_listen = 0x0004208b); -PROVIDE(sendto = 0x0003f37f); -PROVIDE(move_thread_to_end_of_prio_q = 0x00039fd9); -PROVIDE(mbedtls_mpi_core_mul = 0x000474ff); -PROVIDE(k_mem_slab_free = 0x00049cd7); +PROVIDE(mbedtls_rsa_import = 0x00048a11); +PROVIDE(mbedtls_mpi_core_fill_random = 0x00047845); +PROVIDE(net_context_is_reuseport_set = 0x000420f5); +PROVIDE(udc_ep_set_busy = 0x00044e7d); +PROVIDE(z_log_get_tag = 0x0003dba3); +PROVIDE(mbedtls_mpi_mul_mpi = 0x00047f13); +PROVIDE(net_if_ipv4_maddr_add = 0x00021a35); +PROVIDE(mbedtls_mpi_free = 0x00047977); +PROVIDE(mbedtls_ssl_optimize_checksum = 0x00037e5d); +PROVIDE(mbedtls_ssl_write_sig_alg_ext = 0x00038ba9); +PROVIDE(R_BSP_SourceClockHzGet = 0x00029cf9); +PROVIDE(net_buf_simple_add_be16 = 0x0003f6bf); +PROVIDE(net_tcp_connect = 0x000254a1); +PROVIDE(mbedtls_mpi_core_sub_int = 0x000478fb); +PROVIDE(net_if_ipv4_get_ll = 0x00041835); +PROVIDE(zsock_recvmsg_ctx = 0x0001e3f9); +PROVIDE(atof = 0x0004b077); +PROVIDE(isupper = 0x0004b037); +PROVIDE(z_impl_zsock_ioctl_impl = 0x0001d4a9); +PROVIDE(z_shell_op_char_insert = 0x00016849); +PROVIDE(k_thread_state_str = 0x00039f15); +PROVIDE(net_pkt_read_be32 = 0x00042eff); +PROVIDE(z_impl_net_addr_pton = 0x000222e9); +PROVIDE(net_context_listen = 0x000422a3); +PROVIDE(sendto = 0x0003f597); +PROVIDE(move_thread_to_end_of_prio_q = 0x0003a1f1); +PROVIDE(mbedtls_mpi_core_mul = 0x00047717); +PROVIDE(k_mem_slab_free = 0x00049eef); PROVIDE(__udivmoddi4 = 0x000110bf); PROVIDE(__aeabi_fcmpge = 0x00010efd); -PROVIDE(z_impl_zsock_shutdown = 0x0001cf31); -PROVIDE(__ceil_log2pow5 = 0x0003c7a1); -PROVIDE(net_if_foreach = 0x00021be9); -PROVIDE(getopt = 0x00017e2d); -PROVIDE(mbedtls_pem_read_buffer = 0x00033e81); -PROVIDE(z_handle_obj_poll_events = 0x0004ac87); -PROVIDE(mbedtls_mpi_core_mla = 0x00047387); -PROVIDE(mbedtls_rsa_rsaes_pkcs1_v15_decrypt = 0x00031dad); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PORTS_NUM = 0x00020ab1); -PROVIDE(z_impl_k_thread_name_copy = 0x0004a3df); -PROVIDE(__wrap_free = 0x00017d6d); -PROVIDE(z_shell_cmd_get = 0x0001626d); +PROVIDE(z_impl_zsock_shutdown = 0x0001d121); +PROVIDE(__ceil_log2pow5 = 0x0003c9b9); +PROVIDE(net_if_foreach = 0x00021e01); +PROVIDE(getopt = 0x0001801d); +PROVIDE(mbedtls_pem_read_buffer = 0x00034099); +PROVIDE(z_handle_obj_poll_events = 0x0004ae9f); +PROVIDE(mbedtls_mpi_core_mla = 0x0004759f); +PROVIDE(mbedtls_rsa_rsaes_pkcs1_v15_decrypt = 0x00031fc5); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PORTS_NUM = 0x00020ca1); +PROVIDE(z_impl_k_thread_name_copy = 0x0004a5f7); +PROVIDE(__wrap_free = 0x00017f5d); +PROVIDE(z_shell_cmd_get = 0x0001645d); PROVIDE(__udivsi3 = 0x000101c1); -PROVIDE(toupper = 0x0004ae53); -PROVIDE(mbedtls_mpi_core_bigendian_to_host = 0x00047165); -PROVIDE(net_pkt_is_contiguous = 0x00042f7b); -PROVIDE(__rem_pio2 = 0x00011cf1); -PROVIDE(shell_start = 0x0003de8d); -PROVIDE(llext_read_symbol = 0x000401dd); -PROVIDE(llext_copy_strings = 0x000400a5); -PROVIDE(z_shell_find_cmd = 0x0003e357); -PROVIDE(z_impl___posix_clock_get_base = 0x00018111); -PROVIDE(udc_ep_disable_internal = 0x000270ed); -PROVIDE(regulator_common_init = 0x00045c8d); -PROVIDE(udc_ep_buf_set_setup = 0x00044d0f); -PROVIDE(z_shell_op_cond_next_line = 0x0003e54d); -PROVIDE(mbedtls_md_hmac_finish = 0x0002fd31); +PROVIDE(toupper = 0x0004b06b); +PROVIDE(mbedtls_mpi_core_bigendian_to_host = 0x0004737d); +PROVIDE(net_pkt_is_contiguous = 0x00043193); +PROVIDE(__rem_pio2 = 0x00011ee1); +PROVIDE(shell_start = 0x0003e0a5); +PROVIDE(llext_read_symbol = 0x000403f5); +PROVIDE(llext_copy_strings = 0x000402bd); +PROVIDE(z_shell_find_cmd = 0x0003e56f); +PROVIDE(z_impl___posix_clock_get_base = 0x00018301); +PROVIDE(udc_ep_disable_internal = 0x00027305); +PROVIDE(regulator_common_init = 0x00045ea5); +PROVIDE(udc_ep_buf_set_setup = 0x00044f27); +PROVIDE(z_shell_op_cond_next_line = 0x0003e765); +PROVIDE(mbedtls_md_hmac_finish = 0x0002ff49); PROVIDE(CONFIG_ARCH_HAS_TIMING_FUNCTIONS = 0x00000001); -PROVIDE(mbedtls_sha1_starts = 0x00032425); -PROVIDE(HW_SCE_SelfCheck1SubSub = 0x0002db55); -PROVIDE(z_shell_op_char_backspace = 0x0003e8c3); +PROVIDE(mbedtls_sha1_starts = 0x0003263d); +PROVIDE(HW_SCE_SelfCheck1SubSub = 0x0002dd6d); +PROVIDE(z_shell_op_char_backspace = 0x0003eadb); PROVIDE(__subdf3 = 0x0001021d); -PROVIDE(z_impl_zsock_fcntl_impl = 0x0001d269); -PROVIDE(atoi = 0x0004ae65); -PROVIDE(dns_dispatcher_svc_handler = 0x000261d9); -PROVIDE(net_try_send_data = 0x00041165); -PROVIDE(mbedtls_ssl_session_save = 0x00037d41); -PROVIDE(renesas_ra_eth_callback = 0x00027a71); -PROVIDE(usbd_device_set_code_triple = 0x0003f6b1); +PROVIDE(z_impl_zsock_fcntl_impl = 0x0001d459); +PROVIDE(atoi = 0x0004b07d); +PROVIDE(dns_dispatcher_svc_handler = 0x000263f1); +PROVIDE(net_try_send_data = 0x0004137d); +PROVIDE(mbedtls_ssl_session_save = 0x00037f59); +PROVIDE(renesas_ra_eth_callback = 0x00027c89); +PROVIDE(usbd_device_set_code_triple = 0x0003f8c9); PROVIDE(__ledf2 = 0x000109b9); -PROVIDE(mbedtls_ssl_tls12_write_client_hello_exts = 0x00036a75); -PROVIDE(mbedtls_ssl_encrypt_buf = 0x00035ef1); -PROVIDE(k_work_cancel_delayable = 0x0004a381); -PROVIDE(floorl = 0x0003cbb9); +PROVIDE(mbedtls_ssl_tls12_write_client_hello_exts = 0x00036c8d); +PROVIDE(mbedtls_ssl_encrypt_buf = 0x00036109); +PROVIDE(k_work_cancel_delayable = 0x0004a599); +PROVIDE(floorl = 0x0003cdd1); PROVIDE(__adddf3 = 0x00010221); -PROVIDE(mbedtls_mpi_mod_mpi = 0x00047e35); -PROVIDE(accept = 0x0003f33f); -PROVIDE(mbedtls_rsa_rsassa_pss_verify_ext = 0x00032041); -PROVIDE(regulator_set_mode = 0x00045c4f); -PROVIDE(arch_float_disable = 0x00017b4d); -PROVIDE(net_if_ipv4_maddr_leave = 0x0004175f); -PROVIDE(dns_dispatcher_init = 0x000264a1); +PROVIDE(mbedtls_mpi_mod_mpi = 0x0004804d); +PROVIDE(accept = 0x0003f557); +PROVIDE(mbedtls_rsa_rsassa_pss_verify_ext = 0x00032259); +PROVIDE(regulator_set_mode = 0x00045e67); +PROVIDE(arch_float_disable = 0x00017d3d); +PROVIDE(net_if_ipv4_maddr_leave = 0x00041977); +PROVIDE(dns_dispatcher_init = 0x000266b9); PROVIDE(__divdf3 = 0x000107e1); -PROVIDE(mbedtls_rsa_deduce_crt = 0x00048763); +PROVIDE(mbedtls_rsa_deduce_crt = 0x0004897b); PROVIDE(__aeabi_idiv = 0x000101e5); -PROVIDE(mbedtls_mpi_core_exp_mod_working_limbs = 0x0004768b); -PROVIDE(mbedtls_mpi_exp_mod_unsafe = 0x00048085); -PROVIDE(dns_resolve_init = 0x00026885); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBV_PARAM = 0x00020ab1); -PROVIDE(memchr = 0x0004ad25); -PROVIDE(ceill = 0x0003c9cd); -PROVIDE(mbedtls_ssl_session_init = 0x00049701); -PROVIDE(R_USBD_XferStart = 0x0002b651); -PROVIDE(usbd_interface_set = 0x0003fc1d); -PROVIDE(zvfs_close = 0x00013b55); -PROVIDE(HW_SCE_FwIntegrityCheck = 0x0002cc41); -PROVIDE(net_pkt_pull = 0x00042de3); +PROVIDE(mbedtls_mpi_core_exp_mod_working_limbs = 0x000478a3); +PROVIDE(mbedtls_mpi_exp_mod_unsafe = 0x0004829d); +PROVIDE(dns_resolve_init = 0x00026a9d); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBV_PARAM = 0x00020ca1); +PROVIDE(memchr = 0x0004af3d); +PROVIDE(ceill = 0x0003cbe5); +PROVIDE(mbedtls_ssl_session_init = 0x00049919); +PROVIDE(R_USBD_XferStart = 0x0002b869); +PROVIDE(usbd_interface_set = 0x0003fe35); +PROVIDE(zvfs_close = 0x00013d45); +PROVIDE(HW_SCE_FwIntegrityCheck = 0x0002ce59); +PROVIDE(net_pkt_pull = 0x00042ffb); PROVIDE(__aeabi_dcmplt = 0x00010a71); -PROVIDE(net_ipv4_finalize = 0x000434b7); -PROVIDE(z_impl_zsock_sendto = 0x0001d0e1); -PROVIDE(mbedtls_sha256_clone = 0x00048af9); -PROVIDE(zvfs_poll_internal = 0x0001882d); -PROVIDE(mbedtls_mpi_core_bitlen = 0x00047147); -PROVIDE(llext_bringup = 0x00040099); -PROVIDE(zsock_close_ctx = 0x0001d895); -PROVIDE(mbedtls_ssl_hash_from_md_alg = 0x00038155); -PROVIDE(z_thread_abort = 0x0003a555); -PROVIDE(k_free = 0x0004ad05); -PROVIDE(mbedtls_x509_get_ext = 0x00034b05); -PROVIDE(__kernel_tan = 0x00012bb9); -PROVIDE(z_unpend1_no_timeout = 0x0004a51d); -PROVIDE(z_impl_k_usleep = 0x0004a5cf); -PROVIDE(gpio_ra_isr = 0x00044a37); -PROVIDE(net_conn_input = 0x00023405); +PROVIDE(net_ipv4_finalize = 0x000436cf); +PROVIDE(z_impl_zsock_sendto = 0x0001d2d1); +PROVIDE(mbedtls_sha256_clone = 0x00048d11); +PROVIDE(zvfs_poll_internal = 0x00018a1d); +PROVIDE(mbedtls_mpi_core_bitlen = 0x0004735f); +PROVIDE(llext_bringup = 0x000402b1); +PROVIDE(zsock_close_ctx = 0x0001da85); +PROVIDE(mbedtls_ssl_hash_from_md_alg = 0x0003836d); +PROVIDE(z_thread_abort = 0x0003a76d); +PROVIDE(k_free = 0x0004af1d); +PROVIDE(mbedtls_x509_get_ext = 0x00034d1d); +PROVIDE(__kernel_tan = 0x00012da9); +PROVIDE(z_unpend1_no_timeout = 0x0004a735); +PROVIDE(z_impl_k_usleep = 0x0004a7e7); +PROVIDE(gpio_ra_isr = 0x00044c4f); +PROVIDE(net_conn_input = 0x0002361d); PROVIDE(__aeabi_dcmpgt = 0x00010aad); -PROVIDE(dns_copy_qname = 0x0004476f); -PROVIDE(z_impl_k_stack_push = 0x0004a17f); -PROVIDE(usbd_class_handle_xfer = 0x0003fb39); -PROVIDE(k_work_reschedule = 0x00039ba9); -PROVIDE(__log10Pow5 = 0x0003c789); -PROVIDE(z_getopt_global_state_update = 0x00017f25); -PROVIDE(arch_new_thread = 0x00017b0d); -PROVIDE(puts = 0x0003b1b5); -PROVIDE(z_impl_zsock_recvfrom = 0x0001d1a5); -PROVIDE(z_add_timeout = 0x0003aaad); -PROVIDE(z_impl_flash_get_page_info_by_offs = 0x00045895); -PROVIDE(z_impl_k_float_disable = 0x00049d47); -PROVIDE(z_impl_k_pipe_read = 0x0003a73d); -PROVIDE(mbedtls_rsa_rsassa_pss_verify = 0x0003217d); -PROVIDE(llext_free_inspection_data = 0x0001ba81); -PROVIDE(iic_master_tei_isr = 0x0002ab09); -PROVIDE(k_work_schedule = 0x00039b41); -PROVIDE(net_tcp_get_option = 0x0004421b); -PROVIDE(mbedtls_sha256_free = 0x00048aef); -PROVIDE(z_impl_z_zsock_getaddrinfo_internal = 0x0001cc69); -PROVIDE(__log10Pow2 = 0x0003c77d); -PROVIDE(R_USBD_Connect = 0x0002b421); -PROVIDE(dns_resolve_name = 0x00044a1d); -PROVIDE(mbedtls_asn1_traverse_sequence_of = 0x00046f73); -PROVIDE(k_thread_system_pool_assign = 0x0003af91); -PROVIDE(shell_fprintf_error = 0x0003dfdf); -PROVIDE(ldexp = 0x0003cafd); -PROVIDE(mbedtls_sha256_starts = 0x00033301); -PROVIDE(mbedtls_sha1_finish = 0x00048a15); -PROVIDE(isspace = 0x0004ae0b); -PROVIDE(mbedtls_sha1 = 0x00048aa7); -PROVIDE(usbd_class_get_by_config = 0x0003faf9); -PROVIDE(mbedtls_mpi_cmp_abs = 0x000479db); -PROVIDE(R_BSP_SubClockStabilizeWaitAfterReset = 0x00046233); -PROVIDE(z_impl_k_condvar_signal = 0x00039bb5); -PROVIDE(mbedtls_asn1_get_alg = 0x0004703b); -PROVIDE(net_if_call_link_cb = 0x00021ac9); +PROVIDE(dns_copy_qname = 0x00044987); +PROVIDE(z_impl_k_stack_push = 0x0004a397); +PROVIDE(usbd_class_handle_xfer = 0x0003fd51); +PROVIDE(k_work_reschedule = 0x00039dc1); +PROVIDE(__log10Pow5 = 0x0003c9a1); +PROVIDE(z_getopt_global_state_update = 0x00018115); +PROVIDE(arch_new_thread = 0x00017cfd); +PROVIDE(puts = 0x0003b3cd); +PROVIDE(z_impl_zsock_recvfrom = 0x0001d395); +PROVIDE(z_add_timeout = 0x0003acc5); +PROVIDE(z_impl_flash_get_page_info_by_offs = 0x00045aad); +PROVIDE(z_impl_k_float_disable = 0x00049f5f); +PROVIDE(z_impl_k_pipe_read = 0x0003a955); +PROVIDE(mbedtls_rsa_rsassa_pss_verify = 0x00032395); +PROVIDE(llext_free_inspection_data = 0x0001bc71); +PROVIDE(iic_master_tei_isr = 0x0002ad21); +PROVIDE(k_work_schedule = 0x00039d59); +PROVIDE(net_tcp_get_option = 0x00044433); +PROVIDE(mbedtls_sha256_free = 0x00048d07); +PROVIDE(z_impl_z_zsock_getaddrinfo_internal = 0x0001ce59); +PROVIDE(__log10Pow2 = 0x0003c995); +PROVIDE(R_USBD_Connect = 0x0002b639); +PROVIDE(dns_resolve_name = 0x00044c35); +PROVIDE(mbedtls_asn1_traverse_sequence_of = 0x0004718b); +PROVIDE(k_thread_system_pool_assign = 0x0003b1a9); +PROVIDE(shell_fprintf_error = 0x0003e1f7); +PROVIDE(ldexp = 0x0003cd15); +PROVIDE(mbedtls_sha256_starts = 0x00033519); +PROVIDE(mbedtls_sha1_finish = 0x00048c2d); +PROVIDE(isspace = 0x0004b023); +PROVIDE(mbedtls_sha1 = 0x00048cbf); +PROVIDE(usbd_class_get_by_config = 0x0003fd11); +PROVIDE(mbedtls_mpi_cmp_abs = 0x00047bf3); +PROVIDE(R_BSP_SubClockStabilizeWaitAfterReset = 0x0004644b); +PROVIDE(z_impl_k_condvar_signal = 0x00039dcd); +PROVIDE(mbedtls_asn1_get_alg = 0x00047253); +PROVIDE(net_if_call_link_cb = 0x00021ce1); PROVIDE(__floatsidf = 0x000104b9); -PROVIDE(z_init_thread_base = 0x0004a3f1); -PROVIDE(R_BSP_RegisterProtectDisable = 0x00029b91); -PROVIDE(net_if_ipv4_get_global_addr = 0x00041623); -PROVIDE(mbedtls_mpi_core_montmul_init = 0x00047541); -PROVIDE(z_impl_k_msgq_peek = 0x00049df1); -PROVIDE(z_impl_flash_get_page_count = 0x000458a7); +PROVIDE(z_init_thread_base = 0x0004a609); +PROVIDE(R_BSP_RegisterProtectDisable = 0x00029da9); +PROVIDE(net_if_ipv4_get_global_addr = 0x0004183b); +PROVIDE(mbedtls_mpi_core_montmul_init = 0x00047759); +PROVIDE(z_impl_k_msgq_peek = 0x0004a009); +PROVIDE(z_impl_flash_get_page_count = 0x00045abf); PROVIDE(mbedtls_sha512_starts = 0x00011611); -PROVIDE(z_impl_net_addr_ntop = 0x00021efd); -PROVIDE(mbedtls_cipher_crypt = 0x0002f845); -PROVIDE(__math_uflow = 0x00012fb9); -PROVIDE(shell_fprintf_normal = 0x0003dfa7); -PROVIDE(z_sched_wait = 0x0003a719); -PROVIDE(udc_ep_try_config = 0x00044d77); -PROVIDE(z_reschedule_irqlock = 0x0003a2b1); -PROVIDE(net_tcp_queue = 0x0004402f); -PROVIDE(net_pkt_alloc = 0x00022d5d); -PROVIDE(usbd_add_descriptor = 0x0003f7c1); -PROVIDE(mbedtls_md_clone = 0x0002f9d5); -PROVIDE(atol = 0x0004ae6d); -PROVIDE(z_impl_k_busy_wait = 0x00049acf); -PROVIDE(llext_fs_read = 0x00040271); -PROVIDE(R_GPT_Start = 0x00046437); -PROVIDE(mbedtls_ssl_write_handshake_msg_ext = 0x00036639); -PROVIDE(net_context_update_recv_wnd = 0x00042649); -PROVIDE(mbedtls_ssl_validate_ciphersuite = 0x00049ab3); -PROVIDE(__aeabi_read_tp = 0x0004b3c1); -PROVIDE(dns_resolve_cancel_with_name = 0x0002689d); -PROVIDE(net_rx_priority2tc = 0x00022fa1); -PROVIDE(__dtox_engine = 0x0004b255); -PROVIDE(k_heap_alloc = 0x00049c57); -PROVIDE(z_impl_zephyr_fputc = 0x00017c79); -PROVIDE(gmtime_r = 0x0003b03d); -PROVIDE(fs_tell = 0x00018f31); -PROVIDE(llext_teardown = 0x0004009f); -PROVIDE(putc = 0x0004b397); -PROVIDE(llext_fs_seek = 0x00040295); -PROVIDE(sprintf = 0x0003b24d); -PROVIDE(z_device_get_all_static = 0x00038de9); -PROVIDE(sys_clock_tick_get_32 = 0x0004a985); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PRIORITY_QUEUES_NUM = 0x00020ab1); +PROVIDE(z_impl_net_addr_ntop = 0x00022115); +PROVIDE(mbedtls_cipher_crypt = 0x0002fa5d); +PROVIDE(__math_uflow = 0x000131a9); +PROVIDE(shell_fprintf_normal = 0x0003e1bf); +PROVIDE(z_sched_wait = 0x0003a931); +PROVIDE(udc_ep_try_config = 0x00044f8f); +PROVIDE(z_reschedule_irqlock = 0x0003a4c9); +PROVIDE(net_tcp_queue = 0x00044247); +PROVIDE(net_pkt_alloc = 0x00022f75); +PROVIDE(usbd_add_descriptor = 0x0003f9d9); +PROVIDE(mbedtls_md_clone = 0x0002fbed); +PROVIDE(atol = 0x0004b085); +PROVIDE(z_impl_k_busy_wait = 0x00049ce7); +PROVIDE(llext_fs_read = 0x00040489); +PROVIDE(R_GPT_Start = 0x0004664f); +PROVIDE(mbedtls_ssl_write_handshake_msg_ext = 0x00036851); +PROVIDE(net_context_update_recv_wnd = 0x00042861); +PROVIDE(mbedtls_ssl_validate_ciphersuite = 0x00049ccb); +PROVIDE(__aeabi_read_tp = 0x0004b5d9); +PROVIDE(dns_resolve_cancel_with_name = 0x00026ab5); +PROVIDE(net_rx_priority2tc = 0x000231b9); +PROVIDE(atan2 = 0x00011c49); +PROVIDE(__dtox_engine = 0x0004b46d); +PROVIDE(k_heap_alloc = 0x00049e6f); +PROVIDE(z_impl_zephyr_fputc = 0x00017e69); +PROVIDE(gmtime_r = 0x0003b255); +PROVIDE(fs_tell = 0x00019121); +PROVIDE(llext_teardown = 0x000402b7); +PROVIDE(putc = 0x0004b5af); +PROVIDE(llext_fs_seek = 0x000404ad); +PROVIDE(sprintf = 0x0003b465); +PROVIDE(z_device_get_all_static = 0x00039001); +PROVIDE(sys_clock_tick_get_32 = 0x0004ab9d); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PRIORITY_QUEUES_NUM = 0x00020ca1); PROVIDE(flash_hp_check_errors = 0x2000022d); -PROVIDE(z_impl_k_poll_signal_reset = 0x0004accf); -PROVIDE(z_impl_k_thread_resume = 0x0003a275); -PROVIDE(arch_float_enable = 0x0003f06b); -PROVIDE(z_arm_nmi = 0x0003f00d); -PROVIDE(k_work_init_delayable = 0x0004a365); -PROVIDE(net_tc_rx_init = 0x00022fb1); -PROVIDE(udc_device_speed = 0x00044ffd); -PROVIDE(mbedtls_ssl_derive_keys = 0x00038411); -PROVIDE(HW_SCE_HUK_Load_LCS = 0x0002bf89); -PROVIDE(net_if_ipv4_addr_mask_cmp = 0x000415df); -PROVIDE(net_pkt_get_reserve_data = 0x00042a8b); -PROVIDE(__log2pow5 = 0x0003c795); -PROVIDE(R_GPT_Open = 0x0002ac71); -PROVIDE(log_source_name_get = 0x00014021); -PROVIDE(ring_buf_area_finish = 0x0003d819); -PROVIDE(memcpy = 0x0004ad41); -PROVIDE(mbedtls_oid_get_sig_alg = 0x00048675); -PROVIDE(mbedtls_ssl_write = 0x000369e5); +PROVIDE(z_impl_k_poll_signal_reset = 0x0004aee7); +PROVIDE(z_impl_k_thread_resume = 0x0003a48d); +PROVIDE(arch_float_enable = 0x0003f283); +PROVIDE(z_arm_nmi = 0x0003f225); +PROVIDE(k_work_init_delayable = 0x0004a57d); +PROVIDE(net_tc_rx_init = 0x000231c9); +PROVIDE(udc_device_speed = 0x00045215); +PROVIDE(mbedtls_ssl_derive_keys = 0x00038629); +PROVIDE(HW_SCE_HUK_Load_LCS = 0x0002c1a1); +PROVIDE(net_if_ipv4_addr_mask_cmp = 0x000417f7); +PROVIDE(net_pkt_get_reserve_data = 0x00042ca3); +PROVIDE(__log2pow5 = 0x0003c9ad); +PROVIDE(R_GPT_Open = 0x0002ae89); +PROVIDE(log_source_name_get = 0x00014211); +PROVIDE(ring_buf_area_finish = 0x0003da31); +PROVIDE(memcpy = 0x0004af59); +PROVIDE(mbedtls_oid_get_sig_alg = 0x0004888d); +PROVIDE(mbedtls_ssl_write = 0x00036bfd); PROVIDE(__nedf2 = 0x000109c1); -PROVIDE(z_shell_op_char_delete = 0x0003e885); -PROVIDE(net_if_ipv4_addr_lookup = 0x00021709); -PROVIDE(mbedtls_ssl_handshake_free = 0x00049831); -PROVIDE(zsock_getsockname_ctx = 0x0001e5f9); -PROVIDE(mbedtls_mpi_lsb = 0x0004791d); -PROVIDE(z_shell_op_cursor_position_synchronize = 0x0003e56b); -PROVIDE(z_fatal_error = 0x00038ed5); -PROVIDE(llext_free_regions = 0x0001ba39); -PROVIDE(z_impl_zsock_getpeername = 0x0001d3d9); -PROVIDE(mbedtls_sha512 = 0x00048e2b); -PROVIDE(z_shell_op_right_arrow = 0x0003e6b5); +PROVIDE(z_shell_op_char_delete = 0x0003ea9d); +PROVIDE(net_if_ipv4_addr_lookup = 0x00021921); +PROVIDE(mbedtls_ssl_handshake_free = 0x00049a49); +PROVIDE(zsock_getsockname_ctx = 0x0001e7e9); +PROVIDE(mbedtls_mpi_lsb = 0x00047b35); +PROVIDE(z_shell_op_cursor_position_synchronize = 0x0003e783); +PROVIDE(z_fatal_error = 0x000390ed); +PROVIDE(llext_free_regions = 0x0001bc29); +PROVIDE(z_impl_zsock_getpeername = 0x0001d5c9); +PROVIDE(mbedtls_sha512 = 0x00049043); +PROVIDE(z_shell_op_right_arrow = 0x0003e8cd); PROVIDE(__aeabi_fcmpgt = 0x00010f11); -PROVIDE(net_mgmt_event_notify_with_info = 0x000224dd); +PROVIDE(net_mgmt_event_notify_with_info = 0x000226f5); PROVIDE(__aeabi_l2f = 0x00010dbd); -PROVIDE(__pow5bits = 0x0003c7b1); -PROVIDE(sys_clock_cycle_get_64 = 0x0002997d); +PROVIDE(__pow5bits = 0x0003c9c9); +PROVIDE(sys_clock_cycle_get_64 = 0x00029b95); PROVIDE(atanl = 0x00011909); -PROVIDE(sys_timepoint_calc = 0x0004a991); -PROVIDE(z_sched_wake_thread = 0x0004a4db); -PROVIDE(z_impl_k_pipe_write = 0x0004a6f3); -PROVIDE(mbedtls_ssl_conf_own_cert = 0x00037c61); -PROVIDE(sys_clock_set_timeout = 0x0002981d); -PROVIDE(usbd_bus_speed = 0x0003f65d); -PROVIDE(R_IIC_MASTER_Write = 0x00046377); -PROVIDE(flash_area_write = 0x0003dbf7); -PROVIDE(strtod = 0x0003b29d); +PROVIDE(sys_timepoint_calc = 0x0004aba9); +PROVIDE(z_sched_wake_thread = 0x0004a6f3); +PROVIDE(z_impl_k_pipe_write = 0x0004a90b); +PROVIDE(mbedtls_ssl_conf_own_cert = 0x00037e79); +PROVIDE(sys_clock_set_timeout = 0x00029a35); +PROVIDE(usbd_bus_speed = 0x0003f875); +PROVIDE(R_IIC_MASTER_Write = 0x0004658f); +PROVIDE(flash_area_write = 0x0003de0f); +PROVIDE(strtod = 0x0003b4b5); PROVIDE(__aeabi_dadd = 0x00010221); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_AUTO_NEGOTIATION = 0x0002083d); -PROVIDE(mbedtls_cipher_set_padding_mode = 0x0002f811); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_AUTO_NEGOTIATION = 0x00020a2d); +PROVIDE(mbedtls_cipher_set_padding_mode = 0x0002fa29); PROVIDE(__aeabi_l2d = 0x00010531); -PROVIDE(mbedtls_mpi_lset = 0x000478c5); -PROVIDE(HW_SCE_p_func053 = 0x0002c0a5); +PROVIDE(mbedtls_mpi_lset = 0x00047add); +PROVIDE(HW_SCE_p_func053 = 0x0002c2bd); PROVIDE(strlen = 0x00011081); -PROVIDE(HW_SCE_p_func052 = 0x0002c06d); -PROVIDE(udc_renesas_ra_driver_preinit0 = 0x000273b1); -PROVIDE(mbedtls_ssl_conf_ca_chain = 0x00049799); -PROVIDE(R_ETHER_Read = 0x00046afb); -PROVIDE(net_buf_simple_pull = 0x0003f4c9); -PROVIDE(HW_SCE_p_func051 = 0x0002c04d); +PROVIDE(HW_SCE_p_func052 = 0x0002c285); +PROVIDE(udc_renesas_ra_driver_preinit0 = 0x000275c9); +PROVIDE(mbedtls_ssl_conf_ca_chain = 0x000499b1); +PROVIDE(R_ETHER_Read = 0x00046d13); +PROVIDE(net_buf_simple_pull = 0x0003f6e1); +PROVIDE(HW_SCE_p_func051 = 0x0002c265); PROVIDE(CONFIG_SYS_HASH_FUNC32_DJB2 = 0x00000001); -PROVIDE(z_arm_pendsv = 0x0001798d); -PROVIDE(mbedtls_internal_sha512_process = 0x000334fd); -PROVIDE(HW_SCE_p_func050 = 0x0002c025); -PROVIDE(mbedtls_x509_get_subject_alt_name = 0x00034e35); +PROVIDE(z_arm_pendsv = 0x00017b7d); +PROVIDE(mbedtls_internal_sha512_process = 0x00033715); +PROVIDE(HW_SCE_p_func050 = 0x0002c23d); +PROVIDE(mbedtls_x509_get_subject_alt_name = 0x0003504d); PROVIDE(__fixunsdfdi = 0x00011021); -PROVIDE(mbedtls_ssl_conf_cert_profile = 0x00049795); -PROVIDE(z_impl_k_msgq_get = 0x000393cd); -PROVIDE(mbedtls_mpi_add_abs = 0x00047af9); -PROVIDE(strtol = 0x0003b611); -PROVIDE(z_impl_zsock_gethostname = 0x000404b3); -PROVIDE(z_impl_k_thread_stack_free = 0x0004ad1f); -PROVIDE(net_tcp_init = 0x000255e5); -PROVIDE(mbedtls_aes_init = 0x00046c93); -PROVIDE(mbedtls_md_init = 0x000484ef); -PROVIDE(mbedtls_pk_parse_key = 0x00034339); -PROVIDE(mbedtls_rsa_rsaes_oaep_encrypt = 0x00031a6d); -PROVIDE(HW_SCE_p_func054 = 0x0002c0e1); -PROVIDE(llext_loaded_sect_ptr = 0x00040133); -PROVIDE(net_pkt_skip = 0x00042ca9); +PROVIDE(mbedtls_ssl_conf_cert_profile = 0x000499ad); +PROVIDE(z_impl_k_msgq_get = 0x000395e5); +PROVIDE(mbedtls_mpi_add_abs = 0x00047d11); +PROVIDE(strtol = 0x0003b829); +PROVIDE(z_impl_zsock_gethostname = 0x000406cb); +PROVIDE(z_impl_k_thread_stack_free = 0x0004af37); +PROVIDE(net_tcp_init = 0x000257fd); +PROVIDE(mbedtls_aes_init = 0x00046eab); +PROVIDE(mbedtls_md_init = 0x00048707); +PROVIDE(mbedtls_pk_parse_key = 0x00034551); +PROVIDE(mbedtls_rsa_rsaes_oaep_encrypt = 0x00031c85); +PROVIDE(HW_SCE_p_func054 = 0x0002c2f9); +PROVIDE(llext_loaded_sect_ptr = 0x0004034b); +PROVIDE(net_pkt_skip = 0x00042ec1); PROVIDE(__truncdfsf2 = 0x00010b7d); -PROVIDE(mbedtls_ssl_transform_init = 0x000496d1); +PROVIDE(mbedtls_ssl_transform_init = 0x000498e9); PROVIDE(__aeabi_uidiv = 0x000101c1); -PROVIDE(net_if_down = 0x00021c81); -PROVIDE(z_impl_net_if_ipv4_set_gw_by_index = 0x00041733); -PROVIDE(gpio_ra_interrupt_set = 0x00044a79); -PROVIDE(k_queue_append = 0x0004a0a3); -PROVIDE(net_icmpv4_create = 0x000430b7); -PROVIDE(zsock_shutdown_ctx = 0x0001d8f1); -PROVIDE(zvfs_open = 0x00018049); -PROVIDE(mbedtls_x509_free_subject_alt_name = 0x00049131); -PROVIDE(mbedtls_md5 = 0x000304f1); -PROVIDE(getaddrinfo = 0x0003f33b); -PROVIDE(R_FLASH_HP_Erase = 0x0002a1c1); -PROVIDE(udc_ctrl_update_stage = 0x000271bd); -PROVIDE(udc_ep_buf_clear_zlp = 0x00044d25); -PROVIDE(net_icmp_call_ipv4_handlers = 0x0004302b); -PROVIDE(net_if_addr_unref = 0x00021a45); -PROVIDE(strcasecmp = 0x0004ae9d); -PROVIDE(z_unpend_thread_no_timeout = 0x0004a4b9); -PROVIDE(z_impl_k_sem_reset = 0x00039749); -PROVIDE(z_impl_zsock_accept = 0x0001d089); +PROVIDE(net_if_down = 0x00021e99); +PROVIDE(z_impl_net_if_ipv4_set_gw_by_index = 0x0004194b); +PROVIDE(gpio_ra_interrupt_set = 0x00044c91); +PROVIDE(k_queue_append = 0x0004a2bb); +PROVIDE(net_icmpv4_create = 0x000432cf); +PROVIDE(zsock_shutdown_ctx = 0x0001dae1); +PROVIDE(zvfs_open = 0x00018239); +PROVIDE(mbedtls_x509_free_subject_alt_name = 0x00049349); +PROVIDE(mbedtls_md5 = 0x00030709); +PROVIDE(getaddrinfo = 0x0003f553); +PROVIDE(R_FLASH_HP_Erase = 0x0002a3d9); +PROVIDE(udc_ctrl_update_stage = 0x000273d5); +PROVIDE(udc_ep_buf_clear_zlp = 0x00044f3d); +PROVIDE(net_icmp_call_ipv4_handlers = 0x00043243); +PROVIDE(net_if_addr_unref = 0x00021c5d); +PROVIDE(strcasecmp = 0x0004b0b5); +PROVIDE(z_unpend_thread_no_timeout = 0x0004a6d1); +PROVIDE(z_impl_k_sem_reset = 0x00039961); +PROVIDE(z_impl_zsock_accept = 0x0001d279); PROVIDE(__eqdf2 = 0x000109c1); -PROVIDE(usbd_init = 0x0001911d); -PROVIDE(HW_SCE_SelfCheck3Sub = 0x0002d321); -PROVIDE(net_tc_submit_to_rx_queue = 0x00022f89); +PROVIDE(usbd_init = 0x0001930d); +PROVIDE(HW_SCE_SelfCheck3Sub = 0x0002d539); +PROVIDE(net_tc_submit_to_rx_queue = 0x000231a1); PROVIDE(__fixdfsi = 0x00010aed); -PROVIDE(mbedtls_ssl_session_reset = 0x000499af); -PROVIDE(k_queue_unique_append = 0x0004a0f5); -PROVIDE(z_dummy_thread_init = 0x00039ead); -PROVIDE(zvfs_eventfd = 0x00018721); -PROVIDE(net_dhcpv4_add_option_callback = 0x00026139); -PROVIDE(ceil = 0x0003c9cd); -PROVIDE(mbedtls_mpi_sub_mpi = 0x00047c93); -PROVIDE(z_impl_k_timer_start = 0x0003ad59); -PROVIDE(dns_dispatcher_register = 0x000262c9); -PROVIDE(mbedtls_rsa_private = 0x000314f9); +PROVIDE(mbedtls_ssl_session_reset = 0x00049bc7); +PROVIDE(k_queue_unique_append = 0x0004a30d); +PROVIDE(z_dummy_thread_init = 0x0003a0c5); +PROVIDE(zvfs_eventfd = 0x00018911); +PROVIDE(net_dhcpv4_add_option_callback = 0x00026351); +PROVIDE(ceil = 0x0003cbe5); +PROVIDE(mbedtls_mpi_sub_mpi = 0x00047eab); +PROVIDE(z_impl_k_timer_start = 0x0003af71); +PROVIDE(net_if_lookup_by_dev = 0x00021735); +PROVIDE(dns_dispatcher_register = 0x000264e1); +PROVIDE(mbedtls_rsa_private = 0x00031711); PROVIDE(__aeabi_ul2f = 0x00010dad); -PROVIDE(net_udp_finalize = 0x00025635); +PROVIDE(net_udp_finalize = 0x0002584d); PROVIDE(kheap_llext_heap = 0x200258c8); PROVIDE(kheap_llext_heap_size = 0x20000); PROVIDE(kheap__system_heap = 0x20054fd8); PROVIDE(kheap__system_heap_size = 32768); -PROVIDE(__device_dts_ord_64 = 0x000000000004b5f0); -PROVIDE(__device_dts_ord_68 = 0x000000000004b614); -PROVIDE(__device_dts_ord_39 = 0x000000000004b638); -PROVIDE(__device_dts_ord_67 = 0x000000000004b65c); -PROVIDE(__device_dts_ord_106 = 0x000000000004b680); -PROVIDE(__device_dts_ord_44 = 0x000000000004b6a4); -PROVIDE(__device_dts_ord_65 = 0x000000000004b6c8); -PROVIDE(__device_dts_ord_38 = 0x000000000004b6ec); -PROVIDE(__device_dts_ord_15 = 0x000000000004b710); -PROVIDE(__device_dts_ord_14 = 0x000000000004b734); -PROVIDE(__device_dts_ord_85 = 0x000000000004b758); -PROVIDE(__device_dts_ord_84 = 0x000000000004b77c); -PROVIDE(__device_dts_ord_31 = 0x000000000004b7a0); -PROVIDE(__device_dts_ord_8 = 0x000000000004b7c4); -PROVIDE(__device_dts_ord_30 = 0x000000000004b7e8); -PROVIDE(__device_dts_ord_29 = 0x000000000004b80c); -PROVIDE(__device_dts_ord_28 = 0x000000000004b830); -PROVIDE(__device_dts_ord_27 = 0x000000000004b854); -PROVIDE(__device_dts_ord_25 = 0x000000000004b878); -PROVIDE(__device_dts_ord_23 = 0x000000000004b89c); -PROVIDE(__device_dts_ord_22 = 0x000000000004b8c0); -PROVIDE(__device_dts_ord_20 = 0x000000000004b8e4); -PROVIDE(__device_dts_ord_54 = 0x000000000004b908); -PROVIDE(__device_dts_ord_105 = 0x000000000004b92c); -PROVIDE(__device_dts_ord_123 = 0x000000000004b950); -PROVIDE(__device_dts_ord_174 = 0x000000000004b974); -PROVIDE(__device_dts_ord_47 = 0x000000000004b998); -PROVIDE(__device_dts_ord_43 = 0x000000000004b9bc); -PROVIDE(__device_dts_ord_53 = 0x000000000004b9e0); -PROVIDE(__device_dts_ord_129 = 0x000000000004ba04); -PROVIDE(__device_dts_ord_124 = 0x000000000004ba28); -PROVIDE(__device_dts_ord_34 = 0x000000000004ba4c); -PROVIDE(__device_dts_ord_41 = 0x000000000004ba70); -PROVIDE(__device_dts_ord_94 = 0x000000000004ba94); -PROVIDE(__device_dts_ord_156 = 0x000000000004bab8); -PROVIDE(__device_dts_ord_81 = 0x000000000004badc); -PROVIDE(__device_dts_ord_82 = 0x000000000004bb00); -PROVIDE(__device_dts_ord_9 = 0x000000000004bb24); -PROVIDE(__device_dts_ord_83 = 0x000000000004bb48); +PROVIDE(__device_dts_ord_64 = 0x000000000004b808); +PROVIDE(__device_dts_ord_68 = 0x000000000004b82c); +PROVIDE(__device_dts_ord_39 = 0x000000000004b850); +PROVIDE(__device_dts_ord_67 = 0x000000000004b874); +PROVIDE(__device_dts_ord_106 = 0x000000000004b898); +PROVIDE(__device_dts_ord_44 = 0x000000000004b8bc); +PROVIDE(__device_dts_ord_65 = 0x000000000004b8e0); +PROVIDE(__device_dts_ord_38 = 0x000000000004b904); +PROVIDE(__device_dts_ord_15 = 0x000000000004b928); +PROVIDE(__device_dts_ord_14 = 0x000000000004b94c); +PROVIDE(__device_dts_ord_85 = 0x000000000004b970); +PROVIDE(__device_dts_ord_84 = 0x000000000004b994); +PROVIDE(__device_dts_ord_31 = 0x000000000004b9b8); +PROVIDE(__device_dts_ord_8 = 0x000000000004b9dc); +PROVIDE(__device_dts_ord_30 = 0x000000000004ba00); +PROVIDE(__device_dts_ord_29 = 0x000000000004ba24); +PROVIDE(__device_dts_ord_28 = 0x000000000004ba48); +PROVIDE(__device_dts_ord_27 = 0x000000000004ba6c); +PROVIDE(__device_dts_ord_25 = 0x000000000004ba90); +PROVIDE(__device_dts_ord_23 = 0x000000000004bab4); +PROVIDE(__device_dts_ord_22 = 0x000000000004bad8); +PROVIDE(__device_dts_ord_20 = 0x000000000004bafc); +PROVIDE(__device_dts_ord_54 = 0x000000000004bb20); +PROVIDE(__device_dts_ord_105 = 0x000000000004bb44); +PROVIDE(__device_dts_ord_123 = 0x000000000004bb68); +PROVIDE(__device_dts_ord_174 = 0x000000000004bb8c); +PROVIDE(__device_dts_ord_47 = 0x000000000004bbb0); +PROVIDE(__device_dts_ord_43 = 0x000000000004bbd4); +PROVIDE(__device_dts_ord_53 = 0x000000000004bbf8); +PROVIDE(__device_dts_ord_129 = 0x000000000004bc1c); +PROVIDE(__device_dts_ord_124 = 0x000000000004bc40); +PROVIDE(__device_dts_ord_34 = 0x000000000004bc64); +PROVIDE(__device_dts_ord_41 = 0x000000000004bc88); +PROVIDE(__device_dts_ord_94 = 0x000000000004bcac); +PROVIDE(__device_dts_ord_156 = 0x000000000004bcd0); +PROVIDE(__device_dts_ord_81 = 0x000000000004bcf4); +PROVIDE(__device_dts_ord_82 = 0x000000000004bd18); +PROVIDE(__device_dts_ord_9 = 0x000000000004bd3c); +PROVIDE(__device_dts_ord_83 = 0x000000000004bd60); PROVIDE(_sketch_start = 0x100000 ); diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/PinNames.cpp b/variants/arduino_portenta_h7_stm32h747xx_m7/PinNames.cpp new file mode 100644 index 00000000..cab9eb46 --- /dev/null +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/PinNames.cpp @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2024 Arduino SA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include "zephyrInternal.h" +#include "PinNames.h" + +// duplicate of one in zephyr common +static const struct gpio_dt_spec arduino_pins[] = { DT_FOREACH_PROP_ELEM_SEP( + DT_PATH(zephyr_user), digital_pin_gpios, GPIO_DT_SPEC_GET_BY_IDX, (, )) }; + +static const struct gpio_dt_spec arduino_ports[] = { DT_FOREACH_PROP_ELEM_SEP( + DT_PATH(zephyr_user), port_pin_gpios, GPIO_DT_SPEC_GET_BY_IDX, (, )) }; + + +void pinMode(PinName pinNumber, PinMode mode) { + // See if the pinName maps to a real pin number if so use the pin number version + int pin_index = PinNameToIndex(pinNumber); + if (pin_index != -1) { + // this will grab any settings out of the device tree. + pinMode((pin_size_t)pin_index, mode); + return; + } + + if (pinNumber & DUAL_PAD) return; + + if (mode == INPUT) { // input mode + gpio_pin_configure(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf, + GPIO_INPUT | GPIO_ACTIVE_HIGH); + } else if (mode == INPUT_PULLUP) { // input with internal pull-up + gpio_pin_configure(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf, + GPIO_INPUT | GPIO_PULL_UP | GPIO_ACTIVE_HIGH); + } else if (mode == INPUT_PULLDOWN) { // input with internal pull-down + gpio_pin_configure(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf, + GPIO_INPUT | GPIO_PULL_DOWN | GPIO_ACTIVE_HIGH); + } else if (mode == OUTPUT) { // output mode + gpio_pin_configure(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf, + GPIO_OUTPUT_LOW | GPIO_ACTIVE_HIGH); + } +} + +void digitalWrite(PinName pinNumber, PinStatus status) { + if (pinNumber & DUAL_PAD) return; + gpio_pin_set(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf, status); +} + + +PinStatus digitalRead(PinName pinNumber) { + if (pinNumber & DUAL_PAD) return LOW; + return (gpio_pin_get(arduino_ports[pinNumber >> 4].port, pinNumber & 0xf) == 1) ? HIGH : LOW; +} + +int analogRead(PinName pinNumber) { + // Not sure what to do here, does anyone do something like: + // analogRead(PA_0c); or analogRead(PC2_ALT0)? + // first pass only support ones on pins. + if (pinNumber & DUAL_PAD) { + switch (pinNumber & 0xf) { + case 0: return analogRead(A0); + case 1: return analogRead(A1); + case 2: return analogRead(A2); + case 3: return analogRead(A3); + default: return -1; + } + + } + int pin_index = PinNameToIndex(pinNumber); + if (pin_index != -1) { + return analogRead(pin_index); + } + return -1; +} + + +void analogWrite(PinName pinNumber, int value) { + // first pass only support ones on pins. + if (pinNumber & DUAL_PAD) return; + int pin_index = PinNameToIndex(pinNumber); + if (pin_index != -1) { + analogWrite(pin_index, value); + } +} + + + +int PinNameToIndex(PinName P) { + if (P & DUAL_PAD) return -1; + for (size_t i = 0; i < ARRAY_SIZE(arduino_pins); i++) { + if ((arduino_ports[P >> 4].port == arduino_pins[i].port) && ((P & 0xf) == arduino_pins[i].pin)) { + return i; + } + } + return -1; +} + +PinName digitalPinToPinName(pin_size_t P) { + if (P < ARRAY_SIZE(arduino_pins)) { + // Convert the pins port into an index into our port's list + for (uint8_t port_index = 0; port_index < ARRAY_SIZE(arduino_ports); port_index++) { + if (arduino_pins[P].port == arduino_ports[port_index].port) { + return (PinName)((port_index << 4) | arduino_pins[P].pin); + } + } + } + return PinName::NC; +} diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/PinNames.h b/variants/arduino_portenta_h7_stm32h747xx_m7/PinNames.h new file mode 100644 index 00000000..9f1ea444 --- /dev/null +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/PinNames.h @@ -0,0 +1,325 @@ +/* + * Copyright (c) 2024 Arduino SA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#ifndef ZEPHYR_PINNAMES_H +#define ZEPHYR_PINNAMES_H + +#ifdef __cplusplus +extern "C" { +#endif + +#define DUAL_PAD 0x800 + +typedef enum { + PA_0 = 0x00, + PA_1 = 0x01, + PA_2 = 0x02, + PA_3 = 0x03, + PA_4 = 0x04, + PA_5 = 0x05, + PA_6 = 0x06, + PA_7 = 0x07, + PA_8 = 0x08, + PA_9 = 0x09, + PA_10 = 0x0A, + PA_11 = 0x0B, + PA_12 = 0x0C, + PA_13 = 0x0D, + PA_14 = 0x0E, + PA_15 = 0x0F, + PB_0 = 0x10, + PB_1 = 0x11, + PB_2 = 0x12, + PB_3 = 0x13, + PB_4 = 0x14, + PB_5 = 0x15, + PB_6 = 0x16, + PB_7 = 0x17, + PB_8 = 0x18, + PB_9 = 0x19, + PB_10 = 0x1A, + PB_11 = 0x1B, + PB_12 = 0x1C, + PB_13 = 0x1D, + PB_14 = 0x1E, + PB_15 = 0x1F, + PC_0 = 0x20, + PC_1 = 0x21, + PC_2 = 0x22, + PC_3 = 0x23, + PC_4 = 0x24, + PC_5 = 0x25, + PC_6 = 0x26, + PC_7 = 0x27, + PC_8 = 0x28, + PC_9 = 0x29, + PC_10 = 0x2A, + PC_11 = 0x2B, + PC_12 = 0x2C, + PC_13 = 0x2D, + PC_14 = 0x2E, + PC_15 = 0x2F, + PD_0 = 0x30, + PD_1 = 0x31, + PD_2 = 0x32, + PD_3 = 0x33, + PD_4 = 0x34, + PD_5 = 0x35, + PD_6 = 0x36, + PD_7 = 0x37, + PD_8 = 0x38, + PD_9 = 0x39, + PD_10 = 0x3A, + PD_11 = 0x3B, + PD_12 = 0x3C, + PD_13 = 0x3D, + PD_14 = 0x3E, + PD_15 = 0x3F, + PE_0 = 0x40, + PE_1 = 0x41, + PE_2 = 0x42, + PE_3 = 0x43, + PE_4 = 0x44, + PE_5 = 0x45, + PE_6 = 0x46, + PE_7 = 0x47, + PE_8 = 0x48, + PE_9 = 0x49, + PE_10 = 0x4A, + PE_11 = 0x4B, + PE_12 = 0x4C, + PE_13 = 0x4D, + PE_14 = 0x4E, + PE_15 = 0x4F, + PF_0 = 0x50, + PF_1 = 0x51, + PF_2 = 0x52, + PF_3 = 0x53, + PF_4 = 0x54, + PF_5 = 0x55, + PF_6 = 0x56, + PF_7 = 0x57, + PF_8 = 0x58, + PF_9 = 0x59, + PF_10 = 0x5A, + PF_11 = 0x5B, + PF_12 = 0x5C, + PF_13 = 0x5D, + PF_14 = 0x5E, + PF_15 = 0x5F, + PG_0 = 0x60, + PG_1 = 0x61, + PG_2 = 0x62, + PG_3 = 0x63, + PG_4 = 0x64, + PG_5 = 0x65, + PG_6 = 0x66, + PG_7 = 0x67, + PG_8 = 0x68, + PG_9 = 0x69, + PG_10 = 0x6A, + PG_11 = 0x6B, + PG_12 = 0x6C, + PG_13 = 0x6D, + PG_14 = 0x6E, + PG_15 = 0x6F, + PH_0 = 0x70, + PH_1 = 0x71, + PH_2 = 0x72, + PH_3 = 0x73, + PH_4 = 0x74, + PH_5 = 0x75, + PH_6 = 0x76, + PH_7 = 0x77, + PH_8 = 0x78, + PH_9 = 0x79, + PH_10 = 0x7A, + PH_11 = 0x7B, + PH_12 = 0x7C, + PH_13 = 0x7D, + PH_14 = 0x7E, + PH_15 = 0x7F, + PI_0 = 0x80, + PI_1 = 0x81, + PI_2 = 0x82, + PI_3 = 0x83, + PI_4 = 0x84, + PI_5 = 0x85, + PI_6 = 0x86, + PI_7 = 0x87, + PI_8 = 0x88, + PI_9 = 0x89, + PI_10 = 0x8A, + PI_11 = 0x8B, + PI_12 = 0x8C, + PI_13 = 0x8D, + PI_14 = 0x8E, + PI_15 = 0x8F, + PJ_0 = 0x90, + PJ_1 = 0x91, + PJ_2 = 0x92, + PJ_3 = 0x93, + PJ_4 = 0x94, + PJ_5 = 0x95, + PJ_6 = 0x96, + PJ_7 = 0x97, + PJ_8 = 0x98, + PJ_9 = 0x99, + PJ_10 = 0x9A, + PJ_11 = 0x9B, + PJ_12 = 0x9C, + PJ_13 = 0x9D, + PJ_14 = 0x9E, + PJ_15 = 0x9F, + PK_0 = 0xA0, + PK_1 = 0xA1, + PK_2 = 0xA2, + PK_3 = 0xA3, + PK_4 = 0xA4, + PK_5 = 0xA5, + PK_6 = 0xA6, + PK_7 = 0xA7, + + // Lets add the Analog only pins, will name them like the schematic, but number like + PA_0C = 0X00 | DUAL_PAD, + PA_1C = 0X01 | DUAL_PAD, + PC_2C = 0X02 | DUAL_PAD, + PC_3C = 0X03 | DUAL_PAD, + + + WL_REG_ON = PJ_1, + WL_HOST_WAKE = PJ_5, + WL_SDIO_0 = PC_8, + WL_SDIO_1 = PC_9, + WL_SDIO_2 = PC_10, + WL_SDIO_3 = PC_11, + WL_SDIO_CMD = PD_2, + WL_SDIO_CLK = PC_12, + + /**** ADC internal channels ****/ + + ADC_TEMP = 0xF0, // Internal pin virtual value + ADC_VREF = 0xF1, // Internal pin virtual value + ADC_VBAT = 0xF2, // Internal pin virtual value + + //Led mappings + LED_RED = PK_5, //Red + LED_GREEN = PK_6, //Green + LED_BLUE = PK_7, //Blue + + CYBSP_BT_UART_RX = PF_6, + CYBSP_BT_UART_TX = PA_15, + CYBSP_BT_UART_RTS = PF_8, + CYBSP_BT_UART_CTS = PF_9, + + CYBSP_BT_POWER = PJ_12, + CYBSP_BT_HOST_WAKE = PJ_13, + CYBSP_BT_DEVICE_WAKE = PJ_14, + + /**** QSPI FLASH pins ****/ + QSPI_FLASH1_IO0 = PD_11, + QSPI_FLASH1_IO1 = PD_12, + QSPI_FLASH1_IO2 = PF_7, + QSPI_FLASH1_IO3 = PD_13, + QSPI_FLASH1_SCK = PF_10, + QSPI_FLASH1_CSN = PG_6, + + /**** USB FS pins ****/ + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + + /**** USB HS pins ****/ + USB_OTG_HS_DM = PB_14, + USB_OTG_HS_DP = PB_15, + USB_OTG_HS_ID = PB_12, + USB_OTG_HS_SOF = PA_4, + USB_OTG_HS_ULPI_CK = PA_5, + USB_OTG_HS_ULPI_D0 = PA_3, + USB_OTG_HS_ULPI_D1 = PB_0, + USB_OTG_HS_ULPI_D2 = PB_1, + USB_OTG_HS_ULPI_D3 = PB_10, + USB_OTG_HS_ULPI_D4 = PB_11, + USB_OTG_HS_ULPI_D5 = PB_12, + USB_OTG_HS_ULPI_D6 = PB_13, + USB_OTG_HS_ULPI_D7 = PB_5, + USB_OTG_HS_ULPI_DIR = PC_2, + USB_OTG_HS_ULPI_NXT = PC_3, + USB_OTG_HS_ULPI_STP = PC_0, + USB_OTG_HS_VBUS = PB_13, + + /**** ETHERNET pins ****/ + ETH_MDC = PC_1, + ETH_MDIO = PA_2, + ETH_CRS_DV = PA_7, + ETH_REF_CLK = PA_1, + ETH_RXD0 = PC_4, + ETH_RXD1 = PC_5, + ETH_RX_CLK = PA_1, + ETH_TXD0 = PG_13, + ETH_TXD1 = PG_12, + ETH_TX_EN = PG_11, + + /**** OSCILLATOR pins ****/ + RCC_OSC32_IN = PC_14, + RCC_OSC32_OUT = PC_15, + RCC_OSC_IN = PH_0, + RCC_OSC_OUT = PH_1, + + /**** DEBUG pins ****/ + SYS_JTCK_SWCLK = PA_14, + SYS_JTDI = PA_15, + SYS_JTDO_SWO = PB_3, + SYS_JTMS_SWDIO = PA_13, + SYS_JTRST = PB_4, + SYS_PVD_IN = PB_7, + SYS_TRACECLK = PE_2, + SYS_TRACED0 = PE_3, + SYS_TRACED0_ALT0 = PC_1, + SYS_TRACED0_ALT1 = PG_13, + SYS_TRACED1 = PE_4, + SYS_TRACED1_ALT0 = PC_8, + SYS_TRACED1_ALT1 = PG_14, + SYS_TRACED2 = PE_5, + SYS_TRACED2_ALT0 = PD_2, + SYS_TRACED3 = PE_6, + SYS_TRACED3_ALT0 = PC_12, + SYS_TRGIO = PC_7, + SYS_WKUP0 = PA_0, + SYS_WKUP1 = PA_2, + SYS_WKUP2 = PC_13, + SYS_WKUP5 = PC_1, + + // Not connected + NC = (int)0xFFFFFFFF +} PinName; + +// Standardized LED and button names +#define LED1 LED_RED +#define LED2 LED_GREEN +#define LED3 LED_BLUE +#define BUTTON1 PC_13 + + + +#ifdef __cplusplus + +} + +// overloads - only cpp as c does not allow overloads of functions +void pinMode(PinName pinNumber, PinMode mode); +void digitalWrite(PinName pinNumber, PinStatus status); +int PinNameToIndex(PinName P); +PinName digitalPinToPinName(pin_size_t P); +PinStatus digitalRead(PinName pinNumber); +int analogRead(PinName pinNumber); +void analogWrite(PinName pinNumber, int value); + +#endif + +#endif diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf b/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf index acee48b1..567c7e2f 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.conf @@ -11,6 +11,9 @@ CONFIG_CDC_ACM_DTE_RATE_CALLBACK_SUPPORT=y CONFIG_LLEXT_STORAGE_WRITABLE=n +CONFIG_SHARED_MULTI_HEAP=y +CONFIG_HEAP_MEM_POOL_SIZE=2048 + CONFIG_FPU=y CONFIG_ICACHE=y CONFIG_DCACHE=y @@ -24,8 +27,12 @@ CONFIG_SHELL_STACK_SIZE=32768 CONFIG_MAIN_STACK_SIZE=32768 CONFIG_LLEXT_HEAP_SIZE=128 -#CONFIG_ADC=y -#CONFIG_PWM=y +CONFIG_ADC=y +CONFIG_PWM=y +CONFIG_DMA=y +CONFIG_MEMC=y +CONFIG_SPI_ASYNC=y +CONFIG_SPI_STM32_INTERRUPT=y CONFIG_NET_CORE_LOG_LEVEL_DBG=y @@ -78,3 +85,15 @@ CONFIG_MBEDTLS_HEAP_SIZE=60000 CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN=7168 CONFIG_MBEDTLS_HASH_ALL_ENABLED=y CONFIG_MBEDTLS_CMAC=y + + +CONFIG_VIDEO=y +CONFIG_VIDEO_LOG_LEVEL_DBG=y +CONFIG_VIDEO_STM32_DCMI=y +CONFIG_VIDEO_BUFFER_POOL_NUM_MAX=3 +CONFIG_VIDEO_BUFFER_POOL_SZ_MAX=614400 +CONFIG_VIDEO_BUFFER_POOL_ALIGN=32 +CONFIG_VIDEO_BUFFER_USE_SHARED_MULTI_HEAP=y +CONFIG_VIDEO_BUFFER_SMH_ATTRIBUTE=2 +CONFIG_VIDEO_GC2145=y +CONFIG_FLASH=y diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.overlay b/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.overlay index 88485a23..690cae02 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.overlay +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/arduino_portenta_h7_stm32h747xx_m7.overlay @@ -14,20 +14,243 @@ status = "okay"; }; +&i2c3 { + status = "okay"; + gc2145: gc2145@3c { + compatible = "galaxycore,gc2145"; + reg = <0x3c>; + //ov7670: ov7670@21 { + // compatible = "ovti,ov7670"; + // reg = <0x21>; + reset-gpios = <&gpioe 3 GPIO_ACTIVE_LOW>; + pwdn-gpios = <&gpiod 5 GPIO_ACTIVE_LOW>; + + port { + gc2145_ep_out: endpoint { + //ov7670_ep_out: endpoint { + remote-endpoint = <&dcmi_ep_in>; + }; + }; + }; +}; + +&i2c1 { + status = "okay"; +}; + &i2c4 { status = "okay"; }; +&spi2 { + status = "okay"; + pinctrl-0 = <&spi2_sck_pi1 + &spi2_miso_pc2 &spi2_mosi_pc3>; + pinctrl-names = "default"; +}; + +&timers1 { + status = "okay"; + st,prescaler = <0>; + + pwm1: pwm { + status = "okay"; + pinctrl-0 = <&tim1_ch1_pa8 &tim1_ch2_pj11>; + pinctrl-names = "default"; + }; +}; + +&timers3 { + status = "okay"; + st,prescaler = <100>; + + pwm3: pwm { + status = "okay"; + pinctrl-0 = <&tim3_ch1_pc6 &tim3_ch2_pc7>; + pinctrl-names = "default"; + }; +}; + +&timers8 { + status = "okay"; + st,prescaler = <100>; + + pwm8: pwm { + status = "okay"; + pinctrl-0 = <&tim8_ch3n_ph15 &tim8_ch2_pj10 &tim8_ch2n_pj7>; + pinctrl-names = "default"; + }; +}; + +&timers12 { + status = "okay"; + st,prescaler = <100>; + + pwm12: pwm { + status = "okay"; + pinctrl-0 = <&tim12_ch1_ph6>; + pinctrl-names = "default"; + }; +}; + +&pwm1 { + /* Use the pwmclock node to start the clock generation */ + pwmclock: pwmclock { + status = "okay"; + compatible = "pwm-clock"; + clock-frequency = <0>; + #clock-cells = <1>; + pwms = <&pwm1 1 PWM_HZ(12000000) PWM_POLARITY_NORMAL>; + //12mhz for 7670, default is also 12MHz + }; +}; + &rng { status = "okay"; }; +&dmamux1 { + status = "okay"; +}; + +&dma1 { + status = "okay"; +}; + +&dcmi { + status = "okay"; + sensor = <&gc2145>; + //sensor = <&ov7670>; + /* ext-sdram = <&sdram1>; */ + pinctrl-0 = <&dcmi_hsync_pa4 &dcmi_pixclk_pa6 &dcmi_vsync_pi5 + &dcmi_d0_ph9 &dcmi_d1_ph10 &dcmi_d2_ph11 &dcmi_d3_ph12 + &dcmi_d4_ph14 &dcmi_d5_pi4 &dcmi_d6_pi6 &dcmi_d7_pi7>; + pinctrl-names = "default"; + bus-width = <8>; + hsync-active = <0>; + vsync-active = <0>; + pixelclk-active = <0>; + capture-rate = <1>; + dmas = <&dma1 0 75 (STM32_DMA_PERIPH_TO_MEMORY | STM32_DMA_PERIPH_NO_INC | + STM32_DMA_MEM_INC | STM32_DMA_PERIPH_32BITS | STM32_DMA_MEM_32BITS | + STM32_DMA_PRIORITY_HIGH) STM32_DMA_FIFO_FULL>; + //FULL for 7670, default FIFO_1_4 + + port { + dcmi_ep_in: endpoint { + remote-endpoint = <&gc2145_ep_out>; + //remote-endpoint = <&ov7670_ep_out>; + }; + }; +}; + + +&adc1 { + pinctrl-0 = <&adc1_inp12_pc2 + &adc1_inp13_pc3 + &adc1_inp18_pa4 + &adc1_inp3_pa6 + &adc1_inp0_pa0_c + &adc1_inp1_pa1_c>; + pinctrl-names = "default"; + st,adc-clock-source = "SYNC"; + st,adc-prescaler = <4>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + channel@c { + reg = <12>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <16>; + }; + channel@d { + reg = <13>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <16>; + }; + channel@12 { + reg = <18>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <16>; + }; + channel@3 { + reg = <3>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <16>; + }; + + /* PA0_C and PA1_C */ + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <16>; + }; + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <16>; + }; +}; + +&adc3 { + pinctrl-0 = <&adc3_inp0_pc2_c + &adc3_inp1_pc3_c>; + pinctrl-names = "default"; + st,adc-clock-source = "SYNC"; + st,adc-prescaler = <4>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <16>; + }; + channel@1 { + reg = <1>; + zephyr,gain = "ADC_GAIN_1"; + zephyr,reference = "ADC_REF_INTERNAL"; + zephyr,acquisition-time = ; + zephyr,resolution = <16>; + }; +}; + + / { chosen { + zephyr,camera = &dcmi; zephyr,console = &usart6; zephyr,shell-uart = &usart6; zephyr,cdc-acm-uart0 = &usart6; }; + + /* used to overcome problems with _C analog pins */ + gpioz: gpio@deadbeef { + compatible = "vnd,gpio"; + gpio-controller; + reg = <0xdeadbeef 0x1000>; + #gpio-cells = <0x2>; + status = "okay"; + }; + }; / { @@ -59,29 +282,272 @@ / { zephyr,user { - digital-pin-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>, - <&gpiok 1 GPIO_ACTIVE_LOW>, - <&gpioj 11 GPIO_ACTIVE_LOW>, - <&gpiog 7 GPIO_ACTIVE_LOW>, - <&gpioc 7 GPIO_ACTIVE_LOW>, - <&gpioc 6 GPIO_ACTIVE_LOW>, - <&gpioa 8 GPIO_ACTIVE_LOW>, - <&gpioi 0 GPIO_ACTIVE_LOW>, - <&gpioc 3 GPIO_ACTIVE_LOW>, - <&gpioi 1 GPIO_ACTIVE_LOW>, - <&gpioc 2 GPIO_ACTIVE_LOW>, - <&gpioh 8 GPIO_ACTIVE_LOW>, - <&gpioh 7 GPIO_ACTIVE_LOW>, - <&gpioa 10 GPIO_ACTIVE_LOW>, - <&gpioa 9 GPIO_ACTIVE_LOW>, - <&gpiok 5 GPIO_ACTIVE_LOW>; // LEDR + digital-pin-gpios = <&gpioh 15 GPIO_ACTIVE_LOW>, /* D0 */ + <&gpiok 1 GPIO_ACTIVE_LOW>, /* D1 */ + <&gpioj 11 GPIO_ACTIVE_LOW>, /* D2 */ + <&gpiog 7 GPIO_ACTIVE_LOW>, /* D3 */ + <&gpioc 7 GPIO_ACTIVE_LOW>, /* D4 */ + <&gpioc 6 GPIO_ACTIVE_LOW>, /* D5 */ + <&gpioa 8 GPIO_ACTIVE_LOW>, /* D6 */ + <&gpioi 0 GPIO_ACTIVE_LOW>, /* D7 */ + <&gpioc 3 GPIO_ACTIVE_LOW>, /* D8 */ + <&gpioi 1 GPIO_ACTIVE_LOW>, /* D9 */ + <&gpioc 2 GPIO_ACTIVE_LOW>, /* D10 */ + <&gpioh 8 GPIO_ACTIVE_LOW>, /* D11 */ + <&gpioh 7 GPIO_ACTIVE_LOW>, /* D12 */ + <&gpioa 10 GPIO_ACTIVE_LOW>, /* D13 */ + <&gpioa 9 GPIO_ACTIVE_LOW>, /* D14 */ + + <&gpioz 0 GPIO_ACTIVE_LOW>, /* A0 ADC2_INP0 */ + <&gpioz 1 GPIO_ACTIVE_LOW>, /* A1 ADC2_INP1 */ + <&gpioz 2 GPIO_ACTIVE_LOW>, /* A2 ADC3_INP0 */ + <&gpioz 3 GPIO_ACTIVE_LOW>, /* A3 ADC3_INP1 */ + <&gpioz 4 GPIO_ACTIVE_LOW>, /* A4 hack for duplicate PC_2 */ + <&gpioz 5 GPIO_ACTIVE_LOW>, /* A5 hack for duplicate PC_3 */ + /* <&gpioc 2 GPIO_ACTIVE_LOW>, A4 _ALT0? ADC1_INP12 */ + /* <&gpioc 3 GPIO_ACTIVE_LOW>, A5 _ALT0? ADC1_INP13 */ + <&gpioa 4 GPIO_ACTIVE_LOW>, /* A6 ADC1_INP18 */ + <&gpioa 6 GPIO_ACTIVE_LOW>, /* A7 ADC1_INP7 */ + + + <&gpiok 5 GPIO_ACTIVE_LOW>, // LEDR + <&gpiok 6 GPIO_ACTIVE_LOW>, // LEDG + <&gpiok 7 GPIO_ACTIVE_LOW>, // LEDB + + <&gpioa 0 GPIO_ACTIVE_LOW>, + /* <&gpioa 1 GPIO_ACTIVE_LOW>, */ + /* <&gpioa 2 GPIO_ACTIVE_LOW>, */ + /* <&gpioa 3 GPIO_ACTIVE_LOW>, */ + /* D21 <&gpioa 4 GPIO_ACTIVE_LOW>, */ + /* <&gpioa 5 GPIO_ACTIVE_LOW>, */ + /* D22 <&gpioa 6 GPIO_ACTIVE_LOW>, */ + /* <&gpioa 7 GPIO_ACTIVE_LOW>, */ + /* D6 <&gpioa 8 GPIO_ACTIVE_LOW>, */ + /* D14<&gpioa 9 GPIO_ACTIVE_LOW>, */ + /* D13 <&gpioa 10 GPIO_ACTIVE_LOW>, */ + <&gpioa 11 GPIO_ACTIVE_LOW>, + <&gpioa 12 GPIO_ACTIVE_LOW>, + <&gpioa 13 GPIO_ACTIVE_LOW>, + <&gpioa 14 GPIO_ACTIVE_LOW>, + /* <&gpioa 15 GPIO_ACTIVE_LOW>, */ + /* <&gpiob 0 GPIO_ACTIVE_LOW>, */ + /* <&gpiob 1 GPIO_ACTIVE_LOW>, */ + <&gpiob 2 GPIO_ACTIVE_LOW>, + <&gpiob 3 GPIO_ACTIVE_LOW>, + <&gpiob 4 GPIO_ACTIVE_LOW>, + /* <&gpiob 5 GPIO_ACTIVE_LOW>, */ + <&gpiob 6 GPIO_ACTIVE_LOW>, + <&gpiob 7 GPIO_ACTIVE_LOW>, + <&gpiob 8 GPIO_ACTIVE_LOW>, + <&gpiob 9 GPIO_ACTIVE_LOW>, + /* <&gpiob 10 GPIO_ACTIVE_LOW>, */ + /* <&gpiob 11 GPIO_ACTIVE_LOW>, */ + /* <&gpiob 12 GPIO_ACTIVE_LOW>, */ + /* <&gpiob 13 GPIO_ACTIVE_LOW>, */ + <&gpiob 14 GPIO_ACTIVE_LOW>, + <&gpiob 15 GPIO_ACTIVE_LOW>, + /* <&gpioc 0 GPIO_ACTIVE_LOW>, */ + /* <&gpioc 1 GPIO_ACTIVE_LOW>, */ + /* D10 <&gpioc 2 GPIO_ACTIVE_LOW>, */ + /* D8 <&gpioc 3 GPIO_ACTIVE_LOW>, */ + /* <&gpioc 4 GPIO_ACTIVE_LOW>, */ + /* <&gpioc 5 GPIO_ACTIVE_LOW>, */ + /* D5<&gpioc 6 GPIO_ACTIVE_LOW>, */ + /* D4<&gpioc 7 GPIO_ACTIVE_LOW>, */ + /* <&gpioc 8 GPIO_ACTIVE_LOW>, */ + /* <&gpioc 9 GPIO_ACTIVE_LOW>, */ + /* <&gpioc 10 GPIO_ACTIVE_LOW>, */ + /* <&gpioc 11 GPIO_ACTIVE_LOW>, */ + /* <&gpioc 12 GPIO_ACTIVE_LOW>, */ + <&gpioc 13 GPIO_ACTIVE_LOW>, + /* <&gpioc 14 GPIO_ACTIVE_LOW>, */ + <&gpioc 15 GPIO_ACTIVE_LOW>, + /* <&gpiod 0 GPIO_ACTIVE_LOW>, */ + /* <&gpiod 1 GPIO_ACTIVE_LOW>, */ + /* <&gpiod 2 GPIO_ACTIVE_LOW>, */ + <&gpiod 3 GPIO_ACTIVE_LOW>, + <&gpiod 4 GPIO_ACTIVE_LOW>, + <&gpiod 5 GPIO_ACTIVE_LOW>, + <&gpiod 6 GPIO_ACTIVE_LOW>, + <&gpiod 7 GPIO_ACTIVE_LOW>, + /* <&gpiod 8 GPIO_ACTIVE_LOW>, */ + /* <&gpiod 9 GPIO_ACTIVE_LOW>, */ + /* <&gpiod 10 GPIO_ACTIVE_LOW>, */ + /* <&gpiod 11 GPIO_ACTIVE_LOW>, */ + /* <&gpiod 12 GPIO_ACTIVE_LOW>, */ + /* <&gpiod 13 GPIO_ACTIVE_LOW>, */ + /* <&gpiod 14 GPIO_ACTIVE_LOW>, */ + /* <&gpiod 15 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 0 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 1 GPIO_ACTIVE_LOW>, */ + <&gpioe 2 GPIO_ACTIVE_LOW>, + <&gpioe 3 GPIO_ACTIVE_LOW>, + /* <&gpioe 4 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 5 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 6 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 7 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 8 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 9 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 10 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 11 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 12 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 13 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 14 GPIO_ACTIVE_LOW>, */ + /* <&gpioe 15 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 0 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 1 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 2 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 3 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 4 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 5 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 6 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 7 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 8 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 9 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 10 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 11 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 12 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 13 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 14 GPIO_ACTIVE_LOW>, */ + /* <&gpiof 15 GPIO_ACTIVE_LOW>, */ + /* <&gpiog 0 GPIO_ACTIVE_LOW>, */ + /* <&gpiog 1 GPIO_ACTIVE_LOW>, */ + /* <&gpiog 2 GPIO_ACTIVE_LOW>, */ + <&gpiog 3 GPIO_ACTIVE_LOW>, + /* <&gpiog 4 GPIO_ACTIVE_LOW>, */ + /* <&gpiog 5 GPIO_ACTIVE_LOW>, */ + /* <&gpiog 6 GPIO_ACTIVE_LOW>, */ + /* D3 <&gpiog 7 GPIO_ACTIVE_LOW>, */ + /* <&gpiog 8 GPIO_ACTIVE_LOW>, */ + <&gpiog 9 GPIO_ACTIVE_LOW>, + <&gpiog 10 GPIO_ACTIVE_LOW>, + /* <&gpiog 11 GPIO_ACTIVE_LOW>, */ + /* <&gpiog 12 GPIO_ACTIVE_LOW>, */ + /* <&gpiog 13 GPIO_ACTIVE_LOW>, */ + <&gpiog 14 GPIO_ACTIVE_LOW>, + /* <&gpiog 15 GPIO_ACTIVE_LOW>, */ + /* <&gpioh 0 GPIO_ACTIVE_LOW>, */ + /* <&gpioh 1 GPIO_ACTIVE_LOW>, */ + /* <&gpioh 2 GPIO_ACTIVE_LOW>, */ + /* <&gpioh 3 GPIO_ACTIVE_LOW>, */ + /* <&gpioh 4 GPIO_ACTIVE_LOW>, */ + /* <&gpioh 5 GPIO_ACTIVE_LOW>, */ + <&gpioh 6 GPIO_ACTIVE_LOW>, + /* D12 <&gpioh 7 GPIO_ACTIVE_LOW>, */ + /* D11 <&gpioh 8 GPIO_ACTIVE_LOW>, */ + <&gpioh 9 GPIO_ACTIVE_LOW>, + <&gpioh 10 GPIO_ACTIVE_LOW>, + <&gpioh 11 GPIO_ACTIVE_LOW>, + <&gpioh 12 GPIO_ACTIVE_LOW>, + <&gpioh 13 GPIO_ACTIVE_LOW>, + <&gpioh 14 GPIO_ACTIVE_LOW>, + /* D0 <&gpioh 15 GPIO_ACTIVE_LOW>, */ + /* D7 <&gpioi 0 GPIO_ACTIVE_LOW>, */ + /* D9<&gpioi 1 GPIO_ACTIVE_LOW>, */ + <&gpioi 2 GPIO_ACTIVE_LOW>, + <&gpioi 3 GPIO_ACTIVE_LOW>, + <&gpioi 4 GPIO_ACTIVE_LOW>, + <&gpioi 5 GPIO_ACTIVE_LOW>, + <&gpioi 6 GPIO_ACTIVE_LOW>, + <&gpioi 7 GPIO_ACTIVE_LOW>, + <&gpioi 8 GPIO_ACTIVE_LOW>, + <&gpioi 9 GPIO_ACTIVE_LOW>, + <&gpioi 10 GPIO_ACTIVE_LOW>, + /* <&gpioi 11 GPIO_ACTIVE_LOW>, */ + /* <&gpioi 12 GPIO_ACTIVE_LOW>, */ + <&gpioi 13 GPIO_ACTIVE_LOW>, + <&gpioi 14 GPIO_ACTIVE_LOW>, + <&gpioi 15 GPIO_ACTIVE_LOW>, + /* <&gpioj 0 GPIO_ACTIVE_LOW>, */ + /* <&gpioj 1 GPIO_ACTIVE_LOW>, */ + /* <&gpioj 2 GPIO_ACTIVE_LOW>, */ + /* <&gpioj 3 GPIO_ACTIVE_LOW>, */ + /* <&gpioj 4 GPIO_ACTIVE_LOW>, */ + /* <&gpioj 5 GPIO_ACTIVE_LOW>, */ + <&gpioj 6 GPIO_ACTIVE_LOW>, + <&gpioj 7 GPIO_ACTIVE_LOW>, + <&gpioj 8 GPIO_ACTIVE_LOW>, + <&gpioj 9 GPIO_ACTIVE_LOW>, + <&gpioj 10 GPIO_ACTIVE_LOW>; + /* D2 <&gpioj 11 GPIO_ACTIVE_LOW>, */ + /* <&gpioj 12 GPIO_ACTIVE_LOW>, */ + /* <&gpioj 13 GPIO_ACTIVE_LOW>, */ + /* <&gpioj 14 GPIO_ACTIVE_LOW>, */ + /* <&gpioj 15 GPIO_ACTIVE_LOW>, */ + /* <&gpiok 0 GPIO_ACTIVE_LOW>, */ + /* D1 <&gpiok 1 GPIO_ACTIVE_LOW>; */ + + /* <&gpiok 2 GPIO_ACTIVE_LOW>, */ + /* <&gpiok 3 GPIO_ACTIVE_LOW>, */ + /* <&gpiok 4 GPIO_ACTIVE_LOW>; */ + + /* commented out for now to allow LEDs to work + /* LEDR <&gpiok 5 GPIO_ACTIVE_LOW>, */ + /* LEDG <&gpiok 6 GPIO_ACTIVE_LOW>, */ + /* LEDB <&gpiok 7 GPIO_ACTIVE_LOW>; */ + + builtin-led-gpios = <&gpiok 5 GPIO_ACTIVE_LOW>, <&gpiok 6 GPIO_ACTIVE_LOW>, <&gpiok 7 GPIO_ACTIVE_LOW>; + pwm-pin-gpios = <&gpioa 8 0>, + <&gpioc 6 0>, + <&gpioc 7 0>, + //<&gpiog 7 0>, + <&gpioj 11 0>, + //<&gpiok 1 0>, + <&gpioh 15 0>, + <&gpioj 7 0>, + <&gpioj 10 0>, + <&gpioh 6 0>; + + port-pin-gpios = <&gpioa 0 0>, + <&gpiob 0 0>, + <&gpioc 0 0>, + <&gpiod 0 0>, + <&gpioe 0 0>, + <&gpiof 0 0>, + <&gpiog 0 0>, + <&gpioh 0 0>, + <&gpioi 0 0>, + <&gpioj 0 0>, + <&gpiok 0 0>; + + adc-pin-gpios = <&gpioz 0 0>, /* analog only */ + <&gpioz 1 0>, /* analog only */ + <&gpioz 2 0>, /* analog only */ + <&gpioz 3 0>, /* analog only */ + <&gpioc 2 0>, + <&gpioc 3 0>, + <&gpioa 4 0>, + <&gpioa 6 0>, + <&gpioz 4 0>, /* Hack for D19 */ + <&gpioz 5 0>; /* Hack for D20 */ + serials = <&board_cdc_acm_uart>,<&usart6>, <&usart1>, <&uart4>; cdc-acm = <&board_cdc_acm_uart>; - i2cs = <&i2c4>; + i2cs = <&i2c3>, <&i2c1>, <&i2c4>; + spis = <&spi2>; + pwms = <&pwm1 1 PWM_HZ(12000000) PWM_POLARITY_NORMAL>, //12mhz default + <&pwm3 1 PWM_HZ(500) PWM_POLARITY_NORMAL>, + <&pwm3 2 PWM_HZ(500) PWM_POLARITY_NORMAL>, + <&pwm1 2 PWM_HZ(5000) PWM_POLARITY_NORMAL>, + <&pwm8 3 PWM_HZ(500) PWM_POLARITY_INVERTED>, + <&pwm8 2 PWM_HZ(500) PWM_POLARITY_INVERTED>, + <&pwm8 2 PWM_HZ(500) PWM_POLARITY_NORMAL>, + <&pwm12 1 PWM_HZ(500) PWM_POLARITY_NORMAL>; + + io-channels = <&adc1 0>, + <&adc1 1>, + <&adc3 0>, + <&adc3 1>, + <&adc1 12>, + <&adc1 13>, + <&adc1 18>, + <&adc1 3>, + <&adc1 12>, /* Hack for D19 */ + <&adc1 13>; /* Hack for D20 */ }; }; diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/cflags.txt b/variants/arduino_portenta_h7_stm32h747xx_m7/cflags.txt index 2d837568..dd9e935e 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/cflags.txt +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/cflags.txt @@ -8,7 +8,7 @@ -DUSE_FULL_LL_DRIVER -DCORE_CM7 -DHSE_VALUE=25000000 --DK_HEAP_MEM_POOL_SIZE=32768 +-DK_HEAP_MEM_POOL_SIZE=2048 -DLL_EXTENSION_BUILD -fno-strict-aliasing -fno-common diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/cxxflags.txt b/variants/arduino_portenta_h7_stm32h747xx_m7/cxxflags.txt index ba600fcf..ea8f719c 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/cxxflags.txt +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/cxxflags.txt @@ -8,7 +8,7 @@ -DUSE_FULL_LL_DRIVER -DCORE_CM7 -DHSE_VALUE=25000000 --DK_HEAP_MEM_POOL_SIZE=32768 +-DK_HEAP_MEM_POOL_SIZE=2048 -DLL_EXTENSION_BUILD -fno-strict-aliasing -fno-common diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/Makefile.cflags b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/Makefile.cflags index 5e7dda38..abae4c99 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/Makefile.cflags +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/Makefile.cflags @@ -6,9 +6,9 @@ LLEXT_EDK_BOARD_REVISION = "1.0.0" LLEXT_EDK_BOARD_TARGET = "arduino_portenta_h7_stm32h747xx_m7" # Compile flags -LLEXT_CFLAGS = "-DKERNEL" "-D__ZEPHYR__=1" "-D__LINUX_ERRNO_EXTENSIONS__" "-DPICOLIBC_DOUBLE_PRINTF_SCANF" "-D__PROGRAM_START" "-DSTM32H747xx" "-DUSE_HAL_DRIVER" "-DUSE_FULL_LL_DRIVER" "-DCORE_CM7" "-DHSE_VALUE=25000000" "-DK_HEAP_MEM_POOL_SIZE=32768" "-DLL_EXTENSION_BUILD" "-fno-strict-aliasing" "-fno-common" "-fdiagnostics-color=always" "-mcpu=cortex-m7" "-mthumb" "-mabi=aapcs" "-mfpu=fpv5-d16" "-mfloat-abi=hard" "-mfp16-format=ieee" "-mtp=soft" "-Wall" "-Wformat" "-Wformat-security" "-Wformat" "-Wno-format-zero-length" "-Wdouble-promotion" "-Wno-pointer-sign" "-Wpointer-arith" "-Wexpansion-to-defined" "-Wno-unused-but-set-variable" "-Werror=implicit-int" "-fno-asynchronous-unwind-tables" "-ftls-model=local-exec" "-fno-reorder-functions" "--param=min-pagesize=0" "-fno-defer-pop" "-specs=picolibc.specs" "-D_POSIX_THREADS" "-std=c99" "-mlong-calls" "-mthumb" "-nodefaultlibs" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr/autoconf.h" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/libc/common/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/posix" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/posix/options/getopt/" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/cpp/minimal/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32/common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/drivers" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32/stm32h7x/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/usb/device" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/net/l2" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/net/lib/dns/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/shell/modules/kernel_service/thread/../" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/cmsis/CMSIS/Core/Include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/cmsis/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/stm32h7xx/soc" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/stm32h7xx/drivers/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/common_ll/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/crypto/tinycrypt/lib/include" +LLEXT_CFLAGS = "-DKERNEL" "-D__ZEPHYR__=1" "-D__LINUX_ERRNO_EXTENSIONS__" "-DPICOLIBC_DOUBLE_PRINTF_SCANF" "-D__PROGRAM_START" "-DSTM32H747xx" "-DUSE_HAL_DRIVER" "-DUSE_FULL_LL_DRIVER" "-DCORE_CM7" "-DHSE_VALUE=25000000" "-DK_HEAP_MEM_POOL_SIZE=2048" "-DLL_EXTENSION_BUILD" "-fno-strict-aliasing" "-fno-common" "-fdiagnostics-color=always" "-mcpu=cortex-m7" "-mthumb" "-mabi=aapcs" "-mfpu=fpv5-d16" "-mfloat-abi=hard" "-mfp16-format=ieee" "-mtp=soft" "-Wall" "-Wformat" "-Wformat-security" "-Wformat" "-Wno-format-zero-length" "-Wdouble-promotion" "-Wno-pointer-sign" "-Wpointer-arith" "-Wexpansion-to-defined" "-Wno-unused-but-set-variable" "-Werror=implicit-int" "-fno-asynchronous-unwind-tables" "-ftls-model=local-exec" "-fno-reorder-functions" "--param=min-pagesize=0" "-fno-defer-pop" "-specs=picolibc.specs" "-D_POSIX_THREADS" "-std=c99" "-mlong-calls" "-mthumb" "-nodefaultlibs" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr/autoconf.h" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/libc/common/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/posix" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/posix/options/getopt/" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/cpp/minimal/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32/common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/drivers" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32/stm32h7x/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/usb/device" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/net/l2" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/net/lib/dns/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/shell/modules/kernel_service/thread/../" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/cmsis/CMSIS/Core/Include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/cmsis/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/stm32h7xx/soc" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/stm32h7xx/drivers/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/common_ll/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/crypto/tinycrypt/lib/include" LLEXT_ALL_INCLUDE_CFLAGS = "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/libc/common/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/posix" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/posix/options/getopt/" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/cpp/minimal/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32/common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/drivers" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32/stm32h7x/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/usb/device" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/net/l2" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/net/lib/dns/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/shell/modules/kernel_service/thread/../" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/cmsis/CMSIS/Core/Include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/cmsis/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/stm32h7xx/soc" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/stm32h7xx/drivers/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/common_ll/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/crypto/tinycrypt/lib/include" LLEXT_INCLUDE_CFLAGS = "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/libc/common/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/posix" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/posix/options/getopt/" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/lib/cpp/minimal/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32/common/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/drivers" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/soc/st/stm32/stm32h7x/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/usb/device" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/net/l2" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/net/lib/dns/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/subsys/shell/modules/kernel_service/thread/../" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/cmsis/CMSIS/Core/Include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/modules/cmsis/." "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/stm32h7xx/soc" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/stm32h7xx/drivers/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/hal/stm32/stm32cube/common_ll/include" "-I$(LLEXT_EDK_INSTALL_DIR)/include/modules/crypto/tinycrypt/lib/include" LLEXT_GENERATED_INCLUDE_CFLAGS = "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr" "-I$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated" -LLEXT_BASE_CFLAGS = "-DKERNEL" "-D__ZEPHYR__=1" "-D__LINUX_ERRNO_EXTENSIONS__" "-DPICOLIBC_DOUBLE_PRINTF_SCANF" "-D__PROGRAM_START" "-DSTM32H747xx" "-DUSE_HAL_DRIVER" "-DUSE_FULL_LL_DRIVER" "-DCORE_CM7" "-DHSE_VALUE=25000000" "-DK_HEAP_MEM_POOL_SIZE=32768" "-DLL_EXTENSION_BUILD" "-fno-strict-aliasing" "-fno-common" "-fdiagnostics-color=always" "-mcpu=cortex-m7" "-mthumb" "-mabi=aapcs" "-mfpu=fpv5-d16" "-mfloat-abi=hard" "-mfp16-format=ieee" "-mtp=soft" "-Wall" "-Wformat" "-Wformat-security" "-Wformat" "-Wno-format-zero-length" "-Wdouble-promotion" "-Wno-pointer-sign" "-Wpointer-arith" "-Wexpansion-to-defined" "-Wno-unused-but-set-variable" "-Werror=implicit-int" "-fno-asynchronous-unwind-tables" "-ftls-model=local-exec" "-fno-reorder-functions" "--param=min-pagesize=0" "-fno-defer-pop" "-specs=picolibc.specs" "-D_POSIX_THREADS" "-std=c99" "-mlong-calls" "-mthumb" "-nodefaultlibs" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h" +LLEXT_BASE_CFLAGS = "-DKERNEL" "-D__ZEPHYR__=1" "-D__LINUX_ERRNO_EXTENSIONS__" "-DPICOLIBC_DOUBLE_PRINTF_SCANF" "-D__PROGRAM_START" "-DSTM32H747xx" "-DUSE_HAL_DRIVER" "-DUSE_FULL_LL_DRIVER" "-DCORE_CM7" "-DHSE_VALUE=25000000" "-DK_HEAP_MEM_POOL_SIZE=2048" "-DLL_EXTENSION_BUILD" "-fno-strict-aliasing" "-fno-common" "-fdiagnostics-color=always" "-mcpu=cortex-m7" "-mthumb" "-mabi=aapcs" "-mfpu=fpv5-d16" "-mfloat-abi=hard" "-mfp16-format=ieee" "-mtp=soft" "-Wall" "-Wformat" "-Wformat-security" "-Wformat" "-Wno-format-zero-length" "-Wdouble-promotion" "-Wno-pointer-sign" "-Wpointer-arith" "-Wexpansion-to-defined" "-Wno-unused-but-set-variable" "-Werror=implicit-int" "-fno-asynchronous-unwind-tables" "-ftls-model=local-exec" "-fno-reorder-functions" "--param=min-pagesize=0" "-fno-defer-pop" "-specs=picolibc.specs" "-D_POSIX_THREADS" "-std=c99" "-mlong-calls" "-mthumb" "-nodefaultlibs" "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h" LLEXT_GENERATED_IMACROS_CFLAGS = "-imacros$(LLEXT_EDK_INSTALL_DIR)/include/zephyr/include/generated/zephyr/autoconf.h" diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/cmake.cflags b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/cmake.cflags index c159eb5a..8de34bf7 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/cmake.cflags +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/cmake.cflags @@ -6,9 +6,9 @@ set(LLEXT_EDK_BOARD_REVISION "1.0.0") set(LLEXT_EDK_BOARD_TARGET "arduino_portenta_h7_stm32h747xx_m7") # Compile flags -set(LLEXT_CFLAGS "-DKERNEL;-D__ZEPHYR__=1;-D__LINUX_ERRNO_EXTENSIONS__;-DPICOLIBC_DOUBLE_PRINTF_SCANF;-D__PROGRAM_START;-DSTM32H747xx;-DUSE_HAL_DRIVER;-DUSE_FULL_LL_DRIVER;-DCORE_CM7;-DHSE_VALUE=25000000;-DK_HEAP_MEM_POOL_SIZE=32768;-DLL_EXTENSION_BUILD;-fno-strict-aliasing;-fno-common;-fdiagnostics-color=always;-mcpu=cortex-m7;-mthumb;-mabi=aapcs;-mfpu=fpv5-d16;-mfloat-abi=hard;-mfp16-format=ieee;-mtp=soft;-Wall;-Wformat;-Wformat-security;-Wformat;-Wno-format-zero-length;-Wdouble-promotion;-Wno-pointer-sign;-Wpointer-arith;-Wexpansion-to-defined;-Wno-unused-but-set-variable;-Werror=implicit-int;-fno-asynchronous-unwind-tables;-ftls-model=local-exec;-fno-reorder-functions;--param=min-pagesize=0;-fno-defer-pop;-specs=picolibc.specs;-D_POSIX_THREADS;-std=c99;-mlong-calls;-mthumb;-nodefaultlibs;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr/autoconf.h;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/libc/common/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/posix;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/posix/options/getopt/;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/cpp/minimal/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32/common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/drivers;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32/stm32h7x/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/usb/device;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/net/l2;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/net/lib/dns/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/shell/modules/kernel_service/thread/../;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/cmsis/CMSIS/Core/Include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/cmsis/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/stm32h7xx/soc;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/stm32h7xx/drivers/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/common_ll/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/crypto/tinycrypt/lib/include") +set(LLEXT_CFLAGS "-DKERNEL;-D__ZEPHYR__=1;-D__LINUX_ERRNO_EXTENSIONS__;-DPICOLIBC_DOUBLE_PRINTF_SCANF;-D__PROGRAM_START;-DSTM32H747xx;-DUSE_HAL_DRIVER;-DUSE_FULL_LL_DRIVER;-DCORE_CM7;-DHSE_VALUE=25000000;-DK_HEAP_MEM_POOL_SIZE=2048;-DLL_EXTENSION_BUILD;-fno-strict-aliasing;-fno-common;-fdiagnostics-color=always;-mcpu=cortex-m7;-mthumb;-mabi=aapcs;-mfpu=fpv5-d16;-mfloat-abi=hard;-mfp16-format=ieee;-mtp=soft;-Wall;-Wformat;-Wformat-security;-Wformat;-Wno-format-zero-length;-Wdouble-promotion;-Wno-pointer-sign;-Wpointer-arith;-Wexpansion-to-defined;-Wno-unused-but-set-variable;-Werror=implicit-int;-fno-asynchronous-unwind-tables;-ftls-model=local-exec;-fno-reorder-functions;--param=min-pagesize=0;-fno-defer-pop;-specs=picolibc.specs;-D_POSIX_THREADS;-std=c99;-mlong-calls;-mthumb;-nodefaultlibs;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr/autoconf.h;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/libc/common/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/posix;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/posix/options/getopt/;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/cpp/minimal/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32/common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/drivers;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32/stm32h7x/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/usb/device;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/net/l2;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/net/lib/dns/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/shell/modules/kernel_service/thread/../;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/cmsis/CMSIS/Core/Include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/cmsis/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/stm32h7xx/soc;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/stm32h7xx/drivers/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/common_ll/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/crypto/tinycrypt/lib/include") set(LLEXT_ALL_INCLUDE_CFLAGS "-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/libc/common/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/posix;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/posix/options/getopt/;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/cpp/minimal/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32/common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/drivers;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32/stm32h7x/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/usb/device;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/net/l2;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/net/lib/dns/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/shell/modules/kernel_service/thread/../;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/cmsis/CMSIS/Core/Include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/cmsis/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/stm32h7xx/soc;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/stm32h7xx/drivers/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/common_ll/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/crypto/tinycrypt/lib/include") set(LLEXT_INCLUDE_CFLAGS "-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/libc/common/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/posix;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/posix/options/getopt/;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/lib/cpp/minimal/include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32/common/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/drivers;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/soc/st/stm32/stm32h7x/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/usb/device;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/net/l2;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/net/lib/dns/.;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/subsys/shell/modules/kernel_service/thread/../;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/cmsis/CMSIS/Core/Include;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/modules/cmsis/.;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/stm32h7xx/soc;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/stm32h7xx/drivers/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/hal/stm32/stm32cube/common_ll/include;-I${CMAKE_CURRENT_LIST_DIR}/include/modules/crypto/tinycrypt/lib/include") set(LLEXT_GENERATED_INCLUDE_CFLAGS "-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr;-I${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated") -set(LLEXT_BASE_CFLAGS "-DKERNEL;-D__ZEPHYR__=1;-D__LINUX_ERRNO_EXTENSIONS__;-DPICOLIBC_DOUBLE_PRINTF_SCANF;-D__PROGRAM_START;-DSTM32H747xx;-DUSE_HAL_DRIVER;-DUSE_FULL_LL_DRIVER;-DCORE_CM7;-DHSE_VALUE=25000000;-DK_HEAP_MEM_POOL_SIZE=32768;-DLL_EXTENSION_BUILD;-fno-strict-aliasing;-fno-common;-fdiagnostics-color=always;-mcpu=cortex-m7;-mthumb;-mabi=aapcs;-mfpu=fpv5-d16;-mfloat-abi=hard;-mfp16-format=ieee;-mtp=soft;-Wall;-Wformat;-Wformat-security;-Wformat;-Wno-format-zero-length;-Wdouble-promotion;-Wno-pointer-sign;-Wpointer-arith;-Wexpansion-to-defined;-Wno-unused-but-set-variable;-Werror=implicit-int;-fno-asynchronous-unwind-tables;-ftls-model=local-exec;-fno-reorder-functions;--param=min-pagesize=0;-fno-defer-pop;-specs=picolibc.specs;-D_POSIX_THREADS;-std=c99;-mlong-calls;-mthumb;-nodefaultlibs;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h") +set(LLEXT_BASE_CFLAGS "-DKERNEL;-D__ZEPHYR__=1;-D__LINUX_ERRNO_EXTENSIONS__;-DPICOLIBC_DOUBLE_PRINTF_SCANF;-D__PROGRAM_START;-DSTM32H747xx;-DUSE_HAL_DRIVER;-DUSE_FULL_LL_DRIVER;-DCORE_CM7;-DHSE_VALUE=25000000;-DK_HEAP_MEM_POOL_SIZE=2048;-DLL_EXTENSION_BUILD;-fno-strict-aliasing;-fno-common;-fdiagnostics-color=always;-mcpu=cortex-m7;-mthumb;-mabi=aapcs;-mfpu=fpv5-d16;-mfloat-abi=hard;-mfp16-format=ieee;-mtp=soft;-Wall;-Wformat;-Wformat-security;-Wformat;-Wno-format-zero-length;-Wdouble-promotion;-Wno-pointer-sign;-Wpointer-arith;-Wexpansion-to-defined;-Wno-unused-but-set-variable;-Werror=implicit-int;-fno-asynchronous-unwind-tables;-ftls-model=local-exec;-fno-reorder-functions;--param=min-pagesize=0;-fno-defer-pop;-specs=picolibc.specs;-D_POSIX_THREADS;-std=c99;-mlong-calls;-mthumb;-nodefaultlibs;-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/zephyr/toolchain/zephyr_stdint.h") set(LLEXT_GENERATED_IMACROS_CFLAGS "-imacros${CMAKE_CURRENT_LIST_DIR}/include/zephyr/include/generated/zephyr/autoconf.h") diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h index 48be8994..184e288f 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h @@ -1,6 +1,6 @@ /* - * This file is generated by /home/burellil/Work/ArduinoCore-zephyr/zephyr/scripts/build/gen_strsignal_table.py + * This file is generated by /home/kurte/github/zephyr/scripts/build/gen_strsignal_table.py */ #include diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/syscall_list.h b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/syscall_list.h index 82d20fb7..ecf7da09 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/syscall_list.h +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/syscall_list.h @@ -3,468 +3,468 @@ #ifndef ZEPHYR_SYSCALL_LIST_H #define ZEPHYR_SYSCALL_LIST_H -#define K_SYSCALL_DEVICE_DEINIT 0 -#define K_SYSCALL_DEVICE_GET_BINDING 1 -#define K_SYSCALL_DEVICE_GET_BY_DT_NODELABEL 2 -#define K_SYSCALL_DEVICE_INIT 3 -#define K_SYSCALL_DEVICE_IS_READY 4 -#define K_SYSCALL_ENTROPY_GET_ENTROPY 5 -#define K_SYSCALL_FLASH_COPY 6 -#define K_SYSCALL_FLASH_ERASE 7 -#define K_SYSCALL_FLASH_EX_OP 8 -#define K_SYSCALL_FLASH_FILL 9 -#define K_SYSCALL_FLASH_FLATTEN 10 -#define K_SYSCALL_FLASH_GET_PAGE_COUNT 11 -#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX 12 -#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS 13 -#define K_SYSCALL_FLASH_GET_PARAMETERS 14 -#define K_SYSCALL_FLASH_GET_SIZE 15 -#define K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE 16 -#define K_SYSCALL_FLASH_READ 17 -#define K_SYSCALL_FLASH_READ_JEDEC_ID 18 -#define K_SYSCALL_FLASH_SFDP_READ 19 -#define K_SYSCALL_FLASH_WRITE 20 -#define K_SYSCALL_GPIO_GET_PENDING_INT 21 -#define K_SYSCALL_GPIO_PIN_CONFIGURE 22 -#define K_SYSCALL_GPIO_PIN_GET_CONFIG 23 -#define K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE 24 -#define K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW 25 -#define K_SYSCALL_GPIO_PORT_GET_DIRECTION 26 -#define K_SYSCALL_GPIO_PORT_GET_RAW 27 -#define K_SYSCALL_GPIO_PORT_SET_BITS_RAW 28 -#define K_SYSCALL_GPIO_PORT_SET_MASKED_RAW 29 -#define K_SYSCALL_GPIO_PORT_TOGGLE_BITS 30 -#define K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE 31 -#define K_SYSCALL_HWINFO_GET_DEVICE_EUI64 32 -#define K_SYSCALL_HWINFO_GET_DEVICE_ID 33 -#define K_SYSCALL_HWINFO_GET_RESET_CAUSE 34 -#define K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE 35 -#define K_SYSCALL_I2C_CONFIGURE 36 -#define K_SYSCALL_I2C_GET_CONFIG 37 -#define K_SYSCALL_I2C_RECOVER_BUS 38 -#define K_SYSCALL_I2C_TARGET_DRIVER_REGISTER 39 -#define K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER 40 -#define K_SYSCALL_I2C_TRANSFER 41 -#define K_SYSCALL_K_BUSY_WAIT 42 -#define K_SYSCALL_K_CONDVAR_BROADCAST 43 -#define K_SYSCALL_K_CONDVAR_INIT 44 -#define K_SYSCALL_K_CONDVAR_SIGNAL 45 -#define K_SYSCALL_K_CONDVAR_WAIT 46 -#define K_SYSCALL_K_EVENT_CLEAR 47 -#define K_SYSCALL_K_EVENT_INIT 48 -#define K_SYSCALL_K_EVENT_POST 49 -#define K_SYSCALL_K_EVENT_SET 50 -#define K_SYSCALL_K_EVENT_SET_MASKED 51 -#define K_SYSCALL_K_EVENT_WAIT 52 -#define K_SYSCALL_K_EVENT_WAIT_ALL 53 -#define K_SYSCALL_K_FLOAT_DISABLE 54 -#define K_SYSCALL_K_FLOAT_ENABLE 55 -#define K_SYSCALL_K_FUTEX_WAIT 56 -#define K_SYSCALL_K_FUTEX_WAKE 57 -#define K_SYSCALL_K_IS_PREEMPT_THREAD 58 -#define K_SYSCALL_K_MSGQ_ALLOC_INIT 59 -#define K_SYSCALL_K_MSGQ_GET 60 -#define K_SYSCALL_K_MSGQ_GET_ATTRS 61 -#define K_SYSCALL_K_MSGQ_NUM_FREE_GET 62 -#define K_SYSCALL_K_MSGQ_NUM_USED_GET 63 -#define K_SYSCALL_K_MSGQ_PEEK 64 -#define K_SYSCALL_K_MSGQ_PEEK_AT 65 -#define K_SYSCALL_K_MSGQ_PURGE 66 -#define K_SYSCALL_K_MSGQ_PUT 67 -#define K_SYSCALL_K_MUTEX_INIT 68 -#define K_SYSCALL_K_MUTEX_LOCK 69 -#define K_SYSCALL_K_MUTEX_UNLOCK 70 -#define K_SYSCALL_K_OBJECT_ACCESS_GRANT 71 -#define K_SYSCALL_K_OBJECT_ALLOC 72 -#define K_SYSCALL_K_OBJECT_ALLOC_SIZE 73 -#define K_SYSCALL_K_OBJECT_RELEASE 74 -#define K_SYSCALL_K_PIPE_ALLOC_INIT 75 -#define K_SYSCALL_K_PIPE_BUFFER_FLUSH 76 -#define K_SYSCALL_K_PIPE_CLOSE 77 -#define K_SYSCALL_K_PIPE_FLUSH 78 -#define K_SYSCALL_K_PIPE_GET 79 -#define K_SYSCALL_K_PIPE_INIT 80 -#define K_SYSCALL_K_PIPE_PUT 81 -#define K_SYSCALL_K_PIPE_READ 82 -#define K_SYSCALL_K_PIPE_READ_AVAIL 83 -#define K_SYSCALL_K_PIPE_RESET 84 -#define K_SYSCALL_K_PIPE_WRITE 85 -#define K_SYSCALL_K_PIPE_WRITE_AVAIL 86 -#define K_SYSCALL_K_POLL 87 -#define K_SYSCALL_K_POLL_SIGNAL_CHECK 88 -#define K_SYSCALL_K_POLL_SIGNAL_INIT 89 -#define K_SYSCALL_K_POLL_SIGNAL_RAISE 90 -#define K_SYSCALL_K_POLL_SIGNAL_RESET 91 -#define K_SYSCALL_K_QUEUE_ALLOC_APPEND 92 -#define K_SYSCALL_K_QUEUE_ALLOC_PREPEND 93 -#define K_SYSCALL_K_QUEUE_CANCEL_WAIT 94 -#define K_SYSCALL_K_QUEUE_GET 95 -#define K_SYSCALL_K_QUEUE_INIT 96 -#define K_SYSCALL_K_QUEUE_IS_EMPTY 97 -#define K_SYSCALL_K_QUEUE_PEEK_HEAD 98 -#define K_SYSCALL_K_QUEUE_PEEK_TAIL 99 -#define K_SYSCALL_K_RESCHEDULE 100 -#define K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY 101 -#define K_SYSCALL_K_SEM_COUNT_GET 102 -#define K_SYSCALL_K_SEM_GIVE 103 -#define K_SYSCALL_K_SEM_INIT 104 -#define K_SYSCALL_K_SEM_RESET 105 -#define K_SYSCALL_K_SEM_TAKE 106 -#define K_SYSCALL_K_SLEEP 107 -#define K_SYSCALL_K_STACK_ALLOC_INIT 108 -#define K_SYSCALL_K_STACK_POP 109 -#define K_SYSCALL_K_STACK_PUSH 110 -#define K_SYSCALL_K_STR_OUT 111 -#define K_SYSCALL_K_THREAD_ABORT 112 -#define K_SYSCALL_K_THREAD_CREATE 113 -#define K_SYSCALL_K_THREAD_CUSTOM_DATA_GET 114 -#define K_SYSCALL_K_THREAD_CUSTOM_DATA_SET 115 -#define K_SYSCALL_K_THREAD_DEADLINE_SET 116 -#define K_SYSCALL_K_THREAD_JOIN 117 -#define K_SYSCALL_K_THREAD_NAME_COPY 118 -#define K_SYSCALL_K_THREAD_NAME_SET 119 -#define K_SYSCALL_K_THREAD_PRIORITY_GET 120 -#define K_SYSCALL_K_THREAD_PRIORITY_SET 121 -#define K_SYSCALL_K_THREAD_RESUME 122 -#define K_SYSCALL_K_THREAD_STACK_ALLOC 123 -#define K_SYSCALL_K_THREAD_STACK_FREE 124 -#define K_SYSCALL_K_THREAD_STACK_SPACE_GET 125 -#define K_SYSCALL_K_THREAD_SUSPEND 126 -#define K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS 127 -#define K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS 128 -#define K_SYSCALL_K_TIMER_EXPIRES_TICKS 129 -#define K_SYSCALL_K_TIMER_REMAINING_TICKS 130 -#define K_SYSCALL_K_TIMER_START 131 -#define K_SYSCALL_K_TIMER_STATUS_GET 132 -#define K_SYSCALL_K_TIMER_STATUS_SYNC 133 -#define K_SYSCALL_K_TIMER_STOP 134 -#define K_SYSCALL_K_TIMER_USER_DATA_GET 135 -#define K_SYSCALL_K_TIMER_USER_DATA_SET 136 -#define K_SYSCALL_K_UPTIME_TICKS 137 -#define K_SYSCALL_K_USLEEP 138 -#define K_SYSCALL_K_WAKEUP 139 -#define K_SYSCALL_K_YIELD 140 -#define K_SYSCALL_LLEXT_GET_FN_TABLE 141 -#define K_SYSCALL_LOG_BUFFERED_CNT 142 -#define K_SYSCALL_LOG_FILTER_SET 143 -#define K_SYSCALL_LOG_FRONTEND_FILTER_SET 144 -#define K_SYSCALL_LOG_PANIC 145 -#define K_SYSCALL_LOG_PROCESS 146 -#define K_SYSCALL_NET_ADDR_NTOP 147 -#define K_SYSCALL_NET_ADDR_PTON 148 -#define K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX 149 -#define K_SYSCALL_NET_IF_GET_BY_INDEX 150 -#define K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX 151 -#define K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX 152 -#define K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX 153 -#define K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX 154 -#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX 155 -#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX 156 -#define K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX 157 -#define K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX 158 -#define K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX 159 -#define K_SYSCALL_RESET_LINE_ASSERT 160 -#define K_SYSCALL_RESET_LINE_DEASSERT 161 -#define K_SYSCALL_RESET_LINE_TOGGLE 162 -#define K_SYSCALL_RESET_STATUS 163 -#define K_SYSCALL_SPI_RELEASE 164 -#define K_SYSCALL_SPI_TRANSCEIVE 165 -#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE 166 -#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE 167 -#define K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE 168 -#define K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET 169 -#define K_SYSCALL_SYS_CSRAND_GET 170 -#define K_SYSCALL_SYS_RAND_GET 171 -#define K_SYSCALL_UART_CONFIGURE 172 -#define K_SYSCALL_UART_CONFIG_GET 173 -#define K_SYSCALL_UART_DRV_CMD 174 -#define K_SYSCALL_UART_ERR_CHECK 175 -#define K_SYSCALL_UART_IRQ_ERR_DISABLE 176 -#define K_SYSCALL_UART_IRQ_ERR_ENABLE 177 -#define K_SYSCALL_UART_IRQ_IS_PENDING 178 -#define K_SYSCALL_UART_IRQ_RX_DISABLE 179 -#define K_SYSCALL_UART_IRQ_RX_ENABLE 180 -#define K_SYSCALL_UART_IRQ_TX_DISABLE 181 -#define K_SYSCALL_UART_IRQ_TX_ENABLE 182 -#define K_SYSCALL_UART_IRQ_UPDATE 183 -#define K_SYSCALL_UART_LINE_CTRL_GET 184 -#define K_SYSCALL_UART_LINE_CTRL_SET 185 -#define K_SYSCALL_UART_POLL_IN 186 -#define K_SYSCALL_UART_POLL_IN_U16 187 -#define K_SYSCALL_UART_POLL_OUT 188 -#define K_SYSCALL_UART_POLL_OUT_U16 189 -#define K_SYSCALL_UART_RX_DISABLE 190 -#define K_SYSCALL_UART_RX_ENABLE 191 -#define K_SYSCALL_UART_RX_ENABLE_U16 192 -#define K_SYSCALL_UART_TX 193 -#define K_SYSCALL_UART_TX_ABORT 194 -#define K_SYSCALL_UART_TX_U16 195 -#define K_SYSCALL_ZEPHYR_FPUTC 196 -#define K_SYSCALL_ZEPHYR_FWRITE 197 -#define K_SYSCALL_ZEPHYR_READ_STDIN 198 -#define K_SYSCALL_ZEPHYR_WRITE_STDOUT 199 -#define K_SYSCALL_ZSOCK_ACCEPT 200 -#define K_SYSCALL_ZSOCK_BIND 201 -#define K_SYSCALL_ZSOCK_CLOSE 202 -#define K_SYSCALL_ZSOCK_CONNECT 203 -#define K_SYSCALL_ZSOCK_FCNTL_IMPL 204 -#define K_SYSCALL_ZSOCK_GETHOSTNAME 205 -#define K_SYSCALL_ZSOCK_GETPEERNAME 206 -#define K_SYSCALL_ZSOCK_GETSOCKNAME 207 -#define K_SYSCALL_ZSOCK_GETSOCKOPT 208 -#define K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT 209 -#define K_SYSCALL_ZSOCK_INET_PTON 210 -#define K_SYSCALL_ZSOCK_IOCTL_IMPL 211 -#define K_SYSCALL_ZSOCK_LISTEN 212 -#define K_SYSCALL_ZSOCK_RECVFROM 213 -#define K_SYSCALL_ZSOCK_RECVMSG 214 -#define K_SYSCALL_ZSOCK_SENDMSG 215 -#define K_SYSCALL_ZSOCK_SENDTO 216 -#define K_SYSCALL_ZSOCK_SETSOCKOPT 217 -#define K_SYSCALL_ZSOCK_SHUTDOWN 218 -#define K_SYSCALL_ZSOCK_SOCKET 219 -#define K_SYSCALL_ZSOCK_SOCKETPAIR 220 -#define K_SYSCALL_ZVFS_POLL 221 -#define K_SYSCALL_ZVFS_SELECT 222 -#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0 223 -#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1 224 -#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2 225 -#define K_SYSCALL_Z_LOG_MSG_STATIC_CREATE 226 -#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK 227 -#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK 228 -#define K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL 229 -#define K_SYSCALL___POSIX_CLOCK_GET_BASE 230 -#define K_SYSCALL_BAD 231 -#define K_SYSCALL_LIMIT 232 +#define K_SYSCALL_ADC_CHANNEL_SETUP 0 +#define K_SYSCALL_ADC_READ 1 +#define K_SYSCALL_ADC_READ_ASYNC 2 +#define K_SYSCALL_DEVICE_DEINIT 3 +#define K_SYSCALL_DEVICE_GET_BINDING 4 +#define K_SYSCALL_DEVICE_GET_BY_DT_NODELABEL 5 +#define K_SYSCALL_DEVICE_INIT 6 +#define K_SYSCALL_DEVICE_IS_READY 7 +#define K_SYSCALL_DMA_CHAN_FILTER 8 +#define K_SYSCALL_DMA_RELEASE_CHANNEL 9 +#define K_SYSCALL_DMA_REQUEST_CHANNEL 10 +#define K_SYSCALL_DMA_RESUME 11 +#define K_SYSCALL_DMA_START 12 +#define K_SYSCALL_DMA_STOP 13 +#define K_SYSCALL_DMA_SUSPEND 14 +#define K_SYSCALL_ENTROPY_GET_ENTROPY 15 +#define K_SYSCALL_FLASH_COPY 16 +#define K_SYSCALL_FLASH_ERASE 17 +#define K_SYSCALL_FLASH_EX_OP 18 +#define K_SYSCALL_FLASH_FILL 19 +#define K_SYSCALL_FLASH_FLATTEN 20 +#define K_SYSCALL_FLASH_GET_PAGE_COUNT 21 +#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX 22 +#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS 23 +#define K_SYSCALL_FLASH_GET_PARAMETERS 24 +#define K_SYSCALL_FLASH_GET_SIZE 25 +#define K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE 26 +#define K_SYSCALL_FLASH_READ 27 +#define K_SYSCALL_FLASH_READ_JEDEC_ID 28 +#define K_SYSCALL_FLASH_SFDP_READ 29 +#define K_SYSCALL_FLASH_WRITE 30 +#define K_SYSCALL_GPIO_GET_PENDING_INT 31 +#define K_SYSCALL_GPIO_PIN_CONFIGURE 32 +#define K_SYSCALL_GPIO_PIN_GET_CONFIG 33 +#define K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE 34 +#define K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW 35 +#define K_SYSCALL_GPIO_PORT_GET_DIRECTION 36 +#define K_SYSCALL_GPIO_PORT_GET_RAW 37 +#define K_SYSCALL_GPIO_PORT_SET_BITS_RAW 38 +#define K_SYSCALL_GPIO_PORT_SET_MASKED_RAW 39 +#define K_SYSCALL_GPIO_PORT_TOGGLE_BITS 40 +#define K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE 41 +#define K_SYSCALL_HWINFO_GET_DEVICE_EUI64 42 +#define K_SYSCALL_HWINFO_GET_DEVICE_ID 43 +#define K_SYSCALL_HWINFO_GET_RESET_CAUSE 44 +#define K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE 45 +#define K_SYSCALL_I2C_CONFIGURE 46 +#define K_SYSCALL_I2C_GET_CONFIG 47 +#define K_SYSCALL_I2C_RECOVER_BUS 48 +#define K_SYSCALL_I2C_TARGET_DRIVER_REGISTER 49 +#define K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER 50 +#define K_SYSCALL_I2C_TRANSFER 51 +#define K_SYSCALL_K_BUSY_WAIT 52 +#define K_SYSCALL_K_CONDVAR_BROADCAST 53 +#define K_SYSCALL_K_CONDVAR_INIT 54 +#define K_SYSCALL_K_CONDVAR_SIGNAL 55 +#define K_SYSCALL_K_CONDVAR_WAIT 56 +#define K_SYSCALL_K_EVENT_CLEAR 57 +#define K_SYSCALL_K_EVENT_INIT 58 +#define K_SYSCALL_K_EVENT_POST 59 +#define K_SYSCALL_K_EVENT_SET 60 +#define K_SYSCALL_K_EVENT_SET_MASKED 61 +#define K_SYSCALL_K_EVENT_WAIT 62 +#define K_SYSCALL_K_EVENT_WAIT_ALL 63 +#define K_SYSCALL_K_FLOAT_DISABLE 64 +#define K_SYSCALL_K_FLOAT_ENABLE 65 +#define K_SYSCALL_K_FUTEX_WAIT 66 +#define K_SYSCALL_K_FUTEX_WAKE 67 +#define K_SYSCALL_K_IS_PREEMPT_THREAD 68 +#define K_SYSCALL_K_MSGQ_ALLOC_INIT 69 +#define K_SYSCALL_K_MSGQ_GET 70 +#define K_SYSCALL_K_MSGQ_GET_ATTRS 71 +#define K_SYSCALL_K_MSGQ_NUM_FREE_GET 72 +#define K_SYSCALL_K_MSGQ_NUM_USED_GET 73 +#define K_SYSCALL_K_MSGQ_PEEK 74 +#define K_SYSCALL_K_MSGQ_PEEK_AT 75 +#define K_SYSCALL_K_MSGQ_PURGE 76 +#define K_SYSCALL_K_MSGQ_PUT 77 +#define K_SYSCALL_K_MUTEX_INIT 78 +#define K_SYSCALL_K_MUTEX_LOCK 79 +#define K_SYSCALL_K_MUTEX_UNLOCK 80 +#define K_SYSCALL_K_OBJECT_ACCESS_GRANT 81 +#define K_SYSCALL_K_OBJECT_ALLOC 82 +#define K_SYSCALL_K_OBJECT_ALLOC_SIZE 83 +#define K_SYSCALL_K_OBJECT_RELEASE 84 +#define K_SYSCALL_K_PIPE_ALLOC_INIT 85 +#define K_SYSCALL_K_PIPE_BUFFER_FLUSH 86 +#define K_SYSCALL_K_PIPE_CLOSE 87 +#define K_SYSCALL_K_PIPE_FLUSH 88 +#define K_SYSCALL_K_PIPE_GET 89 +#define K_SYSCALL_K_PIPE_INIT 90 +#define K_SYSCALL_K_PIPE_PUT 91 +#define K_SYSCALL_K_PIPE_READ 92 +#define K_SYSCALL_K_PIPE_READ_AVAIL 93 +#define K_SYSCALL_K_PIPE_RESET 94 +#define K_SYSCALL_K_PIPE_WRITE 95 +#define K_SYSCALL_K_PIPE_WRITE_AVAIL 96 +#define K_SYSCALL_K_POLL 97 +#define K_SYSCALL_K_POLL_SIGNAL_CHECK 98 +#define K_SYSCALL_K_POLL_SIGNAL_INIT 99 +#define K_SYSCALL_K_POLL_SIGNAL_RAISE 100 +#define K_SYSCALL_K_POLL_SIGNAL_RESET 101 +#define K_SYSCALL_K_QUEUE_ALLOC_APPEND 102 +#define K_SYSCALL_K_QUEUE_ALLOC_PREPEND 103 +#define K_SYSCALL_K_QUEUE_CANCEL_WAIT 104 +#define K_SYSCALL_K_QUEUE_GET 105 +#define K_SYSCALL_K_QUEUE_INIT 106 +#define K_SYSCALL_K_QUEUE_IS_EMPTY 107 +#define K_SYSCALL_K_QUEUE_PEEK_HEAD 108 +#define K_SYSCALL_K_QUEUE_PEEK_TAIL 109 +#define K_SYSCALL_K_RESCHEDULE 110 +#define K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY 111 +#define K_SYSCALL_K_SEM_COUNT_GET 112 +#define K_SYSCALL_K_SEM_GIVE 113 +#define K_SYSCALL_K_SEM_INIT 114 +#define K_SYSCALL_K_SEM_RESET 115 +#define K_SYSCALL_K_SEM_TAKE 116 +#define K_SYSCALL_K_SLEEP 117 +#define K_SYSCALL_K_STACK_ALLOC_INIT 118 +#define K_SYSCALL_K_STACK_POP 119 +#define K_SYSCALL_K_STACK_PUSH 120 +#define K_SYSCALL_K_STR_OUT 121 +#define K_SYSCALL_K_THREAD_ABORT 122 +#define K_SYSCALL_K_THREAD_CREATE 123 +#define K_SYSCALL_K_THREAD_CUSTOM_DATA_GET 124 +#define K_SYSCALL_K_THREAD_CUSTOM_DATA_SET 125 +#define K_SYSCALL_K_THREAD_DEADLINE_SET 126 +#define K_SYSCALL_K_THREAD_JOIN 127 +#define K_SYSCALL_K_THREAD_NAME_COPY 128 +#define K_SYSCALL_K_THREAD_NAME_SET 129 +#define K_SYSCALL_K_THREAD_PRIORITY_GET 130 +#define K_SYSCALL_K_THREAD_PRIORITY_SET 131 +#define K_SYSCALL_K_THREAD_RESUME 132 +#define K_SYSCALL_K_THREAD_STACK_ALLOC 133 +#define K_SYSCALL_K_THREAD_STACK_FREE 134 +#define K_SYSCALL_K_THREAD_STACK_SPACE_GET 135 +#define K_SYSCALL_K_THREAD_SUSPEND 136 +#define K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS 137 +#define K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS 138 +#define K_SYSCALL_K_TIMER_EXPIRES_TICKS 139 +#define K_SYSCALL_K_TIMER_REMAINING_TICKS 140 +#define K_SYSCALL_K_TIMER_START 141 +#define K_SYSCALL_K_TIMER_STATUS_GET 142 +#define K_SYSCALL_K_TIMER_STATUS_SYNC 143 +#define K_SYSCALL_K_TIMER_STOP 144 +#define K_SYSCALL_K_TIMER_USER_DATA_GET 145 +#define K_SYSCALL_K_TIMER_USER_DATA_SET 146 +#define K_SYSCALL_K_UPTIME_TICKS 147 +#define K_SYSCALL_K_USLEEP 148 +#define K_SYSCALL_K_WAKEUP 149 +#define K_SYSCALL_K_YIELD 150 +#define K_SYSCALL_LLEXT_GET_FN_TABLE 151 +#define K_SYSCALL_LOG_BUFFERED_CNT 152 +#define K_SYSCALL_LOG_FILTER_SET 153 +#define K_SYSCALL_LOG_FRONTEND_FILTER_SET 154 +#define K_SYSCALL_LOG_PANIC 155 +#define K_SYSCALL_LOG_PROCESS 156 +#define K_SYSCALL_NET_ADDR_NTOP 157 +#define K_SYSCALL_NET_ADDR_PTON 158 +#define K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX 159 +#define K_SYSCALL_NET_IF_GET_BY_INDEX 160 +#define K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX 161 +#define K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX 162 +#define K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX 163 +#define K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX 164 +#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX 165 +#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX 166 +#define K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX 167 +#define K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX 168 +#define K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX 169 +#define K_SYSCALL_PWM_CAPTURE_CYCLES 170 +#define K_SYSCALL_PWM_DISABLE_CAPTURE 171 +#define K_SYSCALL_PWM_ENABLE_CAPTURE 172 +#define K_SYSCALL_PWM_GET_CYCLES_PER_SEC 173 +#define K_SYSCALL_PWM_SET_CYCLES 174 +#define K_SYSCALL_RESET_LINE_ASSERT 175 +#define K_SYSCALL_RESET_LINE_DEASSERT 176 +#define K_SYSCALL_RESET_LINE_TOGGLE 177 +#define K_SYSCALL_RESET_STATUS 178 +#define K_SYSCALL_SPI_RELEASE 179 +#define K_SYSCALL_SPI_TRANSCEIVE 180 +#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE 181 +#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE 182 +#define K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE 183 +#define K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET 184 +#define K_SYSCALL_SYS_CSRAND_GET 185 +#define K_SYSCALL_SYS_RAND_GET 186 +#define K_SYSCALL_UART_CONFIGURE 187 +#define K_SYSCALL_UART_CONFIG_GET 188 +#define K_SYSCALL_UART_DRV_CMD 189 +#define K_SYSCALL_UART_ERR_CHECK 190 +#define K_SYSCALL_UART_IRQ_ERR_DISABLE 191 +#define K_SYSCALL_UART_IRQ_ERR_ENABLE 192 +#define K_SYSCALL_UART_IRQ_IS_PENDING 193 +#define K_SYSCALL_UART_IRQ_RX_DISABLE 194 +#define K_SYSCALL_UART_IRQ_RX_ENABLE 195 +#define K_SYSCALL_UART_IRQ_TX_DISABLE 196 +#define K_SYSCALL_UART_IRQ_TX_ENABLE 197 +#define K_SYSCALL_UART_IRQ_UPDATE 198 +#define K_SYSCALL_UART_LINE_CTRL_GET 199 +#define K_SYSCALL_UART_LINE_CTRL_SET 200 +#define K_SYSCALL_UART_POLL_IN 201 +#define K_SYSCALL_UART_POLL_IN_U16 202 +#define K_SYSCALL_UART_POLL_OUT 203 +#define K_SYSCALL_UART_POLL_OUT_U16 204 +#define K_SYSCALL_UART_RX_DISABLE 205 +#define K_SYSCALL_UART_RX_ENABLE 206 +#define K_SYSCALL_UART_RX_ENABLE_U16 207 +#define K_SYSCALL_UART_TX 208 +#define K_SYSCALL_UART_TX_ABORT 209 +#define K_SYSCALL_UART_TX_U16 210 +#define K_SYSCALL_ZEPHYR_FPUTC 211 +#define K_SYSCALL_ZEPHYR_FWRITE 212 +#define K_SYSCALL_ZEPHYR_READ_STDIN 213 +#define K_SYSCALL_ZEPHYR_WRITE_STDOUT 214 +#define K_SYSCALL_ZSOCK_ACCEPT 215 +#define K_SYSCALL_ZSOCK_BIND 216 +#define K_SYSCALL_ZSOCK_CLOSE 217 +#define K_SYSCALL_ZSOCK_CONNECT 218 +#define K_SYSCALL_ZSOCK_FCNTL_IMPL 219 +#define K_SYSCALL_ZSOCK_GETHOSTNAME 220 +#define K_SYSCALL_ZSOCK_GETPEERNAME 221 +#define K_SYSCALL_ZSOCK_GETSOCKNAME 222 +#define K_SYSCALL_ZSOCK_GETSOCKOPT 223 +#define K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT 224 +#define K_SYSCALL_ZSOCK_INET_PTON 225 +#define K_SYSCALL_ZSOCK_IOCTL_IMPL 226 +#define K_SYSCALL_ZSOCK_LISTEN 227 +#define K_SYSCALL_ZSOCK_RECVFROM 228 +#define K_SYSCALL_ZSOCK_RECVMSG 229 +#define K_SYSCALL_ZSOCK_SENDMSG 230 +#define K_SYSCALL_ZSOCK_SENDTO 231 +#define K_SYSCALL_ZSOCK_SETSOCKOPT 232 +#define K_SYSCALL_ZSOCK_SHUTDOWN 233 +#define K_SYSCALL_ZSOCK_SOCKET 234 +#define K_SYSCALL_ZSOCK_SOCKETPAIR 235 +#define K_SYSCALL_ZVFS_POLL 236 +#define K_SYSCALL_ZVFS_SELECT 237 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0 238 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1 239 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2 240 +#define K_SYSCALL_Z_LOG_MSG_STATIC_CREATE 241 +#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK 242 +#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK 243 +#define K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL 244 +#define K_SYSCALL___POSIX_CLOCK_GET_BASE 245 +#define K_SYSCALL_BAD 246 +#define K_SYSCALL_LIMIT 247 /* Following syscalls are not used in image */ -#define K_SYSCALL_ADC_CHANNEL_SETUP 233 -#define K_SYSCALL_ADC_READ 234 -#define K_SYSCALL_ADC_READ_ASYNC 235 -#define K_SYSCALL_ATOMIC_ADD 236 -#define K_SYSCALL_ATOMIC_AND 237 -#define K_SYSCALL_ATOMIC_CAS 238 -#define K_SYSCALL_ATOMIC_NAND 239 -#define K_SYSCALL_ATOMIC_OR 240 -#define K_SYSCALL_ATOMIC_PTR_CAS 241 -#define K_SYSCALL_ATOMIC_PTR_SET 242 -#define K_SYSCALL_ATOMIC_SET 243 -#define K_SYSCALL_ATOMIC_SUB 244 -#define K_SYSCALL_ATOMIC_XOR 245 -#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET 246 -#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET 247 -#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET 248 -#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET 249 -#define K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET 250 -#define K_SYSCALL_AUXDISPLAY_CLEAR 251 -#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET 252 -#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET 253 -#define K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED 254 -#define K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET 255 -#define K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET 256 -#define K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND 257 -#define K_SYSCALL_AUXDISPLAY_DISPLAY_OFF 258 -#define K_SYSCALL_AUXDISPLAY_DISPLAY_ON 259 -#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET 260 -#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET 261 -#define K_SYSCALL_AUXDISPLAY_IS_BUSY 262 -#define K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED 263 -#define K_SYSCALL_AUXDISPLAY_WRITE 264 -#define K_SYSCALL_BBRAM_CHECK_INVALID 265 -#define K_SYSCALL_BBRAM_CHECK_POWER 266 -#define K_SYSCALL_BBRAM_CHECK_STANDBY_POWER 267 -#define K_SYSCALL_BBRAM_GET_SIZE 268 -#define K_SYSCALL_BBRAM_READ 269 -#define K_SYSCALL_BBRAM_WRITE 270 -#define K_SYSCALL_BC12_SET_RESULT_CB 271 -#define K_SYSCALL_BC12_SET_ROLE 272 -#define K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ 273 -#define K_SYSCALL_CAN_CALC_TIMING 274 -#define K_SYSCALL_CAN_CALC_TIMING_DATA 275 -#define K_SYSCALL_CAN_GET_BITRATE_MAX 276 -#define K_SYSCALL_CAN_GET_BITRATE_MIN 277 -#define K_SYSCALL_CAN_GET_CAPABILITIES 278 -#define K_SYSCALL_CAN_GET_CORE_CLOCK 279 -#define K_SYSCALL_CAN_GET_MAX_FILTERS 280 -#define K_SYSCALL_CAN_GET_MODE 281 -#define K_SYSCALL_CAN_GET_STATE 282 -#define K_SYSCALL_CAN_GET_TIMING_DATA_MAX 283 -#define K_SYSCALL_CAN_GET_TIMING_DATA_MIN 284 -#define K_SYSCALL_CAN_GET_TIMING_MAX 285 -#define K_SYSCALL_CAN_GET_TIMING_MIN 286 -#define K_SYSCALL_CAN_GET_TRANSCEIVER 287 -#define K_SYSCALL_CAN_RECOVER 288 -#define K_SYSCALL_CAN_REMOVE_RX_FILTER 289 -#define K_SYSCALL_CAN_SEND 290 -#define K_SYSCALL_CAN_SET_BITRATE 291 -#define K_SYSCALL_CAN_SET_BITRATE_DATA 292 -#define K_SYSCALL_CAN_SET_MODE 293 -#define K_SYSCALL_CAN_SET_TIMING 294 -#define K_SYSCALL_CAN_SET_TIMING_DATA 295 -#define K_SYSCALL_CAN_START 296 -#define K_SYSCALL_CAN_STATS_GET_ACK_ERRORS 297 -#define K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS 298 -#define K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS 299 -#define K_SYSCALL_CAN_STATS_GET_BIT_ERRORS 300 -#define K_SYSCALL_CAN_STATS_GET_CRC_ERRORS 301 -#define K_SYSCALL_CAN_STATS_GET_FORM_ERRORS 302 -#define K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS 303 -#define K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS 304 -#define K_SYSCALL_CAN_STOP 305 -#define K_SYSCALL_CHARGER_CHARGE_ENABLE 306 -#define K_SYSCALL_CHARGER_GET_PROP 307 -#define K_SYSCALL_CHARGER_SET_PROP 308 -#define K_SYSCALL_COMPARATOR_GET_OUTPUT 309 -#define K_SYSCALL_COMPARATOR_SET_TRIGGER 310 -#define K_SYSCALL_COMPARATOR_TRIGGER_IS_PENDING 311 -#define K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM 312 -#define K_SYSCALL_COUNTER_GET_FREQUENCY 313 -#define K_SYSCALL_COUNTER_GET_GUARD_PERIOD 314 -#define K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE 315 -#define K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS 316 -#define K_SYSCALL_COUNTER_GET_PENDING_INT 317 -#define K_SYSCALL_COUNTER_GET_TOP_VALUE 318 -#define K_SYSCALL_COUNTER_GET_VALUE 319 -#define K_SYSCALL_COUNTER_GET_VALUE_64 320 -#define K_SYSCALL_COUNTER_IS_COUNTING_UP 321 -#define K_SYSCALL_COUNTER_SET_CHANNEL_ALARM 322 -#define K_SYSCALL_COUNTER_SET_GUARD_PERIOD 323 -#define K_SYSCALL_COUNTER_SET_TOP_VALUE 324 -#define K_SYSCALL_COUNTER_START 325 -#define K_SYSCALL_COUNTER_STOP 326 -#define K_SYSCALL_COUNTER_TICKS_TO_US 327 -#define K_SYSCALL_COUNTER_US_TO_TICKS 328 -#define K_SYSCALL_DAC_CHANNEL_SETUP 329 -#define K_SYSCALL_DAC_WRITE_VALUE 330 -#define K_SYSCALL_DEVMUX_SELECT_GET 331 -#define K_SYSCALL_DEVMUX_SELECT_SET 332 -#define K_SYSCALL_DMA_CHAN_FILTER 333 -#define K_SYSCALL_DMA_RELEASE_CHANNEL 334 -#define K_SYSCALL_DMA_REQUEST_CHANNEL 335 -#define K_SYSCALL_DMA_RESUME 336 -#define K_SYSCALL_DMA_START 337 -#define K_SYSCALL_DMA_STOP 338 -#define K_SYSCALL_DMA_SUSPEND 339 -#define K_SYSCALL_EEPROM_GET_SIZE 340 -#define K_SYSCALL_EEPROM_READ 341 -#define K_SYSCALL_EEPROM_WRITE 342 -#define K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF 343 -#define K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING 344 -#define K_SYSCALL_ESPI_CONFIG 345 -#define K_SYSCALL_ESPI_FLASH_ERASE 346 -#define K_SYSCALL_ESPI_GET_CHANNEL_STATUS 347 -#define K_SYSCALL_ESPI_READ_FLASH 348 -#define K_SYSCALL_ESPI_READ_LPC_REQUEST 349 -#define K_SYSCALL_ESPI_READ_REQUEST 350 -#define K_SYSCALL_ESPI_RECEIVE_OOB 351 -#define K_SYSCALL_ESPI_RECEIVE_VWIRE 352 -#define K_SYSCALL_ESPI_SAF_ACTIVATE 353 -#define K_SYSCALL_ESPI_SAF_CONFIG 354 -#define K_SYSCALL_ESPI_SAF_FLASH_ERASE 355 -#define K_SYSCALL_ESPI_SAF_FLASH_READ 356 -#define K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS 357 -#define K_SYSCALL_ESPI_SAF_FLASH_WRITE 358 -#define K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS 359 -#define K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS 360 -#define K_SYSCALL_ESPI_SEND_OOB 361 -#define K_SYSCALL_ESPI_SEND_VWIRE 362 -#define K_SYSCALL_ESPI_WRITE_FLASH 363 -#define K_SYSCALL_ESPI_WRITE_LPC_REQUEST 364 -#define K_SYSCALL_ESPI_WRITE_REQUEST 365 -#define K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY 366 -#define K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF 367 -#define K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP 368 -#define K_SYSCALL_FUEL_GAUGE_GET_PROP 369 -#define K_SYSCALL_FUEL_GAUGE_GET_PROPS 370 -#define K_SYSCALL_FUEL_GAUGE_SET_PROP 371 -#define K_SYSCALL_FUEL_GAUGE_SET_PROPS 372 -#define K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS 373 -#define K_SYSCALL_GNSS_GET_FIX_RATE 374 -#define K_SYSCALL_GNSS_GET_LATEST_TIMEPULSE 375 -#define K_SYSCALL_GNSS_GET_NAVIGATION_MODE 376 -#define K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS 377 -#define K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS 378 -#define K_SYSCALL_GNSS_SET_FIX_RATE 379 -#define K_SYSCALL_GNSS_SET_NAVIGATION_MODE 380 -#define K_SYSCALL_HAPTICS_START_OUTPUT 381 -#define K_SYSCALL_HAPTICS_STOP_OUTPUT 382 -#define K_SYSCALL_HWSPINLOCK_GET_MAX_ID 383 -#define K_SYSCALL_HWSPINLOCK_LOCK 384 -#define K_SYSCALL_HWSPINLOCK_TRYLOCK 385 -#define K_SYSCALL_HWSPINLOCK_UNLOCK 386 -#define K_SYSCALL_I2S_BUF_READ 387 -#define K_SYSCALL_I2S_BUF_WRITE 388 -#define K_SYSCALL_I2S_CONFIGURE 389 -#define K_SYSCALL_I2S_TRIGGER 390 -#define K_SYSCALL_I3C_DO_CCC 391 -#define K_SYSCALL_I3C_TRANSFER 392 -#define K_SYSCALL_IPM_COMPLETE 393 -#define K_SYSCALL_IPM_MAX_DATA_SIZE_GET 394 -#define K_SYSCALL_IPM_MAX_ID_VAL_GET 395 -#define K_SYSCALL_IPM_SEND 396 -#define K_SYSCALL_IPM_SET_ENABLED 397 -#define K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS 398 -#define K_SYSCALL_IVSHMEM_GET_ID 399 -#define K_SYSCALL_IVSHMEM_GET_MAX_PEERS 400 -#define K_SYSCALL_IVSHMEM_GET_MEM 401 -#define K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION 402 -#define K_SYSCALL_IVSHMEM_GET_PROTOCOL 403 -#define K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION 404 -#define K_SYSCALL_IVSHMEM_GET_STATE 405 -#define K_SYSCALL_IVSHMEM_GET_VECTORS 406 -#define K_SYSCALL_IVSHMEM_INT_PEER 407 -#define K_SYSCALL_IVSHMEM_REGISTER_HANDLER 408 -#define K_SYSCALL_IVSHMEM_SET_STATE 409 -#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET 410 -#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET 411 -#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET 412 -#define K_SYSCALL_K_MEM_PAGING_STATS_GET 413 -#define K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET 414 -#define K_SYSCALL_LED_BLINK 415 -#define K_SYSCALL_LED_GET_INFO 416 -#define K_SYSCALL_LED_OFF 417 -#define K_SYSCALL_LED_ON 418 -#define K_SYSCALL_LED_SET_BRIGHTNESS 419 -#define K_SYSCALL_LED_SET_CHANNEL 420 -#define K_SYSCALL_LED_SET_COLOR 421 -#define K_SYSCALL_LED_WRITE_CHANNELS 422 -#define K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT 423 -#define K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT 424 -#define K_SYSCALL_MBOX_MAX_CHANNELS_GET 425 -#define K_SYSCALL_MBOX_MTU_GET 426 -#define K_SYSCALL_MBOX_SEND 427 -#define K_SYSCALL_MBOX_SET_ENABLED 428 -#define K_SYSCALL_MDIO_BUS_DISABLE 429 -#define K_SYSCALL_MDIO_BUS_ENABLE 430 -#define K_SYSCALL_MDIO_READ 431 -#define K_SYSCALL_MDIO_READ_C45 432 -#define K_SYSCALL_MDIO_WRITE 433 -#define K_SYSCALL_MDIO_WRITE_C45 434 -#define K_SYSCALL_MSPI_CONFIG 435 -#define K_SYSCALL_MSPI_DEV_CONFIG 436 -#define K_SYSCALL_MSPI_GET_CHANNEL_STATUS 437 -#define K_SYSCALL_MSPI_SCRAMBLE_CONFIG 438 -#define K_SYSCALL_MSPI_TIMING_CONFIG 439 -#define K_SYSCALL_MSPI_TRANSCEIVE 440 -#define K_SYSCALL_MSPI_XIP_CONFIG 441 -#define K_SYSCALL_NET_SOCKET_SERVICE_REGISTER 442 -#define K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE 443 -#define K_SYSCALL_PECI_CONFIG 444 -#define K_SYSCALL_PECI_DISABLE 445 -#define K_SYSCALL_PECI_ENABLE 446 -#define K_SYSCALL_PECI_TRANSFER 447 -#define K_SYSCALL_PS2_CONFIG 448 -#define K_SYSCALL_PS2_DISABLE_CALLBACK 449 -#define K_SYSCALL_PS2_ENABLE_CALLBACK 450 -#define K_SYSCALL_PS2_READ 451 -#define K_SYSCALL_PS2_WRITE 452 -#define K_SYSCALL_PTP_CLOCK_GET 453 -#define K_SYSCALL_PWM_CAPTURE_CYCLES 454 -#define K_SYSCALL_PWM_DISABLE_CAPTURE 455 -#define K_SYSCALL_PWM_ENABLE_CAPTURE 456 -#define K_SYSCALL_PWM_GET_CYCLES_PER_SEC 457 -#define K_SYSCALL_PWM_SET_CYCLES 458 +#define K_SYSCALL_ATOMIC_ADD 248 +#define K_SYSCALL_ATOMIC_AND 249 +#define K_SYSCALL_ATOMIC_CAS 250 +#define K_SYSCALL_ATOMIC_NAND 251 +#define K_SYSCALL_ATOMIC_OR 252 +#define K_SYSCALL_ATOMIC_PTR_CAS 253 +#define K_SYSCALL_ATOMIC_PTR_SET 254 +#define K_SYSCALL_ATOMIC_SET 255 +#define K_SYSCALL_ATOMIC_SUB 256 +#define K_SYSCALL_ATOMIC_XOR 257 +#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET 258 +#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET 259 +#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET 260 +#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET 261 +#define K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET 262 +#define K_SYSCALL_AUXDISPLAY_CLEAR 263 +#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET 264 +#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET 265 +#define K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED 266 +#define K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET 267 +#define K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET 268 +#define K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND 269 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_OFF 270 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_ON 271 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET 272 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET 273 +#define K_SYSCALL_AUXDISPLAY_IS_BUSY 274 +#define K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED 275 +#define K_SYSCALL_AUXDISPLAY_WRITE 276 +#define K_SYSCALL_BBRAM_CHECK_INVALID 277 +#define K_SYSCALL_BBRAM_CHECK_POWER 278 +#define K_SYSCALL_BBRAM_CHECK_STANDBY_POWER 279 +#define K_SYSCALL_BBRAM_GET_SIZE 280 +#define K_SYSCALL_BBRAM_READ 281 +#define K_SYSCALL_BBRAM_WRITE 282 +#define K_SYSCALL_BC12_SET_RESULT_CB 283 +#define K_SYSCALL_BC12_SET_ROLE 284 +#define K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ 285 +#define K_SYSCALL_CAN_CALC_TIMING 286 +#define K_SYSCALL_CAN_CALC_TIMING_DATA 287 +#define K_SYSCALL_CAN_GET_BITRATE_MAX 288 +#define K_SYSCALL_CAN_GET_BITRATE_MIN 289 +#define K_SYSCALL_CAN_GET_CAPABILITIES 290 +#define K_SYSCALL_CAN_GET_CORE_CLOCK 291 +#define K_SYSCALL_CAN_GET_MAX_FILTERS 292 +#define K_SYSCALL_CAN_GET_MODE 293 +#define K_SYSCALL_CAN_GET_STATE 294 +#define K_SYSCALL_CAN_GET_TIMING_DATA_MAX 295 +#define K_SYSCALL_CAN_GET_TIMING_DATA_MIN 296 +#define K_SYSCALL_CAN_GET_TIMING_MAX 297 +#define K_SYSCALL_CAN_GET_TIMING_MIN 298 +#define K_SYSCALL_CAN_GET_TRANSCEIVER 299 +#define K_SYSCALL_CAN_RECOVER 300 +#define K_SYSCALL_CAN_REMOVE_RX_FILTER 301 +#define K_SYSCALL_CAN_SEND 302 +#define K_SYSCALL_CAN_SET_BITRATE 303 +#define K_SYSCALL_CAN_SET_BITRATE_DATA 304 +#define K_SYSCALL_CAN_SET_MODE 305 +#define K_SYSCALL_CAN_SET_TIMING 306 +#define K_SYSCALL_CAN_SET_TIMING_DATA 307 +#define K_SYSCALL_CAN_START 308 +#define K_SYSCALL_CAN_STATS_GET_ACK_ERRORS 309 +#define K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS 310 +#define K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS 311 +#define K_SYSCALL_CAN_STATS_GET_BIT_ERRORS 312 +#define K_SYSCALL_CAN_STATS_GET_CRC_ERRORS 313 +#define K_SYSCALL_CAN_STATS_GET_FORM_ERRORS 314 +#define K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS 315 +#define K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS 316 +#define K_SYSCALL_CAN_STOP 317 +#define K_SYSCALL_CHARGER_CHARGE_ENABLE 318 +#define K_SYSCALL_CHARGER_GET_PROP 319 +#define K_SYSCALL_CHARGER_SET_PROP 320 +#define K_SYSCALL_COMPARATOR_GET_OUTPUT 321 +#define K_SYSCALL_COMPARATOR_SET_TRIGGER 322 +#define K_SYSCALL_COMPARATOR_TRIGGER_IS_PENDING 323 +#define K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM 324 +#define K_SYSCALL_COUNTER_GET_FREQUENCY 325 +#define K_SYSCALL_COUNTER_GET_GUARD_PERIOD 326 +#define K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE 327 +#define K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS 328 +#define K_SYSCALL_COUNTER_GET_PENDING_INT 329 +#define K_SYSCALL_COUNTER_GET_TOP_VALUE 330 +#define K_SYSCALL_COUNTER_GET_VALUE 331 +#define K_SYSCALL_COUNTER_GET_VALUE_64 332 +#define K_SYSCALL_COUNTER_IS_COUNTING_UP 333 +#define K_SYSCALL_COUNTER_SET_CHANNEL_ALARM 334 +#define K_SYSCALL_COUNTER_SET_GUARD_PERIOD 335 +#define K_SYSCALL_COUNTER_SET_TOP_VALUE 336 +#define K_SYSCALL_COUNTER_START 337 +#define K_SYSCALL_COUNTER_STOP 338 +#define K_SYSCALL_COUNTER_TICKS_TO_US 339 +#define K_SYSCALL_COUNTER_US_TO_TICKS 340 +#define K_SYSCALL_DAC_CHANNEL_SETUP 341 +#define K_SYSCALL_DAC_WRITE_VALUE 342 +#define K_SYSCALL_DEVMUX_SELECT_GET 343 +#define K_SYSCALL_DEVMUX_SELECT_SET 344 +#define K_SYSCALL_EEPROM_GET_SIZE 345 +#define K_SYSCALL_EEPROM_READ 346 +#define K_SYSCALL_EEPROM_WRITE 347 +#define K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF 348 +#define K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING 349 +#define K_SYSCALL_ESPI_CONFIG 350 +#define K_SYSCALL_ESPI_FLASH_ERASE 351 +#define K_SYSCALL_ESPI_GET_CHANNEL_STATUS 352 +#define K_SYSCALL_ESPI_READ_FLASH 353 +#define K_SYSCALL_ESPI_READ_LPC_REQUEST 354 +#define K_SYSCALL_ESPI_READ_REQUEST 355 +#define K_SYSCALL_ESPI_RECEIVE_OOB 356 +#define K_SYSCALL_ESPI_RECEIVE_VWIRE 357 +#define K_SYSCALL_ESPI_SAF_ACTIVATE 358 +#define K_SYSCALL_ESPI_SAF_CONFIG 359 +#define K_SYSCALL_ESPI_SAF_FLASH_ERASE 360 +#define K_SYSCALL_ESPI_SAF_FLASH_READ 361 +#define K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS 362 +#define K_SYSCALL_ESPI_SAF_FLASH_WRITE 363 +#define K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS 364 +#define K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS 365 +#define K_SYSCALL_ESPI_SEND_OOB 366 +#define K_SYSCALL_ESPI_SEND_VWIRE 367 +#define K_SYSCALL_ESPI_WRITE_FLASH 368 +#define K_SYSCALL_ESPI_WRITE_LPC_REQUEST 369 +#define K_SYSCALL_ESPI_WRITE_REQUEST 370 +#define K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY 371 +#define K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF 372 +#define K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP 373 +#define K_SYSCALL_FUEL_GAUGE_GET_PROP 374 +#define K_SYSCALL_FUEL_GAUGE_GET_PROPS 375 +#define K_SYSCALL_FUEL_GAUGE_SET_PROP 376 +#define K_SYSCALL_FUEL_GAUGE_SET_PROPS 377 +#define K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS 378 +#define K_SYSCALL_GNSS_GET_FIX_RATE 379 +#define K_SYSCALL_GNSS_GET_LATEST_TIMEPULSE 380 +#define K_SYSCALL_GNSS_GET_NAVIGATION_MODE 381 +#define K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS 382 +#define K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS 383 +#define K_SYSCALL_GNSS_SET_FIX_RATE 384 +#define K_SYSCALL_GNSS_SET_NAVIGATION_MODE 385 +#define K_SYSCALL_HAPTICS_START_OUTPUT 386 +#define K_SYSCALL_HAPTICS_STOP_OUTPUT 387 +#define K_SYSCALL_HWSPINLOCK_GET_MAX_ID 388 +#define K_SYSCALL_HWSPINLOCK_LOCK 389 +#define K_SYSCALL_HWSPINLOCK_TRYLOCK 390 +#define K_SYSCALL_HWSPINLOCK_UNLOCK 391 +#define K_SYSCALL_I2S_BUF_READ 392 +#define K_SYSCALL_I2S_BUF_WRITE 393 +#define K_SYSCALL_I2S_CONFIGURE 394 +#define K_SYSCALL_I2S_TRIGGER 395 +#define K_SYSCALL_I3C_DO_CCC 396 +#define K_SYSCALL_I3C_TRANSFER 397 +#define K_SYSCALL_IPM_COMPLETE 398 +#define K_SYSCALL_IPM_MAX_DATA_SIZE_GET 399 +#define K_SYSCALL_IPM_MAX_ID_VAL_GET 400 +#define K_SYSCALL_IPM_SEND 401 +#define K_SYSCALL_IPM_SET_ENABLED 402 +#define K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS 403 +#define K_SYSCALL_IVSHMEM_GET_ID 404 +#define K_SYSCALL_IVSHMEM_GET_MAX_PEERS 405 +#define K_SYSCALL_IVSHMEM_GET_MEM 406 +#define K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION 407 +#define K_SYSCALL_IVSHMEM_GET_PROTOCOL 408 +#define K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION 409 +#define K_SYSCALL_IVSHMEM_GET_STATE 410 +#define K_SYSCALL_IVSHMEM_GET_VECTORS 411 +#define K_SYSCALL_IVSHMEM_INT_PEER 412 +#define K_SYSCALL_IVSHMEM_REGISTER_HANDLER 413 +#define K_SYSCALL_IVSHMEM_SET_STATE 414 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET 415 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET 416 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET 417 +#define K_SYSCALL_K_MEM_PAGING_STATS_GET 418 +#define K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET 419 +#define K_SYSCALL_LED_BLINK 420 +#define K_SYSCALL_LED_GET_INFO 421 +#define K_SYSCALL_LED_OFF 422 +#define K_SYSCALL_LED_ON 423 +#define K_SYSCALL_LED_SET_BRIGHTNESS 424 +#define K_SYSCALL_LED_SET_CHANNEL 425 +#define K_SYSCALL_LED_SET_COLOR 426 +#define K_SYSCALL_LED_WRITE_CHANNELS 427 +#define K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT 428 +#define K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT 429 +#define K_SYSCALL_MBOX_MAX_CHANNELS_GET 430 +#define K_SYSCALL_MBOX_MTU_GET 431 +#define K_SYSCALL_MBOX_SEND 432 +#define K_SYSCALL_MBOX_SET_ENABLED 433 +#define K_SYSCALL_MDIO_BUS_DISABLE 434 +#define K_SYSCALL_MDIO_BUS_ENABLE 435 +#define K_SYSCALL_MDIO_READ 436 +#define K_SYSCALL_MDIO_READ_C45 437 +#define K_SYSCALL_MDIO_WRITE 438 +#define K_SYSCALL_MDIO_WRITE_C45 439 +#define K_SYSCALL_MSPI_CONFIG 440 +#define K_SYSCALL_MSPI_DEV_CONFIG 441 +#define K_SYSCALL_MSPI_GET_CHANNEL_STATUS 442 +#define K_SYSCALL_MSPI_SCRAMBLE_CONFIG 443 +#define K_SYSCALL_MSPI_TIMING_CONFIG 444 +#define K_SYSCALL_MSPI_TRANSCEIVE 445 +#define K_SYSCALL_MSPI_XIP_CONFIG 446 +#define K_SYSCALL_NET_SOCKET_SERVICE_REGISTER 447 +#define K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE 448 +#define K_SYSCALL_PECI_CONFIG 449 +#define K_SYSCALL_PECI_DISABLE 450 +#define K_SYSCALL_PECI_ENABLE 451 +#define K_SYSCALL_PECI_TRANSFER 452 +#define K_SYSCALL_PS2_CONFIG 453 +#define K_SYSCALL_PS2_DISABLE_CALLBACK 454 +#define K_SYSCALL_PS2_ENABLE_CALLBACK 455 +#define K_SYSCALL_PS2_READ 456 +#define K_SYSCALL_PS2_WRITE 457 +#define K_SYSCALL_PTP_CLOCK_GET 458 #define K_SYSCALL_RETAINED_MEM_CLEAR 459 #define K_SYSCALL_RETAINED_MEM_READ 460 #define K_SYSCALL_RETAINED_MEM_SIZE 461 diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h index cf7906a2..2da02967 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h @@ -1,5 +1,7 @@ #define CONFIG_NET_L2_ETHERNET 1 +#define CONFIG_ADC_INIT_PRIORITY 50 #define CONFIG_UART_INTERRUPT_DRIVEN 1 +#define CONFIG_SPI_STM32_INTERRUPT 1 #define CONFIG_REGULATOR 1 #define CONFIG_BOARD_REQUIRES_SERIAL_BACKEND_CDC_ACM 1 #define CONFIG_SERIAL 1 @@ -57,6 +59,7 @@ #define CONFIG_GPIO 1 #define CONFIG_CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS 1 #define CONFIG_SPI 1 +#define CONFIG_MEMC 1 #define CONFIG_CACHE 1 #define CONFIG_LOG 1 #define CONFIG_DCACHE_LINE_SIZE 32 @@ -82,15 +85,21 @@ #define CONFIG_DT_HAS_ETHERNET_PHY_ENABLED 1 #define CONFIG_DT_HAS_FIXED_CLOCK_ENABLED 1 #define CONFIG_DT_HAS_FIXED_PARTITIONS_ENABLED 1 +#define CONFIG_DT_HAS_GALAXYCORE_GC2145_ENABLED 1 #define CONFIG_DT_HAS_GPIO_LEDS_ENABLED 1 #define CONFIG_DT_HAS_INFINEON_CYW43XXX_BT_HCI_ENABLED 1 #define CONFIG_DT_HAS_MMIO_SRAM_ENABLED 1 #define CONFIG_DT_HAS_NXP_PF1550_ENABLED 1 #define CONFIG_DT_HAS_NXP_PF1550_CHARGER_ENABLED 1 #define CONFIG_DT_HAS_NXP_PF1550_REGULATOR_ENABLED 1 +#define CONFIG_DT_HAS_PWM_CLOCK_ENABLED 1 #define CONFIG_DT_HAS_REGULATOR_FIXED_ENABLED 1 #define CONFIG_DT_HAS_SOC_NV_FLASH_ENABLED 1 #define CONFIG_DT_HAS_ST_MBOX_STM32_HSEM_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_ADC_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_DCMI_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_DMA_V1_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_DMAMUX_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_ETHERNET_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_EXTI_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_FLASH_CONTROLLER_ENABLED 1 @@ -103,11 +112,15 @@ #define CONFIG_DT_HAS_ST_STM32_NV_FLASH_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_OTGHS_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_PINCTRL_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_PWM_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_QSPI_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_QSPI_NOR_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_RCC_RCTL_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_RNG_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_RTC_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_SPI_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_SPI_FIFO_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32_TIMERS_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_UART_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32_USART_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32H7_ETHERNET_ENABLED 1 @@ -116,8 +129,10 @@ #define CONFIG_DT_HAS_ST_STM32H7_HSI_CLOCK_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32H7_PLL_CLOCK_ENABLED 1 #define CONFIG_DT_HAS_ST_STM32H7_RCC_ENABLED 1 +#define CONFIG_DT_HAS_ST_STM32H7_SPI_ENABLED 1 #define CONFIG_DT_HAS_USB_NOP_XCEIV_ENABLED 1 #define CONFIG_DT_HAS_USB_ULPI_PHY_ENABLED 1 +#define CONFIG_DT_HAS_VND_GPIO_ENABLED 1 #define CONFIG_DT_HAS_ZEPHYR_BT_HCI_UART_ENABLED 1 #define CONFIG_DT_HAS_ZEPHYR_CDC_ACM_UART_ENABLED 1 #define CONFIG_DT_HAS_ZEPHYR_MEMORY_REGION_ENABLED 1 @@ -188,13 +203,21 @@ #define CONFIG_ZEPHYR_TINYCRYPT_MODULE 1 #define CONFIG_HAS_STM32CUBE 1 #define CONFIG_USE_STM32_HAL_CORTEX 1 +#define CONFIG_USE_STM32_HAL_DCMI 1 +#define CONFIG_USE_STM32_HAL_DMA 1 +#define CONFIG_USE_STM32_HAL_DMA_EX 1 #define CONFIG_USE_STM32_HAL_ETH 1 #define CONFIG_USE_STM32_HAL_MDMA 1 #define CONFIG_USE_STM32_HAL_PCD 1 #define CONFIG_USE_STM32_HAL_PCD_EX 1 #define CONFIG_USE_STM32_HAL_QSPI 1 +#define CONFIG_USE_STM32_HAL_SDRAM 1 +#define CONFIG_USE_STM32_LL_DMA 1 +#define CONFIG_USE_STM32_LL_FMC 1 #define CONFIG_USE_STM32_LL_RCC 1 #define CONFIG_USE_STM32_LL_RNG 1 +#define CONFIG_USE_STM32_LL_SPI 1 +#define CONFIG_USE_STM32_LL_TIM 1 #define CONFIG_USE_STM32_LL_USB 1 #define CONFIG_USE_STM32_LL_UTILS 1 #define CONFIG_TINYCRYPT 1 @@ -326,7 +349,7 @@ #define CONFIG_POLL 1 #define CONFIG_NUM_MBOX_ASYNC_MSGS 10 #define CONFIG_KERNEL_MEM_POOL 1 -#define CONFIG_HEAP_MEM_POOL_SIZE 32768 +#define CONFIG_HEAP_MEM_POOL_SIZE 2048 #define CONFIG_SWAP_NONATOMIC 1 #define CONFIG_TIMEOUT_64BIT 1 #define CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS 365 @@ -345,6 +368,10 @@ #define CONFIG_KERNEL_INIT_PRIORITY_DEVICE 50 #define CONFIG_APPLICATION_INIT_PRIORITY 90 #define CONFIG_SOC_EARLY_INIT_HOOK 1 +#define CONFIG_ADC 1 +#define CONFIG_ADC_LOG_LEVEL_DEFAULT 1 +#define CONFIG_ADC_LOG_LEVEL 3 +#define CONFIG_ADC_STM32 1 #define CONFIG_FLASH 1 #define CONFIG_CACHE_LOG_LEVEL_DEFAULT 1 #define CONFIG_CACHE_LOG_LEVEL 3 @@ -352,11 +379,22 @@ #define CONFIG_CLOCK_CONTROL_LOG_LEVEL 3 #define CONFIG_CLOCK_CONTROL_STM32_CUBE 1 #define CONFIG_CLOCK_STM32_HSE_CLOCK 25000000 +#define CONFIG_CLOCK_CONTROL_PWM 1 +#define CONFIG_CLOCK_CONTROL_PWM_INIT_PRIORITY 51 #define CONFIG_CONSOLE_INPUT_MAX_LINE_LEN 128 #define CONFIG_CONSOLE_HAS_DRIVER 1 #define CONFIG_CONSOLE_INIT_PRIORITY 60 #define CONFIG_UART_CONSOLE_LOG_LEVEL_DEFAULT 1 #define CONFIG_UART_CONSOLE_LOG_LEVEL 3 +#define CONFIG_DMA 1 +#define CONFIG_DMA_INIT_PRIORITY 40 +#define CONFIG_DMA_LOG_LEVEL_DEFAULT 1 +#define CONFIG_DMA_LOG_LEVEL 3 +#define CONFIG_DMA_STM32 1 +#define CONFIG_DMA_STM32_V1 1 +#define CONFIG_DMAMUX_STM32 1 +#define CONFIG_DMAMUX_STM32_INIT_PRIORITY 41 +#define CONFIG_DMA_ESP32_MAX_DESCRIPTOR_NUM 16 #define CONFIG_ENTROPY_GENERATOR 1 #define CONFIG_ENTROPY_LOG_LEVEL_DEFAULT 1 #define CONFIG_ENTROPY_LOG_LEVEL 3 @@ -398,6 +436,7 @@ #define CONFIG_GPIO_LOG_LEVEL_DEFAULT 1 #define CONFIG_GPIO_LOG_LEVEL 3 #define CONFIG_GPIO_STM32 1 +#define CONFIG_GPIO_TEST 1 #define CONFIG_HWINFO 1 #define CONFIG_HWINFO_LOG_LEVEL_DEFAULT 1 #define CONFIG_HWINFO_LOG_LEVEL 3 @@ -419,6 +458,11 @@ #define CONFIG_MDIO_INIT_PRIORITY 60 #define CONFIG_MDIO_LOG_LEVEL_DEFAULT 1 #define CONFIG_MDIO_LOG_LEVEL 3 +#define CONFIG_MEMC_INIT_PRIORITY 0 +#define CONFIG_MEMC_STM32 1 +#define CONFIG_MEMC_STM32_SDRAM 1 +#define CONFIG_MEMC_LOG_LEVEL_DEFAULT 1 +#define CONFIG_MEMC_LOG_LEVEL 3 #define CONFIG_MFD_LOG_LEVEL_DEFAULT 1 #define CONFIG_MFD_LOG_LEVEL 3 #define CONFIG_MFD_INIT_PRIORITY 80 @@ -428,6 +472,12 @@ #define CONFIG_PINCTRL_LOG_LEVEL 3 #define CONFIG_PINCTRL_STM32 1 #define CONFIG_PINCTRL_STM32_REMAP_INIT_PRIORITY 2 +#define CONFIG_PWM 1 +#define CONFIG_PWM_LOG_LEVEL_DEFAULT 1 +#define CONFIG_PWM_LOG_LEVEL 3 +#define CONFIG_PWM_INIT_PRIORITY 50 +#define CONFIG_PWM_STM32 1 +#define CONFIG_PWM_TC_INIT_PRIORITY 50 #define CONFIG_REGULATOR_THREAD_SAFE_REFCNT 1 #define CONFIG_REGULATOR_LOG_LEVEL_DEFAULT 1 #define CONFIG_REGULATOR_LOG_LEVEL 3 @@ -437,15 +487,19 @@ #define CONFIG_RESET_INIT_PRIORITY 35 #define CONFIG_RESET_STM32 1 #define CONFIG_SERIAL_HAS_DRIVER 1 +#define CONFIG_SERIAL_SUPPORT_ASYNC 1 #define CONFIG_SERIAL_SUPPORT_INTERRUPT 1 #define CONFIG_SERIAL_INIT_PRIORITY 50 #define CONFIG_UART_LOG_LEVEL_DEFAULT 1 #define CONFIG_UART_LOG_LEVEL 3 #define CONFIG_UART_STM32 1 +#define CONFIG_SPI_ASYNC 1 #define CONFIG_SPI_INIT_PRIORITY 50 #define CONFIG_SPI_COMPLETION_TIMEOUT_TOLERANCE 200 #define CONFIG_SPI_LOG_LEVEL_DEFAULT 1 #define CONFIG_SPI_LOG_LEVEL 3 +#define CONFIG_SPI_STM32 1 +#define CONFIG_SPI_STM32_USE_HW_SS 1 #define CONFIG_TIMER_HAS_64BIT_CYCLE_COUNTER 1 #define CONFIG_SYSTEM_CLOCK_INIT_PRIORITY 0 #define CONFIG_TICKLESS_CAPABLE 1 @@ -463,6 +517,18 @@ #define CONFIG_NRF_USBD_COMMON_LOG_LEVEL 3 #define CONFIG_USBC_LOG_LEVEL_DEFAULT 1 #define CONFIG_USBC_LOG_LEVEL 3 +#define CONFIG_VIDEO 1 +#define CONFIG_VIDEO_LOG_LEVEL_DBG 1 +#define CONFIG_VIDEO_LOG_LEVEL 4 +#define CONFIG_VIDEO_INIT_PRIORITY 60 +#define CONFIG_VIDEO_BUFFER_POOL_SZ_MAX 614400 +#define CONFIG_VIDEO_BUFFER_POOL_NUM_MAX 3 +#define CONFIG_VIDEO_BUFFER_POOL_ALIGN 32 +#define CONFIG_VIDEO_BUFFER_USE_SHARED_MULTI_HEAP 1 +#define CONFIG_VIDEO_BUFFER_SMH_ATTRIBUTE 2 +#define CONFIG_VIDEO_STM32_DCMI 1 +#define CONFIG_VIDEO_GC2145 1 +#define CONFIG_VIDEO_EMUL_IMAGER_FRAMEBUFFER_SIZE 4096 #define CONFIG_NET_TCP_WORKQ_STACK_SIZE 8192 #define CONFIG_NET_MGMT_EVENT_STACK_SIZE 8192 #define CONFIG_NET_TC_TX_COUNT 0 @@ -497,6 +563,8 @@ #define CONFIG_SYS_HEAP_ALLOC_LOOPS 3 #define CONFIG_SYS_HEAP_ARRAY_SIZE 0 #define CONFIG_SYS_HEAP_AUTO 1 +#define CONFIG_MULTI_HEAP 1 +#define CONFIG_SHARED_MULTI_HEAP 1 #define CONFIG_NET_BUF 1 #define CONFIG_NET_BUF_LOG_LEVEL_DEFAULT 1 #define CONFIG_NET_BUF_LOG_LEVEL 3 diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h index a8b4ab51..998461ca 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h @@ -2,7 +2,7 @@ * Generated by gen_defines.py * * DTS input file: - * /home/burellil/Work/ArduinoCore-zephyr/ArduinoCore-zephyr/build/arduino_portenta_h7_stm32h747xx_m7/zephyr/zephyr.dts.pre + * /home/kurte/github/ArduinoCore-zephyr/build/arduino_portenta_h7_stm32h747xx_m7/zephyr/zephyr.dts.pre * * Directories with bindings: * $ZEPHYR_BASE/dts/bindings @@ -17,266 +17,307 @@ * 6 /clocks/clk-hse * 7 /clocks/pll@0 * 8 /soc/rcc@58024400 - * 9 /soc/adc@58026000 - * 10 /dietemp - * 11 /soc/pin-controller@58020000 - * 12 /soc/pin-controller@58020000/gpio@58022400 - * 13 /ethernet_phy_en - * 14 /memory@24000000 - * 15 /memory@30000000 - * 16 /memory@30020000 - * 17 /memory@30040000 - * 18 /memory@38000000 - * 19 /memory@90000000 - * 20 /soc/pin-controller@58020000/gpio@58021C00 - * 21 /oscen - * 22 /sdram@c0000000 - * 23 /soc/pin-controller@58020000/i2c1_scl_pb6 - * 24 /soc/pin-controller@58020000/i2c1_sda_pb7 - * 25 /soc/i2c@40005400 - * 26 /smbus1 - * 27 /soc/i2c@40005800 - * 28 /smbus2 - * 29 /soc/pin-controller@58020000/i2c3_scl_ph7 - * 30 /soc/pin-controller@58020000/i2c3_sda_ph8 - * 31 /soc/i2c@40005c00 - * 32 /smbus3 - * 33 /soc/pin-controller@58020000/i2c4_scl_ph11 - * 34 /soc/pin-controller@58020000/i2c4_sda_ph12 - * 35 /soc/i2c@58001c00 - * 36 /smbus4 - * 37 /vbat - * 38 /vref - * 39 /soc/pin-controller@58020000/uart4_rx_pi9 - * 40 /soc/pin-controller@58020000/uart4_tx_pa0 - * 41 /soc/rcc@58024400/reset-controller - * 42 /soc/serial@40004c00 - * 43 /soc/pin-controller@58020000/usart1_rx_pa10 - * 44 /soc/pin-controller@58020000/usart1_tx_pa9 - * 45 /soc/serial@40011000 - * 46 /soc/pin-controller@58020000/usart6_rx_pg9 - * 47 /soc/pin-controller@58020000/usart6_tx_pg14 - * 48 /soc/serial@40011400 - * 49 /soc/pin-controller@58020000/gpio@58020000 - * 50 /soc/pin-controller@58020000/gpio@58020800 - * 51 /soc/pin-controller@58020000/gpio@58021800 - * 52 /soc/pin-controller@58020000/gpio@58022000 - * 53 /soc/pin-controller@58020000/gpio@58022800 - * 54 /otghs_ulpis_phy - * 55 /soc/pin-controller@58020000/usb_otg_hs_ulpi_ck_pa5 - * 56 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d0_pa3 - * 57 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d1_pb0 - * 58 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d2_pb1 - * 59 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d3_pb10 - * 60 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d4_pb11 - * 61 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d5_pb12 - * 62 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d6_pb13 - * 63 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d7_pb5 - * 64 /soc/pin-controller@58020000/usb_otg_hs_ulpi_dir_pi11 - * 65 /soc/pin-controller@58020000/usb_otg_hs_ulpi_nxt_ph4 - * 66 /soc/pin-controller@58020000/usb_otg_hs_ulpi_stp_pc0 - * 67 /soc/usb@40040000 - * 68 /soc/usb@40040000/board_cdc_acm_uart - * 69 /zephyr,user - * 70 /clocks/clk-csi - * 71 /clocks/clk-hsi - * 72 /clocks/clk-hsi48 - * 73 /clocks/clk-lse - * 74 /clocks/clk-lsi - * 75 /clocks/perck - * 76 /clocks/pll@1 - * 77 /clocks/pll@2 - * 78 /cpus - * 79 /cpus/cpu@0 - * 80 /cpus/cpu@0/mpu@e000ed90 - * 81 /leds - * 82 /leds/led_0 - * 83 /leds/led_1 - * 84 /leds/led_2 - * 85 /mcos - * 86 /mcos/mco1 - * 87 /mcos/mco2 - * 88 /soc/adc@40022000 - * 89 /soc/adc@40022100 - * 90 /soc/adc@40022300 - * 91 /soc/bdma@58025400 - * 92 /soc/pin-controller@58020000/fdcan1_rx_pb8 - * 93 /soc/pin-controller@58020000/fdcan1_tx_ph13 - * 94 /soc/can@4000a000 - * 95 /soc/can@4000a400 - * 96 /soc/dac@40007400 - * 97 /soc/dcmi@48020000 - * 98 /soc/display-controller@50001000 - * 99 /soc/dma@40020000 - * 100 /soc/dma@40020400 - * 101 /soc/dmamux@58025800 - * 102 /soc/dsihost@50000000 - * 103 /soc/dmamux@40020800 - * 104 /soc/i2s@40003800 - * 105 /soc/i2s@40003c00 - * 106 /soc/i2s@40013000 - * 107 /soc/interrupt-controller@58000000 - * 108 /soc/mailbox@58026400 - * 109 /soc/memory@38800000 - * 110 /soc/rng@48021800 - * 111 /soc/sdmmc@48022400 - * 112 /soc/sdmmc@52007000 - * 113 /soc/serial@40004400 - * 114 /soc/serial@40004800 - * 115 /soc/serial@40005000 - * 116 /soc/pin-controller@58020000/uart8_rx_pj9 - * 117 /soc/pin-controller@58020000/uart8_tx_pj8 - * 118 /soc/serial@40007c00 - * 119 /soc/serial@58000c00 - * 120 /soc/pin-controller@58020000/spi2_miso_pc2 - * 121 /soc/pin-controller@58020000/spi2_mosi_pc3 - * 122 /soc/pin-controller@58020000/spi2_nss_pi0 - * 123 /soc/pin-controller@58020000/spi2_sck_pi1 - * 124 /soc/spi@40003800 - * 125 /soc/spi@40003c00 - * 126 /soc/spi@40013000 - * 127 /soc/spi@40013400 - * 128 /soc/spi@40015000 - * 129 /soc/spi@58001400 - * 130 /soc/timer@e000e010 - * 131 /soc/timers@40002400 - * 132 /otghs_fs_phy - * 133 /soc/usb@40080000 - * 134 /soc/watchdog@50003000 - * 135 /soc/watchdog@58004800 - * 136 /soc/pin-controller@58020000/eth_crs_dv_pa7 - * 137 /soc/pin-controller@58020000/eth_ref_clk_pa1 - * 138 /soc/pin-controller@58020000/eth_rxd0_pc4 - * 139 /soc/pin-controller@58020000/eth_rxd1_pc5 - * 140 /soc/pin-controller@58020000/eth_tx_en_pg11 - * 141 /soc/pin-controller@58020000/eth_txd0_pg13 - * 142 /soc/pin-controller@58020000/eth_txd1_pg12 - * 143 /soc/ethernet@40028000 - * 144 /soc/pin-controller@58020000/eth_mdc_pc1 - * 145 /soc/pin-controller@58020000/eth_mdio_pa2 - * 146 /soc/ethernet@40028000/mdio - * 147 /soc/ethernet@40028000/mdio/ethernet-phy@0 - * 148 /soc/flash-controller@52002000 - * 149 /soc/flash-controller@52002000/flash@8000000 - * 150 /soc/flash-controller@52002000/flash@8000000/partitions - * 151 /soc/flash-controller@52002000/flash@8000000/partitions/partition@0 - * 152 /soc/flash-controller@52002000/flash@8000000/partitions/partition@10000 - * 153 /soc/flash-controller@52002000/flash@8000000/partitions/partition@40000 - * 154 /soc/flash-controller@52002000/flash@8000000/partitions/partition@A0000 - * 155 /soc/flash-controller@52002000/flash@8000000/partitions/partition@e0000 - * 156 /soc/i2c@40005400/pmic@8 - * 157 /soc/i2c@40005400/pmic@8/charger - * 158 /soc/i2c@40005400/pmic@8/regulators - * 159 /soc/i2c@40005400/pmic@8/regulators/BUCK1 - * 160 /soc/i2c@40005400/pmic@8/regulators/BUCK2 - * 161 /soc/i2c@40005400/pmic@8/regulators/BUCK3 - * 162 /soc/i2c@40005400/pmic@8/regulators/LDO1 - * 163 /soc/i2c@40005400/pmic@8/regulators/LDO2 - * 164 /soc/i2c@40005400/pmic@8/regulators/LDO3 - * 165 /soc/pin-controller@58020000/fmc_a0_pf0 - * 166 /soc/pin-controller@58020000/fmc_a10_pg0 - * 167 /soc/pin-controller@58020000/fmc_a11_pg1 - * 168 /soc/pin-controller@58020000/fmc_a12_pg2 - * 169 /soc/pin-controller@58020000/fmc_a14_pg4 - * 170 /soc/pin-controller@58020000/fmc_a15_pg5 - * 171 /soc/pin-controller@58020000/fmc_a1_pf1 - * 172 /soc/pin-controller@58020000/fmc_a2_pf2 - * 173 /soc/pin-controller@58020000/fmc_a3_pf3 - * 174 /soc/pin-controller@58020000/fmc_a4_pf4 - * 175 /soc/pin-controller@58020000/fmc_a5_pf5 - * 176 /soc/pin-controller@58020000/fmc_a6_pf12 - * 177 /soc/pin-controller@58020000/fmc_a7_pf13 - * 178 /soc/pin-controller@58020000/fmc_a8_pf14 - * 179 /soc/pin-controller@58020000/fmc_a9_pf15 - * 180 /soc/pin-controller@58020000/fmc_d0_pd14 - * 181 /soc/pin-controller@58020000/fmc_d10_pe13 - * 182 /soc/pin-controller@58020000/fmc_d11_pe14 - * 183 /soc/pin-controller@58020000/fmc_d12_pe15 - * 184 /soc/pin-controller@58020000/fmc_d13_pd8 - * 185 /soc/pin-controller@58020000/fmc_d14_pd9 - * 186 /soc/pin-controller@58020000/fmc_d15_pd10 - * 187 /soc/pin-controller@58020000/fmc_d1_pd15 - * 188 /soc/pin-controller@58020000/fmc_d2_pd0 - * 189 /soc/pin-controller@58020000/fmc_d3_pd1 - * 190 /soc/pin-controller@58020000/fmc_d4_pe7 - * 191 /soc/pin-controller@58020000/fmc_d5_pe8 - * 192 /soc/pin-controller@58020000/fmc_d6_pe9 - * 193 /soc/pin-controller@58020000/fmc_d7_pe10 - * 194 /soc/pin-controller@58020000/fmc_d8_pe11 - * 195 /soc/pin-controller@58020000/fmc_d9_pe12 - * 196 /soc/pin-controller@58020000/fmc_nbl0_pe0 - * 197 /soc/pin-controller@58020000/fmc_nbl1_pe1 - * 198 /soc/pin-controller@58020000/fmc_sdcke0_ph2 - * 199 /soc/pin-controller@58020000/fmc_sdclk_pg8 - * 200 /soc/pin-controller@58020000/fmc_sdncas_pg15 - * 201 /soc/pin-controller@58020000/fmc_sdne0_ph3 - * 202 /soc/pin-controller@58020000/fmc_sdnras_pf11 - * 203 /soc/pin-controller@58020000/fmc_sdnwe_ph5 - * 204 /soc/memory-controller@52004000 - * 205 /soc/memory-controller@52004000/sdram - * 206 /soc/memory-controller@52004000/sdram/bank@0 - * 207 /soc/pin-controller@58020000/gpio@58020400 - * 208 /soc/pin-controller@58020000/gpio@58020C00 - * 209 /soc/pin-controller@58020000/gpio@58021000 - * 210 /soc/pin-controller@58020000/gpio@58021400 - * 211 /soc/rtc@58004000 - * 212 /soc/rtc@58004000/backup_regs - * 213 /soc/pin-controller@58020000/uart7_cts_pf9 - * 214 /soc/pin-controller@58020000/uart7_rts_pf8 - * 215 /soc/pin-controller@58020000/uart7_rx_pf6 - * 216 /soc/pin-controller@58020000/uart7_tx_pa15 - * 217 /soc/serial@40007800 - * 218 /soc/serial@40007800/bt_hci_uart - * 219 /soc/serial@40007800/bt_hci_uart/murata-1dx - * 220 /soc/pin-controller@58020000/quadspi_bk1_io0_pd11 - * 221 /soc/pin-controller@58020000/quadspi_bk1_io1_pd12 - * 222 /soc/pin-controller@58020000/quadspi_bk1_io2_pf7 - * 223 /soc/pin-controller@58020000/quadspi_bk1_io3_pd13 - * 224 /soc/pin-controller@58020000/quadspi_bk1_ncs_pg6 - * 225 /soc/pin-controller@58020000/quadspi_clk_pf10 - * 226 /soc/spi@52005000 - * 227 /soc/spi@52005000/qspi-nor-flash@90000000 - * 228 /soc/spi@52005000/qspi-nor-flash@90000000/partitions - * 229 /soc/spi@52005000/qspi-nor-flash@90000000/partitions/partition@0 - * 230 /soc/spi@52005000/qspi-nor-flash@90000000/partitions/partition@f80000 - * 231 /soc/timers@40000000 - * 232 /soc/timers@40000000/counter - * 233 /soc/timers@40000000/pwm - * 234 /soc/timers@40000400 - * 235 /soc/timers@40000400/counter - * 236 /soc/timers@40000400/pwm - * 237 /soc/timers@40000800 - * 238 /soc/timers@40000800/counter - * 239 /soc/timers@40000800/pwm - * 240 /soc/timers@40000c00 - * 241 /soc/timers@40000c00/counter - * 242 /soc/timers@40000c00/pwm - * 243 /soc/timers@40001000 - * 244 /soc/timers@40001000/counter - * 245 /soc/timers@40001400 - * 246 /soc/timers@40001400/counter - * 247 /soc/timers@40001800 - * 248 /soc/timers@40001800/counter - * 249 /soc/timers@40001800/pwm - * 250 /soc/timers@40001c00 - * 251 /soc/timers@40001c00/counter - * 252 /soc/timers@40001c00/pwm - * 253 /soc/timers@40002000 - * 254 /soc/timers@40002000/counter - * 255 /soc/timers@40002000/pwm - * 256 /soc/timers@40010000 - * 257 /soc/timers@40010000/pwm - * 258 /soc/timers@40010400 - * 259 /soc/timers@40010400/pwm - * 260 /soc/timers@40014000 - * 261 /soc/timers@40014000/counter - * 262 /soc/timers@40014000/pwm - * 263 /soc/timers@40014400 - * 264 /soc/timers@40014400/counter - * 265 /soc/timers@40014400/pwm - * 266 /soc/timers@40014800 - * 267 /soc/timers@40014800/counter - * 268 /soc/timers@40014800/pwm + * 9 /soc/pin-controller@58020000 + * 10 /soc/pin-controller@58020000/adc3_inp0_pc2_c + * 11 /soc/pin-controller@58020000/adc3_inp1_pc3_c + * 12 /soc/adc@58026000 + * 13 /dietemp + * 14 /soc/pin-controller@58020000/gpio@58022400 + * 15 /ethernet_phy_en + * 16 /memory@24000000 + * 17 /memory@30000000 + * 18 /memory@30020000 + * 19 /memory@30040000 + * 20 /memory@38000000 + * 21 /memory@90000000 + * 22 /soc/pin-controller@58020000/gpio@58021C00 + * 23 /oscen + * 24 /sdram@c0000000 + * 25 /soc/pin-controller@58020000/i2c1_scl_pb6 + * 26 /soc/pin-controller@58020000/i2c1_sda_pb7 + * 27 /soc/i2c@40005400 + * 28 /smbus1 + * 29 /soc/i2c@40005800 + * 30 /smbus2 + * 31 /soc/pin-controller@58020000/i2c3_scl_ph7 + * 32 /soc/pin-controller@58020000/i2c3_sda_ph8 + * 33 /soc/i2c@40005c00 + * 34 /smbus3 + * 35 /soc/pin-controller@58020000/i2c4_scl_ph11 + * 36 /soc/pin-controller@58020000/i2c4_sda_ph12 + * 37 /soc/i2c@58001c00 + * 38 /smbus4 + * 39 /vbat + * 40 /vref + * 41 /gpio@deadbeef + * 42 /soc/pin-controller@58020000/adc1_inp0_pa0_c + * 43 /soc/pin-controller@58020000/adc1_inp12_pc2 + * 44 /soc/pin-controller@58020000/adc1_inp13_pc3 + * 45 /soc/pin-controller@58020000/adc1_inp18_pa4 + * 46 /soc/pin-controller@58020000/adc1_inp1_pa1_c + * 47 /soc/pin-controller@58020000/adc1_inp3_pa6 + * 48 /soc/adc@40022000 + * 49 /soc/pin-controller@58020000/uart4_rx_pi9 + * 50 /soc/pin-controller@58020000/uart4_tx_pa0 + * 51 /soc/rcc@58024400/reset-controller + * 52 /soc/serial@40004c00 + * 53 /soc/pin-controller@58020000/usart1_rx_pa10 + * 54 /soc/pin-controller@58020000/usart1_tx_pa9 + * 55 /soc/serial@40011000 + * 56 /soc/pin-controller@58020000/usart6_rx_pg9 + * 57 /soc/pin-controller@58020000/usart6_tx_pg14 + * 58 /soc/serial@40011400 + * 59 /soc/pin-controller@58020000/spi2_miso_pc2 + * 60 /soc/pin-controller@58020000/spi2_mosi_pc3 + * 61 /soc/pin-controller@58020000/spi2_sck_pi1 + * 62 /soc/spi@40003800 + * 63 /soc/pin-controller@58020000/gpio@58020000 + * 64 /soc/pin-controller@58020000/gpio@58020400 + * 65 /soc/pin-controller@58020000/gpio@58020800 + * 66 /soc/pin-controller@58020000/gpio@58020C00 + * 67 /soc/pin-controller@58020000/gpio@58021000 + * 68 /soc/pin-controller@58020000/gpio@58021400 + * 69 /soc/pin-controller@58020000/gpio@58021800 + * 70 /soc/pin-controller@58020000/gpio@58022000 + * 71 /soc/pin-controller@58020000/gpio@58022800 + * 72 /soc/timers@40000400 + * 73 /soc/pin-controller@58020000/tim3_ch1_pc6 + * 74 /soc/pin-controller@58020000/tim3_ch2_pc7 + * 75 /soc/timers@40000400/pwm + * 76 /soc/timers@40001800 + * 77 /soc/pin-controller@58020000/tim12_ch1_ph6 + * 78 /soc/timers@40001800/pwm + * 79 /soc/timers@40010000 + * 80 /soc/pin-controller@58020000/tim1_ch1_pa8 + * 81 /soc/pin-controller@58020000/tim1_ch2_pj11 + * 82 /soc/timers@40010000/pwm + * 83 /soc/timers@40010400 + * 84 /soc/pin-controller@58020000/tim8_ch2_pj10 + * 85 /soc/pin-controller@58020000/tim8_ch2n_pj7 + * 86 /soc/pin-controller@58020000/tim8_ch3n_ph15 + * 87 /soc/timers@40010400/pwm + * 88 /otghs_ulpis_phy + * 89 /soc/pin-controller@58020000/usb_otg_hs_ulpi_ck_pa5 + * 90 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d0_pa3 + * 91 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d1_pb0 + * 92 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d2_pb1 + * 93 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d3_pb10 + * 94 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d4_pb11 + * 95 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d5_pb12 + * 96 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d6_pb13 + * 97 /soc/pin-controller@58020000/usb_otg_hs_ulpi_d7_pb5 + * 98 /soc/pin-controller@58020000/usb_otg_hs_ulpi_dir_pi11 + * 99 /soc/pin-controller@58020000/usb_otg_hs_ulpi_nxt_ph4 + * 100 /soc/pin-controller@58020000/usb_otg_hs_ulpi_stp_pc0 + * 101 /soc/usb@40040000 + * 102 /soc/usb@40040000/board_cdc_acm_uart + * 103 /zephyr,user + * 104 /clocks/clk-csi + * 105 /clocks/clk-hsi + * 106 /clocks/clk-hsi48 + * 107 /clocks/clk-lse + * 108 /clocks/clk-lsi + * 109 /clocks/perck + * 110 /clocks/pll@1 + * 111 /clocks/pll@2 + * 112 /cpus + * 113 /cpus/cpu@0 + * 114 /cpus/cpu@0/mpu@e000ed90 + * 115 /leds + * 116 /leds/led_0 + * 117 /leds/led_1 + * 118 /leds/led_2 + * 119 /mcos + * 120 /mcos/mco1 + * 121 /mcos/mco2 + * 122 /soc/adc@40022100 + * 123 /soc/adc@40022300 + * 124 /soc/bdma@58025400 + * 125 /soc/pin-controller@58020000/fdcan1_rx_pb8 + * 126 /soc/pin-controller@58020000/fdcan1_tx_ph13 + * 127 /soc/can@4000a000 + * 128 /soc/can@4000a400 + * 129 /soc/dac@40007400 + * 130 /soc/display-controller@50001000 + * 131 /soc/dma@40020400 + * 132 /soc/dmamux@58025800 + * 133 /soc/dsihost@50000000 + * 134 /soc/dmamux@40020800 + * 135 /soc/i2s@40003800 + * 136 /soc/i2s@40003c00 + * 137 /soc/i2s@40013000 + * 138 /soc/interrupt-controller@58000000 + * 139 /soc/mailbox@58026400 + * 140 /soc/memory@38800000 + * 141 /soc/rng@48021800 + * 142 /soc/sdmmc@48022400 + * 143 /soc/sdmmc@52007000 + * 144 /soc/serial@40004400 + * 145 /soc/serial@40004800 + * 146 /soc/serial@40005000 + * 147 /soc/pin-controller@58020000/uart8_rx_pj9 + * 148 /soc/pin-controller@58020000/uart8_tx_pj8 + * 149 /soc/serial@40007c00 + * 150 /soc/serial@58000c00 + * 151 /soc/spi@40003c00 + * 152 /soc/spi@40013000 + * 153 /soc/spi@40013400 + * 154 /soc/spi@40015000 + * 155 /soc/spi@58001400 + * 156 /soc/timer@e000e010 + * 157 /soc/timers@40002400 + * 158 /otghs_fs_phy + * 159 /soc/usb@40080000 + * 160 /soc/watchdog@50003000 + * 161 /soc/watchdog@58004800 + * 162 /soc/adc@40022000/channel@0 + * 163 /soc/adc@40022000/channel@1 + * 164 /soc/adc@40022000/channel@3 + * 165 /soc/adc@40022000/channel@c + * 166 /soc/adc@40022000/channel@d + * 167 /soc/adc@40022000/channel@12 + * 168 /soc/adc@58026000/channel@0 + * 169 /soc/adc@58026000/channel@1 + * 170 /soc/dma@40020000 + * 171 /soc/i2c@40005c00/gc2145@3c + * 172 /soc/pin-controller@58020000/dcmi_d0_ph9 + * 173 /soc/pin-controller@58020000/dcmi_d1_ph10 + * 174 /soc/pin-controller@58020000/dcmi_d2_ph11 + * 175 /soc/pin-controller@58020000/dcmi_d3_ph12 + * 176 /soc/pin-controller@58020000/dcmi_d4_ph14 + * 177 /soc/pin-controller@58020000/dcmi_d5_pi4 + * 178 /soc/pin-controller@58020000/dcmi_d6_pi6 + * 179 /soc/pin-controller@58020000/dcmi_d7_pi7 + * 180 /soc/pin-controller@58020000/dcmi_hsync_pa4 + * 181 /soc/pin-controller@58020000/dcmi_pixclk_pa6 + * 182 /soc/pin-controller@58020000/dcmi_vsync_pi5 + * 183 /soc/dcmi@48020000 + * 184 /soc/dcmi@48020000/port + * 185 /soc/dcmi@48020000/port/endpoint + * 186 /soc/pin-controller@58020000/eth_crs_dv_pa7 + * 187 /soc/pin-controller@58020000/eth_ref_clk_pa1 + * 188 /soc/pin-controller@58020000/eth_rxd0_pc4 + * 189 /soc/pin-controller@58020000/eth_rxd1_pc5 + * 190 /soc/pin-controller@58020000/eth_tx_en_pg11 + * 191 /soc/pin-controller@58020000/eth_txd0_pg13 + * 192 /soc/pin-controller@58020000/eth_txd1_pg12 + * 193 /soc/ethernet@40028000 + * 194 /soc/pin-controller@58020000/eth_mdc_pc1 + * 195 /soc/pin-controller@58020000/eth_mdio_pa2 + * 196 /soc/ethernet@40028000/mdio + * 197 /soc/ethernet@40028000/mdio/ethernet-phy@0 + * 198 /soc/flash-controller@52002000 + * 199 /soc/flash-controller@52002000/flash@8000000 + * 200 /soc/flash-controller@52002000/flash@8000000/partitions + * 201 /soc/flash-controller@52002000/flash@8000000/partitions/partition@0 + * 202 /soc/flash-controller@52002000/flash@8000000/partitions/partition@10000 + * 203 /soc/flash-controller@52002000/flash@8000000/partitions/partition@40000 + * 204 /soc/flash-controller@52002000/flash@8000000/partitions/partition@A0000 + * 205 /soc/flash-controller@52002000/flash@8000000/partitions/partition@e0000 + * 206 /soc/i2c@40005400/pmic@8 + * 207 /soc/i2c@40005400/pmic@8/charger + * 208 /soc/i2c@40005400/pmic@8/regulators + * 209 /soc/i2c@40005400/pmic@8/regulators/BUCK1 + * 210 /soc/i2c@40005400/pmic@8/regulators/BUCK2 + * 211 /soc/i2c@40005400/pmic@8/regulators/BUCK3 + * 212 /soc/i2c@40005400/pmic@8/regulators/LDO1 + * 213 /soc/i2c@40005400/pmic@8/regulators/LDO2 + * 214 /soc/i2c@40005400/pmic@8/regulators/LDO3 + * 215 /soc/i2c@40005c00/gc2145@3c/port + * 216 /soc/i2c@40005c00/gc2145@3c/port/endpoint + * 217 /soc/pin-controller@58020000/fmc_a0_pf0 + * 218 /soc/pin-controller@58020000/fmc_a10_pg0 + * 219 /soc/pin-controller@58020000/fmc_a11_pg1 + * 220 /soc/pin-controller@58020000/fmc_a12_pg2 + * 221 /soc/pin-controller@58020000/fmc_a14_pg4 + * 222 /soc/pin-controller@58020000/fmc_a15_pg5 + * 223 /soc/pin-controller@58020000/fmc_a1_pf1 + * 224 /soc/pin-controller@58020000/fmc_a2_pf2 + * 225 /soc/pin-controller@58020000/fmc_a3_pf3 + * 226 /soc/pin-controller@58020000/fmc_a4_pf4 + * 227 /soc/pin-controller@58020000/fmc_a5_pf5 + * 228 /soc/pin-controller@58020000/fmc_a6_pf12 + * 229 /soc/pin-controller@58020000/fmc_a7_pf13 + * 230 /soc/pin-controller@58020000/fmc_a8_pf14 + * 231 /soc/pin-controller@58020000/fmc_a9_pf15 + * 232 /soc/pin-controller@58020000/fmc_d0_pd14 + * 233 /soc/pin-controller@58020000/fmc_d10_pe13 + * 234 /soc/pin-controller@58020000/fmc_d11_pe14 + * 235 /soc/pin-controller@58020000/fmc_d12_pe15 + * 236 /soc/pin-controller@58020000/fmc_d13_pd8 + * 237 /soc/pin-controller@58020000/fmc_d14_pd9 + * 238 /soc/pin-controller@58020000/fmc_d15_pd10 + * 239 /soc/pin-controller@58020000/fmc_d1_pd15 + * 240 /soc/pin-controller@58020000/fmc_d2_pd0 + * 241 /soc/pin-controller@58020000/fmc_d3_pd1 + * 242 /soc/pin-controller@58020000/fmc_d4_pe7 + * 243 /soc/pin-controller@58020000/fmc_d5_pe8 + * 244 /soc/pin-controller@58020000/fmc_d6_pe9 + * 245 /soc/pin-controller@58020000/fmc_d7_pe10 + * 246 /soc/pin-controller@58020000/fmc_d8_pe11 + * 247 /soc/pin-controller@58020000/fmc_d9_pe12 + * 248 /soc/pin-controller@58020000/fmc_nbl0_pe0 + * 249 /soc/pin-controller@58020000/fmc_nbl1_pe1 + * 250 /soc/pin-controller@58020000/fmc_sdcke0_ph2 + * 251 /soc/pin-controller@58020000/fmc_sdclk_pg8 + * 252 /soc/pin-controller@58020000/fmc_sdncas_pg15 + * 253 /soc/pin-controller@58020000/fmc_sdne0_ph3 + * 254 /soc/pin-controller@58020000/fmc_sdnras_pf11 + * 255 /soc/pin-controller@58020000/fmc_sdnwe_ph5 + * 256 /soc/memory-controller@52004000 + * 257 /soc/memory-controller@52004000/sdram + * 258 /soc/memory-controller@52004000/sdram/bank@0 + * 259 /soc/rtc@58004000 + * 260 /soc/rtc@58004000/backup_regs + * 261 /soc/pin-controller@58020000/uart7_cts_pf9 + * 262 /soc/pin-controller@58020000/uart7_rts_pf8 + * 263 /soc/pin-controller@58020000/uart7_rx_pf6 + * 264 /soc/pin-controller@58020000/uart7_tx_pa15 + * 265 /soc/serial@40007800 + * 266 /soc/serial@40007800/bt_hci_uart + * 267 /soc/serial@40007800/bt_hci_uart/murata-1dx + * 268 /soc/pin-controller@58020000/quadspi_bk1_io0_pd11 + * 269 /soc/pin-controller@58020000/quadspi_bk1_io1_pd12 + * 270 /soc/pin-controller@58020000/quadspi_bk1_io2_pf7 + * 271 /soc/pin-controller@58020000/quadspi_bk1_io3_pd13 + * 272 /soc/pin-controller@58020000/quadspi_bk1_ncs_pg6 + * 273 /soc/pin-controller@58020000/quadspi_clk_pf10 + * 274 /soc/spi@52005000 + * 275 /soc/spi@52005000/qspi-nor-flash@90000000 + * 276 /soc/spi@52005000/qspi-nor-flash@90000000/partitions + * 277 /soc/spi@52005000/qspi-nor-flash@90000000/partitions/partition@0 + * 278 /soc/spi@52005000/qspi-nor-flash@90000000/partitions/partition@f80000 + * 279 /soc/timers@40000000 + * 280 /soc/timers@40000000/counter + * 281 /soc/timers@40000000/pwm + * 282 /soc/timers@40000400/counter + * 283 /soc/timers@40000800 + * 284 /soc/timers@40000800/counter + * 285 /soc/timers@40000800/pwm + * 286 /soc/timers@40000c00 + * 287 /soc/timers@40000c00/counter + * 288 /soc/timers@40000c00/pwm + * 289 /soc/timers@40001000 + * 290 /soc/timers@40001000/counter + * 291 /soc/timers@40001400 + * 292 /soc/timers@40001400/counter + * 293 /soc/timers@40001800/counter + * 294 /soc/timers@40001c00 + * 295 /soc/timers@40001c00/counter + * 296 /soc/timers@40001c00/pwm + * 297 /soc/timers@40002000 + * 298 /soc/timers@40002000/counter + * 299 /soc/timers@40002000/pwm + * 300 /soc/timers@40010000/pwm/pwmclock + * 301 /soc/timers@40014000 + * 302 /soc/timers@40014000/counter + * 303 /soc/timers@40014000/pwm + * 304 /soc/timers@40014400 + * 305 /soc/timers@40014400/counter + * 306 /soc/timers@40014400/pwm + * 307 /soc/timers@40014800 + * 308 /soc/timers@40014800/counter + * 309 /soc/timers@40014800/pwm * * Definitions derived from these nodes in dependency order are next, * followed by /chosen nodes. @@ -307,16 +348,16 @@ #define DT_N_FOREACH_ANCESTOR(fn) /* Helper macros for child nodes of this node. */ -#define DT_N_CHILD_NUM 26 -#define DT_N_CHILD_NUM_STATUS_OKAY 19 -#define DT_N_FOREACH_CHILD(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_cpus) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_mcos) fn(DT_N_S_dietemp) fn(DT_N_S_vbat) fn(DT_N_S_vref) fn(DT_N_S_smbus1) fn(DT_N_S_smbus2) fn(DT_N_S_smbus3) fn(DT_N_S_smbus4) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_leds) fn(DT_N_S_otghs_ulpis_phy) fn(DT_N_S_oscen) fn(DT_N_S_ethernet_phy_en) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_zephyr_user) -#define DT_N_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_90000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_dietemp) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vbat) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vref) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_24000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30040000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_38000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_fs_phy) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_ulpis_phy) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_oscen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ethernet_phy_en) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sdram_c0000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user) -#define DT_N_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_mcos, __VA_ARGS__) fn(DT_N_S_dietemp, __VA_ARGS__) fn(DT_N_S_vbat, __VA_ARGS__) fn(DT_N_S_vref, __VA_ARGS__) fn(DT_N_S_smbus1, __VA_ARGS__) fn(DT_N_S_smbus2, __VA_ARGS__) fn(DT_N_S_smbus3, __VA_ARGS__) fn(DT_N_S_smbus4, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) fn(DT_N_S_oscen, __VA_ARGS__) fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) -#define DT_N_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_90000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_dietemp, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vbat, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vref, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_24000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30040000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_38000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_oscen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sdram_c0000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user, __VA_ARGS__) -#define DT_N_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_cpus) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_mcos) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_leds) fn(DT_N_S_otghs_ulpis_phy) fn(DT_N_S_oscen) fn(DT_N_S_ethernet_phy_en) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_zephyr_user) -#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_90000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_24000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30040000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_38000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_fs_phy) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_ulpis_phy) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_oscen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ethernet_phy_en) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sdram_c0000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user) -#define DT_N_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_mcos, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) fn(DT_N_S_oscen, __VA_ARGS__) fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) -#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_90000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_24000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30040000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_38000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_oscen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sdram_c0000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user, __VA_ARGS__) +#define DT_N_CHILD_NUM 27 +#define DT_N_CHILD_NUM_STATUS_OKAY 20 +#define DT_N_FOREACH_CHILD(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_cpus) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_mcos) fn(DT_N_S_dietemp) fn(DT_N_S_vbat) fn(DT_N_S_vref) fn(DT_N_S_smbus1) fn(DT_N_S_smbus2) fn(DT_N_S_smbus3) fn(DT_N_S_smbus4) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_leds) fn(DT_N_S_otghs_ulpis_phy) fn(DT_N_S_oscen) fn(DT_N_S_ethernet_phy_en) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_gpio_deadbeef) fn(DT_N_S_zephyr_user) +#define DT_N_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_90000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_dietemp) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vbat) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vref) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_24000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30040000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_38000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_fs_phy) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_ulpis_phy) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_oscen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ethernet_phy_en) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sdram_c0000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_gpio_deadbeef) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user) +#define DT_N_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_mcos, __VA_ARGS__) fn(DT_N_S_dietemp, __VA_ARGS__) fn(DT_N_S_vbat, __VA_ARGS__) fn(DT_N_S_vref, __VA_ARGS__) fn(DT_N_S_smbus1, __VA_ARGS__) fn(DT_N_S_smbus2, __VA_ARGS__) fn(DT_N_S_smbus3, __VA_ARGS__) fn(DT_N_S_smbus4, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) fn(DT_N_S_oscen, __VA_ARGS__) fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) +#define DT_N_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_90000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_dietemp, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vbat, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_vref, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_smbus4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_24000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30040000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_38000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_oscen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sdram_c0000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user, __VA_ARGS__) +#define DT_N_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_cpus) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_mcos) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_leds) fn(DT_N_S_otghs_ulpis_phy) fn(DT_N_S_oscen) fn(DT_N_S_ethernet_phy_en) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_gpio_deadbeef) fn(DT_N_S_zephyr_user) +#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_chosen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_90000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_24000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30040000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_38000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_fs_phy) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_ulpis_phy) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_oscen) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ethernet_phy_en) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sdram_c0000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_gpio_deadbeef) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user) +#define DT_N_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_mcos, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) fn(DT_N_S_oscen, __VA_ARGS__) fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) +#define DT_N_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_chosen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_aliases, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_cpus, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_90000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_clocks, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_24000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_30040000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_memory_38000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_oscen, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_sdram_c0000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_zephyr_user, __VA_ARGS__) /* Node's hash: */ #define DT_N_HASH il7asoJjJEMhngUeSt4tHVu8Zxx4EFG_FDeJfL3_oPE @@ -334,28 +375,29 @@ 2, \ 3, \ 5, \ - 10, \ 13, \ - 14, \ 15, \ 16, \ 17, \ 18, \ 19, \ + 20, \ 21, \ - 22, \ - 26, \ + 23, \ + 24, \ 28, \ - 32, \ - 36, \ - 37, \ + 30, \ + 34, \ 38, \ - 54, \ - 69, \ - 78, \ - 81, \ - 85, \ - 132, + 39, \ + 40, \ + 41, \ + 88, \ + 103, \ + 112, \ + 115, \ + 119, \ + 158, /* Existence and alternate IDs: */ #define DT_N_EXISTS 1 @@ -558,15 +600,15 @@ /* Helper macros for child nodes of this node. */ #define DT_N_S_soc_CHILD_NUM 71 -#define DT_N_S_soc_CHILD_NUM_STATUS_OKAY 19 +#define DT_N_S_soc_CHILD_NUM_STATUS_OKAY 30 #define DT_N_S_soc_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_watchdog_58004800) fn(DT_N_S_soc_S_watchdog_50003000) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004400) fn(DT_N_S_soc_S_serial_40004800) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40005000) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_serial_40007c00) fn(DT_N_S_soc_S_serial_58000c00) fn(DT_N_S_soc_S_rtc_58004000) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005800) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) fn(DT_N_S_soc_S_spi_40013400) fn(DT_N_S_soc_S_spi_40015000) fn(DT_N_S_soc_S_spi_58001400) fn(DT_N_S_soc_S_i2s_40013000) fn(DT_N_S_soc_S_i2s_40003800) fn(DT_N_S_soc_S_i2s_40003c00) fn(DT_N_S_soc_S_can_4000a000) fn(DT_N_S_soc_S_can_4000a400) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc_S_timers_40000800) fn(DT_N_S_soc_S_timers_40000c00) fn(DT_N_S_soc_S_timers_40001000) fn(DT_N_S_soc_S_timers_40001400) fn(DT_N_S_soc_S_timers_40010400) fn(DT_N_S_soc_S_timers_40001800) fn(DT_N_S_soc_S_timers_40001c00) fn(DT_N_S_soc_S_timers_40002000) fn(DT_N_S_soc_S_timers_40014000) fn(DT_N_S_soc_S_timers_40014400) fn(DT_N_S_soc_S_timers_40014800) fn(DT_N_S_soc_S_timers_40002400) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc_S_adc_40022100) fn(DT_N_S_soc_S_adc_40022300) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc_S_dac_40007400) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dma_40020400) fn(DT_N_S_soc_S_bdma_58025400) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_dmamux_58025800) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_sdmmc_52007000) fn(DT_N_S_soc_S_sdmmc_48022400) fn(DT_N_S_soc_S_ethernet_40028000) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_memory_38800000) fn(DT_N_S_soc_S_spi_52005000) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_display_controller_50001000) fn(DT_N_S_soc_S_usb_40040000) fn(DT_N_S_soc_S_usb_40080000) fn(DT_N_S_soc_S_dsihost_50000000) #define DT_N_S_soc_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_52002000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rcc_58024400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_interrupt_controller_58000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_58004800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_50003000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40005000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40007800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40007c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_58000c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_58004000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_58001c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40013000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40013400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40015000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_58001400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2s_40013000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2s_40003800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2s_40003c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_can_4000a000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_can_4000a400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40010000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40010400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40002000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40002400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022300) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_58026000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dac_40007400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dma_40020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dma_40020400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_bdma_58025400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dmamux_40020800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dmamux_58025800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rng_48021800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_sdmmc_52007000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_sdmmc_48022400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ethernet_40028000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_controller_52004000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_38800000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_52005000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dcmi_48020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mailbox_58026400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_display_controller_50001000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_usb_40040000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_usb_40080000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dsihost_50000000) #define DT_N_S_soc_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_58004800, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40005000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_58000c00, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013400, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_58001400, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002400, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022100, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022300, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) fn(DT_N_S_soc_S_dac_40007400, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020400, __VA_ARGS__) fn(DT_N_S_soc_S_bdma_58025400, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_58025800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_sdmmc_52007000, __VA_ARGS__) fn(DT_N_S_soc_S_sdmmc_48022400, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_38800000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_display_controller_50001000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000, __VA_ARGS__) fn(DT_N_S_soc_S_dsihost_50000000, __VA_ARGS__) #define DT_N_S_soc_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_58004800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_watchdog_50003000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40005000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40007c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_58000c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40013400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40015000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_58001400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2s_40013000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2s_40003800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2s_40003c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_can_4000a000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_can_4000a400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40010400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40002000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40014800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40002400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022300, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dac_40007400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dma_40020400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_bdma_58025400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dmamux_58025800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_sdmmc_52007000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_sdmmc_48022400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_38800000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_52005000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_display_controller_50001000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_usb_40080000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dsihost_50000000, __VA_ARGS__) -#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_rtc_58004000) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_ethernet_40028000) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_spi_52005000) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_usb_40040000) -#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_52002000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rcc_58024400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_interrupt_controller_58000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40007800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_58004000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_58001c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rng_48021800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ethernet_40028000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_controller_52004000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_52005000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mailbox_58026400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_usb_40040000) -#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) -#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_52005000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_rtc_58004000) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc_S_timers_40010400) fn(DT_N_S_soc_S_timers_40001800) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_ethernet_40028000) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_spi_52005000) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_usb_40040000) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_e000e100) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_52002000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rcc_58024400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_interrupt_controller_58000000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40007800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_58004000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_58001c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40010000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40010400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_58026000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dma_40020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dmamux_40020800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rng_48021800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ethernet_40028000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_controller_52004000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_52005000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dcmi_48020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mailbox_58026400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_usb_40040000) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) +#define DT_N_S_soc_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_40005c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40010400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_spi_52005000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) /* Node's hash: */ #define DT_N_S_soc_HASH DcVqqq9YzG86l3_Hk7pNncUh2rnHG8USjbVY6wBdFts @@ -584,74 +626,74 @@ 4, \ 8, \ 9, \ - 11, \ - 25, \ + 12, \ 27, \ - 31, \ - 35, \ - 42, \ - 45, \ + 29, \ + 33, \ + 37, \ 48, \ - 67, \ - 88, \ - 89, \ - 90, \ - 91, \ - 94, \ - 95, \ - 96, \ - 97, \ - 98, \ - 99, \ - 100, \ + 52, \ + 55, \ + 58, \ + 62, \ + 72, \ + 76, \ + 79, \ + 83, \ 101, \ - 102, \ - 103, \ - 104, \ - 105, \ - 106, \ - 107, \ - 108, \ - 109, \ - 110, \ - 111, \ - 112, \ - 113, \ - 114, \ - 115, \ - 118, \ - 119, \ + 122, \ + 123, \ 124, \ - 125, \ - 126, \ 127, \ 128, \ 129, \ 130, \ 131, \ + 132, \ 133, \ 134, \ 135, \ + 136, \ + 137, \ + 138, \ + 139, \ + 140, \ + 141, \ + 142, \ 143, \ - 148, \ - 204, \ - 211, \ - 217, \ - 226, \ - 231, \ - 234, \ - 237, \ - 240, \ - 243, \ - 245, \ - 247, \ - 250, \ - 253, \ + 144, \ + 145, \ + 146, \ + 149, \ + 150, \ + 151, \ + 152, \ + 153, \ + 154, \ + 155, \ + 156, \ + 157, \ + 159, \ + 160, \ + 161, \ + 170, \ + 183, \ + 193, \ + 198, \ 256, \ - 258, \ - 260, \ - 263, \ - 266, + 259, \ + 265, \ + 274, \ + 279, \ + 283, \ + 286, \ + 289, \ + 291, \ + 294, \ + 297, \ + 301, \ + 304, \ + 307, /* Existence and alternate IDs: */ #define DT_N_S_soc_EXISTS 1 @@ -772,68 +814,68 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_interrupt_controller_e000e100_SUPPORTS_ORDS \ - 9, \ - 25, \ + 12, \ 27, \ - 31, \ - 35, \ - 42, \ - 45, \ + 29, \ + 33, \ + 37, \ 48, \ - 67, \ - 88, \ - 89, \ - 90, \ - 91, \ - 94, \ - 95, \ - 97, \ - 98, \ - 99, \ - 100, \ + 52, \ + 55, \ + 58, \ + 62, \ + 72, \ + 76, \ + 79, \ + 83, \ 101, \ - 103, \ - 104, \ - 105, \ - 106, \ - 107, \ - 108, \ - 110, \ - 111, \ - 112, \ - 113, \ - 114, \ - 115, \ - 118, \ - 119, \ + 122, \ + 123, \ 124, \ - 125, \ - 126, \ 127, \ 128, \ - 129, \ + 130, \ 131, \ - 133, \ + 132, \ 134, \ + 135, \ + 136, \ + 137, \ + 138, \ + 139, \ + 141, \ + 142, \ 143, \ - 148, \ - 211, \ - 217, \ - 226, \ - 231, \ - 234, \ - 237, \ - 240, \ - 243, \ - 245, \ - 247, \ - 250, \ - 253, \ - 256, \ - 258, \ - 260, \ - 263, \ - 266, + 144, \ + 145, \ + 146, \ + 149, \ + 150, \ + 151, \ + 152, \ + 153, \ + 154, \ + 155, \ + 157, \ + 159, \ + 160, \ + 170, \ + 183, \ + 193, \ + 198, \ + 259, \ + 265, \ + 274, \ + 279, \ + 283, \ + 286, \ + 289, \ + 291, \ + 294, \ + 297, \ + 301, \ + 304, \ + 307, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_interrupt_controller_e000e100_EXISTS 1 @@ -943,14 +985,14 @@ #define DT_N_S_clocks_SUPPORTS_ORDS \ 6, \ 7, \ - 70, \ - 71, \ - 72, \ - 73, \ - 74, \ - 75, \ - 76, \ - 77, + 104, \ + 105, \ + 106, \ + 107, \ + 108, \ + 109, \ + 110, \ + 111, /* Existence and alternate IDs: */ #define DT_N_S_clocks_EXISTS 1 @@ -1288,83 +1330,83 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_rcc_58024400_SUPPORTS_ORDS \ - 9, \ 12, \ - 20, \ - 25, \ + 14, \ + 22, \ 27, \ - 31, \ - 35, \ - 41, \ - 42, \ - 45, \ + 29, \ + 33, \ + 37, \ 48, \ - 49, \ - 50, \ 51, \ 52, \ - 53, \ + 55, \ + 58, \ + 62, \ + 63, \ + 64, \ + 65, \ + 66, \ 67, \ - 88, \ - 89, \ - 90, \ - 91, \ - 94, \ - 95, \ - 96, \ - 97, \ - 98, \ - 99, \ - 100, \ + 68, \ + 69, \ + 70, \ + 71, \ + 72, \ + 76, \ + 79, \ + 83, \ 101, \ - 102, \ - 103, \ - 104, \ - 105, \ - 106, \ - 108, \ - 109, \ - 110, \ - 111, \ - 112, \ - 113, \ - 114, \ - 115, \ - 118, \ - 119, \ + 122, \ + 123, \ 124, \ - 125, \ - 126, \ 127, \ 128, \ 129, \ + 130, \ 131, \ + 132, \ 133, \ 134, \ + 135, \ + 136, \ + 137, \ + 139, \ + 140, \ + 141, \ + 142, \ 143, \ - 148, \ - 204, \ - 207, \ - 208, \ - 209, \ - 210, \ - 211, \ - 217, \ - 226, \ - 231, \ - 234, \ - 237, \ - 240, \ - 243, \ - 245, \ - 247, \ - 250, \ - 253, \ + 144, \ + 145, \ + 146, \ + 149, \ + 150, \ + 151, \ + 152, \ + 153, \ + 154, \ + 155, \ + 157, \ + 159, \ + 160, \ + 170, \ + 183, \ + 193, \ + 198, \ 256, \ - 258, \ - 260, \ - 263, \ - 266, + 259, \ + 265, \ + 274, \ + 279, \ + 283, \ + 286, \ + 289, \ + 291, \ + 294, \ + 297, \ + 301, \ + 304, \ + 307, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_rcc_58024400_EXISTS 1 @@ -1456,6 +1498,456 @@ #define DT_N_S_soc_S_rcc_58024400_P_zephyr_pm_device_runtime_auto 0 #define DT_N_S_soc_S_rcc_58024400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +/* + * Devicetree node: /soc/pin-controller@58020000 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000 + * + * Binding (compatible = st,stm32-pinctrl): + * $ZEPHYR_BASE/dts/bindings/pinctrl/st,stm32-pinctrl.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_PATH "/soc/pin-controller@58020000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_FULL_NAME "pin-controller@58020000" +#define DT_N_S_soc_S_pin_controller_58020000_FULL_NAME_UNQUOTED pin-controller@58020000 +#define DT_N_S_soc_S_pin_controller_58020000_FULL_NAME_TOKEN pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_FULL_NAME_UPPER_TOKEN PIN_CONTROLLER_58020000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_CHILD_IDX 5 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_NODELABEL(fn) fn(pinctrl) +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_NODELABEL_VARGS(fn, ...) fn(pinctrl, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_CHILD_NUM 127 +#define DT_N_S_soc_S_pin_controller_58020000_CHILD_NUM_STATUS_OKAY 127 +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_58020000_HASH OP_ywCu3XrpQ8OghT_3xz4N3jJCb4NhvJLCbkMGBOvE + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_ORD 9 +#define DT_N_S_soc_S_pin_controller_58020000_ORD_STR_SORTABLE 00009 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_REQUIRES_ORDS \ + 3, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_SUPPORTS_ORDS \ + 10, \ + 11, \ + 14, \ + 22, \ + 25, \ + 26, \ + 31, \ + 32, \ + 35, \ + 36, \ + 42, \ + 43, \ + 44, \ + 45, \ + 46, \ + 47, \ + 49, \ + 50, \ + 53, \ + 54, \ + 56, \ + 57, \ + 59, \ + 60, \ + 61, \ + 63, \ + 64, \ + 65, \ + 66, \ + 67, \ + 68, \ + 69, \ + 70, \ + 71, \ + 73, \ + 74, \ + 77, \ + 80, \ + 81, \ + 84, \ + 85, \ + 86, \ + 89, \ + 90, \ + 91, \ + 92, \ + 93, \ + 94, \ + 95, \ + 96, \ + 97, \ + 98, \ + 99, \ + 100, \ + 125, \ + 126, \ + 147, \ + 148, \ + 172, \ + 173, \ + 174, \ + 175, \ + 176, \ + 177, \ + 178, \ + 179, \ + 180, \ + 181, \ + 182, \ + 186, \ + 187, \ + 188, \ + 189, \ + 190, \ + 191, \ + 192, \ + 194, \ + 195, \ + 217, \ + 218, \ + 219, \ + 220, \ + 221, \ + 222, \ + 223, \ + 224, \ + 225, \ + 226, \ + 227, \ + 228, \ + 229, \ + 230, \ + 231, \ + 232, \ + 233, \ + 234, \ + 235, \ + 236, \ + 237, \ + 238, \ + 239, \ + 240, \ + 241, \ + 242, \ + 243, \ + 244, \ + 245, \ + 246, \ + 247, \ + 248, \ + 249, \ + 250, \ + 251, \ + 252, \ + 253, \ + 254, \ + 255, \ + 261, \ + 262, \ + 263, \ + 264, \ + 268, \ + 269, \ + 270, \ + 271, \ + 272, \ + 273, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_EXISTS 1 +#define DT_N_INST_0_st_stm32_pinctrl DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_NODELABEL_pinctrl DT_N_S_soc_S_pin_controller_58020000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_REG_IDX_0_VAL_ADDRESS 1476526080 +#define DT_N_S_soc_S_pin_controller_58020000_REG_IDX_0_VAL_SIZE 9216 +#define DT_N_S_soc_S_pin_controller_58020000_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_COMPAT_MATCHES_st_stm32_pinctrl 1 +#define DT_N_S_soc_S_pin_controller_58020000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_COMPAT_MODEL_IDX_0 "stm32-pinctrl" +#define DT_N_S_soc_S_pin_controller_58020000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_P_reg {1476526080, 9216} +#define DT_N_S_soc_S_pin_controller_58020000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_reg_IDX_0 1476526080 +#define DT_N_S_soc_S_pin_controller_58020000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_reg_IDX_1 9216 +#define DT_N_S_soc_S_pin_controller_58020000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa11 0 +#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa11_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa12 0 +#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa12_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa11_pa12 0 +#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa11_pa12_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible {"st,stm32-pinctrl"} +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_IDX_0 "st,stm32-pinctrl" +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pinctrl +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_IDX_0_STRING_TOKEN st_stm32_pinctrl +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PINCTRL +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/adc3_inp0_pc2_c + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_PATH "/soc/pin-controller@58020000/adc3_inp0_pc2_c" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FULL_NAME "adc3_inp0_pc2_c" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FULL_NAME_UNQUOTED adc3_inp0_pc2_c +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FULL_NAME_TOKEN adc3_inp0_pc2_c +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FULL_NAME_UPPER_TOKEN ADC3_INP0_PC2_C + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_CHILD_IDX 17 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_NODELABEL(fn) fn(adc3_inp0_pc2_c) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc3_inp0_pc2_c, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_HASH bl8mwVDPFlVWjGBz5fuCpxuFz_Tccin_ruQ0DNfqzNg + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_ORD 10 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_ORD_STR_SORTABLE 00010 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_REQUIRES_ORDS \ + 9, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_SUPPORTS_ORDS \ + 12, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_EXISTS 1 +#define DT_N_NODELABEL_adc3_inp0_pc2_c DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_pinmux 1104 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/adc3_inp1_pc3_c + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_PATH "/soc/pin-controller@58020000/adc3_inp1_pc3_c" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FULL_NAME "adc3_inp1_pc3_c" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FULL_NAME_UNQUOTED adc3_inp1_pc3_c +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FULL_NAME_TOKEN adc3_inp1_pc3_c +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FULL_NAME_UPPER_TOKEN ADC3_INP1_PC3_C + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_CHILD_IDX 18 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_NODELABEL(fn) fn(adc3_inp1_pc3_c) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc3_inp1_pc3_c, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_HASH e48YmQBHMzE6N41GLbNYGuDQfXYfeQ40kr6xQ2xzLvo + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_ORD 11 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_ORD_STR_SORTABLE 00011 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_REQUIRES_ORDS \ + 9, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_SUPPORTS_ORDS \ + 12, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_EXISTS 1 +#define DT_N_NODELABEL_adc3_inp1_pc3_c DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_pinmux 1136 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c_P_output_high_EXISTS 1 + /* * Devicetree node: /soc/adc@58026000 * @@ -1490,39 +1982,44 @@ #define DT_N_S_soc_S_adc_58026000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_adc_58026000_CHILD_NUM 0 -#define DT_N_S_soc_S_adc_58026000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_58026000_CHILD_NUM 2 +#define DT_N_S_soc_S_adc_58026000_CHILD_NUM_STATUS_OKAY 2 +#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_adc_58026000_S_channel_0) fn(DT_N_S_soc_S_adc_58026000_S_channel_1) +#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_adc_58026000_S_channel_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_58026000_S_channel_1) +#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_58026000_S_channel_1, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_adc_58026000_S_channel_0) fn(DT_N_S_soc_S_adc_58026000_S_channel_1) +#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_adc_58026000_S_channel_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_58026000_S_channel_1) +#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_58026000_S_channel_1, __VA_ARGS__) /* Node's hash: */ #define DT_N_S_soc_S_adc_58026000_HASH t9mFT1ycuOKfTlu38PJgt3L_wdHkIh6okSunHP_OJnA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_58026000_ORD 9 -#define DT_N_S_soc_S_adc_58026000_ORD_STR_SORTABLE 00009 +#define DT_N_S_soc_S_adc_58026000_ORD 12 +#define DT_N_S_soc_S_adc_58026000_ORD_STR_SORTABLE 00012 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_adc_58026000_REQUIRES_ORDS \ 3, \ 4, \ - 8, + 8, \ + 10, \ + 11, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_adc_58026000_SUPPORTS_ORDS \ - 10, \ - 37, \ - 38, + 13, \ + 39, \ + 40, \ + 103, \ + 168, \ + 169, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_adc_58026000_EXISTS 1 -#define DT_N_INST_3_st_stm32_adc DT_N_S_soc_S_adc_58026000 +#define DT_N_INST_1_st_stm32_adc DT_N_S_soc_S_adc_58026000 #define DT_N_NODELABEL_adc3 DT_N_S_soc_S_adc_58026000 /* Macros for properties that are special in the specification: */ @@ -1546,10 +2043,17 @@ #define DT_N_S_soc_S_adc_58026000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" #define DT_N_S_soc_S_adc_58026000_COMPAT_MODEL_IDX_0_EXISTS 1 #define DT_N_S_soc_S_adc_58026000_COMPAT_MODEL_IDX_0 "stm32-adc" -#define DT_N_S_soc_S_adc_58026000_STATUS_disabled 1 +#define DT_N_S_soc_S_adc_58026000_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_adc_58026000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_adc_58026000_PINCTRL_NUM 1 +#define DT_N_S_soc_S_adc_58026000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_adc_58026000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_adc_58026000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_adc_58026000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c +#define DT_N_S_soc_S_adc_58026000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c /* Generic property macros: */ #define DT_N_S_soc_S_adc_58026000_P_reg {1476550656, 1024} @@ -1576,6 +2080,25 @@ #define DT_N_S_soc_S_adc_58026000_P_interrupts_IDX_1_EXISTS 1 #define DT_N_S_soc_S_adc_58026000_P_interrupts_IDX_1 0 #define DT_N_S_soc_S_adc_58026000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source "SYNC" +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_STRING_UNQUOTED SYNC +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_STRING_TOKEN SYNC +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_STRING_UPPER_TOKEN SYNC +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_IDX_0 "SYNC" +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_IDX_0_ENUM_VAL_SYNC_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_58026000, st_adc_clock_source, 0) +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_58026000, st_adc_clock_source, 0) +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_58026000, st_adc_clock_source, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_58026000, st_adc_clock_source, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_LEN 1 +#define DT_N_S_soc_S_adc_58026000_P_st_adc_clock_source_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_st_adc_prescaler 4 +#define DT_N_S_soc_S_adc_58026000_P_st_adc_prescaler_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_adc_58026000_P_st_adc_prescaler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_st_adc_prescaler_IDX_0_ENUM_VAL_4_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_st_adc_prescaler_EXISTS 1 #define DT_N_S_soc_S_adc_58026000_P_vref_mv 3300 #define DT_N_S_soc_S_adc_58026000_P_vref_mv_EXISTS 1 #define DT_N_S_soc_S_adc_58026000_P_resolutions {8446476, 7725580, 6742540, 5497356, 4710924} @@ -1690,14 +2213,14 @@ #define DT_N_S_soc_S_adc_58026000_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_58026000, st_adc_oversampler, 0, __VA_ARGS__) #define DT_N_S_soc_S_adc_58026000_P_st_adc_oversampler_LEN 1 #define DT_N_S_soc_S_adc_58026000_P_st_adc_oversampler_EXISTS 1 -#define DT_N_S_soc_S_adc_58026000_P_status "disabled" -#define DT_N_S_soc_S_adc_58026000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_adc_58026000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_adc_58026000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_adc_58026000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_adc_58026000_P_status "okay" +#define DT_N_S_soc_S_adc_58026000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_adc_58026000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_adc_58026000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_adc_58026000_P_status_IDX_0 "okay" #define DT_N_S_soc_S_adc_58026000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_58026000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_adc_58026000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_58026000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 #define DT_N_S_soc_S_adc_58026000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_58026000, status, 0) #define DT_N_S_soc_S_adc_58026000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_58026000, status, 0) #define DT_N_S_soc_S_adc_58026000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_58026000, status, 0, __VA_ARGS__) @@ -1722,6 +2245,34 @@ #define DT_N_S_soc_S_adc_58026000_P_wakeup_source_EXISTS 1 #define DT_N_S_soc_S_adc_58026000_P_zephyr_pm_device_runtime_auto 0 #define DT_N_S_soc_S_adc_58026000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_58026000, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_adc_58026000, pinctrl_0, 1) +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_58026000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_58026000, pinctrl_0, 1) +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_58026000, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_58026000, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_58026000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_58026000, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_58026000, pinctrl_names, 0) +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_58026000, pinctrl_names, 0) +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_58026000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_58026000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_adc_58026000_P_pinctrl_names_EXISTS 1 /* * Devicetree node: /dietemp @@ -1772,13 +2323,13 @@ #define DT_N_S_dietemp_HASH 1P3ft3QMjkFq1eBnbB6dz9pZsoSMwhVrPGe82Fpxz6c /* Node's dependency ordinal: */ -#define DT_N_S_dietemp_ORD 10 -#define DT_N_S_dietemp_ORD_STR_SORTABLE 00010 +#define DT_N_S_dietemp_ORD 13 +#define DT_N_S_dietemp_ORD_STR_SORTABLE 00013 /* Ordinals for what this node depends on directly: */ #define DT_N_S_dietemp_REQUIRES_ORDS \ 0, \ - 9, + 12, /* Ordinals for what depends directly on this node: */ #define DT_N_S_dietemp_SUPPORTS_ORDS @@ -1863,222 +2414,6 @@ #define DT_N_S_dietemp_P_zephyr_pm_device_runtime_auto 0 #define DT_N_S_dietemp_P_zephyr_pm_device_runtime_auto_EXISTS 1 -/* - * Devicetree node: /soc/pin-controller@58020000 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000 - * - * Binding (compatible = st,stm32-pinctrl): - * $ZEPHYR_BASE/dts/bindings/pinctrl/st,stm32-pinctrl.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_PATH "/soc/pin-controller@58020000" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_FULL_NAME "pin-controller@58020000" -#define DT_N_S_soc_S_pin_controller_58020000_FULL_NAME_UNQUOTED pin-controller@58020000 -#define DT_N_S_soc_S_pin_controller_58020000_FULL_NAME_TOKEN pin_controller_58020000 -#define DT_N_S_soc_S_pin_controller_58020000_FULL_NAME_UPPER_TOKEN PIN_CONTROLLER_58020000 - -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_PARENT DT_N_S_soc - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_CHILD_IDX 5 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_NODELABEL(fn) fn(pinctrl) -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_NODELABEL_VARGS(fn, ...) fn(pinctrl, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_CHILD_NUM 101 -#define DT_N_S_soc_S_pin_controller_58020000_CHILD_NUM_STATUS_OKAY 101 -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) - -/* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_HASH OP_ywCu3XrpQ8OghT_3xz4N3jJCb4NhvJLCbkMGBOvE - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_ORD 11 -#define DT_N_S_soc_S_pin_controller_58020000_ORD_STR_SORTABLE 00011 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_REQUIRES_ORDS \ - 3, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_SUPPORTS_ORDS \ - 12, \ - 20, \ - 23, \ - 24, \ - 29, \ - 30, \ - 33, \ - 34, \ - 39, \ - 40, \ - 43, \ - 44, \ - 46, \ - 47, \ - 49, \ - 50, \ - 51, \ - 52, \ - 53, \ - 55, \ - 56, \ - 57, \ - 58, \ - 59, \ - 60, \ - 61, \ - 62, \ - 63, \ - 64, \ - 65, \ - 66, \ - 92, \ - 93, \ - 116, \ - 117, \ - 120, \ - 121, \ - 122, \ - 123, \ - 136, \ - 137, \ - 138, \ - 139, \ - 140, \ - 141, \ - 142, \ - 144, \ - 145, \ - 165, \ - 166, \ - 167, \ - 168, \ - 169, \ - 170, \ - 171, \ - 172, \ - 173, \ - 174, \ - 175, \ - 176, \ - 177, \ - 178, \ - 179, \ - 180, \ - 181, \ - 182, \ - 183, \ - 184, \ - 185, \ - 186, \ - 187, \ - 188, \ - 189, \ - 190, \ - 191, \ - 192, \ - 193, \ - 194, \ - 195, \ - 196, \ - 197, \ - 198, \ - 199, \ - 200, \ - 201, \ - 202, \ - 203, \ - 207, \ - 208, \ - 209, \ - 210, \ - 213, \ - 214, \ - 215, \ - 216, \ - 220, \ - 221, \ - 222, \ - 223, \ - 224, \ - 225, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_EXISTS 1 -#define DT_N_INST_0_st_stm32_pinctrl DT_N_S_soc_S_pin_controller_58020000 -#define DT_N_NODELABEL_pinctrl DT_N_S_soc_S_pin_controller_58020000 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_REG_IDX_0_VAL_ADDRESS 1476526080 -#define DT_N_S_soc_S_pin_controller_58020000_REG_IDX_0_VAL_SIZE 9216 -#define DT_N_S_soc_S_pin_controller_58020000_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_COMPAT_MATCHES_st_stm32_pinctrl 1 -#define DT_N_S_soc_S_pin_controller_58020000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_COMPAT_MODEL_IDX_0 "stm32-pinctrl" -#define DT_N_S_soc_S_pin_controller_58020000_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_P_reg {1476526080, 9216} -#define DT_N_S_soc_S_pin_controller_58020000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_reg_IDX_0 1476526080 -#define DT_N_S_soc_S_pin_controller_58020000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_reg_IDX_1 9216 -#define DT_N_S_soc_S_pin_controller_58020000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa11 0 -#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa11_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa12 0 -#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa12_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa11_pa12 0 -#define DT_N_S_soc_S_pin_controller_58020000_P_remap_pa11_pa12_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible {"st,stm32-pinctrl"} -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_IDX_0 "st,stm32-pinctrl" -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pinctrl -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_IDX_0_STRING_TOKEN st_stm32_pinctrl -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PINCTRL -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_P_zephyr_pm_device_runtime_auto_EXISTS 1 - /* * Devicetree node: /soc/pin-controller@58020000/gpio@58022400 * @@ -2128,20 +2463,20 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_HASH brNgk1VRUM_ZeSaO73TcvKZPyO_S1j8SHYvaEanogTI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD 12 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD_STR_SORTABLE 00012 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD 14 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_ORD_STR_SORTABLE 00014 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_REQUIRES_ORDS \ 8, \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_SUPPORTS_ORDS \ - 13, \ - 54, \ - 69, \ - 219, + 15, \ + 88, \ + 103, \ + 267, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400_EXISTS 1 @@ -2258,13 +2593,13 @@ #define DT_N_S_ethernet_phy_en_HASH GEGvCXSeR6amgoqSnLSo7tJqgyXo_o3rxwODhOYxHfA /* Node's dependency ordinal: */ -#define DT_N_S_ethernet_phy_en_ORD 13 -#define DT_N_S_ethernet_phy_en_ORD_STR_SORTABLE 00013 +#define DT_N_S_ethernet_phy_en_ORD 15 +#define DT_N_S_ethernet_phy_en_ORD_STR_SORTABLE 00015 /* Ordinals for what this node depends on directly: */ #define DT_N_S_ethernet_phy_en_REQUIRES_ORDS \ 0, \ - 12, + 14, /* Ordinals for what depends directly on this node: */ #define DT_N_S_ethernet_phy_en_SUPPORTS_ORDS @@ -2397,8 +2732,8 @@ #define DT_N_S_memory_24000000_HASH fM6z5xWmkA34yb_9WqVE1Ffyl3sOegnlBkvKtaeuLkg /* Node's dependency ordinal: */ -#define DT_N_S_memory_24000000_ORD 14 -#define DT_N_S_memory_24000000_ORD_STR_SORTABLE 00014 +#define DT_N_S_memory_24000000_ORD 16 +#define DT_N_S_memory_24000000_ORD_STR_SORTABLE 00016 /* Ordinals for what this node depends on directly: */ #define DT_N_S_memory_24000000_REQUIRES_ORDS \ @@ -2502,8 +2837,8 @@ #define DT_N_S_memory_30000000_HASH jxsfKv5xFU0d0ZGf4HJwPEY9jyoFtUN0439hF8QtXJQ /* Node's dependency ordinal: */ -#define DT_N_S_memory_30000000_ORD 15 -#define DT_N_S_memory_30000000_ORD_STR_SORTABLE 00015 +#define DT_N_S_memory_30000000_ORD 17 +#define DT_N_S_memory_30000000_ORD_STR_SORTABLE 00017 /* Ordinals for what this node depends on directly: */ #define DT_N_S_memory_30000000_REQUIRES_ORDS \ @@ -2634,8 +2969,8 @@ #define DT_N_S_memory_30020000_HASH vylsMMUnSYTnLm9vqFTw3wlGJJ4Ba_pJOUPgOcxM6Yw /* Node's dependency ordinal: */ -#define DT_N_S_memory_30020000_ORD 16 -#define DT_N_S_memory_30020000_ORD_STR_SORTABLE 00016 +#define DT_N_S_memory_30020000_ORD 18 +#define DT_N_S_memory_30020000_ORD_STR_SORTABLE 00018 /* Ordinals for what this node depends on directly: */ #define DT_N_S_memory_30020000_REQUIRES_ORDS \ @@ -2766,8 +3101,8 @@ #define DT_N_S_memory_30040000_HASH 0JVqWTTR1Li3wXZ7p7hjGn52idRSCN7NGjvOjotYSq0 /* Node's dependency ordinal: */ -#define DT_N_S_memory_30040000_ORD 17 -#define DT_N_S_memory_30040000_ORD_STR_SORTABLE 00017 +#define DT_N_S_memory_30040000_ORD 19 +#define DT_N_S_memory_30040000_ORD_STR_SORTABLE 00019 /* Ordinals for what this node depends on directly: */ #define DT_N_S_memory_30040000_REQUIRES_ORDS \ @@ -2898,8 +3233,8 @@ #define DT_N_S_memory_38000000_HASH 3WLBCTypcxSOW3URs9z2JNy8o_uXho1mjMpqbLHSEJs /* Node's dependency ordinal: */ -#define DT_N_S_memory_38000000_ORD 18 -#define DT_N_S_memory_38000000_ORD_STR_SORTABLE 00018 +#define DT_N_S_memory_38000000_ORD 20 +#define DT_N_S_memory_38000000_ORD_STR_SORTABLE 00020 /* Ordinals for what this node depends on directly: */ #define DT_N_S_memory_38000000_REQUIRES_ORDS \ @@ -3030,8 +3365,8 @@ #define DT_N_S_memory_90000000_HASH d_8S2yDxb2q19aTnon3QIN6Z8YP6Jcfc0VxWlqzPPXg /* Node's dependency ordinal: */ -#define DT_N_S_memory_90000000_ORD 19 -#define DT_N_S_memory_90000000_ORD_STR_SORTABLE 00019 +#define DT_N_S_memory_90000000_ORD 21 +#define DT_N_S_memory_90000000_ORD_STR_SORTABLE 00021 /* Ordinals for what this node depends on directly: */ #define DT_N_S_memory_90000000_REQUIRES_ORDS \ @@ -3153,18 +3488,18 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_HASH igMcmz_WuSFluvM0wGo1EvpYTTpFCCq3v9zib1JfYwU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD 20 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD_STR_SORTABLE 00020 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD 22 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_ORD_STR_SORTABLE 00022 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_REQUIRES_ORDS \ 8, \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_SUPPORTS_ORDS \ - 21, \ - 69, + 23, \ + 103, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00_EXISTS 1 @@ -3281,13 +3616,13 @@ #define DT_N_S_oscen_HASH kfdieegGusXa2kBxdkGvgfABCOnFj5CAg86CP9evPVE /* Node's dependency ordinal: */ -#define DT_N_S_oscen_ORD 21 -#define DT_N_S_oscen_ORD_STR_SORTABLE 00021 +#define DT_N_S_oscen_ORD 23 +#define DT_N_S_oscen_ORD_STR_SORTABLE 00023 /* Ordinals for what this node depends on directly: */ #define DT_N_S_oscen_REQUIRES_ORDS \ 0, \ - 20, + 22, /* Ordinals for what depends directly on this node: */ #define DT_N_S_oscen_SUPPORTS_ORDS @@ -3420,8 +3755,8 @@ #define DT_N_S_sdram_c0000000_HASH Q8y1srcTUfxHdQNh67OGtOv8bm1G6WdApGEnH03RxG4 /* Node's dependency ordinal: */ -#define DT_N_S_sdram_c0000000_ORD 22 -#define DT_N_S_sdram_c0000000_ORD_STR_SORTABLE 00022 +#define DT_N_S_sdram_c0000000_ORD 24 +#define DT_N_S_sdram_c0000000_ORD_STR_SORTABLE 00024 /* Ordinals for what this node depends on directly: */ #define DT_N_S_sdram_c0000000_REQUIRES_ORDS \ @@ -3527,7 +3862,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_CHILD_IDX 61 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_CHILD_IDX 80 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_NODELABEL_NUM 1 @@ -3551,16 +3886,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_HASH 3iYfjq2aZD6UXLVM6mpsQDP8G3UIQpDenFAngOA4E6U /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_ORD 23 -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_ORD_STR_SORTABLE 00023 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_ORD 25 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_ORD_STR_SORTABLE 00025 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_SUPPORTS_ORDS \ - 25, + 27, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6_EXISTS 1 @@ -3631,7 +3966,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_CHILD_IDX 64 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_CHILD_IDX 83 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_NODELABEL_NUM 1 @@ -3655,16 +3990,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_HASH Nxt1tMo2TlB6F93J1Ad8dl1a_v2kdp8h7wHTTdOfSBI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_ORD 24 -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_ORD_STR_SORTABLE 00024 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_ORD 26 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_ORD_STR_SORTABLE 00026 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_SUPPORTS_ORDS \ - 25, + 27, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7_EXISTS 1 @@ -3762,21 +4097,22 @@ #define DT_N_S_soc_S_i2c_40005400_HASH qdcoGqslkp_qGZ59SAaN4H47YRea2PU_8MI_v34YdEo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005400_ORD 25 -#define DT_N_S_soc_S_i2c_40005400_ORD_STR_SORTABLE 00025 +#define DT_N_S_soc_S_i2c_40005400_ORD 27 +#define DT_N_S_soc_S_i2c_40005400_ORD_STR_SORTABLE 00027 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005400_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 23, \ - 24, + 25, \ + 26, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_SUPPORTS_ORDS \ - 26, \ - 156, + 28, \ + 103, \ + 206, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_40005400_EXISTS 1 @@ -3999,13 +4335,13 @@ #define DT_N_S_smbus1_HASH RRjxCtQo8vEaNES3pUGCHfX2Mp6H0kS5wnsZuRpKBrY /* Node's dependency ordinal: */ -#define DT_N_S_smbus1_ORD 26 -#define DT_N_S_smbus1_ORD_STR_SORTABLE 00026 +#define DT_N_S_smbus1_ORD 28 +#define DT_N_S_smbus1_ORD_STR_SORTABLE 00028 /* Ordinals for what this node depends on directly: */ #define DT_N_S_smbus1_REQUIRES_ORDS \ 0, \ - 25, + 27, /* Ordinals for what depends directly on this node: */ #define DT_N_S_smbus1_SUPPORTS_ORDS @@ -4124,8 +4460,8 @@ #define DT_N_S_soc_S_i2c_40005800_HASH eB73TQqq_PUOgKTcnvcwzuS4tWCFU0fUXyPb0bwWGkQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005800_ORD 27 -#define DT_N_S_soc_S_i2c_40005800_ORD_STR_SORTABLE 00027 +#define DT_N_S_soc_S_i2c_40005800_ORD 29 +#define DT_N_S_soc_S_i2c_40005800_ORD_STR_SORTABLE 00029 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005800_REQUIRES_ORDS \ @@ -4135,11 +4471,11 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005800_SUPPORTS_ORDS \ - 28, + 30, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_40005800_EXISTS 1 -#define DT_N_INST_2_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_40005800 +#define DT_N_INST_3_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_40005800 #define DT_N_NODELABEL_i2c2 DT_N_S_soc_S_i2c_40005800 /* Macros for properties that are special in the specification: */ @@ -4323,13 +4659,13 @@ #define DT_N_S_smbus2_HASH CeKsUeBLVHACPFrmleKnxYHTPUYQ02SrNC2w1a_Vmm4 /* Node's dependency ordinal: */ -#define DT_N_S_smbus2_ORD 28 -#define DT_N_S_smbus2_ORD_STR_SORTABLE 00028 +#define DT_N_S_smbus2_ORD 30 +#define DT_N_S_smbus2_ORD_STR_SORTABLE 00030 /* Ordinals for what this node depends on directly: */ #define DT_N_S_smbus2_REQUIRES_ORDS \ 0, \ - 27, + 29, /* Ordinals for what depends directly on this node: */ #define DT_N_S_smbus2_SUPPORTS_ORDS @@ -4421,7 +4757,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_CHILD_IDX 62 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_CHILD_IDX 81 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_NODELABEL_NUM 1 @@ -4445,16 +4781,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_HASH XQkIRwvIy3BsmXTadqHbYYwBl319Mk_AbSM5jVwKnL0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_ORD 29 -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_ORD_STR_SORTABLE 00029 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_ORD 31 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_ORD_STR_SORTABLE 00031 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_SUPPORTS_ORDS \ - 31, + 33, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7_EXISTS 1 @@ -4525,7 +4861,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_CHILD_IDX 65 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_CHILD_IDX 84 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_NODELABEL_NUM 1 @@ -4549,16 +4885,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_HASH v6gzpn1aVN2Q57DtCobiEdQZ2EQyvqTow_NuXgrxos4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_ORD 30 -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_ORD_STR_SORTABLE 00030 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_ORD 32 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_ORD_STR_SORTABLE 00032 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_SUPPORTS_ORDS \ - 31, + 33, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8_EXISTS 1 @@ -4641,39 +4977,41 @@ #define DT_N_S_soc_S_i2c_40005c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_i2c_40005c00_CHILD_NUM 0 -#define DT_N_S_soc_S_i2c_40005c00_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_i2c_40005c00_CHILD_NUM 1 +#define DT_N_S_soc_S_i2c_40005c00_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c) +#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c) +#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c) +#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c) +#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, __VA_ARGS__) /* Node's hash: */ #define DT_N_S_soc_S_i2c_40005c00_HASH 5fJFJ8Y_ydW7n0l4sdfawjHU6iH4mdEbeKnIUA_HHoc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005c00_ORD 31 -#define DT_N_S_soc_S_i2c_40005c00_ORD_STR_SORTABLE 00031 +#define DT_N_S_soc_S_i2c_40005c00_ORD 33 +#define DT_N_S_soc_S_i2c_40005c00_ORD_STR_SORTABLE 00033 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005c00_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 29, \ - 30, + 31, \ + 32, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005c00_SUPPORTS_ORDS \ - 32, + 34, \ + 103, \ + 171, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_40005c00_EXISTS 1 -#define DT_N_INST_3_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_40005c00 +#define DT_N_INST_1_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_40005c00 #define DT_N_NODELABEL_i2c3 DT_N_S_soc_S_i2c_40005c00 /* Macros for properties that are special in the specification: */ @@ -4714,7 +5052,7 @@ #define DT_N_S_soc_S_i2c_40005c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" #define DT_N_S_soc_S_i2c_40005c00_COMPAT_MODEL_IDX_0_EXISTS 1 #define DT_N_S_soc_S_i2c_40005c00_COMPAT_MODEL_IDX_0 "stm32-i2c-v2" -#define DT_N_S_soc_S_i2c_40005c00_STATUS_disabled 1 +#define DT_N_S_soc_S_i2c_40005c00_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ #define DT_N_S_soc_S_i2c_40005c00_PINCTRL_NUM 1 @@ -4777,14 +5115,14 @@ #define DT_N_S_soc_S_i2c_40005c00_P_sq_size_EXISTS 1 #define DT_N_S_soc_S_i2c_40005c00_P_cq_size 4 #define DT_N_S_soc_S_i2c_40005c00_P_cq_size_EXISTS 1 -#define DT_N_S_soc_S_i2c_40005c00_P_status "disabled" -#define DT_N_S_soc_S_i2c_40005c00_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_i2c_40005c00_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_i2c_40005c00_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_i2c_40005c00_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_i2c_40005c00_P_status "okay" +#define DT_N_S_soc_S_i2c_40005c00_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_i2c_40005c00_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_i2c_40005c00_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_i2c_40005c00_P_status_IDX_0 "okay" #define DT_N_S_soc_S_i2c_40005c00_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2c_40005c00_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_i2c_40005c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_i2c_40005c00_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 #define DT_N_S_soc_S_i2c_40005c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005c00, status, 0) #define DT_N_S_soc_S_i2c_40005c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005c00, status, 0) #define DT_N_S_soc_S_i2c_40005c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00, status, 0, __VA_ARGS__) @@ -4892,13 +5230,13 @@ #define DT_N_S_smbus3_HASH ZeVI1g__orT_bhXDEMbeNx9PIwW74xB8lEqisMROKVc /* Node's dependency ordinal: */ -#define DT_N_S_smbus3_ORD 32 -#define DT_N_S_smbus3_ORD_STR_SORTABLE 00032 +#define DT_N_S_smbus3_ORD 34 +#define DT_N_S_smbus3_ORD_STR_SORTABLE 00034 /* Ordinals for what this node depends on directly: */ #define DT_N_S_smbus3_REQUIRES_ORDS \ 0, \ - 31, + 33, /* Ordinals for what depends directly on this node: */ #define DT_N_S_smbus3_SUPPORTS_ORDS @@ -4990,7 +5328,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_CHILD_IDX 63 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_CHILD_IDX 82 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_NODELABEL_NUM 1 @@ -5014,16 +5352,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_HASH tUnuBNFxvqZQg1Y2J5kHG_GPIZDi6HMsL7KBiKYAtbA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_ORD 33 -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_ORD_STR_SORTABLE 00033 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_ORD 35 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_ORD_STR_SORTABLE 00035 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_SUPPORTS_ORDS \ - 35, + 37, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11_EXISTS 1 @@ -5094,7 +5432,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_CHILD_IDX 66 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_CHILD_IDX 85 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_NODELABEL_NUM 1 @@ -5118,16 +5456,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_HASH OuWx0ko6lKYGBEE5kpBS1EbpIHloUvZEEihKwZbyO3s /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_ORD 34 -#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_ORD_STR_SORTABLE 00034 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_ORD 36 +#define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_ORD_STR_SORTABLE 00036 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_SUPPORTS_ORDS \ - 35, + 37, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12_EXISTS 1 @@ -5225,25 +5563,25 @@ #define DT_N_S_soc_S_i2c_58001c00_HASH 7zFXeytRG0YRlm5DndI1CnL8H8XBEccQz1iO4_UGulk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_58001c00_ORD 35 -#define DT_N_S_soc_S_i2c_58001c00_ORD_STR_SORTABLE 00035 +#define DT_N_S_soc_S_i2c_58001c00_ORD 37 +#define DT_N_S_soc_S_i2c_58001c00_ORD_STR_SORTABLE 00037 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_58001c00_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 33, \ - 34, + 35, \ + 36, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_58001c00_SUPPORTS_ORDS \ - 36, \ - 69, + 38, \ + 103, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_58001c00_EXISTS 1 -#define DT_N_INST_1_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_58001c00 +#define DT_N_INST_2_st_stm32_i2c_v2 DT_N_S_soc_S_i2c_58001c00 #define DT_N_NODELABEL_i2c4 DT_N_S_soc_S_i2c_58001c00 /* Macros for properties that are special in the specification: */ @@ -5462,13 +5800,13 @@ #define DT_N_S_smbus4_HASH Yz3iDQpYN_WRfZzFDrKAcE1qlHQcEOd2JWX1YWcG0ns /* Node's dependency ordinal: */ -#define DT_N_S_smbus4_ORD 36 -#define DT_N_S_smbus4_ORD_STR_SORTABLE 00036 +#define DT_N_S_smbus4_ORD 38 +#define DT_N_S_smbus4_ORD_STR_SORTABLE 00038 /* Ordinals for what this node depends on directly: */ #define DT_N_S_smbus4_REQUIRES_ORDS \ 0, \ - 35, + 37, /* Ordinals for what depends directly on this node: */ #define DT_N_S_smbus4_SUPPORTS_ORDS @@ -5587,13 +5925,13 @@ #define DT_N_S_vbat_HASH 6jTjjWCiokAcWwHDg9DIiUBaK7_R_tkCJ6unpENFBIY /* Node's dependency ordinal: */ -#define DT_N_S_vbat_ORD 37 -#define DT_N_S_vbat_ORD_STR_SORTABLE 00037 +#define DT_N_S_vbat_ORD 39 +#define DT_N_S_vbat_ORD_STR_SORTABLE 00039 /* Ordinals for what this node depends on directly: */ #define DT_N_S_vbat_REQUIRES_ORDS \ 0, \ - 9, + 12, /* Ordinals for what depends directly on this node: */ #define DT_N_S_vbat_SUPPORTS_ORDS @@ -5714,13 +6052,13 @@ #define DT_N_S_vref_HASH _KQ_hQT8vlL_HGgSo8B0PN_M_dmG5lMZ2C1aGmWYFog /* Node's dependency ordinal: */ -#define DT_N_S_vref_ORD 38 -#define DT_N_S_vref_ORD_STR_SORTABLE 00038 +#define DT_N_S_vref_ORD 40 +#define DT_N_S_vref_ORD_STR_SORTABLE 00040 /* Ordinals for what this node depends on directly: */ #define DT_N_S_vref_REQUIRES_ORDS \ 0, \ - 9, + 12, /* Ordinals for what depends directly on this node: */ #define DT_N_S_vref_SUPPORTS_ORDS @@ -5800,15571 +6138,22757 @@ #define DT_N_S_vref_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/uart4_rx_pi9 + * Devicetree node: /gpio@deadbeef * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 + * Node identifier: DT_N_S_gpio_deadbeef + * + * Binding (compatible = vnd,gpio): + * $ZEPHYR_BASE/dts/bindings/test/vnd,gpio.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PATH "/soc/pin-controller@58020000/uart4_rx_pi9" +#define DT_N_S_gpio_deadbeef_PATH "/gpio@deadbeef" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FULL_NAME "uart4_rx_pi9" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FULL_NAME_UNQUOTED uart4_rx_pi9 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FULL_NAME_TOKEN uart4_rx_pi9 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FULL_NAME_UPPER_TOKEN UART4_RX_PI9 +#define DT_N_S_gpio_deadbeef_FULL_NAME "gpio@deadbeef" +#define DT_N_S_gpio_deadbeef_FULL_NAME_UNQUOTED gpio@deadbeef +#define DT_N_S_gpio_deadbeef_FULL_NAME_TOKEN gpio_deadbeef +#define DT_N_S_gpio_deadbeef_FULL_NAME_UPPER_TOKEN GPIO_DEADBEEF + +/* Node parent (/) identifier: */ +#define DT_N_S_gpio_deadbeef_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_gpio_deadbeef_CHILD_IDX 25 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_gpio_deadbeef_NODELABEL_NUM 1 +#define DT_N_S_gpio_deadbeef_FOREACH_NODELABEL(fn) fn(gpioz) +#define DT_N_S_gpio_deadbeef_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioz, __VA_ARGS__) +#define DT_N_S_gpio_deadbeef_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_gpio_deadbeef_CHILD_NUM 0 +#define DT_N_S_gpio_deadbeef_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_gpio_deadbeef_FOREACH_CHILD(fn) +#define DT_N_S_gpio_deadbeef_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_gpio_deadbeef_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_gpio_deadbeef_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_gpio_deadbeef_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_gpio_deadbeef_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_gpio_deadbeef_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_gpio_deadbeef_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_gpio_deadbeef_HASH QE_4zwqUf5tynrs1P2rF6R6rrtrCD9E2q5gaceJXB3c + +/* Node's dependency ordinal: */ +#define DT_N_S_gpio_deadbeef_ORD 41 +#define DT_N_S_gpio_deadbeef_ORD_STR_SORTABLE 00041 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_gpio_deadbeef_REQUIRES_ORDS \ + 0, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_gpio_deadbeef_SUPPORTS_ORDS \ + 103, + +/* Existence and alternate IDs: */ +#define DT_N_S_gpio_deadbeef_EXISTS 1 +#define DT_N_INST_0_vnd_gpio DT_N_S_gpio_deadbeef +#define DT_N_NODELABEL_gpioz DT_N_S_gpio_deadbeef + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_gpio_deadbeef_REG_NUM 1 +#define DT_N_S_gpio_deadbeef_REG_IDX_0_EXISTS 1 +#define DT_N_S_gpio_deadbeef_REG_IDX_0_VAL_ADDRESS 3735928559 +#define DT_N_S_gpio_deadbeef_REG_IDX_0_VAL_SIZE 4096 +#define DT_N_S_gpio_deadbeef_RANGES_NUM 0 +#define DT_N_S_gpio_deadbeef_FOREACH_RANGE(fn) +#define DT_N_S_gpio_deadbeef_IRQ_NUM 0 +#define DT_N_S_gpio_deadbeef_IRQ_LEVEL 0 +#define DT_N_S_gpio_deadbeef_COMPAT_MATCHES_vnd_gpio 1 +#define DT_N_S_gpio_deadbeef_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_gpio_deadbeef_COMPAT_VENDOR_IDX_0 "A stand-in for a real vendor which can be used in examples and tests" +#define DT_N_S_gpio_deadbeef_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_gpio_deadbeef_COMPAT_MODEL_IDX_0 "gpio" +#define DT_N_S_gpio_deadbeef_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_gpio_deadbeef_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_gpio_deadbeef_P_reg {3735928559, 4096} +#define DT_N_S_gpio_deadbeef_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_reg_IDX_0 3735928559 +#define DT_N_S_gpio_deadbeef_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_reg_IDX_1 4096 +#define DT_N_S_gpio_deadbeef_P_reg_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_gpio_controller 1 +#define DT_N_S_gpio_deadbeef_P_gpio_controller_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_ngpios 32 +#define DT_N_S_gpio_deadbeef_P_ngpios_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_status "okay" +#define DT_N_S_gpio_deadbeef_P_status_STRING_UNQUOTED okay +#define DT_N_S_gpio_deadbeef_P_status_STRING_TOKEN okay +#define DT_N_S_gpio_deadbeef_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_gpio_deadbeef_P_status_IDX_0 "okay" +#define DT_N_S_gpio_deadbeef_P_status_IDX_0_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_gpio_deadbeef_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_gpio_deadbeef, status, 0) +#define DT_N_S_gpio_deadbeef_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_gpio_deadbeef, status, 0) +#define DT_N_S_gpio_deadbeef_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_gpio_deadbeef, status, 0, __VA_ARGS__) +#define DT_N_S_gpio_deadbeef_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_deadbeef, status, 0, __VA_ARGS__) +#define DT_N_S_gpio_deadbeef_P_status_LEN 1 +#define DT_N_S_gpio_deadbeef_P_status_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_compatible {"vnd,gpio"} +#define DT_N_S_gpio_deadbeef_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_compatible_IDX_0 "vnd,gpio" +#define DT_N_S_gpio_deadbeef_P_compatible_IDX_0_STRING_UNQUOTED vnd,gpio +#define DT_N_S_gpio_deadbeef_P_compatible_IDX_0_STRING_TOKEN vnd_gpio +#define DT_N_S_gpio_deadbeef_P_compatible_IDX_0_STRING_UPPER_TOKEN VND_GPIO +#define DT_N_S_gpio_deadbeef_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_gpio_deadbeef, compatible, 0) +#define DT_N_S_gpio_deadbeef_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_gpio_deadbeef, compatible, 0) +#define DT_N_S_gpio_deadbeef_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_gpio_deadbeef, compatible, 0, __VA_ARGS__) +#define DT_N_S_gpio_deadbeef_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_gpio_deadbeef, compatible, 0, __VA_ARGS__) +#define DT_N_S_gpio_deadbeef_P_compatible_LEN 1 +#define DT_N_S_gpio_deadbeef_P_compatible_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_zephyr_deferred_init 0 +#define DT_N_S_gpio_deadbeef_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_wakeup_source 0 +#define DT_N_S_gpio_deadbeef_P_wakeup_source_EXISTS 1 +#define DT_N_S_gpio_deadbeef_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_gpio_deadbeef_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/adc1_inp0_pa0_c + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_PATH "/soc/pin-controller@58020000/adc1_inp0_pa0_c" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FULL_NAME "adc1_inp0_pa0_c" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FULL_NAME_UNQUOTED adc1_inp0_pa0_c +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FULL_NAME_TOKEN adc1_inp0_pa0_c +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FULL_NAME_UPPER_TOKEN ADC1_INP0_PA0_C /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_IDX 80 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_CHILD_IDX 11 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_NODELABEL(fn) fn(uart4_rx_pi9) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4_rx_pi9, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_NODELABEL(fn) fn(adc1_inp0_pa0_c) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1_inp0_pa0_c, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_HASH 7J9Jc2B8XDob8o3IXrNs4I_2HL1MlkmTsrrBqfOPpV8 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_HASH VtowpeF1t_r1iAalHG4VLFq4OZLvPKxQF7clVzjxwS0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_ORD 39 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_ORD_STR_SORTABLE 00039 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_ORD 42 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_ORD_STR_SORTABLE 00042 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_SUPPORTS_ORDS \ - 42, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_SUPPORTS_ORDS \ + 48, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_EXISTS 1 -#define DT_N_NODELABEL_uart4_rx_pi9 DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_EXISTS 1 +#define DT_N_NODELABEL_adc1_inp0_pa0_c DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_pinmux 4392 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_pinmux 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/uart4_tx_pa0 + * Devicetree node: /soc/pin-controller@58020000/adc1_inp12_pc2 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_PATH "/soc/pin-controller@58020000/uart4_tx_pa0" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_PATH "/soc/pin-controller@58020000/adc1_inp12_pc2" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FULL_NAME "uart4_tx_pa0" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FULL_NAME_UNQUOTED uart4_tx_pa0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FULL_NAME_TOKEN uart4_tx_pa0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FULL_NAME_UPPER_TOKEN UART4_TX_PA0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FULL_NAME "adc1_inp12_pc2" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FULL_NAME_UNQUOTED adc1_inp12_pc2 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FULL_NAME_TOKEN adc1_inp12_pc2 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FULL_NAME_UPPER_TOKEN ADC1_INP12_PC2 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_CHILD_IDX 85 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_CHILD_IDX 15 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_NODELABEL(fn) fn(uart4_tx_pa0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4_tx_pa0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_NODELABEL(fn) fn(adc1_inp12_pc2) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1_inp12_pc2, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_HASH 5KHYJl7kLMxcRucQl_rbMS_XYlsEePc38TIxa05kPls +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_HASH kq_ZNpSvsbocQ9GIpHuTmIs4RGmiyOeQRTjBgpb0eV4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_ORD 40 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_ORD_STR_SORTABLE 00040 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_ORD 43 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_ORD_STR_SORTABLE 00043 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_SUPPORTS_ORDS \ - 42, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_SUPPORTS_ORDS \ + 48, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_EXISTS 1 -#define DT_N_NODELABEL_uart4_tx_pa0 DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_EXISTS 1 +#define DT_N_NODELABEL_adc1_inp12_pc2 DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_pinmux 8 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_pinmux 1104 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/rcc@58024400/reset-controller + * Devicetree node: /soc/pin-controller@58020000/adc1_inp13_pc3 * - * Node identifier: DT_N_S_soc_S_rcc_58024400_S_reset_controller - * - * Binding (compatible = st,stm32-rcc-rctl): - * $ZEPHYR_BASE/dts/bindings/reset/st,stm32-rcc-rctl.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_PATH "/soc/rcc@58024400/reset-controller" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_PATH "/soc/pin-controller@58020000/adc1_inp13_pc3" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FULL_NAME "reset-controller" -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FULL_NAME_UNQUOTED reset-controller -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FULL_NAME_TOKEN reset_controller -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FULL_NAME_UPPER_TOKEN RESET_CONTROLLER +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FULL_NAME "adc1_inp13_pc3" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FULL_NAME_UNQUOTED adc1_inp13_pc3 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FULL_NAME_TOKEN adc1_inp13_pc3 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FULL_NAME_UPPER_TOKEN ADC1_INP13_PC3 -/* Node parent (/soc/rcc@58024400) identifier: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_PARENT DT_N_S_soc_S_rcc_58024400 +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_CHILD_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_CHILD_IDX 16 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_NODELABEL_NUM 1 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_NODELABEL(fn) fn(rctl) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_NODELABEL_VARGS(fn, ...) fn(rctl, __VA_ARGS__) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_NODELABEL(fn) fn(adc1_inp13_pc3) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1_inp13_pc3, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_CHILD_NUM 0 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_HASH WR_z9K_wDQyMuNanKB94ZdUTcpHW3IEtIU4TiSkvN3o +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_HASH eL12Pe9DDFq_ehA4JM7rKFxi_RZjh9BNgqi8nCW9_i4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_ORD 41 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_ORD_STR_SORTABLE 00041 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_ORD 44 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_ORD_STR_SORTABLE 00044 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_REQUIRES_ORDS \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_SUPPORTS_ORDS \ - 42, \ - 45, \ - 48, \ - 98, \ - 102, \ - 111, \ - 112, \ - 113, \ - 114, \ - 115, \ - 118, \ - 119, \ - 217, \ - 231, \ - 234, \ - 237, \ - 240, \ - 243, \ - 245, \ - 247, \ - 250, \ - 253, \ - 256, \ - 258, \ - 260, \ - 263, \ - 266, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_SUPPORTS_ORDS \ + 48, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_EXISTS 1 -#define DT_N_INST_0_st_stm32_rcc_rctl DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_NODELABEL_rctl DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_EXISTS 1 +#define DT_N_NODELABEL_adc1_inp13_pc3 DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_REG_NUM 0 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_RANGES_NUM 0 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_IRQ_NUM 0 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_IRQ_LEVEL 0 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_COMPAT_MATCHES_st_stm32_rcc_rctl 1 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_COMPAT_MODEL_IDX_0 "stm32-rcc-rctl" -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_set_bit_to_deassert 0 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_set_bit_to_deassert_EXISTS 1 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible {"st,stm32-rcc-rctl"} -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_IDX_0 "st,stm32-rcc-rctl" -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-rcc-rctl -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_IDX_0_STRING_TOKEN st_stm32_rcc_rctl -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_RCC_RCTL -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, compatible, 0) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, compatible, 0) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_LEN 1 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_wakeup_source 0 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_pinmux 1136 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/serial@40004c00 - * - * Node identifier: DT_N_S_soc_S_serial_40004c00 + * Devicetree node: /soc/pin-controller@58020000/adc1_inp18_pa4 * - * Binding (compatible = st,stm32-uart): - * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-uart.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_serial_40004c00_PATH "/soc/serial@40004c00" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_PATH "/soc/pin-controller@58020000/adc1_inp18_pa4" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_40004c00_FULL_NAME "serial@40004c00" -#define DT_N_S_soc_S_serial_40004c00_FULL_NAME_UNQUOTED serial@40004c00 -#define DT_N_S_soc_S_serial_40004c00_FULL_NAME_TOKEN serial_40004c00 -#define DT_N_S_soc_S_serial_40004c00_FULL_NAME_UPPER_TOKEN SERIAL_40004C00 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FULL_NAME "adc1_inp18_pa4" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FULL_NAME_UNQUOTED adc1_inp18_pa4 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FULL_NAME_TOKEN adc1_inp18_pa4 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FULL_NAME_UPPER_TOKEN ADC1_INP18_PA4 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_40004c00_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_40004c00_CHILD_IDX 11 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_CHILD_IDX 13 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_40004c00_NODELABEL_NUM 1 -#define DT_N_S_soc_S_serial_40004c00_FOREACH_NODELABEL(fn) fn(uart4) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_NODELABEL(fn) fn(adc1_inp18_pa4) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1_inp18_pa4, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_40004c00_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_40004c00_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_serial_40004c00_HASH qw6sySCqGO4wCPwXm_EFlFNv1NqVYdGrZFXhKaRqK7U +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_HASH g4qLR0IOQJHUGz_BSJPWacfhoXv8TA7K_iUH7e35rEM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40004c00_ORD 42 -#define DT_N_S_soc_S_serial_40004c00_ORD_STR_SORTABLE 00042 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_ORD 45 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_ORD_STR_SORTABLE 00045 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_40004c00_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 39, \ - 40, \ - 41, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_40004c00_SUPPORTS_ORDS \ - 69, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_SUPPORTS_ORDS \ + 48, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_40004c00_EXISTS 1 -#define DT_N_INST_1_st_stm32_uart DT_N_S_soc_S_serial_40004c00 -#define DT_N_NODELABEL_uart4 DT_N_S_soc_S_serial_40004c00 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_EXISTS 1 +#define DT_N_NODELABEL_adc1_inp18_pa4 DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_40004c00_REG_NUM 1 -#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_VAL_ADDRESS 1073761280 -#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_serial_40004c00_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_40004c00_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_40004c00_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_irq 52 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_40004c00_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_40004c00_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_40004c00_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40004c00_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_COMPAT_MODEL_IDX_0 "stm32-uart" -#define DT_N_S_soc_S_serial_40004c00_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NUM 1 -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_TOKEN default -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX 0 -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0 -#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_serial_40004c00_P_reg {1073761280, 1024} -#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_0 1073761280 -#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_40004c00_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bits 524288 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0) -#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0) -#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_VAL_id 4627 -#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, resets, 0) -#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, resets, 0) -#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_interrupts {52, 0} -#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_0 52 -#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_40004c00_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_current_speed 115200 -#define DT_N_S_soc_S_serial_40004c00_P_current_speed_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits "1" -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_STRING_UNQUOTED 1 -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_STRING_TOKEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_STRING_UPPER_TOKEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0 "1" -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0) -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0) -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_data_bits 8 -#define DT_N_S_soc_S_serial_40004c00_P_data_bits_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_serial_40004c00_P_data_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_data_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_single_wire 0 -#define DT_N_S_soc_S_serial_40004c00_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_40004c00_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0) \ - fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_LEN 2 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names {"default"} -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0 "default" -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_UNQUOTED default -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_TOKEN default -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_de_enable 0 -#define DT_N_S_soc_S_serial_40004c00_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_40004c00_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_40004c00_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_de_invert 0 -#define DT_N_S_soc_S_serial_40004c00_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_40004c00_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_40004c00_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_parity "none" -#define DT_N_S_soc_S_serial_40004c00_P_parity_STRING_UNQUOTED none -#define DT_N_S_soc_S_serial_40004c00_P_parity_STRING_TOKEN none -#define DT_N_S_soc_S_serial_40004c00_P_parity_STRING_UPPER_TOKEN NONE -#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0 "none" -#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, parity, 0) -#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, parity, 0) -#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_parity_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_parity_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_status "okay" -#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_UNQUOTED okay -#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_TOKEN okay -#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0 "okay" -#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, status, 0) -#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, status, 0) -#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_status_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_compatible {"st,stm32-uart"} -#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0 "st,stm32-uart" -#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0) -#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0) -#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004c00_P_compatible_LEN 1 -#define DT_N_S_soc_S_serial_40004c00_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_40004c00_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_40004c00_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_40004c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_tx_invert 0 -#define DT_N_S_soc_S_serial_40004c00_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004c00_P_rx_invert 0 -#define DT_N_S_soc_S_serial_40004c00_P_rx_invert_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_pinmux 144 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usart1_rx_pa10 + * Devicetree node: /soc/pin-controller@58020000/adc1_inp1_pa1_c * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_PATH "/soc/pin-controller@58020000/usart1_rx_pa10" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_PATH "/soc/pin-controller@58020000/adc1_inp1_pa1_c" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FULL_NAME "usart1_rx_pa10" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FULL_NAME_UNQUOTED usart1_rx_pa10 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FULL_NAME_TOKEN usart1_rx_pa10 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FULL_NAME_UPPER_TOKEN USART1_RX_PA10 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FULL_NAME "adc1_inp1_pa1_c" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FULL_NAME_UNQUOTED adc1_inp1_pa1_c +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FULL_NAME_TOKEN adc1_inp1_pa1_c +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FULL_NAME_UPPER_TOKEN ADC1_INP1_PA1_C /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_CHILD_IDX 79 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_CHILD_IDX 12 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_NODELABEL(fn) fn(usart1_rx_pa10) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1_rx_pa10, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_NODELABEL(fn) fn(adc1_inp1_pa1_c) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1_inp1_pa1_c, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_HASH 8nJQ_t_C11IY_uyXFPNlsBbgvUlEL0U_ayUVN3_mthU +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_HASH yH0RhuHm_sYehzLMxE9s9mqomFXIwkmx0bGhcUrfxqQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_ORD 43 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_ORD_STR_SORTABLE 00043 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_ORD 46 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_ORD_STR_SORTABLE 00046 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_SUPPORTS_ORDS \ - 45, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_SUPPORTS_ORDS \ + 48, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_EXISTS 1 -#define DT_N_NODELABEL_usart1_rx_pa10 DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_EXISTS 1 +#define DT_N_NODELABEL_adc1_inp1_pa1_c DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_pinmux 327 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_pinmux 48 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usart1_tx_pa9 + * Devicetree node: /soc/pin-controller@58020000/adc1_inp3_pa6 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PATH "/soc/pin-controller@58020000/usart1_tx_pa9" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_PATH "/soc/pin-controller@58020000/adc1_inp3_pa6" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FULL_NAME "usart1_tx_pa9" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FULL_NAME_UNQUOTED usart1_tx_pa9 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FULL_NAME_TOKEN usart1_tx_pa9 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FULL_NAME_UPPER_TOKEN USART1_TX_PA9 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FULL_NAME "adc1_inp3_pa6" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FULL_NAME_UNQUOTED adc1_inp3_pa6 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FULL_NAME_TOKEN adc1_inp3_pa6 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FULL_NAME_UPPER_TOKEN ADC1_INP3_PA6 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_IDX 84 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_CHILD_IDX 14 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_NODELABEL(fn) fn(usart1_tx_pa9) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1_tx_pa9, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_NODELABEL(fn) fn(adc1_inp3_pa6) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1_inp3_pa6, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_HASH KWM2HbTThxHbFT7y5njMId6Hb6VN_CzWDzX0qSd8vAY +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_HASH gCiw0h6sGw4AwcqlqLUKKPdwjlcfoRoORwttHxJ66aw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_ORD 44 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_ORD_STR_SORTABLE 00044 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_ORD 47 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_ORD_STR_SORTABLE 00047 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_SUPPORTS_ORDS \ - 45, +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_SUPPORTS_ORDS \ + 48, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_EXISTS 1 -#define DT_N_NODELABEL_usart1_tx_pa9 DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_pinmux 295 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_EXISTS 1 +#define DT_N_NODELABEL_adc1_inp3_pa6 DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_pinmux 208 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/serial@40011000 + * Devicetree node: /soc/adc@40022000 * - * Node identifier: DT_N_S_soc_S_serial_40011000 + * Node identifier: DT_N_S_soc_S_adc_40022000 * - * Binding (compatible = st,stm32-usart): - * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * Binding (compatible = st,stm32-adc): + * $ZEPHYR_BASE/dts/bindings/adc/st,stm32-adc.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_serial_40011000_PATH "/soc/serial@40011000" +#define DT_N_S_soc_S_adc_40022000_PATH "/soc/adc@40022000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_40011000_FULL_NAME "serial@40011000" -#define DT_N_S_soc_S_serial_40011000_FULL_NAME_UNQUOTED serial@40011000 -#define DT_N_S_soc_S_serial_40011000_FULL_NAME_TOKEN serial_40011000 -#define DT_N_S_soc_S_serial_40011000_FULL_NAME_UPPER_TOKEN SERIAL_40011000 +#define DT_N_S_soc_S_adc_40022000_FULL_NAME "adc@40022000" +#define DT_N_S_soc_S_adc_40022000_FULL_NAME_UNQUOTED adc@40022000 +#define DT_N_S_soc_S_adc_40022000_FULL_NAME_TOKEN adc_40022000 +#define DT_N_S_soc_S_adc_40022000_FULL_NAME_UPPER_TOKEN ADC_40022000 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_40011000_PARENT DT_N_S_soc +#define DT_N_S_soc_S_adc_40022000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_40011000_CHILD_IDX 8 +#define DT_N_S_soc_S_adc_40022000_CHILD_IDX 48 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_40011000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_serial_40011000_FOREACH_NODELABEL(fn) fn(usart1) -#define DT_N_S_soc_S_serial_40011000_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_adc_40022000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_adc_40022000_FOREACH_NODELABEL(fn) fn(adc1) +#define DT_N_S_soc_S_adc_40022000_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_40011000_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_40011000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_CHILD_NUM 6 +#define DT_N_S_soc_S_adc_40022000_CHILD_NUM_STATUS_OKAY 6 +#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_c) fn(DT_N_S_soc_S_adc_40022000_S_channel_d) fn(DT_N_S_soc_S_adc_40022000_S_channel_12) fn(DT_N_S_soc_S_adc_40022000_S_channel_3) fn(DT_N_S_soc_S_adc_40022000_S_channel_0) fn(DT_N_S_soc_S_adc_40022000_S_channel_1) +#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_d) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_1) +#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_d, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_1, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_c) fn(DT_N_S_soc_S_adc_40022000_S_channel_d) fn(DT_N_S_soc_S_adc_40022000_S_channel_12) fn(DT_N_S_soc_S_adc_40022000_S_channel_3) fn(DT_N_S_soc_S_adc_40022000_S_channel_0) fn(DT_N_S_soc_S_adc_40022000_S_channel_1) +#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_c) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_d) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_12) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_3) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_1) +#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_d, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_adc_40022000_S_channel_1, __VA_ARGS__) /* Node's hash: */ -#define DT_N_S_soc_S_serial_40011000_HASH zC6jA0Z9upGUbivXx_7kb5XvPKXVEdHortQpRPhSzt8 +#define DT_N_S_soc_S_adc_40022000_HASH tpkd51fjWnjhbmlkM7KN0vPfDwGBvEfx4X59MB9U7oQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40011000_ORD 45 -#define DT_N_S_soc_S_serial_40011000_ORD_STR_SORTABLE 00045 +#define DT_N_S_soc_S_adc_40022000_ORD 48 +#define DT_N_S_soc_S_adc_40022000_ORD_STR_SORTABLE 00048 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_40011000_REQUIRES_ORDS \ +#define DT_N_S_soc_S_adc_40022000_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, \ + 42, \ 43, \ - 44, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_40011000_SUPPORTS_ORDS \ - 69, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_40011000_EXISTS 1 -#define DT_N_INST_0_st_stm32_usart DT_N_S_soc_S_serial_40011000 -#define DT_N_INST_0_st_stm32_uart DT_N_S_soc_S_serial_40011000 -#define DT_N_NODELABEL_usart1 DT_N_S_soc_S_serial_40011000 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_40011000_REG_NUM 1 -#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_VAL_ADDRESS 1073811456 -#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_serial_40011000_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_40011000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_40011000_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_irq 37 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_40011000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_MATCHES_st_stm32_usart 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_0 "stm32-usart" -#define DT_N_S_soc_S_serial_40011000_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_1 "stm32-uart" -#define DT_N_S_soc_S_serial_40011000_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_40011000_PINCTRL_NUM 1 -#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_TOKEN default -#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX 0 -#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 -#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10 - -/* Generic property macros: */ -#define DT_N_S_soc_S_serial_40011000_P_reg {1073811456, 1024} -#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_0 1073811456 -#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_40011000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bus 240 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bits 16 -#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, clocks, 0) -#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, clocks, 0) -#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_40011000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_VAL_id 4868 -#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, resets, 0) -#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, resets, 0) -#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_40011000_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_interrupts {37, 0} -#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_0 37 -#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_40011000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_current_speed 115200 -#define DT_N_S_soc_S_serial_40011000_P_current_speed_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_stop_bits "1" -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_STRING_UNQUOTED 1 -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_STRING_TOKEN 1 -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_STRING_UPPER_TOKEN 1 -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_IDX_0 "1" -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, stop_bits, 0) -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, stop_bits, 0) -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_LEN 1 -#define DT_N_S_soc_S_serial_40011000_P_stop_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_data_bits 8 -#define DT_N_S_soc_S_serial_40011000_P_data_bits_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_serial_40011000_P_data_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_data_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_single_wire 0 -#define DT_N_S_soc_S_serial_40011000_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_40011000_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0) \ - fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_LEN 2 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names {"default"} -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0 "default" -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_TOKEN default -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_LEN 1 -#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_de_enable 0 -#define DT_N_S_soc_S_serial_40011000_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_40011000_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_40011000_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_de_invert 0 -#define DT_N_S_soc_S_serial_40011000_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_40011000_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_40011000_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_parity "none" -#define DT_N_S_soc_S_serial_40011000_P_parity_STRING_UNQUOTED none -#define DT_N_S_soc_S_serial_40011000_P_parity_STRING_TOKEN none -#define DT_N_S_soc_S_serial_40011000_P_parity_STRING_UPPER_TOKEN NONE -#define DT_N_S_soc_S_serial_40011000_P_parity_IDX_0 "none" -#define DT_N_S_soc_S_serial_40011000_P_parity_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_parity_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_serial_40011000_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, parity, 0) -#define DT_N_S_soc_S_serial_40011000_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, parity, 0) -#define DT_N_S_soc_S_serial_40011000_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_parity_LEN 1 -#define DT_N_S_soc_S_serial_40011000_P_parity_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_status "okay" -#define DT_N_S_soc_S_serial_40011000_P_status_STRING_UNQUOTED okay -#define DT_N_S_soc_S_serial_40011000_P_status_STRING_TOKEN okay -#define DT_N_S_soc_S_serial_40011000_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0 "okay" -#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, status, 0) -#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, status, 0) -#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_status_LEN 1 -#define DT_N_S_soc_S_serial_40011000_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_compatible {"st,stm32-usart", "st,stm32-uart"} -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0 "st,stm32-usart" -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1 "st,stm32-uart" -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, compatible, 0) \ - fn(DT_N_S_soc_S_serial_40011000, compatible, 1) -#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011000, compatible, 1) -#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40011000, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011000, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011000_P_compatible_LEN 2 -#define DT_N_S_soc_S_serial_40011000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_40011000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_40011000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_40011000_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_tx_invert 0 -#define DT_N_S_soc_S_serial_40011000_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40011000_P_rx_invert 0 -#define DT_N_S_soc_S_serial_40011000_P_rx_invert_EXISTS 1 - -/* - * Devicetree node: /soc/pin-controller@58020000/usart6_rx_pg9 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9 - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_PATH "/soc/pin-controller@58020000/usart6_rx_pg9" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FULL_NAME "usart6_rx_pg9" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FULL_NAME_UNQUOTED usart6_rx_pg9 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FULL_NAME_TOKEN usart6_rx_pg9 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FULL_NAME_UPPER_TOKEN USART6_RX_PG9 - -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_PARENT DT_N_S_soc_S_pin_controller_58020000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_CHILD_IDX 81 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_NODELABEL(fn) fn(usart6_rx_pg9) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart6_rx_pg9, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_HASH vugbeUMqGPNrO7KiPxiSq__yTXochiVyFMRQ4EMk_Hk - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_ORD 46 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_ORD_STR_SORTABLE 00046 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_REQUIRES_ORDS \ - 11, + 44, \ + 45, \ + 46, \ + 47, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_SUPPORTS_ORDS \ - 48, +#define DT_N_S_soc_S_adc_40022000_SUPPORTS_ORDS \ + 103, \ + 162, \ + 163, \ + 164, \ + 165, \ + 166, \ + 167, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_EXISTS 1 -#define DT_N_NODELABEL_usart6_rx_pg9 DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9 +#define DT_N_S_soc_S_adc_40022000_EXISTS 1 +#define DT_N_INST_0_st_stm32_adc DT_N_S_soc_S_adc_40022000 +#define DT_N_NODELABEL_adc1 DT_N_S_soc_S_adc_40022000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_STATUS_okay 1 +#define DT_N_S_soc_S_adc_40022000_REG_NUM 1 +#define DT_N_S_soc_S_adc_40022000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_REG_IDX_0_VAL_ADDRESS 1073881088 +#define DT_N_S_soc_S_adc_40022000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_adc_40022000_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_40022000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_40022000_IRQ_NUM 1 +#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_VAL_irq 18 +#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_adc_40022000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_adc_40022000_COMPAT_MATCHES_st_stm32_adc 1 +#define DT_N_S_soc_S_adc_40022000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_adc_40022000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_COMPAT_MODEL_IDX_0 "stm32-adc" +#define DT_N_S_soc_S_adc_40022000_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_PINCTRL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_PINCTRL_NUM 1 +#define DT_N_S_soc_S_adc_40022000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_adc_40022000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_adc_40022000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_adc_40022000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2 +#define DT_N_S_soc_S_adc_40022000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3 +#define DT_N_S_soc_S_adc_40022000_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4 +#define DT_N_S_soc_S_adc_40022000_PINCTRL_NAME_default_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6 +#define DT_N_S_soc_S_adc_40022000_PINCTRL_NAME_default_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c +#define DT_N_S_soc_S_adc_40022000_PINCTRL_NAME_default_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_pinmux 3367 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_reg {1073881088, 1024} +#define DT_N_S_soc_S_adc_40022000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_reg_IDX_0 1073881088 +#define DT_N_S_soc_S_adc_40022000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_adc_40022000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_VAL_bus 216 +#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_VAL_bits 32 +#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, clocks, 0) +#define DT_N_S_soc_S_adc_40022000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, clocks, 0) +#define DT_N_S_soc_S_adc_40022000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_clocks_LEN 1 +#define DT_N_S_soc_S_adc_40022000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_interrupts {18, 0} +#define DT_N_S_soc_S_adc_40022000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_interrupts_IDX_0 18 +#define DT_N_S_soc_S_adc_40022000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_adc_40022000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source "SYNC" +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_STRING_UNQUOTED SYNC +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_STRING_TOKEN SYNC +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_STRING_UPPER_TOKEN SYNC +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_IDX_0 "SYNC" +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_IDX_0_ENUM_VAL_SYNC_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, st_adc_clock_source, 0) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, st_adc_clock_source, 0) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, st_adc_clock_source, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, st_adc_clock_source, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_LEN 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_clock_source_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_prescaler 4 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_prescaler_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_prescaler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_prescaler_IDX_0_ENUM_VAL_4_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_prescaler_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_vref_mv 3300 +#define DT_N_S_soc_S_adc_40022000_P_vref_mv_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_resolutions {8446476, 7725580, 6742540, 5497356, 4710924} +#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_0 8446476 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_1 7725580 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_2 6742540 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_3 5497356 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_4 4710924 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, resolutions, 0) \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 1) \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 2) \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 3) \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 4) +#define DT_N_S_soc_S_adc_40022000_P_resolutions_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, resolutions, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 4) +#define DT_N_S_soc_S_adc_40022000_P_resolutions_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, resolutions, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 4, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_resolutions_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, resolutions, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, resolutions, 4, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_resolutions_LEN 5 +#define DT_N_S_soc_S_adc_40022000_P_resolutions_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times {2, 3, 9, 17, 33, 65, 388, 811} +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_0 2 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_1 3 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_2 9 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_3 17 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_4 33 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_5 65 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_6 388 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_7 811 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, sampling_times, 0) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 1) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 2) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 3) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 4) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 5) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 6) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 7) +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, sampling_times, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 7) +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, sampling_times, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 7, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, sampling_times, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, sampling_times, 7, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_LEN 8 +#define DT_N_S_soc_S_adc_40022000_P_sampling_times_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer "FULLY_CONFIGURABLE" +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_STRING_UNQUOTED FULLY_CONFIGURABLE +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_STRING_TOKEN FULLY_CONFIGURABLE +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_STRING_UPPER_TOKEN FULLY_CONFIGURABLE +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_IDX_0 "FULLY_CONFIGURABLE" +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_IDX_0_ENUM_VAL_FULLY_CONFIGURABLE_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, st_adc_sequencer, 0) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, st_adc_sequencer, 0) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, st_adc_sequencer, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, st_adc_sequencer, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_LEN 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler "OVERSAMPLER_EXTENDED" +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_STRING_UNQUOTED OVERSAMPLER_EXTENDED +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_STRING_TOKEN OVERSAMPLER_EXTENDED +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_STRING_UPPER_TOKEN OVERSAMPLER_EXTENDED +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_IDX_0 "OVERSAMPLER_EXTENDED" +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_IDX_0_ENUM_VAL_OVERSAMPLER_EXTENDED_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, st_adc_oversampler, 0) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, st_adc_oversampler, 0) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, st_adc_oversampler, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, st_adc_oversampler, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_LEN 1 +#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_status "okay" +#define DT_N_S_soc_S_adc_40022000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_adc_40022000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_adc_40022000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_adc_40022000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_adc_40022000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_40022000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, status, 0) +#define DT_N_S_soc_S_adc_40022000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, status, 0) +#define DT_N_S_soc_S_adc_40022000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_status_LEN 1 +#define DT_N_S_soc_S_adc_40022000_P_status_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_compatible {"st,stm32-adc"} +#define DT_N_S_soc_S_adc_40022000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_compatible_IDX_0 "st,stm32-adc" +#define DT_N_S_soc_S_adc_40022000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-adc +#define DT_N_S_soc_S_adc_40022000_P_compatible_IDX_0_STRING_TOKEN st_stm32_adc +#define DT_N_S_soc_S_adc_40022000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_ADC +#define DT_N_S_soc_S_adc_40022000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, compatible, 0) +#define DT_N_S_soc_S_adc_40022000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, compatible, 0) +#define DT_N_S_soc_S_adc_40022000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_compatible_LEN 1 +#define DT_N_S_soc_S_adc_40022000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_adc_40022000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_wakeup_source 0 +#define DT_N_S_soc_S_adc_40022000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_adc_40022000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_3 DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_4 DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_5 DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 1) \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 2) \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 3) \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 4) \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 5) +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 5) +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 5, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022000, pinctrl_0, 5, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_LEN 6 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, pinctrl_names, 0) +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, pinctrl_names, 0) +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_adc_40022000_P_pinctrl_names_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usart6_tx_pg14 + * Devicetree node: /soc/pin-controller@58020000/uart4_rx_pi9 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_PATH "/soc/pin-controller@58020000/usart6_tx_pg14" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PATH "/soc/pin-controller@58020000/uart4_rx_pi9" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FULL_NAME "usart6_tx_pg14" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FULL_NAME_UNQUOTED usart6_tx_pg14 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FULL_NAME_TOKEN usart6_tx_pg14 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FULL_NAME_UPPER_TOKEN USART6_TX_PG14 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FULL_NAME "uart4_rx_pi9" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FULL_NAME_UNQUOTED uart4_rx_pi9 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FULL_NAME_TOKEN uart4_rx_pi9 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FULL_NAME_UPPER_TOKEN UART4_RX_PI9 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_CHILD_IDX 86 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_IDX 106 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_NODELABEL(fn) fn(usart6_tx_pg14) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart6_tx_pg14, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_NODELABEL(fn) fn(uart4_rx_pi9) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4_rx_pi9, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_HASH zJ31obkOPfwheCyxR5RTWj_XAUnLw5Wo8QRVOwO4sWI +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_HASH 7J9Jc2B8XDob8o3IXrNs4I_2HL1MlkmTsrrBqfOPpV8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_ORD 47 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_ORD_STR_SORTABLE 00047 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_ORD 49 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_ORD_STR_SORTABLE 00049 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_SUPPORTS_ORDS \ - 48, +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_SUPPORTS_ORDS \ + 52, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_EXISTS 1 -#define DT_N_NODELABEL_usart6_tx_pg14 DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_EXISTS 1 +#define DT_N_NODELABEL_uart4_rx_pi9 DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_pinmux 3527 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_pinmux 4392 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/serial@40011400 - * - * Node identifier: DT_N_S_soc_S_serial_40011400 + * Devicetree node: /soc/pin-controller@58020000/uart4_tx_pa0 * - * Binding (compatible = st,stm32-usart): - * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_serial_40011400_PATH "/soc/serial@40011400" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_PATH "/soc/pin-controller@58020000/uart4_tx_pa0" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_40011400_FULL_NAME "serial@40011400" -#define DT_N_S_soc_S_serial_40011400_FULL_NAME_UNQUOTED serial@40011400 -#define DT_N_S_soc_S_serial_40011400_FULL_NAME_TOKEN serial_40011400 -#define DT_N_S_soc_S_serial_40011400_FULL_NAME_UPPER_TOKEN SERIAL_40011400 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FULL_NAME "uart4_tx_pa0" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FULL_NAME_UNQUOTED uart4_tx_pa0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FULL_NAME_TOKEN uart4_tx_pa0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FULL_NAME_UPPER_TOKEN UART4_TX_PA0 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_40011400_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_40011400_CHILD_IDX 13 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_CHILD_IDX 111 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_40011400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_serial_40011400_FOREACH_NODELABEL(fn) fn(usart6) -#define DT_N_S_soc_S_serial_40011400_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart6, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_NODELABEL(fn) fn(uart4_tx_pa0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4_tx_pa0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_40011400_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_40011400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_serial_40011400_HASH EbGeH803dfT68JE63jG_Jb4zq9uTggwiK7WnQWx1toQ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_HASH 5KHYJl7kLMxcRucQl_rbMS_XYlsEePc38TIxa05kPls /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40011400_ORD 48 -#define DT_N_S_soc_S_serial_40011400_ORD_STR_SORTABLE 00048 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_ORD 50 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_ORD_STR_SORTABLE 00050 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_40011400_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 41, \ - 46, \ - 47, +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_40011400_SUPPORTS_ORDS \ - 69, +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_SUPPORTS_ORDS \ + 52, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_40011400_EXISTS 1 -#define DT_N_INST_1_st_stm32_usart DT_N_S_soc_S_serial_40011400 -#define DT_N_INST_2_st_stm32_uart DT_N_S_soc_S_serial_40011400 -#define DT_N_NODELABEL_usart6 DT_N_S_soc_S_serial_40011400 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_EXISTS 1 +#define DT_N_NODELABEL_uart4_tx_pa0 DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_40011400_REG_NUM 1 -#define DT_N_S_soc_S_serial_40011400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_REG_IDX_0_VAL_ADDRESS 1073812480 -#define DT_N_S_soc_S_serial_40011400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_serial_40011400_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_40011400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_40011400_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_VAL_irq 71 -#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_40011400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_40011400_COMPAT_MATCHES_st_stm32_usart 1 -#define DT_N_S_soc_S_serial_40011400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40011400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_COMPAT_MODEL_IDX_0 "stm32-usart" -#define DT_N_S_soc_S_serial_40011400_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_40011400_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40011400_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_COMPAT_MODEL_IDX_1 "stm32-uart" -#define DT_N_S_soc_S_serial_40011400_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_40011400_PINCTRL_NUM 1 -#define DT_N_S_soc_S_serial_40011400_PINCTRL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_PINCTRL_IDX_0_TOKEN default -#define DT_N_S_soc_S_serial_40011400_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40011400_PINCTRL_NAME_default_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_PINCTRL_NAME_default_IDX 0 -#define DT_N_S_soc_S_serial_40011400_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14 -#define DT_N_S_soc_S_serial_40011400_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_serial_40011400_P_reg {1073812480, 1024} -#define DT_N_S_soc_S_serial_40011400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_reg_IDX_0 1073812480 -#define DT_N_S_soc_S_serial_40011400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_40011400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_VAL_bus 240 -#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_VAL_bits 32 -#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, clocks, 0) -#define DT_N_S_soc_S_serial_40011400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, clocks, 0) -#define DT_N_S_soc_S_serial_40011400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_40011400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_40011400_P_resets_IDX_0_VAL_id 4869 -#define DT_N_S_soc_S_serial_40011400_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, resets, 0) -#define DT_N_S_soc_S_serial_40011400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, resets, 0) -#define DT_N_S_soc_S_serial_40011400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_40011400_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_interrupts {71, 0} -#define DT_N_S_soc_S_serial_40011400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_interrupts_IDX_0 71 -#define DT_N_S_soc_S_serial_40011400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_40011400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_current_speed 115200 -#define DT_N_S_soc_S_serial_40011400_P_current_speed_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_stop_bits "1" -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_STRING_UNQUOTED 1 -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_STRING_TOKEN 1 -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_STRING_UPPER_TOKEN 1 -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_IDX_0 "1" -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, stop_bits, 0) -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, stop_bits, 0) -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_LEN 1 -#define DT_N_S_soc_S_serial_40011400_P_stop_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_data_bits 8 -#define DT_N_S_soc_S_serial_40011400_P_data_bits_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_serial_40011400_P_data_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_data_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_single_wire 0 -#define DT_N_S_soc_S_serial_40011400_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_40011400_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 0) \ - fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_LEN 2 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names {"default"} -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_IDX_0 "default" -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_IDX_0_STRING_UNQUOTED default -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_IDX_0_STRING_TOKEN default -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_LEN 1 -#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_de_enable 0 -#define DT_N_S_soc_S_serial_40011400_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_40011400_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_40011400_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_de_invert 0 -#define DT_N_S_soc_S_serial_40011400_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_40011400_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_40011400_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_parity "none" -#define DT_N_S_soc_S_serial_40011400_P_parity_STRING_UNQUOTED none -#define DT_N_S_soc_S_serial_40011400_P_parity_STRING_TOKEN none -#define DT_N_S_soc_S_serial_40011400_P_parity_STRING_UPPER_TOKEN NONE -#define DT_N_S_soc_S_serial_40011400_P_parity_IDX_0 "none" -#define DT_N_S_soc_S_serial_40011400_P_parity_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_parity_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_serial_40011400_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, parity, 0) -#define DT_N_S_soc_S_serial_40011400_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, parity, 0) -#define DT_N_S_soc_S_serial_40011400_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_parity_LEN 1 -#define DT_N_S_soc_S_serial_40011400_P_parity_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_status "okay" -#define DT_N_S_soc_S_serial_40011400_P_status_STRING_UNQUOTED okay -#define DT_N_S_soc_S_serial_40011400_P_status_STRING_TOKEN okay -#define DT_N_S_soc_S_serial_40011400_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_serial_40011400_P_status_IDX_0 "okay" -#define DT_N_S_soc_S_serial_40011400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40011400_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, status, 0) -#define DT_N_S_soc_S_serial_40011400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, status, 0) -#define DT_N_S_soc_S_serial_40011400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_status_LEN 1 -#define DT_N_S_soc_S_serial_40011400_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_compatible {"st,stm32-usart", "st,stm32-uart"} -#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_0 "st,stm32-usart" -#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart -#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart -#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART -#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_1 "st,stm32-uart" -#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_40011400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, compatible, 0) \ - fn(DT_N_S_soc_S_serial_40011400, compatible, 1) -#define DT_N_S_soc_S_serial_40011400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011400, compatible, 1) -#define DT_N_S_soc_S_serial_40011400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40011400, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40011400, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40011400_P_compatible_LEN 2 -#define DT_N_S_soc_S_serial_40011400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_40011400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_40011400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_40011400_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_tx_invert 0 -#define DT_N_S_soc_S_serial_40011400_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40011400_P_rx_invert 0 -#define DT_N_S_soc_S_serial_40011400_P_rx_invert_EXISTS 1 - -/* - * Devicetree node: /soc/pin-controller@58020000/gpio@58020000 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 - * - * Binding (compatible = st,stm32-gpio): - * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_PATH "/soc/pin-controller@58020000/gpio@58020000" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FULL_NAME "gpio@58020000" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FULL_NAME_UNQUOTED gpio@58020000 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FULL_NAME_TOKEN gpio_58020000 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FULL_NAME_UPPER_TOKEN GPIO_58020000 - -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_PARENT DT_N_S_soc_S_pin_controller_58020000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_CHILD_IDX 0 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_NODELABEL(fn) fn(gpioa) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioa, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_HASH OBFcV8E53vVYjjpiQJPQ0zMy2lJusA_kZ4LEcg7da5M - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_ORD 49 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_ORD_STR_SORTABLE 00049 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REQUIRES_ORDS \ - 8, \ - 11, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_SUPPORTS_ORDS \ - 69, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_EXISTS 1 -#define DT_N_INST_0_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 -#define DT_N_NODELABEL_gpioa DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REG_IDX_0_VAL_ADDRESS 1476526080 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_COMPAT_MATCHES_st_stm32_gpio 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_COMPAT_MODEL_IDX_0 "stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg {1476526080, 1024} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg_IDX_0 1476526080 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_VAL_bits 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_ngpios 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_ngpios_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_gpio_controller 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_gpio_controller_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible {"st,stm32-gpio"} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_IDX_0 "st,stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_pinmux 8 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/gpio@58020800 + * Devicetree node: /soc/rcc@58024400/reset-controller * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 + * Node identifier: DT_N_S_soc_S_rcc_58024400_S_reset_controller * - * Binding (compatible = st,stm32-gpio): - * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * Binding (compatible = st,stm32-rcc-rctl): + * $ZEPHYR_BASE/dts/bindings/reset/st,stm32-rcc-rctl.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_PATH "/soc/pin-controller@58020000/gpio@58020800" +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_PATH "/soc/rcc@58024400/reset-controller" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FULL_NAME "gpio@58020800" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FULL_NAME_UNQUOTED gpio@58020800 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FULL_NAME_TOKEN gpio_58020800 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FULL_NAME_UPPER_TOKEN GPIO_58020800 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FULL_NAME "reset-controller" +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FULL_NAME_UNQUOTED reset-controller +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FULL_NAME_TOKEN reset_controller +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FULL_NAME_UPPER_TOKEN RESET_CONTROLLER -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc/rcc@58024400) identifier: */ +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_PARENT DT_N_S_soc_S_rcc_58024400 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_CHILD_IDX 2 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_NODELABEL(fn) fn(gpioc) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioc, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_NODELABEL_NUM 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_NODELABEL(fn) fn(rctl) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_NODELABEL_VARGS(fn, ...) fn(rctl, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_CHILD_NUM 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_HASH kNEdHt4SOX4X8Z1vJWdCf5cNdeBmryoZhM2ULDMOaxs +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_HASH WR_z9K_wDQyMuNanKB94ZdUTcpHW3IEtIU4TiSkvN3o /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_ORD 50 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_ORD_STR_SORTABLE 00050 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_ORD 51 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_ORD_STR_SORTABLE 00051 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REQUIRES_ORDS \ - 8, \ - 11, +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_REQUIRES_ORDS \ + 8, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_SUPPORTS_ORDS \ - 69, +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_SUPPORTS_ORDS \ + 52, \ + 55, \ + 58, \ + 72, \ + 76, \ + 79, \ + 83, \ + 130, \ + 133, \ + 142, \ + 143, \ + 144, \ + 145, \ + 146, \ + 149, \ + 150, \ + 265, \ + 279, \ + 283, \ + 286, \ + 289, \ + 291, \ + 294, \ + 297, \ + 301, \ + 304, \ + 307, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_EXISTS 1 -#define DT_N_INST_2_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 -#define DT_N_NODELABEL_gpioc DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_EXISTS 1 +#define DT_N_INST_0_st_stm32_rcc_rctl DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_NODELABEL_rctl DT_N_S_soc_S_rcc_58024400_S_reset_controller /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REG_IDX_0_VAL_ADDRESS 1476528128 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_COMPAT_MATCHES_st_stm32_gpio 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_COMPAT_MODEL_IDX_0 "stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_STATUS_okay 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_REG_NUM 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_RANGES_NUM 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_IRQ_NUM 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_IRQ_LEVEL 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_COMPAT_MATCHES_st_stm32_rcc_rctl 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_COMPAT_MODEL_IDX_0 "stm32-rcc-rctl" +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_PINCTRL_NUM 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg {1476528128, 1024} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg_IDX_0 1476528128 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_VAL_bits 4 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_ngpios 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_ngpios_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_gpio_controller 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_gpio_controller_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible {"st,stm32-gpio"} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_IDX_0 "st,stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_set_bit_to_deassert 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_set_bit_to_deassert_EXISTS 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible {"st,stm32-rcc-rctl"} +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_IDX_0 "st,stm32-rcc-rctl" +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-rcc-rctl +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_IDX_0_STRING_TOKEN st_stm32_rcc_rctl +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_RCC_RCTL +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, compatible, 0) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, compatible, 0) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_LEN 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_wakeup_source 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_rcc_58024400_S_reset_controller_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/gpio@58021800 + * Devicetree node: /soc/serial@40004c00 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 + * Node identifier: DT_N_S_soc_S_serial_40004c00 * - * Binding (compatible = st,stm32-gpio): - * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * Binding (compatible = st,stm32-uart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-uart.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_PATH "/soc/pin-controller@58020000/gpio@58021800" +#define DT_N_S_soc_S_serial_40004c00_PATH "/soc/serial@40004c00" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FULL_NAME "gpio@58021800" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FULL_NAME_UNQUOTED gpio@58021800 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FULL_NAME_TOKEN gpio_58021800 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FULL_NAME_UPPER_TOKEN GPIO_58021800 +#define DT_N_S_soc_S_serial_40004c00_FULL_NAME "serial@40004c00" +#define DT_N_S_soc_S_serial_40004c00_FULL_NAME_UNQUOTED serial@40004c00 +#define DT_N_S_soc_S_serial_40004c00_FULL_NAME_TOKEN serial_40004c00 +#define DT_N_S_soc_S_serial_40004c00_FULL_NAME_UPPER_TOKEN SERIAL_40004C00 -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40004c00_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_CHILD_IDX 6 +#define DT_N_S_soc_S_serial_40004c00_CHILD_IDX 11 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_NODELABEL(fn) fn(gpiog) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiog, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_serial_40004c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_FOREACH_NODELABEL(fn) fn(uart4) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart4, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40004c00_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40004c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_HASH WMh7Jx9L0cqz8vSetlrt_gCmYQ3gZUCzp4QopsOPnPw +#define DT_N_S_soc_S_serial_40004c00_HASH qw6sySCqGO4wCPwXm_EFlFNv1NqVYdGrZFXhKaRqK7U /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD 51 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD_STR_SORTABLE 00051 +#define DT_N_S_soc_S_serial_40004c00_ORD 52 +#define DT_N_S_soc_S_serial_40004c00_ORD_STR_SORTABLE 00052 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REQUIRES_ORDS \ +#define DT_N_S_soc_S_serial_40004c00_REQUIRES_ORDS \ + 3, \ + 4, \ 8, \ - 11, + 49, \ + 50, \ + 51, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_SUPPORTS_ORDS \ - 69, +#define DT_N_S_soc_S_serial_40004c00_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_EXISTS 1 -#define DT_N_INST_6_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 -#define DT_N_NODELABEL_gpiog DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 +#define DT_N_S_soc_S_serial_40004c00_EXISTS 1 +#define DT_N_INST_1_st_stm32_uart DT_N_S_soc_S_serial_40004c00 +#define DT_N_NODELABEL_uart4 DT_N_S_soc_S_serial_40004c00 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REG_IDX_0_VAL_ADDRESS 1476532224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_COMPAT_MATCHES_st_stm32_gpio 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_COMPAT_MODEL_IDX_0 "stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_STATUS_okay 1 +#define DT_N_S_soc_S_serial_40004c00_REG_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_VAL_ADDRESS 1073761280 +#define DT_N_S_soc_S_serial_40004c00_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_serial_40004c00_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40004c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40004c00_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_irq 52 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40004c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_COMPAT_MODEL_IDX_0 "stm32-uart" +#define DT_N_S_soc_S_serial_40004c00_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_PINCTRL_NUM 0 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NUM 1 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0 +#define DT_N_S_soc_S_serial_40004c00_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg {1476532224, 1024} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg_IDX_0 1476532224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_VAL_bits 64 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_ngpios 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_ngpios_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_gpio_controller 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_gpio_controller_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible {"st,stm32-gpio"} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_IDX_0 "st,stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_reg {1073761280, 1024} +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_0 1073761280 +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40004c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bits 524288 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_VAL_id 4627 +#define DT_N_S_soc_S_serial_40004c00_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, resets, 0) +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, resets, 0) +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts {52, 0} +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_0 52 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40004c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40004c00_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits 8 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_single_wire 0 +#define DT_N_S_soc_S_serial_40004c00_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40004c00_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004c00, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_enable 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_de_invert 0 +#define DT_N_S_soc_S_serial_40004c00_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40004c00_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40004c00_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_parity "none" +#define DT_N_S_soc_S_serial_40004c00_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40004c00_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40004c00_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40004c00_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, parity, 0) +#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, parity, 0) +#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_status "okay" +#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_serial_40004c00_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, status, 0) +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, status, 0) +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_compatible {"st,stm32-uart"} +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40004c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004c00_P_compatible_LEN 1 +#define DT_N_S_soc_S_serial_40004c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40004c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40004c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40004c00_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004c00_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40004c00_P_rx_invert_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/gpio@58022000 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 + * Devicetree node: /soc/pin-controller@58020000/usart1_rx_pa10 * - * Binding (compatible = st,stm32-gpio): - * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_PATH "/soc/pin-controller@58020000/gpio@58022000" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_PATH "/soc/pin-controller@58020000/usart1_rx_pa10" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FULL_NAME "gpio@58022000" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FULL_NAME_UNQUOTED gpio@58022000 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FULL_NAME_TOKEN gpio_58022000 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FULL_NAME_UPPER_TOKEN GPIO_58022000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FULL_NAME "usart1_rx_pa10" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FULL_NAME_UNQUOTED usart1_rx_pa10 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FULL_NAME_TOKEN usart1_rx_pa10 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FULL_NAME_UPPER_TOKEN USART1_RX_PA10 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_CHILD_IDX 8 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_CHILD_IDX 105 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_NODELABEL(fn) fn(gpioi) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioi, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_NODELABEL(fn) fn(usart1_rx_pa10) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1_rx_pa10, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_HASH X5po7QCBbtJf87tGL6bS248o3JOw_xf4eQbQnfhheU4 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_HASH 8nJQ_t_C11IY_uyXFPNlsBbgvUlEL0U_ayUVN3_mthU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_ORD 52 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_ORD_STR_SORTABLE 00052 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_ORD 53 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_ORD_STR_SORTABLE 00053 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REQUIRES_ORDS \ - 8, \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_SUPPORTS_ORDS \ - 69, +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_SUPPORTS_ORDS \ + 55, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_EXISTS 1 -#define DT_N_INST_8_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 -#define DT_N_NODELABEL_gpioi DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_EXISTS 1 +#define DT_N_NODELABEL_usart1_rx_pa10 DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REG_IDX_0_VAL_ADDRESS 1476534272 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_COMPAT_MATCHES_st_stm32_gpio 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_COMPAT_MODEL_IDX_0 "stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg {1476534272, 1024} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg_IDX_0 1476534272 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_VAL_bits 256 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_ngpios 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_ngpios_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_gpio_controller 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_gpio_controller_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible {"st,stm32-gpio"} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_IDX_0 "st,stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_pinmux 327 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/gpio@58022800 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 + * Devicetree node: /soc/pin-controller@58020000/usart1_tx_pa9 * - * Binding (compatible = st,stm32-gpio): - * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_PATH "/soc/pin-controller@58020000/gpio@58022800" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PATH "/soc/pin-controller@58020000/usart1_tx_pa9" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FULL_NAME "gpio@58022800" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FULL_NAME_UNQUOTED gpio@58022800 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FULL_NAME_TOKEN gpio_58022800 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FULL_NAME_UPPER_TOKEN GPIO_58022800 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FULL_NAME "usart1_tx_pa9" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FULL_NAME_UNQUOTED usart1_tx_pa9 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FULL_NAME_TOKEN usart1_tx_pa9 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FULL_NAME_UPPER_TOKEN USART1_TX_PA9 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_CHILD_IDX 10 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_IDX 110 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_NODELABEL(fn) fn(gpiok) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiok, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_NODELABEL(fn) fn(usart1_tx_pa9) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1_tx_pa9, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_HASH kKwiRU3UgeNHAnynzom_GXwZc7W_TKis8XxviU9ivKE +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_HASH KWM2HbTThxHbFT7y5njMId6Hb6VN_CzWDzX0qSd8vAY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD 53 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD_STR_SORTABLE 00053 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_ORD 54 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_ORD_STR_SORTABLE 00054 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REQUIRES_ORDS \ - 8, \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_SUPPORTS_ORDS \ - 69, \ - 81, \ - 82, \ - 83, \ - 84, \ - 157, +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_SUPPORTS_ORDS \ + 55, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_EXISTS 1 -#define DT_N_INST_10_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 -#define DT_N_NODELABEL_gpiok DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_EXISTS 1 +#define DT_N_NODELABEL_usart1_tx_pa9 DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REG_IDX_0_VAL_ADDRESS 1476536320 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_COMPAT_MATCHES_st_stm32_gpio 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_COMPAT_MODEL_IDX_0 "stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg {1476536320, 1024} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg_IDX_0 1476536320 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_VAL_bits 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_ngpios 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_ngpios_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_gpio_controller 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_gpio_controller_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible {"st,stm32-gpio"} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_IDX_0 "st,stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_pinmux 295 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9_P_output_high_EXISTS 1 /* - * Devicetree node: /otghs_ulpis_phy + * Devicetree node: /soc/serial@40011000 * - * Node identifier: DT_N_S_otghs_ulpis_phy + * Node identifier: DT_N_S_soc_S_serial_40011000 * - * Binding (compatible = usb-ulpi-phy): - * $ZEPHYR_BASE/dts/bindings/phy/usb-ulpi-phy.yaml + * Binding (compatible = st,stm32-usart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_otghs_ulpis_phy_PATH "/otghs_ulpis_phy" +#define DT_N_S_soc_S_serial_40011000_PATH "/soc/serial@40011000" /* Node's name with unit-address: */ -#define DT_N_S_otghs_ulpis_phy_FULL_NAME "otghs_ulpis_phy" -#define DT_N_S_otghs_ulpis_phy_FULL_NAME_UNQUOTED otghs_ulpis_phy -#define DT_N_S_otghs_ulpis_phy_FULL_NAME_TOKEN otghs_ulpis_phy -#define DT_N_S_otghs_ulpis_phy_FULL_NAME_UPPER_TOKEN OTGHS_ULPIS_PHY +#define DT_N_S_soc_S_serial_40011000_FULL_NAME "serial@40011000" +#define DT_N_S_soc_S_serial_40011000_FULL_NAME_UNQUOTED serial@40011000 +#define DT_N_S_soc_S_serial_40011000_FULL_NAME_TOKEN serial_40011000 +#define DT_N_S_soc_S_serial_40011000_FULL_NAME_UPPER_TOKEN SERIAL_40011000 -/* Node parent (/) identifier: */ -#define DT_N_S_otghs_ulpis_phy_PARENT DT_N +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40011000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_otghs_ulpis_phy_CHILD_IDX 21 +#define DT_N_S_soc_S_serial_40011000_CHILD_IDX 8 /* Helpers for dealing with node labels: */ -#define DT_N_S_otghs_ulpis_phy_NODELABEL_NUM 1 -#define DT_N_S_otghs_ulpis_phy_FOREACH_NODELABEL(fn) fn(otghs_ulpi_phy) -#define DT_N_S_otghs_ulpis_phy_FOREACH_NODELABEL_VARGS(fn, ...) fn(otghs_ulpi_phy, __VA_ARGS__) -#define DT_N_S_otghs_ulpis_phy_FOREACH_ANCESTOR(fn) fn(DT_N) +#define DT_N_S_soc_S_serial_40011000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40011000_FOREACH_NODELABEL(fn) fn(usart1) +#define DT_N_S_soc_S_serial_40011000_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_otghs_ulpis_phy_CHILD_NUM 0 -#define DT_N_S_otghs_ulpis_phy_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD(fn) -#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40011000_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40011000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40011000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_otghs_ulpis_phy_HASH 8TtiUvwpO7cQW1Sp8PFxPYL0Tl8rgjoRjCXgOZZ8Rwg +#define DT_N_S_soc_S_serial_40011000_HASH zC6jA0Z9upGUbivXx_7kb5XvPKXVEdHortQpRPhSzt8 /* Node's dependency ordinal: */ -#define DT_N_S_otghs_ulpis_phy_ORD 54 -#define DT_N_S_otghs_ulpis_phy_ORD_STR_SORTABLE 00054 +#define DT_N_S_soc_S_serial_40011000_ORD 55 +#define DT_N_S_soc_S_serial_40011000_ORD_STR_SORTABLE 00055 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_otghs_ulpis_phy_REQUIRES_ORDS \ - 0, \ - 12, +#define DT_N_S_soc_S_serial_40011000_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 51, \ + 53, \ + 54, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_otghs_ulpis_phy_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_serial_40011000_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_otghs_ulpis_phy_EXISTS 1 -#define DT_N_INST_0_usb_ulpi_phy DT_N_S_otghs_ulpis_phy -#define DT_N_NODELABEL_otghs_ulpi_phy DT_N_S_otghs_ulpis_phy +#define DT_N_S_soc_S_serial_40011000_EXISTS 1 +#define DT_N_INST_0_st_stm32_usart DT_N_S_soc_S_serial_40011000 +#define DT_N_INST_0_st_stm32_uart DT_N_S_soc_S_serial_40011000 +#define DT_N_NODELABEL_usart1 DT_N_S_soc_S_serial_40011000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_otghs_ulpis_phy_REG_NUM 0 -#define DT_N_S_otghs_ulpis_phy_RANGES_NUM 0 -#define DT_N_S_otghs_ulpis_phy_FOREACH_RANGE(fn) -#define DT_N_S_otghs_ulpis_phy_IRQ_NUM 0 -#define DT_N_S_otghs_ulpis_phy_IRQ_LEVEL 0 -#define DT_N_S_otghs_ulpis_phy_COMPAT_MATCHES_usb_ulpi_phy 1 -#define DT_N_S_otghs_ulpis_phy_STATUS_okay 1 +#define DT_N_S_soc_S_serial_40011000_REG_NUM 1 +#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_VAL_ADDRESS 1073811456 +#define DT_N_S_soc_S_serial_40011000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_serial_40011000_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40011000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40011000_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_irq 37 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40011000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_MATCHES_st_stm32_usart 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_0 "stm32-usart" +#define DT_N_S_soc_S_serial_40011000_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_40011000_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_otghs_ulpis_phy_PINCTRL_NUM 0 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_NUM 1 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_serial_40011000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 +#define DT_N_S_soc_S_serial_40011000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10 /* Generic property macros: */ -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_EXISTS 1 -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_VAL_pin 4 -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_VAL_pin_EXISTS 1 -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_VAL_flags 1 -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_VAL_flags_EXISTS 1 -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_otghs_ulpis_phy, reset_gpios, 0) -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_otghs_ulpis_phy, reset_gpios, 0) -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_otghs_ulpis_phy, reset_gpios, 0, __VA_ARGS__) -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_otghs_ulpis_phy, reset_gpios, 0, __VA_ARGS__) -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_LEN 1 -#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_EXISTS 1 -#define DT_N_S_otghs_ulpis_phy_P_compatible {"usb-ulpi-phy"} -#define DT_N_S_otghs_ulpis_phy_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_otghs_ulpis_phy_P_compatible_IDX_0 "usb-ulpi-phy" -#define DT_N_S_otghs_ulpis_phy_P_compatible_IDX_0_STRING_UNQUOTED usb-ulpi-phy -#define DT_N_S_otghs_ulpis_phy_P_compatible_IDX_0_STRING_TOKEN usb_ulpi_phy -#define DT_N_S_otghs_ulpis_phy_P_compatible_IDX_0_STRING_UPPER_TOKEN USB_ULPI_PHY -#define DT_N_S_otghs_ulpis_phy_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_otghs_ulpis_phy, compatible, 0) -#define DT_N_S_otghs_ulpis_phy_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_otghs_ulpis_phy, compatible, 0) -#define DT_N_S_otghs_ulpis_phy_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_otghs_ulpis_phy, compatible, 0, __VA_ARGS__) -#define DT_N_S_otghs_ulpis_phy_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_otghs_ulpis_phy, compatible, 0, __VA_ARGS__) -#define DT_N_S_otghs_ulpis_phy_P_compatible_LEN 1 -#define DT_N_S_otghs_ulpis_phy_P_compatible_EXISTS 1 -#define DT_N_S_otghs_ulpis_phy_P_zephyr_deferred_init 0 -#define DT_N_S_otghs_ulpis_phy_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_otghs_ulpis_phy_P_wakeup_source 0 -#define DT_N_S_otghs_ulpis_phy_P_wakeup_source_EXISTS 1 -#define DT_N_S_otghs_ulpis_phy_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_otghs_ulpis_phy_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_reg {1073811456, 1024} +#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_0 1073811456 +#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40011000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bus 240 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bits 16 +#define DT_N_S_soc_S_serial_40011000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, clocks, 0) +#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, clocks, 0) +#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40011000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_VAL_id 4868 +#define DT_N_S_soc_S_serial_40011000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, resets, 0) +#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, resets, 0) +#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40011000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_interrupts {37, 0} +#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_0 37 +#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40011000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40011000_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, stop_bits, 0) +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, stop_bits, 0) +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40011000_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_data_bits 8 +#define DT_N_S_soc_S_serial_40011000_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40011000_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_single_wire 0 +#define DT_N_S_soc_S_serial_40011000_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40011000_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011000, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_serial_40011000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_de_enable 0 +#define DT_N_S_soc_S_serial_40011000_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40011000_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40011000_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_de_invert 0 +#define DT_N_S_soc_S_serial_40011000_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40011000_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40011000_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_parity "none" +#define DT_N_S_soc_S_serial_40011000_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40011000_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40011000_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40011000_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40011000_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40011000_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, parity, 0) +#define DT_N_S_soc_S_serial_40011000_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, parity, 0) +#define DT_N_S_soc_S_serial_40011000_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40011000_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_status "okay" +#define DT_N_S_soc_S_serial_40011000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_serial_40011000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_serial_40011000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40011000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, status, 0) +#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, status, 0) +#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40011000_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_compatible {"st,stm32-usart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0 "st,stm32-usart" +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40011000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011000, compatible, 0) \ + fn(DT_N_S_soc_S_serial_40011000, compatible, 1) +#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011000, compatible, 1) +#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40011000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011000_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_40011000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40011000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40011000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40011000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40011000_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40011000_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40011000_P_rx_invert_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_ck_pa5 + * Devicetree node: /soc/pin-controller@58020000/usart6_rx_pg9 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_ck_pa5" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_PATH "/soc/pin-controller@58020000/usart6_rx_pg9" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FULL_NAME "usb_otg_hs_ulpi_ck_pa5" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_ck_pa5 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FULL_NAME_TOKEN usb_otg_hs_ulpi_ck_pa5 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_CK_PA5 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FULL_NAME "usart6_rx_pg9" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FULL_NAME_UNQUOTED usart6_rx_pg9 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FULL_NAME_TOKEN usart6_rx_pg9 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FULL_NAME_UPPER_TOKEN USART6_RX_PG9 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_CHILD_IDX 90 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_CHILD_IDX 107 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_ck_pa5) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_NODELABEL(fn) fn(usart6_rx_pg9) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart6_rx_pg9, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_HASH 4kWJROAbFxHCnEz5tN1XnFUhB25VeU1tcS10Jk7PHio +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_HASH vugbeUMqGPNrO7KiPxiSq__yTXochiVyFMRQ4EMk_Hk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_ORD 55 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_ORD_STR_SORTABLE 00055 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_ORD 56 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_ORD_STR_SORTABLE 00056 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_SUPPORTS_ORDS \ + 58, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_ck_pa5 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_EXISTS 1 +#define DT_N_NODELABEL_usart6_rx_pg9 DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_pinmux 170 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_pinmux 3367 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d0_pa3 + * Devicetree node: /soc/pin-controller@58020000/usart6_tx_pg14 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d0_pa3" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_PATH "/soc/pin-controller@58020000/usart6_tx_pg14" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FULL_NAME "usb_otg_hs_ulpi_d0_pa3" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d0_pa3 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FULL_NAME_TOKEN usb_otg_hs_ulpi_d0_pa3 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D0_PA3 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FULL_NAME "usart6_tx_pg14" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FULL_NAME_UNQUOTED usart6_tx_pg14 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FULL_NAME_TOKEN usart6_tx_pg14 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FULL_NAME_UPPER_TOKEN USART6_TX_PG14 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_CHILD_IDX 89 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_CHILD_IDX 112 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d0_pa3) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_NODELABEL(fn) fn(usart6_tx_pg14) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart6_tx_pg14, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_HASH MWthDZBNt4OQY0fU_alHxqudMKndAl6p_6GgHQhYfqI +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_HASH zJ31obkOPfwheCyxR5RTWj_XAUnLw5Wo8QRVOwO4sWI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_ORD 56 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_ORD_STR_SORTABLE 00056 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_ORD 57 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_ORD_STR_SORTABLE 00057 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_SUPPORTS_ORDS \ + 58, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_d0_pa3 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_EXISTS 1 +#define DT_N_NODELABEL_usart6_tx_pg14 DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_pinmux 106 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_output_high_EXISTS 1 - -/* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d1_pb0 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0 - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d1_pb0" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FULL_NAME "usb_otg_hs_ulpi_d1_pb0" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d1_pb0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FULL_NAME_TOKEN usb_otg_hs_ulpi_d1_pb0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D1_PB0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_pinmux 3527 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14_P_output_high_EXISTS 1 -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* + * Devicetree node: /soc/serial@40011400 + * + * Node identifier: DT_N_S_soc_S_serial_40011400 + * + * Binding (compatible = st,stm32-usart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_serial_40011400_PATH "/soc/serial@40011400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_serial_40011400_FULL_NAME "serial@40011400" +#define DT_N_S_soc_S_serial_40011400_FULL_NAME_UNQUOTED serial@40011400 +#define DT_N_S_soc_S_serial_40011400_FULL_NAME_TOKEN serial_40011400 +#define DT_N_S_soc_S_serial_40011400_FULL_NAME_UPPER_TOKEN SERIAL_40011400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40011400_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_CHILD_IDX 91 +#define DT_N_S_soc_S_serial_40011400_CHILD_IDX 13 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d1_pb0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_serial_40011400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40011400_FOREACH_NODELABEL(fn) fn(usart6) +#define DT_N_S_soc_S_serial_40011400_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart6, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40011400_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40011400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40011400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_HASH wvoy7R5TzAoXTFg_Ydd3z7Q5orEqY9_DbOiRJVXa7yc +#define DT_N_S_soc_S_serial_40011400_HASH EbGeH803dfT68JE63jG_Jb4zq9uTggwiK7WnQWx1toQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_ORD 57 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_ORD_STR_SORTABLE 00057 +#define DT_N_S_soc_S_serial_40011400_ORD 58 +#define DT_N_S_soc_S_serial_40011400_ORD_STR_SORTABLE 00058 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_serial_40011400_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 51, \ + 56, \ + 57, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_serial_40011400_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_d1_pb0 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0 +#define DT_N_S_soc_S_serial_40011400_EXISTS 1 +#define DT_N_INST_1_st_stm32_usart DT_N_S_soc_S_serial_40011400 +#define DT_N_INST_2_st_stm32_uart DT_N_S_soc_S_serial_40011400 +#define DT_N_NODELABEL_usart6 DT_N_S_soc_S_serial_40011400 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_STATUS_okay 1 +#define DT_N_S_soc_S_serial_40011400_REG_NUM 1 +#define DT_N_S_soc_S_serial_40011400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_REG_IDX_0_VAL_ADDRESS 1073812480 +#define DT_N_S_soc_S_serial_40011400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_serial_40011400_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40011400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40011400_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_VAL_irq 71 +#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40011400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40011400_COMPAT_MATCHES_st_stm32_usart 1 +#define DT_N_S_soc_S_serial_40011400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40011400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_COMPAT_MODEL_IDX_0 "stm32-usart" +#define DT_N_S_soc_S_serial_40011400_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40011400_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40011400_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_40011400_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_PINCTRL_NUM 0 +#define DT_N_S_soc_S_serial_40011400_PINCTRL_NUM 1 +#define DT_N_S_soc_S_serial_40011400_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_serial_40011400_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40011400_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_serial_40011400_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14 +#define DT_N_S_soc_S_serial_40011400_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_pinmux 522 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_reg {1073812480, 1024} +#define DT_N_S_soc_S_serial_40011400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_reg_IDX_0 1073812480 +#define DT_N_S_soc_S_serial_40011400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40011400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_VAL_bus 240 +#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_VAL_bits 32 +#define DT_N_S_soc_S_serial_40011400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, clocks, 0) +#define DT_N_S_soc_S_serial_40011400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, clocks, 0) +#define DT_N_S_soc_S_serial_40011400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40011400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_40011400_P_resets_IDX_0_VAL_id 4869 +#define DT_N_S_soc_S_serial_40011400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, resets, 0) +#define DT_N_S_soc_S_serial_40011400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, resets, 0) +#define DT_N_S_soc_S_serial_40011400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40011400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_interrupts {71, 0} +#define DT_N_S_soc_S_serial_40011400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_interrupts_IDX_0 71 +#define DT_N_S_soc_S_serial_40011400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40011400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40011400_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, stop_bits, 0) +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, stop_bits, 0) +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40011400_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_data_bits 8 +#define DT_N_S_soc_S_serial_40011400_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40011400_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_single_wire 0 +#define DT_N_S_soc_S_serial_40011400_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40011400_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011400, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_serial_40011400_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_de_enable 0 +#define DT_N_S_soc_S_serial_40011400_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40011400_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40011400_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_de_invert 0 +#define DT_N_S_soc_S_serial_40011400_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40011400_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40011400_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_parity "none" +#define DT_N_S_soc_S_serial_40011400_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40011400_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40011400_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40011400_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40011400_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40011400_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, parity, 0) +#define DT_N_S_soc_S_serial_40011400_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, parity, 0) +#define DT_N_S_soc_S_serial_40011400_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40011400_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_status "okay" +#define DT_N_S_soc_S_serial_40011400_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_serial_40011400_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_serial_40011400_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_serial_40011400_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_serial_40011400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40011400_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, status, 0) +#define DT_N_S_soc_S_serial_40011400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, status, 0) +#define DT_N_S_soc_S_serial_40011400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40011400_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_compatible {"st,stm32-usart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_0 "st,stm32-usart" +#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart +#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart +#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART +#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40011400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40011400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40011400, compatible, 0) \ + fn(DT_N_S_soc_S_serial_40011400, compatible, 1) +#define DT_N_S_soc_S_serial_40011400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40011400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011400, compatible, 1) +#define DT_N_S_soc_S_serial_40011400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40011400, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40011400, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40011400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40011400, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40011400_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_40011400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40011400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40011400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40011400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40011400_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40011400_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40011400_P_rx_invert_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d2_pb1 + * Devicetree node: /soc/pin-controller@58020000/spi2_miso_pc2 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d2_pb1" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_PATH "/soc/pin-controller@58020000/spi2_miso_pc2" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FULL_NAME "usb_otg_hs_ulpi_d2_pb1" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d2_pb1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FULL_NAME_TOKEN usb_otg_hs_ulpi_d2_pb1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D2_PB1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FULL_NAME "spi2_miso_pc2" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FULL_NAME_UNQUOTED spi2_miso_pc2 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FULL_NAME_TOKEN spi2_miso_pc2 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FULL_NAME_UPPER_TOKEN SPI2_MISO_PC2 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_CHILD_IDX 92 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_CHILD_IDX 92 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d2_pb1) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_NODELABEL(fn) fn(spi2_miso_pc2) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_miso_pc2, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_HASH 6h5x_BFUHQsxlvGoKsBKYzDUEsogMuli1RUcDDpewOY +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_HASH xjJq_tc5sj6pxzlCnAPJHDwhLAGljiJhi23kupcMZAY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_ORD 58 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_ORD_STR_SORTABLE 00058 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_ORD 59 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_ORD_STR_SORTABLE 00059 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_SUPPORTS_ORDS \ + 62, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_d2_pb1 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_EXISTS 1 +#define DT_N_NODELABEL_spi2_miso_pc2 DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_pinmux 554 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_pinmux 1093 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d3_pb10 + * Devicetree node: /soc/pin-controller@58020000/spi2_mosi_pc3 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d3_pb10" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_PATH "/soc/pin-controller@58020000/spi2_mosi_pc3" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FULL_NAME "usb_otg_hs_ulpi_d3_pb10" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d3_pb10 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FULL_NAME_TOKEN usb_otg_hs_ulpi_d3_pb10 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D3_PB10 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FULL_NAME "spi2_mosi_pc3" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FULL_NAME_UNQUOTED spi2_mosi_pc3 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FULL_NAME_TOKEN spi2_mosi_pc3 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FULL_NAME_UPPER_TOKEN SPI2_MOSI_PC3 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_CHILD_IDX 94 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_CHILD_IDX 93 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d3_pb10) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_NODELABEL(fn) fn(spi2_mosi_pc3) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_mosi_pc3, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_HASH MgT0Mb_CzDgmSvcS9aPeFElSSg_Yn14AYvZ7nRfANlE +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_HASH dTAA_uzsDwCLkvZzHWaYbSrrBhSAJ3kfwF1u15lilg8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_ORD 59 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_ORD_STR_SORTABLE 00059 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_ORD 60 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_ORD_STR_SORTABLE 00060 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_SUPPORTS_ORDS \ + 62, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_d3_pb10 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_EXISTS 1 +#define DT_N_NODELABEL_spi2_mosi_pc3 DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_pinmux 842 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_pinmux 1125 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d4_pb11 + * Devicetree node: /soc/pin-controller@58020000/spi2_sck_pi1 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d4_pb11" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_PATH "/soc/pin-controller@58020000/spi2_sck_pi1" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FULL_NAME "usb_otg_hs_ulpi_d4_pb11" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d4_pb11 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FULL_NAME_TOKEN usb_otg_hs_ulpi_d4_pb11 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D4_PB11 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FULL_NAME "spi2_sck_pi1" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FULL_NAME_UNQUOTED spi2_sck_pi1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FULL_NAME_TOKEN spi2_sck_pi1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FULL_NAME_UPPER_TOKEN SPI2_SCK_PI1 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_CHILD_IDX 95 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_CHILD_IDX 94 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d4_pb11) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_NODELABEL(fn) fn(spi2_sck_pi1) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_sck_pi1, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_HASH jcR4wtkzg22J06hkPXLpaoXx3Uc4rnZ5tNF_BfHmymc +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_HASH ppgAVqg7K_IdEp_Te6VKDzlbs_KOy624bSJ_V1uWADw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_ORD 60 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_ORD_STR_SORTABLE 00060 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_ORD 61 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_ORD_STR_SORTABLE 00061 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_SUPPORTS_ORDS \ + 62, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_d4_pb11 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_EXISTS 1 +#define DT_N_NODELABEL_spi2_sck_pi1 DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_pinmux 874 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_pinmux 4133 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_pull_down 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d5_pb12 + * Devicetree node: /soc/spi@40003800 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12 + * Node identifier: DT_N_S_soc_S_spi_40003800 + * + * Binding (compatible = st,stm32h7-spi): + * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d5_pb12" +#define DT_N_S_soc_S_spi_40003800_PATH "/soc/spi@40003800" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FULL_NAME "usb_otg_hs_ulpi_d5_pb12" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d5_pb12 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FULL_NAME_TOKEN usb_otg_hs_ulpi_d5_pb12 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D5_PB12 +#define DT_N_S_soc_S_spi_40003800_FULL_NAME "spi@40003800" +#define DT_N_S_soc_S_spi_40003800_FULL_NAME_UNQUOTED spi@40003800 +#define DT_N_S_soc_S_spi_40003800_FULL_NAME_TOKEN spi_40003800 +#define DT_N_S_soc_S_spi_40003800_FULL_NAME_UPPER_TOKEN SPI_40003800 -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_spi_40003800_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_CHILD_IDX 96 +#define DT_N_S_soc_S_spi_40003800_CHILD_IDX 23 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d5_pb12) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_spi_40003800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_spi_40003800_FOREACH_NODELABEL(fn) fn(spi2) +#define DT_N_S_soc_S_spi_40003800_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40003800_CHILD_NUM 0 +#define DT_N_S_soc_S_spi_40003800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_HASH WSenYYgswfRX8otGOfN6Hz6OC_pJUeyIJCnpnhokEDo +#define DT_N_S_soc_S_spi_40003800_HASH XKwnj_54XNd9o8CRTIG33G9j_T58zD9aWx_JOqtlec4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_ORD 61 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_ORD_STR_SORTABLE 00061 +#define DT_N_S_soc_S_spi_40003800_ORD 62 +#define DT_N_S_soc_S_spi_40003800_ORD_STR_SORTABLE 00062 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_spi_40003800_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 59, \ + 60, \ + 61, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_spi_40003800_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_d5_pb12 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12 +#define DT_N_S_soc_S_spi_40003800_EXISTS 1 +#define DT_N_INST_0_st_stm32h7_spi DT_N_S_soc_S_spi_40003800 +#define DT_N_INST_0_st_stm32_spi_fifo DT_N_S_soc_S_spi_40003800 +#define DT_N_INST_0_st_stm32_spi DT_N_S_soc_S_spi_40003800 +#define DT_N_NODELABEL_spi2 DT_N_S_soc_S_spi_40003800 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_STATUS_okay 1 +#define DT_N_S_soc_S_spi_40003800_REG_NUM 1 +#define DT_N_S_soc_S_spi_40003800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_REG_IDX_0_VAL_ADDRESS 1073756160 +#define DT_N_S_soc_S_spi_40003800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_spi_40003800_RANGES_NUM 0 +#define DT_N_S_soc_S_spi_40003800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_spi_40003800_IRQ_NUM 1 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_irq 36 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_spi_40003800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_MATCHES_st_stm32h7_spi 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_0 "stm32h7-spi" +#define DT_N_S_soc_S_spi_40003800_COMPAT_MATCHES_st_stm32_spi_fifo 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40003800_COMPAT_MATCHES_st_stm32_spi 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_2 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_2 "stm32-spi" +#define DT_N_S_soc_S_spi_40003800_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_PINCTRL_NUM 0 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NUM 1 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_spi_40003800_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2 +#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_pinmux 906 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_midi_clock 0 +#define DT_N_S_soc_S_spi_40003800_P_midi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_mssi_clock 0 +#define DT_N_S_soc_S_spi_40003800_P_mssi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_fifo_enable 0 +#define DT_N_S_soc_S_spi_40003800_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_reg {1073756160, 1024} +#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_0 1073756160 +#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_spi_40003800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_interrupts {36, 0} +#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_0 36 +#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_spi_40003800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1) \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_LEN 3 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_status "okay" +#define DT_N_S_soc_S_spi_40003800_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_spi_40003800_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_spi_40003800_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, status, 0) +#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, status, 0) +#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_status_LEN 1 +#define DT_N_S_soc_S_spi_40003800_P_status_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0 "st,stm32h7-spi" +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1 "st,stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_2 "st,stm32-spi" +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi +#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI +#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, compatible, 0) \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 1) \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 2) +#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 2) +#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_compatible_LEN 3 +#define DT_N_S_soc_S_spi_40003800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bits 16384 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_VAL_bits 30146640 +#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, clocks, 0) \ + fn(DT_N_S_soc_S_spi_40003800, clocks, 1) +#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, clocks, 1) +#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003800_P_clocks_LEN 2 +#define DT_N_S_soc_S_spi_40003800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_spi_40003800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_wakeup_source 0 +#define DT_N_S_soc_S_spi_40003800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_spi_40003800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_spi_40003800_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d6_pb13 + * Devicetree node: /soc/pin-controller@58020000/gpio@58020000 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d6_pb13" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_PATH "/soc/pin-controller@58020000/gpio@58020000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FULL_NAME "usb_otg_hs_ulpi_d6_pb13" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d6_pb13 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FULL_NAME_TOKEN usb_otg_hs_ulpi_d6_pb13 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D6_PB13 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FULL_NAME "gpio@58020000" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FULL_NAME_UNQUOTED gpio@58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FULL_NAME_TOKEN gpio_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FULL_NAME_UPPER_TOKEN GPIO_58020000 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_CHILD_IDX 97 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d6_pb13) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_NODELABEL(fn) fn(gpioa) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioa, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_HASH VkbhDbztZhLsmAexap227659BXuo5uifdaw_gG4KokY - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_ORD 62 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_ORD_STR_SORTABLE 00062 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_HASH OBFcV8E53vVYjjpiQJPQ0zMy2lJusA_kZ4LEcg7da5M + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_ORD 63 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_ORD_STR_SORTABLE 00063 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REQUIRES_ORDS \ + 8, \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_d6_pb13 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_EXISTS 1 +#define DT_N_INST_0_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_NODELABEL_gpioa DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REG_IDX_0_VAL_ADDRESS 1476526080 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_pinmux 938 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg {1476526080, 1024} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg_IDX_0 1476526080 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d7_pb5 + * Devicetree node: /soc/pin-controller@58020000/gpio@58020400 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d7_pb5" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_PATH "/soc/pin-controller@58020000/gpio@58020400" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FULL_NAME "usb_otg_hs_ulpi_d7_pb5" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d7_pb5 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FULL_NAME_TOKEN usb_otg_hs_ulpi_d7_pb5 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D7_PB5 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FULL_NAME "gpio@58020400" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FULL_NAME_UNQUOTED gpio@58020400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FULL_NAME_TOKEN gpio_58020400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FULL_NAME_UPPER_TOKEN GPIO_58020400 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_CHILD_IDX 93 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_CHILD_IDX 1 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d7_pb5) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_NODELABEL(fn) fn(gpiob) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiob, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_HASH FQTDxK_zcDgsbfDS4T0483wP5VQV8WhBbdKDqD_9Iuo +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_HASH gYdP39QIPaBB6nc4XDkGh_lITUPL5FSXbdH2SzSFKKk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_ORD 63 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_ORD_STR_SORTABLE 00063 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_ORD 64 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_ORD_STR_SORTABLE 00064 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REQUIRES_ORDS \ + 8, \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_d7_pb5 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_EXISTS 1 +#define DT_N_INST_1_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_NODELABEL_gpiob DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REG_IDX_0_VAL_ADDRESS 1476527104 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_pinmux 682 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg {1476527104, 1024} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg_IDX_0 1476527104 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_VAL_bits 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_dir_pi11 + * Devicetree node: /soc/pin-controller@58020000/gpio@58020800 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_dir_pi11" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_PATH "/soc/pin-controller@58020000/gpio@58020800" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FULL_NAME "usb_otg_hs_ulpi_dir_pi11" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_dir_pi11 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FULL_NAME_TOKEN usb_otg_hs_ulpi_dir_pi11 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_DIR_PI11 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FULL_NAME "gpio@58020800" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FULL_NAME_UNQUOTED gpio@58020800 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FULL_NAME_TOKEN gpio_58020800 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FULL_NAME_UPPER_TOKEN GPIO_58020800 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_CHILD_IDX 100 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_CHILD_IDX 2 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_dir_pi11) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_NODELABEL(fn) fn(gpioc) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioc, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_HASH DKMF6KCnbkUsyFKW5CX0RhW9B_WICh0gpMwptGAByXg +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_HASH kNEdHt4SOX4X8Z1vJWdCf5cNdeBmryoZhM2ULDMOaxs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_ORD 64 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_ORD_STR_SORTABLE 00064 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_ORD 65 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_ORD_STR_SORTABLE 00065 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REQUIRES_ORDS \ + 8, \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_dir_pi11 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_EXISTS 1 +#define DT_N_INST_2_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_NODELABEL_gpioc DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REG_IDX_0_VAL_ADDRESS 1476528128 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_pinmux 4458 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg {1476528128, 1024} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg_IDX_0 1476528128 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_VAL_bits 4 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_nxt_ph4 + * Devicetree node: /soc/pin-controller@58020000/gpio@58020C00 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_nxt_ph4" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_PATH "/soc/pin-controller@58020000/gpio@58020C00" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FULL_NAME "usb_otg_hs_ulpi_nxt_ph4" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_nxt_ph4 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FULL_NAME_TOKEN usb_otg_hs_ulpi_nxt_ph4 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_NXT_PH4 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FULL_NAME "gpio@58020C00" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FULL_NAME_UNQUOTED gpio@58020C00 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FULL_NAME_TOKEN gpio_58020C00 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FULL_NAME_UPPER_TOKEN GPIO_58020C00 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_CHILD_IDX 99 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_CHILD_IDX 3 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_nxt_ph4) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_NODELABEL(fn) fn(gpiod) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiod, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_HASH hWiIjD1j6W28KnES5ddcX55jkk5283qV_iV7ySbr8e0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_HASH tKRd3cbFp9ssRvkcTuioUrRdj9PDUyedSyHZBEJhbfw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_ORD 65 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_ORD_STR_SORTABLE 00065 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_ORD 66 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_ORD_STR_SORTABLE 00066 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REQUIRES_ORDS \ + 8, \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_SUPPORTS_ORDS \ + 103, \ + 171, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_nxt_ph4 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_EXISTS 1 +#define DT_N_INST_3_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 +#define DT_N_NODELABEL_gpiod DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_pinmux 3722 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REG_IDX_0_VAL_ADDRESS 1476529152 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg {1476529152, 1024} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg_IDX_0 1476529152 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_VAL_bits 8 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_stp_pc0 + * Devicetree node: /soc/pin-controller@58020000/gpio@58021000 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_stp_pc0" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_PATH "/soc/pin-controller@58020000/gpio@58021000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FULL_NAME "usb_otg_hs_ulpi_stp_pc0" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_stp_pc0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FULL_NAME_TOKEN usb_otg_hs_ulpi_stp_pc0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_STP_PC0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FULL_NAME "gpio@58021000" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FULL_NAME_UNQUOTED gpio@58021000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FULL_NAME_TOKEN gpio_58021000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FULL_NAME_UPPER_TOKEN GPIO_58021000 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_CHILD_IDX 98 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_CHILD_IDX 4 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_stp_pc0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_NODELABEL(fn) fn(gpioe) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioe, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_HASH jaMrzbxWSLD5Xc__vlKlCZs0IoEVKY9dFvKHTLwlSI8 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_HASH csLAO4okPfBG3MacvTQLEHUy_JHRJo1r_5mn7_Zx4zI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_ORD 66 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_ORD_STR_SORTABLE 00066 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_ORD 67 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_ORD_STR_SORTABLE 00067 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REQUIRES_ORDS \ + 8, \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_SUPPORTS_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_SUPPORTS_ORDS \ + 103, \ + 171, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_EXISTS 1 -#define DT_N_NODELABEL_usb_otg_hs_ulpi_stp_pc0 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_EXISTS 1 +#define DT_N_INST_4_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 +#define DT_N_NODELABEL_gpioe DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REG_IDX_0_VAL_ADDRESS 1476530176 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_pinmux 1034 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_STRING_TOKEN high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_IDX_0 "high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg {1476530176, 1024} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg_IDX_0 1476530176 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_VAL_bits 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/usb@40040000 + * Devicetree node: /soc/pin-controller@58020000/gpio@58021400 * - * Node identifier: DT_N_S_soc_S_usb_40040000 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 * - * Binding (compatible = st,stm32-otghs): - * $ZEPHYR_BASE/dts/bindings/usb/st,stm32-otghs.yaml + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_usb_40040000_PATH "/soc/usb@40040000" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PATH "/soc/pin-controller@58020000/gpio@58021400" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_usb_40040000_FULL_NAME "usb@40040000" -#define DT_N_S_soc_S_usb_40040000_FULL_NAME_UNQUOTED usb@40040000 -#define DT_N_S_soc_S_usb_40040000_FULL_NAME_TOKEN usb_40040000 -#define DT_N_S_soc_S_usb_40040000_FULL_NAME_UPPER_TOKEN USB_40040000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME "gpio@58021400" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_UNQUOTED gpio@58021400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_TOKEN gpio_58021400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_UPPER_TOKEN GPIO_58021400 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_usb_40040000_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_usb_40040000_CHILD_IDX 68 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_IDX 5 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_usb_40040000_NODELABEL_NUM 2 -#define DT_N_S_soc_S_usb_40040000_FOREACH_NODELABEL(fn) fn(usbotg_hs) fn(zephyr_udc0) -#define DT_N_S_soc_S_usb_40040000_FOREACH_NODELABEL_VARGS(fn, ...) fn(usbotg_hs, __VA_ARGS__) fn(zephyr_udc0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_NODELABEL(fn) fn(gpiof) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiof, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_usb_40040000_CHILD_NUM 1 -#define DT_N_S_soc_S_usb_40040000_CHILD_NUM_STATUS_OKAY 1 -#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) -#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) -#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) -#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) -#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_usb_40040000_HASH hQX5a6h4YrwYkjEZ67iF2XLzK046iAbBlHG3GB49DxM +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_HASH l5_L_caVLxj349B3OJV4wWPbN099OasLrBnDSU0_4ok /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_usb_40040000_ORD 67 -#define DT_N_S_soc_S_usb_40040000_ORD_STR_SORTABLE 00067 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD 68 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD_STR_SORTABLE 00068 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_usb_40040000_REQUIRES_ORDS \ - 3, \ - 4, \ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REQUIRES_ORDS \ 8, \ - 54, \ - 55, \ - 56, \ - 57, \ - 58, \ - 59, \ - 60, \ - 61, \ - 62, \ - 63, \ - 64, \ - 65, \ - 66, + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_usb_40040000_SUPPORTS_ORDS \ - 68, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_usb_40040000_EXISTS 1 -#define DT_N_INST_0_st_stm32_otghs DT_N_S_soc_S_usb_40040000 -#define DT_N_NODELABEL_usbotg_hs DT_N_S_soc_S_usb_40040000 -#define DT_N_NODELABEL_zephyr_udc0 DT_N_S_soc_S_usb_40040000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_EXISTS 1 +#define DT_N_INST_5_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 +#define DT_N_NODELABEL_gpiof DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_usb_40040000_REG_NUM 1 -#define DT_N_S_soc_S_usb_40040000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_REG_IDX_0_VAL_ADDRESS 1074003968 -#define DT_N_S_soc_S_usb_40040000_REG_IDX_0_VAL_SIZE 262144 -#define DT_N_S_soc_S_usb_40040000_RANGES_NUM 0 -#define DT_N_S_soc_S_usb_40040000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_usb_40040000_IRQ_NUM 4 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_irq 74 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_irq 75 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_irq 76 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_priority 0 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_irq 77 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_priority 0 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_usb_40040000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_out_VAL_irq DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_out_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_out_VAL_priority DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_out_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_out_CONTROLLER DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_in_VAL_irq DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_irq -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_in_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_in_VAL_priority DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_priority -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_in_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_in_CONTROLLER DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_CONTROLLER -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_wkup_VAL_irq DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_irq -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_wkup_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_wkup_VAL_priority DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_priority -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_wkup_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_wkup_CONTROLLER DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_CONTROLLER -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_otghs_VAL_irq DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_irq -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_otghs_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_otghs_VAL_priority DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_priority -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_otghs_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_otghs_CONTROLLER DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_CONTROLLER -#define DT_N_S_soc_S_usb_40040000_COMPAT_MATCHES_st_stm32_otghs 1 -#define DT_N_S_soc_S_usb_40040000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_usb_40040000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_COMPAT_MODEL_IDX_0 "stm32-otghs" -#define DT_N_S_soc_S_usb_40040000_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_VAL_ADDRESS 1476531200 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NUM 1 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_IDX_0_TOKEN default -#define DT_N_S_soc_S_usb_40040000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX 0 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4 -#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_11_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_usb_40040000_P_reg {1074003968, 262144} -#define DT_N_S_soc_S_usb_40040000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_reg_IDX_0 1074003968 -#define DT_N_S_soc_S_usb_40040000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_reg_IDX_1 262144 -#define DT_N_S_soc_S_usb_40040000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupts {74, 0, 75, 0, 76, 0, 77, 0} -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_0 74 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_2 75 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_4 76 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_5 0 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_6 77 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_7 0 -#define DT_N_S_soc_S_usb_40040000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_3 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_4 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_5 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_6 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_7 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_8 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_8_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_9 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_9_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_10 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_10_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_11 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_11_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_11_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 0) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 1) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 2) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 3) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 4) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 5) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 6) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 7) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 8) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 9) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 10) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 11) -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 6) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 7) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 8) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 9) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 10) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 11) -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 6, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 7, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 8, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 9, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 10, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 11, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 11, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_LEN 12 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names {"default"} -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_IDX_0 "default" -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_IDX_0_STRING_TOKEN default -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, pinctrl_names, 0) -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, pinctrl_names, 0) -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_LEN 1 -#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_ram_size 4096 -#define DT_N_S_soc_S_usb_40040000_P_ram_size_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_phys DT_N_S_otghs_ulpis_phy -#define DT_N_S_soc_S_usb_40040000_P_phys_IDX_0 DT_N_S_otghs_ulpis_phy -#define DT_N_S_soc_S_usb_40040000_P_phys_IDX_0_PH DT_N_S_otghs_ulpis_phy -#define DT_N_S_soc_S_usb_40040000_P_phys_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_phys_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, phys, 0) -#define DT_N_S_soc_S_usb_40040000_P_phys_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, phys, 0) -#define DT_N_S_soc_S_usb_40040000_P_phys_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, phys, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_phys_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, phys, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_phys_LEN 1 -#define DT_N_S_soc_S_usb_40040000_P_phys_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_VAL_bus 216 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_VAL_bits 100663296 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_VAL_bus 5 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_VAL_bits 416546900 -#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, clocks, 0) \ - fn(DT_N_S_soc_S_usb_40040000, clocks, 1) -#define DT_N_S_soc_S_usb_40040000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, clocks, 1) -#define DT_N_S_soc_S_usb_40040000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_clocks_LEN 2 -#define DT_N_S_soc_S_usb_40040000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_num_bidir_endpoints 4 -#define DT_N_S_soc_S_usb_40040000_P_num_bidir_endpoints_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed "high-speed" -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_STRING_UNQUOTED high-speed -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_STRING_TOKEN high_speed -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_STRING_UPPER_TOKEN HIGH_SPEED -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_IDX_0 "high-speed" -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_IDX_0_ENUM_VAL_high_speed_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, maximum_speed, 0) -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, maximum_speed, 0) -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, maximum_speed, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, maximum_speed, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_LEN 1 -#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_status "okay" -#define DT_N_S_soc_S_usb_40040000_P_status_STRING_UNQUOTED okay -#define DT_N_S_soc_S_usb_40040000_P_status_STRING_TOKEN okay -#define DT_N_S_soc_S_usb_40040000_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_usb_40040000_P_status_IDX_0 "okay" -#define DT_N_S_soc_S_usb_40040000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_usb_40040000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, status, 0) -#define DT_N_S_soc_S_usb_40040000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, status, 0) -#define DT_N_S_soc_S_usb_40040000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_status_LEN 1 -#define DT_N_S_soc_S_usb_40040000_P_status_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_compatible {"st,stm32-otghs"} -#define DT_N_S_soc_S_usb_40040000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_compatible_IDX_0 "st,stm32-otghs" -#define DT_N_S_soc_S_usb_40040000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-otghs -#define DT_N_S_soc_S_usb_40040000_P_compatible_IDX_0_STRING_TOKEN st_stm32_otghs -#define DT_N_S_soc_S_usb_40040000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_OTGHS -#define DT_N_S_soc_S_usb_40040000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, compatible, 0) -#define DT_N_S_soc_S_usb_40040000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, compatible, 0) -#define DT_N_S_soc_S_usb_40040000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_compatible_LEN 1 -#define DT_N_S_soc_S_usb_40040000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names {"ep1_out", "ep1_in", "wkup", "otghs"} -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_0 "ep1_out" -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_0_STRING_UNQUOTED ep1_out -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_0_STRING_TOKEN ep1_out -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN EP1_OUT -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_1 "ep1_in" -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_1_STRING_UNQUOTED ep1_in -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_1_STRING_TOKEN ep1_in -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN EP1_IN -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_2 "wkup" -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_2_STRING_UNQUOTED wkup -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_2_STRING_TOKEN wkup -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN WKUP -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_3 "otghs" -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_3_STRING_UNQUOTED otghs -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_3_STRING_TOKEN otghs -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN OTGHS -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 0) \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 1) \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 2) \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 3) -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 3) -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 3, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 3, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_LEN 4 -#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_usb_40040000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_wakeup_source 0 -#define DT_N_S_soc_S_usb_40040000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_usb_40040000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg {1476531200, 1024} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_0 1476531200 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bits 32 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/usb@40040000/board_cdc_acm_uart + * Devicetree node: /soc/pin-controller@58020000/gpio@58021800 * - * Node identifier: DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 * - * Binding (compatible = zephyr,cdc-acm-uart): - * $ZEPHYR_BASE/dts/bindings/serial/zephyr,cdc-acm-uart.yaml + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_PATH "/soc/usb@40040000/board_cdc_acm_uart" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_PATH "/soc/pin-controller@58020000/gpio@58021800" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FULL_NAME "board_cdc_acm_uart" -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FULL_NAME_UNQUOTED board_cdc_acm_uart -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FULL_NAME_TOKEN board_cdc_acm_uart -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FULL_NAME_UPPER_TOKEN BOARD_CDC_ACM_UART +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FULL_NAME "gpio@58021800" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FULL_NAME_UNQUOTED gpio@58021800 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FULL_NAME_TOKEN gpio_58021800 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FULL_NAME_UPPER_TOKEN GPIO_58021800 -/* Node parent (/soc/usb@40040000) identifier: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_PARENT DT_N_S_soc_S_usb_40040000 +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_CHILD_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_CHILD_IDX 6 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_NODELABEL_NUM 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_NODELABEL(fn) fn(board_cdc_acm_uart) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_NODELABEL_VARGS(fn, ...) fn(board_cdc_acm_uart, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_usb_40040000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_NODELABEL(fn) fn(gpiog) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiog, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_CHILD_NUM 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_HASH P3GsfMPNql3Dub9vlYX_Nnu0V9ZO9NQ9kQ2sQ_PMkkw +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_HASH WMh7Jx9L0cqz8vSetlrt_gCmYQ3gZUCzp4QopsOPnPw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_ORD 68 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_ORD_STR_SORTABLE 00068 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD 69 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_ORD_STR_SORTABLE 00069 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_REQUIRES_ORDS \ - 67, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REQUIRES_ORDS \ + 8, \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_SUPPORTS_ORDS \ - 69, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_EXISTS 1 -#define DT_N_INST_0_zephyr_cdc_acm_uart DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart -#define DT_N_NODELABEL_board_cdc_acm_uart DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart - -/* Bus info (controller: '/soc/usb@40040000', type: '['usb']') */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_BUS_usb 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_BUS DT_N_S_soc_S_usb_40040000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_EXISTS 1 +#define DT_N_INST_6_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 +#define DT_N_NODELABEL_gpiog DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_REG_NUM 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_RANGES_NUM 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_IRQ_NUM 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_IRQ_LEVEL 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_COMPAT_MATCHES_zephyr_cdc_acm_uart 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding" -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_COMPAT_MODEL_IDX_0 "cdc-acm-uart" -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REG_IDX_0_VAL_ADDRESS 1476532224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_tx_fifo_size 1024 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_tx_fifo_size_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_rx_fifo_size 1024 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_rx_fifo_size_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_hw_flow_control 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity "none" -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_STRING_UNQUOTED none -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_STRING_TOKEN none -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_STRING_UPPER_TOKEN NONE -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_IDX_0 "none" -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, parity, 0) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, parity, 0) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_LEN 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status "okay" -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_STRING_UNQUOTED okay -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_STRING_TOKEN okay -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_IDX_0 "okay" -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, status, 0) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, status, 0) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_LEN 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible {"zephyr,cdc-acm-uart"} -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_IDX_0 "zephyr,cdc-acm-uart" -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_IDX_0_STRING_UNQUOTED zephyr,cdc-acm-uart -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_IDX_0_STRING_TOKEN zephyr_cdc_acm_uart -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_CDC_ACM_UART -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, compatible, 0) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, compatible, 0) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_LEN 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_wakeup_source 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg {1476532224, 1024} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg_IDX_0 1476532224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_VAL_bits 64 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /zephyr,user + * Devicetree node: /soc/pin-controller@58020000/gpio@58022000 * - * Node identifier: DT_N_S_zephyr_user + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 + * + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_zephyr_user_PATH "/zephyr,user" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_PATH "/soc/pin-controller@58020000/gpio@58022000" /* Node's name with unit-address: */ -#define DT_N_S_zephyr_user_FULL_NAME "zephyr,user" -#define DT_N_S_zephyr_user_FULL_NAME_UNQUOTED zephyr,user -#define DT_N_S_zephyr_user_FULL_NAME_TOKEN zephyr_user -#define DT_N_S_zephyr_user_FULL_NAME_UPPER_TOKEN ZEPHYR_USER +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FULL_NAME "gpio@58022000" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FULL_NAME_UNQUOTED gpio@58022000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FULL_NAME_TOKEN gpio_58022000 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FULL_NAME_UPPER_TOKEN GPIO_58022000 -/* Node parent (/) identifier: */ -#define DT_N_S_zephyr_user_PARENT DT_N +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_zephyr_user_CHILD_IDX 25 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_CHILD_IDX 8 /* Helpers for dealing with node labels: */ -#define DT_N_S_zephyr_user_NODELABEL_NUM 0 -#define DT_N_S_zephyr_user_FOREACH_NODELABEL(fn) -#define DT_N_S_zephyr_user_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_zephyr_user_FOREACH_ANCESTOR(fn) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_NODELABEL(fn) fn(gpioi) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioi, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_zephyr_user_CHILD_NUM 0 -#define DT_N_S_zephyr_user_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_zephyr_user_FOREACH_CHILD(fn) -#define DT_N_S_zephyr_user_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_zephyr_user_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_zephyr_user_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_zephyr_user_HASH yvQw9UuQMLRblNbUC3yeUHnjbtsQjI3bWwAx_c_vELI +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_HASH X5po7QCBbtJf87tGL6bS248o3JOw_xf4eQbQnfhheU4 /* Node's dependency ordinal: */ -#define DT_N_S_zephyr_user_ORD 69 -#define DT_N_S_zephyr_user_ORD_STR_SORTABLE 00069 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_ORD 70 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_ORD_STR_SORTABLE 00070 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_zephyr_user_REQUIRES_ORDS \ - 0, \ - 12, \ - 20, \ - 35, \ - 42, \ - 45, \ - 48, \ - 49, \ - 50, \ - 51, \ - 52, \ - 53, \ - 68, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REQUIRES_ORDS \ + 8, \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_zephyr_user_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_zephyr_user_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_EXISTS 1 +#define DT_N_INST_8_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_NODELABEL_gpioi DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_zephyr_user_REG_NUM 0 -#define DT_N_S_zephyr_user_RANGES_NUM 0 -#define DT_N_S_zephyr_user_FOREACH_RANGE(fn) -#define DT_N_S_zephyr_user_IRQ_NUM 0 -#define DT_N_S_zephyr_user_IRQ_LEVEL 0 -#define DT_N_S_zephyr_user_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REG_IDX_0_VAL_ADDRESS 1476534272 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_zephyr_user_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_VAL_pin 15 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_VAL_pin 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_VAL_pin 11 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_VAL_pin 7 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_VAL_pin 7 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_VAL_pin 6 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_VAL_pin 8 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_VAL_pin 0 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_VAL_pin 3 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_VAL_pin 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_VAL_pin 2 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_VAL_pin 8 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_VAL_pin 7 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_VAL_pin 10 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_VAL_pin 9 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_VAL_pin 5 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_VAL_flags 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, digital_pin_gpios, 0) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 1) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 2) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 3) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 4) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 5) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 6) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 7) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 8) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 9) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 10) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 11) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 12) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 13) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 14) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 15) -#define DT_N_S_zephyr_user_P_digital_pin_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, digital_pin_gpios, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 6) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 7) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 8) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 9) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 10) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 11) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 12) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 13) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 14) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 15) -#define DT_N_S_zephyr_user_P_digital_pin_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, digital_pin_gpios, 0, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 1, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 2, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 3, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 4, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 5, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 6, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 7, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 8, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 9, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 10, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 11, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 12, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 13, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 14, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 15, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_digital_pin_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, digital_pin_gpios, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, digital_pin_gpios, 15, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_digital_pin_gpios_LEN 16 -#define DT_N_S_zephyr_user_P_digital_pin_gpios_EXISTS 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_EXISTS 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_VAL_pin 5 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_VAL_flags 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_EXISTS 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_VAL_pin 6 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_VAL_flags 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_EXISTS 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_VAL_pin 7 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_VAL_pin_EXISTS 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_VAL_flags 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_VAL_flags_EXISTS 1 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, builtin_led_gpios, 0) \ - fn(DT_N_S_zephyr_user, builtin_led_gpios, 1) \ - fn(DT_N_S_zephyr_user, builtin_led_gpios, 2) -#define DT_N_S_zephyr_user_P_builtin_led_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, builtin_led_gpios, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, builtin_led_gpios, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, builtin_led_gpios, 2) -#define DT_N_S_zephyr_user_P_builtin_led_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, builtin_led_gpios, 0, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, builtin_led_gpios, 1, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, builtin_led_gpios, 2, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_builtin_led_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, builtin_led_gpios, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, builtin_led_gpios, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, builtin_led_gpios, 2, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_builtin_led_gpios_LEN 3 -#define DT_N_S_zephyr_user_P_builtin_led_gpios_EXISTS 1 -#define DT_N_S_zephyr_user_P_serials_IDX_0 DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart -#define DT_N_S_zephyr_user_P_serials_IDX_0_PH DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart -#define DT_N_S_zephyr_user_P_serials_IDX_0_EXISTS 1 -#define DT_N_S_zephyr_user_P_serials_IDX_1 DT_N_S_soc_S_serial_40011400 -#define DT_N_S_zephyr_user_P_serials_IDX_1_PH DT_N_S_soc_S_serial_40011400 -#define DT_N_S_zephyr_user_P_serials_IDX_1_EXISTS 1 -#define DT_N_S_zephyr_user_P_serials_IDX_2 DT_N_S_soc_S_serial_40011000 -#define DT_N_S_zephyr_user_P_serials_IDX_2_PH DT_N_S_soc_S_serial_40011000 -#define DT_N_S_zephyr_user_P_serials_IDX_2_EXISTS 1 -#define DT_N_S_zephyr_user_P_serials_IDX_3 DT_N_S_soc_S_serial_40004c00 -#define DT_N_S_zephyr_user_P_serials_IDX_3_PH DT_N_S_soc_S_serial_40004c00 -#define DT_N_S_zephyr_user_P_serials_IDX_3_EXISTS 1 -#define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, serials, 0) \ - fn(DT_N_S_zephyr_user, serials, 1) \ - fn(DT_N_S_zephyr_user, serials, 2) \ - fn(DT_N_S_zephyr_user, serials, 3) -#define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, serials, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, serials, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, serials, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, serials, 3) -#define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, serials, 0, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, serials, 1, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, serials, 2, __VA_ARGS__) \ - fn(DT_N_S_zephyr_user, serials, 3, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, serials, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, serials, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, serials, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_zephyr_user, serials, 3, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_serials_LEN 4 -#define DT_N_S_zephyr_user_P_serials_EXISTS 1 -#define DT_N_S_zephyr_user_P_cdc_acm DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart -#define DT_N_S_zephyr_user_P_cdc_acm_IDX_0 DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart -#define DT_N_S_zephyr_user_P_cdc_acm_IDX_0_PH DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart -#define DT_N_S_zephyr_user_P_cdc_acm_IDX_0_EXISTS 1 -#define DT_N_S_zephyr_user_P_cdc_acm_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, cdc_acm, 0) -#define DT_N_S_zephyr_user_P_cdc_acm_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, cdc_acm, 0) -#define DT_N_S_zephyr_user_P_cdc_acm_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, cdc_acm, 0, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_cdc_acm_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, cdc_acm, 0, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_cdc_acm_LEN 1 -#define DT_N_S_zephyr_user_P_cdc_acm_EXISTS 1 -#define DT_N_S_zephyr_user_P_i2cs DT_N_S_soc_S_i2c_58001c00 -#define DT_N_S_zephyr_user_P_i2cs_IDX_0 DT_N_S_soc_S_i2c_58001c00 -#define DT_N_S_zephyr_user_P_i2cs_IDX_0_PH DT_N_S_soc_S_i2c_58001c00 -#define DT_N_S_zephyr_user_P_i2cs_IDX_0_EXISTS 1 -#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, i2cs, 0) -#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, i2cs, 0) -#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, i2cs, 0, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, i2cs, 0, __VA_ARGS__) -#define DT_N_S_zephyr_user_P_i2cs_LEN 1 -#define DT_N_S_zephyr_user_P_i2cs_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg {1476534272, 1024} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg_IDX_0 1476534272 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_VAL_bits 256 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /clocks/clk-csi + * Devicetree node: /soc/pin-controller@58020000/gpio@58022800 * - * Node identifier: DT_N_S_clocks_S_clk_csi + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 * - * Binding (compatible = fixed-clock): - * $ZEPHYR_BASE/dts/bindings/clock/fixed-clock.yaml + * Binding (compatible = st,stm32-gpio): + * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_clocks_S_clk_csi_PATH "/clocks/clk-csi" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_PATH "/soc/pin-controller@58020000/gpio@58022800" /* Node's name with unit-address: */ -#define DT_N_S_clocks_S_clk_csi_FULL_NAME "clk-csi" -#define DT_N_S_clocks_S_clk_csi_FULL_NAME_UNQUOTED clk-csi -#define DT_N_S_clocks_S_clk_csi_FULL_NAME_TOKEN clk_csi -#define DT_N_S_clocks_S_clk_csi_FULL_NAME_UPPER_TOKEN CLK_CSI +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FULL_NAME "gpio@58022800" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FULL_NAME_UNQUOTED gpio@58022800 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FULL_NAME_TOKEN gpio_58022800 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FULL_NAME_UPPER_TOKEN GPIO_58022800 -/* Node parent (/clocks) identifier: */ -#define DT_N_S_clocks_S_clk_csi_PARENT DT_N_S_clocks +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_clocks_S_clk_csi_CHILD_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_CHILD_IDX 10 /* Helpers for dealing with node labels: */ -#define DT_N_S_clocks_S_clk_csi_NODELABEL_NUM 1 -#define DT_N_S_clocks_S_clk_csi_FOREACH_NODELABEL(fn) fn(clk_csi) -#define DT_N_S_clocks_S_clk_csi_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_csi, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_csi_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_NODELABEL(fn) fn(gpiok) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiok, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_clocks_S_clk_csi_CHILD_NUM 0 -#define DT_N_S_clocks_S_clk_csi_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD(fn) -#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_clocks_S_clk_csi_HASH oJ7lwYm3Ewuv4QlO5OgXDu8dUN7qrBoXCBGWlhAtU9o +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_HASH kKwiRU3UgeNHAnynzom_GXwZc7W_TKis8XxviU9ivKE /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_csi_ORD 70 -#define DT_N_S_clocks_S_clk_csi_ORD_STR_SORTABLE 00070 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD 71 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_ORD_STR_SORTABLE 00071 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_clocks_S_clk_csi_REQUIRES_ORDS \ - 5, +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REQUIRES_ORDS \ + 8, \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_clocks_S_clk_csi_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_SUPPORTS_ORDS \ + 103, \ + 115, \ + 116, \ + 117, \ + 118, \ + 207, /* Existence and alternate IDs: */ -#define DT_N_S_clocks_S_clk_csi_EXISTS 1 -#define DT_N_INST_2_fixed_clock DT_N_S_clocks_S_clk_csi -#define DT_N_NODELABEL_clk_csi DT_N_S_clocks_S_clk_csi +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_EXISTS 1 +#define DT_N_INST_10_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_NODELABEL_gpiok DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 /* Macros for properties that are special in the specification: */ -#define DT_N_S_clocks_S_clk_csi_REG_NUM 0 -#define DT_N_S_clocks_S_clk_csi_RANGES_NUM 0 -#define DT_N_S_clocks_S_clk_csi_FOREACH_RANGE(fn) -#define DT_N_S_clocks_S_clk_csi_IRQ_NUM 0 -#define DT_N_S_clocks_S_clk_csi_IRQ_LEVEL 0 -#define DT_N_S_clocks_S_clk_csi_COMPAT_MATCHES_fixed_clock 1 -#define DT_N_S_clocks_S_clk_csi_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REG_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REG_IDX_0_VAL_ADDRESS 1476536320 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_COMPAT_MATCHES_st_stm32_gpio 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_COMPAT_MODEL_IDX_0 "stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_clocks_S_clk_csi_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_clocks_S_clk_csi_P_clock_frequency 4000000 -#define DT_N_S_clocks_S_clk_csi_P_clock_frequency_EXISTS 1 -#define DT_N_S_clocks_S_clk_csi_P_status "disabled" -#define DT_N_S_clocks_S_clk_csi_P_status_STRING_UNQUOTED disabled -#define DT_N_S_clocks_S_clk_csi_P_status_STRING_TOKEN disabled -#define DT_N_S_clocks_S_clk_csi_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_clocks_S_clk_csi_P_status_IDX_0 "disabled" -#define DT_N_S_clocks_S_clk_csi_P_status_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_csi_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_clocks_S_clk_csi_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_clocks_S_clk_csi_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_csi, status, 0) -#define DT_N_S_clocks_S_clk_csi_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_csi, status, 0) -#define DT_N_S_clocks_S_clk_csi_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_csi, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_csi_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_csi, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_csi_P_status_LEN 1 -#define DT_N_S_clocks_S_clk_csi_P_status_EXISTS 1 -#define DT_N_S_clocks_S_clk_csi_P_compatible {"fixed-clock"} -#define DT_N_S_clocks_S_clk_csi_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_csi_P_compatible_IDX_0 "fixed-clock" -#define DT_N_S_clocks_S_clk_csi_P_compatible_IDX_0_STRING_UNQUOTED fixed-clock -#define DT_N_S_clocks_S_clk_csi_P_compatible_IDX_0_STRING_TOKEN fixed_clock -#define DT_N_S_clocks_S_clk_csi_P_compatible_IDX_0_STRING_UPPER_TOKEN FIXED_CLOCK -#define DT_N_S_clocks_S_clk_csi_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_csi, compatible, 0) -#define DT_N_S_clocks_S_clk_csi_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_csi, compatible, 0) -#define DT_N_S_clocks_S_clk_csi_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_csi, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_csi_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_csi, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_csi_P_compatible_LEN 1 -#define DT_N_S_clocks_S_clk_csi_P_compatible_EXISTS 1 -#define DT_N_S_clocks_S_clk_csi_P_zephyr_deferred_init 0 -#define DT_N_S_clocks_S_clk_csi_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_clocks_S_clk_csi_P_wakeup_source 0 -#define DT_N_S_clocks_S_clk_csi_P_wakeup_source_EXISTS 1 -#define DT_N_S_clocks_S_clk_csi_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_clocks_S_clk_csi_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg {1476536320, 1024} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg_IDX_0 1476536320 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_VAL_bits 1024 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, clocks, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_ngpios 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_ngpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_gpio_controller 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_gpio_controller_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible {"st,stm32-gpio"} +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_IDX_0 "st,stm32-gpio" +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, compatible, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_wakeup_source 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /clocks/clk-hsi + * Devicetree node: /soc/timers@40000400 * - * Node identifier: DT_N_S_clocks_S_clk_hsi + * Node identifier: DT_N_S_soc_S_timers_40000400 * - * Binding (compatible = st,stm32h7-hsi-clock): - * $ZEPHYR_BASE/dts/bindings/clock/st,stm32h7-hsi-clock.yaml + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_clocks_S_clk_hsi_PATH "/clocks/clk-hsi" +#define DT_N_S_soc_S_timers_40000400_PATH "/soc/timers@40000400" /* Node's name with unit-address: */ -#define DT_N_S_clocks_S_clk_hsi_FULL_NAME "clk-hsi" -#define DT_N_S_clocks_S_clk_hsi_FULL_NAME_UNQUOTED clk-hsi -#define DT_N_S_clocks_S_clk_hsi_FULL_NAME_TOKEN clk_hsi -#define DT_N_S_clocks_S_clk_hsi_FULL_NAME_UPPER_TOKEN CLK_HSI +#define DT_N_S_soc_S_timers_40000400_FULL_NAME "timers@40000400" +#define DT_N_S_soc_S_timers_40000400_FULL_NAME_UNQUOTED timers@40000400 +#define DT_N_S_soc_S_timers_40000400_FULL_NAME_TOKEN timers_40000400 +#define DT_N_S_soc_S_timers_40000400_FULL_NAME_UPPER_TOKEN TIMERS_40000400 -/* Node parent (/clocks) identifier: */ -#define DT_N_S_clocks_S_clk_hsi_PARENT DT_N_S_clocks +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40000400_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_clocks_S_clk_hsi_CHILD_IDX 1 +#define DT_N_S_soc_S_timers_40000400_CHILD_IDX 35 /* Helpers for dealing with node labels: */ -#define DT_N_S_clocks_S_clk_hsi_NODELABEL_NUM 1 -#define DT_N_S_clocks_S_clk_hsi_FOREACH_NODELABEL(fn) fn(clk_hsi) -#define DT_N_S_clocks_S_clk_hsi_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_hsi, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_hsi_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) +#define DT_N_S_soc_S_timers_40000400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40000400_FOREACH_NODELABEL(fn) fn(timers3) +#define DT_N_S_soc_S_timers_40000400_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_clocks_S_clk_hsi_CHILD_NUM 0 -#define DT_N_S_clocks_S_clk_hsi_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD(fn) -#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000400_CHILD_NUM 2 +#define DT_N_S_soc_S_timers_40000400_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm) fn(DT_N_S_soc_S_timers_40000400_S_counter) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400_S_counter) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) /* Node's hash: */ -#define DT_N_S_clocks_S_clk_hsi_HASH kE6dGnI__HuixEc_o2mPIojHDSoRqqYmExJJycW6WDM +#define DT_N_S_soc_S_timers_40000400_HASH baeUapzy1gNL2E23NOiz9371NQp1G8KhvyeXIcEPqLk /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_hsi_ORD 71 -#define DT_N_S_clocks_S_clk_hsi_ORD_STR_SORTABLE 00071 +#define DT_N_S_soc_S_timers_40000400_ORD 72 +#define DT_N_S_soc_S_timers_40000400_ORD_STR_SORTABLE 00072 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_clocks_S_clk_hsi_REQUIRES_ORDS \ - 5, +#define DT_N_S_soc_S_timers_40000400_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 51, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_clocks_S_clk_hsi_SUPPORTS_ORDS +#define DT_N_S_soc_S_timers_40000400_SUPPORTS_ORDS \ + 75, \ + 282, /* Existence and alternate IDs: */ -#define DT_N_S_clocks_S_clk_hsi_EXISTS 1 -#define DT_N_INST_0_st_stm32h7_hsi_clock DT_N_S_clocks_S_clk_hsi -#define DT_N_NODELABEL_clk_hsi DT_N_S_clocks_S_clk_hsi +#define DT_N_S_soc_S_timers_40000400_EXISTS 1 +#define DT_N_INST_1_st_stm32_timers DT_N_S_soc_S_timers_40000400 +#define DT_N_NODELABEL_timers3 DT_N_S_soc_S_timers_40000400 /* Macros for properties that are special in the specification: */ -#define DT_N_S_clocks_S_clk_hsi_REG_NUM 0 -#define DT_N_S_clocks_S_clk_hsi_RANGES_NUM 0 -#define DT_N_S_clocks_S_clk_hsi_FOREACH_RANGE(fn) -#define DT_N_S_clocks_S_clk_hsi_IRQ_NUM 0 -#define DT_N_S_clocks_S_clk_hsi_IRQ_LEVEL 0 -#define DT_N_S_clocks_S_clk_hsi_COMPAT_MATCHES_st_stm32h7_hsi_clock 1 -#define DT_N_S_clocks_S_clk_hsi_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_clocks_S_clk_hsi_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_COMPAT_MODEL_IDX_0 "stm32h7-hsi-clock" -#define DT_N_S_clocks_S_clk_hsi_STATUS_okay 1 +#define DT_N_S_soc_S_timers_40000400_REG_NUM 1 +#define DT_N_S_soc_S_timers_40000400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_REG_IDX_0_VAL_ADDRESS 1073742848 +#define DT_N_S_soc_S_timers_40000400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_timers_40000400_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000400_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_irq 29 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40000400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40000400_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40000400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40000400_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_clocks_S_clk_hsi_PINCTRL_NUM 0 +#define DT_N_S_soc_S_timers_40000400_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_clocks_S_clk_hsi_P_hsi_div 1 -#define DT_N_S_clocks_S_clk_hsi_P_hsi_div_IDX_0_ENUM_IDX 0 -#define DT_N_S_clocks_S_clk_hsi_P_hsi_div_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_hsi_div_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_hsi_div_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_clock_frequency 64000000 -#define DT_N_S_clocks_S_clk_hsi_P_clock_frequency_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_status "okay" -#define DT_N_S_clocks_S_clk_hsi_P_status_STRING_UNQUOTED okay -#define DT_N_S_clocks_S_clk_hsi_P_status_STRING_TOKEN okay -#define DT_N_S_clocks_S_clk_hsi_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0 "okay" -#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi, status, 0) -#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi, status, 0) -#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_hsi_P_status_LEN 1 -#define DT_N_S_clocks_S_clk_hsi_P_status_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_compatible {"st,stm32h7-hsi-clock"} -#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0 "st,stm32h7-hsi-clock" -#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-hsi-clock -#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_hsi_clock -#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_HSI_CLOCK -#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0) -#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0) -#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_hsi_P_compatible_LEN 1 -#define DT_N_S_clocks_S_clk_hsi_P_compatible_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_zephyr_deferred_init 0 -#define DT_N_S_clocks_S_clk_hsi_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_wakeup_source 0 -#define DT_N_S_clocks_S_clk_hsi_P_wakeup_source_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_clocks_S_clk_hsi_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_reg {1073742848, 1024} +#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_0 1073742848 +#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40000400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bits 2 +#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, clocks, 0) +#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, clocks, 0) +#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_clocks_LEN 1 +#define DT_N_S_soc_S_timers_40000400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_VAL_id 4609 +#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, resets, 0) +#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, resets, 0) +#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40000400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_st_prescaler 100 +#define DT_N_S_soc_S_timers_40000400_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40000400_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_status "okay" +#define DT_N_S_soc_S_timers_40000400_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40000400_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40000400_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, status, 0) +#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, status, 0) +#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000400_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupts {29, 0} +#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_0 29 +#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40000400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000400_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /clocks/clk-hsi48 - * - * Node identifier: DT_N_S_clocks_S_clk_hsi48 + * Devicetree node: /soc/pin-controller@58020000/tim3_ch1_pc6 * - * Binding (compatible = fixed-clock): - * $ZEPHYR_BASE/dts/bindings/clock/fixed-clock.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_clocks_S_clk_hsi48_PATH "/clocks/clk-hsi48" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_PATH "/soc/pin-controller@58020000/tim3_ch1_pc6" /* Node's name with unit-address: */ -#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME "clk-hsi48" -#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME_UNQUOTED clk-hsi48 -#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME_TOKEN clk_hsi48 -#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME_UPPER_TOKEN CLK_HSI48 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FULL_NAME "tim3_ch1_pc6" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FULL_NAME_UNQUOTED tim3_ch1_pc6 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FULL_NAME_TOKEN tim3_ch1_pc6 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FULL_NAME_UPPER_TOKEN TIM3_CH1_PC6 -/* Node parent (/clocks) identifier: */ -#define DT_N_S_clocks_S_clk_hsi48_PARENT DT_N_S_clocks +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_clocks_S_clk_hsi48_CHILD_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_CHILD_IDX 98 /* Helpers for dealing with node labels: */ -#define DT_N_S_clocks_S_clk_hsi48_NODELABEL_NUM 1 -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_NODELABEL(fn) fn(clk_hsi48) -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_hsi48, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_NODELABEL(fn) fn(tim3_ch1_pc6) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_NODELABEL_VARGS(fn, ...) fn(tim3_ch1_pc6, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_clocks_S_clk_hsi48_CHILD_NUM 0 -#define DT_N_S_clocks_S_clk_hsi48_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD(fn) -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_clocks_S_clk_hsi48_HASH m4q2NUiXYm_f1RVl9VGtz8iGJxJSrtVw_lCXFQUVjsw +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_HASH yPLnH3Ydl5J6czUTnmytT_GV74pFiCoySJTLcC6bCco /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_hsi48_ORD 72 -#define DT_N_S_clocks_S_clk_hsi48_ORD_STR_SORTABLE 00072 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_ORD 73 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_ORD_STR_SORTABLE 00073 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_clocks_S_clk_hsi48_REQUIRES_ORDS \ - 5, +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_clocks_S_clk_hsi48_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_SUPPORTS_ORDS \ + 75, /* Existence and alternate IDs: */ -#define DT_N_S_clocks_S_clk_hsi48_EXISTS 1 -#define DT_N_INST_0_fixed_clock DT_N_S_clocks_S_clk_hsi48 -#define DT_N_NODELABEL_clk_hsi48 DT_N_S_clocks_S_clk_hsi48 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_EXISTS 1 +#define DT_N_NODELABEL_tim3_ch1_pc6 DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6 /* Macros for properties that are special in the specification: */ -#define DT_N_S_clocks_S_clk_hsi48_REG_NUM 0 -#define DT_N_S_clocks_S_clk_hsi48_RANGES_NUM 0 -#define DT_N_S_clocks_S_clk_hsi48_FOREACH_RANGE(fn) -#define DT_N_S_clocks_S_clk_hsi48_IRQ_NUM 0 -#define DT_N_S_clocks_S_clk_hsi48_IRQ_LEVEL 0 -#define DT_N_S_clocks_S_clk_hsi48_COMPAT_MATCHES_fixed_clock 1 -#define DT_N_S_clocks_S_clk_hsi48_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_clocks_S_clk_hsi48_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_clocks_S_clk_hsi48_P_clock_frequency 48000000 -#define DT_N_S_clocks_S_clk_hsi48_P_clock_frequency_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi48_P_status "okay" -#define DT_N_S_clocks_S_clk_hsi48_P_status_STRING_UNQUOTED okay -#define DT_N_S_clocks_S_clk_hsi48_P_status_STRING_TOKEN okay -#define DT_N_S_clocks_S_clk_hsi48_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0 "okay" -#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi48, status, 0) -#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi48, status, 0) -#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi48, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi48, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_hsi48_P_status_LEN 1 -#define DT_N_S_clocks_S_clk_hsi48_P_status_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi48_P_compatible {"fixed-clock"} -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0 "fixed-clock" -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_STRING_UNQUOTED fixed-clock -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_STRING_TOKEN fixed_clock -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_STRING_UPPER_TOKEN FIXED_CLOCK -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0) -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0) -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_LEN 1 -#define DT_N_S_clocks_S_clk_hsi48_P_compatible_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_deferred_init 0 -#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi48_P_wakeup_source 0 -#define DT_N_S_clocks_S_clk_hsi48_P_wakeup_source_EXISTS 1 -#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_pinmux 1218 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6_P_output_high_EXISTS 1 /* - * Devicetree node: /clocks/clk-lse - * - * Node identifier: DT_N_S_clocks_S_clk_lse + * Devicetree node: /soc/pin-controller@58020000/tim3_ch2_pc7 * - * Binding (compatible = st,stm32-lse-clock): - * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-lse-clock.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_clocks_S_clk_lse_PATH "/clocks/clk-lse" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_PATH "/soc/pin-controller@58020000/tim3_ch2_pc7" /* Node's name with unit-address: */ -#define DT_N_S_clocks_S_clk_lse_FULL_NAME "clk-lse" -#define DT_N_S_clocks_S_clk_lse_FULL_NAME_UNQUOTED clk-lse -#define DT_N_S_clocks_S_clk_lse_FULL_NAME_TOKEN clk_lse -#define DT_N_S_clocks_S_clk_lse_FULL_NAME_UPPER_TOKEN CLK_LSE +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FULL_NAME "tim3_ch2_pc7" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FULL_NAME_UNQUOTED tim3_ch2_pc7 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FULL_NAME_TOKEN tim3_ch2_pc7 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FULL_NAME_UPPER_TOKEN TIM3_CH2_PC7 -/* Node parent (/clocks) identifier: */ -#define DT_N_S_clocks_S_clk_lse_PARENT DT_N_S_clocks +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_clocks_S_clk_lse_CHILD_IDX 4 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_CHILD_IDX 99 /* Helpers for dealing with node labels: */ -#define DT_N_S_clocks_S_clk_lse_NODELABEL_NUM 1 -#define DT_N_S_clocks_S_clk_lse_FOREACH_NODELABEL(fn) fn(clk_lse) -#define DT_N_S_clocks_S_clk_lse_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_lse, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_lse_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_NODELABEL(fn) fn(tim3_ch2_pc7) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_NODELABEL_VARGS(fn, ...) fn(tim3_ch2_pc7, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_clocks_S_clk_lse_CHILD_NUM 0 -#define DT_N_S_clocks_S_clk_lse_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD(fn) -#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_clocks_S_clk_lse_HASH RRqOX2XdydrKvwOwHO0Kh3mPfPtUsDJrDySCwF316Ek +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_HASH 7JqOIziD04i7HIcuQZV__ywK9RUuc1TDLqQYdRpacfM /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_lse_ORD 73 -#define DT_N_S_clocks_S_clk_lse_ORD_STR_SORTABLE 00073 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_ORD 74 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_ORD_STR_SORTABLE 00074 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_clocks_S_clk_lse_REQUIRES_ORDS \ - 5, +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_clocks_S_clk_lse_SUPPORTS_ORDS - -/* Existence and alternate IDs: */ -#define DT_N_S_clocks_S_clk_lse_EXISTS 1 -#define DT_N_INST_0_st_stm32_lse_clock DT_N_S_clocks_S_clk_lse -#define DT_N_NODELABEL_clk_lse DT_N_S_clocks_S_clk_lse - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_clocks_S_clk_lse_REG_NUM 0 -#define DT_N_S_clocks_S_clk_lse_RANGES_NUM 0 -#define DT_N_S_clocks_S_clk_lse_FOREACH_RANGE(fn) -#define DT_N_S_clocks_S_clk_lse_IRQ_NUM 0 -#define DT_N_S_clocks_S_clk_lse_IRQ_LEVEL 0 -#define DT_N_S_clocks_S_clk_lse_COMPAT_MATCHES_st_stm32_lse_clock 1 -#define DT_N_S_clocks_S_clk_lse_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_clocks_S_clk_lse_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_COMPAT_MODEL_IDX_0 "stm32-lse-clock" -#define DT_N_S_clocks_S_clk_lse_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_clocks_S_clk_lse_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_clocks_S_clk_lse_P_driving_capability 0 -#define DT_N_S_clocks_S_clk_lse_P_driving_capability_IDX_0_ENUM_IDX 0 -#define DT_N_S_clocks_S_clk_lse_P_driving_capability_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_driving_capability_IDX_0_ENUM_VAL_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_driving_capability_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_lse_bypass 0 -#define DT_N_S_clocks_S_clk_lse_P_lse_bypass_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_clock_frequency 32768 -#define DT_N_S_clocks_S_clk_lse_P_clock_frequency_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_status "disabled" -#define DT_N_S_clocks_S_clk_lse_P_status_STRING_UNQUOTED disabled -#define DT_N_S_clocks_S_clk_lse_P_status_STRING_TOKEN disabled -#define DT_N_S_clocks_S_clk_lse_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0 "disabled" -#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lse, status, 0) -#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lse, status, 0) -#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lse, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lse, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_lse_P_status_LEN 1 -#define DT_N_S_clocks_S_clk_lse_P_status_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_compatible {"st,stm32-lse-clock"} -#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0 "st,stm32-lse-clock" -#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-lse-clock -#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_STRING_TOKEN st_stm32_lse_clock -#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LSE_CLOCK -#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lse, compatible, 0) -#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lse, compatible, 0) -#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lse, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lse, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_lse_P_compatible_LEN 1 -#define DT_N_S_clocks_S_clk_lse_P_compatible_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_zephyr_deferred_init 0 -#define DT_N_S_clocks_S_clk_lse_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_wakeup_source 0 -#define DT_N_S_clocks_S_clk_lse_P_wakeup_source_EXISTS 1 -#define DT_N_S_clocks_S_clk_lse_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_clocks_S_clk_lse_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_SUPPORTS_ORDS \ + 75, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_EXISTS 1 +#define DT_N_NODELABEL_tim3_ch2_pc7 DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_pinmux 1250 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7_P_output_high_EXISTS 1 /* - * Devicetree node: /clocks/clk-lsi + * Devicetree node: /soc/timers@40000400/pwm * - * Node identifier: DT_N_S_clocks_S_clk_lsi + * Node identifier: DT_N_S_soc_S_timers_40000400_S_pwm * - * Binding (compatible = fixed-clock): - * $ZEPHYR_BASE/dts/bindings/clock/fixed-clock.yaml + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_clocks_S_clk_lsi_PATH "/clocks/clk-lsi" +#define DT_N_S_soc_S_timers_40000400_S_pwm_PATH "/soc/timers@40000400/pwm" /* Node's name with unit-address: */ -#define DT_N_S_clocks_S_clk_lsi_FULL_NAME "clk-lsi" -#define DT_N_S_clocks_S_clk_lsi_FULL_NAME_UNQUOTED clk-lsi -#define DT_N_S_clocks_S_clk_lsi_FULL_NAME_TOKEN clk_lsi -#define DT_N_S_clocks_S_clk_lsi_FULL_NAME_UPPER_TOKEN CLK_LSI +#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME_UPPER_TOKEN PWM -/* Node parent (/clocks) identifier: */ -#define DT_N_S_clocks_S_clk_lsi_PARENT DT_N_S_clocks +/* Node parent (/soc/timers@40000400) identifier: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_PARENT DT_N_S_soc_S_timers_40000400 /* Node's index in its parent's list of children: */ -#define DT_N_S_clocks_S_clk_lsi_CHILD_IDX 5 +#define DT_N_S_soc_S_timers_40000400_S_pwm_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_clocks_S_clk_lsi_NODELABEL_NUM 1 -#define DT_N_S_clocks_S_clk_lsi_FOREACH_NODELABEL(fn) fn(clk_lsi) -#define DT_N_S_clocks_S_clk_lsi_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_lsi, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_lsi_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) +#define DT_N_S_soc_S_timers_40000400_S_pwm_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_NODELABEL(fn) fn(pwm3) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) fn(pwm3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_clocks_S_clk_lsi_CHILD_NUM 0 -#define DT_N_S_clocks_S_clk_lsi_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD(fn) -#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000400_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_clocks_S_clk_lsi_HASH y39tlAqwOoFHfznEDn2ZnvWSfYGNtJJvOJBnTUmFguY +#define DT_N_S_soc_S_timers_40000400_S_pwm_HASH 3XEqw4Q0MqUTTpvQ0Yrht2rVkAAPsKyjdgccEVU8gEE /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_clk_lsi_ORD 74 -#define DT_N_S_clocks_S_clk_lsi_ORD_STR_SORTABLE 00074 +#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD 75 +#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD_STR_SORTABLE 00075 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_clocks_S_clk_lsi_REQUIRES_ORDS \ - 5, +#define DT_N_S_soc_S_timers_40000400_S_pwm_REQUIRES_ORDS \ + 72, \ + 73, \ + 74, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_clocks_S_clk_lsi_SUPPORTS_ORDS +#define DT_N_S_soc_S_timers_40000400_S_pwm_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_clocks_S_clk_lsi_EXISTS 1 -#define DT_N_INST_1_fixed_clock DT_N_S_clocks_S_clk_lsi -#define DT_N_NODELABEL_clk_lsi DT_N_S_clocks_S_clk_lsi +#define DT_N_S_soc_S_timers_40000400_S_pwm_EXISTS 1 +#define DT_N_INST_1_st_stm32_pwm DT_N_S_soc_S_timers_40000400_S_pwm +#define DT_N_NODELABEL_pwm3 DT_N_S_soc_S_timers_40000400_S_pwm /* Macros for properties that are special in the specification: */ -#define DT_N_S_clocks_S_clk_lsi_REG_NUM 0 -#define DT_N_S_clocks_S_clk_lsi_RANGES_NUM 0 -#define DT_N_S_clocks_S_clk_lsi_FOREACH_RANGE(fn) -#define DT_N_S_clocks_S_clk_lsi_IRQ_NUM 0 -#define DT_N_S_clocks_S_clk_lsi_IRQ_LEVEL 0 -#define DT_N_S_clocks_S_clk_lsi_COMPAT_MATCHES_fixed_clock 1 -#define DT_N_S_clocks_S_clk_lsi_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_clocks_S_clk_lsi_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_clocks_S_clk_lsi_P_clock_frequency 32000 -#define DT_N_S_clocks_S_clk_lsi_P_clock_frequency_EXISTS 1 -#define DT_N_S_clocks_S_clk_lsi_P_status "okay" -#define DT_N_S_clocks_S_clk_lsi_P_status_STRING_UNQUOTED okay -#define DT_N_S_clocks_S_clk_lsi_P_status_STRING_TOKEN okay -#define DT_N_S_clocks_S_clk_lsi_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0 "okay" -#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lsi, status, 0) -#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lsi, status, 0) -#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lsi, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lsi, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_lsi_P_status_LEN 1 -#define DT_N_S_clocks_S_clk_lsi_P_status_EXISTS 1 -#define DT_N_S_clocks_S_clk_lsi_P_compatible {"fixed-clock"} -#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0 "fixed-clock" -#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_STRING_UNQUOTED fixed-clock -#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_STRING_TOKEN fixed_clock -#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_STRING_UPPER_TOKEN FIXED_CLOCK -#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0) -#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0) -#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_clk_lsi_P_compatible_LEN 1 -#define DT_N_S_clocks_S_clk_lsi_P_compatible_EXISTS 1 -#define DT_N_S_clocks_S_clk_lsi_P_zephyr_deferred_init 0 -#define DT_N_S_clocks_S_clk_lsi_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_clocks_S_clk_lsi_P_wakeup_source 0 -#define DT_N_S_clocks_S_clk_lsi_P_wakeup_source_EXISTS 1 -#define DT_N_S_clocks_S_clk_lsi_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_clocks_S_clk_lsi_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40000400_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40000400_S_pwm_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_PINCTRL_NUM 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_timers_40000400_S_pwm_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_timers_40000400_S_pwm_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6 +#define DT_N_S_soc_S_timers_40000400_S_pwm_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_0, 1) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_0, 1) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_names, 0) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_names, 0) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status "okay" +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /clocks/perck + * Devicetree node: /soc/timers@40001800 * - * Node identifier: DT_N_S_clocks_S_perck + * Node identifier: DT_N_S_soc_S_timers_40001800 * - * Binding (compatible = st,stm32-clock-mux): - * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-clock-mux.yaml + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_clocks_S_perck_PATH "/clocks/perck" +#define DT_N_S_soc_S_timers_40001800_PATH "/soc/timers@40001800" /* Node's name with unit-address: */ -#define DT_N_S_clocks_S_perck_FULL_NAME "perck" -#define DT_N_S_clocks_S_perck_FULL_NAME_UNQUOTED perck -#define DT_N_S_clocks_S_perck_FULL_NAME_TOKEN perck -#define DT_N_S_clocks_S_perck_FULL_NAME_UPPER_TOKEN PERCK +#define DT_N_S_soc_S_timers_40001800_FULL_NAME "timers@40001800" +#define DT_N_S_soc_S_timers_40001800_FULL_NAME_UNQUOTED timers@40001800 +#define DT_N_S_soc_S_timers_40001800_FULL_NAME_TOKEN timers_40001800 +#define DT_N_S_soc_S_timers_40001800_FULL_NAME_UPPER_TOKEN TIMERS_40001800 -/* Node parent (/clocks) identifier: */ -#define DT_N_S_clocks_S_perck_PARENT DT_N_S_clocks +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40001800_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_clocks_S_perck_CHILD_IDX 9 +#define DT_N_S_soc_S_timers_40001800_CHILD_IDX 41 /* Helpers for dealing with node labels: */ -#define DT_N_S_clocks_S_perck_NODELABEL_NUM 1 -#define DT_N_S_clocks_S_perck_FOREACH_NODELABEL(fn) fn(perck) -#define DT_N_S_clocks_S_perck_FOREACH_NODELABEL_VARGS(fn, ...) fn(perck, __VA_ARGS__) -#define DT_N_S_clocks_S_perck_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) +#define DT_N_S_soc_S_timers_40001800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40001800_FOREACH_NODELABEL(fn) fn(timers12) +#define DT_N_S_soc_S_timers_40001800_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers12, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_clocks_S_perck_CHILD_NUM 0 -#define DT_N_S_clocks_S_perck_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_clocks_S_perck_FOREACH_CHILD(fn) -#define DT_N_S_clocks_S_perck_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_clocks_S_perck_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_clocks_S_perck_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_clocks_S_perck_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_clocks_S_perck_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_clocks_S_perck_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_clocks_S_perck_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40001800_CHILD_NUM 2 +#define DT_N_S_soc_S_timers_40001800_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40001800_S_pwm) fn(DT_N_S_soc_S_timers_40001800_S_counter) +#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001800_S_counter) +#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001800_S_counter, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_timers_40001800_S_pwm) +#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_pwm) +#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) /* Node's hash: */ -#define DT_N_S_clocks_S_perck_HASH hm5fMqncFIYWtt_nbIjSrBnSwopKrzSLfFmb5_L71ug +#define DT_N_S_soc_S_timers_40001800_HASH qfLQQZgyR253_Bl3FxzOIzJN7i8JBpwjwqhvZ_fm11E /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_perck_ORD 75 -#define DT_N_S_clocks_S_perck_ORD_STR_SORTABLE 00075 +#define DT_N_S_soc_S_timers_40001800_ORD 76 +#define DT_N_S_soc_S_timers_40001800_ORD_STR_SORTABLE 00076 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_clocks_S_perck_REQUIRES_ORDS \ - 5, +#define DT_N_S_soc_S_timers_40001800_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 51, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_clocks_S_perck_SUPPORTS_ORDS +#define DT_N_S_soc_S_timers_40001800_SUPPORTS_ORDS \ + 78, \ + 293, /* Existence and alternate IDs: */ -#define DT_N_S_clocks_S_perck_EXISTS 1 -#define DT_N_INST_0_st_stm32_clock_mux DT_N_S_clocks_S_perck -#define DT_N_NODELABEL_perck DT_N_S_clocks_S_perck +#define DT_N_S_soc_S_timers_40001800_EXISTS 1 +#define DT_N_INST_3_st_stm32_timers DT_N_S_soc_S_timers_40001800 +#define DT_N_NODELABEL_timers12 DT_N_S_soc_S_timers_40001800 /* Macros for properties that are special in the specification: */ -#define DT_N_S_clocks_S_perck_REG_NUM 0 -#define DT_N_S_clocks_S_perck_RANGES_NUM 0 -#define DT_N_S_clocks_S_perck_FOREACH_RANGE(fn) -#define DT_N_S_clocks_S_perck_IRQ_NUM 0 -#define DT_N_S_clocks_S_perck_IRQ_LEVEL 0 -#define DT_N_S_clocks_S_perck_COMPAT_MATCHES_st_stm32_clock_mux 1 -#define DT_N_S_clocks_S_perck_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_perck_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_clocks_S_perck_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_perck_COMPAT_MODEL_IDX_0 "stm32-clock-mux" -#define DT_N_S_clocks_S_perck_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_clocks_S_perck_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_clocks_S_perck_P_status "disabled" -#define DT_N_S_clocks_S_perck_P_status_STRING_UNQUOTED disabled -#define DT_N_S_clocks_S_perck_P_status_STRING_TOKEN disabled -#define DT_N_S_clocks_S_perck_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_clocks_S_perck_P_status_IDX_0 "disabled" -#define DT_N_S_clocks_S_perck_P_status_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_perck_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_clocks_S_perck_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_clocks_S_perck_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_perck, status, 0) -#define DT_N_S_clocks_S_perck_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_perck, status, 0) -#define DT_N_S_clocks_S_perck_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_perck, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_perck_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_perck, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_perck_P_status_LEN 1 -#define DT_N_S_clocks_S_perck_P_status_EXISTS 1 -#define DT_N_S_clocks_S_perck_P_compatible {"st,stm32-clock-mux"} -#define DT_N_S_clocks_S_perck_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_perck_P_compatible_IDX_0 "st,stm32-clock-mux" -#define DT_N_S_clocks_S_perck_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-clock-mux -#define DT_N_S_clocks_S_perck_P_compatible_IDX_0_STRING_TOKEN st_stm32_clock_mux -#define DT_N_S_clocks_S_perck_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_CLOCK_MUX -#define DT_N_S_clocks_S_perck_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_perck, compatible, 0) -#define DT_N_S_clocks_S_perck_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_perck, compatible, 0) -#define DT_N_S_clocks_S_perck_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_perck, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_perck_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_perck, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_perck_P_compatible_LEN 1 -#define DT_N_S_clocks_S_perck_P_compatible_EXISTS 1 - -/* - * Devicetree node: /clocks/pll@1 - * - * Node identifier: DT_N_S_clocks_S_pll_1 - * - * Binding (compatible = st,stm32h7-pll-clock): - * $ZEPHYR_BASE/dts/bindings/clock/st,stm32h7-pll-clock.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_clocks_S_pll_1_PATH "/clocks/pll@1" - -/* Node's name with unit-address: */ -#define DT_N_S_clocks_S_pll_1_FULL_NAME "pll@1" -#define DT_N_S_clocks_S_pll_1_FULL_NAME_UNQUOTED pll@1 -#define DT_N_S_clocks_S_pll_1_FULL_NAME_TOKEN pll_1 -#define DT_N_S_clocks_S_pll_1_FULL_NAME_UPPER_TOKEN PLL_1 - -/* Node parent (/clocks) identifier: */ -#define DT_N_S_clocks_S_pll_1_PARENT DT_N_S_clocks - -/* Node's index in its parent's list of children: */ -#define DT_N_S_clocks_S_pll_1_CHILD_IDX 7 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_clocks_S_pll_1_NODELABEL_NUM 1 -#define DT_N_S_clocks_S_pll_1_FOREACH_NODELABEL(fn) fn(pll2) -#define DT_N_S_clocks_S_pll_1_FOREACH_NODELABEL_VARGS(fn, ...) fn(pll2, __VA_ARGS__) -#define DT_N_S_clocks_S_pll_1_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_clocks_S_pll_1_CHILD_NUM 0 -#define DT_N_S_clocks_S_pll_1_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD(fn) -#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_clocks_S_pll_1_HASH JJFzu0SVfVbZ8_LZM_K2_DI2AKbfFanqb4TPxF_LsOk - -/* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_pll_1_ORD 76 -#define DT_N_S_clocks_S_pll_1_ORD_STR_SORTABLE 00076 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_clocks_S_pll_1_REQUIRES_ORDS \ - 5, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_clocks_S_pll_1_SUPPORTS_ORDS - -/* Existence and alternate IDs: */ -#define DT_N_S_clocks_S_pll_1_EXISTS 1 -#define DT_N_INST_1_st_stm32h7_pll_clock DT_N_S_clocks_S_pll_1 -#define DT_N_NODELABEL_pll2 DT_N_S_clocks_S_pll_1 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_clocks_S_pll_1_REG_NUM 1 -#define DT_N_S_clocks_S_pll_1_REG_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_REG_IDX_0_VAL_ADDRESS 1 -#define DT_N_S_clocks_S_pll_1_RANGES_NUM 0 -#define DT_N_S_clocks_S_pll_1_FOREACH_RANGE(fn) -#define DT_N_S_clocks_S_pll_1_IRQ_NUM 0 -#define DT_N_S_clocks_S_pll_1_IRQ_LEVEL 0 -#define DT_N_S_clocks_S_pll_1_COMPAT_MATCHES_st_stm32h7_pll_clock 1 -#define DT_N_S_clocks_S_pll_1_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_clocks_S_pll_1_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_COMPAT_MODEL_IDX_0 "stm32h7-pll-clock" -#define DT_N_S_clocks_S_pll_1_STATUS_disabled 1 +#define DT_N_S_soc_S_timers_40001800_REG_NUM 1 +#define DT_N_S_soc_S_timers_40001800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_REG_IDX_0_VAL_ADDRESS 1073747968 +#define DT_N_S_soc_S_timers_40001800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_timers_40001800_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40001800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40001800_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_irq 43 +#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40001800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40001800_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40001800_IRQ_NAME_global_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40001800_IRQ_NAME_global_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40001800_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40001800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40001800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40001800_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_clocks_S_pll_1_PINCTRL_NUM 0 +#define DT_N_S_soc_S_timers_40001800_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_clocks_S_pll_1_P_status "disabled" -#define DT_N_S_clocks_S_pll_1_P_status_STRING_UNQUOTED disabled -#define DT_N_S_clocks_S_pll_1_P_status_STRING_TOKEN disabled -#define DT_N_S_clocks_S_pll_1_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_clocks_S_pll_1_P_status_IDX_0 "disabled" -#define DT_N_S_clocks_S_pll_1_P_status_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_clocks_S_pll_1_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll_1, status, 0) -#define DT_N_S_clocks_S_pll_1_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll_1, status, 0) -#define DT_N_S_clocks_S_pll_1_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll_1, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_pll_1_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll_1, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_pll_1_P_status_LEN 1 -#define DT_N_S_clocks_S_pll_1_P_status_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_P_compatible {"st,stm32h7-pll-clock"} -#define DT_N_S_clocks_S_pll_1_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_P_compatible_IDX_0 "st,stm32h7-pll-clock" -#define DT_N_S_clocks_S_pll_1_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-pll-clock -#define DT_N_S_clocks_S_pll_1_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_pll_clock -#define DT_N_S_clocks_S_pll_1_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_PLL_CLOCK -#define DT_N_S_clocks_S_pll_1_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll_1, compatible, 0) -#define DT_N_S_clocks_S_pll_1_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll_1, compatible, 0) -#define DT_N_S_clocks_S_pll_1_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll_1, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_pll_1_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll_1, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_pll_1_P_compatible_LEN 1 -#define DT_N_S_clocks_S_pll_1_P_compatible_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_P_reg {1} -#define DT_N_S_clocks_S_pll_1_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_P_reg_IDX_0 1 -#define DT_N_S_clocks_S_pll_1_P_reg_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_P_zephyr_deferred_init 0 -#define DT_N_S_clocks_S_pll_1_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_P_wakeup_source 0 -#define DT_N_S_clocks_S_pll_1_P_wakeup_source_EXISTS 1 -#define DT_N_S_clocks_S_pll_1_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_clocks_S_pll_1_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_reg {1073747968, 1024} +#define DT_N_S_soc_S_timers_40001800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_reg_IDX_0 1073747968 +#define DT_N_S_soc_S_timers_40001800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40001800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_VAL_bits 64 +#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800, clocks, 0) +#define DT_N_S_soc_S_timers_40001800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800, clocks, 0) +#define DT_N_S_soc_S_timers_40001800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_P_clocks_LEN 1 +#define DT_N_S_soc_S_timers_40001800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_timers_40001800_P_resets_IDX_0_VAL_id 4614 +#define DT_N_S_soc_S_timers_40001800_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800, resets, 0) +#define DT_N_S_soc_S_timers_40001800_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800, resets, 0) +#define DT_N_S_soc_S_timers_40001800_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40001800_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_st_prescaler 100 +#define DT_N_S_soc_S_timers_40001800_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40001800_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_status "okay" +#define DT_N_S_soc_S_timers_40001800_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40001800_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40001800_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40001800_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40001800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40001800_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800, status, 0) +#define DT_N_S_soc_S_timers_40001800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800, status, 0) +#define DT_N_S_soc_S_timers_40001800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40001800_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40001800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40001800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40001800_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40001800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40001800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800, compatible, 0) +#define DT_N_S_soc_S_timers_40001800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800, compatible, 0) +#define DT_N_S_soc_S_timers_40001800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40001800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_interrupts {43, 0} +#define DT_N_S_soc_S_timers_40001800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_interrupts_IDX_0 43 +#define DT_N_S_soc_S_timers_40001800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40001800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40001800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40001800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40001800_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /clocks/pll@2 + * Devicetree node: /soc/pin-controller@58020000/tim12_ch1_ph6 * - * Node identifier: DT_N_S_clocks_S_pll_2 - * - * Binding (compatible = st,stm32h7-pll-clock): - * $ZEPHYR_BASE/dts/bindings/clock/st,stm32h7-pll-clock.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_clocks_S_pll_2_PATH "/clocks/pll@2" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_PATH "/soc/pin-controller@58020000/tim12_ch1_ph6" /* Node's name with unit-address: */ -#define DT_N_S_clocks_S_pll_2_FULL_NAME "pll@2" -#define DT_N_S_clocks_S_pll_2_FULL_NAME_UNQUOTED pll@2 -#define DT_N_S_clocks_S_pll_2_FULL_NAME_TOKEN pll_2 -#define DT_N_S_clocks_S_pll_2_FULL_NAME_UPPER_TOKEN PLL_2 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FULL_NAME "tim12_ch1_ph6" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FULL_NAME_UNQUOTED tim12_ch1_ph6 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FULL_NAME_TOKEN tim12_ch1_ph6 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FULL_NAME_UPPER_TOKEN TIM12_CH1_PH6 -/* Node parent (/clocks) identifier: */ -#define DT_N_S_clocks_S_pll_2_PARENT DT_N_S_clocks +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_clocks_S_pll_2_CHILD_IDX 8 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_CHILD_IDX 97 /* Helpers for dealing with node labels: */ -#define DT_N_S_clocks_S_pll_2_NODELABEL_NUM 1 -#define DT_N_S_clocks_S_pll_2_FOREACH_NODELABEL(fn) fn(pll3) -#define DT_N_S_clocks_S_pll_2_FOREACH_NODELABEL_VARGS(fn, ...) fn(pll3, __VA_ARGS__) -#define DT_N_S_clocks_S_pll_2_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_NODELABEL(fn) fn(tim12_ch1_ph6) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_NODELABEL_VARGS(fn, ...) fn(tim12_ch1_ph6, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_clocks_S_pll_2_CHILD_NUM 0 -#define DT_N_S_clocks_S_pll_2_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD(fn) -#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_clocks_S_pll_2_HASH AyfmMRKSnRfFME3ldy51RFP75itWiDTD8X_Ea_NWS1o +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_HASH LdcEjVk6DzM6usfSSD8y9OJQ4EwM_zo6vvJCEtFvmJY /* Node's dependency ordinal: */ -#define DT_N_S_clocks_S_pll_2_ORD 77 -#define DT_N_S_clocks_S_pll_2_ORD_STR_SORTABLE 00077 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_ORD 77 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_ORD_STR_SORTABLE 00077 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_clocks_S_pll_2_REQUIRES_ORDS \ - 5, +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_clocks_S_pll_2_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_SUPPORTS_ORDS \ + 78, /* Existence and alternate IDs: */ -#define DT_N_S_clocks_S_pll_2_EXISTS 1 -#define DT_N_INST_2_st_stm32h7_pll_clock DT_N_S_clocks_S_pll_2 -#define DT_N_NODELABEL_pll3 DT_N_S_clocks_S_pll_2 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_clocks_S_pll_2_REG_NUM 1 -#define DT_N_S_clocks_S_pll_2_REG_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_REG_IDX_0_VAL_ADDRESS 2 -#define DT_N_S_clocks_S_pll_2_RANGES_NUM 0 -#define DT_N_S_clocks_S_pll_2_FOREACH_RANGE(fn) -#define DT_N_S_clocks_S_pll_2_IRQ_NUM 0 -#define DT_N_S_clocks_S_pll_2_IRQ_LEVEL 0 -#define DT_N_S_clocks_S_pll_2_COMPAT_MATCHES_st_stm32h7_pll_clock 1 -#define DT_N_S_clocks_S_pll_2_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_clocks_S_pll_2_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_COMPAT_MODEL_IDX_0 "stm32h7-pll-clock" -#define DT_N_S_clocks_S_pll_2_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_clocks_S_pll_2_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_clocks_S_pll_2_P_status "disabled" -#define DT_N_S_clocks_S_pll_2_P_status_STRING_UNQUOTED disabled -#define DT_N_S_clocks_S_pll_2_P_status_STRING_TOKEN disabled -#define DT_N_S_clocks_S_pll_2_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_clocks_S_pll_2_P_status_IDX_0 "disabled" -#define DT_N_S_clocks_S_pll_2_P_status_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_clocks_S_pll_2_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll_2, status, 0) -#define DT_N_S_clocks_S_pll_2_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll_2, status, 0) -#define DT_N_S_clocks_S_pll_2_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll_2, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_pll_2_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll_2, status, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_pll_2_P_status_LEN 1 -#define DT_N_S_clocks_S_pll_2_P_status_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_P_compatible {"st,stm32h7-pll-clock"} -#define DT_N_S_clocks_S_pll_2_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_P_compatible_IDX_0 "st,stm32h7-pll-clock" -#define DT_N_S_clocks_S_pll_2_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-pll-clock -#define DT_N_S_clocks_S_pll_2_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_pll_clock -#define DT_N_S_clocks_S_pll_2_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_PLL_CLOCK -#define DT_N_S_clocks_S_pll_2_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll_2, compatible, 0) -#define DT_N_S_clocks_S_pll_2_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll_2, compatible, 0) -#define DT_N_S_clocks_S_pll_2_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll_2, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_pll_2_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll_2, compatible, 0, __VA_ARGS__) -#define DT_N_S_clocks_S_pll_2_P_compatible_LEN 1 -#define DT_N_S_clocks_S_pll_2_P_compatible_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_P_reg {2} -#define DT_N_S_clocks_S_pll_2_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_P_reg_IDX_0 2 -#define DT_N_S_clocks_S_pll_2_P_reg_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_P_zephyr_deferred_init 0 -#define DT_N_S_clocks_S_pll_2_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_P_wakeup_source 0 -#define DT_N_S_clocks_S_pll_2_P_wakeup_source_EXISTS 1 -#define DT_N_S_clocks_S_pll_2_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_clocks_S_pll_2_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_EXISTS 1 +#define DT_N_NODELABEL_tim12_ch1_ph6 DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_pinmux 3778 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6_P_output_high_EXISTS 1 /* - * Devicetree node: /cpus + * Devicetree node: /soc/timers@40001800/pwm * - * Node identifier: DT_N_S_cpus + * Node identifier: DT_N_S_soc_S_timers_40001800_S_pwm + * + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_cpus_PATH "/cpus" +#define DT_N_S_soc_S_timers_40001800_S_pwm_PATH "/soc/timers@40001800/pwm" /* Node's name with unit-address: */ -#define DT_N_S_cpus_FULL_NAME "cpus" -#define DT_N_S_cpus_FULL_NAME_UNQUOTED cpus -#define DT_N_S_cpus_FULL_NAME_TOKEN cpus -#define DT_N_S_cpus_FULL_NAME_UPPER_TOKEN CPUS +#define DT_N_S_soc_S_timers_40001800_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40001800_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40001800_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40001800_S_pwm_FULL_NAME_UPPER_TOKEN PWM -/* Node parent (/) identifier: */ -#define DT_N_S_cpus_PARENT DT_N +/* Node parent (/soc/timers@40001800) identifier: */ +#define DT_N_S_soc_S_timers_40001800_S_pwm_PARENT DT_N_S_soc_S_timers_40001800 /* Node's index in its parent's list of children: */ -#define DT_N_S_cpus_CHILD_IDX 3 +#define DT_N_S_soc_S_timers_40001800_S_pwm_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_cpus_NODELABEL_NUM 0 -#define DT_N_S_cpus_FOREACH_NODELABEL(fn) -#define DT_N_S_cpus_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_cpus_FOREACH_ANCESTOR(fn) fn(DT_N) +#define DT_N_S_soc_S_timers_40001800_S_pwm_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_NODELABEL(fn) fn(pwm12) +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) fn(pwm12, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40001800) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_cpus_CHILD_NUM 1 -#define DT_N_S_cpus_CHILD_NUM_STATUS_OKAY 1 -#define DT_N_S_cpus_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0) -#define DT_N_S_cpus_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0) -#define DT_N_S_cpus_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) -#define DT_N_S_cpus_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) -#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0) -#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0) -#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) -#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_cpus_HASH iL3XRGZVvvtpNJqKV0_jvtuXF7m6kgky4nI2ifizwdg +#define DT_N_S_soc_S_timers_40001800_S_pwm_HASH K6wIUvCEy1gKgAak61GnZ_6WjWnijyfqkSvLs81dD80 /* Node's dependency ordinal: */ -#define DT_N_S_cpus_ORD 78 -#define DT_N_S_cpus_ORD_STR_SORTABLE 00078 +#define DT_N_S_soc_S_timers_40001800_S_pwm_ORD 78 +#define DT_N_S_soc_S_timers_40001800_S_pwm_ORD_STR_SORTABLE 00078 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_cpus_REQUIRES_ORDS \ - 0, +#define DT_N_S_soc_S_timers_40001800_S_pwm_REQUIRES_ORDS \ + 76, \ + 77, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_cpus_SUPPORTS_ORDS \ - 79, +#define DT_N_S_soc_S_timers_40001800_S_pwm_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_cpus_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_EXISTS 1 +#define DT_N_INST_3_st_stm32_pwm DT_N_S_soc_S_timers_40001800_S_pwm +#define DT_N_NODELABEL_pwm12 DT_N_S_soc_S_timers_40001800_S_pwm /* Macros for properties that are special in the specification: */ -#define DT_N_S_cpus_REG_NUM 0 -#define DT_N_S_cpus_RANGES_NUM 0 -#define DT_N_S_cpus_FOREACH_RANGE(fn) -#define DT_N_S_cpus_IRQ_NUM 0 -#define DT_N_S_cpus_IRQ_LEVEL 0 -#define DT_N_S_cpus_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_cpus_PINCTRL_NUM 0 - -/* (No generic property macros) */ +#define DT_N_S_soc_S_timers_40001800_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40001800_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40001800_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40001800_S_pwm_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40001800_S_pwm_PINCTRL_NUM 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_timers_40001800_S_pwm_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_timers_40001800_S_pwm_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800_S_pwm, pinctrl_0, 0) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_pwm, pinctrl_0, 0) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, pinctrl_0, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_0_LEN 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800_S_pwm, pinctrl_names, 0) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_pwm, pinctrl_names, 0) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status "okay" +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40001800_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /cpus/cpu@0 + * Devicetree node: /soc/timers@40010000 * - * Node identifier: DT_N_S_cpus_S_cpu_0 + * Node identifier: DT_N_S_soc_S_timers_40010000 * - * Binding (compatible = arm,cortex-m7): - * $ZEPHYR_BASE/dts/bindings/cpu/arm,cortex-m7.yaml + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_cpus_S_cpu_0_PATH "/cpus/cpu@0" +#define DT_N_S_soc_S_timers_40010000_PATH "/soc/timers@40010000" /* Node's name with unit-address: */ -#define DT_N_S_cpus_S_cpu_0_FULL_NAME "cpu@0" -#define DT_N_S_cpus_S_cpu_0_FULL_NAME_UNQUOTED cpu@0 -#define DT_N_S_cpus_S_cpu_0_FULL_NAME_TOKEN cpu_0 -#define DT_N_S_cpus_S_cpu_0_FULL_NAME_UPPER_TOKEN CPU_0 +#define DT_N_S_soc_S_timers_40010000_FULL_NAME "timers@40010000" +#define DT_N_S_soc_S_timers_40010000_FULL_NAME_UNQUOTED timers@40010000 +#define DT_N_S_soc_S_timers_40010000_FULL_NAME_TOKEN timers_40010000 +#define DT_N_S_soc_S_timers_40010000_FULL_NAME_UPPER_TOKEN TIMERS_40010000 -/* Node parent (/cpus) identifier: */ -#define DT_N_S_cpus_S_cpu_0_PARENT DT_N_S_cpus +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40010000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_cpus_S_cpu_0_CHILD_IDX 0 +#define DT_N_S_soc_S_timers_40010000_CHILD_IDX 33 /* Helpers for dealing with node labels: */ -#define DT_N_S_cpus_S_cpu_0_NODELABEL_NUM 1 -#define DT_N_S_cpus_S_cpu_0_FOREACH_NODELABEL(fn) fn(cpu0) -#define DT_N_S_cpus_S_cpu_0_FOREACH_NODELABEL_VARGS(fn, ...) fn(cpu0, __VA_ARGS__) -#define DT_N_S_cpus_S_cpu_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_cpus) fn(DT_N) +#define DT_N_S_soc_S_timers_40010000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40010000_FOREACH_NODELABEL(fn) fn(timers1) +#define DT_N_S_soc_S_timers_40010000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_cpus_S_cpu_0_CHILD_NUM 1 -#define DT_N_S_cpus_S_cpu_0_CHILD_NUM_STATUS_OKAY 1 -#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) -#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) -#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) -#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) -#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) -#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) -#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) -#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_CHILD_NUM 1 +#define DT_N_S_soc_S_timers_40010000_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm) +#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm) +#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm) +#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm) +#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) /* Node's hash: */ -#define DT_N_S_cpus_S_cpu_0_HASH Su0JBbOtM0QIxe_1ka2Xvgw4rk1QaIlMIj8Rp_v4yVQ +#define DT_N_S_soc_S_timers_40010000_HASH wxcvRN_mA3ySgl7Qy6w43tAOklIzHZ0umwDnKMTErAk /* Node's dependency ordinal: */ -#define DT_N_S_cpus_S_cpu_0_ORD 79 -#define DT_N_S_cpus_S_cpu_0_ORD_STR_SORTABLE 00079 +#define DT_N_S_soc_S_timers_40010000_ORD 79 +#define DT_N_S_soc_S_timers_40010000_ORD_STR_SORTABLE 00079 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \ - 78, +#define DT_N_S_soc_S_timers_40010000_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 51, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS \ - 80, +#define DT_N_S_soc_S_timers_40010000_SUPPORTS_ORDS \ + 82, /* Existence and alternate IDs: */ -#define DT_N_S_cpus_S_cpu_0_EXISTS 1 -#define DT_N_INST_0_arm_cortex_m7 DT_N_S_cpus_S_cpu_0 -#define DT_N_NODELABEL_cpu0 DT_N_S_cpus_S_cpu_0 +#define DT_N_S_soc_S_timers_40010000_EXISTS 1 +#define DT_N_INST_0_st_stm32_timers DT_N_S_soc_S_timers_40010000 +#define DT_N_NODELABEL_timers1 DT_N_S_soc_S_timers_40010000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_cpus_S_cpu_0_REG_NUM 1 -#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_VAL_ADDRESS 0 -#define DT_N_S_cpus_S_cpu_0_RANGES_NUM 0 -#define DT_N_S_cpus_S_cpu_0_FOREACH_RANGE(fn) -#define DT_N_S_cpus_S_cpu_0_IRQ_NUM 0 -#define DT_N_S_cpus_S_cpu_0_IRQ_LEVEL 0 -#define DT_N_S_cpus_S_cpu_0_COMPAT_MATCHES_arm_cortex_m7 1 -#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0 "ARM Ltd." -#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0 "cortex-m7" -#define DT_N_S_cpus_S_cpu_0_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_cpus_S_cpu_0_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_cpus_S_cpu_0_P_compatible {"arm,cortex-m7"} -#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0 "arm,cortex-m7" -#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UNQUOTED arm,cortex-m7 -#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_TOKEN arm_cortex_m7 -#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_CORTEX_M7 -#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, compatible, 0) -#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0, compatible, 0) -#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__) -#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__) -#define DT_N_S_cpus_S_cpu_0_P_compatible_LEN 1 -#define DT_N_S_cpus_S_cpu_0_P_compatible_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_P_reg {0} -#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0 0 -#define DT_N_S_cpus_S_cpu_0_P_reg_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init 0 -#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_P_wakeup_source 0 -#define DT_N_S_cpus_S_cpu_0_P_wakeup_source_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_REG_NUM 1 +#define DT_N_S_soc_S_timers_40010000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_REG_IDX_0_VAL_ADDRESS 1073807360 +#define DT_N_S_soc_S_timers_40010000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_timers_40010000_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40010000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40010000_IRQ_NUM 4 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_irq 24 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_irq 25 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_irq 26 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_irq 27 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40010000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_brk_VAL_irq DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_brk_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_brk_VAL_priority DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_brk_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_brk_CONTROLLER DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_up_VAL_irq DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_up_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_up_VAL_priority DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_up_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_up_CONTROLLER DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_trgcom_VAL_irq DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_irq +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_trgcom_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_trgcom_VAL_priority DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_priority +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_trgcom_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_trgcom_CONTROLLER DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_CONTROLLER +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_cc_VAL_irq DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_irq +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_cc_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_cc_VAL_priority DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_priority +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_cc_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_cc_CONTROLLER DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_CONTROLLER +#define DT_N_S_soc_S_timers_40010000_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40010000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40010000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40010000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40010000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40010000_P_reg {1073807360, 1024} +#define DT_N_S_soc_S_timers_40010000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_reg_IDX_0 1073807360 +#define DT_N_S_soc_S_timers_40010000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40010000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_VAL_bus 240 +#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000, clocks, 0) +#define DT_N_S_soc_S_timers_40010000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000, clocks, 0) +#define DT_N_S_soc_S_timers_40010000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_P_clocks_LEN 1 +#define DT_N_S_soc_S_timers_40010000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_timers_40010000_P_resets_IDX_0_VAL_id 4864 +#define DT_N_S_soc_S_timers_40010000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000, resets, 0) +#define DT_N_S_soc_S_timers_40010000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000, resets, 0) +#define DT_N_S_soc_S_timers_40010000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40010000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_st_prescaler 0 +#define DT_N_S_soc_S_timers_40010000_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40010000_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_status "okay" +#define DT_N_S_soc_S_timers_40010000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40010000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40010000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40010000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40010000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40010000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000, status, 0) +#define DT_N_S_soc_S_timers_40010000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000, status, 0) +#define DT_N_S_soc_S_timers_40010000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40010000_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40010000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40010000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40010000_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40010000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40010000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000, compatible, 0) +#define DT_N_S_soc_S_timers_40010000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000, compatible, 0) +#define DT_N_S_soc_S_timers_40010000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40010000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupts {24, 0, 25, 0, 26, 0, 27, 0} +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_0 24 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_2 25 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_4 26 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_6 27 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_timers_40010000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names {"brk", "up", "trgcom", "cc"} +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_0 "brk" +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_0_STRING_UNQUOTED brk +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_0_STRING_TOKEN brk +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN BRK +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_1 "up" +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_1_STRING_UNQUOTED up +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_1_STRING_TOKEN up +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN UP +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_2 "trgcom" +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_2_STRING_UNQUOTED trgcom +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_2_STRING_TOKEN trgcom +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN TRGCOM +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_3 "cc" +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_3_STRING_UNQUOTED cc +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_3_STRING_TOKEN cc +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN CC +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 0) \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 1) \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 2) \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 3) +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 3) +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_LEN 4 +#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40010000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40010000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40010000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /cpus/cpu@0/mpu@e000ed90 - * - * Node identifier: DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90 + * Devicetree node: /soc/pin-controller@58020000/tim1_ch1_pa8 * - * Binding (compatible = arm,armv7m-mpu): - * $ZEPHYR_BASE/dts/bindings/mmu_mpu/arm,armv7m-mpu.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PATH "/cpus/cpu@0/mpu@e000ed90" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_PATH "/soc/pin-controller@58020000/tim1_ch1_pa8" /* Node's name with unit-address: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FULL_NAME "mpu@e000ed90" -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FULL_NAME_UNQUOTED mpu@e000ed90 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FULL_NAME_TOKEN mpu_e000ed90 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FULL_NAME_UPPER_TOKEN MPU_E000ED90 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FULL_NAME "tim1_ch1_pa8" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FULL_NAME_UNQUOTED tim1_ch1_pa8 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FULL_NAME_TOKEN tim1_ch1_pa8 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FULL_NAME_UPPER_TOKEN TIM1_CH1_PA8 -/* Node parent (/cpus/cpu@0) identifier: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PARENT DT_N_S_cpus_S_cpu_0 +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_CHILD_IDX 95 /* Helpers for dealing with node labels: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_NODELABEL_NUM 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_NODELABEL(fn) fn(mpu) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_NODELABEL_VARGS(fn, ...) fn(mpu, __VA_ARGS__) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_ANCESTOR(fn) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_NODELABEL(fn) fn(tim1_ch1_pa8) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_NODELABEL_VARGS(fn, ...) fn(tim1_ch1_pa8, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_NUM 0 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD(fn) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_HASH otj85KLBeEBY12eXojsCVZB1yE6Ww_J1xjGC9_C8_ok +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_HASH i0nzrpuAOwDgjjLGyLdTxz1sglSTNCHnFml9KJpqDzA /* Node's dependency ordinal: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD 80 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD_STR_SORTABLE 00080 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_ORD 80 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_ORD_STR_SORTABLE 00080 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REQUIRES_ORDS \ - 79, +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_SUPPORTS_ORDS \ + 82, /* Existence and alternate IDs: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_EXISTS 1 -#define DT_N_INST_0_arm_armv7m_mpu DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90 -#define DT_N_NODELABEL_mpu DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_EXISTS 1 +#define DT_N_NODELABEL_tim1_ch1_pa8 DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8 /* Macros for properties that are special in the specification: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_NUM 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_VAL_ADDRESS 3758157200 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_VAL_SIZE 64 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_RANGES_NUM 0 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_RANGE(fn) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_IRQ_NUM 0 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_IRQ_LEVEL 0 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MATCHES_arm_armv7m_mpu 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_VENDOR_IDX_0 "ARM Ltd." -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MODEL_IDX_0 "armv7m-mpu" -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg {3758157200, 64} -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_0 3758157200 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_1 64 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible {"arm,armv7m-mpu"} -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0 "arm,armv7m-mpu" -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_UNQUOTED arm,armv7m-mpu -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_TOKEN arm_armv7m_mpu -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV7M_MPU -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0, __VA_ARGS__) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0, __VA_ARGS__) -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_LEN 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_deferred_init 0 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_wakeup_source 0 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_wakeup_source_EXISTS 1 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_pinmux 257 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8_P_output_high_EXISTS 1 /* - * Devicetree node: /leds + * Devicetree node: /soc/pin-controller@58020000/tim1_ch2_pj11 * - * Node identifier: DT_N_S_leds - * - * Binding (compatible = gpio-leds): - * $ZEPHYR_BASE/dts/bindings/led/gpio-leds.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_leds_PATH "/leds" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_PATH "/soc/pin-controller@58020000/tim1_ch2_pj11" /* Node's name with unit-address: */ -#define DT_N_S_leds_FULL_NAME "leds" -#define DT_N_S_leds_FULL_NAME_UNQUOTED leds -#define DT_N_S_leds_FULL_NAME_TOKEN leds -#define DT_N_S_leds_FULL_NAME_UPPER_TOKEN LEDS +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FULL_NAME "tim1_ch2_pj11" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FULL_NAME_UNQUOTED tim1_ch2_pj11 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FULL_NAME_TOKEN tim1_ch2_pj11 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FULL_NAME_UPPER_TOKEN TIM1_CH2_PJ11 -/* Node parent (/) identifier: */ -#define DT_N_S_leds_PARENT DT_N +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_leds_CHILD_IDX 20 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_CHILD_IDX 96 /* Helpers for dealing with node labels: */ -#define DT_N_S_leds_NODELABEL_NUM 0 -#define DT_N_S_leds_FOREACH_NODELABEL(fn) -#define DT_N_S_leds_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_leds_FOREACH_ANCESTOR(fn) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_NODELABEL(fn) fn(tim1_ch2_pj11) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_NODELABEL_VARGS(fn, ...) fn(tim1_ch2_pj11, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_leds_CHILD_NUM 3 -#define DT_N_S_leds_CHILD_NUM_STATUS_OKAY 3 -#define DT_N_S_leds_FOREACH_CHILD(fn) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) -#define DT_N_S_leds_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_leds_S_led_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2) -#define DT_N_S_leds_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) -#define DT_N_S_leds_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2, __VA_ARGS__) -#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) -#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_leds_S_led_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2) -#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) -#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_leds_HASH bMroFUocDdjE3kJ38dK18mDvlCOPoyya5kIIs76irj8 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_HASH MS1bVA0JoVpxZJcQYAlMdcE4LCvpZDuZmKzckunlHk8 /* Node's dependency ordinal: */ -#define DT_N_S_leds_ORD 81 -#define DT_N_S_leds_ORD_STR_SORTABLE 00081 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_ORD 81 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_ORD_STR_SORTABLE 00081 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_leds_REQUIRES_ORDS \ - 0, \ - 53, +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_leds_SUPPORTS_ORDS \ - 82, \ - 83, \ - 84, - -/* Existence and alternate IDs: */ -#define DT_N_S_leds_EXISTS 1 -#define DT_N_INST_0_gpio_leds DT_N_S_leds - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_leds_REG_NUM 0 -#define DT_N_S_leds_RANGES_NUM 0 -#define DT_N_S_leds_FOREACH_RANGE(fn) -#define DT_N_S_leds_IRQ_NUM 0 -#define DT_N_S_leds_IRQ_LEVEL 0 -#define DT_N_S_leds_COMPAT_MATCHES_gpio_leds 1 -#define DT_N_S_leds_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_leds_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_leds_P_compatible {"gpio-leds"} -#define DT_N_S_leds_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_leds_P_compatible_IDX_0 "gpio-leds" -#define DT_N_S_leds_P_compatible_IDX_0_STRING_UNQUOTED gpio-leds -#define DT_N_S_leds_P_compatible_IDX_0_STRING_TOKEN gpio_leds -#define DT_N_S_leds_P_compatible_IDX_0_STRING_UPPER_TOKEN GPIO_LEDS -#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds, compatible, 0) -#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds, compatible, 0) -#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__) -#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__) -#define DT_N_S_leds_P_compatible_LEN 1 -#define DT_N_S_leds_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_SUPPORTS_ORDS \ + 82, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_EXISTS 1 +#define DT_N_NODELABEL_tim1_ch2_pj11 DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_pinmux 4961 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11_P_output_high_EXISTS 1 /* - * Devicetree node: /leds/led_0 + * Devicetree node: /soc/timers@40010000/pwm * - * Node identifier: DT_N_S_leds_S_led_0 + * Node identifier: DT_N_S_soc_S_timers_40010000_S_pwm + * + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_leds_S_led_0_PATH "/leds/led_0" +#define DT_N_S_soc_S_timers_40010000_S_pwm_PATH "/soc/timers@40010000/pwm" /* Node's name with unit-address: */ -#define DT_N_S_leds_S_led_0_FULL_NAME "led_0" -#define DT_N_S_leds_S_led_0_FULL_NAME_UNQUOTED led_0 -#define DT_N_S_leds_S_led_0_FULL_NAME_TOKEN led_0 -#define DT_N_S_leds_S_led_0_FULL_NAME_UPPER_TOKEN LED_0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40010000_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40010000_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40010000_S_pwm_FULL_NAME_UPPER_TOKEN PWM -/* Node parent (/leds) identifier: */ -#define DT_N_S_leds_S_led_0_PARENT DT_N_S_leds +/* Node parent (/soc/timers@40010000) identifier: */ +#define DT_N_S_soc_S_timers_40010000_S_pwm_PARENT DT_N_S_soc_S_timers_40010000 /* Node's index in its parent's list of children: */ -#define DT_N_S_leds_S_led_0_CHILD_IDX 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_leds_S_led_0_NODELABEL_NUM 1 -#define DT_N_S_leds_S_led_0_FOREACH_NODELABEL(fn) fn(red_led) -#define DT_N_S_leds_S_led_0_FOREACH_NODELABEL_VARGS(fn, ...) fn(red_led, __VA_ARGS__) -#define DT_N_S_leds_S_led_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_leds) fn(DT_N) +#define DT_N_S_soc_S_timers_40010000_S_pwm_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_NODELABEL(fn) fn(pwm1) +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) fn(pwm1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_leds_S_led_0_CHILD_NUM 0 -#define DT_N_S_leds_S_led_0_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_leds_S_led_0_FOREACH_CHILD(fn) -#define DT_N_S_leds_S_led_0_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_leds_S_led_0_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_leds_S_led_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40010000_S_pwm_CHILD_NUM 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) /* Node's hash: */ -#define DT_N_S_leds_S_led_0_HASH kqSZv01Dnr_1hPdmxPVlr9u8kLMk_UWHIyVHG3GknSY +#define DT_N_S_soc_S_timers_40010000_S_pwm_HASH Z55Ao8vxhtP2i2tfz7SNLkdCnBJdzyWWXJ_lALG31Pk /* Node's dependency ordinal: */ -#define DT_N_S_leds_S_led_0_ORD 82 -#define DT_N_S_leds_S_led_0_ORD_STR_SORTABLE 00082 +#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD 82 +#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD_STR_SORTABLE 00082 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_leds_S_led_0_REQUIRES_ORDS \ - 53, \ +#define DT_N_S_soc_S_timers_40010000_S_pwm_REQUIRES_ORDS \ + 79, \ + 80, \ 81, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_leds_S_led_0_SUPPORTS_ORDS +#define DT_N_S_soc_S_timers_40010000_S_pwm_SUPPORTS_ORDS \ + 103, \ + 300, /* Existence and alternate IDs: */ -#define DT_N_S_leds_S_led_0_EXISTS 1 -#define DT_N_ALIAS_led0 DT_N_S_leds_S_led_0 -#define DT_N_NODELABEL_red_led DT_N_S_leds_S_led_0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_EXISTS 1 +#define DT_N_INST_0_st_stm32_pwm DT_N_S_soc_S_timers_40010000_S_pwm +#define DT_N_NODELABEL_pwm1 DT_N_S_soc_S_timers_40010000_S_pwm /* Macros for properties that are special in the specification: */ -#define DT_N_S_leds_S_led_0_REG_NUM 0 -#define DT_N_S_leds_S_led_0_RANGES_NUM 0 -#define DT_N_S_leds_S_led_0_FOREACH_RANGE(fn) -#define DT_N_S_leds_S_led_0_IRQ_NUM 0 -#define DT_N_S_leds_S_led_0_IRQ_LEVEL 0 -#define DT_N_S_leds_S_led_0_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_leds_S_led_0_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_EXISTS 1 -#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 -#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin 5 -#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin_EXISTS 1 -#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags 1 -#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags_EXISTS 1 -#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_0, gpios, 0) -#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_0, gpios, 0) -#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, gpios, 0, __VA_ARGS__) -#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, gpios, 0, __VA_ARGS__) -#define DT_N_S_leds_S_led_0_P_gpios_LEN 1 -#define DT_N_S_leds_S_led_0_P_gpios_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40010000_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40010000_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40010000_S_pwm_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40010000_S_pwm_PINCTRL_NUM 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_timers_40010000_S_pwm_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_timers_40010000_S_pwm_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8 +#define DT_N_S_soc_S_timers_40010000_S_pwm_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_0, 1) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_0, 1) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_names, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_names, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status "okay" +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /leds/led_1 + * Devicetree node: /soc/timers@40010400 * - * Node identifier: DT_N_S_leds_S_led_1 + * Node identifier: DT_N_S_soc_S_timers_40010400 + * + * Binding (compatible = st,stm32-timers): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_leds_S_led_1_PATH "/leds/led_1" +#define DT_N_S_soc_S_timers_40010400_PATH "/soc/timers@40010400" /* Node's name with unit-address: */ -#define DT_N_S_leds_S_led_1_FULL_NAME "led_1" -#define DT_N_S_leds_S_led_1_FULL_NAME_UNQUOTED led_1 -#define DT_N_S_leds_S_led_1_FULL_NAME_TOKEN led_1 -#define DT_N_S_leds_S_led_1_FULL_NAME_UPPER_TOKEN LED_1 +#define DT_N_S_soc_S_timers_40010400_FULL_NAME "timers@40010400" +#define DT_N_S_soc_S_timers_40010400_FULL_NAME_UNQUOTED timers@40010400 +#define DT_N_S_soc_S_timers_40010400_FULL_NAME_TOKEN timers_40010400 +#define DT_N_S_soc_S_timers_40010400_FULL_NAME_UPPER_TOKEN TIMERS_40010400 -/* Node parent (/leds) identifier: */ -#define DT_N_S_leds_S_led_1_PARENT DT_N_S_leds +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timers_40010400_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_leds_S_led_1_CHILD_IDX 1 +#define DT_N_S_soc_S_timers_40010400_CHILD_IDX 40 /* Helpers for dealing with node labels: */ -#define DT_N_S_leds_S_led_1_NODELABEL_NUM 1 -#define DT_N_S_leds_S_led_1_FOREACH_NODELABEL(fn) fn(green_led) -#define DT_N_S_leds_S_led_1_FOREACH_NODELABEL_VARGS(fn, ...) fn(green_led, __VA_ARGS__) -#define DT_N_S_leds_S_led_1_FOREACH_ANCESTOR(fn) fn(DT_N_S_leds) fn(DT_N) +#define DT_N_S_soc_S_timers_40010400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40010400_FOREACH_NODELABEL(fn) fn(timers8) +#define DT_N_S_soc_S_timers_40010400_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers8, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_leds_S_led_1_CHILD_NUM 0 -#define DT_N_S_leds_S_led_1_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_leds_S_led_1_FOREACH_CHILD(fn) -#define DT_N_S_leds_S_led_1_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_leds_S_led_1_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_leds_S_led_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40010400_CHILD_NUM 1 +#define DT_N_S_soc_S_timers_40010400_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40010400_S_pwm) +#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400_S_pwm) +#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_timers_40010400_S_pwm) +#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400_S_pwm) +#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) /* Node's hash: */ -#define DT_N_S_leds_S_led_1_HASH iXGpSU4KdWdLNkNXyuDlz5Q9aavHPvjTPItAJ_Q0T5c +#define DT_N_S_soc_S_timers_40010400_HASH NPzXzIr4jFBRLlwwLLrw1OQABEA_j6hU6F_PLAZ5J4U /* Node's dependency ordinal: */ -#define DT_N_S_leds_S_led_1_ORD 83 -#define DT_N_S_leds_S_led_1_ORD_STR_SORTABLE 00083 +#define DT_N_S_soc_S_timers_40010400_ORD 83 +#define DT_N_S_soc_S_timers_40010400_ORD_STR_SORTABLE 00083 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_leds_S_led_1_REQUIRES_ORDS \ - 53, \ - 81, +#define DT_N_S_soc_S_timers_40010400_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 51, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_leds_S_led_1_SUPPORTS_ORDS +#define DT_N_S_soc_S_timers_40010400_SUPPORTS_ORDS \ + 87, /* Existence and alternate IDs: */ -#define DT_N_S_leds_S_led_1_EXISTS 1 -#define DT_N_ALIAS_led1 DT_N_S_leds_S_led_1 -#define DT_N_NODELABEL_green_led DT_N_S_leds_S_led_1 - +#define DT_N_S_soc_S_timers_40010400_EXISTS 1 +#define DT_N_INST_2_st_stm32_timers DT_N_S_soc_S_timers_40010400 +#define DT_N_NODELABEL_timers8 DT_N_S_soc_S_timers_40010400 + /* Macros for properties that are special in the specification: */ -#define DT_N_S_leds_S_led_1_REG_NUM 0 -#define DT_N_S_leds_S_led_1_RANGES_NUM 0 -#define DT_N_S_leds_S_led_1_FOREACH_RANGE(fn) -#define DT_N_S_leds_S_led_1_IRQ_NUM 0 -#define DT_N_S_leds_S_led_1_IRQ_LEVEL 0 -#define DT_N_S_leds_S_led_1_STATUS_okay 1 +#define DT_N_S_soc_S_timers_40010400_REG_NUM 1 +#define DT_N_S_soc_S_timers_40010400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_REG_IDX_0_VAL_ADDRESS 1073808384 +#define DT_N_S_soc_S_timers_40010400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_timers_40010400_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40010400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40010400_IRQ_NUM 4 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_irq 43 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_irq 44 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_irq 45 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_irq 46 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40010400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_brk_VAL_irq DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_brk_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_brk_VAL_priority DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_brk_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_brk_CONTROLLER DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_up_VAL_irq DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_up_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_up_VAL_priority DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_up_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_up_CONTROLLER DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_trgcom_VAL_irq DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_irq +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_trgcom_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_trgcom_VAL_priority DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_priority +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_trgcom_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_trgcom_CONTROLLER DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_CONTROLLER +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_cc_VAL_irq DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_irq +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_cc_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_cc_VAL_priority DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_priority +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_cc_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_cc_CONTROLLER DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_CONTROLLER +#define DT_N_S_soc_S_timers_40010400_COMPAT_MATCHES_st_stm32_timers 1 +#define DT_N_S_soc_S_timers_40010400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40010400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_COMPAT_MODEL_IDX_0 "stm32-timers" +#define DT_N_S_soc_S_timers_40010400_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_leds_S_led_1_PINCTRL_NUM 0 +#define DT_N_S_soc_S_timers_40010400_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_EXISTS 1 -#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 -#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin 6 -#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin_EXISTS 1 -#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags 1 -#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags_EXISTS 1 -#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_1, gpios, 0) -#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_1, gpios, 0) -#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_1, gpios, 0, __VA_ARGS__) -#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_1, gpios, 0, __VA_ARGS__) -#define DT_N_S_leds_S_led_1_P_gpios_LEN 1 -#define DT_N_S_leds_S_led_1_P_gpios_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_reg {1073808384, 1024} +#define DT_N_S_soc_S_timers_40010400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_reg_IDX_0 1073808384 +#define DT_N_S_soc_S_timers_40010400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40010400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_VAL_bus 240 +#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_VAL_bits 2 +#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400, clocks, 0) +#define DT_N_S_soc_S_timers_40010400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400, clocks, 0) +#define DT_N_S_soc_S_timers_40010400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_P_clocks_LEN 1 +#define DT_N_S_soc_S_timers_40010400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_timers_40010400_P_resets_IDX_0_VAL_id 4865 +#define DT_N_S_soc_S_timers_40010400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400, resets, 0) +#define DT_N_S_soc_S_timers_40010400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400, resets, 0) +#define DT_N_S_soc_S_timers_40010400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_P_resets_LEN 1 +#define DT_N_S_soc_S_timers_40010400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_st_prescaler 100 +#define DT_N_S_soc_S_timers_40010400_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_st_countermode 0 +#define DT_N_S_soc_S_timers_40010400_P_st_countermode_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_status "okay" +#define DT_N_S_soc_S_timers_40010400_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40010400_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40010400_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40010400_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40010400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40010400_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400, status, 0) +#define DT_N_S_soc_S_timers_40010400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400, status, 0) +#define DT_N_S_soc_S_timers_40010400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40010400_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_compatible {"st,stm32-timers"} +#define DT_N_S_soc_S_timers_40010400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_compatible_IDX_0 "st,stm32-timers" +#define DT_N_S_soc_S_timers_40010400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers +#define DT_N_S_soc_S_timers_40010400_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers +#define DT_N_S_soc_S_timers_40010400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS +#define DT_N_S_soc_S_timers_40010400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400, compatible, 0) +#define DT_N_S_soc_S_timers_40010400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400, compatible, 0) +#define DT_N_S_soc_S_timers_40010400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40010400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupts {43, 0, 44, 0, 45, 0, 46, 0} +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_0 43 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_2 44 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_4 45 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_6 46 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_timers_40010400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names {"brk", "up", "trgcom", "cc"} +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_0 "brk" +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_0_STRING_UNQUOTED brk +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_0_STRING_TOKEN brk +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN BRK +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_1 "up" +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_1_STRING_UNQUOTED up +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_1_STRING_TOKEN up +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN UP +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_2 "trgcom" +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_2_STRING_UNQUOTED trgcom +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_2_STRING_TOKEN trgcom +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN TRGCOM +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_3 "cc" +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_3_STRING_UNQUOTED cc +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_3_STRING_TOKEN cc +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN CC +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 0) \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 1) \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 2) \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 3) +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 3) +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_LEN 4 +#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40010400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40010400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40010400_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /leds/led_2 + * Devicetree node: /soc/pin-controller@58020000/tim8_ch2_pj10 * - * Node identifier: DT_N_S_leds_S_led_2 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_leds_S_led_2_PATH "/leds/led_2" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_PATH "/soc/pin-controller@58020000/tim8_ch2_pj10" /* Node's name with unit-address: */ -#define DT_N_S_leds_S_led_2_FULL_NAME "led_2" -#define DT_N_S_leds_S_led_2_FULL_NAME_UNQUOTED led_2 -#define DT_N_S_leds_S_led_2_FULL_NAME_TOKEN led_2 -#define DT_N_S_leds_S_led_2_FULL_NAME_UPPER_TOKEN LED_2 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FULL_NAME "tim8_ch2_pj10" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FULL_NAME_UNQUOTED tim8_ch2_pj10 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FULL_NAME_TOKEN tim8_ch2_pj10 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FULL_NAME_UPPER_TOKEN TIM8_CH2_PJ10 -/* Node parent (/leds) identifier: */ -#define DT_N_S_leds_S_led_2_PARENT DT_N_S_leds +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_leds_S_led_2_CHILD_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_CHILD_IDX 102 /* Helpers for dealing with node labels: */ -#define DT_N_S_leds_S_led_2_NODELABEL_NUM 1 -#define DT_N_S_leds_S_led_2_FOREACH_NODELABEL(fn) fn(blue_led) -#define DT_N_S_leds_S_led_2_FOREACH_NODELABEL_VARGS(fn, ...) fn(blue_led, __VA_ARGS__) -#define DT_N_S_leds_S_led_2_FOREACH_ANCESTOR(fn) fn(DT_N_S_leds) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_NODELABEL(fn) fn(tim8_ch2_pj10) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_NODELABEL_VARGS(fn, ...) fn(tim8_ch2_pj10, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_leds_S_led_2_CHILD_NUM 0 -#define DT_N_S_leds_S_led_2_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_leds_S_led_2_FOREACH_CHILD(fn) -#define DT_N_S_leds_S_led_2_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_leds_S_led_2_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_leds_S_led_2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_leds_S_led_2_HASH KsPGInVliEI1PRs0DmyETNF7dyG4frBo_Z_DeHCKQaA +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_HASH z7zwnJJ9xtw1yw17PxJtfnvaEYNDLDLulK14tcqd6dE /* Node's dependency ordinal: */ -#define DT_N_S_leds_S_led_2_ORD 84 -#define DT_N_S_leds_S_led_2_ORD_STR_SORTABLE 00084 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_ORD 84 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_ORD_STR_SORTABLE 00084 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_leds_S_led_2_REQUIRES_ORDS \ - 53, \ - 81, +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_leds_S_led_2_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_SUPPORTS_ORDS \ + 87, /* Existence and alternate IDs: */ -#define DT_N_S_leds_S_led_2_EXISTS 1 -#define DT_N_ALIAS_led2 DT_N_S_leds_S_led_2 -#define DT_N_NODELABEL_blue_led DT_N_S_leds_S_led_2 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_EXISTS 1 +#define DT_N_NODELABEL_tim8_ch2_pj10 DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10 /* Macros for properties that are special in the specification: */ -#define DT_N_S_leds_S_led_2_REG_NUM 0 -#define DT_N_S_leds_S_led_2_RANGES_NUM 0 -#define DT_N_S_leds_S_led_2_FOREACH_RANGE(fn) -#define DT_N_S_leds_S_led_2_IRQ_NUM 0 -#define DT_N_S_leds_S_led_2_IRQ_LEVEL 0 -#define DT_N_S_leds_S_led_2_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_leds_S_led_2_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_EXISTS 1 -#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 -#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_pin 7 -#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_pin_EXISTS 1 -#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_flags 1 -#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_flags_EXISTS 1 -#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_2, gpios, 0) -#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_2, gpios, 0) -#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_2, gpios, 0, __VA_ARGS__) -#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_2, gpios, 0, __VA_ARGS__) -#define DT_N_S_leds_S_led_2_P_gpios_LEN 1 -#define DT_N_S_leds_S_led_2_P_gpios_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_pinmux 4931 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10_P_output_high_EXISTS 1 /* - * Devicetree node: /mcos + * Devicetree node: /soc/pin-controller@58020000/tim8_ch2n_pj7 * - * Node identifier: DT_N_S_mcos + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_mcos_PATH "/mcos" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_PATH "/soc/pin-controller@58020000/tim8_ch2n_pj7" /* Node's name with unit-address: */ -#define DT_N_S_mcos_FULL_NAME "mcos" -#define DT_N_S_mcos_FULL_NAME_UNQUOTED mcos -#define DT_N_S_mcos_FULL_NAME_TOKEN mcos -#define DT_N_S_mcos_FULL_NAME_UPPER_TOKEN MCOS +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FULL_NAME "tim8_ch2n_pj7" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FULL_NAME_UNQUOTED tim8_ch2n_pj7 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FULL_NAME_TOKEN tim8_ch2n_pj7 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FULL_NAME_UPPER_TOKEN TIM8_CH2N_PJ7 -/* Node parent (/) identifier: */ -#define DT_N_S_mcos_PARENT DT_N +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_mcos_CHILD_IDX 6 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_CHILD_IDX 101 /* Helpers for dealing with node labels: */ -#define DT_N_S_mcos_NODELABEL_NUM 0 -#define DT_N_S_mcos_FOREACH_NODELABEL(fn) -#define DT_N_S_mcos_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_mcos_FOREACH_ANCESTOR(fn) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_NODELABEL(fn) fn(tim8_ch2n_pj7) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_NODELABEL_VARGS(fn, ...) fn(tim8_ch2n_pj7, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_mcos_CHILD_NUM 2 -#define DT_N_S_mcos_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_mcos_FOREACH_CHILD(fn) fn(DT_N_S_mcos_S_mco1) fn(DT_N_S_mcos_S_mco2) -#define DT_N_S_mcos_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_mcos_S_mco1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos_S_mco2) -#define DT_N_S_mcos_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_mcos_S_mco1, __VA_ARGS__) fn(DT_N_S_mcos_S_mco2, __VA_ARGS__) -#define DT_N_S_mcos_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mcos_S_mco1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos_S_mco2, __VA_ARGS__) -#define DT_N_S_mcos_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_mcos_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_mcos_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_mcos_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_mcos_HASH 6SPQgIfzgP5rJNinRk1zLBq_DlKqwei9gyXlUnsq0Fg +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_HASH _XZAjEGm3GZ36S6Fp6jHncZ782pFpUUYxfi9cu_BFjM /* Node's dependency ordinal: */ -#define DT_N_S_mcos_ORD 85 -#define DT_N_S_mcos_ORD_STR_SORTABLE 00085 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_ORD 85 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_ORD_STR_SORTABLE 00085 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_mcos_REQUIRES_ORDS \ - 0, +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_mcos_SUPPORTS_ORDS \ - 86, \ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_SUPPORTS_ORDS \ 87, /* Existence and alternate IDs: */ -#define DT_N_S_mcos_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_EXISTS 1 +#define DT_N_NODELABEL_tim8_ch2n_pj7 DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7 /* Macros for properties that are special in the specification: */ -#define DT_N_S_mcos_REG_NUM 0 -#define DT_N_S_mcos_RANGES_NUM 0 -#define DT_N_S_mcos_FOREACH_RANGE(fn) -#define DT_N_S_mcos_IRQ_NUM 0 -#define DT_N_S_mcos_IRQ_LEVEL 0 -#define DT_N_S_mcos_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_mcos_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_PINCTRL_NUM 0 -/* (No generic property macros) */ +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_pinmux 4835 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7_P_output_high_EXISTS 1 /* - * Devicetree node: /mcos/mco1 + * Devicetree node: /soc/pin-controller@58020000/tim8_ch3n_ph15 * - * Node identifier: DT_N_S_mcos_S_mco1 - * - * Binding (compatible = st,stm32-clock-mco): - * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-clock-mco.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_mcos_S_mco1_PATH "/mcos/mco1" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_PATH "/soc/pin-controller@58020000/tim8_ch3n_ph15" /* Node's name with unit-address: */ -#define DT_N_S_mcos_S_mco1_FULL_NAME "mco1" -#define DT_N_S_mcos_S_mco1_FULL_NAME_UNQUOTED mco1 -#define DT_N_S_mcos_S_mco1_FULL_NAME_TOKEN mco1 -#define DT_N_S_mcos_S_mco1_FULL_NAME_UPPER_TOKEN MCO1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FULL_NAME "tim8_ch3n_ph15" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FULL_NAME_UNQUOTED tim8_ch3n_ph15 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FULL_NAME_TOKEN tim8_ch3n_ph15 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FULL_NAME_UPPER_TOKEN TIM8_CH3N_PH15 -/* Node parent (/mcos) identifier: */ -#define DT_N_S_mcos_S_mco1_PARENT DT_N_S_mcos +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_mcos_S_mco1_CHILD_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_CHILD_IDX 100 /* Helpers for dealing with node labels: */ -#define DT_N_S_mcos_S_mco1_NODELABEL_NUM 1 -#define DT_N_S_mcos_S_mco1_FOREACH_NODELABEL(fn) fn(mco1) -#define DT_N_S_mcos_S_mco1_FOREACH_NODELABEL_VARGS(fn, ...) fn(mco1, __VA_ARGS__) -#define DT_N_S_mcos_S_mco1_FOREACH_ANCESTOR(fn) fn(DT_N_S_mcos) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_NODELABEL(fn) fn(tim8_ch3n_ph15) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_NODELABEL_VARGS(fn, ...) fn(tim8_ch3n_ph15, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_mcos_S_mco1_CHILD_NUM 0 -#define DT_N_S_mcos_S_mco1_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_mcos_S_mco1_FOREACH_CHILD(fn) -#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_mcos_S_mco1_HASH fXW21upYnb1ZV4bEuBvKCXEcbrABE4XfjXq4dwS7rfY +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_HASH Ue2P8DMqXXMPfk_5sGV2h6nJtlU5jwqJqglHK7pSamk /* Node's dependency ordinal: */ -#define DT_N_S_mcos_S_mco1_ORD 86 -#define DT_N_S_mcos_S_mco1_ORD_STR_SORTABLE 00086 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_ORD 86 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_ORD_STR_SORTABLE 00086 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_mcos_S_mco1_REQUIRES_ORDS \ - 85, +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_mcos_S_mco1_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_SUPPORTS_ORDS \ + 87, /* Existence and alternate IDs: */ -#define DT_N_S_mcos_S_mco1_EXISTS 1 -#define DT_N_INST_0_st_stm32_clock_mco DT_N_S_mcos_S_mco1 -#define DT_N_NODELABEL_mco1 DT_N_S_mcos_S_mco1 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_mcos_S_mco1_REG_NUM 0 -#define DT_N_S_mcos_S_mco1_RANGES_NUM 0 -#define DT_N_S_mcos_S_mco1_FOREACH_RANGE(fn) -#define DT_N_S_mcos_S_mco1_IRQ_NUM 0 -#define DT_N_S_mcos_S_mco1_IRQ_LEVEL 0 -#define DT_N_S_mcos_S_mco1_COMPAT_MATCHES_st_stm32_clock_mco 1 -#define DT_N_S_mcos_S_mco1_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_mcos_S_mco1_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_mcos_S_mco1_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_mcos_S_mco1_COMPAT_MODEL_IDX_0 "stm32-clock-mco" -#define DT_N_S_mcos_S_mco1_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_mcos_S_mco1_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_mcos_S_mco1_P_status "disabled" -#define DT_N_S_mcos_S_mco1_P_status_STRING_UNQUOTED disabled -#define DT_N_S_mcos_S_mco1_P_status_STRING_TOKEN disabled -#define DT_N_S_mcos_S_mco1_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_mcos_S_mco1_P_status_IDX_0 "disabled" -#define DT_N_S_mcos_S_mco1_P_status_IDX_0_EXISTS 1 -#define DT_N_S_mcos_S_mco1_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_mcos_S_mco1_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_mcos_S_mco1_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mcos_S_mco1, status, 0) -#define DT_N_S_mcos_S_mco1_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mcos_S_mco1, status, 0) -#define DT_N_S_mcos_S_mco1_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mcos_S_mco1, status, 0, __VA_ARGS__) -#define DT_N_S_mcos_S_mco1_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mcos_S_mco1, status, 0, __VA_ARGS__) -#define DT_N_S_mcos_S_mco1_P_status_LEN 1 -#define DT_N_S_mcos_S_mco1_P_status_EXISTS 1 -#define DT_N_S_mcos_S_mco1_P_compatible {"st,stm32-clock-mco"} -#define DT_N_S_mcos_S_mco1_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_mcos_S_mco1_P_compatible_IDX_0 "st,stm32-clock-mco" -#define DT_N_S_mcos_S_mco1_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-clock-mco -#define DT_N_S_mcos_S_mco1_P_compatible_IDX_0_STRING_TOKEN st_stm32_clock_mco -#define DT_N_S_mcos_S_mco1_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_CLOCK_MCO -#define DT_N_S_mcos_S_mco1_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mcos_S_mco1, compatible, 0) -#define DT_N_S_mcos_S_mco1_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mcos_S_mco1, compatible, 0) -#define DT_N_S_mcos_S_mco1_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mcos_S_mco1, compatible, 0, __VA_ARGS__) -#define DT_N_S_mcos_S_mco1_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mcos_S_mco1, compatible, 0, __VA_ARGS__) -#define DT_N_S_mcos_S_mco1_P_compatible_LEN 1 -#define DT_N_S_mcos_S_mco1_P_compatible_EXISTS 1 -#define DT_N_S_mcos_S_mco1_P_zephyr_deferred_init 0 -#define DT_N_S_mcos_S_mco1_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_mcos_S_mco1_P_wakeup_source 0 -#define DT_N_S_mcos_S_mco1_P_wakeup_source_EXISTS 1 -#define DT_N_S_mcos_S_mco1_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_mcos_S_mco1_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_EXISTS 1 +#define DT_N_NODELABEL_tim8_ch3n_ph15 DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_pinmux 4067 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15_P_output_high_EXISTS 1 /* - * Devicetree node: /mcos/mco2 + * Devicetree node: /soc/timers@40010400/pwm * - * Node identifier: DT_N_S_mcos_S_mco2 + * Node identifier: DT_N_S_soc_S_timers_40010400_S_pwm * - * Binding (compatible = st,stm32-clock-mco): - * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-clock-mco.yaml + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_mcos_S_mco2_PATH "/mcos/mco2" +#define DT_N_S_soc_S_timers_40010400_S_pwm_PATH "/soc/timers@40010400/pwm" /* Node's name with unit-address: */ -#define DT_N_S_mcos_S_mco2_FULL_NAME "mco2" -#define DT_N_S_mcos_S_mco2_FULL_NAME_UNQUOTED mco2 -#define DT_N_S_mcos_S_mco2_FULL_NAME_TOKEN mco2 -#define DT_N_S_mcos_S_mco2_FULL_NAME_UPPER_TOKEN MCO2 +#define DT_N_S_soc_S_timers_40010400_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40010400_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40010400_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40010400_S_pwm_FULL_NAME_UPPER_TOKEN PWM -/* Node parent (/mcos) identifier: */ -#define DT_N_S_mcos_S_mco2_PARENT DT_N_S_mcos +/* Node parent (/soc/timers@40010400) identifier: */ +#define DT_N_S_soc_S_timers_40010400_S_pwm_PARENT DT_N_S_soc_S_timers_40010400 /* Node's index in its parent's list of children: */ -#define DT_N_S_mcos_S_mco2_CHILD_IDX 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_mcos_S_mco2_NODELABEL_NUM 1 -#define DT_N_S_mcos_S_mco2_FOREACH_NODELABEL(fn) fn(mco2) -#define DT_N_S_mcos_S_mco2_FOREACH_NODELABEL_VARGS(fn, ...) fn(mco2, __VA_ARGS__) -#define DT_N_S_mcos_S_mco2_FOREACH_ANCESTOR(fn) fn(DT_N_S_mcos) fn(DT_N) +#define DT_N_S_soc_S_timers_40010400_S_pwm_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_NODELABEL(fn) fn(pwm8) +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) fn(pwm8, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40010400) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_mcos_S_mco2_CHILD_NUM 0 -#define DT_N_S_mcos_S_mco2_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_mcos_S_mco2_FOREACH_CHILD(fn) -#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40010400_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_mcos_S_mco2_HASH irDa5qZM1apmLNBL8AyfbwMybA8MLSxOkE_OVqE7xC0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_HASH eluEMoLASiCnBNpjXGb0gqHlmoRtkjfjgbVEXs4QAVA /* Node's dependency ordinal: */ -#define DT_N_S_mcos_S_mco2_ORD 87 -#define DT_N_S_mcos_S_mco2_ORD_STR_SORTABLE 00087 +#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD 87 +#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD_STR_SORTABLE 00087 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_mcos_S_mco2_REQUIRES_ORDS \ - 85, +#define DT_N_S_soc_S_timers_40010400_S_pwm_REQUIRES_ORDS \ + 83, \ + 84, \ + 85, \ + 86, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_mcos_S_mco2_SUPPORTS_ORDS +#define DT_N_S_soc_S_timers_40010400_S_pwm_SUPPORTS_ORDS \ + 103, /* Existence and alternate IDs: */ -#define DT_N_S_mcos_S_mco2_EXISTS 1 -#define DT_N_INST_1_st_stm32_clock_mco DT_N_S_mcos_S_mco2 -#define DT_N_NODELABEL_mco2 DT_N_S_mcos_S_mco2 +#define DT_N_S_soc_S_timers_40010400_S_pwm_EXISTS 1 +#define DT_N_INST_2_st_stm32_pwm DT_N_S_soc_S_timers_40010400_S_pwm +#define DT_N_NODELABEL_pwm8 DT_N_S_soc_S_timers_40010400_S_pwm /* Macros for properties that are special in the specification: */ -#define DT_N_S_mcos_S_mco2_REG_NUM 0 -#define DT_N_S_mcos_S_mco2_RANGES_NUM 0 -#define DT_N_S_mcos_S_mco2_FOREACH_RANGE(fn) -#define DT_N_S_mcos_S_mco2_IRQ_NUM 0 -#define DT_N_S_mcos_S_mco2_IRQ_LEVEL 0 -#define DT_N_S_mcos_S_mco2_COMPAT_MATCHES_st_stm32_clock_mco 1 -#define DT_N_S_mcos_S_mco2_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_mcos_S_mco2_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_mcos_S_mco2_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_mcos_S_mco2_COMPAT_MODEL_IDX_0 "stm32-clock-mco" -#define DT_N_S_mcos_S_mco2_STATUS_disabled 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40010400_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40010400_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40010400_S_pwm_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_timers_40010400_S_pwm_PINCTRL_NUM 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_timers_40010400_S_pwm_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_timers_40010400_S_pwm_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15 +#define DT_N_S_soc_S_timers_40010400_S_pwm_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10 +#define DT_N_S_soc_S_timers_40010400_S_pwm_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7 + +/* Generic property macros: */ +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 1) \ + fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 2) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 2) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 2, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_0, 2, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_LEN 3 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_names, 0) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_names, 0) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status "okay" +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40010400_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_mcos_S_mco2_PINCTRL_NUM 0 +/* + * Devicetree node: /otghs_ulpis_phy + * + * Node identifier: DT_N_S_otghs_ulpis_phy + * + * Binding (compatible = usb-ulpi-phy): + * $ZEPHYR_BASE/dts/bindings/phy/usb-ulpi-phy.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ -/* Generic property macros: */ -#define DT_N_S_mcos_S_mco2_P_status "disabled" -#define DT_N_S_mcos_S_mco2_P_status_STRING_UNQUOTED disabled -#define DT_N_S_mcos_S_mco2_P_status_STRING_TOKEN disabled -#define DT_N_S_mcos_S_mco2_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_mcos_S_mco2_P_status_IDX_0 "disabled" -#define DT_N_S_mcos_S_mco2_P_status_IDX_0_EXISTS 1 -#define DT_N_S_mcos_S_mco2_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_mcos_S_mco2_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_mcos_S_mco2_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mcos_S_mco2, status, 0) -#define DT_N_S_mcos_S_mco2_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mcos_S_mco2, status, 0) -#define DT_N_S_mcos_S_mco2_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mcos_S_mco2, status, 0, __VA_ARGS__) -#define DT_N_S_mcos_S_mco2_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mcos_S_mco2, status, 0, __VA_ARGS__) -#define DT_N_S_mcos_S_mco2_P_status_LEN 1 -#define DT_N_S_mcos_S_mco2_P_status_EXISTS 1 -#define DT_N_S_mcos_S_mco2_P_compatible {"st,stm32-clock-mco"} -#define DT_N_S_mcos_S_mco2_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_mcos_S_mco2_P_compatible_IDX_0 "st,stm32-clock-mco" -#define DT_N_S_mcos_S_mco2_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-clock-mco -#define DT_N_S_mcos_S_mco2_P_compatible_IDX_0_STRING_TOKEN st_stm32_clock_mco -#define DT_N_S_mcos_S_mco2_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_CLOCK_MCO -#define DT_N_S_mcos_S_mco2_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mcos_S_mco2, compatible, 0) -#define DT_N_S_mcos_S_mco2_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mcos_S_mco2, compatible, 0) -#define DT_N_S_mcos_S_mco2_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mcos_S_mco2, compatible, 0, __VA_ARGS__) -#define DT_N_S_mcos_S_mco2_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mcos_S_mco2, compatible, 0, __VA_ARGS__) -#define DT_N_S_mcos_S_mco2_P_compatible_LEN 1 -#define DT_N_S_mcos_S_mco2_P_compatible_EXISTS 1 -#define DT_N_S_mcos_S_mco2_P_zephyr_deferred_init 0 -#define DT_N_S_mcos_S_mco2_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_mcos_S_mco2_P_wakeup_source 0 -#define DT_N_S_mcos_S_mco2_P_wakeup_source_EXISTS 1 -#define DT_N_S_mcos_S_mco2_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_mcos_S_mco2_P_zephyr_pm_device_runtime_auto_EXISTS 1 +/* Node's full path: */ +#define DT_N_S_otghs_ulpis_phy_PATH "/otghs_ulpis_phy" + +/* Node's name with unit-address: */ +#define DT_N_S_otghs_ulpis_phy_FULL_NAME "otghs_ulpis_phy" +#define DT_N_S_otghs_ulpis_phy_FULL_NAME_UNQUOTED otghs_ulpis_phy +#define DT_N_S_otghs_ulpis_phy_FULL_NAME_TOKEN otghs_ulpis_phy +#define DT_N_S_otghs_ulpis_phy_FULL_NAME_UPPER_TOKEN OTGHS_ULPIS_PHY + +/* Node parent (/) identifier: */ +#define DT_N_S_otghs_ulpis_phy_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_otghs_ulpis_phy_CHILD_IDX 21 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_otghs_ulpis_phy_NODELABEL_NUM 1 +#define DT_N_S_otghs_ulpis_phy_FOREACH_NODELABEL(fn) fn(otghs_ulpi_phy) +#define DT_N_S_otghs_ulpis_phy_FOREACH_NODELABEL_VARGS(fn, ...) fn(otghs_ulpi_phy, __VA_ARGS__) +#define DT_N_S_otghs_ulpis_phy_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_otghs_ulpis_phy_CHILD_NUM 0 +#define DT_N_S_otghs_ulpis_phy_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD(fn) +#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_otghs_ulpis_phy_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_otghs_ulpis_phy_HASH 8TtiUvwpO7cQW1Sp8PFxPYL0Tl8rgjoRjCXgOZZ8Rwg + +/* Node's dependency ordinal: */ +#define DT_N_S_otghs_ulpis_phy_ORD 88 +#define DT_N_S_otghs_ulpis_phy_ORD_STR_SORTABLE 00088 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_otghs_ulpis_phy_REQUIRES_ORDS \ + 0, \ + 14, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_otghs_ulpis_phy_SUPPORTS_ORDS \ + 101, + +/* Existence and alternate IDs: */ +#define DT_N_S_otghs_ulpis_phy_EXISTS 1 +#define DT_N_INST_0_usb_ulpi_phy DT_N_S_otghs_ulpis_phy +#define DT_N_NODELABEL_otghs_ulpi_phy DT_N_S_otghs_ulpis_phy + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_otghs_ulpis_phy_REG_NUM 0 +#define DT_N_S_otghs_ulpis_phy_RANGES_NUM 0 +#define DT_N_S_otghs_ulpis_phy_FOREACH_RANGE(fn) +#define DT_N_S_otghs_ulpis_phy_IRQ_NUM 0 +#define DT_N_S_otghs_ulpis_phy_IRQ_LEVEL 0 +#define DT_N_S_otghs_ulpis_phy_COMPAT_MATCHES_usb_ulpi_phy 1 +#define DT_N_S_otghs_ulpis_phy_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_otghs_ulpis_phy_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_EXISTS 1 +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_VAL_pin 4 +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_VAL_flags 1 +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_otghs_ulpis_phy, reset_gpios, 0) +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_otghs_ulpis_phy, reset_gpios, 0) +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_otghs_ulpis_phy, reset_gpios, 0, __VA_ARGS__) +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_otghs_ulpis_phy, reset_gpios, 0, __VA_ARGS__) +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_LEN 1 +#define DT_N_S_otghs_ulpis_phy_P_reset_gpios_EXISTS 1 +#define DT_N_S_otghs_ulpis_phy_P_compatible {"usb-ulpi-phy"} +#define DT_N_S_otghs_ulpis_phy_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_otghs_ulpis_phy_P_compatible_IDX_0 "usb-ulpi-phy" +#define DT_N_S_otghs_ulpis_phy_P_compatible_IDX_0_STRING_UNQUOTED usb-ulpi-phy +#define DT_N_S_otghs_ulpis_phy_P_compatible_IDX_0_STRING_TOKEN usb_ulpi_phy +#define DT_N_S_otghs_ulpis_phy_P_compatible_IDX_0_STRING_UPPER_TOKEN USB_ULPI_PHY +#define DT_N_S_otghs_ulpis_phy_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_otghs_ulpis_phy, compatible, 0) +#define DT_N_S_otghs_ulpis_phy_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_otghs_ulpis_phy, compatible, 0) +#define DT_N_S_otghs_ulpis_phy_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_otghs_ulpis_phy, compatible, 0, __VA_ARGS__) +#define DT_N_S_otghs_ulpis_phy_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_otghs_ulpis_phy, compatible, 0, __VA_ARGS__) +#define DT_N_S_otghs_ulpis_phy_P_compatible_LEN 1 +#define DT_N_S_otghs_ulpis_phy_P_compatible_EXISTS 1 +#define DT_N_S_otghs_ulpis_phy_P_zephyr_deferred_init 0 +#define DT_N_S_otghs_ulpis_phy_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_otghs_ulpis_phy_P_wakeup_source 0 +#define DT_N_S_otghs_ulpis_phy_P_wakeup_source_EXISTS 1 +#define DT_N_S_otghs_ulpis_phy_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_otghs_ulpis_phy_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/adc@40022000 - * - * Node identifier: DT_N_S_soc_S_adc_40022000 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_ck_pa5 * - * Binding (compatible = st,stm32-adc): - * $ZEPHYR_BASE/dts/bindings/adc/st,stm32-adc.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_adc_40022000_PATH "/soc/adc@40022000" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_ck_pa5" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_adc_40022000_FULL_NAME "adc@40022000" -#define DT_N_S_soc_S_adc_40022000_FULL_NAME_UNQUOTED adc@40022000 -#define DT_N_S_soc_S_adc_40022000_FULL_NAME_TOKEN adc_40022000 -#define DT_N_S_soc_S_adc_40022000_FULL_NAME_UPPER_TOKEN ADC_40022000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FULL_NAME "usb_otg_hs_ulpi_ck_pa5" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_ck_pa5 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FULL_NAME_TOKEN usb_otg_hs_ulpi_ck_pa5 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_CK_PA5 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_adc_40022000_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_adc_40022000_CHILD_IDX 48 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_CHILD_IDX 116 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_adc_40022000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_adc_40022000_FOREACH_NODELABEL(fn) fn(adc1) -#define DT_N_S_soc_S_adc_40022000_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_ck_pa5) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_adc_40022000_CHILD_NUM 0 -#define DT_N_S_soc_S_adc_40022000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_adc_40022000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_adc_40022000_HASH tpkd51fjWnjhbmlkM7KN0vPfDwGBvEfx4X59MB9U7oQ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_HASH 4kWJROAbFxHCnEz5tN1XnFUhB25VeU1tcS10Jk7PHio /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022000_ORD 88 -#define DT_N_S_soc_S_adc_40022000_ORD_STR_SORTABLE 00088 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_ORD 89 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_ORD_STR_SORTABLE 00089 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_adc_40022000_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_adc_40022000_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_adc_40022000_EXISTS 1 -#define DT_N_INST_0_st_stm32_adc DT_N_S_soc_S_adc_40022000 -#define DT_N_NODELABEL_adc1 DT_N_S_soc_S_adc_40022000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_ck_pa5 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_adc_40022000_REG_NUM 1 -#define DT_N_S_soc_S_adc_40022000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_REG_IDX_0_VAL_ADDRESS 1073881088 -#define DT_N_S_soc_S_adc_40022000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_adc_40022000_RANGES_NUM 0 -#define DT_N_S_soc_S_adc_40022000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_adc_40022000_IRQ_NUM 1 -#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_VAL_irq 18 -#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_adc_40022000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_adc_40022000_COMPAT_MATCHES_st_stm32_adc 1 -#define DT_N_S_soc_S_adc_40022000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_adc_40022000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_COMPAT_MODEL_IDX_0 "stm32-adc" -#define DT_N_S_soc_S_adc_40022000_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_adc_40022000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_adc_40022000_P_reg {1073881088, 1024} -#define DT_N_S_soc_S_adc_40022000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_reg_IDX_0 1073881088 -#define DT_N_S_soc_S_adc_40022000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_adc_40022000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_VAL_bus 216 -#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_VAL_bits 32 -#define DT_N_S_soc_S_adc_40022000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, clocks, 0) -#define DT_N_S_soc_S_adc_40022000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, clocks, 0) -#define DT_N_S_soc_S_adc_40022000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_clocks_LEN 1 -#define DT_N_S_soc_S_adc_40022000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_interrupts {18, 0} -#define DT_N_S_soc_S_adc_40022000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_interrupts_IDX_0 18 -#define DT_N_S_soc_S_adc_40022000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_adc_40022000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_vref_mv 3300 -#define DT_N_S_soc_S_adc_40022000_P_vref_mv_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_resolutions {8446476, 7725580, 6742540, 5497356, 4710924} -#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_0 8446476 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_1 7725580 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_2 6742540 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_3 5497356 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_IDX_4 4710924 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, resolutions, 0) \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 1) \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 2) \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 3) \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 4) -#define DT_N_S_soc_S_adc_40022000_P_resolutions_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, resolutions, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 4) -#define DT_N_S_soc_S_adc_40022000_P_resolutions_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, resolutions, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 4, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_resolutions_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, resolutions, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, resolutions, 4, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_resolutions_LEN 5 -#define DT_N_S_soc_S_adc_40022000_P_resolutions_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times {2, 3, 9, 17, 33, 65, 388, 811} -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_0 2 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_1 3 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_2 9 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_3 17 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_4 33 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_5 65 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_6 388 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_IDX_7 811 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, sampling_times, 0) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 1) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 2) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 3) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 4) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 5) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 6) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 7) -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, sampling_times, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 6) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 7) -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, sampling_times, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 6, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 7, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, sampling_times, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022000, sampling_times, 7, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_LEN 8 -#define DT_N_S_soc_S_adc_40022000_P_sampling_times_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer "FULLY_CONFIGURABLE" -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_STRING_UNQUOTED FULLY_CONFIGURABLE -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_STRING_TOKEN FULLY_CONFIGURABLE -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_STRING_UPPER_TOKEN FULLY_CONFIGURABLE -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_IDX_0 "FULLY_CONFIGURABLE" -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_IDX_0_ENUM_VAL_FULLY_CONFIGURABLE_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, st_adc_sequencer, 0) -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, st_adc_sequencer, 0) -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, st_adc_sequencer, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, st_adc_sequencer, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_LEN 1 -#define DT_N_S_soc_S_adc_40022000_P_st_adc_sequencer_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler "OVERSAMPLER_EXTENDED" -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_STRING_UNQUOTED OVERSAMPLER_EXTENDED -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_STRING_TOKEN OVERSAMPLER_EXTENDED -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_STRING_UPPER_TOKEN OVERSAMPLER_EXTENDED -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_IDX_0 "OVERSAMPLER_EXTENDED" -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_IDX_0_ENUM_VAL_OVERSAMPLER_EXTENDED_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, st_adc_oversampler, 0) -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, st_adc_oversampler, 0) -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, st_adc_oversampler, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, st_adc_oversampler, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_LEN 1 -#define DT_N_S_soc_S_adc_40022000_P_st_adc_oversampler_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_status "disabled" -#define DT_N_S_soc_S_adc_40022000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_adc_40022000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_adc_40022000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_adc_40022000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_adc_40022000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_adc_40022000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, status, 0) -#define DT_N_S_soc_S_adc_40022000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, status, 0) -#define DT_N_S_soc_S_adc_40022000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_status_LEN 1 -#define DT_N_S_soc_S_adc_40022000_P_status_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_compatible {"st,stm32-adc"} -#define DT_N_S_soc_S_adc_40022000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_compatible_IDX_0 "st,stm32-adc" -#define DT_N_S_soc_S_adc_40022000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-adc -#define DT_N_S_soc_S_adc_40022000_P_compatible_IDX_0_STRING_TOKEN st_stm32_adc -#define DT_N_S_soc_S_adc_40022000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_ADC -#define DT_N_S_soc_S_adc_40022000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000, compatible, 0) -#define DT_N_S_soc_S_adc_40022000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000, compatible, 0) -#define DT_N_S_soc_S_adc_40022000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022000_P_compatible_LEN 1 -#define DT_N_S_soc_S_adc_40022000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_adc_40022000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_wakeup_source 0 -#define DT_N_S_soc_S_adc_40022000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_adc_40022000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_adc_40022000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_pinmux 170 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/adc@40022100 - * - * Node identifier: DT_N_S_soc_S_adc_40022100 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d0_pa3 * - * Binding (compatible = st,stm32-adc): - * $ZEPHYR_BASE/dts/bindings/adc/st,stm32-adc.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_adc_40022100_PATH "/soc/adc@40022100" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d0_pa3" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_adc_40022100_FULL_NAME "adc@40022100" -#define DT_N_S_soc_S_adc_40022100_FULL_NAME_UNQUOTED adc@40022100 -#define DT_N_S_soc_S_adc_40022100_FULL_NAME_TOKEN adc_40022100 -#define DT_N_S_soc_S_adc_40022100_FULL_NAME_UPPER_TOKEN ADC_40022100 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FULL_NAME "usb_otg_hs_ulpi_d0_pa3" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d0_pa3 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FULL_NAME_TOKEN usb_otg_hs_ulpi_d0_pa3 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D0_PA3 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_adc_40022100_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_adc_40022100_CHILD_IDX 49 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_CHILD_IDX 115 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_adc_40022100_NODELABEL_NUM 1 -#define DT_N_S_soc_S_adc_40022100_FOREACH_NODELABEL(fn) fn(adc2) -#define DT_N_S_soc_S_adc_40022100_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc2, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d0_pa3) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_adc_40022100_CHILD_NUM 0 -#define DT_N_S_soc_S_adc_40022100_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_adc_40022100_HASH 4U_WPGl_W8gUvDeIA3SWcWP6hyywf4KlEJf4J6Sx3cA +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_HASH MWthDZBNt4OQY0fU_alHxqudMKndAl6p_6GgHQhYfqI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022100_ORD 89 -#define DT_N_S_soc_S_adc_40022100_ORD_STR_SORTABLE 00089 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_ORD 90 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_ORD_STR_SORTABLE 00090 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_adc_40022100_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_adc_40022100_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_adc_40022100_EXISTS 1 -#define DT_N_INST_1_st_stm32_adc DT_N_S_soc_S_adc_40022100 -#define DT_N_NODELABEL_adc2 DT_N_S_soc_S_adc_40022100 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_d0_pa3 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_adc_40022100_REG_NUM 1 -#define DT_N_S_soc_S_adc_40022100_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_REG_IDX_0_VAL_ADDRESS 1073881344 -#define DT_N_S_soc_S_adc_40022100_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_adc_40022100_RANGES_NUM 0 -#define DT_N_S_soc_S_adc_40022100_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_adc_40022100_IRQ_NUM 1 -#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_VAL_irq 18 -#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_adc_40022100_IRQ_LEVEL 1 -#define DT_N_S_soc_S_adc_40022100_COMPAT_MATCHES_st_stm32_adc 1 -#define DT_N_S_soc_S_adc_40022100_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_adc_40022100_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_COMPAT_MODEL_IDX_0 "stm32-adc" -#define DT_N_S_soc_S_adc_40022100_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_adc_40022100_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_adc_40022100_P_reg {1073881344, 1024} -#define DT_N_S_soc_S_adc_40022100_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_reg_IDX_0 1073881344 -#define DT_N_S_soc_S_adc_40022100_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_adc_40022100_P_reg_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_VAL_bus 216 -#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_VAL_bits 32 -#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, clocks, 0) -#define DT_N_S_soc_S_adc_40022100_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, clocks, 0) -#define DT_N_S_soc_S_adc_40022100_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_clocks_LEN 1 -#define DT_N_S_soc_S_adc_40022100_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_interrupts {18, 0} -#define DT_N_S_soc_S_adc_40022100_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_interrupts_IDX_0 18 -#define DT_N_S_soc_S_adc_40022100_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_adc_40022100_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_vref_mv 3300 -#define DT_N_S_soc_S_adc_40022100_P_vref_mv_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_resolutions {8446476, 7725580, 6742540, 5497356, 4710924} -#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_0 8446476 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_1 7725580 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_2 6742540 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_3 5497356 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_4 4710924 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, resolutions, 0) \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 1) \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 2) \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 3) \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 4) -#define DT_N_S_soc_S_adc_40022100_P_resolutions_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, resolutions, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 4) -#define DT_N_S_soc_S_adc_40022100_P_resolutions_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, resolutions, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 4, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_resolutions_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, resolutions, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, resolutions, 4, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_resolutions_LEN 5 -#define DT_N_S_soc_S_adc_40022100_P_resolutions_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times {2, 3, 9, 17, 33, 65, 388, 811} -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_0 2 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_1 3 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_2 9 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_3 17 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_4 33 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_5 65 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_6 388 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_7 811 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, sampling_times, 0) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 1) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 2) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 3) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 4) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 5) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 6) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 7) -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, sampling_times, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 6) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 7) -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, sampling_times, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 6, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 7, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, sampling_times, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022100, sampling_times, 7, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_LEN 8 -#define DT_N_S_soc_S_adc_40022100_P_sampling_times_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer "FULLY_CONFIGURABLE" -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_STRING_UNQUOTED FULLY_CONFIGURABLE -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_STRING_TOKEN FULLY_CONFIGURABLE -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_STRING_UPPER_TOKEN FULLY_CONFIGURABLE -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_IDX_0 "FULLY_CONFIGURABLE" -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_IDX_0_ENUM_VAL_FULLY_CONFIGURABLE_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, st_adc_sequencer, 0) -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, st_adc_sequencer, 0) -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, st_adc_sequencer, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, st_adc_sequencer, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_LEN 1 -#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler "OVERSAMPLER_EXTENDED" -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_STRING_UNQUOTED OVERSAMPLER_EXTENDED -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_STRING_TOKEN OVERSAMPLER_EXTENDED -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_STRING_UPPER_TOKEN OVERSAMPLER_EXTENDED -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_IDX_0 "OVERSAMPLER_EXTENDED" -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_IDX_0_ENUM_VAL_OVERSAMPLER_EXTENDED_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, st_adc_oversampler, 0) -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, st_adc_oversampler, 0) -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, st_adc_oversampler, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, st_adc_oversampler, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_LEN 1 -#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_status "disabled" -#define DT_N_S_soc_S_adc_40022100_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_adc_40022100_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_adc_40022100_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_adc_40022100_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_adc_40022100_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_adc_40022100_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, status, 0) -#define DT_N_S_soc_S_adc_40022100_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, status, 0) -#define DT_N_S_soc_S_adc_40022100_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_status_LEN 1 -#define DT_N_S_soc_S_adc_40022100_P_status_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_compatible {"st,stm32-adc"} -#define DT_N_S_soc_S_adc_40022100_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_compatible_IDX_0 "st,stm32-adc" -#define DT_N_S_soc_S_adc_40022100_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-adc -#define DT_N_S_soc_S_adc_40022100_P_compatible_IDX_0_STRING_TOKEN st_stm32_adc -#define DT_N_S_soc_S_adc_40022100_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_ADC -#define DT_N_S_soc_S_adc_40022100_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, compatible, 0) -#define DT_N_S_soc_S_adc_40022100_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, compatible, 0) -#define DT_N_S_soc_S_adc_40022100_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022100_P_compatible_LEN 1 -#define DT_N_S_soc_S_adc_40022100_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_adc_40022100_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_wakeup_source 0 -#define DT_N_S_soc_S_adc_40022100_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_adc_40022100_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_adc_40022100_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_pinmux 106 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/adc@40022300 - * - * Node identifier: DT_N_S_soc_S_adc_40022300 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d1_pb0 * - * Binding (compatible = st,stm32-adc): - * $ZEPHYR_BASE/dts/bindings/adc/st,stm32-adc.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_adc_40022300_PATH "/soc/adc@40022300" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d1_pb0" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_adc_40022300_FULL_NAME "adc@40022300" -#define DT_N_S_soc_S_adc_40022300_FULL_NAME_UNQUOTED adc@40022300 -#define DT_N_S_soc_S_adc_40022300_FULL_NAME_TOKEN adc_40022300 -#define DT_N_S_soc_S_adc_40022300_FULL_NAME_UPPER_TOKEN ADC_40022300 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FULL_NAME "usb_otg_hs_ulpi_d1_pb0" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d1_pb0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FULL_NAME_TOKEN usb_otg_hs_ulpi_d1_pb0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D1_PB0 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_adc_40022300_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_adc_40022300_CHILD_IDX 50 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_CHILD_IDX 117 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_adc_40022300_NODELABEL_NUM 1 -#define DT_N_S_soc_S_adc_40022300_FOREACH_NODELABEL(fn) fn(adc1_2) -#define DT_N_S_soc_S_adc_40022300_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1_2, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d1_pb0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_adc_40022300_CHILD_NUM 0 -#define DT_N_S_soc_S_adc_40022300_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_adc_40022300_HASH uJa5ETN902l5AFBbkdof9dPJZqWcKf230NUbZ1RNIcQ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_HASH wvoy7R5TzAoXTFg_Ydd3z7Q5orEqY9_DbOiRJVXa7yc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_adc_40022300_ORD 90 -#define DT_N_S_soc_S_adc_40022300_ORD_STR_SORTABLE 00090 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_ORD 91 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_ORD_STR_SORTABLE 00091 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_adc_40022300_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_adc_40022300_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_adc_40022300_EXISTS 1 -#define DT_N_INST_2_st_stm32_adc DT_N_S_soc_S_adc_40022300 -#define DT_N_NODELABEL_adc1_2 DT_N_S_soc_S_adc_40022300 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_d1_pb0 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_adc_40022300_REG_NUM 1 -#define DT_N_S_soc_S_adc_40022300_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_REG_IDX_0_VAL_ADDRESS 1073881856 -#define DT_N_S_soc_S_adc_40022300_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_adc_40022300_RANGES_NUM 0 -#define DT_N_S_soc_S_adc_40022300_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_adc_40022300_IRQ_NUM 1 -#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_VAL_irq 18 -#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_adc_40022300_IRQ_LEVEL 1 -#define DT_N_S_soc_S_adc_40022300_COMPAT_MATCHES_st_stm32_adc 1 -#define DT_N_S_soc_S_adc_40022300_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_adc_40022300_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_COMPAT_MODEL_IDX_0 "stm32-adc" -#define DT_N_S_soc_S_adc_40022300_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_adc_40022300_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_adc_40022300_P_reg {1073881856, 1024} -#define DT_N_S_soc_S_adc_40022300_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_reg_IDX_0 1073881856 -#define DT_N_S_soc_S_adc_40022300_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_adc_40022300_P_reg_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_VAL_bus 216 -#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_VAL_bits 32 -#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, clocks, 0) -#define DT_N_S_soc_S_adc_40022300_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, clocks, 0) -#define DT_N_S_soc_S_adc_40022300_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_clocks_LEN 1 -#define DT_N_S_soc_S_adc_40022300_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_interrupts {18, 0} -#define DT_N_S_soc_S_adc_40022300_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_interrupts_IDX_0 18 -#define DT_N_S_soc_S_adc_40022300_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_adc_40022300_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_vref_mv 3300 -#define DT_N_S_soc_S_adc_40022300_P_vref_mv_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_resolutions {8446476, 7725580, 6742540, 5497356, 4710924} -#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_0 8446476 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_1 7725580 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_2 6742540 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_3 5497356 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_4 4710924 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, resolutions, 0) \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 1) \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 2) \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 3) \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 4) -#define DT_N_S_soc_S_adc_40022300_P_resolutions_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, resolutions, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 4) -#define DT_N_S_soc_S_adc_40022300_P_resolutions_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, resolutions, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 4, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_resolutions_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, resolutions, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, resolutions, 4, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_resolutions_LEN 5 -#define DT_N_S_soc_S_adc_40022300_P_resolutions_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times {2, 3, 9, 17, 33, 65, 388, 811} -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_0 2 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_1 3 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_2 9 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_3 17 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_4 33 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_5 65 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_6 388 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_7 811 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, sampling_times, 0) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 1) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 2) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 3) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 4) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 5) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 6) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 7) -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, sampling_times, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 6) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 7) -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, sampling_times, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 6, __VA_ARGS__) \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 7, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, sampling_times, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_adc_40022300, sampling_times, 7, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_LEN 8 -#define DT_N_S_soc_S_adc_40022300_P_sampling_times_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer "FULLY_CONFIGURABLE" -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_STRING_UNQUOTED FULLY_CONFIGURABLE -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_STRING_TOKEN FULLY_CONFIGURABLE -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_STRING_UPPER_TOKEN FULLY_CONFIGURABLE -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_IDX_0 "FULLY_CONFIGURABLE" -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_IDX_0_ENUM_VAL_FULLY_CONFIGURABLE_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, st_adc_sequencer, 0) -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, st_adc_sequencer, 0) -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, st_adc_sequencer, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, st_adc_sequencer, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_LEN 1 -#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler "OVERSAMPLER_EXTENDED" -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_STRING_UNQUOTED OVERSAMPLER_EXTENDED -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_STRING_TOKEN OVERSAMPLER_EXTENDED -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_STRING_UPPER_TOKEN OVERSAMPLER_EXTENDED -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_IDX_0 "OVERSAMPLER_EXTENDED" -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_IDX_0_ENUM_VAL_OVERSAMPLER_EXTENDED_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, st_adc_oversampler, 0) -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, st_adc_oversampler, 0) -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, st_adc_oversampler, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, st_adc_oversampler, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_LEN 1 -#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_status "disabled" -#define DT_N_S_soc_S_adc_40022300_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_adc_40022300_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_adc_40022300_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_adc_40022300_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_adc_40022300_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_adc_40022300_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, status, 0) -#define DT_N_S_soc_S_adc_40022300_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, status, 0) -#define DT_N_S_soc_S_adc_40022300_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_status_LEN 1 -#define DT_N_S_soc_S_adc_40022300_P_status_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_compatible {"st,stm32-adc"} -#define DT_N_S_soc_S_adc_40022300_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_compatible_IDX_0 "st,stm32-adc" -#define DT_N_S_soc_S_adc_40022300_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-adc -#define DT_N_S_soc_S_adc_40022300_P_compatible_IDX_0_STRING_TOKEN st_stm32_adc -#define DT_N_S_soc_S_adc_40022300_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_ADC -#define DT_N_S_soc_S_adc_40022300_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, compatible, 0) -#define DT_N_S_soc_S_adc_40022300_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, compatible, 0) -#define DT_N_S_soc_S_adc_40022300_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_adc_40022300_P_compatible_LEN 1 -#define DT_N_S_soc_S_adc_40022300_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_adc_40022300_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_wakeup_source 0 -#define DT_N_S_soc_S_adc_40022300_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_adc_40022300_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_adc_40022300_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_pinmux 522 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/bdma@58025400 - * - * Node identifier: DT_N_S_soc_S_bdma_58025400 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d2_pb1 * - * Binding (compatible = st,stm32-bdma): - * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-bdma.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_bdma_58025400_PATH "/soc/bdma@58025400" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d2_pb1" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_bdma_58025400_FULL_NAME "bdma@58025400" -#define DT_N_S_soc_S_bdma_58025400_FULL_NAME_UNQUOTED bdma@58025400 -#define DT_N_S_soc_S_bdma_58025400_FULL_NAME_TOKEN bdma_58025400 -#define DT_N_S_soc_S_bdma_58025400_FULL_NAME_UPPER_TOKEN BDMA_58025400 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FULL_NAME "usb_otg_hs_ulpi_d2_pb1" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d2_pb1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FULL_NAME_TOKEN usb_otg_hs_ulpi_d2_pb1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D2_PB1 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_bdma_58025400_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_bdma_58025400_CHILD_IDX 55 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_CHILD_IDX 118 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_bdma_58025400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_bdma_58025400_FOREACH_NODELABEL(fn) fn(bdma1) -#define DT_N_S_soc_S_bdma_58025400_FOREACH_NODELABEL_VARGS(fn, ...) fn(bdma1, __VA_ARGS__) -#define DT_N_S_soc_S_bdma_58025400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d2_pb1) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_bdma_58025400_CHILD_NUM 0 -#define DT_N_S_soc_S_bdma_58025400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_bdma_58025400_HASH CjYBCqMxXd_gr1XwlMz6FF_xG49H_J_bChPdE2Gfpho - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_bdma_58025400_ORD 91 -#define DT_N_S_soc_S_bdma_58025400_ORD_STR_SORTABLE 00091 - +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_HASH 6h5x_BFUHQsxlvGoKsBKYzDUEsogMuli1RUcDDpewOY + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_ORD 92 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_ORD_STR_SORTABLE 00092 + /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_bdma_58025400_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_bdma_58025400_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_bdma_58025400_EXISTS 1 -#define DT_N_INST_0_st_stm32_bdma DT_N_S_soc_S_bdma_58025400 -#define DT_N_NODELABEL_bdma1 DT_N_S_soc_S_bdma_58025400 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_d2_pb1 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_bdma_58025400_REG_NUM 1 -#define DT_N_S_soc_S_bdma_58025400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_REG_IDX_0_VAL_ADDRESS 1476547584 -#define DT_N_S_soc_S_bdma_58025400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_bdma_58025400_RANGES_NUM 0 -#define DT_N_S_soc_S_bdma_58025400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_bdma_58025400_IRQ_NUM 8 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_VAL_irq 129 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_VAL_irq 130 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_VAL_irq 131 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_VAL_priority 0 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_VAL_irq 132 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_VAL_priority 0 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_VAL_irq 133 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_VAL_priority 0 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_VAL_irq 134 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_VAL_priority 0 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_VAL_irq 135 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_VAL_priority 0 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_VAL_irq 136 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_VAL_priority 0 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_bdma_58025400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_bdma_58025400_COMPAT_MATCHES_st_stm32_bdma 1 -#define DT_N_S_soc_S_bdma_58025400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_bdma_58025400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_COMPAT_MODEL_IDX_0 "stm32-bdma" -#define DT_N_S_soc_S_bdma_58025400_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_bdma_58025400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_bdma_58025400_P_reg {1476547584, 1024} -#define DT_N_S_soc_S_bdma_58025400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_reg_IDX_0 1476547584 -#define DT_N_S_soc_S_bdma_58025400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_bdma_58025400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts {129, 0, 130, 0, 131, 0, 132, 0, 133, 0, 134, 0, 135, 0, 136, 0} -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_0 129 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_2 130 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_4 131 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_5 0 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_6 132 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_7 0 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_8_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_8 133 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_9_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_9 0 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_10_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_10 134 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_11_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_11 0 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_12_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_12 135 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_13_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_13 0 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_14_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_14 136 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_15_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_15 0 -#define DT_N_S_soc_S_bdma_58025400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_st_mem2mem 1 -#define DT_N_S_soc_S_bdma_58025400_P_st_mem2mem_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_dma_offset 0 -#define DT_N_S_soc_S_bdma_58025400_P_dma_offset_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_dma_requests 8 -#define DT_N_S_soc_S_bdma_58025400_P_dma_requests_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_status "disabled" -#define DT_N_S_soc_S_bdma_58025400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_bdma_58025400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_bdma_58025400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_bdma_58025400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_bdma_58025400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_bdma_58025400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_bdma_58025400, status, 0) -#define DT_N_S_soc_S_bdma_58025400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_bdma_58025400, status, 0) -#define DT_N_S_soc_S_bdma_58025400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_bdma_58025400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_bdma_58025400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_bdma_58025400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_bdma_58025400_P_status_LEN 1 -#define DT_N_S_soc_S_bdma_58025400_P_status_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_compatible {"st,stm32-bdma"} -#define DT_N_S_soc_S_bdma_58025400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_compatible_IDX_0 "st,stm32-bdma" -#define DT_N_S_soc_S_bdma_58025400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-bdma -#define DT_N_S_soc_S_bdma_58025400_P_compatible_IDX_0_STRING_TOKEN st_stm32_bdma -#define DT_N_S_soc_S_bdma_58025400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_BDMA -#define DT_N_S_soc_S_bdma_58025400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_bdma_58025400, compatible, 0) -#define DT_N_S_soc_S_bdma_58025400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_bdma_58025400, compatible, 0) -#define DT_N_S_soc_S_bdma_58025400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_bdma_58025400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_bdma_58025400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_bdma_58025400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_bdma_58025400_P_compatible_LEN 1 -#define DT_N_S_soc_S_bdma_58025400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_VAL_bits 2097152 -#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_bdma_58025400, clocks, 0) -#define DT_N_S_soc_S_bdma_58025400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_bdma_58025400, clocks, 0) -#define DT_N_S_soc_S_bdma_58025400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_bdma_58025400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_bdma_58025400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_bdma_58025400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_bdma_58025400_P_clocks_LEN 1 -#define DT_N_S_soc_S_bdma_58025400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_bdma_58025400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_wakeup_source 0 -#define DT_N_S_soc_S_bdma_58025400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_bdma_58025400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_bdma_58025400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_pinmux 554 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/fdcan1_rx_pb8 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d3_pb10 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_PATH "/soc/pin-controller@58020000/fdcan1_rx_pb8" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d3_pb10" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FULL_NAME "fdcan1_rx_pb8" -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FULL_NAME_UNQUOTED fdcan1_rx_pb8 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FULL_NAME_TOKEN fdcan1_rx_pb8 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FULL_NAME_UPPER_TOKEN FDCAN1_RX_PB8 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FULL_NAME "usb_otg_hs_ulpi_d3_pb10" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d3_pb10 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FULL_NAME_TOKEN usb_otg_hs_ulpi_d3_pb10 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D3_PB10 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_CHILD_IDX 20 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_CHILD_IDX 120 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_NODELABEL(fn) fn(fdcan1_rx_pb8) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_NODELABEL_VARGS(fn, ...) fn(fdcan1_rx_pb8, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d3_pb10) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_HASH bvFMuO2SX7jU_LfFOhAGPKjduHfqaLZOMUPE0Co8djA +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_HASH MgT0Mb_CzDgmSvcS9aPeFElSSg_Yn14AYvZ7nRfANlE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_ORD 92 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_ORD_STR_SORTABLE 00092 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_ORD 93 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_ORD_STR_SORTABLE 00093 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_SUPPORTS_ORDS \ - 94, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_EXISTS 1 -#define DT_N_NODELABEL_fdcan1_rx_pb8 DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_d3_pb10 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_pinmux 777 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_pinmux 842 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/fdcan1_tx_ph13 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d4_pb11 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_PATH "/soc/pin-controller@58020000/fdcan1_tx_ph13" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d4_pb11" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FULL_NAME "fdcan1_tx_ph13" -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FULL_NAME_UNQUOTED fdcan1_tx_ph13 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FULL_NAME_TOKEN fdcan1_tx_ph13 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FULL_NAME_UPPER_TOKEN FDCAN1_TX_PH13 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FULL_NAME "usb_otg_hs_ulpi_d4_pb11" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d4_pb11 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FULL_NAME_TOKEN usb_otg_hs_ulpi_d4_pb11 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D4_PB11 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_CHILD_IDX 21 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_CHILD_IDX 121 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_NODELABEL(fn) fn(fdcan1_tx_ph13) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_NODELABEL_VARGS(fn, ...) fn(fdcan1_tx_ph13, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d4_pb11) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_HASH Pl8M_sEs4V35wlMAwaYVkht9_QRfDm5pypojlBBuYWE +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_HASH jcR4wtkzg22J06hkPXLpaoXx3Uc4rnZ5tNF_BfHmymc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_ORD 93 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_ORD_STR_SORTABLE 00093 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_ORD 94 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_ORD_STR_SORTABLE 00094 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_SUPPORTS_ORDS \ - 94, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_EXISTS 1 -#define DT_N_NODELABEL_fdcan1_tx_ph13 DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_d4_pb11 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_pinmux 4009 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_pinmux 874 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/can@4000a000 - * - * Node identifier: DT_N_S_soc_S_can_4000a000 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d5_pb12 * - * Binding (compatible = st,stm32h7-fdcan): - * $ZEPHYR_BASE/dts/bindings/can/st,stm32h7-fdcan.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_can_4000a000_PATH "/soc/can@4000a000" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d5_pb12" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_can_4000a000_FULL_NAME "can@4000a000" -#define DT_N_S_soc_S_can_4000a000_FULL_NAME_UNQUOTED can@4000a000 -#define DT_N_S_soc_S_can_4000a000_FULL_NAME_TOKEN can_4000a000 -#define DT_N_S_soc_S_can_4000a000_FULL_NAME_UPPER_TOKEN CAN_4000A000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FULL_NAME "usb_otg_hs_ulpi_d5_pb12" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d5_pb12 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FULL_NAME_TOKEN usb_otg_hs_ulpi_d5_pb12 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D5_PB12 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_can_4000a000_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_can_4000a000_CHILD_IDX 31 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_CHILD_IDX 122 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_can_4000a000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_can_4000a000_FOREACH_NODELABEL(fn) fn(fdcan1) -#define DT_N_S_soc_S_can_4000a000_FOREACH_NODELABEL_VARGS(fn, ...) fn(fdcan1, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d5_pb12) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_can_4000a000_CHILD_NUM 0 -#define DT_N_S_soc_S_can_4000a000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_can_4000a000_HASH TsK756J4DWV6zgqgumE5kpKPrY0072I51EHPTR1BuJY +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_HASH WSenYYgswfRX8otGOfN6Hz6OC_pJUeyIJCnpnhokEDo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_can_4000a000_ORD 94 -#define DT_N_S_soc_S_can_4000a000_ORD_STR_SORTABLE 00094 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_ORD 95 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_ORD_STR_SORTABLE 00095 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_can_4000a000_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 92, \ - 93, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_can_4000a000_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_can_4000a000_EXISTS 1 -#define DT_N_INST_0_st_stm32h7_fdcan DT_N_S_soc_S_can_4000a000 -#define DT_N_NODELABEL_fdcan1 DT_N_S_soc_S_can_4000a000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_d5_pb12 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_can_4000a000_REG_NUM 2 -#define DT_N_S_soc_S_can_4000a000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_REG_IDX_0_VAL_ADDRESS 1073782784 -#define DT_N_S_soc_S_can_4000a000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_can_4000a000_REG_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_REG_IDX_1_VAL_ADDRESS 1073785856 -#define DT_N_S_soc_S_can_4000a000_REG_IDX_1_VAL_SIZE 848 -#define DT_N_S_soc_S_can_4000a000_REG_NAME_m_can_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_REG_NAME_m_can_VAL_ADDRESS DT_N_S_soc_S_can_4000a000_REG_IDX_0_VAL_ADDRESS -#define DT_N_S_soc_S_can_4000a000_REG_NAME_m_can_VAL_SIZE DT_N_S_soc_S_can_4000a000_REG_IDX_0_VAL_SIZE -#define DT_N_S_soc_S_can_4000a000_REG_NAME_message_ram_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_REG_NAME_message_ram_VAL_ADDRESS DT_N_S_soc_S_can_4000a000_REG_IDX_1_VAL_ADDRESS -#define DT_N_S_soc_S_can_4000a000_REG_NAME_message_ram_VAL_SIZE DT_N_S_soc_S_can_4000a000_REG_IDX_1_VAL_SIZE -#define DT_N_S_soc_S_can_4000a000_RANGES_NUM 0 -#define DT_N_S_soc_S_can_4000a000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_can_4000a000_IRQ_NUM 3 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_irq 19 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_irq 21 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_irq 63 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_priority 0 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_can_4000a000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int0_VAL_irq DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int0_VAL_priority DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int0_CONTROLLER DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int1_VAL_irq DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_irq -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int1_VAL_priority DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_priority -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int1_CONTROLLER DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_CONTROLLER -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_calib_VAL_irq DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_irq -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_calib_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_calib_VAL_priority DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_priority -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_calib_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_calib_CONTROLLER DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_CONTROLLER -#define DT_N_S_soc_S_can_4000a000_COMPAT_MATCHES_st_stm32h7_fdcan 1 -#define DT_N_S_soc_S_can_4000a000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_can_4000a000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_COMPAT_MODEL_IDX_0 "stm32h7-fdcan" -#define DT_N_S_soc_S_can_4000a000_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_can_4000a000_PINCTRL_NUM 1 -#define DT_N_S_soc_S_can_4000a000_PINCTRL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_PINCTRL_IDX_0_TOKEN default -#define DT_N_S_soc_S_can_4000a000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_can_4000a000_PINCTRL_NAME_default_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_PINCTRL_NAME_default_IDX 0 -#define DT_N_S_soc_S_can_4000a000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8 -#define DT_N_S_soc_S_can_4000a000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_VAL_bus 236 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_VAL_bits 256 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_VAL_bus 9 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_VAL_bits 148635728 -#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, clocks, 0) \ - fn(DT_N_S_soc_S_can_4000a000, clocks, 1) -#define DT_N_S_soc_S_can_4000a000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, clocks, 1) -#define DT_N_S_soc_S_can_4000a000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_clocks_LEN 2 -#define DT_N_S_soc_S_can_4000a000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_reg {1073782784, 1024, 1073785856, 848} -#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_0 1073782784 -#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_2 1073785856 -#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_3 848 -#define DT_N_S_soc_S_can_4000a000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupts {19, 0, 21, 0, 63, 0} -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_0 19 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_2 21 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_4 63 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_5 0 -#define DT_N_S_soc_S_can_4000a000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names {"int0", "int1", "calib"} -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_0 "int0" -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_0_STRING_UNQUOTED int0 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_0_STRING_TOKEN int0 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN INT0 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_1 "int1" -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_1_STRING_UNQUOTED int1 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_1_STRING_TOKEN int1 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN INT1 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_2 "calib" -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_2_STRING_UNQUOTED calib -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_2_STRING_TOKEN calib -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN CALIB -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 0) \ - fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 1) \ - fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 2) -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 2) -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 2, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 2, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_LEN 3 -#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg {0, 28, 8, 3, 3, 0, 3, 3} -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_0 0 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_1 28 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_2 8 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_3 3 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_4 3 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_5 0 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_6 3 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_7 3 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 0) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 1) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 2) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 3) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 4) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 5) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 6) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 7) -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 6) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 7) -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 6, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 7, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 7, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_LEN 8 -#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_status "disabled" -#define DT_N_S_soc_S_can_4000a000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_can_4000a000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_can_4000a000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_can_4000a000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_can_4000a000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_can_4000a000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, status, 0) -#define DT_N_S_soc_S_can_4000a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, status, 0) -#define DT_N_S_soc_S_can_4000a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_status_LEN 1 -#define DT_N_S_soc_S_can_4000a000_P_status_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_compatible {"st,stm32h7-fdcan"} -#define DT_N_S_soc_S_can_4000a000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_compatible_IDX_0 "st,stm32h7-fdcan" -#define DT_N_S_soc_S_can_4000a000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-fdcan -#define DT_N_S_soc_S_can_4000a000_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_fdcan -#define DT_N_S_soc_S_can_4000a000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_FDCAN -#define DT_N_S_soc_S_can_4000a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, compatible, 0) -#define DT_N_S_soc_S_can_4000a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, compatible, 0) -#define DT_N_S_soc_S_can_4000a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_compatible_LEN 1 -#define DT_N_S_soc_S_can_4000a000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_reg_names {"m_can", "message_ram"} -#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_0 "m_can" -#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_0_STRING_UNQUOTED m_can -#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_0_STRING_TOKEN m_can -#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_0_STRING_UPPER_TOKEN M_CAN -#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_1 "message_ram" -#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_1_STRING_UNQUOTED message_ram -#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_1_STRING_TOKEN message_ram -#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_1_STRING_UPPER_TOKEN MESSAGE_RAM -#define DT_N_S_soc_S_can_4000a000_P_reg_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, reg_names, 0) \ - fn(DT_N_S_soc_S_can_4000a000, reg_names, 1) -#define DT_N_S_soc_S_can_4000a000_P_reg_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, reg_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, reg_names, 1) -#define DT_N_S_soc_S_can_4000a000_P_reg_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, reg_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, reg_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_reg_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, reg_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, reg_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_reg_names_LEN 2 -#define DT_N_S_soc_S_can_4000a000_P_reg_names_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_can_4000a000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_wakeup_source 0 -#define DT_N_S_soc_S_can_4000a000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_can_4000a000_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 0) \ - fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 1) -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 1) -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_LEN 2 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names {"default"} -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_IDX_0 "default" -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_IDX_0_STRING_TOKEN default -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, pinctrl_names, 0) -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, pinctrl_names, 0) -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_LEN 1 -#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_pinmux 906 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/can@4000a400 - * - * Node identifier: DT_N_S_soc_S_can_4000a400 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d6_pb13 * - * Binding (compatible = st,stm32h7-fdcan): - * $ZEPHYR_BASE/dts/bindings/can/st,stm32h7-fdcan.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_can_4000a400_PATH "/soc/can@4000a400" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d6_pb13" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_can_4000a400_FULL_NAME "can@4000a400" -#define DT_N_S_soc_S_can_4000a400_FULL_NAME_UNQUOTED can@4000a400 -#define DT_N_S_soc_S_can_4000a400_FULL_NAME_TOKEN can_4000a400 -#define DT_N_S_soc_S_can_4000a400_FULL_NAME_UPPER_TOKEN CAN_4000A400 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FULL_NAME "usb_otg_hs_ulpi_d6_pb13" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d6_pb13 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FULL_NAME_TOKEN usb_otg_hs_ulpi_d6_pb13 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D6_PB13 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_can_4000a400_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_can_4000a400_CHILD_IDX 32 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_CHILD_IDX 123 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_can_4000a400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_can_4000a400_FOREACH_NODELABEL(fn) fn(fdcan2) -#define DT_N_S_soc_S_can_4000a400_FOREACH_NODELABEL_VARGS(fn, ...) fn(fdcan2, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d6_pb13) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_can_4000a400_CHILD_NUM 0 -#define DT_N_S_soc_S_can_4000a400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_can_4000a400_HASH Q1IbQlnHfEuftKrxSDFmeo78_BpvDy4fAq8XaGQMjbk +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_HASH VkbhDbztZhLsmAexap227659BXuo5uifdaw_gG4KokY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_can_4000a400_ORD 95 -#define DT_N_S_soc_S_can_4000a400_ORD_STR_SORTABLE 00095 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_ORD 96 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_ORD_STR_SORTABLE 00096 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_can_4000a400_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_can_4000a400_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_can_4000a400_EXISTS 1 -#define DT_N_INST_1_st_stm32h7_fdcan DT_N_S_soc_S_can_4000a400 -#define DT_N_NODELABEL_fdcan2 DT_N_S_soc_S_can_4000a400 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_d6_pb13 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_can_4000a400_REG_NUM 2 -#define DT_N_S_soc_S_can_4000a400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_REG_IDX_0_VAL_ADDRESS 1073783808 -#define DT_N_S_soc_S_can_4000a400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_can_4000a400_REG_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_REG_IDX_1_VAL_ADDRESS 1073785856 -#define DT_N_S_soc_S_can_4000a400_REG_IDX_1_VAL_SIZE 1696 -#define DT_N_S_soc_S_can_4000a400_REG_NAME_m_can_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_REG_NAME_m_can_VAL_ADDRESS DT_N_S_soc_S_can_4000a400_REG_IDX_0_VAL_ADDRESS -#define DT_N_S_soc_S_can_4000a400_REG_NAME_m_can_VAL_SIZE DT_N_S_soc_S_can_4000a400_REG_IDX_0_VAL_SIZE -#define DT_N_S_soc_S_can_4000a400_REG_NAME_message_ram_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_REG_NAME_message_ram_VAL_ADDRESS DT_N_S_soc_S_can_4000a400_REG_IDX_1_VAL_ADDRESS -#define DT_N_S_soc_S_can_4000a400_REG_NAME_message_ram_VAL_SIZE DT_N_S_soc_S_can_4000a400_REG_IDX_1_VAL_SIZE -#define DT_N_S_soc_S_can_4000a400_RANGES_NUM 0 -#define DT_N_S_soc_S_can_4000a400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_can_4000a400_IRQ_NUM 3 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_irq 20 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_irq 22 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_irq 63 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_priority 0 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_can_4000a400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int0_VAL_irq DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int0_VAL_priority DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int0_CONTROLLER DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int1_VAL_irq DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_irq -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int1_VAL_priority DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_priority -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int1_CONTROLLER DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_CONTROLLER -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_calib_VAL_irq DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_irq -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_calib_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_calib_VAL_priority DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_priority -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_calib_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_calib_CONTROLLER DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_CONTROLLER -#define DT_N_S_soc_S_can_4000a400_COMPAT_MATCHES_st_stm32h7_fdcan 1 -#define DT_N_S_soc_S_can_4000a400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_can_4000a400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_COMPAT_MODEL_IDX_0 "stm32h7-fdcan" -#define DT_N_S_soc_S_can_4000a400_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_can_4000a400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_VAL_bus 236 -#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_VAL_bits 256 -#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, clocks, 0) -#define DT_N_S_soc_S_can_4000a400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, clocks, 0) -#define DT_N_S_soc_S_can_4000a400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_clocks_LEN 1 -#define DT_N_S_soc_S_can_4000a400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_reg {1073783808, 1024, 1073785856, 1696} -#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_0 1073783808 -#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_2 1073785856 -#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_3 1696 -#define DT_N_S_soc_S_can_4000a400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupts {20, 0, 22, 0, 63, 0} -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_0 20 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_2 22 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_4 63 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_5 0 -#define DT_N_S_soc_S_can_4000a400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names {"int0", "int1", "calib"} -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_0 "int0" -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_0_STRING_UNQUOTED int0 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_0_STRING_TOKEN int0 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN INT0 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_1 "int1" -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_1_STRING_UNQUOTED int1 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_1_STRING_TOKEN int1 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN INT1 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_2 "calib" -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_2_STRING_UNQUOTED calib -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_2_STRING_TOKEN calib -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN CALIB -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 0) \ - fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 1) \ - fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 2) -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 2) -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 2, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 2, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_LEN 3 -#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg {848, 28, 8, 3, 3, 0, 3, 3} -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_0 848 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_1 28 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_2 8 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_3 3 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_4 3 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_5 0 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_6 3 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_7 3 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 0) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 1) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 2) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 3) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 4) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 5) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 6) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 7) -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 6) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 7) -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 6, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 7, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 7, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_LEN 8 -#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_status "disabled" -#define DT_N_S_soc_S_can_4000a400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_can_4000a400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_can_4000a400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_can_4000a400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_can_4000a400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_can_4000a400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, status, 0) -#define DT_N_S_soc_S_can_4000a400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, status, 0) -#define DT_N_S_soc_S_can_4000a400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_status_LEN 1 -#define DT_N_S_soc_S_can_4000a400_P_status_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_compatible {"st,stm32h7-fdcan"} -#define DT_N_S_soc_S_can_4000a400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_compatible_IDX_0 "st,stm32h7-fdcan" -#define DT_N_S_soc_S_can_4000a400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-fdcan -#define DT_N_S_soc_S_can_4000a400_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_fdcan -#define DT_N_S_soc_S_can_4000a400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_FDCAN -#define DT_N_S_soc_S_can_4000a400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, compatible, 0) -#define DT_N_S_soc_S_can_4000a400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, compatible, 0) -#define DT_N_S_soc_S_can_4000a400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_compatible_LEN 1 -#define DT_N_S_soc_S_can_4000a400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_reg_names {"m_can", "message_ram"} -#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_0 "m_can" -#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_0_STRING_UNQUOTED m_can -#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_0_STRING_TOKEN m_can -#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_0_STRING_UPPER_TOKEN M_CAN -#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_1 "message_ram" -#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_1_STRING_UNQUOTED message_ram -#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_1_STRING_TOKEN message_ram -#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_1_STRING_UPPER_TOKEN MESSAGE_RAM -#define DT_N_S_soc_S_can_4000a400_P_reg_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, reg_names, 0) \ - fn(DT_N_S_soc_S_can_4000a400, reg_names, 1) -#define DT_N_S_soc_S_can_4000a400_P_reg_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, reg_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, reg_names, 1) -#define DT_N_S_soc_S_can_4000a400_P_reg_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, reg_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_can_4000a400, reg_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_reg_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, reg_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_can_4000a400, reg_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_can_4000a400_P_reg_names_LEN 2 -#define DT_N_S_soc_S_can_4000a400_P_reg_names_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_can_4000a400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_wakeup_source 0 -#define DT_N_S_soc_S_can_4000a400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_can_4000a400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_can_4000a400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_pinmux 938 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/dac@40007400 - * - * Node identifier: DT_N_S_soc_S_dac_40007400 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_d7_pb5 * - * Binding (compatible = st,stm32-dac): - * $ZEPHYR_BASE/dts/bindings/dac/st,stm32-dac.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_dac_40007400_PATH "/soc/dac@40007400" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_d7_pb5" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_dac_40007400_FULL_NAME "dac@40007400" -#define DT_N_S_soc_S_dac_40007400_FULL_NAME_UNQUOTED dac@40007400 -#define DT_N_S_soc_S_dac_40007400_FULL_NAME_TOKEN dac_40007400 -#define DT_N_S_soc_S_dac_40007400_FULL_NAME_UPPER_TOKEN DAC_40007400 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FULL_NAME "usb_otg_hs_ulpi_d7_pb5" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_d7_pb5 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FULL_NAME_TOKEN usb_otg_hs_ulpi_d7_pb5 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_D7_PB5 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_dac_40007400_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_dac_40007400_CHILD_IDX 52 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_CHILD_IDX 119 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_dac_40007400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_dac_40007400_FOREACH_NODELABEL(fn) fn(dac1) -#define DT_N_S_soc_S_dac_40007400_FOREACH_NODELABEL_VARGS(fn, ...) fn(dac1, __VA_ARGS__) -#define DT_N_S_soc_S_dac_40007400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_d7_pb5) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_dac_40007400_CHILD_NUM 0 -#define DT_N_S_soc_S_dac_40007400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_dac_40007400_HASH AEmTXTZMLBfEYJhhkd3MmBxYI__rcYzmOjJiV2l9668 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_HASH FQTDxK_zcDgsbfDS4T0483wP5VQV8WhBbdKDqD_9Iuo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dac_40007400_ORD 96 -#define DT_N_S_soc_S_dac_40007400_ORD_STR_SORTABLE 00096 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_ORD 97 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_ORD_STR_SORTABLE 00097 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_dac_40007400_REQUIRES_ORDS \ - 3, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_dac_40007400_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_dac_40007400_EXISTS 1 -#define DT_N_INST_0_st_stm32_dac DT_N_S_soc_S_dac_40007400 -#define DT_N_NODELABEL_dac1 DT_N_S_soc_S_dac_40007400 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_d7_pb5 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_dac_40007400_REG_NUM 1 -#define DT_N_S_soc_S_dac_40007400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_REG_IDX_0_VAL_ADDRESS 1073771520 -#define DT_N_S_soc_S_dac_40007400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_dac_40007400_RANGES_NUM 0 -#define DT_N_S_soc_S_dac_40007400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_dac_40007400_IRQ_NUM 0 -#define DT_N_S_soc_S_dac_40007400_IRQ_LEVEL 0 -#define DT_N_S_soc_S_dac_40007400_COMPAT_MATCHES_st_stm32_dac 1 -#define DT_N_S_soc_S_dac_40007400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_dac_40007400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_COMPAT_MODEL_IDX_0 "stm32-dac" -#define DT_N_S_soc_S_dac_40007400_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_dac_40007400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_dac_40007400_P_reg {1073771520, 1024} -#define DT_N_S_soc_S_dac_40007400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_reg_IDX_0 1073771520 -#define DT_N_S_soc_S_dac_40007400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_dac_40007400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_VAL_bits 536870912 -#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_40007400, clocks, 0) -#define DT_N_S_soc_S_dac_40007400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_40007400, clocks, 0) -#define DT_N_S_soc_S_dac_40007400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_40007400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dac_40007400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_40007400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dac_40007400_P_clocks_LEN 1 -#define DT_N_S_soc_S_dac_40007400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_status "disabled" -#define DT_N_S_soc_S_dac_40007400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_dac_40007400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_dac_40007400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_dac_40007400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_dac_40007400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_dac_40007400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_40007400, status, 0) -#define DT_N_S_soc_S_dac_40007400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_40007400, status, 0) -#define DT_N_S_soc_S_dac_40007400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_40007400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dac_40007400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_40007400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dac_40007400_P_status_LEN 1 -#define DT_N_S_soc_S_dac_40007400_P_status_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_compatible {"st,stm32-dac"} -#define DT_N_S_soc_S_dac_40007400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_compatible_IDX_0 "st,stm32-dac" -#define DT_N_S_soc_S_dac_40007400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dac -#define DT_N_S_soc_S_dac_40007400_P_compatible_IDX_0_STRING_TOKEN st_stm32_dac -#define DT_N_S_soc_S_dac_40007400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DAC -#define DT_N_S_soc_S_dac_40007400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_40007400, compatible, 0) -#define DT_N_S_soc_S_dac_40007400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_40007400, compatible, 0) -#define DT_N_S_soc_S_dac_40007400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_40007400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dac_40007400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_40007400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dac_40007400_P_compatible_LEN 1 -#define DT_N_S_soc_S_dac_40007400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_dac_40007400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_wakeup_source 0 -#define DT_N_S_soc_S_dac_40007400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_dac_40007400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_dac_40007400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_pinmux 682 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/dcmi@48020000 - * - * Node identifier: DT_N_S_soc_S_dcmi_48020000 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_dir_pi11 * - * Binding (compatible = st,stm32-dcmi): - * $ZEPHYR_BASE/dts/bindings/video/st,stm32-dcmi.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_dcmi_48020000_PATH "/soc/dcmi@48020000" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_dir_pi11" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_dcmi_48020000_FULL_NAME "dcmi@48020000" -#define DT_N_S_soc_S_dcmi_48020000_FULL_NAME_UNQUOTED dcmi@48020000 -#define DT_N_S_soc_S_dcmi_48020000_FULL_NAME_TOKEN dcmi_48020000 -#define DT_N_S_soc_S_dcmi_48020000_FULL_NAME_UPPER_TOKEN DCMI_48020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FULL_NAME "usb_otg_hs_ulpi_dir_pi11" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_dir_pi11 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FULL_NAME_TOKEN usb_otg_hs_ulpi_dir_pi11 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_DIR_PI11 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_dcmi_48020000_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_dcmi_48020000_CHILD_IDX 65 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_CHILD_IDX 126 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_dcmi_48020000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_NODELABEL(fn) fn(dcmi) -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi, __VA_ARGS__) -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_dir_pi11) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_dcmi_48020000_CHILD_NUM 0 -#define DT_N_S_soc_S_dcmi_48020000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_dcmi_48020000_HASH AKyVuuDdy0BqNKfdyf9nqyXlgLq6PAMDsyCrGlq8t7w +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_HASH DKMF6KCnbkUsyFKW5CX0RhW9B_WICh0gpMwptGAByXg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dcmi_48020000_ORD 97 -#define DT_N_S_soc_S_dcmi_48020000_ORD_STR_SORTABLE 00097 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_ORD 98 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_ORD_STR_SORTABLE 00098 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_dcmi_48020000_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_dcmi_48020000_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_dcmi_48020000_EXISTS 1 -#define DT_N_INST_0_st_stm32_dcmi DT_N_S_soc_S_dcmi_48020000 -#define DT_N_NODELABEL_dcmi DT_N_S_soc_S_dcmi_48020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_dir_pi11 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_dcmi_48020000_REG_NUM 1 -#define DT_N_S_soc_S_dcmi_48020000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_REG_IDX_0_VAL_ADDRESS 1208090624 -#define DT_N_S_soc_S_dcmi_48020000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_dcmi_48020000_RANGES_NUM 0 -#define DT_N_S_soc_S_dcmi_48020000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_dcmi_48020000_IRQ_NUM 1 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_irq 78 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_NAME_dcmi_VAL_irq DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_dcmi_48020000_IRQ_NAME_dcmi_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_NAME_dcmi_VAL_priority DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_dcmi_48020000_IRQ_NAME_dcmi_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_IRQ_NAME_dcmi_CONTROLLER DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_dcmi_48020000_COMPAT_MATCHES_st_stm32_dcmi 1 -#define DT_N_S_soc_S_dcmi_48020000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_dcmi_48020000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_COMPAT_MODEL_IDX_0 "stm32-dcmi" -#define DT_N_S_soc_S_dcmi_48020000_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_dcmi_48020000_P_interrupts {78, 0} -#define DT_N_S_soc_S_dcmi_48020000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_interrupts_IDX_0 78 -#define DT_N_S_soc_S_dcmi_48020000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_dcmi_48020000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_bus_width 8 -#define DT_N_S_soc_S_dcmi_48020000_P_bus_width_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_dcmi_48020000_P_bus_width_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_bus_width_IDX_0_ENUM_VAL_8_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_bus_width_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_capture_rate 1 -#define DT_N_S_soc_S_dcmi_48020000_P_capture_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_dcmi_48020000_P_capture_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_capture_rate_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_capture_rate_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_status "disabled" -#define DT_N_S_soc_S_dcmi_48020000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_dcmi_48020000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_dcmi_48020000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_dcmi_48020000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_dcmi_48020000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_dcmi_48020000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, status, 0) -#define DT_N_S_soc_S_dcmi_48020000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, status, 0) -#define DT_N_S_soc_S_dcmi_48020000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dcmi_48020000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dcmi_48020000_P_status_LEN 1 -#define DT_N_S_soc_S_dcmi_48020000_P_status_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_compatible {"st,stm32-dcmi"} -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_IDX_0 "st,stm32-dcmi" -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dcmi -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_IDX_0_STRING_TOKEN st_stm32_dcmi -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DCMI -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, compatible, 0) -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, compatible, 0) -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_LEN 1 -#define DT_N_S_soc_S_dcmi_48020000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_reg {1208090624, 1024} -#define DT_N_S_soc_S_dcmi_48020000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_reg_IDX_0 1208090624 -#define DT_N_S_soc_S_dcmi_48020000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_dcmi_48020000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names {"dcmi"} -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_IDX_0 "dcmi" -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_IDX_0_STRING_UNQUOTED dcmi -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_IDX_0_STRING_TOKEN dcmi -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN DCMI -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, interrupt_names, 0) -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, interrupt_names, 0) -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, interrupt_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, interrupt_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_LEN 1 -#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_VAL_bus 220 -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_VAL_bits 1 -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, clocks, 0) -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, clocks, 0) -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_LEN 1 -#define DT_N_S_soc_S_dcmi_48020000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_dcmi_48020000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_wakeup_source 0 -#define DT_N_S_soc_S_dcmi_48020000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_dcmi_48020000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_dcmi_48020000_P_zephyr_pm_device_runtime_auto_EXISTS 1 - -/* - * Devicetree node: /soc/display-controller@50001000 - * - * Node identifier: DT_N_S_soc_S_display_controller_50001000 - * - * Binding (compatible = st,stm32-ltdc): - * $ZEPHYR_BASE/dts/bindings/display/st,stm32-ltdc.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_display_controller_50001000_PATH "/soc/display-controller@50001000" - +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_pinmux 4458 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_nxt_ph4 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_nxt_ph4" + /* Node's name with unit-address: */ -#define DT_N_S_soc_S_display_controller_50001000_FULL_NAME "display-controller@50001000" -#define DT_N_S_soc_S_display_controller_50001000_FULL_NAME_UNQUOTED display-controller@50001000 -#define DT_N_S_soc_S_display_controller_50001000_FULL_NAME_TOKEN display_controller_50001000 -#define DT_N_S_soc_S_display_controller_50001000_FULL_NAME_UPPER_TOKEN DISPLAY_CONTROLLER_50001000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FULL_NAME "usb_otg_hs_ulpi_nxt_ph4" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_nxt_ph4 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FULL_NAME_TOKEN usb_otg_hs_ulpi_nxt_ph4 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_NXT_PH4 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_display_controller_50001000_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_display_controller_50001000_CHILD_IDX 67 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_CHILD_IDX 125 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_display_controller_50001000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_NODELABEL(fn) fn(ltdc) -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_NODELABEL_VARGS(fn, ...) fn(ltdc, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_nxt_ph4) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_display_controller_50001000_CHILD_NUM 0 -#define DT_N_S_soc_S_display_controller_50001000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_display_controller_50001000_HASH tuXl2nvZTwFr218jjkJLXjZw_0Wn_Svv7iOXFbTuRjo +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_HASH hWiIjD1j6W28KnES5ddcX55jkk5283qV_iV7ySbr8e0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_display_controller_50001000_ORD 98 -#define DT_N_S_soc_S_display_controller_50001000_ORD_STR_SORTABLE 00098 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_ORD 99 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_ORD_STR_SORTABLE 00099 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_display_controller_50001000_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 41, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_display_controller_50001000_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_display_controller_50001000_EXISTS 1 -#define DT_N_INST_0_st_stm32_ltdc DT_N_S_soc_S_display_controller_50001000 -#define DT_N_NODELABEL_ltdc DT_N_S_soc_S_display_controller_50001000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_nxt_ph4 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_display_controller_50001000_REG_NUM 1 -#define DT_N_S_soc_S_display_controller_50001000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_REG_IDX_0_VAL_ADDRESS 1342181376 -#define DT_N_S_soc_S_display_controller_50001000_REG_IDX_0_VAL_SIZE 512 -#define DT_N_S_soc_S_display_controller_50001000_RANGES_NUM 0 -#define DT_N_S_soc_S_display_controller_50001000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NUM 2 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_irq 88 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_irq 89 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_VAL_irq DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_VAL_priority DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_CONTROLLER DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_er_VAL_irq DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_irq -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_er_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_er_VAL_priority DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_priority -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_er_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_er_CONTROLLER DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_CONTROLLER -#define DT_N_S_soc_S_display_controller_50001000_COMPAT_MATCHES_st_stm32_ltdc 1 -#define DT_N_S_soc_S_display_controller_50001000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_display_controller_50001000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_COMPAT_MODEL_IDX_0 "stm32-ltdc" -#define DT_N_S_soc_S_display_controller_50001000_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_display_controller_50001000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_VAL_bus 228 -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_VAL_bits 8 -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_display_controller_50001000, clocks, 0) -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_display_controller_50001000, clocks, 0) -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_display_controller_50001000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_display_controller_50001000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_LEN 1 -#define DT_N_S_soc_S_display_controller_50001000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_display_controller_50001000_P_resets_IDX_0_VAL_id 4483 -#define DT_N_S_soc_S_display_controller_50001000_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_display_controller_50001000, resets, 0) -#define DT_N_S_soc_S_display_controller_50001000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_display_controller_50001000, resets, 0) -#define DT_N_S_soc_S_display_controller_50001000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_display_controller_50001000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_display_controller_50001000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_P_resets_LEN 1 -#define DT_N_S_soc_S_display_controller_50001000_P_resets_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupts {88, 0, 89, 0} -#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_0 88 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_2 89 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_status "disabled" -#define DT_N_S_soc_S_display_controller_50001000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_display_controller_50001000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_display_controller_50001000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_display_controller_50001000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_display_controller_50001000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_display_controller_50001000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_display_controller_50001000, status, 0) -#define DT_N_S_soc_S_display_controller_50001000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_display_controller_50001000, status, 0) -#define DT_N_S_soc_S_display_controller_50001000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_display_controller_50001000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_display_controller_50001000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_P_status_LEN 1 -#define DT_N_S_soc_S_display_controller_50001000_P_status_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_compatible {"st,stm32-ltdc"} -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_IDX_0 "st,stm32-ltdc" -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-ltdc -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_IDX_0_STRING_TOKEN st_stm32_ltdc -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LTDC -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_display_controller_50001000, compatible, 0) -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_display_controller_50001000, compatible, 0) -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_display_controller_50001000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_display_controller_50001000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_LEN 1 -#define DT_N_S_soc_S_display_controller_50001000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_reg {1342181376, 512} -#define DT_N_S_soc_S_display_controller_50001000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_reg_IDX_0 1342181376 -#define DT_N_S_soc_S_display_controller_50001000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_reg_IDX_1 512 -#define DT_N_S_soc_S_display_controller_50001000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names {"ltdc", "ltdc_er"} -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_0 "ltdc" -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_0_STRING_UNQUOTED ltdc -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_0_STRING_TOKEN ltdc -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN LTDC -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_1 "ltdc_er" -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_1_STRING_UNQUOTED ltdc_er -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_1_STRING_TOKEN ltdc_er -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN LTDC_ER -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 0) \ - fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 1) -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 1) -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_LEN 2 -#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_display_controller_50001000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_wakeup_source 0 -#define DT_N_S_soc_S_display_controller_50001000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_display_controller_50001000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_display_controller_50001000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_pinmux 3722 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/dma@40020000 - * - * Node identifier: DT_N_S_soc_S_dma_40020000 + * Devicetree node: /soc/pin-controller@58020000/usb_otg_hs_ulpi_stp_pc0 * - * Binding (compatible = st,stm32-dma-v1): - * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dma-v1.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_dma_40020000_PATH "/soc/dma@40020000" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_PATH "/soc/pin-controller@58020000/usb_otg_hs_ulpi_stp_pc0" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_dma_40020000_FULL_NAME "dma@40020000" -#define DT_N_S_soc_S_dma_40020000_FULL_NAME_UNQUOTED dma@40020000 -#define DT_N_S_soc_S_dma_40020000_FULL_NAME_TOKEN dma_40020000 -#define DT_N_S_soc_S_dma_40020000_FULL_NAME_UPPER_TOKEN DMA_40020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FULL_NAME "usb_otg_hs_ulpi_stp_pc0" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FULL_NAME_UNQUOTED usb_otg_hs_ulpi_stp_pc0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FULL_NAME_TOKEN usb_otg_hs_ulpi_stp_pc0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FULL_NAME_UPPER_TOKEN USB_OTG_HS_ULPI_STP_PC0 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_dma_40020000_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_dma_40020000_CHILD_IDX 53 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_CHILD_IDX 124 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_dma_40020000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_dma_40020000_FOREACH_NODELABEL(fn) fn(dma1) -#define DT_N_S_soc_S_dma_40020000_FOREACH_NODELABEL_VARGS(fn, ...) fn(dma1, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_NODELABEL(fn) fn(usb_otg_hs_ulpi_stp_pc0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_NODELABEL_VARGS(fn, ...) fn(usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_dma_40020000_CHILD_NUM 0 -#define DT_N_S_soc_S_dma_40020000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_dma_40020000_HASH wrD_czGB0R3hBC1Od9iGdfNbQ3BZqmarPsJAc4MBFAs +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_HASH jaMrzbxWSLD5Xc__vlKlCZs0IoEVKY9dFvKHTLwlSI8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dma_40020000_ORD 99 -#define DT_N_S_soc_S_dma_40020000_ORD_STR_SORTABLE 00099 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_ORD 100 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_ORD_STR_SORTABLE 00100 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_dma_40020000_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_dma_40020000_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_SUPPORTS_ORDS \ + 101, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_dma_40020000_EXISTS 1 -#define DT_N_INST_0_st_stm32_dma_v1 DT_N_S_soc_S_dma_40020000 -#define DT_N_NODELABEL_dma1 DT_N_S_soc_S_dma_40020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_EXISTS 1 +#define DT_N_NODELABEL_usb_otg_hs_ulpi_stp_pc0 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_dma_40020000_REG_NUM 1 -#define DT_N_S_soc_S_dma_40020000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_REG_IDX_0_VAL_ADDRESS 1073872896 -#define DT_N_S_soc_S_dma_40020000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_dma_40020000_RANGES_NUM 0 -#define DT_N_S_soc_S_dma_40020000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_dma_40020000_IRQ_NUM 8 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_irq 11 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_irq 12 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_irq 13 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_irq 14 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_irq 15 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_irq 16 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_VAL_irq 17 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_VAL_irq 47 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_dma_40020000_COMPAT_MATCHES_st_stm32_dma_v1 1 -#define DT_N_S_soc_S_dma_40020000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_dma_40020000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_COMPAT_MODEL_IDX_0 "stm32-dma-v1" -#define DT_N_S_soc_S_dma_40020000_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_dma_40020000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_dma_40020000_P_reg {1073872896, 1024} -#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_0 1073872896 -#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_dma_40020000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts {11, 0, 12, 0, 13, 0, 14, 0, 15, 0, 16, 0, 17, 0, 47, 0} -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_0 11 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_2 12 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_4 13 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_5 0 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_6 14 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_7 0 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_8_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_8 15 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_9_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_9 0 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_10_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_10 16 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_11_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_11 0 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_12_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_12 17 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_13_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_13 0 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_14_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_14 47 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_15_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_15 0 -#define DT_N_S_soc_S_dma_40020000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_st_mem2mem 1 -#define DT_N_S_soc_S_dma_40020000_P_st_mem2mem_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_dma_offset 0 -#define DT_N_S_soc_S_dma_40020000_P_dma_offset_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_dma_requests 8 -#define DT_N_S_soc_S_dma_40020000_P_dma_requests_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_status "disabled" -#define DT_N_S_soc_S_dma_40020000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_dma_40020000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_dma_40020000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020000, status, 0) -#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, status, 0) -#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020000_P_status_LEN 1 -#define DT_N_S_soc_S_dma_40020000_P_status_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_compatible {"st,stm32-dma-v1"} -#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0 "st,stm32-dma-v1" -#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dma-v1 -#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_STRING_TOKEN st_stm32_dma_v1 -#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMA_V1 -#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020000, compatible, 0) -#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, compatible, 0) -#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020000_P_compatible_LEN 1 -#define DT_N_S_soc_S_dma_40020000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bus 216 -#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bits 1 -#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020000, clocks, 0) -#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, clocks, 0) -#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020000_P_clocks_LEN 1 -#define DT_N_S_soc_S_dma_40020000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_dma_40020000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_wakeup_source 0 -#define DT_N_S_soc_S_dma_40020000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_dma_40020000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_dma_40020000_P_zephyr_pm_device_runtime_auto_EXISTS 1 - -/* - * Devicetree node: /soc/dma@40020400 - * - * Node identifier: DT_N_S_soc_S_dma_40020400 - * - * Binding (compatible = st,stm32-dma-v1): - * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dma-v1.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_dma_40020400_PATH "/soc/dma@40020400" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_dma_40020400_FULL_NAME "dma@40020400" -#define DT_N_S_soc_S_dma_40020400_FULL_NAME_UNQUOTED dma@40020400 -#define DT_N_S_soc_S_dma_40020400_FULL_NAME_TOKEN dma_40020400 -#define DT_N_S_soc_S_dma_40020400_FULL_NAME_UPPER_TOKEN DMA_40020400 - -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_dma_40020400_PARENT DT_N_S_soc - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_dma_40020400_CHILD_IDX 54 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_dma_40020400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_dma_40020400_FOREACH_NODELABEL(fn) fn(dma2) -#define DT_N_S_soc_S_dma_40020400_FOREACH_NODELABEL_VARGS(fn, ...) fn(dma2, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_dma_40020400_CHILD_NUM 0 -#define DT_N_S_soc_S_dma_40020400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_dma_40020400_HASH 6M2mn87tCKiqdKtfbifYbjloijPkEmcQ0zczmKi97Y8 - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dma_40020400_ORD 100 -#define DT_N_S_soc_S_dma_40020400_ORD_STR_SORTABLE 00100 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_dma_40020400_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_dma_40020400_SUPPORTS_ORDS - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_dma_40020400_EXISTS 1 -#define DT_N_INST_1_st_stm32_dma_v1 DT_N_S_soc_S_dma_40020400 -#define DT_N_NODELABEL_dma2 DT_N_S_soc_S_dma_40020400 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_dma_40020400_REG_NUM 1 -#define DT_N_S_soc_S_dma_40020400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_REG_IDX_0_VAL_ADDRESS 1073873920 -#define DT_N_S_soc_S_dma_40020400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_dma_40020400_RANGES_NUM 0 -#define DT_N_S_soc_S_dma_40020400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_dma_40020400_IRQ_NUM 8 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_irq 56 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_irq 57 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_irq 58 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_irq 59 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_irq 60 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_irq 68 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_VAL_irq 69 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_VAL_irq 70 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_VAL_priority 0 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dma_40020400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_dma_40020400_COMPAT_MATCHES_st_stm32_dma_v1 1 -#define DT_N_S_soc_S_dma_40020400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_dma_40020400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_COMPAT_MODEL_IDX_0 "stm32-dma-v1" -#define DT_N_S_soc_S_dma_40020400_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_dma_40020400_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_dma_40020400_P_reg {1073873920, 1024} -#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_0 1073873920 -#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_dma_40020400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts {56, 0, 57, 0, 58, 0, 59, 0, 60, 0, 68, 0, 69, 0, 70, 0} -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_0 56 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_2 57 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_4 58 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_5 0 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_6 59 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_7 0 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_8_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_8 60 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_9_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_9 0 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_10_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_10 68 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_11_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_11 0 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_12_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_12 69 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_13_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_13 0 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_14_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_14 70 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_15_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_15 0 -#define DT_N_S_soc_S_dma_40020400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_st_mem2mem 1 -#define DT_N_S_soc_S_dma_40020400_P_st_mem2mem_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_dma_offset 8 -#define DT_N_S_soc_S_dma_40020400_P_dma_offset_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_dma_requests 8 -#define DT_N_S_soc_S_dma_40020400_P_dma_requests_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_status "disabled" -#define DT_N_S_soc_S_dma_40020400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_dma_40020400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_dma_40020400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020400, status, 0) -#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, status, 0) -#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020400_P_status_LEN 1 -#define DT_N_S_soc_S_dma_40020400_P_status_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_compatible {"st,stm32-dma-v1"} -#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0 "st,stm32-dma-v1" -#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dma-v1 -#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_STRING_TOKEN st_stm32_dma_v1 -#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMA_V1 -#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020400, compatible, 0) -#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, compatible, 0) -#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020400_P_compatible_LEN 1 -#define DT_N_S_soc_S_dma_40020400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bus 216 -#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bits 2 -#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020400, clocks, 0) -#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, clocks, 0) -#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dma_40020400_P_clocks_LEN 1 -#define DT_N_S_soc_S_dma_40020400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_dma_40020400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_wakeup_source 0 -#define DT_N_S_soc_S_dma_40020400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_dma_40020400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_dma_40020400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_pinmux 1034 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_STRING_TOKEN high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_IDX_0 "high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/dmamux@58025800 + * Devicetree node: /soc/usb@40040000 * - * Node identifier: DT_N_S_soc_S_dmamux_58025800 + * Node identifier: DT_N_S_soc_S_usb_40040000 * - * Binding (compatible = st,stm32-dmamux): - * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dmamux.yaml + * Binding (compatible = st,stm32-otghs): + * $ZEPHYR_BASE/dts/bindings/usb/st,stm32-otghs.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_dmamux_58025800_PATH "/soc/dmamux@58025800" +#define DT_N_S_soc_S_usb_40040000_PATH "/soc/usb@40040000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_dmamux_58025800_FULL_NAME "dmamux@58025800" -#define DT_N_S_soc_S_dmamux_58025800_FULL_NAME_UNQUOTED dmamux@58025800 -#define DT_N_S_soc_S_dmamux_58025800_FULL_NAME_TOKEN dmamux_58025800 -#define DT_N_S_soc_S_dmamux_58025800_FULL_NAME_UPPER_TOKEN DMAMUX_58025800 +#define DT_N_S_soc_S_usb_40040000_FULL_NAME "usb@40040000" +#define DT_N_S_soc_S_usb_40040000_FULL_NAME_UNQUOTED usb@40040000 +#define DT_N_S_soc_S_usb_40040000_FULL_NAME_TOKEN usb_40040000 +#define DT_N_S_soc_S_usb_40040000_FULL_NAME_UPPER_TOKEN USB_40040000 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_dmamux_58025800_PARENT DT_N_S_soc +#define DT_N_S_soc_S_usb_40040000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_dmamux_58025800_CHILD_IDX 57 +#define DT_N_S_soc_S_usb_40040000_CHILD_IDX 68 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_dmamux_58025800_NODELABEL_NUM 1 -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_NODELABEL(fn) fn(dmamux2) -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_NODELABEL_VARGS(fn, ...) fn(dmamux2, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_usb_40040000_NODELABEL_NUM 2 +#define DT_N_S_soc_S_usb_40040000_FOREACH_NODELABEL(fn) fn(usbotg_hs) fn(zephyr_udc0) +#define DT_N_S_soc_S_usb_40040000_FOREACH_NODELABEL_VARGS(fn, ...) fn(usbotg_hs, __VA_ARGS__) fn(zephyr_udc0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_dmamux_58025800_CHILD_NUM 0 -#define DT_N_S_soc_S_dmamux_58025800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_usb_40040000_CHILD_NUM 1 +#define DT_N_S_soc_S_usb_40040000_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) +#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) +#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) +#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) +#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) /* Node's hash: */ -#define DT_N_S_soc_S_dmamux_58025800_HASH pg_1B26nWuXjkKWIFyRWCHAy6Gu9COK4z_cOdOQhvVs +#define DT_N_S_soc_S_usb_40040000_HASH hQX5a6h4YrwYkjEZ67iF2XLzK046iAbBlHG3GB49DxM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dmamux_58025800_ORD 101 -#define DT_N_S_soc_S_dmamux_58025800_ORD_STR_SORTABLE 00101 +#define DT_N_S_soc_S_usb_40040000_ORD 101 +#define DT_N_S_soc_S_usb_40040000_ORD_STR_SORTABLE 00101 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_dmamux_58025800_REQUIRES_ORDS \ +#define DT_N_S_soc_S_usb_40040000_REQUIRES_ORDS \ 3, \ 4, \ - 8, + 8, \ + 88, \ + 89, \ + 90, \ + 91, \ + 92, \ + 93, \ + 94, \ + 95, \ + 96, \ + 97, \ + 98, \ + 99, \ + 100, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_dmamux_58025800_SUPPORTS_ORDS +#define DT_N_S_soc_S_usb_40040000_SUPPORTS_ORDS \ + 102, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_dmamux_58025800_EXISTS 1 -#define DT_N_INST_1_st_stm32_dmamux DT_N_S_soc_S_dmamux_58025800 -#define DT_N_NODELABEL_dmamux2 DT_N_S_soc_S_dmamux_58025800 +#define DT_N_S_soc_S_usb_40040000_EXISTS 1 +#define DT_N_INST_0_st_stm32_otghs DT_N_S_soc_S_usb_40040000 +#define DT_N_NODELABEL_usbotg_hs DT_N_S_soc_S_usb_40040000 +#define DT_N_NODELABEL_zephyr_udc0 DT_N_S_soc_S_usb_40040000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_dmamux_58025800_REG_NUM 1 -#define DT_N_S_soc_S_dmamux_58025800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_REG_IDX_0_VAL_ADDRESS 1476548608 -#define DT_N_S_soc_S_dmamux_58025800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_dmamux_58025800_RANGES_NUM 0 -#define DT_N_S_soc_S_dmamux_58025800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_dmamux_58025800_IRQ_NUM 1 -#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_VAL_irq 128 -#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dmamux_58025800_IRQ_LEVEL 1 -#define DT_N_S_soc_S_dmamux_58025800_COMPAT_MATCHES_st_stm32_dmamux 1 -#define DT_N_S_soc_S_dmamux_58025800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_dmamux_58025800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_COMPAT_MODEL_IDX_0 "stm32-dmamux" -#define DT_N_S_soc_S_dmamux_58025800_STATUS_disabled 1 +#define DT_N_S_soc_S_usb_40040000_REG_NUM 1 +#define DT_N_S_soc_S_usb_40040000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_REG_IDX_0_VAL_ADDRESS 1074003968 +#define DT_N_S_soc_S_usb_40040000_REG_IDX_0_VAL_SIZE 262144 +#define DT_N_S_soc_S_usb_40040000_RANGES_NUM 0 +#define DT_N_S_soc_S_usb_40040000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_usb_40040000_IRQ_NUM 4 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_irq 74 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_irq 75 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_irq 76 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_irq 77 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_usb_40040000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_out_VAL_irq DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_out_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_out_VAL_priority DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_out_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_out_CONTROLLER DT_N_S_soc_S_usb_40040000_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_in_VAL_irq DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_in_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_in_VAL_priority DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_in_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_ep1_in_CONTROLLER DT_N_S_soc_S_usb_40040000_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_wkup_VAL_irq DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_irq +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_wkup_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_wkup_VAL_priority DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_VAL_priority +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_wkup_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_wkup_CONTROLLER DT_N_S_soc_S_usb_40040000_IRQ_IDX_2_CONTROLLER +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_otghs_VAL_irq DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_irq +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_otghs_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_otghs_VAL_priority DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_VAL_priority +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_otghs_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_IRQ_NAME_otghs_CONTROLLER DT_N_S_soc_S_usb_40040000_IRQ_IDX_3_CONTROLLER +#define DT_N_S_soc_S_usb_40040000_COMPAT_MATCHES_st_stm32_otghs 1 +#define DT_N_S_soc_S_usb_40040000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_usb_40040000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_COMPAT_MODEL_IDX_0 "stm32-otghs" +#define DT_N_S_soc_S_usb_40040000_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_dmamux_58025800_PINCTRL_NUM 0 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NUM 1 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_usb_40040000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4 +#define DT_N_S_soc_S_usb_40040000_PINCTRL_NAME_default_IDX_11_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11 /* Generic property macros: */ -#define DT_N_S_soc_S_dmamux_58025800_P_reg {1476548608, 1024} -#define DT_N_S_soc_S_dmamux_58025800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_reg_IDX_0 1476548608 -#define DT_N_S_soc_S_dmamux_58025800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_dmamux_58025800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_dma_channels 8 -#define DT_N_S_soc_S_dmamux_58025800_P_dma_channels_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_dma_generators 8 -#define DT_N_S_soc_S_dmamux_58025800_P_dma_generators_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_dma_requests 107 -#define DT_N_S_soc_S_dmamux_58025800_P_dma_requests_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_status "disabled" -#define DT_N_S_soc_S_dmamux_58025800_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_dmamux_58025800_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_dmamux_58025800_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_dmamux_58025800_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_dmamux_58025800_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_dmamux_58025800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_58025800, status, 0) -#define DT_N_S_soc_S_dmamux_58025800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_58025800, status, 0) -#define DT_N_S_soc_S_dmamux_58025800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_58025800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_58025800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_58025800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_58025800_P_status_LEN 1 -#define DT_N_S_soc_S_dmamux_58025800_P_status_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_compatible {"st,stm32-dmamux"} -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_IDX_0 "st,stm32-dmamux" -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dmamux -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_IDX_0_STRING_TOKEN st_stm32_dmamux -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMAMUX -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_58025800, compatible, 0) -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_58025800, compatible, 0) -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_58025800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_58025800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_LEN 1 -#define DT_N_S_soc_S_dmamux_58025800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_interrupts {128, 0} -#define DT_N_S_soc_S_dmamux_58025800_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_interrupts_IDX_0 128 -#define DT_N_S_soc_S_dmamux_58025800_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_dmamux_58025800_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_VAL_bits 2097152 -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_58025800, clocks, 0) -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_58025800, clocks, 0) -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_58025800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_58025800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_LEN 1 -#define DT_N_S_soc_S_dmamux_58025800_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_dmamux_58025800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_wakeup_source 0 -#define DT_N_S_soc_S_dmamux_58025800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_dmamux_58025800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_dmamux_58025800_P_zephyr_pm_device_runtime_auto_EXISTS 1 - -/* - * Devicetree node: /soc/dsihost@50000000 - * - * Node identifier: DT_N_S_soc_S_dsihost_50000000 - * - * Binding (compatible = st,stm32-mipi-dsi): - * $ZEPHYR_BASE/dts/bindings/mipi-dsi/st,stm32-mipi-dsi.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_dsihost_50000000_PATH "/soc/dsihost@50000000" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_dsihost_50000000_FULL_NAME "dsihost@50000000" -#define DT_N_S_soc_S_dsihost_50000000_FULL_NAME_UNQUOTED dsihost@50000000 -#define DT_N_S_soc_S_dsihost_50000000_FULL_NAME_TOKEN dsihost_50000000 -#define DT_N_S_soc_S_dsihost_50000000_FULL_NAME_UPPER_TOKEN DSIHOST_50000000 - -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_dsihost_50000000_PARENT DT_N_S_soc - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_dsihost_50000000_CHILD_IDX 70 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_dsihost_50000000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_NODELABEL(fn) fn(mipi_dsi) -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(mipi_dsi, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_reg {1074003968, 262144} +#define DT_N_S_soc_S_usb_40040000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_reg_IDX_0 1074003968 +#define DT_N_S_soc_S_usb_40040000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_reg_IDX_1 262144 +#define DT_N_S_soc_S_usb_40040000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupts {74, 0, 75, 0, 76, 0, 77, 0} +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_0 74 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_2 75 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_4 76 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_6 77 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_usb_40040000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_3 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_4 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_5 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_6 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_7 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_8 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_9 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_10 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_11 DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_11_PH DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 1) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 2) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 3) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 4) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 5) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 6) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 7) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 8) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 9) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 10) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 11) +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 10) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 11) +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 7, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 8, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 9, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 10, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 11, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, pinctrl_0, 11, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_LEN 12 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, pinctrl_names, 0) +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, pinctrl_names, 0) +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_usb_40040000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_ram_size 4096 +#define DT_N_S_soc_S_usb_40040000_P_ram_size_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_phys DT_N_S_otghs_ulpis_phy +#define DT_N_S_soc_S_usb_40040000_P_phys_IDX_0 DT_N_S_otghs_ulpis_phy +#define DT_N_S_soc_S_usb_40040000_P_phys_IDX_0_PH DT_N_S_otghs_ulpis_phy +#define DT_N_S_soc_S_usb_40040000_P_phys_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_phys_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, phys, 0) +#define DT_N_S_soc_S_usb_40040000_P_phys_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, phys, 0) +#define DT_N_S_soc_S_usb_40040000_P_phys_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, phys, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_phys_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, phys, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_phys_LEN 1 +#define DT_N_S_soc_S_usb_40040000_P_phys_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_VAL_bus 216 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_VAL_bits 100663296 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_VAL_bus 5 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_VAL_bits 416546900 +#define DT_N_S_soc_S_usb_40040000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, clocks, 0) \ + fn(DT_N_S_soc_S_usb_40040000, clocks, 1) +#define DT_N_S_soc_S_usb_40040000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, clocks, 1) +#define DT_N_S_soc_S_usb_40040000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_clocks_LEN 2 +#define DT_N_S_soc_S_usb_40040000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_num_bidir_endpoints 4 +#define DT_N_S_soc_S_usb_40040000_P_num_bidir_endpoints_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed "high-speed" +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_STRING_UNQUOTED high-speed +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_STRING_TOKEN high_speed +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_STRING_UPPER_TOKEN HIGH_SPEED +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_IDX_0 "high-speed" +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_IDX_0_ENUM_VAL_high_speed_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, maximum_speed, 0) +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, maximum_speed, 0) +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, maximum_speed, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, maximum_speed, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_LEN 1 +#define DT_N_S_soc_S_usb_40040000_P_maximum_speed_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_status "okay" +#define DT_N_S_soc_S_usb_40040000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_usb_40040000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_usb_40040000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_usb_40040000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_usb_40040000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_usb_40040000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, status, 0) +#define DT_N_S_soc_S_usb_40040000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, status, 0) +#define DT_N_S_soc_S_usb_40040000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_status_LEN 1 +#define DT_N_S_soc_S_usb_40040000_P_status_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_compatible {"st,stm32-otghs"} +#define DT_N_S_soc_S_usb_40040000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_compatible_IDX_0 "st,stm32-otghs" +#define DT_N_S_soc_S_usb_40040000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-otghs +#define DT_N_S_soc_S_usb_40040000_P_compatible_IDX_0_STRING_TOKEN st_stm32_otghs +#define DT_N_S_soc_S_usb_40040000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_OTGHS +#define DT_N_S_soc_S_usb_40040000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, compatible, 0) +#define DT_N_S_soc_S_usb_40040000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, compatible, 0) +#define DT_N_S_soc_S_usb_40040000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_compatible_LEN 1 +#define DT_N_S_soc_S_usb_40040000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names {"ep1_out", "ep1_in", "wkup", "otghs"} +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_0 "ep1_out" +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_0_STRING_UNQUOTED ep1_out +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_0_STRING_TOKEN ep1_out +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN EP1_OUT +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_1 "ep1_in" +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_1_STRING_UNQUOTED ep1_in +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_1_STRING_TOKEN ep1_in +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN EP1_IN +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_2 "wkup" +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_2_STRING_UNQUOTED wkup +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_2_STRING_TOKEN wkup +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN WKUP +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_3 "otghs" +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_3_STRING_UNQUOTED otghs +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_3_STRING_TOKEN otghs +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN OTGHS +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 0) \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 1) \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 2) \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 3) +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 3) +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40040000, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_LEN 4 +#define DT_N_S_soc_S_usb_40040000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_usb_40040000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_wakeup_source 0 +#define DT_N_S_soc_S_usb_40040000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_usb_40040000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/usb@40040000/board_cdc_acm_uart + * + * Node identifier: DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart + * + * Binding (compatible = zephyr,cdc-acm-uart): + * $ZEPHYR_BASE/dts/bindings/serial/zephyr,cdc-acm-uart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_PATH "/soc/usb@40040000/board_cdc_acm_uart" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FULL_NAME "board_cdc_acm_uart" +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FULL_NAME_UNQUOTED board_cdc_acm_uart +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FULL_NAME_TOKEN board_cdc_acm_uart +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FULL_NAME_UPPER_TOKEN BOARD_CDC_ACM_UART + +/* Node parent (/soc/usb@40040000) identifier: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_PARENT DT_N_S_soc_S_usb_40040000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_NODELABEL_NUM 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_NODELABEL(fn) fn(board_cdc_acm_uart) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_NODELABEL_VARGS(fn, ...) fn(board_cdc_acm_uart, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_usb_40040000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_CHILD_NUM 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_HASH P3GsfMPNql3Dub9vlYX_Nnu0V9ZO9NQ9kQ2sQ_PMkkw + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_ORD 102 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_ORD_STR_SORTABLE 00102 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_REQUIRES_ORDS \ + 101, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_SUPPORTS_ORDS \ + 103, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_EXISTS 1 +#define DT_N_INST_0_zephyr_cdc_acm_uart DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart +#define DT_N_NODELABEL_board_cdc_acm_uart DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart + +/* Bus info (controller: '/soc/usb@40040000', type: '['usb']') */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_BUS_usb 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_BUS DT_N_S_soc_S_usb_40040000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_REG_NUM 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_RANGES_NUM 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_IRQ_NUM 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_IRQ_LEVEL 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_COMPAT_MATCHES_zephyr_cdc_acm_uart 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding" +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_COMPAT_MODEL_IDX_0 "cdc-acm-uart" +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_tx_fifo_size 1024 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_tx_fifo_size_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_rx_fifo_size 1024 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_rx_fifo_size_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_hw_flow_control 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity "none" +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, parity, 0) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, parity, 0) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_LEN 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_parity_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status "okay" +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, status, 0) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, status, 0) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_LEN 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_status_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible {"zephyr,cdc-acm-uart"} +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_IDX_0 "zephyr,cdc-acm-uart" +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_IDX_0_STRING_UNQUOTED zephyr,cdc-acm-uart +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_IDX_0_STRING_TOKEN zephyr_cdc_acm_uart +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_CDC_ACM_UART +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, compatible, 0) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, compatible, 0) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_LEN 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_wakeup_source 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /zephyr,user + * + * Node identifier: DT_N_S_zephyr_user + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_zephyr_user_PATH "/zephyr,user" + +/* Node's name with unit-address: */ +#define DT_N_S_zephyr_user_FULL_NAME "zephyr,user" +#define DT_N_S_zephyr_user_FULL_NAME_UNQUOTED zephyr,user +#define DT_N_S_zephyr_user_FULL_NAME_TOKEN zephyr_user +#define DT_N_S_zephyr_user_FULL_NAME_UPPER_TOKEN ZEPHYR_USER + +/* Node parent (/) identifier: */ +#define DT_N_S_zephyr_user_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_zephyr_user_CHILD_IDX 26 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_zephyr_user_NODELABEL_NUM 0 +#define DT_N_S_zephyr_user_FOREACH_NODELABEL(fn) +#define DT_N_S_zephyr_user_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_zephyr_user_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_zephyr_user_CHILD_NUM 0 +#define DT_N_S_zephyr_user_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_zephyr_user_FOREACH_CHILD(fn) +#define DT_N_S_zephyr_user_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_zephyr_user_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_zephyr_user_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_zephyr_user_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_zephyr_user_HASH yvQw9UuQMLRblNbUC3yeUHnjbtsQjI3bWwAx_c_vELI + +/* Node's dependency ordinal: */ +#define DT_N_S_zephyr_user_ORD 103 +#define DT_N_S_zephyr_user_ORD_STR_SORTABLE 00103 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_zephyr_user_REQUIRES_ORDS \ + 0, \ + 12, \ + 14, \ + 22, \ + 27, \ + 33, \ + 37, \ + 41, \ + 48, \ + 52, \ + 55, \ + 58, \ + 62, \ + 63, \ + 64, \ + 65, \ + 66, \ + 67, \ + 68, \ + 69, \ + 70, \ + 71, \ + 75, \ + 78, \ + 82, \ + 87, \ + 102, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_zephyr_user_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_zephyr_user_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_zephyr_user_REG_NUM 0 +#define DT_N_S_zephyr_user_RANGES_NUM 0 +#define DT_N_S_zephyr_user_FOREACH_RANGE(fn) +#define DT_N_S_zephyr_user_IRQ_NUM 0 +#define DT_N_S_zephyr_user_IRQ_LEVEL 0 +#define DT_N_S_zephyr_user_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_zephyr_user_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_VAL_pin 15 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_VAL_pin 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_1_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_VAL_pin 11 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_2_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_VAL_pin 7 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_3_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_VAL_pin 7 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_4_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_VAL_pin 6 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_5_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_VAL_pin 8 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_6_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_VAL_pin 0 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_7_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_VAL_pin 3 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_8_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_VAL_pin 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_9_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_VAL_pin 2 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_10_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_VAL_pin 8 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_11_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_VAL_pin 7 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_12_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_VAL_pin 10 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_13_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_VAL_pin 9 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_14_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_VAL_pin 0 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_15_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_16_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_16_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_16_VAL_pin 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_16_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_16_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_16_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_17_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_17_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_17_VAL_pin 2 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_17_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_17_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_17_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_18_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_18_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_18_VAL_pin 3 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_18_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_18_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_18_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_19_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_19_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_19_VAL_pin 4 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_19_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_19_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_19_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_20_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_20_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_20_VAL_pin 5 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_20_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_20_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_20_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_21_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_21_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_21_VAL_pin 4 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_21_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_21_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_21_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_22_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_22_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_22_VAL_pin 6 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_22_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_22_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_22_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_23_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_23_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_23_VAL_pin 5 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_23_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_23_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_23_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_24_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_24_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_24_VAL_pin 6 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_24_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_24_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_24_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_25_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_25_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_25_VAL_pin 7 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_25_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_25_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_25_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_26_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_26_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_26_VAL_pin 0 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_26_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_26_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_26_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_27_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_27_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_27_VAL_pin 11 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_27_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_27_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_27_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_28_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_28_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_28_VAL_pin 12 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_28_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_28_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_28_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_29_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_29_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_29_VAL_pin 13 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_29_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_29_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_29_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_30_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_30_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_30_VAL_pin 14 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_30_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_30_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_30_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_31_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_31_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_31_VAL_pin 2 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_31_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_31_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_31_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_32_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_32_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_32_VAL_pin 3 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_32_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_32_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_32_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_33_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_33_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_33_VAL_pin 4 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_33_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_33_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_33_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_34_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_34_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_34_VAL_pin 6 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_34_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_34_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_34_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_35_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_35_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_35_VAL_pin 7 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_35_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_35_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_35_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_36_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_36_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_36_VAL_pin 8 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_36_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_36_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_36_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_37_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_37_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_37_VAL_pin 9 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_37_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_37_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_37_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_38_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_38_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_38_VAL_pin 14 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_38_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_38_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_38_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_39_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_39_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_39_VAL_pin 15 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_39_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_39_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_39_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_40_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_40_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_40_VAL_pin 13 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_40_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_40_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_40_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_41_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_41_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_41_VAL_pin 15 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_41_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_41_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_41_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_42_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_42_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_42_VAL_pin 3 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_42_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_42_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_42_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_43_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_43_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_43_VAL_pin 4 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_43_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_43_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_43_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_44_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_44_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_44_VAL_pin 5 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_44_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_44_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_44_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_45_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_45_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_45_VAL_pin 6 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_45_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_45_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_45_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_46_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_46_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_46_VAL_pin 7 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_46_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_46_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_46_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_47_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_47_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_47_VAL_pin 2 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_47_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_47_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_47_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_48_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_48_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_48_VAL_pin 3 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_48_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_48_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_48_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_49_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_49_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_49_VAL_pin 3 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_49_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_49_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_49_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_50_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_50_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_50_VAL_pin 9 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_50_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_50_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_50_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_51_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_51_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_51_VAL_pin 10 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_51_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_51_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_51_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_52_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_52_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_52_VAL_pin 14 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_52_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_52_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_52_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_53_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_53_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_53_VAL_pin 6 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_53_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_53_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_53_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_54_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_54_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_54_VAL_pin 9 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_54_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_54_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_54_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_55_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_55_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_55_VAL_pin 10 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_55_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_55_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_55_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_56_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_56_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_56_VAL_pin 11 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_56_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_56_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_56_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_57_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_57_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_57_VAL_pin 12 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_57_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_57_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_57_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_58_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_58_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_58_VAL_pin 13 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_58_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_58_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_58_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_59_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_59_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_59_VAL_pin 14 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_59_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_59_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_59_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_60_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_60_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_60_VAL_pin 2 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_60_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_60_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_60_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_61_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_61_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_61_VAL_pin 3 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_61_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_61_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_61_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_62_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_62_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_62_VAL_pin 4 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_62_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_62_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_62_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_63_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_63_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_63_VAL_pin 5 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_63_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_63_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_63_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_64_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_64_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_64_VAL_pin 6 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_64_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_64_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_64_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_65_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_65_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_65_VAL_pin 7 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_65_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_65_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_65_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_66_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_66_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_66_VAL_pin 8 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_66_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_66_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_66_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_67_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_67_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_67_VAL_pin 9 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_67_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_67_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_67_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_68_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_68_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_68_VAL_pin 10 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_68_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_68_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_68_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_69_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_69_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_69_VAL_pin 13 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_69_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_69_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_69_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_70_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_70_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_70_VAL_pin 14 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_70_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_70_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_70_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_71_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_71_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_71_VAL_pin 15 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_71_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_71_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_71_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_72_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_72_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_72_VAL_pin 6 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_72_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_72_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_72_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_73_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_73_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_73_VAL_pin 7 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_73_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_73_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_73_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_74_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_74_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_74_VAL_pin 8 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_74_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_74_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_74_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_75_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_75_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_75_VAL_pin 9 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_75_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_75_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_75_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_76_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_76_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_76_VAL_pin 10 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_76_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_76_VAL_flags 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_IDX_76_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, digital_pin_gpios, 0) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 1) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 2) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 3) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 4) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 5) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 6) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 7) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 8) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 9) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 10) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 11) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 12) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 13) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 14) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 15) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 16) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 17) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 18) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 19) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 20) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 21) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 22) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 23) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 24) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 25) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 26) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 27) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 28) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 29) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 30) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 31) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 32) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 33) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 34) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 35) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 36) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 37) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 38) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 39) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 40) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 41) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 42) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 43) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 44) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 45) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 46) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 47) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 48) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 49) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 50) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 51) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 52) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 53) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 54) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 55) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 56) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 57) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 58) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 59) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 60) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 61) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 62) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 63) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 64) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 65) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 66) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 67) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 68) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 69) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 70) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 71) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 72) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 73) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 74) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 75) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 76) +#define DT_N_S_zephyr_user_P_digital_pin_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, digital_pin_gpios, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 10) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 11) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 12) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 13) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 14) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 15) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 16) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 17) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 18) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 19) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 20) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 21) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 22) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 23) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 24) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 25) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 26) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 27) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 28) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 29) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 30) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 31) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 32) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 33) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 34) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 35) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 36) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 37) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 38) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 39) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 40) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 41) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 42) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 43) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 44) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 45) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 46) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 47) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 48) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 49) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 50) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 51) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 52) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 53) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 54) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 55) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 56) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 57) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 58) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 59) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 60) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 61) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 62) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 63) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 64) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 65) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 66) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 67) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 68) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 69) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 70) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 71) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 72) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 73) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 74) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 75) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 76) +#define DT_N_S_zephyr_user_P_digital_pin_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, digital_pin_gpios, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 2, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 3, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 4, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 5, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 6, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 7, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 8, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 9, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 10, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 11, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 12, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 13, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 14, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 15, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 16, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 17, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 18, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 19, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 20, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 21, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 22, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 23, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 24, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 25, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 26, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 27, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 28, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 29, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 30, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 31, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 32, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 33, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 34, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 35, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 36, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 37, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 38, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 39, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 40, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 41, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 42, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 43, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 44, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 45, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 46, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 47, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 48, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 49, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 50, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 51, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 52, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 53, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 54, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 55, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 56, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 57, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 58, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 59, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 60, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 61, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 62, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 63, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 64, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 65, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 66, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 67, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 68, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 69, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 70, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 71, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 72, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 73, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 74, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 75, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 76, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_digital_pin_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, digital_pin_gpios, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 16, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 17, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 18, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 19, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 20, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 21, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 22, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 23, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 24, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 25, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 26, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 27, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 28, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 29, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 30, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 31, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 32, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 33, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 34, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 35, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 36, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 37, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 38, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 39, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 40, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 41, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 42, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 43, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 44, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 45, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 46, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 47, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 48, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 49, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 50, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 51, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 52, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 53, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 54, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 55, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 56, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 57, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 58, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 59, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 60, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 61, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 62, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 63, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 64, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 65, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 66, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 67, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 68, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 69, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 70, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 71, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 72, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 73, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 74, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 75, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, digital_pin_gpios, 76, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_digital_pin_gpios_LEN 77 +#define DT_N_S_zephyr_user_P_digital_pin_gpios_EXISTS 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_VAL_pin 5 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_VAL_flags 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_VAL_pin 6 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_VAL_flags 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_1_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_VAL_pin 7 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_VAL_flags 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_IDX_2_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, builtin_led_gpios, 0) \ + fn(DT_N_S_zephyr_user, builtin_led_gpios, 1) \ + fn(DT_N_S_zephyr_user, builtin_led_gpios, 2) +#define DT_N_S_zephyr_user_P_builtin_led_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, builtin_led_gpios, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, builtin_led_gpios, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, builtin_led_gpios, 2) +#define DT_N_S_zephyr_user_P_builtin_led_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, builtin_led_gpios, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, builtin_led_gpios, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, builtin_led_gpios, 2, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_builtin_led_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, builtin_led_gpios, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, builtin_led_gpios, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, builtin_led_gpios, 2, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_builtin_led_gpios_LEN 3 +#define DT_N_S_zephyr_user_P_builtin_led_gpios_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_0_VAL_pin 8 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_0_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_1_VAL_pin 6 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_1_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_1_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_1_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_2_VAL_pin 7 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_2_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_2_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_2_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_3_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_3_VAL_pin 11 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_3_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_3_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_3_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_4_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_4_VAL_pin 15 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_4_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_4_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_4_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_5_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_5_VAL_pin 7 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_5_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_5_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_5_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_6_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_6_VAL_pin 10 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_6_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_6_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_6_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_7_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_7_VAL_pin 6 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_7_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_7_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_IDX_7_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, pwm_pin_gpios, 0) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 1) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 2) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 3) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 4) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 5) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 6) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 7) +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, pwm_pin_gpios, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 7) +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, pwm_pin_gpios, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 2, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 3, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 4, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 5, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 6, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 7, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, pwm_pin_gpios, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwm_pin_gpios, 7, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_LEN 8 +#define DT_N_S_zephyr_user_P_pwm_pin_gpios_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_1_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_2_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_3_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_4_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_5_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_6_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_7_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_8_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_9_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_VAL_pin 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_VAL_flags 0 +#define DT_N_S_zephyr_user_P_port_pin_gpios_IDX_10_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_port_pin_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, port_pin_gpios, 0) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 1) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 2) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 3) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 4) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 5) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 6) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 7) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 8) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 9) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 10) +#define DT_N_S_zephyr_user_P_port_pin_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, port_pin_gpios, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 10) +#define DT_N_S_zephyr_user_P_port_pin_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, port_pin_gpios, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 2, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 3, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 4, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 5, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 6, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 7, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 8, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 9, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 10, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_port_pin_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, port_pin_gpios, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, port_pin_gpios, 10, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_port_pin_gpios_LEN 11 +#define DT_N_S_zephyr_user_P_port_pin_gpios_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_0_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_0_VAL_pin 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_0_VAL_flags 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_1_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_1_VAL_pin 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_1_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_1_VAL_flags 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_1_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_2_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_2_VAL_pin 2 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_2_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_2_VAL_flags 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_2_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_3_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_3_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_3_VAL_pin 3 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_3_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_3_VAL_flags 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_3_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_4_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_4_VAL_pin 2 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_4_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_4_VAL_flags 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_4_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_5_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_5_VAL_pin 3 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_5_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_5_VAL_flags 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_5_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_6_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_6_VAL_pin 4 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_6_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_6_VAL_flags 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_6_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_7_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_7_VAL_pin 6 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_7_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_7_VAL_flags 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_7_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_8_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_8_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_8_VAL_pin 4 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_8_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_8_VAL_flags 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_8_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_9_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_9_PH DT_N_S_gpio_deadbeef +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_9_VAL_pin 5 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_9_VAL_pin_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_9_VAL_flags 0 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_IDX_9_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, adc_pin_gpios, 0) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 1) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 2) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 3) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 4) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 5) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 6) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 7) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 8) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 9) +#define DT_N_S_zephyr_user_P_adc_pin_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, adc_pin_gpios, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 9) +#define DT_N_S_zephyr_user_P_adc_pin_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, adc_pin_gpios, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 2, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 3, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 4, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 5, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 6, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 7, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 8, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 9, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_adc_pin_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, adc_pin_gpios, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, adc_pin_gpios, 9, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_adc_pin_gpios_LEN 10 +#define DT_N_S_zephyr_user_P_adc_pin_gpios_EXISTS 1 +#define DT_N_S_zephyr_user_P_serials_IDX_0 DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart +#define DT_N_S_zephyr_user_P_serials_IDX_0_PH DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart +#define DT_N_S_zephyr_user_P_serials_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_serials_IDX_1 DT_N_S_soc_S_serial_40011400 +#define DT_N_S_zephyr_user_P_serials_IDX_1_PH DT_N_S_soc_S_serial_40011400 +#define DT_N_S_zephyr_user_P_serials_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_serials_IDX_2 DT_N_S_soc_S_serial_40011000 +#define DT_N_S_zephyr_user_P_serials_IDX_2_PH DT_N_S_soc_S_serial_40011000 +#define DT_N_S_zephyr_user_P_serials_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_serials_IDX_3 DT_N_S_soc_S_serial_40004c00 +#define DT_N_S_zephyr_user_P_serials_IDX_3_PH DT_N_S_soc_S_serial_40004c00 +#define DT_N_S_zephyr_user_P_serials_IDX_3_EXISTS 1 +#define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, serials, 0) \ + fn(DT_N_S_zephyr_user, serials, 1) \ + fn(DT_N_S_zephyr_user, serials, 2) \ + fn(DT_N_S_zephyr_user, serials, 3) +#define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, serials, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, serials, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, serials, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, serials, 3) +#define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, serials, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, serials, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, serials, 2, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, serials, 3, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_serials_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, serials, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, serials, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, serials, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, serials, 3, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_serials_LEN 4 +#define DT_N_S_zephyr_user_P_serials_EXISTS 1 +#define DT_N_S_zephyr_user_P_cdc_acm DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart +#define DT_N_S_zephyr_user_P_cdc_acm_IDX_0 DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart +#define DT_N_S_zephyr_user_P_cdc_acm_IDX_0_PH DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart +#define DT_N_S_zephyr_user_P_cdc_acm_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_cdc_acm_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, cdc_acm, 0) +#define DT_N_S_zephyr_user_P_cdc_acm_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, cdc_acm, 0) +#define DT_N_S_zephyr_user_P_cdc_acm_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, cdc_acm, 0, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_cdc_acm_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, cdc_acm, 0, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_cdc_acm_LEN 1 +#define DT_N_S_zephyr_user_P_cdc_acm_EXISTS 1 +#define DT_N_S_zephyr_user_P_i2cs_IDX_0 DT_N_S_soc_S_i2c_40005c00 +#define DT_N_S_zephyr_user_P_i2cs_IDX_0_PH DT_N_S_soc_S_i2c_40005c00 +#define DT_N_S_zephyr_user_P_i2cs_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_i2cs_IDX_1 DT_N_S_soc_S_i2c_40005400 +#define DT_N_S_zephyr_user_P_i2cs_IDX_1_PH DT_N_S_soc_S_i2c_40005400 +#define DT_N_S_zephyr_user_P_i2cs_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_i2cs_IDX_2 DT_N_S_soc_S_i2c_58001c00 +#define DT_N_S_zephyr_user_P_i2cs_IDX_2_PH DT_N_S_soc_S_i2c_58001c00 +#define DT_N_S_zephyr_user_P_i2cs_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, i2cs, 0) \ + fn(DT_N_S_zephyr_user, i2cs, 1) \ + fn(DT_N_S_zephyr_user, i2cs, 2) +#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, i2cs, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, i2cs, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, i2cs, 2) +#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, i2cs, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, i2cs, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, i2cs, 2, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_i2cs_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, i2cs, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, i2cs, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, i2cs, 2, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_i2cs_LEN 3 +#define DT_N_S_zephyr_user_P_i2cs_EXISTS 1 +#define DT_N_S_zephyr_user_P_spis DT_N_S_soc_S_spi_40003800 +#define DT_N_S_zephyr_user_P_spis_IDX_0 DT_N_S_soc_S_spi_40003800 +#define DT_N_S_zephyr_user_P_spis_IDX_0_PH DT_N_S_soc_S_spi_40003800 +#define DT_N_S_zephyr_user_P_spis_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_spis_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, spis, 0) +#define DT_N_S_zephyr_user_P_spis_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, spis, 0) +#define DT_N_S_zephyr_user_P_spis_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, spis, 0, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_spis_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, spis, 0, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_spis_LEN 1 +#define DT_N_S_zephyr_user_P_spis_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_0_PH DT_N_S_soc_S_timers_40010000_S_pwm +#define DT_N_S_zephyr_user_P_pwms_IDX_0_VAL_channel 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_0_VAL_channel_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_0_VAL_period 83 +#define DT_N_S_zephyr_user_P_pwms_IDX_0_VAL_period_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_0_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwms_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_1_PH DT_N_S_soc_S_timers_40000400_S_pwm +#define DT_N_S_zephyr_user_P_pwms_IDX_1_VAL_channel 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_1_VAL_channel_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_1_VAL_period 2000000 +#define DT_N_S_zephyr_user_P_pwms_IDX_1_VAL_period_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_1_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwms_IDX_1_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_2_PH DT_N_S_soc_S_timers_40000400_S_pwm +#define DT_N_S_zephyr_user_P_pwms_IDX_2_VAL_channel 2 +#define DT_N_S_zephyr_user_P_pwms_IDX_2_VAL_channel_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_2_VAL_period 2000000 +#define DT_N_S_zephyr_user_P_pwms_IDX_2_VAL_period_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_2_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwms_IDX_2_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_3_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_3_PH DT_N_S_soc_S_timers_40010000_S_pwm +#define DT_N_S_zephyr_user_P_pwms_IDX_3_VAL_channel 2 +#define DT_N_S_zephyr_user_P_pwms_IDX_3_VAL_channel_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_3_VAL_period 200000 +#define DT_N_S_zephyr_user_P_pwms_IDX_3_VAL_period_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_3_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwms_IDX_3_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_4_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_4_PH DT_N_S_soc_S_timers_40010400_S_pwm +#define DT_N_S_zephyr_user_P_pwms_IDX_4_VAL_channel 3 +#define DT_N_S_zephyr_user_P_pwms_IDX_4_VAL_channel_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_4_VAL_period 2000000 +#define DT_N_S_zephyr_user_P_pwms_IDX_4_VAL_period_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_4_VAL_flags 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_4_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_5_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_5_PH DT_N_S_soc_S_timers_40010400_S_pwm +#define DT_N_S_zephyr_user_P_pwms_IDX_5_VAL_channel 2 +#define DT_N_S_zephyr_user_P_pwms_IDX_5_VAL_channel_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_5_VAL_period 2000000 +#define DT_N_S_zephyr_user_P_pwms_IDX_5_VAL_period_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_5_VAL_flags 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_5_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_6_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_6_PH DT_N_S_soc_S_timers_40010400_S_pwm +#define DT_N_S_zephyr_user_P_pwms_IDX_6_VAL_channel 2 +#define DT_N_S_zephyr_user_P_pwms_IDX_6_VAL_channel_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_6_VAL_period 2000000 +#define DT_N_S_zephyr_user_P_pwms_IDX_6_VAL_period_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_6_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwms_IDX_6_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_7_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_7_PH DT_N_S_soc_S_timers_40001800_S_pwm +#define DT_N_S_zephyr_user_P_pwms_IDX_7_VAL_channel 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_7_VAL_channel_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_7_VAL_period 2000000 +#define DT_N_S_zephyr_user_P_pwms_IDX_7_VAL_period_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_IDX_7_VAL_flags 0 +#define DT_N_S_zephyr_user_P_pwms_IDX_7_VAL_flags_EXISTS 1 +#define DT_N_S_zephyr_user_P_pwms_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, pwms, 0) \ + fn(DT_N_S_zephyr_user, pwms, 1) \ + fn(DT_N_S_zephyr_user, pwms, 2) \ + fn(DT_N_S_zephyr_user, pwms, 3) \ + fn(DT_N_S_zephyr_user, pwms, 4) \ + fn(DT_N_S_zephyr_user, pwms, 5) \ + fn(DT_N_S_zephyr_user, pwms, 6) \ + fn(DT_N_S_zephyr_user, pwms, 7) +#define DT_N_S_zephyr_user_P_pwms_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, pwms, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 7) +#define DT_N_S_zephyr_user_P_pwms_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, pwms, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwms, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwms, 2, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwms, 3, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwms, 4, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwms, 5, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwms, 6, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, pwms, 7, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_pwms_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, pwms, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, pwms, 7, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_pwms_LEN 8 +#define DT_N_S_zephyr_user_P_pwms_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_0_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_0_PH DT_N_S_soc_S_adc_40022000 +#define DT_N_S_zephyr_user_P_io_channels_IDX_0_VAL_input 0 +#define DT_N_S_zephyr_user_P_io_channels_IDX_0_VAL_input_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_1_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_1_PH DT_N_S_soc_S_adc_40022000 +#define DT_N_S_zephyr_user_P_io_channels_IDX_1_VAL_input 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_1_VAL_input_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_2_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_2_PH DT_N_S_soc_S_adc_58026000 +#define DT_N_S_zephyr_user_P_io_channels_IDX_2_VAL_input 0 +#define DT_N_S_zephyr_user_P_io_channels_IDX_2_VAL_input_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_3_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_3_PH DT_N_S_soc_S_adc_58026000 +#define DT_N_S_zephyr_user_P_io_channels_IDX_3_VAL_input 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_3_VAL_input_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_4_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_4_PH DT_N_S_soc_S_adc_40022000 +#define DT_N_S_zephyr_user_P_io_channels_IDX_4_VAL_input 12 +#define DT_N_S_zephyr_user_P_io_channels_IDX_4_VAL_input_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_5_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_5_PH DT_N_S_soc_S_adc_40022000 +#define DT_N_S_zephyr_user_P_io_channels_IDX_5_VAL_input 13 +#define DT_N_S_zephyr_user_P_io_channels_IDX_5_VAL_input_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_6_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_6_PH DT_N_S_soc_S_adc_40022000 +#define DT_N_S_zephyr_user_P_io_channels_IDX_6_VAL_input 18 +#define DT_N_S_zephyr_user_P_io_channels_IDX_6_VAL_input_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_7_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_7_PH DT_N_S_soc_S_adc_40022000 +#define DT_N_S_zephyr_user_P_io_channels_IDX_7_VAL_input 3 +#define DT_N_S_zephyr_user_P_io_channels_IDX_7_VAL_input_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_8_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_8_PH DT_N_S_soc_S_adc_40022000 +#define DT_N_S_zephyr_user_P_io_channels_IDX_8_VAL_input 12 +#define DT_N_S_zephyr_user_P_io_channels_IDX_8_VAL_input_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_9_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_IDX_9_PH DT_N_S_soc_S_adc_40022000 +#define DT_N_S_zephyr_user_P_io_channels_IDX_9_VAL_input 13 +#define DT_N_S_zephyr_user_P_io_channels_IDX_9_VAL_input_EXISTS 1 +#define DT_N_S_zephyr_user_P_io_channels_FOREACH_PROP_ELEM(fn) fn(DT_N_S_zephyr_user, io_channels, 0) \ + fn(DT_N_S_zephyr_user, io_channels, 1) \ + fn(DT_N_S_zephyr_user, io_channels, 2) \ + fn(DT_N_S_zephyr_user, io_channels, 3) \ + fn(DT_N_S_zephyr_user, io_channels, 4) \ + fn(DT_N_S_zephyr_user, io_channels, 5) \ + fn(DT_N_S_zephyr_user, io_channels, 6) \ + fn(DT_N_S_zephyr_user, io_channels, 7) \ + fn(DT_N_S_zephyr_user, io_channels, 8) \ + fn(DT_N_S_zephyr_user, io_channels, 9) +#define DT_N_S_zephyr_user_P_io_channels_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_zephyr_user, io_channels, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 9) +#define DT_N_S_zephyr_user_P_io_channels_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_zephyr_user, io_channels, 0, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, io_channels, 1, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, io_channels, 2, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, io_channels, 3, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, io_channels, 4, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, io_channels, 5, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, io_channels, 6, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, io_channels, 7, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, io_channels, 8, __VA_ARGS__) \ + fn(DT_N_S_zephyr_user, io_channels, 9, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_io_channels_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_zephyr_user, io_channels, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_zephyr_user, io_channels, 9, __VA_ARGS__) +#define DT_N_S_zephyr_user_P_io_channels_LEN 10 +#define DT_N_S_zephyr_user_P_io_channels_EXISTS 1 + +/* + * Devicetree node: /clocks/clk-csi + * + * Node identifier: DT_N_S_clocks_S_clk_csi + * + * Binding (compatible = fixed-clock): + * $ZEPHYR_BASE/dts/bindings/clock/fixed-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_clk_csi_PATH "/clocks/clk-csi" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_clk_csi_FULL_NAME "clk-csi" +#define DT_N_S_clocks_S_clk_csi_FULL_NAME_UNQUOTED clk-csi +#define DT_N_S_clocks_S_clk_csi_FULL_NAME_TOKEN clk_csi +#define DT_N_S_clocks_S_clk_csi_FULL_NAME_UPPER_TOKEN CLK_CSI + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_clk_csi_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_clk_csi_CHILD_IDX 3 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_clk_csi_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_clk_csi_FOREACH_NODELABEL(fn) fn(clk_csi) +#define DT_N_S_clocks_S_clk_csi_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_csi, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_csi_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_clk_csi_CHILD_NUM 0 +#define DT_N_S_clocks_S_clk_csi_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_csi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_clk_csi_HASH oJ7lwYm3Ewuv4QlO5OgXDu8dUN7qrBoXCBGWlhAtU9o + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_clk_csi_ORD 104 +#define DT_N_S_clocks_S_clk_csi_ORD_STR_SORTABLE 00104 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_clk_csi_REQUIRES_ORDS \ + 5, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_clk_csi_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_clk_csi_EXISTS 1 +#define DT_N_INST_2_fixed_clock DT_N_S_clocks_S_clk_csi +#define DT_N_NODELABEL_clk_csi DT_N_S_clocks_S_clk_csi + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_clk_csi_REG_NUM 0 +#define DT_N_S_clocks_S_clk_csi_RANGES_NUM 0 +#define DT_N_S_clocks_S_clk_csi_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_clk_csi_IRQ_NUM 0 +#define DT_N_S_clocks_S_clk_csi_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_clk_csi_COMPAT_MATCHES_fixed_clock 1 +#define DT_N_S_clocks_S_clk_csi_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_clk_csi_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_clk_csi_P_clock_frequency 4000000 +#define DT_N_S_clocks_S_clk_csi_P_clock_frequency_EXISTS 1 +#define DT_N_S_clocks_S_clk_csi_P_status "disabled" +#define DT_N_S_clocks_S_clk_csi_P_status_STRING_UNQUOTED disabled +#define DT_N_S_clocks_S_clk_csi_P_status_STRING_TOKEN disabled +#define DT_N_S_clocks_S_clk_csi_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_clocks_S_clk_csi_P_status_IDX_0 "disabled" +#define DT_N_S_clocks_S_clk_csi_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_csi_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_clocks_S_clk_csi_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_clocks_S_clk_csi_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_csi, status, 0) +#define DT_N_S_clocks_S_clk_csi_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_csi, status, 0) +#define DT_N_S_clocks_S_clk_csi_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_csi, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_csi_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_csi, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_csi_P_status_LEN 1 +#define DT_N_S_clocks_S_clk_csi_P_status_EXISTS 1 +#define DT_N_S_clocks_S_clk_csi_P_compatible {"fixed-clock"} +#define DT_N_S_clocks_S_clk_csi_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_csi_P_compatible_IDX_0 "fixed-clock" +#define DT_N_S_clocks_S_clk_csi_P_compatible_IDX_0_STRING_UNQUOTED fixed-clock +#define DT_N_S_clocks_S_clk_csi_P_compatible_IDX_0_STRING_TOKEN fixed_clock +#define DT_N_S_clocks_S_clk_csi_P_compatible_IDX_0_STRING_UPPER_TOKEN FIXED_CLOCK +#define DT_N_S_clocks_S_clk_csi_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_csi, compatible, 0) +#define DT_N_S_clocks_S_clk_csi_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_csi, compatible, 0) +#define DT_N_S_clocks_S_clk_csi_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_csi, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_csi_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_csi, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_csi_P_compatible_LEN 1 +#define DT_N_S_clocks_S_clk_csi_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_clk_csi_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_clk_csi_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_clk_csi_P_wakeup_source 0 +#define DT_N_S_clocks_S_clk_csi_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_clk_csi_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_clk_csi_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/clk-hsi + * + * Node identifier: DT_N_S_clocks_S_clk_hsi + * + * Binding (compatible = st,stm32h7-hsi-clock): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32h7-hsi-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_clk_hsi_PATH "/clocks/clk-hsi" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_clk_hsi_FULL_NAME "clk-hsi" +#define DT_N_S_clocks_S_clk_hsi_FULL_NAME_UNQUOTED clk-hsi +#define DT_N_S_clocks_S_clk_hsi_FULL_NAME_TOKEN clk_hsi +#define DT_N_S_clocks_S_clk_hsi_FULL_NAME_UPPER_TOKEN CLK_HSI + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_clk_hsi_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_clk_hsi_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_clk_hsi_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_clk_hsi_FOREACH_NODELABEL(fn) fn(clk_hsi) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_hsi, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_clk_hsi_CHILD_NUM 0 +#define DT_N_S_clocks_S_clk_hsi_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hsi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_clk_hsi_HASH kE6dGnI__HuixEc_o2mPIojHDSoRqqYmExJJycW6WDM + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_clk_hsi_ORD 105 +#define DT_N_S_clocks_S_clk_hsi_ORD_STR_SORTABLE 00105 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_clk_hsi_REQUIRES_ORDS \ + 5, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_clk_hsi_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_clk_hsi_EXISTS 1 +#define DT_N_INST_0_st_stm32h7_hsi_clock DT_N_S_clocks_S_clk_hsi +#define DT_N_NODELABEL_clk_hsi DT_N_S_clocks_S_clk_hsi + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_clk_hsi_REG_NUM 0 +#define DT_N_S_clocks_S_clk_hsi_RANGES_NUM 0 +#define DT_N_S_clocks_S_clk_hsi_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_clk_hsi_IRQ_NUM 0 +#define DT_N_S_clocks_S_clk_hsi_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_clk_hsi_COMPAT_MATCHES_st_stm32h7_hsi_clock 1 +#define DT_N_S_clocks_S_clk_hsi_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_clocks_S_clk_hsi_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_COMPAT_MODEL_IDX_0 "stm32h7-hsi-clock" +#define DT_N_S_clocks_S_clk_hsi_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_clk_hsi_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_clk_hsi_P_hsi_div 1 +#define DT_N_S_clocks_S_clk_hsi_P_hsi_div_IDX_0_ENUM_IDX 0 +#define DT_N_S_clocks_S_clk_hsi_P_hsi_div_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_hsi_div_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_hsi_div_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_clock_frequency 64000000 +#define DT_N_S_clocks_S_clk_hsi_P_clock_frequency_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_status "okay" +#define DT_N_S_clocks_S_clk_hsi_P_status_STRING_UNQUOTED okay +#define DT_N_S_clocks_S_clk_hsi_P_status_STRING_TOKEN okay +#define DT_N_S_clocks_S_clk_hsi_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0 "okay" +#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_clocks_S_clk_hsi_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi, status, 0) +#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi, status, 0) +#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi_P_status_LEN 1 +#define DT_N_S_clocks_S_clk_hsi_P_status_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_compatible {"st,stm32h7-hsi-clock"} +#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0 "st,stm32h7-hsi-clock" +#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-hsi-clock +#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_hsi_clock +#define DT_N_S_clocks_S_clk_hsi_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_HSI_CLOCK +#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0) +#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0) +#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi_P_compatible_LEN 1 +#define DT_N_S_clocks_S_clk_hsi_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_clk_hsi_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_wakeup_source 0 +#define DT_N_S_clocks_S_clk_hsi_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_clk_hsi_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/clk-hsi48 + * + * Node identifier: DT_N_S_clocks_S_clk_hsi48 + * + * Binding (compatible = fixed-clock): + * $ZEPHYR_BASE/dts/bindings/clock/fixed-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_clk_hsi48_PATH "/clocks/clk-hsi48" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME "clk-hsi48" +#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME_UNQUOTED clk-hsi48 +#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME_TOKEN clk_hsi48 +#define DT_N_S_clocks_S_clk_hsi48_FULL_NAME_UPPER_TOKEN CLK_HSI48 + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_clk_hsi48_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_clk_hsi48_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_clk_hsi48_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_NODELABEL(fn) fn(clk_hsi48) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_hsi48, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_clk_hsi48_CHILD_NUM 0 +#define DT_N_S_clocks_S_clk_hsi48_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_clk_hsi48_HASH m4q2NUiXYm_f1RVl9VGtz8iGJxJSrtVw_lCXFQUVjsw + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_clk_hsi48_ORD 106 +#define DT_N_S_clocks_S_clk_hsi48_ORD_STR_SORTABLE 00106 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_clk_hsi48_REQUIRES_ORDS \ + 5, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_clk_hsi48_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_clk_hsi48_EXISTS 1 +#define DT_N_INST_0_fixed_clock DT_N_S_clocks_S_clk_hsi48 +#define DT_N_NODELABEL_clk_hsi48 DT_N_S_clocks_S_clk_hsi48 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_clk_hsi48_REG_NUM 0 +#define DT_N_S_clocks_S_clk_hsi48_RANGES_NUM 0 +#define DT_N_S_clocks_S_clk_hsi48_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_clk_hsi48_IRQ_NUM 0 +#define DT_N_S_clocks_S_clk_hsi48_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_clk_hsi48_COMPAT_MATCHES_fixed_clock 1 +#define DT_N_S_clocks_S_clk_hsi48_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_clk_hsi48_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_clk_hsi48_P_clock_frequency 48000000 +#define DT_N_S_clocks_S_clk_hsi48_P_clock_frequency_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_status "okay" +#define DT_N_S_clocks_S_clk_hsi48_P_status_STRING_UNQUOTED okay +#define DT_N_S_clocks_S_clk_hsi48_P_status_STRING_TOKEN okay +#define DT_N_S_clocks_S_clk_hsi48_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0 "okay" +#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_clocks_S_clk_hsi48_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi48, status, 0) +#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi48, status, 0) +#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi48, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi48_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi48, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi48_P_status_LEN 1 +#define DT_N_S_clocks_S_clk_hsi48_P_status_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_compatible {"fixed-clock"} +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0 "fixed-clock" +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_STRING_UNQUOTED fixed-clock +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_STRING_TOKEN fixed_clock +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_IDX_0_STRING_UPPER_TOKEN FIXED_CLOCK +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0) +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0) +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_hsi48, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_LEN 1 +#define DT_N_S_clocks_S_clk_hsi48_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_wakeup_source 0 +#define DT_N_S_clocks_S_clk_hsi48_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_clk_hsi48_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/clk-lse + * + * Node identifier: DT_N_S_clocks_S_clk_lse + * + * Binding (compatible = st,stm32-lse-clock): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-lse-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_clk_lse_PATH "/clocks/clk-lse" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_clk_lse_FULL_NAME "clk-lse" +#define DT_N_S_clocks_S_clk_lse_FULL_NAME_UNQUOTED clk-lse +#define DT_N_S_clocks_S_clk_lse_FULL_NAME_TOKEN clk_lse +#define DT_N_S_clocks_S_clk_lse_FULL_NAME_UPPER_TOKEN CLK_LSE + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_clk_lse_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_clk_lse_CHILD_IDX 4 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_clk_lse_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_clk_lse_FOREACH_NODELABEL(fn) fn(clk_lse) +#define DT_N_S_clocks_S_clk_lse_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_lse, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lse_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_clk_lse_CHILD_NUM 0 +#define DT_N_S_clocks_S_clk_lse_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_lse_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_clk_lse_HASH RRqOX2XdydrKvwOwHO0Kh3mPfPtUsDJrDySCwF316Ek + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_clk_lse_ORD 107 +#define DT_N_S_clocks_S_clk_lse_ORD_STR_SORTABLE 00107 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_clk_lse_REQUIRES_ORDS \ + 5, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_clk_lse_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_clk_lse_EXISTS 1 +#define DT_N_INST_0_st_stm32_lse_clock DT_N_S_clocks_S_clk_lse +#define DT_N_NODELABEL_clk_lse DT_N_S_clocks_S_clk_lse + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_clk_lse_REG_NUM 0 +#define DT_N_S_clocks_S_clk_lse_RANGES_NUM 0 +#define DT_N_S_clocks_S_clk_lse_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_clk_lse_IRQ_NUM 0 +#define DT_N_S_clocks_S_clk_lse_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_clk_lse_COMPAT_MATCHES_st_stm32_lse_clock 1 +#define DT_N_S_clocks_S_clk_lse_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_clocks_S_clk_lse_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_COMPAT_MODEL_IDX_0 "stm32-lse-clock" +#define DT_N_S_clocks_S_clk_lse_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_clk_lse_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_clk_lse_P_driving_capability 0 +#define DT_N_S_clocks_S_clk_lse_P_driving_capability_IDX_0_ENUM_IDX 0 +#define DT_N_S_clocks_S_clk_lse_P_driving_capability_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_driving_capability_IDX_0_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_driving_capability_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_lse_bypass 0 +#define DT_N_S_clocks_S_clk_lse_P_lse_bypass_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_clock_frequency 32768 +#define DT_N_S_clocks_S_clk_lse_P_clock_frequency_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_status "disabled" +#define DT_N_S_clocks_S_clk_lse_P_status_STRING_UNQUOTED disabled +#define DT_N_S_clocks_S_clk_lse_P_status_STRING_TOKEN disabled +#define DT_N_S_clocks_S_clk_lse_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0 "disabled" +#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_clocks_S_clk_lse_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lse, status, 0) +#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lse, status, 0) +#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lse, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lse_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lse, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lse_P_status_LEN 1 +#define DT_N_S_clocks_S_clk_lse_P_status_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_compatible {"st,stm32-lse-clock"} +#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0 "st,stm32-lse-clock" +#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-lse-clock +#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_STRING_TOKEN st_stm32_lse_clock +#define DT_N_S_clocks_S_clk_lse_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LSE_CLOCK +#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lse, compatible, 0) +#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lse, compatible, 0) +#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lse, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lse_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lse, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lse_P_compatible_LEN 1 +#define DT_N_S_clocks_S_clk_lse_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_clk_lse_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_wakeup_source 0 +#define DT_N_S_clocks_S_clk_lse_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_clk_lse_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_clk_lse_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/clk-lsi + * + * Node identifier: DT_N_S_clocks_S_clk_lsi + * + * Binding (compatible = fixed-clock): + * $ZEPHYR_BASE/dts/bindings/clock/fixed-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_clk_lsi_PATH "/clocks/clk-lsi" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_clk_lsi_FULL_NAME "clk-lsi" +#define DT_N_S_clocks_S_clk_lsi_FULL_NAME_UNQUOTED clk-lsi +#define DT_N_S_clocks_S_clk_lsi_FULL_NAME_TOKEN clk_lsi +#define DT_N_S_clocks_S_clk_lsi_FULL_NAME_UPPER_TOKEN CLK_LSI + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_clk_lsi_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_clk_lsi_CHILD_IDX 5 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_clk_lsi_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_clk_lsi_FOREACH_NODELABEL(fn) fn(clk_lsi) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_NODELABEL_VARGS(fn, ...) fn(clk_lsi, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_clk_lsi_CHILD_NUM 0 +#define DT_N_S_clocks_S_clk_lsi_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_clk_lsi_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_clk_lsi_HASH y39tlAqwOoFHfznEDn2ZnvWSfYGNtJJvOJBnTUmFguY + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_clk_lsi_ORD 108 +#define DT_N_S_clocks_S_clk_lsi_ORD_STR_SORTABLE 00108 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_clk_lsi_REQUIRES_ORDS \ + 5, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_clk_lsi_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_clk_lsi_EXISTS 1 +#define DT_N_INST_1_fixed_clock DT_N_S_clocks_S_clk_lsi +#define DT_N_NODELABEL_clk_lsi DT_N_S_clocks_S_clk_lsi + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_clk_lsi_REG_NUM 0 +#define DT_N_S_clocks_S_clk_lsi_RANGES_NUM 0 +#define DT_N_S_clocks_S_clk_lsi_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_clk_lsi_IRQ_NUM 0 +#define DT_N_S_clocks_S_clk_lsi_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_clk_lsi_COMPAT_MATCHES_fixed_clock 1 +#define DT_N_S_clocks_S_clk_lsi_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_clk_lsi_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_clk_lsi_P_clock_frequency 32000 +#define DT_N_S_clocks_S_clk_lsi_P_clock_frequency_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_status "okay" +#define DT_N_S_clocks_S_clk_lsi_P_status_STRING_UNQUOTED okay +#define DT_N_S_clocks_S_clk_lsi_P_status_STRING_TOKEN okay +#define DT_N_S_clocks_S_clk_lsi_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0 "okay" +#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_clocks_S_clk_lsi_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lsi, status, 0) +#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lsi, status, 0) +#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lsi, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lsi_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lsi, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lsi_P_status_LEN 1 +#define DT_N_S_clocks_S_clk_lsi_P_status_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_compatible {"fixed-clock"} +#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0 "fixed-clock" +#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_STRING_UNQUOTED fixed-clock +#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_STRING_TOKEN fixed_clock +#define DT_N_S_clocks_S_clk_lsi_P_compatible_IDX_0_STRING_UPPER_TOKEN FIXED_CLOCK +#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0) +#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0) +#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lsi_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_clk_lsi, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_clk_lsi_P_compatible_LEN 1 +#define DT_N_S_clocks_S_clk_lsi_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_clk_lsi_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_wakeup_source 0 +#define DT_N_S_clocks_S_clk_lsi_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_clk_lsi_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_clk_lsi_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/perck + * + * Node identifier: DT_N_S_clocks_S_perck + * + * Binding (compatible = st,stm32-clock-mux): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-clock-mux.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_perck_PATH "/clocks/perck" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_perck_FULL_NAME "perck" +#define DT_N_S_clocks_S_perck_FULL_NAME_UNQUOTED perck +#define DT_N_S_clocks_S_perck_FULL_NAME_TOKEN perck +#define DT_N_S_clocks_S_perck_FULL_NAME_UPPER_TOKEN PERCK + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_perck_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_perck_CHILD_IDX 9 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_perck_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_perck_FOREACH_NODELABEL(fn) fn(perck) +#define DT_N_S_clocks_S_perck_FOREACH_NODELABEL_VARGS(fn, ...) fn(perck, __VA_ARGS__) +#define DT_N_S_clocks_S_perck_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_perck_CHILD_NUM 0 +#define DT_N_S_clocks_S_perck_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_perck_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_perck_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_perck_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_perck_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_perck_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_perck_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_perck_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_perck_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_perck_HASH hm5fMqncFIYWtt_nbIjSrBnSwopKrzSLfFmb5_L71ug + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_perck_ORD 109 +#define DT_N_S_clocks_S_perck_ORD_STR_SORTABLE 00109 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_perck_REQUIRES_ORDS \ + 5, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_perck_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_perck_EXISTS 1 +#define DT_N_INST_0_st_stm32_clock_mux DT_N_S_clocks_S_perck +#define DT_N_NODELABEL_perck DT_N_S_clocks_S_perck + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_perck_REG_NUM 0 +#define DT_N_S_clocks_S_perck_RANGES_NUM 0 +#define DT_N_S_clocks_S_perck_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_perck_IRQ_NUM 0 +#define DT_N_S_clocks_S_perck_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_perck_COMPAT_MATCHES_st_stm32_clock_mux 1 +#define DT_N_S_clocks_S_perck_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_perck_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_clocks_S_perck_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_perck_COMPAT_MODEL_IDX_0 "stm32-clock-mux" +#define DT_N_S_clocks_S_perck_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_perck_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_perck_P_status "disabled" +#define DT_N_S_clocks_S_perck_P_status_STRING_UNQUOTED disabled +#define DT_N_S_clocks_S_perck_P_status_STRING_TOKEN disabled +#define DT_N_S_clocks_S_perck_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_clocks_S_perck_P_status_IDX_0 "disabled" +#define DT_N_S_clocks_S_perck_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_perck_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_clocks_S_perck_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_clocks_S_perck_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_perck, status, 0) +#define DT_N_S_clocks_S_perck_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_perck, status, 0) +#define DT_N_S_clocks_S_perck_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_perck, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_perck_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_perck, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_perck_P_status_LEN 1 +#define DT_N_S_clocks_S_perck_P_status_EXISTS 1 +#define DT_N_S_clocks_S_perck_P_compatible {"st,stm32-clock-mux"} +#define DT_N_S_clocks_S_perck_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_perck_P_compatible_IDX_0 "st,stm32-clock-mux" +#define DT_N_S_clocks_S_perck_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-clock-mux +#define DT_N_S_clocks_S_perck_P_compatible_IDX_0_STRING_TOKEN st_stm32_clock_mux +#define DT_N_S_clocks_S_perck_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_CLOCK_MUX +#define DT_N_S_clocks_S_perck_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_perck, compatible, 0) +#define DT_N_S_clocks_S_perck_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_perck, compatible, 0) +#define DT_N_S_clocks_S_perck_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_perck, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_perck_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_perck, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_perck_P_compatible_LEN 1 +#define DT_N_S_clocks_S_perck_P_compatible_EXISTS 1 + +/* + * Devicetree node: /clocks/pll@1 + * + * Node identifier: DT_N_S_clocks_S_pll_1 + * + * Binding (compatible = st,stm32h7-pll-clock): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32h7-pll-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_pll_1_PATH "/clocks/pll@1" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_pll_1_FULL_NAME "pll@1" +#define DT_N_S_clocks_S_pll_1_FULL_NAME_UNQUOTED pll@1 +#define DT_N_S_clocks_S_pll_1_FULL_NAME_TOKEN pll_1 +#define DT_N_S_clocks_S_pll_1_FULL_NAME_UPPER_TOKEN PLL_1 + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_pll_1_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_pll_1_CHILD_IDX 7 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_pll_1_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_pll_1_FOREACH_NODELABEL(fn) fn(pll2) +#define DT_N_S_clocks_S_pll_1_FOREACH_NODELABEL_VARGS(fn, ...) fn(pll2, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_1_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_pll_1_CHILD_NUM 0 +#define DT_N_S_clocks_S_pll_1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_pll_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_pll_1_HASH JJFzu0SVfVbZ8_LZM_K2_DI2AKbfFanqb4TPxF_LsOk + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_pll_1_ORD 110 +#define DT_N_S_clocks_S_pll_1_ORD_STR_SORTABLE 00110 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_pll_1_REQUIRES_ORDS \ + 5, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_pll_1_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_pll_1_EXISTS 1 +#define DT_N_INST_1_st_stm32h7_pll_clock DT_N_S_clocks_S_pll_1 +#define DT_N_NODELABEL_pll2 DT_N_S_clocks_S_pll_1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_pll_1_REG_NUM 1 +#define DT_N_S_clocks_S_pll_1_REG_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_REG_IDX_0_VAL_ADDRESS 1 +#define DT_N_S_clocks_S_pll_1_RANGES_NUM 0 +#define DT_N_S_clocks_S_pll_1_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_pll_1_IRQ_NUM 0 +#define DT_N_S_clocks_S_pll_1_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_pll_1_COMPAT_MATCHES_st_stm32h7_pll_clock 1 +#define DT_N_S_clocks_S_pll_1_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_clocks_S_pll_1_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_COMPAT_MODEL_IDX_0 "stm32h7-pll-clock" +#define DT_N_S_clocks_S_pll_1_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_pll_1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_pll_1_P_status "disabled" +#define DT_N_S_clocks_S_pll_1_P_status_STRING_UNQUOTED disabled +#define DT_N_S_clocks_S_pll_1_P_status_STRING_TOKEN disabled +#define DT_N_S_clocks_S_pll_1_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_clocks_S_pll_1_P_status_IDX_0 "disabled" +#define DT_N_S_clocks_S_pll_1_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_clocks_S_pll_1_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll_1, status, 0) +#define DT_N_S_clocks_S_pll_1_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll_1, status, 0) +#define DT_N_S_clocks_S_pll_1_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll_1, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_1_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll_1, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_1_P_status_LEN 1 +#define DT_N_S_clocks_S_pll_1_P_status_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_P_compatible {"st,stm32h7-pll-clock"} +#define DT_N_S_clocks_S_pll_1_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_P_compatible_IDX_0 "st,stm32h7-pll-clock" +#define DT_N_S_clocks_S_pll_1_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-pll-clock +#define DT_N_S_clocks_S_pll_1_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_pll_clock +#define DT_N_S_clocks_S_pll_1_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_PLL_CLOCK +#define DT_N_S_clocks_S_pll_1_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll_1, compatible, 0) +#define DT_N_S_clocks_S_pll_1_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll_1, compatible, 0) +#define DT_N_S_clocks_S_pll_1_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll_1, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_1_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll_1, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_1_P_compatible_LEN 1 +#define DT_N_S_clocks_S_pll_1_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_P_reg {1} +#define DT_N_S_clocks_S_pll_1_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_P_reg_IDX_0 1 +#define DT_N_S_clocks_S_pll_1_P_reg_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_pll_1_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_P_wakeup_source 0 +#define DT_N_S_clocks_S_pll_1_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_pll_1_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_pll_1_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /clocks/pll@2 + * + * Node identifier: DT_N_S_clocks_S_pll_2 + * + * Binding (compatible = st,stm32h7-pll-clock): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32h7-pll-clock.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_clocks_S_pll_2_PATH "/clocks/pll@2" + +/* Node's name with unit-address: */ +#define DT_N_S_clocks_S_pll_2_FULL_NAME "pll@2" +#define DT_N_S_clocks_S_pll_2_FULL_NAME_UNQUOTED pll@2 +#define DT_N_S_clocks_S_pll_2_FULL_NAME_TOKEN pll_2 +#define DT_N_S_clocks_S_pll_2_FULL_NAME_UPPER_TOKEN PLL_2 + +/* Node parent (/clocks) identifier: */ +#define DT_N_S_clocks_S_pll_2_PARENT DT_N_S_clocks + +/* Node's index in its parent's list of children: */ +#define DT_N_S_clocks_S_pll_2_CHILD_IDX 8 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_clocks_S_pll_2_NODELABEL_NUM 1 +#define DT_N_S_clocks_S_pll_2_FOREACH_NODELABEL(fn) fn(pll3) +#define DT_N_S_clocks_S_pll_2_FOREACH_NODELABEL_VARGS(fn, ...) fn(pll3, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_2_FOREACH_ANCESTOR(fn) fn(DT_N_S_clocks) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_clocks_S_pll_2_CHILD_NUM 0 +#define DT_N_S_clocks_S_pll_2_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD(fn) +#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_clocks_S_pll_2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_clocks_S_pll_2_HASH AyfmMRKSnRfFME3ldy51RFP75itWiDTD8X_Ea_NWS1o + +/* Node's dependency ordinal: */ +#define DT_N_S_clocks_S_pll_2_ORD 111 +#define DT_N_S_clocks_S_pll_2_ORD_STR_SORTABLE 00111 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_clocks_S_pll_2_REQUIRES_ORDS \ + 5, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_clocks_S_pll_2_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_clocks_S_pll_2_EXISTS 1 +#define DT_N_INST_2_st_stm32h7_pll_clock DT_N_S_clocks_S_pll_2 +#define DT_N_NODELABEL_pll3 DT_N_S_clocks_S_pll_2 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_clocks_S_pll_2_REG_NUM 1 +#define DT_N_S_clocks_S_pll_2_REG_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_REG_IDX_0_VAL_ADDRESS 2 +#define DT_N_S_clocks_S_pll_2_RANGES_NUM 0 +#define DT_N_S_clocks_S_pll_2_FOREACH_RANGE(fn) +#define DT_N_S_clocks_S_pll_2_IRQ_NUM 0 +#define DT_N_S_clocks_S_pll_2_IRQ_LEVEL 0 +#define DT_N_S_clocks_S_pll_2_COMPAT_MATCHES_st_stm32h7_pll_clock 1 +#define DT_N_S_clocks_S_pll_2_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_clocks_S_pll_2_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_COMPAT_MODEL_IDX_0 "stm32h7-pll-clock" +#define DT_N_S_clocks_S_pll_2_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_clocks_S_pll_2_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_clocks_S_pll_2_P_status "disabled" +#define DT_N_S_clocks_S_pll_2_P_status_STRING_UNQUOTED disabled +#define DT_N_S_clocks_S_pll_2_P_status_STRING_TOKEN disabled +#define DT_N_S_clocks_S_pll_2_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_clocks_S_pll_2_P_status_IDX_0 "disabled" +#define DT_N_S_clocks_S_pll_2_P_status_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_clocks_S_pll_2_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll_2, status, 0) +#define DT_N_S_clocks_S_pll_2_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll_2, status, 0) +#define DT_N_S_clocks_S_pll_2_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll_2, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_2_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll_2, status, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_2_P_status_LEN 1 +#define DT_N_S_clocks_S_pll_2_P_status_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_P_compatible {"st,stm32h7-pll-clock"} +#define DT_N_S_clocks_S_pll_2_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_P_compatible_IDX_0 "st,stm32h7-pll-clock" +#define DT_N_S_clocks_S_pll_2_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-pll-clock +#define DT_N_S_clocks_S_pll_2_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_pll_clock +#define DT_N_S_clocks_S_pll_2_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_PLL_CLOCK +#define DT_N_S_clocks_S_pll_2_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_clocks_S_pll_2, compatible, 0) +#define DT_N_S_clocks_S_pll_2_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_clocks_S_pll_2, compatible, 0) +#define DT_N_S_clocks_S_pll_2_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_clocks_S_pll_2, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_2_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_clocks_S_pll_2, compatible, 0, __VA_ARGS__) +#define DT_N_S_clocks_S_pll_2_P_compatible_LEN 1 +#define DT_N_S_clocks_S_pll_2_P_compatible_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_P_reg {2} +#define DT_N_S_clocks_S_pll_2_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_P_reg_IDX_0 2 +#define DT_N_S_clocks_S_pll_2_P_reg_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_P_zephyr_deferred_init 0 +#define DT_N_S_clocks_S_pll_2_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_P_wakeup_source 0 +#define DT_N_S_clocks_S_pll_2_P_wakeup_source_EXISTS 1 +#define DT_N_S_clocks_S_pll_2_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_clocks_S_pll_2_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /cpus + * + * Node identifier: DT_N_S_cpus + */ + +/* Node's full path: */ +#define DT_N_S_cpus_PATH "/cpus" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_FULL_NAME "cpus" +#define DT_N_S_cpus_FULL_NAME_UNQUOTED cpus +#define DT_N_S_cpus_FULL_NAME_TOKEN cpus +#define DT_N_S_cpus_FULL_NAME_UPPER_TOKEN CPUS + +/* Node parent (/) identifier: */ +#define DT_N_S_cpus_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_CHILD_IDX 3 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_cpus_NODELABEL_NUM 0 +#define DT_N_S_cpus_FOREACH_NODELABEL(fn) +#define DT_N_S_cpus_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_cpus_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_CHILD_NUM 1 +#define DT_N_S_cpus_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_cpus_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0) +#define DT_N_S_cpus_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0) +#define DT_N_S_cpus_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) +#define DT_N_S_cpus_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) +#define DT_N_S_cpus_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_cpus_HASH iL3XRGZVvvtpNJqKV0_jvtuXF7m6kgky4nI2ifizwdg + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_ORD 112 +#define DT_N_S_cpus_ORD_STR_SORTABLE 00112 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_REQUIRES_ORDS \ + 0, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_SUPPORTS_ORDS \ + 113, + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_REG_NUM 0 +#define DT_N_S_cpus_RANGES_NUM 0 +#define DT_N_S_cpus_FOREACH_RANGE(fn) +#define DT_N_S_cpus_IRQ_NUM 0 +#define DT_N_S_cpus_IRQ_LEVEL 0 +#define DT_N_S_cpus_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_cpus_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /cpus/cpu@0 + * + * Node identifier: DT_N_S_cpus_S_cpu_0 + * + * Binding (compatible = arm,cortex-m7): + * $ZEPHYR_BASE/dts/bindings/cpu/arm,cortex-m7.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_cpus_S_cpu_0_PATH "/cpus/cpu@0" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_S_cpu_0_FULL_NAME "cpu@0" +#define DT_N_S_cpus_S_cpu_0_FULL_NAME_UNQUOTED cpu@0 +#define DT_N_S_cpus_S_cpu_0_FULL_NAME_TOKEN cpu_0 +#define DT_N_S_cpus_S_cpu_0_FULL_NAME_UPPER_TOKEN CPU_0 + +/* Node parent (/cpus) identifier: */ +#define DT_N_S_cpus_S_cpu_0_PARENT DT_N_S_cpus + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_S_cpu_0_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_cpus_S_cpu_0_NODELABEL_NUM 1 +#define DT_N_S_cpus_S_cpu_0_FOREACH_NODELABEL(fn) fn(cpu0) +#define DT_N_S_cpus_S_cpu_0_FOREACH_NODELABEL_VARGS(fn, ...) fn(cpu0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_cpus) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_S_cpu_0_CHILD_NUM 1 +#define DT_N_S_cpus_S_cpu_0_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_cpus_S_cpu_0_HASH Su0JBbOtM0QIxe_1ka2Xvgw4rk1QaIlMIj8Rp_v4yVQ + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_S_cpu_0_ORD 113 +#define DT_N_S_cpus_S_cpu_0_ORD_STR_SORTABLE 00113 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_S_cpu_0_REQUIRES_ORDS \ + 112, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_S_cpu_0_SUPPORTS_ORDS \ + 114, + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_S_cpu_0_EXISTS 1 +#define DT_N_INST_0_arm_cortex_m7 DT_N_S_cpus_S_cpu_0 +#define DT_N_NODELABEL_cpu0 DT_N_S_cpus_S_cpu_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_S_cpu_0_REG_NUM 1 +#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_REG_IDX_0_VAL_ADDRESS 0 +#define DT_N_S_cpus_S_cpu_0_RANGES_NUM 0 +#define DT_N_S_cpus_S_cpu_0_FOREACH_RANGE(fn) +#define DT_N_S_cpus_S_cpu_0_IRQ_NUM 0 +#define DT_N_S_cpus_S_cpu_0_IRQ_LEVEL 0 +#define DT_N_S_cpus_S_cpu_0_COMPAT_MATCHES_arm_cortex_m7 1 +#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_COMPAT_VENDOR_IDX_0 "ARM Ltd." +#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_COMPAT_MODEL_IDX_0 "cortex-m7" +#define DT_N_S_cpus_S_cpu_0_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_cpus_S_cpu_0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_cpus_S_cpu_0_P_compatible {"arm,cortex-m7"} +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0 "arm,cortex-m7" +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UNQUOTED arm,cortex-m7 +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_TOKEN arm_cortex_m7 +#define DT_N_S_cpus_S_cpu_0_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_CORTEX_M7 +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0, compatible, 0) +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0, compatible, 0) +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0, compatible, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_P_compatible_LEN 1 +#define DT_N_S_cpus_S_cpu_0_P_compatible_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_reg {0} +#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_reg_IDX_0 0 +#define DT_N_S_cpus_S_cpu_0_P_reg_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init 0 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_wakeup_source 0 +#define DT_N_S_cpus_S_cpu_0_P_wakeup_source_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_cpus_S_cpu_0_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /cpus/cpu@0/mpu@e000ed90 + * + * Node identifier: DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90 + * + * Binding (compatible = arm,armv7m-mpu): + * $ZEPHYR_BASE/dts/bindings/mmu_mpu/arm,armv7m-mpu.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PATH "/cpus/cpu@0/mpu@e000ed90" + +/* Node's name with unit-address: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FULL_NAME "mpu@e000ed90" +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FULL_NAME_UNQUOTED mpu@e000ed90 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FULL_NAME_TOKEN mpu_e000ed90 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FULL_NAME_UPPER_TOKEN MPU_E000ED90 + +/* Node parent (/cpus/cpu@0) identifier: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PARENT DT_N_S_cpus_S_cpu_0 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_NODELABEL_NUM 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_NODELABEL(fn) fn(mpu) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_NODELABEL_VARGS(fn, ...) fn(mpu, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_ANCESTOR(fn) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_NUM 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD(fn) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_HASH otj85KLBeEBY12eXojsCVZB1yE6Ww_J1xjGC9_C8_ok + +/* Node's dependency ordinal: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD 114 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_ORD_STR_SORTABLE 00114 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REQUIRES_ORDS \ + 113, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_EXISTS 1 +#define DT_N_INST_0_arm_armv7m_mpu DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90 +#define DT_N_NODELABEL_mpu DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_NUM 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_VAL_ADDRESS 3758157200 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_REG_IDX_0_VAL_SIZE 64 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_RANGES_NUM 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_FOREACH_RANGE(fn) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_IRQ_NUM 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_IRQ_LEVEL 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MATCHES_arm_armv7m_mpu 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_VENDOR_IDX_0 "ARM Ltd." +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_COMPAT_MODEL_IDX_0 "armv7m-mpu" +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg {3758157200, 64} +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_0 3758157200 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_IDX_1 64 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_reg_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible {"arm,armv7m-mpu"} +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0 "arm,armv7m-mpu" +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_UNQUOTED arm,armv7m-mpu +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_TOKEN arm_armv7m_mpu +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV7M_MPU +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, compatible, 0, __VA_ARGS__) +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_LEN 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_compatible_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_deferred_init 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_wakeup_source 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_wakeup_source_EXISTS 1 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /leds + * + * Node identifier: DT_N_S_leds + * + * Binding (compatible = gpio-leds): + * $ZEPHYR_BASE/dts/bindings/led/gpio-leds.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_leds_PATH "/leds" + +/* Node's name with unit-address: */ +#define DT_N_S_leds_FULL_NAME "leds" +#define DT_N_S_leds_FULL_NAME_UNQUOTED leds +#define DT_N_S_leds_FULL_NAME_TOKEN leds +#define DT_N_S_leds_FULL_NAME_UPPER_TOKEN LEDS + +/* Node parent (/) identifier: */ +#define DT_N_S_leds_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_leds_CHILD_IDX 20 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_leds_NODELABEL_NUM 0 +#define DT_N_S_leds_FOREACH_NODELABEL(fn) +#define DT_N_S_leds_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_leds_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_leds_CHILD_NUM 3 +#define DT_N_S_leds_CHILD_NUM_STATUS_OKAY 3 +#define DT_N_S_leds_FOREACH_CHILD(fn) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) +#define DT_N_S_leds_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_leds_S_led_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2) +#define DT_N_S_leds_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) +#define DT_N_S_leds_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2, __VA_ARGS__) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_leds_S_led_0) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) +#define DT_N_S_leds_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_leds_S_led_2, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_leds_HASH bMroFUocDdjE3kJ38dK18mDvlCOPoyya5kIIs76irj8 + +/* Node's dependency ordinal: */ +#define DT_N_S_leds_ORD 115 +#define DT_N_S_leds_ORD_STR_SORTABLE 00115 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_leds_REQUIRES_ORDS \ + 0, \ + 71, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_leds_SUPPORTS_ORDS \ + 116, \ + 117, \ + 118, + +/* Existence and alternate IDs: */ +#define DT_N_S_leds_EXISTS 1 +#define DT_N_INST_0_gpio_leds DT_N_S_leds + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_leds_REG_NUM 0 +#define DT_N_S_leds_RANGES_NUM 0 +#define DT_N_S_leds_FOREACH_RANGE(fn) +#define DT_N_S_leds_IRQ_NUM 0 +#define DT_N_S_leds_IRQ_LEVEL 0 +#define DT_N_S_leds_COMPAT_MATCHES_gpio_leds 1 +#define DT_N_S_leds_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_leds_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_leds_P_compatible {"gpio-leds"} +#define DT_N_S_leds_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_leds_P_compatible_IDX_0 "gpio-leds" +#define DT_N_S_leds_P_compatible_IDX_0_STRING_UNQUOTED gpio-leds +#define DT_N_S_leds_P_compatible_IDX_0_STRING_TOKEN gpio_leds +#define DT_N_S_leds_P_compatible_IDX_0_STRING_UPPER_TOKEN GPIO_LEDS +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds, compatible, 0) +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds, compatible, 0) +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__) +#define DT_N_S_leds_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds, compatible, 0, __VA_ARGS__) +#define DT_N_S_leds_P_compatible_LEN 1 +#define DT_N_S_leds_P_compatible_EXISTS 1 + +/* + * Devicetree node: /leds/led_0 + * + * Node identifier: DT_N_S_leds_S_led_0 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_leds_S_led_0_PATH "/leds/led_0" + +/* Node's name with unit-address: */ +#define DT_N_S_leds_S_led_0_FULL_NAME "led_0" +#define DT_N_S_leds_S_led_0_FULL_NAME_UNQUOTED led_0 +#define DT_N_S_leds_S_led_0_FULL_NAME_TOKEN led_0 +#define DT_N_S_leds_S_led_0_FULL_NAME_UPPER_TOKEN LED_0 + +/* Node parent (/leds) identifier: */ +#define DT_N_S_leds_S_led_0_PARENT DT_N_S_leds + +/* Node's index in its parent's list of children: */ +#define DT_N_S_leds_S_led_0_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_leds_S_led_0_NODELABEL_NUM 1 +#define DT_N_S_leds_S_led_0_FOREACH_NODELABEL(fn) fn(red_led) +#define DT_N_S_leds_S_led_0_FOREACH_NODELABEL_VARGS(fn, ...) fn(red_led, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_leds) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_leds_S_led_0_CHILD_NUM 0 +#define DT_N_S_leds_S_led_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_leds_S_led_0_FOREACH_CHILD(fn) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_leds_S_led_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_leds_S_led_0_HASH kqSZv01Dnr_1hPdmxPVlr9u8kLMk_UWHIyVHG3GknSY + +/* Node's dependency ordinal: */ +#define DT_N_S_leds_S_led_0_ORD 116 +#define DT_N_S_leds_S_led_0_ORD_STR_SORTABLE 00116 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_leds_S_led_0_REQUIRES_ORDS \ + 71, \ + 115, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_leds_S_led_0_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_leds_S_led_0_EXISTS 1 +#define DT_N_ALIAS_led0 DT_N_S_leds_S_led_0 +#define DT_N_NODELABEL_red_led DT_N_S_leds_S_led_0 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_leds_S_led_0_REG_NUM 0 +#define DT_N_S_leds_S_led_0_RANGES_NUM 0 +#define DT_N_S_leds_S_led_0_FOREACH_RANGE(fn) +#define DT_N_S_leds_S_led_0_IRQ_NUM 0 +#define DT_N_S_leds_S_led_0_IRQ_LEVEL 0 +#define DT_N_S_leds_S_led_0_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_leds_S_led_0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin 5 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags 1 +#define DT_N_S_leds_S_led_0_P_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_0, gpios, 0) +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_0, gpios, 0) +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_0, gpios, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_0, gpios, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_0_P_gpios_LEN 1 +#define DT_N_S_leds_S_led_0_P_gpios_EXISTS 1 + +/* + * Devicetree node: /leds/led_1 + * + * Node identifier: DT_N_S_leds_S_led_1 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_leds_S_led_1_PATH "/leds/led_1" + +/* Node's name with unit-address: */ +#define DT_N_S_leds_S_led_1_FULL_NAME "led_1" +#define DT_N_S_leds_S_led_1_FULL_NAME_UNQUOTED led_1 +#define DT_N_S_leds_S_led_1_FULL_NAME_TOKEN led_1 +#define DT_N_S_leds_S_led_1_FULL_NAME_UPPER_TOKEN LED_1 + +/* Node parent (/leds) identifier: */ +#define DT_N_S_leds_S_led_1_PARENT DT_N_S_leds + +/* Node's index in its parent's list of children: */ +#define DT_N_S_leds_S_led_1_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_leds_S_led_1_NODELABEL_NUM 1 +#define DT_N_S_leds_S_led_1_FOREACH_NODELABEL(fn) fn(green_led) +#define DT_N_S_leds_S_led_1_FOREACH_NODELABEL_VARGS(fn, ...) fn(green_led, __VA_ARGS__) +#define DT_N_S_leds_S_led_1_FOREACH_ANCESTOR(fn) fn(DT_N_S_leds) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_leds_S_led_1_CHILD_NUM 0 +#define DT_N_S_leds_S_led_1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_leds_S_led_1_FOREACH_CHILD(fn) +#define DT_N_S_leds_S_led_1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_leds_S_led_1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_leds_S_led_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_leds_S_led_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_leds_S_led_1_HASH iXGpSU4KdWdLNkNXyuDlz5Q9aavHPvjTPItAJ_Q0T5c + +/* Node's dependency ordinal: */ +#define DT_N_S_leds_S_led_1_ORD 117 +#define DT_N_S_leds_S_led_1_ORD_STR_SORTABLE 00117 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_leds_S_led_1_REQUIRES_ORDS \ + 71, \ + 115, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_leds_S_led_1_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_leds_S_led_1_EXISTS 1 +#define DT_N_ALIAS_led1 DT_N_S_leds_S_led_1 +#define DT_N_NODELABEL_green_led DT_N_S_leds_S_led_1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_leds_S_led_1_REG_NUM 0 +#define DT_N_S_leds_S_led_1_RANGES_NUM 0 +#define DT_N_S_leds_S_led_1_FOREACH_RANGE(fn) +#define DT_N_S_leds_S_led_1_IRQ_NUM 0 +#define DT_N_S_leds_S_led_1_IRQ_LEVEL 0 +#define DT_N_S_leds_S_led_1_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_leds_S_led_1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_EXISTS 1 +#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin 6 +#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags 1 +#define DT_N_S_leds_S_led_1_P_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_1, gpios, 0) +#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_1, gpios, 0) +#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_1, gpios, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_1_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_1, gpios, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_1_P_gpios_LEN 1 +#define DT_N_S_leds_S_led_1_P_gpios_EXISTS 1 + +/* + * Devicetree node: /leds/led_2 + * + * Node identifier: DT_N_S_leds_S_led_2 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_leds_S_led_2_PATH "/leds/led_2" + +/* Node's name with unit-address: */ +#define DT_N_S_leds_S_led_2_FULL_NAME "led_2" +#define DT_N_S_leds_S_led_2_FULL_NAME_UNQUOTED led_2 +#define DT_N_S_leds_S_led_2_FULL_NAME_TOKEN led_2 +#define DT_N_S_leds_S_led_2_FULL_NAME_UPPER_TOKEN LED_2 + +/* Node parent (/leds) identifier: */ +#define DT_N_S_leds_S_led_2_PARENT DT_N_S_leds + +/* Node's index in its parent's list of children: */ +#define DT_N_S_leds_S_led_2_CHILD_IDX 2 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_leds_S_led_2_NODELABEL_NUM 1 +#define DT_N_S_leds_S_led_2_FOREACH_NODELABEL(fn) fn(blue_led) +#define DT_N_S_leds_S_led_2_FOREACH_NODELABEL_VARGS(fn, ...) fn(blue_led, __VA_ARGS__) +#define DT_N_S_leds_S_led_2_FOREACH_ANCESTOR(fn) fn(DT_N_S_leds) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_leds_S_led_2_CHILD_NUM 0 +#define DT_N_S_leds_S_led_2_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_leds_S_led_2_FOREACH_CHILD(fn) +#define DT_N_S_leds_S_led_2_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_leds_S_led_2_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_leds_S_led_2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_leds_S_led_2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_leds_S_led_2_HASH KsPGInVliEI1PRs0DmyETNF7dyG4frBo_Z_DeHCKQaA + +/* Node's dependency ordinal: */ +#define DT_N_S_leds_S_led_2_ORD 118 +#define DT_N_S_leds_S_led_2_ORD_STR_SORTABLE 00118 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_leds_S_led_2_REQUIRES_ORDS \ + 71, \ + 115, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_leds_S_led_2_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_leds_S_led_2_EXISTS 1 +#define DT_N_ALIAS_led2 DT_N_S_leds_S_led_2 +#define DT_N_NODELABEL_blue_led DT_N_S_leds_S_led_2 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_leds_S_led_2_REG_NUM 0 +#define DT_N_S_leds_S_led_2_RANGES_NUM 0 +#define DT_N_S_leds_S_led_2_FOREACH_RANGE(fn) +#define DT_N_S_leds_S_led_2_IRQ_NUM 0 +#define DT_N_S_leds_S_led_2_IRQ_LEVEL 0 +#define DT_N_S_leds_S_led_2_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_leds_S_led_2_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_EXISTS 1 +#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800 +#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_pin 7 +#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_flags 1 +#define DT_N_S_leds_S_led_2_P_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_leds_S_led_2, gpios, 0) +#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_leds_S_led_2, gpios, 0) +#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_leds_S_led_2, gpios, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_2_P_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_leds_S_led_2, gpios, 0, __VA_ARGS__) +#define DT_N_S_leds_S_led_2_P_gpios_LEN 1 +#define DT_N_S_leds_S_led_2_P_gpios_EXISTS 1 + +/* + * Devicetree node: /mcos + * + * Node identifier: DT_N_S_mcos + */ + +/* Node's full path: */ +#define DT_N_S_mcos_PATH "/mcos" + +/* Node's name with unit-address: */ +#define DT_N_S_mcos_FULL_NAME "mcos" +#define DT_N_S_mcos_FULL_NAME_UNQUOTED mcos +#define DT_N_S_mcos_FULL_NAME_TOKEN mcos +#define DT_N_S_mcos_FULL_NAME_UPPER_TOKEN MCOS + +/* Node parent (/) identifier: */ +#define DT_N_S_mcos_PARENT DT_N + +/* Node's index in its parent's list of children: */ +#define DT_N_S_mcos_CHILD_IDX 6 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_mcos_NODELABEL_NUM 0 +#define DT_N_S_mcos_FOREACH_NODELABEL(fn) +#define DT_N_S_mcos_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_mcos_FOREACH_ANCESTOR(fn) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_mcos_CHILD_NUM 2 +#define DT_N_S_mcos_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_mcos_FOREACH_CHILD(fn) fn(DT_N_S_mcos_S_mco1) fn(DT_N_S_mcos_S_mco2) +#define DT_N_S_mcos_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_mcos_S_mco1) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos_S_mco2) +#define DT_N_S_mcos_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_mcos_S_mco1, __VA_ARGS__) fn(DT_N_S_mcos_S_mco2, __VA_ARGS__) +#define DT_N_S_mcos_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mcos_S_mco1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_mcos_S_mco2, __VA_ARGS__) +#define DT_N_S_mcos_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_mcos_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_mcos_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_mcos_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_mcos_HASH 6SPQgIfzgP5rJNinRk1zLBq_DlKqwei9gyXlUnsq0Fg + +/* Node's dependency ordinal: */ +#define DT_N_S_mcos_ORD 119 +#define DT_N_S_mcos_ORD_STR_SORTABLE 00119 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_mcos_REQUIRES_ORDS \ + 0, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_mcos_SUPPORTS_ORDS \ + 120, \ + 121, + +/* Existence and alternate IDs: */ +#define DT_N_S_mcos_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_mcos_REG_NUM 0 +#define DT_N_S_mcos_RANGES_NUM 0 +#define DT_N_S_mcos_FOREACH_RANGE(fn) +#define DT_N_S_mcos_IRQ_NUM 0 +#define DT_N_S_mcos_IRQ_LEVEL 0 +#define DT_N_S_mcos_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_mcos_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /mcos/mco1 + * + * Node identifier: DT_N_S_mcos_S_mco1 + * + * Binding (compatible = st,stm32-clock-mco): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-clock-mco.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_mcos_S_mco1_PATH "/mcos/mco1" + +/* Node's name with unit-address: */ +#define DT_N_S_mcos_S_mco1_FULL_NAME "mco1" +#define DT_N_S_mcos_S_mco1_FULL_NAME_UNQUOTED mco1 +#define DT_N_S_mcos_S_mco1_FULL_NAME_TOKEN mco1 +#define DT_N_S_mcos_S_mco1_FULL_NAME_UPPER_TOKEN MCO1 + +/* Node parent (/mcos) identifier: */ +#define DT_N_S_mcos_S_mco1_PARENT DT_N_S_mcos + +/* Node's index in its parent's list of children: */ +#define DT_N_S_mcos_S_mco1_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_mcos_S_mco1_NODELABEL_NUM 1 +#define DT_N_S_mcos_S_mco1_FOREACH_NODELABEL(fn) fn(mco1) +#define DT_N_S_mcos_S_mco1_FOREACH_NODELABEL_VARGS(fn, ...) fn(mco1, __VA_ARGS__) +#define DT_N_S_mcos_S_mco1_FOREACH_ANCESTOR(fn) fn(DT_N_S_mcos) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_mcos_S_mco1_CHILD_NUM 0 +#define DT_N_S_mcos_S_mco1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_mcos_S_mco1_FOREACH_CHILD(fn) +#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_mcos_S_mco1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_mcos_S_mco1_HASH fXW21upYnb1ZV4bEuBvKCXEcbrABE4XfjXq4dwS7rfY + +/* Node's dependency ordinal: */ +#define DT_N_S_mcos_S_mco1_ORD 120 +#define DT_N_S_mcos_S_mco1_ORD_STR_SORTABLE 00120 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_mcos_S_mco1_REQUIRES_ORDS \ + 119, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_mcos_S_mco1_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_mcos_S_mco1_EXISTS 1 +#define DT_N_INST_0_st_stm32_clock_mco DT_N_S_mcos_S_mco1 +#define DT_N_NODELABEL_mco1 DT_N_S_mcos_S_mco1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_mcos_S_mco1_REG_NUM 0 +#define DT_N_S_mcos_S_mco1_RANGES_NUM 0 +#define DT_N_S_mcos_S_mco1_FOREACH_RANGE(fn) +#define DT_N_S_mcos_S_mco1_IRQ_NUM 0 +#define DT_N_S_mcos_S_mco1_IRQ_LEVEL 0 +#define DT_N_S_mcos_S_mco1_COMPAT_MATCHES_st_stm32_clock_mco 1 +#define DT_N_S_mcos_S_mco1_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_mcos_S_mco1_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_mcos_S_mco1_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_mcos_S_mco1_COMPAT_MODEL_IDX_0 "stm32-clock-mco" +#define DT_N_S_mcos_S_mco1_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_mcos_S_mco1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_mcos_S_mco1_P_status "disabled" +#define DT_N_S_mcos_S_mco1_P_status_STRING_UNQUOTED disabled +#define DT_N_S_mcos_S_mco1_P_status_STRING_TOKEN disabled +#define DT_N_S_mcos_S_mco1_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_mcos_S_mco1_P_status_IDX_0 "disabled" +#define DT_N_S_mcos_S_mco1_P_status_IDX_0_EXISTS 1 +#define DT_N_S_mcos_S_mco1_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_mcos_S_mco1_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_mcos_S_mco1_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mcos_S_mco1, status, 0) +#define DT_N_S_mcos_S_mco1_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mcos_S_mco1, status, 0) +#define DT_N_S_mcos_S_mco1_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mcos_S_mco1, status, 0, __VA_ARGS__) +#define DT_N_S_mcos_S_mco1_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mcos_S_mco1, status, 0, __VA_ARGS__) +#define DT_N_S_mcos_S_mco1_P_status_LEN 1 +#define DT_N_S_mcos_S_mco1_P_status_EXISTS 1 +#define DT_N_S_mcos_S_mco1_P_compatible {"st,stm32-clock-mco"} +#define DT_N_S_mcos_S_mco1_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_mcos_S_mco1_P_compatible_IDX_0 "st,stm32-clock-mco" +#define DT_N_S_mcos_S_mco1_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-clock-mco +#define DT_N_S_mcos_S_mco1_P_compatible_IDX_0_STRING_TOKEN st_stm32_clock_mco +#define DT_N_S_mcos_S_mco1_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_CLOCK_MCO +#define DT_N_S_mcos_S_mco1_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mcos_S_mco1, compatible, 0) +#define DT_N_S_mcos_S_mco1_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mcos_S_mco1, compatible, 0) +#define DT_N_S_mcos_S_mco1_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mcos_S_mco1, compatible, 0, __VA_ARGS__) +#define DT_N_S_mcos_S_mco1_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mcos_S_mco1, compatible, 0, __VA_ARGS__) +#define DT_N_S_mcos_S_mco1_P_compatible_LEN 1 +#define DT_N_S_mcos_S_mco1_P_compatible_EXISTS 1 +#define DT_N_S_mcos_S_mco1_P_zephyr_deferred_init 0 +#define DT_N_S_mcos_S_mco1_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_mcos_S_mco1_P_wakeup_source 0 +#define DT_N_S_mcos_S_mco1_P_wakeup_source_EXISTS 1 +#define DT_N_S_mcos_S_mco1_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_mcos_S_mco1_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /mcos/mco2 + * + * Node identifier: DT_N_S_mcos_S_mco2 + * + * Binding (compatible = st,stm32-clock-mco): + * $ZEPHYR_BASE/dts/bindings/clock/st,stm32-clock-mco.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_mcos_S_mco2_PATH "/mcos/mco2" + +/* Node's name with unit-address: */ +#define DT_N_S_mcos_S_mco2_FULL_NAME "mco2" +#define DT_N_S_mcos_S_mco2_FULL_NAME_UNQUOTED mco2 +#define DT_N_S_mcos_S_mco2_FULL_NAME_TOKEN mco2 +#define DT_N_S_mcos_S_mco2_FULL_NAME_UPPER_TOKEN MCO2 + +/* Node parent (/mcos) identifier: */ +#define DT_N_S_mcos_S_mco2_PARENT DT_N_S_mcos + +/* Node's index in its parent's list of children: */ +#define DT_N_S_mcos_S_mco2_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_mcos_S_mco2_NODELABEL_NUM 1 +#define DT_N_S_mcos_S_mco2_FOREACH_NODELABEL(fn) fn(mco2) +#define DT_N_S_mcos_S_mco2_FOREACH_NODELABEL_VARGS(fn, ...) fn(mco2, __VA_ARGS__) +#define DT_N_S_mcos_S_mco2_FOREACH_ANCESTOR(fn) fn(DT_N_S_mcos) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_mcos_S_mco2_CHILD_NUM 0 +#define DT_N_S_mcos_S_mco2_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_mcos_S_mco2_FOREACH_CHILD(fn) +#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_mcos_S_mco2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_mcos_S_mco2_HASH irDa5qZM1apmLNBL8AyfbwMybA8MLSxOkE_OVqE7xC0 + +/* Node's dependency ordinal: */ +#define DT_N_S_mcos_S_mco2_ORD 121 +#define DT_N_S_mcos_S_mco2_ORD_STR_SORTABLE 00121 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_mcos_S_mco2_REQUIRES_ORDS \ + 119, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_mcos_S_mco2_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_mcos_S_mco2_EXISTS 1 +#define DT_N_INST_1_st_stm32_clock_mco DT_N_S_mcos_S_mco2 +#define DT_N_NODELABEL_mco2 DT_N_S_mcos_S_mco2 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_mcos_S_mco2_REG_NUM 0 +#define DT_N_S_mcos_S_mco2_RANGES_NUM 0 +#define DT_N_S_mcos_S_mco2_FOREACH_RANGE(fn) +#define DT_N_S_mcos_S_mco2_IRQ_NUM 0 +#define DT_N_S_mcos_S_mco2_IRQ_LEVEL 0 +#define DT_N_S_mcos_S_mco2_COMPAT_MATCHES_st_stm32_clock_mco 1 +#define DT_N_S_mcos_S_mco2_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_mcos_S_mco2_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_mcos_S_mco2_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_mcos_S_mco2_COMPAT_MODEL_IDX_0 "stm32-clock-mco" +#define DT_N_S_mcos_S_mco2_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_mcos_S_mco2_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_mcos_S_mco2_P_status "disabled" +#define DT_N_S_mcos_S_mco2_P_status_STRING_UNQUOTED disabled +#define DT_N_S_mcos_S_mco2_P_status_STRING_TOKEN disabled +#define DT_N_S_mcos_S_mco2_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_mcos_S_mco2_P_status_IDX_0 "disabled" +#define DT_N_S_mcos_S_mco2_P_status_IDX_0_EXISTS 1 +#define DT_N_S_mcos_S_mco2_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_mcos_S_mco2_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_mcos_S_mco2_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mcos_S_mco2, status, 0) +#define DT_N_S_mcos_S_mco2_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mcos_S_mco2, status, 0) +#define DT_N_S_mcos_S_mco2_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mcos_S_mco2, status, 0, __VA_ARGS__) +#define DT_N_S_mcos_S_mco2_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mcos_S_mco2, status, 0, __VA_ARGS__) +#define DT_N_S_mcos_S_mco2_P_status_LEN 1 +#define DT_N_S_mcos_S_mco2_P_status_EXISTS 1 +#define DT_N_S_mcos_S_mco2_P_compatible {"st,stm32-clock-mco"} +#define DT_N_S_mcos_S_mco2_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_mcos_S_mco2_P_compatible_IDX_0 "st,stm32-clock-mco" +#define DT_N_S_mcos_S_mco2_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-clock-mco +#define DT_N_S_mcos_S_mco2_P_compatible_IDX_0_STRING_TOKEN st_stm32_clock_mco +#define DT_N_S_mcos_S_mco2_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_CLOCK_MCO +#define DT_N_S_mcos_S_mco2_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_mcos_S_mco2, compatible, 0) +#define DT_N_S_mcos_S_mco2_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_mcos_S_mco2, compatible, 0) +#define DT_N_S_mcos_S_mco2_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_mcos_S_mco2, compatible, 0, __VA_ARGS__) +#define DT_N_S_mcos_S_mco2_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_mcos_S_mco2, compatible, 0, __VA_ARGS__) +#define DT_N_S_mcos_S_mco2_P_compatible_LEN 1 +#define DT_N_S_mcos_S_mco2_P_compatible_EXISTS 1 +#define DT_N_S_mcos_S_mco2_P_zephyr_deferred_init 0 +#define DT_N_S_mcos_S_mco2_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_mcos_S_mco2_P_wakeup_source 0 +#define DT_N_S_mcos_S_mco2_P_wakeup_source_EXISTS 1 +#define DT_N_S_mcos_S_mco2_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_mcos_S_mco2_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/adc@40022100 + * + * Node identifier: DT_N_S_soc_S_adc_40022100 + * + * Binding (compatible = st,stm32-adc): + * $ZEPHYR_BASE/dts/bindings/adc/st,stm32-adc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_adc_40022100_PATH "/soc/adc@40022100" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_adc_40022100_FULL_NAME "adc@40022100" +#define DT_N_S_soc_S_adc_40022100_FULL_NAME_UNQUOTED adc@40022100 +#define DT_N_S_soc_S_adc_40022100_FULL_NAME_TOKEN adc_40022100 +#define DT_N_S_soc_S_adc_40022100_FULL_NAME_UPPER_TOKEN ADC_40022100 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_adc_40022100_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_adc_40022100_CHILD_IDX 49 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_adc_40022100_NODELABEL_NUM 1 +#define DT_N_S_soc_S_adc_40022100_FOREACH_NODELABEL(fn) fn(adc2) +#define DT_N_S_soc_S_adc_40022100_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc2, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_adc_40022100_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_40022100_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022100_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_adc_40022100_HASH 4U_WPGl_W8gUvDeIA3SWcWP6hyywf4KlEJf4J6Sx3cA + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_adc_40022100_ORD 122 +#define DT_N_S_soc_S_adc_40022100_ORD_STR_SORTABLE 00122 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_adc_40022100_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_adc_40022100_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_adc_40022100_EXISTS 1 +#define DT_N_INST_2_st_stm32_adc DT_N_S_soc_S_adc_40022100 +#define DT_N_NODELABEL_adc2 DT_N_S_soc_S_adc_40022100 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_adc_40022100_REG_NUM 1 +#define DT_N_S_soc_S_adc_40022100_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_REG_IDX_0_VAL_ADDRESS 1073881344 +#define DT_N_S_soc_S_adc_40022100_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_adc_40022100_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_40022100_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_40022100_IRQ_NUM 1 +#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_VAL_irq 18 +#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_adc_40022100_IRQ_LEVEL 1 +#define DT_N_S_soc_S_adc_40022100_COMPAT_MATCHES_st_stm32_adc 1 +#define DT_N_S_soc_S_adc_40022100_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_adc_40022100_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_COMPAT_MODEL_IDX_0 "stm32-adc" +#define DT_N_S_soc_S_adc_40022100_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_adc_40022100_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_adc_40022100_P_reg {1073881344, 1024} +#define DT_N_S_soc_S_adc_40022100_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_reg_IDX_0 1073881344 +#define DT_N_S_soc_S_adc_40022100_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_adc_40022100_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_VAL_bus 216 +#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_VAL_bits 32 +#define DT_N_S_soc_S_adc_40022100_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, clocks, 0) +#define DT_N_S_soc_S_adc_40022100_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, clocks, 0) +#define DT_N_S_soc_S_adc_40022100_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_clocks_LEN 1 +#define DT_N_S_soc_S_adc_40022100_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_interrupts {18, 0} +#define DT_N_S_soc_S_adc_40022100_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_interrupts_IDX_0 18 +#define DT_N_S_soc_S_adc_40022100_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_adc_40022100_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_vref_mv 3300 +#define DT_N_S_soc_S_adc_40022100_P_vref_mv_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_resolutions {8446476, 7725580, 6742540, 5497356, 4710924} +#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_0 8446476 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_1 7725580 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_2 6742540 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_3 5497356 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_IDX_4 4710924 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, resolutions, 0) \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 1) \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 2) \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 3) \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 4) +#define DT_N_S_soc_S_adc_40022100_P_resolutions_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, resolutions, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 4) +#define DT_N_S_soc_S_adc_40022100_P_resolutions_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, resolutions, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 4, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_resolutions_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, resolutions, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, resolutions, 4, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_resolutions_LEN 5 +#define DT_N_S_soc_S_adc_40022100_P_resolutions_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times {2, 3, 9, 17, 33, 65, 388, 811} +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_0 2 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_1 3 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_2 9 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_3 17 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_4 33 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_5 65 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_6 388 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_IDX_7 811 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, sampling_times, 0) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 1) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 2) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 3) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 4) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 5) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 6) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 7) +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, sampling_times, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 7) +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, sampling_times, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 7, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, sampling_times, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022100, sampling_times, 7, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_LEN 8 +#define DT_N_S_soc_S_adc_40022100_P_sampling_times_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer "FULLY_CONFIGURABLE" +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_STRING_UNQUOTED FULLY_CONFIGURABLE +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_STRING_TOKEN FULLY_CONFIGURABLE +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_STRING_UPPER_TOKEN FULLY_CONFIGURABLE +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_IDX_0 "FULLY_CONFIGURABLE" +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_IDX_0_ENUM_VAL_FULLY_CONFIGURABLE_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, st_adc_sequencer, 0) +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, st_adc_sequencer, 0) +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, st_adc_sequencer, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, st_adc_sequencer, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_LEN 1 +#define DT_N_S_soc_S_adc_40022100_P_st_adc_sequencer_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler "OVERSAMPLER_EXTENDED" +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_STRING_UNQUOTED OVERSAMPLER_EXTENDED +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_STRING_TOKEN OVERSAMPLER_EXTENDED +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_STRING_UPPER_TOKEN OVERSAMPLER_EXTENDED +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_IDX_0 "OVERSAMPLER_EXTENDED" +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_IDX_0_ENUM_VAL_OVERSAMPLER_EXTENDED_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, st_adc_oversampler, 0) +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, st_adc_oversampler, 0) +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, st_adc_oversampler, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, st_adc_oversampler, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_LEN 1 +#define DT_N_S_soc_S_adc_40022100_P_st_adc_oversampler_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_status "disabled" +#define DT_N_S_soc_S_adc_40022100_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_adc_40022100_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_adc_40022100_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_adc_40022100_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_adc_40022100_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_adc_40022100_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, status, 0) +#define DT_N_S_soc_S_adc_40022100_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, status, 0) +#define DT_N_S_soc_S_adc_40022100_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_status_LEN 1 +#define DT_N_S_soc_S_adc_40022100_P_status_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_compatible {"st,stm32-adc"} +#define DT_N_S_soc_S_adc_40022100_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_compatible_IDX_0 "st,stm32-adc" +#define DT_N_S_soc_S_adc_40022100_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-adc +#define DT_N_S_soc_S_adc_40022100_P_compatible_IDX_0_STRING_TOKEN st_stm32_adc +#define DT_N_S_soc_S_adc_40022100_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_ADC +#define DT_N_S_soc_S_adc_40022100_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022100, compatible, 0) +#define DT_N_S_soc_S_adc_40022100_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022100, compatible, 0) +#define DT_N_S_soc_S_adc_40022100_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022100, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022100, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022100_P_compatible_LEN 1 +#define DT_N_S_soc_S_adc_40022100_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_adc_40022100_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_wakeup_source 0 +#define DT_N_S_soc_S_adc_40022100_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_adc_40022100_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_adc_40022100_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/adc@40022300 + * + * Node identifier: DT_N_S_soc_S_adc_40022300 + * + * Binding (compatible = st,stm32-adc): + * $ZEPHYR_BASE/dts/bindings/adc/st,stm32-adc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_adc_40022300_PATH "/soc/adc@40022300" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_adc_40022300_FULL_NAME "adc@40022300" +#define DT_N_S_soc_S_adc_40022300_FULL_NAME_UNQUOTED adc@40022300 +#define DT_N_S_soc_S_adc_40022300_FULL_NAME_TOKEN adc_40022300 +#define DT_N_S_soc_S_adc_40022300_FULL_NAME_UPPER_TOKEN ADC_40022300 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_adc_40022300_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_adc_40022300_CHILD_IDX 50 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_adc_40022300_NODELABEL_NUM 1 +#define DT_N_S_soc_S_adc_40022300_FOREACH_NODELABEL(fn) fn(adc1_2) +#define DT_N_S_soc_S_adc_40022300_FOREACH_NODELABEL_VARGS(fn, ...) fn(adc1_2, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_adc_40022300_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_40022300_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022300_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_adc_40022300_HASH uJa5ETN902l5AFBbkdof9dPJZqWcKf230NUbZ1RNIcQ + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_adc_40022300_ORD 123 +#define DT_N_S_soc_S_adc_40022300_ORD_STR_SORTABLE 00123 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_adc_40022300_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_adc_40022300_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_adc_40022300_EXISTS 1 +#define DT_N_INST_3_st_stm32_adc DT_N_S_soc_S_adc_40022300 +#define DT_N_NODELABEL_adc1_2 DT_N_S_soc_S_adc_40022300 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_adc_40022300_REG_NUM 1 +#define DT_N_S_soc_S_adc_40022300_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_REG_IDX_0_VAL_ADDRESS 1073881856 +#define DT_N_S_soc_S_adc_40022300_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_adc_40022300_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_40022300_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_40022300_IRQ_NUM 1 +#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_VAL_irq 18 +#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_adc_40022300_IRQ_LEVEL 1 +#define DT_N_S_soc_S_adc_40022300_COMPAT_MATCHES_st_stm32_adc 1 +#define DT_N_S_soc_S_adc_40022300_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_adc_40022300_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_COMPAT_MODEL_IDX_0 "stm32-adc" +#define DT_N_S_soc_S_adc_40022300_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_adc_40022300_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_adc_40022300_P_reg {1073881856, 1024} +#define DT_N_S_soc_S_adc_40022300_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_reg_IDX_0 1073881856 +#define DT_N_S_soc_S_adc_40022300_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_adc_40022300_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_VAL_bus 216 +#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_VAL_bits 32 +#define DT_N_S_soc_S_adc_40022300_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, clocks, 0) +#define DT_N_S_soc_S_adc_40022300_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, clocks, 0) +#define DT_N_S_soc_S_adc_40022300_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_clocks_LEN 1 +#define DT_N_S_soc_S_adc_40022300_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_interrupts {18, 0} +#define DT_N_S_soc_S_adc_40022300_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_interrupts_IDX_0 18 +#define DT_N_S_soc_S_adc_40022300_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_adc_40022300_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_vref_mv 3300 +#define DT_N_S_soc_S_adc_40022300_P_vref_mv_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_resolutions {8446476, 7725580, 6742540, 5497356, 4710924} +#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_0 8446476 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_1 7725580 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_2 6742540 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_3 5497356 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_IDX_4 4710924 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, resolutions, 0) \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 1) \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 2) \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 3) \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 4) +#define DT_N_S_soc_S_adc_40022300_P_resolutions_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, resolutions, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 4) +#define DT_N_S_soc_S_adc_40022300_P_resolutions_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, resolutions, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 4, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_resolutions_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, resolutions, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, resolutions, 4, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_resolutions_LEN 5 +#define DT_N_S_soc_S_adc_40022300_P_resolutions_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times {2, 3, 9, 17, 33, 65, 388, 811} +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_0 2 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_1 3 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_2 9 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_3 17 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_4 33 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_5 65 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_6 388 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_IDX_7 811 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, sampling_times, 0) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 1) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 2) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 3) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 4) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 5) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 6) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 7) +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, sampling_times, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 7) +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, sampling_times, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 7, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, sampling_times, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_adc_40022300, sampling_times, 7, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_LEN 8 +#define DT_N_S_soc_S_adc_40022300_P_sampling_times_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer "FULLY_CONFIGURABLE" +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_STRING_UNQUOTED FULLY_CONFIGURABLE +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_STRING_TOKEN FULLY_CONFIGURABLE +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_STRING_UPPER_TOKEN FULLY_CONFIGURABLE +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_IDX_0 "FULLY_CONFIGURABLE" +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_IDX_0_ENUM_VAL_FULLY_CONFIGURABLE_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, st_adc_sequencer, 0) +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, st_adc_sequencer, 0) +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, st_adc_sequencer, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, st_adc_sequencer, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_LEN 1 +#define DT_N_S_soc_S_adc_40022300_P_st_adc_sequencer_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler "OVERSAMPLER_EXTENDED" +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_STRING_UNQUOTED OVERSAMPLER_EXTENDED +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_STRING_TOKEN OVERSAMPLER_EXTENDED +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_STRING_UPPER_TOKEN OVERSAMPLER_EXTENDED +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_IDX_0 "OVERSAMPLER_EXTENDED" +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_IDX_0_ENUM_VAL_OVERSAMPLER_EXTENDED_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, st_adc_oversampler, 0) +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, st_adc_oversampler, 0) +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, st_adc_oversampler, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, st_adc_oversampler, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_LEN 1 +#define DT_N_S_soc_S_adc_40022300_P_st_adc_oversampler_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_status "disabled" +#define DT_N_S_soc_S_adc_40022300_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_adc_40022300_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_adc_40022300_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_adc_40022300_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_adc_40022300_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_adc_40022300_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, status, 0) +#define DT_N_S_soc_S_adc_40022300_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, status, 0) +#define DT_N_S_soc_S_adc_40022300_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_status_LEN 1 +#define DT_N_S_soc_S_adc_40022300_P_status_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_compatible {"st,stm32-adc"} +#define DT_N_S_soc_S_adc_40022300_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_compatible_IDX_0 "st,stm32-adc" +#define DT_N_S_soc_S_adc_40022300_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-adc +#define DT_N_S_soc_S_adc_40022300_P_compatible_IDX_0_STRING_TOKEN st_stm32_adc +#define DT_N_S_soc_S_adc_40022300_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_ADC +#define DT_N_S_soc_S_adc_40022300_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022300, compatible, 0) +#define DT_N_S_soc_S_adc_40022300_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022300, compatible, 0) +#define DT_N_S_soc_S_adc_40022300_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022300, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022300, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022300_P_compatible_LEN 1 +#define DT_N_S_soc_S_adc_40022300_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_adc_40022300_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_wakeup_source 0 +#define DT_N_S_soc_S_adc_40022300_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_adc_40022300_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_adc_40022300_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/bdma@58025400 + * + * Node identifier: DT_N_S_soc_S_bdma_58025400 + * + * Binding (compatible = st,stm32-bdma): + * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-bdma.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_bdma_58025400_PATH "/soc/bdma@58025400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_bdma_58025400_FULL_NAME "bdma@58025400" +#define DT_N_S_soc_S_bdma_58025400_FULL_NAME_UNQUOTED bdma@58025400 +#define DT_N_S_soc_S_bdma_58025400_FULL_NAME_TOKEN bdma_58025400 +#define DT_N_S_soc_S_bdma_58025400_FULL_NAME_UPPER_TOKEN BDMA_58025400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_bdma_58025400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_bdma_58025400_CHILD_IDX 55 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_bdma_58025400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_bdma_58025400_FOREACH_NODELABEL(fn) fn(bdma1) +#define DT_N_S_soc_S_bdma_58025400_FOREACH_NODELABEL_VARGS(fn, ...) fn(bdma1, __VA_ARGS__) +#define DT_N_S_soc_S_bdma_58025400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_bdma_58025400_CHILD_NUM 0 +#define DT_N_S_soc_S_bdma_58025400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_bdma_58025400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_bdma_58025400_HASH CjYBCqMxXd_gr1XwlMz6FF_xG49H_J_bChPdE2Gfpho + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_bdma_58025400_ORD 124 +#define DT_N_S_soc_S_bdma_58025400_ORD_STR_SORTABLE 00124 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_bdma_58025400_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_bdma_58025400_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_bdma_58025400_EXISTS 1 +#define DT_N_INST_0_st_stm32_bdma DT_N_S_soc_S_bdma_58025400 +#define DT_N_NODELABEL_bdma1 DT_N_S_soc_S_bdma_58025400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_bdma_58025400_REG_NUM 1 +#define DT_N_S_soc_S_bdma_58025400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_REG_IDX_0_VAL_ADDRESS 1476547584 +#define DT_N_S_soc_S_bdma_58025400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_bdma_58025400_RANGES_NUM 0 +#define DT_N_S_soc_S_bdma_58025400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_bdma_58025400_IRQ_NUM 8 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_VAL_irq 129 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_VAL_irq 130 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_VAL_irq 131 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_VAL_irq 132 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_VAL_irq 133 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_VAL_priority 0 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_VAL_irq 134 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_VAL_priority 0 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_VAL_irq 135 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_VAL_priority 0 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_6_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_VAL_irq 136 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_VAL_priority 0 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_IRQ_IDX_7_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_bdma_58025400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_bdma_58025400_COMPAT_MATCHES_st_stm32_bdma 1 +#define DT_N_S_soc_S_bdma_58025400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_bdma_58025400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_COMPAT_MODEL_IDX_0 "stm32-bdma" +#define DT_N_S_soc_S_bdma_58025400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_bdma_58025400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_bdma_58025400_P_reg {1476547584, 1024} +#define DT_N_S_soc_S_bdma_58025400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_reg_IDX_0 1476547584 +#define DT_N_S_soc_S_bdma_58025400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_bdma_58025400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts {129, 0, 130, 0, 131, 0, 132, 0, 133, 0, 134, 0, 135, 0, 136, 0} +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_0 129 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_2 130 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_4 131 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_6 132 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_8 133 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_9 0 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_10 134 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_11 0 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_12_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_12 135 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_13_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_13 0 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_14_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_14 136 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_15_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_IDX_15 0 +#define DT_N_S_soc_S_bdma_58025400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_st_mem2mem 1 +#define DT_N_S_soc_S_bdma_58025400_P_st_mem2mem_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_dma_offset 0 +#define DT_N_S_soc_S_bdma_58025400_P_dma_offset_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_dma_requests 8 +#define DT_N_S_soc_S_bdma_58025400_P_dma_requests_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_status "disabled" +#define DT_N_S_soc_S_bdma_58025400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_bdma_58025400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_bdma_58025400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_bdma_58025400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_bdma_58025400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_bdma_58025400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_bdma_58025400, status, 0) +#define DT_N_S_soc_S_bdma_58025400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_bdma_58025400, status, 0) +#define DT_N_S_soc_S_bdma_58025400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_bdma_58025400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_bdma_58025400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_bdma_58025400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_bdma_58025400_P_status_LEN 1 +#define DT_N_S_soc_S_bdma_58025400_P_status_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_compatible {"st,stm32-bdma"} +#define DT_N_S_soc_S_bdma_58025400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_compatible_IDX_0 "st,stm32-bdma" +#define DT_N_S_soc_S_bdma_58025400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-bdma +#define DT_N_S_soc_S_bdma_58025400_P_compatible_IDX_0_STRING_TOKEN st_stm32_bdma +#define DT_N_S_soc_S_bdma_58025400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_BDMA +#define DT_N_S_soc_S_bdma_58025400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_bdma_58025400, compatible, 0) +#define DT_N_S_soc_S_bdma_58025400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_bdma_58025400, compatible, 0) +#define DT_N_S_soc_S_bdma_58025400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_bdma_58025400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_bdma_58025400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_bdma_58025400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_bdma_58025400_P_compatible_LEN 1 +#define DT_N_S_soc_S_bdma_58025400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_VAL_bits 2097152 +#define DT_N_S_soc_S_bdma_58025400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_bdma_58025400, clocks, 0) +#define DT_N_S_soc_S_bdma_58025400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_bdma_58025400, clocks, 0) +#define DT_N_S_soc_S_bdma_58025400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_bdma_58025400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_bdma_58025400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_bdma_58025400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_bdma_58025400_P_clocks_LEN 1 +#define DT_N_S_soc_S_bdma_58025400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_bdma_58025400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_wakeup_source 0 +#define DT_N_S_soc_S_bdma_58025400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_bdma_58025400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_bdma_58025400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/fdcan1_rx_pb8 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_PATH "/soc/pin-controller@58020000/fdcan1_rx_pb8" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FULL_NAME "fdcan1_rx_pb8" +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FULL_NAME_UNQUOTED fdcan1_rx_pb8 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FULL_NAME_TOKEN fdcan1_rx_pb8 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FULL_NAME_UPPER_TOKEN FDCAN1_RX_PB8 + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_CHILD_IDX 39 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_NODELABEL(fn) fn(fdcan1_rx_pb8) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_NODELABEL_VARGS(fn, ...) fn(fdcan1_rx_pb8, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_HASH bvFMuO2SX7jU_LfFOhAGPKjduHfqaLZOMUPE0Co8djA + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_ORD 125 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_ORD_STR_SORTABLE 00125 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_REQUIRES_ORDS \ + 9, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_SUPPORTS_ORDS \ + 127, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_EXISTS 1 +#define DT_N_NODELABEL_fdcan1_rx_pb8 DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_pinmux 777 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/fdcan1_tx_ph13 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_PATH "/soc/pin-controller@58020000/fdcan1_tx_ph13" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FULL_NAME "fdcan1_tx_ph13" +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FULL_NAME_UNQUOTED fdcan1_tx_ph13 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FULL_NAME_TOKEN fdcan1_tx_ph13 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FULL_NAME_UPPER_TOKEN FDCAN1_TX_PH13 + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_CHILD_IDX 40 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_NODELABEL(fn) fn(fdcan1_tx_ph13) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_NODELABEL_VARGS(fn, ...) fn(fdcan1_tx_ph13, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_HASH Pl8M_sEs4V35wlMAwaYVkht9_QRfDm5pypojlBBuYWE + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_ORD 126 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_ORD_STR_SORTABLE 00126 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_REQUIRES_ORDS \ + 9, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_SUPPORTS_ORDS \ + 127, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_EXISTS 1 +#define DT_N_NODELABEL_fdcan1_tx_ph13 DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_pinmux 4009 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/can@4000a000 + * + * Node identifier: DT_N_S_soc_S_can_4000a000 + * + * Binding (compatible = st,stm32h7-fdcan): + * $ZEPHYR_BASE/dts/bindings/can/st,stm32h7-fdcan.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_can_4000a000_PATH "/soc/can@4000a000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_can_4000a000_FULL_NAME "can@4000a000" +#define DT_N_S_soc_S_can_4000a000_FULL_NAME_UNQUOTED can@4000a000 +#define DT_N_S_soc_S_can_4000a000_FULL_NAME_TOKEN can_4000a000 +#define DT_N_S_soc_S_can_4000a000_FULL_NAME_UPPER_TOKEN CAN_4000A000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_can_4000a000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_can_4000a000_CHILD_IDX 31 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_can_4000a000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_can_4000a000_FOREACH_NODELABEL(fn) fn(fdcan1) +#define DT_N_S_soc_S_can_4000a000_FOREACH_NODELABEL_VARGS(fn, ...) fn(fdcan1, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_can_4000a000_CHILD_NUM 0 +#define DT_N_S_soc_S_can_4000a000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_can_4000a000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_can_4000a000_HASH TsK756J4DWV6zgqgumE5kpKPrY0072I51EHPTR1BuJY + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_can_4000a000_ORD 127 +#define DT_N_S_soc_S_can_4000a000_ORD_STR_SORTABLE 00127 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_can_4000a000_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 125, \ + 126, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_can_4000a000_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_can_4000a000_EXISTS 1 +#define DT_N_INST_0_st_stm32h7_fdcan DT_N_S_soc_S_can_4000a000 +#define DT_N_NODELABEL_fdcan1 DT_N_S_soc_S_can_4000a000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_can_4000a000_REG_NUM 2 +#define DT_N_S_soc_S_can_4000a000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_REG_IDX_0_VAL_ADDRESS 1073782784 +#define DT_N_S_soc_S_can_4000a000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_can_4000a000_REG_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_REG_IDX_1_VAL_ADDRESS 1073785856 +#define DT_N_S_soc_S_can_4000a000_REG_IDX_1_VAL_SIZE 848 +#define DT_N_S_soc_S_can_4000a000_REG_NAME_m_can_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_REG_NAME_m_can_VAL_ADDRESS DT_N_S_soc_S_can_4000a000_REG_IDX_0_VAL_ADDRESS +#define DT_N_S_soc_S_can_4000a000_REG_NAME_m_can_VAL_SIZE DT_N_S_soc_S_can_4000a000_REG_IDX_0_VAL_SIZE +#define DT_N_S_soc_S_can_4000a000_REG_NAME_message_ram_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_REG_NAME_message_ram_VAL_ADDRESS DT_N_S_soc_S_can_4000a000_REG_IDX_1_VAL_ADDRESS +#define DT_N_S_soc_S_can_4000a000_REG_NAME_message_ram_VAL_SIZE DT_N_S_soc_S_can_4000a000_REG_IDX_1_VAL_SIZE +#define DT_N_S_soc_S_can_4000a000_RANGES_NUM 0 +#define DT_N_S_soc_S_can_4000a000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_can_4000a000_IRQ_NUM 3 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_irq 19 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_irq 21 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_irq 63 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_can_4000a000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int0_VAL_irq DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int0_VAL_priority DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int0_CONTROLLER DT_N_S_soc_S_can_4000a000_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int1_VAL_irq DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int1_VAL_priority DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_int1_CONTROLLER DT_N_S_soc_S_can_4000a000_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_calib_VAL_irq DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_irq +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_calib_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_calib_VAL_priority DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_VAL_priority +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_calib_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_IRQ_NAME_calib_CONTROLLER DT_N_S_soc_S_can_4000a000_IRQ_IDX_2_CONTROLLER +#define DT_N_S_soc_S_can_4000a000_COMPAT_MATCHES_st_stm32h7_fdcan 1 +#define DT_N_S_soc_S_can_4000a000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_can_4000a000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_COMPAT_MODEL_IDX_0 "stm32h7-fdcan" +#define DT_N_S_soc_S_can_4000a000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_can_4000a000_PINCTRL_NUM 1 +#define DT_N_S_soc_S_can_4000a000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_can_4000a000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_can_4000a000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_can_4000a000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8 +#define DT_N_S_soc_S_can_4000a000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13 + +/* Generic property macros: */ +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_VAL_bus 236 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_VAL_bits 256 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_VAL_bits 148635728 +#define DT_N_S_soc_S_can_4000a000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, clocks, 0) \ + fn(DT_N_S_soc_S_can_4000a000, clocks, 1) +#define DT_N_S_soc_S_can_4000a000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, clocks, 1) +#define DT_N_S_soc_S_can_4000a000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_clocks_LEN 2 +#define DT_N_S_soc_S_can_4000a000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_reg {1073782784, 1024, 1073785856, 848} +#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_0 1073782784 +#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_2 1073785856 +#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_reg_IDX_3 848 +#define DT_N_S_soc_S_can_4000a000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupts {19, 0, 21, 0, 63, 0} +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_0 19 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_2 21 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_4 63 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_can_4000a000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names {"int0", "int1", "calib"} +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_0 "int0" +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_0_STRING_UNQUOTED int0 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_0_STRING_TOKEN int0 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN INT0 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_1 "int1" +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_1_STRING_UNQUOTED int1 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_1_STRING_TOKEN int1 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN INT1 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_2 "calib" +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_2_STRING_UNQUOTED calib +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_2_STRING_TOKEN calib +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN CALIB +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 0) \ + fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 1) \ + fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 2) +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 2) +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 2, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, interrupt_names, 2, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_LEN 3 +#define DT_N_S_soc_S_can_4000a000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg {0, 28, 8, 3, 3, 0, 3, 3} +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_0 0 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_1 28 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_2 8 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_3 3 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_4 3 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_5 0 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_6 3 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_IDX_7 3 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 0) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 1) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 2) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 3) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 4) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 5) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 6) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 7) +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 7) +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 7, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, bosch_mram_cfg, 7, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_LEN 8 +#define DT_N_S_soc_S_can_4000a000_P_bosch_mram_cfg_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_status "disabled" +#define DT_N_S_soc_S_can_4000a000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_can_4000a000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_can_4000a000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_can_4000a000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_can_4000a000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_can_4000a000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, status, 0) +#define DT_N_S_soc_S_can_4000a000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, status, 0) +#define DT_N_S_soc_S_can_4000a000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_status_LEN 1 +#define DT_N_S_soc_S_can_4000a000_P_status_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_compatible {"st,stm32h7-fdcan"} +#define DT_N_S_soc_S_can_4000a000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_compatible_IDX_0 "st,stm32h7-fdcan" +#define DT_N_S_soc_S_can_4000a000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-fdcan +#define DT_N_S_soc_S_can_4000a000_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_fdcan +#define DT_N_S_soc_S_can_4000a000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_FDCAN +#define DT_N_S_soc_S_can_4000a000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, compatible, 0) +#define DT_N_S_soc_S_can_4000a000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, compatible, 0) +#define DT_N_S_soc_S_can_4000a000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_compatible_LEN 1 +#define DT_N_S_soc_S_can_4000a000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_reg_names {"m_can", "message_ram"} +#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_0 "m_can" +#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_0_STRING_UNQUOTED m_can +#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_0_STRING_TOKEN m_can +#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_0_STRING_UPPER_TOKEN M_CAN +#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_1 "message_ram" +#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_1_STRING_UNQUOTED message_ram +#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_1_STRING_TOKEN message_ram +#define DT_N_S_soc_S_can_4000a000_P_reg_names_IDX_1_STRING_UPPER_TOKEN MESSAGE_RAM +#define DT_N_S_soc_S_can_4000a000_P_reg_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, reg_names, 0) \ + fn(DT_N_S_soc_S_can_4000a000, reg_names, 1) +#define DT_N_S_soc_S_can_4000a000_P_reg_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, reg_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, reg_names, 1) +#define DT_N_S_soc_S_can_4000a000_P_reg_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, reg_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, reg_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_reg_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, reg_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, reg_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_reg_names_LEN 2 +#define DT_N_S_soc_S_can_4000a000_P_reg_names_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_can_4000a000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_wakeup_source 0 +#define DT_N_S_soc_S_can_4000a000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_can_4000a000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 1) +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 1) +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a000, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a000, pinctrl_names, 0) +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a000, pinctrl_names, 0) +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_can_4000a000_P_pinctrl_names_EXISTS 1 + +/* + * Devicetree node: /soc/can@4000a400 + * + * Node identifier: DT_N_S_soc_S_can_4000a400 + * + * Binding (compatible = st,stm32h7-fdcan): + * $ZEPHYR_BASE/dts/bindings/can/st,stm32h7-fdcan.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_can_4000a400_PATH "/soc/can@4000a400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_can_4000a400_FULL_NAME "can@4000a400" +#define DT_N_S_soc_S_can_4000a400_FULL_NAME_UNQUOTED can@4000a400 +#define DT_N_S_soc_S_can_4000a400_FULL_NAME_TOKEN can_4000a400 +#define DT_N_S_soc_S_can_4000a400_FULL_NAME_UPPER_TOKEN CAN_4000A400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_can_4000a400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_can_4000a400_CHILD_IDX 32 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_can_4000a400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_can_4000a400_FOREACH_NODELABEL(fn) fn(fdcan2) +#define DT_N_S_soc_S_can_4000a400_FOREACH_NODELABEL_VARGS(fn, ...) fn(fdcan2, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_can_4000a400_CHILD_NUM 0 +#define DT_N_S_soc_S_can_4000a400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_can_4000a400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_can_4000a400_HASH Q1IbQlnHfEuftKrxSDFmeo78_BpvDy4fAq8XaGQMjbk + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_can_4000a400_ORD 128 +#define DT_N_S_soc_S_can_4000a400_ORD_STR_SORTABLE 00128 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_can_4000a400_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_can_4000a400_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_can_4000a400_EXISTS 1 +#define DT_N_INST_1_st_stm32h7_fdcan DT_N_S_soc_S_can_4000a400 +#define DT_N_NODELABEL_fdcan2 DT_N_S_soc_S_can_4000a400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_can_4000a400_REG_NUM 2 +#define DT_N_S_soc_S_can_4000a400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_REG_IDX_0_VAL_ADDRESS 1073783808 +#define DT_N_S_soc_S_can_4000a400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_can_4000a400_REG_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_REG_IDX_1_VAL_ADDRESS 1073785856 +#define DT_N_S_soc_S_can_4000a400_REG_IDX_1_VAL_SIZE 1696 +#define DT_N_S_soc_S_can_4000a400_REG_NAME_m_can_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_REG_NAME_m_can_VAL_ADDRESS DT_N_S_soc_S_can_4000a400_REG_IDX_0_VAL_ADDRESS +#define DT_N_S_soc_S_can_4000a400_REG_NAME_m_can_VAL_SIZE DT_N_S_soc_S_can_4000a400_REG_IDX_0_VAL_SIZE +#define DT_N_S_soc_S_can_4000a400_REG_NAME_message_ram_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_REG_NAME_message_ram_VAL_ADDRESS DT_N_S_soc_S_can_4000a400_REG_IDX_1_VAL_ADDRESS +#define DT_N_S_soc_S_can_4000a400_REG_NAME_message_ram_VAL_SIZE DT_N_S_soc_S_can_4000a400_REG_IDX_1_VAL_SIZE +#define DT_N_S_soc_S_can_4000a400_RANGES_NUM 0 +#define DT_N_S_soc_S_can_4000a400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_can_4000a400_IRQ_NUM 3 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_irq 20 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_irq 22 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_irq 63 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_can_4000a400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int0_VAL_irq DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int0_VAL_priority DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int0_CONTROLLER DT_N_S_soc_S_can_4000a400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int1_VAL_irq DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int1_VAL_priority DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_int1_CONTROLLER DT_N_S_soc_S_can_4000a400_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_calib_VAL_irq DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_irq +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_calib_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_calib_VAL_priority DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_VAL_priority +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_calib_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_IRQ_NAME_calib_CONTROLLER DT_N_S_soc_S_can_4000a400_IRQ_IDX_2_CONTROLLER +#define DT_N_S_soc_S_can_4000a400_COMPAT_MATCHES_st_stm32h7_fdcan 1 +#define DT_N_S_soc_S_can_4000a400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_can_4000a400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_COMPAT_MODEL_IDX_0 "stm32h7-fdcan" +#define DT_N_S_soc_S_can_4000a400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_can_4000a400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_VAL_bus 236 +#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_VAL_bits 256 +#define DT_N_S_soc_S_can_4000a400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, clocks, 0) +#define DT_N_S_soc_S_can_4000a400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, clocks, 0) +#define DT_N_S_soc_S_can_4000a400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_clocks_LEN 1 +#define DT_N_S_soc_S_can_4000a400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_reg {1073783808, 1024, 1073785856, 1696} +#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_0 1073783808 +#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_2 1073785856 +#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_reg_IDX_3 1696 +#define DT_N_S_soc_S_can_4000a400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupts {20, 0, 22, 0, 63, 0} +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_0 20 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_2 22 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_4 63 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_can_4000a400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names {"int0", "int1", "calib"} +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_0 "int0" +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_0_STRING_UNQUOTED int0 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_0_STRING_TOKEN int0 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN INT0 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_1 "int1" +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_1_STRING_UNQUOTED int1 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_1_STRING_TOKEN int1 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN INT1 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_2 "calib" +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_2_STRING_UNQUOTED calib +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_2_STRING_TOKEN calib +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN CALIB +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 0) \ + fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 1) \ + fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 2) +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 2) +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 2, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, interrupt_names, 2, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_LEN 3 +#define DT_N_S_soc_S_can_4000a400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg {848, 28, 8, 3, 3, 0, 3, 3} +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_0 848 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_1 28 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_2 8 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_3 3 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_4 3 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_5 0 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_6 3 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_IDX_7 3 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 0) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 1) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 2) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 3) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 4) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 5) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 6) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 7) +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 7) +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 7, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, bosch_mram_cfg, 7, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_LEN 8 +#define DT_N_S_soc_S_can_4000a400_P_bosch_mram_cfg_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_status "disabled" +#define DT_N_S_soc_S_can_4000a400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_can_4000a400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_can_4000a400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_can_4000a400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_can_4000a400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_can_4000a400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, status, 0) +#define DT_N_S_soc_S_can_4000a400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, status, 0) +#define DT_N_S_soc_S_can_4000a400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_status_LEN 1 +#define DT_N_S_soc_S_can_4000a400_P_status_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_compatible {"st,stm32h7-fdcan"} +#define DT_N_S_soc_S_can_4000a400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_compatible_IDX_0 "st,stm32h7-fdcan" +#define DT_N_S_soc_S_can_4000a400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-fdcan +#define DT_N_S_soc_S_can_4000a400_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_fdcan +#define DT_N_S_soc_S_can_4000a400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_FDCAN +#define DT_N_S_soc_S_can_4000a400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, compatible, 0) +#define DT_N_S_soc_S_can_4000a400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, compatible, 0) +#define DT_N_S_soc_S_can_4000a400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_compatible_LEN 1 +#define DT_N_S_soc_S_can_4000a400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_reg_names {"m_can", "message_ram"} +#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_0 "m_can" +#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_0_STRING_UNQUOTED m_can +#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_0_STRING_TOKEN m_can +#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_0_STRING_UPPER_TOKEN M_CAN +#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_1 "message_ram" +#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_1_STRING_UNQUOTED message_ram +#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_1_STRING_TOKEN message_ram +#define DT_N_S_soc_S_can_4000a400_P_reg_names_IDX_1_STRING_UPPER_TOKEN MESSAGE_RAM +#define DT_N_S_soc_S_can_4000a400_P_reg_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_can_4000a400, reg_names, 0) \ + fn(DT_N_S_soc_S_can_4000a400, reg_names, 1) +#define DT_N_S_soc_S_can_4000a400_P_reg_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_can_4000a400, reg_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, reg_names, 1) +#define DT_N_S_soc_S_can_4000a400_P_reg_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_can_4000a400, reg_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_can_4000a400, reg_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_reg_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_can_4000a400, reg_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_can_4000a400, reg_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_can_4000a400_P_reg_names_LEN 2 +#define DT_N_S_soc_S_can_4000a400_P_reg_names_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_can_4000a400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_wakeup_source 0 +#define DT_N_S_soc_S_can_4000a400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_can_4000a400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_can_4000a400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/dac@40007400 + * + * Node identifier: DT_N_S_soc_S_dac_40007400 + * + * Binding (compatible = st,stm32-dac): + * $ZEPHYR_BASE/dts/bindings/dac/st,stm32-dac.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dac_40007400_PATH "/soc/dac@40007400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dac_40007400_FULL_NAME "dac@40007400" +#define DT_N_S_soc_S_dac_40007400_FULL_NAME_UNQUOTED dac@40007400 +#define DT_N_S_soc_S_dac_40007400_FULL_NAME_TOKEN dac_40007400 +#define DT_N_S_soc_S_dac_40007400_FULL_NAME_UPPER_TOKEN DAC_40007400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dac_40007400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dac_40007400_CHILD_IDX 52 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dac_40007400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dac_40007400_FOREACH_NODELABEL(fn) fn(dac1) +#define DT_N_S_soc_S_dac_40007400_FOREACH_NODELABEL_VARGS(fn, ...) fn(dac1, __VA_ARGS__) +#define DT_N_S_soc_S_dac_40007400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dac_40007400_CHILD_NUM 0 +#define DT_N_S_soc_S_dac_40007400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dac_40007400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dac_40007400_HASH AEmTXTZMLBfEYJhhkd3MmBxYI__rcYzmOjJiV2l9668 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dac_40007400_ORD 129 +#define DT_N_S_soc_S_dac_40007400_ORD_STR_SORTABLE 00129 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dac_40007400_REQUIRES_ORDS \ + 3, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dac_40007400_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dac_40007400_EXISTS 1 +#define DT_N_INST_0_st_stm32_dac DT_N_S_soc_S_dac_40007400 +#define DT_N_NODELABEL_dac1 DT_N_S_soc_S_dac_40007400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dac_40007400_REG_NUM 1 +#define DT_N_S_soc_S_dac_40007400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_REG_IDX_0_VAL_ADDRESS 1073771520 +#define DT_N_S_soc_S_dac_40007400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_dac_40007400_RANGES_NUM 0 +#define DT_N_S_soc_S_dac_40007400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dac_40007400_IRQ_NUM 0 +#define DT_N_S_soc_S_dac_40007400_IRQ_LEVEL 0 +#define DT_N_S_soc_S_dac_40007400_COMPAT_MATCHES_st_stm32_dac 1 +#define DT_N_S_soc_S_dac_40007400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dac_40007400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_COMPAT_MODEL_IDX_0 "stm32-dac" +#define DT_N_S_soc_S_dac_40007400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dac_40007400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dac_40007400_P_reg {1073771520, 1024} +#define DT_N_S_soc_S_dac_40007400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_reg_IDX_0 1073771520 +#define DT_N_S_soc_S_dac_40007400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dac_40007400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_VAL_bits 536870912 +#define DT_N_S_soc_S_dac_40007400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_40007400, clocks, 0) +#define DT_N_S_soc_S_dac_40007400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_40007400, clocks, 0) +#define DT_N_S_soc_S_dac_40007400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_40007400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_40007400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_40007400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_40007400_P_clocks_LEN 1 +#define DT_N_S_soc_S_dac_40007400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_status "disabled" +#define DT_N_S_soc_S_dac_40007400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_dac_40007400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_dac_40007400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_dac_40007400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_dac_40007400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_dac_40007400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_40007400, status, 0) +#define DT_N_S_soc_S_dac_40007400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_40007400, status, 0) +#define DT_N_S_soc_S_dac_40007400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_40007400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_40007400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_40007400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_40007400_P_status_LEN 1 +#define DT_N_S_soc_S_dac_40007400_P_status_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_compatible {"st,stm32-dac"} +#define DT_N_S_soc_S_dac_40007400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_compatible_IDX_0 "st,stm32-dac" +#define DT_N_S_soc_S_dac_40007400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dac +#define DT_N_S_soc_S_dac_40007400_P_compatible_IDX_0_STRING_TOKEN st_stm32_dac +#define DT_N_S_soc_S_dac_40007400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DAC +#define DT_N_S_soc_S_dac_40007400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dac_40007400, compatible, 0) +#define DT_N_S_soc_S_dac_40007400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dac_40007400, compatible, 0) +#define DT_N_S_soc_S_dac_40007400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dac_40007400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_40007400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dac_40007400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dac_40007400_P_compatible_LEN 1 +#define DT_N_S_soc_S_dac_40007400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dac_40007400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_wakeup_source 0 +#define DT_N_S_soc_S_dac_40007400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dac_40007400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dac_40007400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/display-controller@50001000 + * + * Node identifier: DT_N_S_soc_S_display_controller_50001000 + * + * Binding (compatible = st,stm32-ltdc): + * $ZEPHYR_BASE/dts/bindings/display/st,stm32-ltdc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_display_controller_50001000_PATH "/soc/display-controller@50001000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_display_controller_50001000_FULL_NAME "display-controller@50001000" +#define DT_N_S_soc_S_display_controller_50001000_FULL_NAME_UNQUOTED display-controller@50001000 +#define DT_N_S_soc_S_display_controller_50001000_FULL_NAME_TOKEN display_controller_50001000 +#define DT_N_S_soc_S_display_controller_50001000_FULL_NAME_UPPER_TOKEN DISPLAY_CONTROLLER_50001000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_display_controller_50001000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_display_controller_50001000_CHILD_IDX 67 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_display_controller_50001000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_NODELABEL(fn) fn(ltdc) +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_NODELABEL_VARGS(fn, ...) fn(ltdc, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_display_controller_50001000_CHILD_NUM 0 +#define DT_N_S_soc_S_display_controller_50001000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_display_controller_50001000_HASH tuXl2nvZTwFr218jjkJLXjZw_0Wn_Svv7iOXFbTuRjo + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_display_controller_50001000_ORD 130 +#define DT_N_S_soc_S_display_controller_50001000_ORD_STR_SORTABLE 00130 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_display_controller_50001000_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 51, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_display_controller_50001000_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_display_controller_50001000_EXISTS 1 +#define DT_N_INST_0_st_stm32_ltdc DT_N_S_soc_S_display_controller_50001000 +#define DT_N_NODELABEL_ltdc DT_N_S_soc_S_display_controller_50001000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_display_controller_50001000_REG_NUM 1 +#define DT_N_S_soc_S_display_controller_50001000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_REG_IDX_0_VAL_ADDRESS 1342181376 +#define DT_N_S_soc_S_display_controller_50001000_REG_IDX_0_VAL_SIZE 512 +#define DT_N_S_soc_S_display_controller_50001000_RANGES_NUM 0 +#define DT_N_S_soc_S_display_controller_50001000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NUM 2 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_irq 88 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_irq 89 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_VAL_irq DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_VAL_priority DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_CONTROLLER DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_er_VAL_irq DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_er_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_er_VAL_priority DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_er_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_IRQ_NAME_ltdc_er_CONTROLLER DT_N_S_soc_S_display_controller_50001000_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_display_controller_50001000_COMPAT_MATCHES_st_stm32_ltdc 1 +#define DT_N_S_soc_S_display_controller_50001000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_display_controller_50001000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_COMPAT_MODEL_IDX_0 "stm32-ltdc" +#define DT_N_S_soc_S_display_controller_50001000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_display_controller_50001000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_VAL_bus 228 +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_VAL_bits 8 +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_display_controller_50001000, clocks, 0) +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_display_controller_50001000, clocks, 0) +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_display_controller_50001000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_display_controller_50001000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_LEN 1 +#define DT_N_S_soc_S_display_controller_50001000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_display_controller_50001000_P_resets_IDX_0_VAL_id 4483 +#define DT_N_S_soc_S_display_controller_50001000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_display_controller_50001000, resets, 0) +#define DT_N_S_soc_S_display_controller_50001000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_display_controller_50001000, resets, 0) +#define DT_N_S_soc_S_display_controller_50001000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_display_controller_50001000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_display_controller_50001000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_P_resets_LEN 1 +#define DT_N_S_soc_S_display_controller_50001000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupts {88, 0, 89, 0} +#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_0 88 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_2 89 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_status "disabled" +#define DT_N_S_soc_S_display_controller_50001000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_display_controller_50001000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_display_controller_50001000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_display_controller_50001000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_display_controller_50001000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_display_controller_50001000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_display_controller_50001000, status, 0) +#define DT_N_S_soc_S_display_controller_50001000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_display_controller_50001000, status, 0) +#define DT_N_S_soc_S_display_controller_50001000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_display_controller_50001000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_display_controller_50001000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_P_status_LEN 1 +#define DT_N_S_soc_S_display_controller_50001000_P_status_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_compatible {"st,stm32-ltdc"} +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_IDX_0 "st,stm32-ltdc" +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-ltdc +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_IDX_0_STRING_TOKEN st_stm32_ltdc +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LTDC +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_display_controller_50001000, compatible, 0) +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_display_controller_50001000, compatible, 0) +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_display_controller_50001000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_display_controller_50001000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_LEN 1 +#define DT_N_S_soc_S_display_controller_50001000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_reg {1342181376, 512} +#define DT_N_S_soc_S_display_controller_50001000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_reg_IDX_0 1342181376 +#define DT_N_S_soc_S_display_controller_50001000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_reg_IDX_1 512 +#define DT_N_S_soc_S_display_controller_50001000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names {"ltdc", "ltdc_er"} +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_0 "ltdc" +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_0_STRING_UNQUOTED ltdc +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_0_STRING_TOKEN ltdc +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN LTDC +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_1 "ltdc_er" +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_1_STRING_UNQUOTED ltdc_er +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_1_STRING_TOKEN ltdc_er +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN LTDC_ER +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 0) \ + fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 1) +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 1) +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_display_controller_50001000, interrupt_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_LEN 2 +#define DT_N_S_soc_S_display_controller_50001000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_display_controller_50001000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_wakeup_source 0 +#define DT_N_S_soc_S_display_controller_50001000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_display_controller_50001000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_display_controller_50001000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/dma@40020400 + * + * Node identifier: DT_N_S_soc_S_dma_40020400 + * + * Binding (compatible = st,stm32-dma-v1): + * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dma-v1.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dma_40020400_PATH "/soc/dma@40020400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dma_40020400_FULL_NAME "dma@40020400" +#define DT_N_S_soc_S_dma_40020400_FULL_NAME_UNQUOTED dma@40020400 +#define DT_N_S_soc_S_dma_40020400_FULL_NAME_TOKEN dma_40020400 +#define DT_N_S_soc_S_dma_40020400_FULL_NAME_UPPER_TOKEN DMA_40020400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dma_40020400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dma_40020400_CHILD_IDX 54 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dma_40020400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dma_40020400_FOREACH_NODELABEL(fn) fn(dma2) +#define DT_N_S_soc_S_dma_40020400_FOREACH_NODELABEL_VARGS(fn, ...) fn(dma2, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dma_40020400_CHILD_NUM 0 +#define DT_N_S_soc_S_dma_40020400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dma_40020400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dma_40020400_HASH 6M2mn87tCKiqdKtfbifYbjloijPkEmcQ0zczmKi97Y8 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dma_40020400_ORD 131 +#define DT_N_S_soc_S_dma_40020400_ORD_STR_SORTABLE 00131 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dma_40020400_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dma_40020400_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dma_40020400_EXISTS 1 +#define DT_N_INST_1_st_stm32_dma_v1 DT_N_S_soc_S_dma_40020400 +#define DT_N_NODELABEL_dma2 DT_N_S_soc_S_dma_40020400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dma_40020400_REG_NUM 1 +#define DT_N_S_soc_S_dma_40020400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_REG_IDX_0_VAL_ADDRESS 1073873920 +#define DT_N_S_soc_S_dma_40020400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_dma_40020400_RANGES_NUM 0 +#define DT_N_S_soc_S_dma_40020400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dma_40020400_IRQ_NUM 8 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_irq 56 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_irq 57 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_irq 58 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_irq 59 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_irq 60 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_irq 68 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_VAL_irq 69 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_6_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_VAL_irq 70 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_IRQ_IDX_7_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_dma_40020400_COMPAT_MATCHES_st_stm32_dma_v1 1 +#define DT_N_S_soc_S_dma_40020400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dma_40020400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_COMPAT_MODEL_IDX_0 "stm32-dma-v1" +#define DT_N_S_soc_S_dma_40020400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dma_40020400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dma_40020400_P_reg {1073873920, 1024} +#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_0 1073873920 +#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dma_40020400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts {56, 0, 57, 0, 58, 0, 59, 0, 60, 0, 68, 0, 69, 0, 70, 0} +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_0 56 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_2 57 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_4 58 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_6 59 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_8 60 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_9 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_10 68 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_11 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_12_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_12 69 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_13_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_13 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_14_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_14 70 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_15_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_IDX_15 0 +#define DT_N_S_soc_S_dma_40020400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_st_mem2mem 1 +#define DT_N_S_soc_S_dma_40020400_P_st_mem2mem_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_dma_offset 8 +#define DT_N_S_soc_S_dma_40020400_P_dma_offset_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_dma_requests 8 +#define DT_N_S_soc_S_dma_40020400_P_dma_requests_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_status "disabled" +#define DT_N_S_soc_S_dma_40020400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_dma_40020400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_dma_40020400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_dma_40020400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020400, status, 0) +#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, status, 0) +#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_status_LEN 1 +#define DT_N_S_soc_S_dma_40020400_P_status_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_compatible {"st,stm32-dma-v1"} +#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0 "st,stm32-dma-v1" +#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dma-v1 +#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_STRING_TOKEN st_stm32_dma_v1 +#define DT_N_S_soc_S_dma_40020400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMA_V1 +#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020400, compatible, 0) +#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, compatible, 0) +#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_compatible_LEN 1 +#define DT_N_S_soc_S_dma_40020400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bus 216 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bits 2 +#define DT_N_S_soc_S_dma_40020400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020400, clocks, 0) +#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020400, clocks, 0) +#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020400_P_clocks_LEN 1 +#define DT_N_S_soc_S_dma_40020400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dma_40020400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_wakeup_source 0 +#define DT_N_S_soc_S_dma_40020400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dma_40020400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dma_40020400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/dmamux@58025800 + * + * Node identifier: DT_N_S_soc_S_dmamux_58025800 + * + * Binding (compatible = st,stm32-dmamux): + * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dmamux.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dmamux_58025800_PATH "/soc/dmamux@58025800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dmamux_58025800_FULL_NAME "dmamux@58025800" +#define DT_N_S_soc_S_dmamux_58025800_FULL_NAME_UNQUOTED dmamux@58025800 +#define DT_N_S_soc_S_dmamux_58025800_FULL_NAME_TOKEN dmamux_58025800 +#define DT_N_S_soc_S_dmamux_58025800_FULL_NAME_UPPER_TOKEN DMAMUX_58025800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dmamux_58025800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dmamux_58025800_CHILD_IDX 57 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dmamux_58025800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_NODELABEL(fn) fn(dmamux2) +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_NODELABEL_VARGS(fn, ...) fn(dmamux2, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dmamux_58025800_CHILD_NUM 0 +#define DT_N_S_soc_S_dmamux_58025800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dmamux_58025800_HASH pg_1B26nWuXjkKWIFyRWCHAy6Gu9COK4z_cOdOQhvVs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dmamux_58025800_ORD 132 +#define DT_N_S_soc_S_dmamux_58025800_ORD_STR_SORTABLE 00132 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dmamux_58025800_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dmamux_58025800_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dmamux_58025800_EXISTS 1 +#define DT_N_INST_1_st_stm32_dmamux DT_N_S_soc_S_dmamux_58025800 +#define DT_N_NODELABEL_dmamux2 DT_N_S_soc_S_dmamux_58025800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dmamux_58025800_REG_NUM 1 +#define DT_N_S_soc_S_dmamux_58025800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_REG_IDX_0_VAL_ADDRESS 1476548608 +#define DT_N_S_soc_S_dmamux_58025800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_dmamux_58025800_RANGES_NUM 0 +#define DT_N_S_soc_S_dmamux_58025800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dmamux_58025800_IRQ_NUM 1 +#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_VAL_irq 128 +#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dmamux_58025800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_dmamux_58025800_COMPAT_MATCHES_st_stm32_dmamux 1 +#define DT_N_S_soc_S_dmamux_58025800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dmamux_58025800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_COMPAT_MODEL_IDX_0 "stm32-dmamux" +#define DT_N_S_soc_S_dmamux_58025800_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dmamux_58025800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dmamux_58025800_P_reg {1476548608, 1024} +#define DT_N_S_soc_S_dmamux_58025800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_reg_IDX_0 1476548608 +#define DT_N_S_soc_S_dmamux_58025800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dmamux_58025800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_dma_channels 8 +#define DT_N_S_soc_S_dmamux_58025800_P_dma_channels_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_dma_generators 8 +#define DT_N_S_soc_S_dmamux_58025800_P_dma_generators_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_dma_requests 107 +#define DT_N_S_soc_S_dmamux_58025800_P_dma_requests_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_status "disabled" +#define DT_N_S_soc_S_dmamux_58025800_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_dmamux_58025800_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_dmamux_58025800_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_dmamux_58025800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_dmamux_58025800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_dmamux_58025800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_58025800, status, 0) +#define DT_N_S_soc_S_dmamux_58025800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_58025800, status, 0) +#define DT_N_S_soc_S_dmamux_58025800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_58025800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_58025800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_58025800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_58025800_P_status_LEN 1 +#define DT_N_S_soc_S_dmamux_58025800_P_status_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_compatible {"st,stm32-dmamux"} +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_IDX_0 "st,stm32-dmamux" +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dmamux +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_IDX_0_STRING_TOKEN st_stm32_dmamux +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMAMUX +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_58025800, compatible, 0) +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_58025800, compatible, 0) +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_58025800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_58025800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_LEN 1 +#define DT_N_S_soc_S_dmamux_58025800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_interrupts {128, 0} +#define DT_N_S_soc_S_dmamux_58025800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_interrupts_IDX_0 128 +#define DT_N_S_soc_S_dmamux_58025800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_dmamux_58025800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_VAL_bits 2097152 +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_58025800, clocks, 0) +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_58025800, clocks, 0) +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_58025800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_58025800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_LEN 1 +#define DT_N_S_soc_S_dmamux_58025800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dmamux_58025800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_wakeup_source 0 +#define DT_N_S_soc_S_dmamux_58025800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dmamux_58025800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dmamux_58025800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/dsihost@50000000 + * + * Node identifier: DT_N_S_soc_S_dsihost_50000000 + * + * Binding (compatible = st,stm32-mipi-dsi): + * $ZEPHYR_BASE/dts/bindings/mipi-dsi/st,stm32-mipi-dsi.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dsihost_50000000_PATH "/soc/dsihost@50000000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dsihost_50000000_FULL_NAME "dsihost@50000000" +#define DT_N_S_soc_S_dsihost_50000000_FULL_NAME_UNQUOTED dsihost@50000000 +#define DT_N_S_soc_S_dsihost_50000000_FULL_NAME_TOKEN dsihost_50000000 +#define DT_N_S_soc_S_dsihost_50000000_FULL_NAME_UPPER_TOKEN DSIHOST_50000000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dsihost_50000000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dsihost_50000000_CHILD_IDX 70 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dsihost_50000000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_NODELABEL(fn) fn(mipi_dsi) +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(mipi_dsi, __VA_ARGS__) #define DT_N_S_soc_S_dsihost_50000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_dsihost_50000000_CHILD_NUM 0 -#define DT_N_S_soc_S_dsihost_50000000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dsihost_50000000_CHILD_NUM 0 +#define DT_N_S_soc_S_dsihost_50000000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dsihost_50000000_HASH 9sTpBGS3zYCuf59HAeaEA3F6t_AO3h188_7ObTguxXg + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dsihost_50000000_ORD 133 +#define DT_N_S_soc_S_dsihost_50000000_ORD_STR_SORTABLE 00133 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dsihost_50000000_REQUIRES_ORDS \ + 3, \ + 8, \ + 51, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dsihost_50000000_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dsihost_50000000_EXISTS 1 +#define DT_N_INST_0_st_stm32_mipi_dsi DT_N_S_soc_S_dsihost_50000000 +#define DT_N_NODELABEL_mipi_dsi DT_N_S_soc_S_dsihost_50000000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dsihost_50000000_REG_NUM 1 +#define DT_N_S_soc_S_dsihost_50000000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_REG_IDX_0_VAL_ADDRESS 1342177280 +#define DT_N_S_soc_S_dsihost_50000000_REG_IDX_0_VAL_SIZE 4096 +#define DT_N_S_soc_S_dsihost_50000000_RANGES_NUM 0 +#define DT_N_S_soc_S_dsihost_50000000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dsihost_50000000_IRQ_NUM 0 +#define DT_N_S_soc_S_dsihost_50000000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_dsihost_50000000_COMPAT_MATCHES_st_stm32_mipi_dsi 1 +#define DT_N_S_soc_S_dsihost_50000000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dsihost_50000000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_COMPAT_MODEL_IDX_0 "stm32-mipi-dsi" +#define DT_N_S_soc_S_dsihost_50000000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dsihost_50000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bus 228 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bits 16 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_NAME "dsiclk" +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_VAL_bus DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bus +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_VAL_bits DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bits +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bus 4 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bits 255 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_NAME "refclk" +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_VAL_bus DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bus +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_VAL_bits DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bits +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bus 16 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bits 255 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_NAME "pixelclk" +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_VAL_bus DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bus +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_VAL_bits DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bits +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dsihost_50000000, clocks, 0) \ + fn(DT_N_S_soc_S_dsihost_50000000, clocks, 1) \ + fn(DT_N_S_soc_S_dsihost_50000000, clocks, 2) +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dsihost_50000000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dsihost_50000000, clocks, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dsihost_50000000, clocks, 2) +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dsihost_50000000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dsihost_50000000, clocks, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dsihost_50000000, clocks, 2, __VA_ARGS__) +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dsihost_50000000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dsihost_50000000, clocks, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dsihost_50000000, clocks, 2, __VA_ARGS__) +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_LEN 3 +#define DT_N_S_soc_S_dsihost_50000000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names {"dsiclk", "refclk", "pixelclk"} +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_0 "dsiclk" +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_0_STRING_UNQUOTED dsiclk +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_0_STRING_TOKEN dsiclk +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_0_STRING_UPPER_TOKEN DSICLK +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_1 "refclk" +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_1_STRING_UNQUOTED refclk +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_1_STRING_TOKEN refclk +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_1_STRING_UPPER_TOKEN REFCLK +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_2 "pixelclk" +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_2_STRING_UNQUOTED pixelclk +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_2_STRING_TOKEN pixelclk +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_2_STRING_UPPER_TOKEN PIXELCLK +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 0) \ + fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 1) \ + fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 2) +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 2) +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 2, __VA_ARGS__) +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 2, __VA_ARGS__) +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_LEN 3 +#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_dsihost_50000000_P_resets_IDX_0_VAL_id 4484 +#define DT_N_S_soc_S_dsihost_50000000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dsihost_50000000, resets, 0) +#define DT_N_S_soc_S_dsihost_50000000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dsihost_50000000, resets, 0) +#define DT_N_S_soc_S_dsihost_50000000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dsihost_50000000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dsihost_50000000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dsihost_50000000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dsihost_50000000_P_resets_LEN 1 +#define DT_N_S_soc_S_dsihost_50000000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_hs_active_high 0 +#define DT_N_S_soc_S_dsihost_50000000_P_hs_active_high_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_vs_active_high 0 +#define DT_N_S_soc_S_dsihost_50000000_P_vs_active_high_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_de_active_high 0 +#define DT_N_S_soc_S_dsihost_50000000_P_de_active_high_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_loosely_packed 0 +#define DT_N_S_soc_S_dsihost_50000000_P_loosely_packed_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_bta_ack_disable 0 +#define DT_N_S_soc_S_dsihost_50000000_P_bta_ack_disable_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_non_continuous 0 +#define DT_N_S_soc_S_dsihost_50000000_P_non_continuous_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_status "disabled" +#define DT_N_S_soc_S_dsihost_50000000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_dsihost_50000000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_dsihost_50000000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_dsihost_50000000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_dsihost_50000000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_dsihost_50000000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dsihost_50000000, status, 0) +#define DT_N_S_soc_S_dsihost_50000000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dsihost_50000000, status, 0) +#define DT_N_S_soc_S_dsihost_50000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dsihost_50000000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dsihost_50000000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dsihost_50000000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dsihost_50000000_P_status_LEN 1 +#define DT_N_S_soc_S_dsihost_50000000_P_status_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_compatible {"st,stm32-mipi-dsi"} +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_IDX_0 "st,stm32-mipi-dsi" +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-mipi-dsi +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_IDX_0_STRING_TOKEN st_stm32_mipi_dsi +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_MIPI_DSI +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dsihost_50000000, compatible, 0) +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dsihost_50000000, compatible, 0) +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dsihost_50000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dsihost_50000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_LEN 1 +#define DT_N_S_soc_S_dsihost_50000000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_reg {1342177280, 4096} +#define DT_N_S_soc_S_dsihost_50000000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_reg_IDX_0 1342177280 +#define DT_N_S_soc_S_dsihost_50000000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_dsihost_50000000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dsihost_50000000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_wakeup_source 0 +#define DT_N_S_soc_S_dsihost_50000000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dsihost_50000000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dsihost_50000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/dmamux@40020800 + * + * Node identifier: DT_N_S_soc_S_dmamux_40020800 + * + * Binding (compatible = st,stm32-dmamux): + * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dmamux.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dmamux_40020800_PATH "/soc/dmamux@40020800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME "dmamux@40020800" +#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME_UNQUOTED dmamux@40020800 +#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME_TOKEN dmamux_40020800 +#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME_UPPER_TOKEN DMAMUX_40020800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dmamux_40020800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dmamux_40020800_CHILD_IDX 56 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dmamux_40020800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_NODELABEL(fn) fn(dmamux1) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_NODELABEL_VARGS(fn, ...) fn(dmamux1, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dmamux_40020800_CHILD_NUM 0 +#define DT_N_S_soc_S_dmamux_40020800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dmamux_40020800_HASH jGulMrGrDMjffC0jOcX9YAYtoaIaoNYHlAm2EvPJs_w + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dmamux_40020800_ORD 134 +#define DT_N_S_soc_S_dmamux_40020800_ORD_STR_SORTABLE 00134 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dmamux_40020800_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dmamux_40020800_SUPPORTS_ORDS \ + 135, \ + 136, \ + 137, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dmamux_40020800_EXISTS 1 +#define DT_N_INST_0_st_stm32_dmamux DT_N_S_soc_S_dmamux_40020800 +#define DT_N_NODELABEL_dmamux1 DT_N_S_soc_S_dmamux_40020800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dmamux_40020800_REG_NUM 1 +#define DT_N_S_soc_S_dmamux_40020800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_REG_IDX_0_VAL_ADDRESS 1073874944 +#define DT_N_S_soc_S_dmamux_40020800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_dmamux_40020800_RANGES_NUM 0 +#define DT_N_S_soc_S_dmamux_40020800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dmamux_40020800_IRQ_NUM 1 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_irq 102 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dmamux_40020800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_dmamux_40020800_COMPAT_MATCHES_st_stm32_dmamux 1 +#define DT_N_S_soc_S_dmamux_40020800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dmamux_40020800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_COMPAT_MODEL_IDX_0 "stm32-dmamux" +#define DT_N_S_soc_S_dmamux_40020800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dmamux_40020800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dmamux_40020800_P_reg {1073874944, 1024} +#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_0 1073874944 +#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dmamux_40020800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_channels 16 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_channels_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_generators 8 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_generators_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_requests 107 +#define DT_N_S_soc_S_dmamux_40020800_P_dma_requests_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status "okay" +#define DT_N_S_soc_S_dmamux_40020800_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_dmamux_40020800_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_dmamux_40020800_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_40020800, status, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, status, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_40020800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_status_LEN 1 +#define DT_N_S_soc_S_dmamux_40020800_P_status_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_compatible {"st,stm32-dmamux"} +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0 "st,stm32-dmamux" +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dmamux +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_STRING_TOKEN st_stm32_dmamux +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMAMUX +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_LEN 1 +#define DT_N_S_soc_S_dmamux_40020800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts {102, 0} +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_0 102 +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bus 216 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0) +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_LEN 1 +#define DT_N_S_soc_S_dmamux_40020800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_wakeup_source 0 +#define DT_N_S_soc_S_dmamux_40020800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/i2s@40003800 + * + * Node identifier: DT_N_S_soc_S_i2s_40003800 + * + * Binding (compatible = st,stm32h7-i2s): + * $ZEPHYR_BASE/dts/bindings/i2s/st,stm32h7-i2s.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_i2s_40003800_PATH "/soc/i2s@40003800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_i2s_40003800_FULL_NAME "i2s@40003800" +#define DT_N_S_soc_S_i2s_40003800_FULL_NAME_UNQUOTED i2s@40003800 +#define DT_N_S_soc_S_i2s_40003800_FULL_NAME_TOKEN i2s_40003800 +#define DT_N_S_soc_S_i2s_40003800_FULL_NAME_UPPER_TOKEN I2S_40003800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_i2s_40003800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_i2s_40003800_CHILD_IDX 29 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_i2s_40003800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_i2s_40003800_FOREACH_NODELABEL(fn) fn(i2s2) +#define DT_N_S_soc_S_i2s_40003800_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2s2, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_i2s_40003800_CHILD_NUM 0 +#define DT_N_S_soc_S_i2s_40003800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_i2s_40003800_HASH cv1l7gk621LLT8KlSAOD4ESjUxFIqs_KOzY0gVU3ofE + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_i2s_40003800_ORD 135 +#define DT_N_S_soc_S_i2s_40003800_ORD_STR_SORTABLE 00135 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_i2s_40003800_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 134, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_i2s_40003800_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_i2s_40003800_EXISTS 1 +#define DT_N_INST_1_st_stm32h7_i2s DT_N_S_soc_S_i2s_40003800 +#define DT_N_INST_1_st_stm32_i2s DT_N_S_soc_S_i2s_40003800 +#define DT_N_NODELABEL_i2s2 DT_N_S_soc_S_i2s_40003800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_i2s_40003800_REG_NUM 1 +#define DT_N_S_soc_S_i2s_40003800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_REG_IDX_0_VAL_ADDRESS 1073756160 +#define DT_N_S_soc_S_i2s_40003800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_i2s_40003800_RANGES_NUM 0 +#define DT_N_S_soc_S_i2s_40003800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_i2s_40003800_IRQ_NUM 1 +#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_VAL_irq 36 +#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_i2s_40003800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_i2s_40003800_COMPAT_MATCHES_st_stm32h7_i2s 1 +#define DT_N_S_soc_S_i2s_40003800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_i2s_40003800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_COMPAT_MODEL_IDX_0 "stm32h7-i2s" +#define DT_N_S_soc_S_i2s_40003800_COMPAT_MATCHES_st_stm32_i2s 1 +#define DT_N_S_soc_S_i2s_40003800_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_i2s_40003800_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_COMPAT_MODEL_IDX_1 "stm32-i2s" +#define DT_N_S_soc_S_i2s_40003800_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_i2s_40003800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_i2s_40003800_P_reg {1073756160, 1024} +#define DT_N_S_soc_S_i2s_40003800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_reg_IDX_0 1073756160 +#define DT_N_S_soc_S_i2s_40003800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_i2s_40003800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_interrupts {36, 0} +#define DT_N_S_soc_S_i2s_40003800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_interrupts_IDX_0 36 +#define DT_N_S_soc_S_i2s_40003800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_i2s_40003800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel 0 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_slot 40 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel_config 132160 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_NAME "tx" +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_channel DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_slot DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_slot +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_channel_config DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel_config +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_slot 39 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel_config 132224 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_NAME "rx" +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_channel DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_slot DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_slot +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_channel_config DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel_config +#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003800, dmas, 0) \ + fn(DT_N_S_soc_S_i2s_40003800, dmas, 1) +#define DT_N_S_soc_S_i2s_40003800_P_dmas_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003800, dmas, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003800, dmas, 1) +#define DT_N_S_soc_S_i2s_40003800_P_dmas_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003800, dmas, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40003800, dmas, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_P_dmas_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003800, dmas, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003800, dmas, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_P_dmas_LEN 2 +#define DT_N_S_soc_S_i2s_40003800_P_dmas_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dma_names {"tx", "rx"} +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_0 "tx" +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_0_STRING_UNQUOTED tx +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_0_STRING_TOKEN tx +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_0_STRING_UPPER_TOKEN TX +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_1 "rx" +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_1_STRING_UNQUOTED rx +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_1_STRING_TOKEN rx +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_1_STRING_UPPER_TOKEN RX +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003800, dma_names, 0) \ + fn(DT_N_S_soc_S_i2s_40003800, dma_names, 1) +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003800, dma_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003800, dma_names, 1) +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003800, dma_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40003800, dma_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003800, dma_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003800, dma_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_LEN 2 +#define DT_N_S_soc_S_i2s_40003800_P_dma_names_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_mck_enabled 0 +#define DT_N_S_soc_S_i2s_40003800_P_mck_enabled_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_status "disabled" +#define DT_N_S_soc_S_i2s_40003800_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_i2s_40003800_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_i2s_40003800_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_i2s_40003800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_i2s_40003800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_i2s_40003800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003800, status, 0) +#define DT_N_S_soc_S_i2s_40003800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003800, status, 0) +#define DT_N_S_soc_S_i2s_40003800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_P_status_LEN 1 +#define DT_N_S_soc_S_i2s_40003800_P_status_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_compatible {"st,stm32h7-i2s", "st,stm32-i2s"} +#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_0 "st,stm32h7-i2s" +#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-i2s +#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_i2s +#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_I2S +#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_1 "st,stm32-i2s" +#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-i2s +#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_1_STRING_TOKEN st_stm32_i2s +#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_I2S +#define DT_N_S_soc_S_i2s_40003800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003800, compatible, 0) \ + fn(DT_N_S_soc_S_i2s_40003800, compatible, 1) +#define DT_N_S_soc_S_i2s_40003800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003800, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003800, compatible, 1) +#define DT_N_S_soc_S_i2s_40003800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003800, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40003800, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003800, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003800, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_P_compatible_LEN 2 +#define DT_N_S_soc_S_i2s_40003800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_VAL_bits 16384 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_VAL_bits 30146640 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003800, clocks, 0) \ + fn(DT_N_S_soc_S_i2s_40003800, clocks, 1) +#define DT_N_S_soc_S_i2s_40003800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003800, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003800, clocks, 1) +#define DT_N_S_soc_S_i2s_40003800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003800, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40003800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003800, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003800, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003800_P_clocks_LEN 2 +#define DT_N_S_soc_S_i2s_40003800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_i2s_40003800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_wakeup_source 0 +#define DT_N_S_soc_S_i2s_40003800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_i2s_40003800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/i2s@40003c00 + * + * Node identifier: DT_N_S_soc_S_i2s_40003c00 + * + * Binding (compatible = st,stm32h7-i2s): + * $ZEPHYR_BASE/dts/bindings/i2s/st,stm32h7-i2s.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_i2s_40003c00_PATH "/soc/i2s@40003c00" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_i2s_40003c00_FULL_NAME "i2s@40003c00" +#define DT_N_S_soc_S_i2s_40003c00_FULL_NAME_UNQUOTED i2s@40003c00 +#define DT_N_S_soc_S_i2s_40003c00_FULL_NAME_TOKEN i2s_40003c00 +#define DT_N_S_soc_S_i2s_40003c00_FULL_NAME_UPPER_TOKEN I2S_40003C00 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_i2s_40003c00_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_i2s_40003c00_CHILD_IDX 30 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_i2s_40003c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_NODELABEL(fn) fn(i2s3) +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2s3, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_i2s_40003c00_CHILD_NUM 0 +#define DT_N_S_soc_S_i2s_40003c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_i2s_40003c00_HASH cqu_NshQmISUpdQ_NZoLP2K_y7VkySXvopc7dRz2dUs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_i2s_40003c00_ORD 136 +#define DT_N_S_soc_S_i2s_40003c00_ORD_STR_SORTABLE 00136 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_i2s_40003c00_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 134, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_i2s_40003c00_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_i2s_40003c00_EXISTS 1 +#define DT_N_INST_2_st_stm32h7_i2s DT_N_S_soc_S_i2s_40003c00 +#define DT_N_INST_2_st_stm32_i2s DT_N_S_soc_S_i2s_40003c00 +#define DT_N_NODELABEL_i2s3 DT_N_S_soc_S_i2s_40003c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_i2s_40003c00_REG_NUM 1 +#define DT_N_S_soc_S_i2s_40003c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_REG_IDX_0_VAL_ADDRESS 1073757184 +#define DT_N_S_soc_S_i2s_40003c00_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_i2s_40003c00_RANGES_NUM 0 +#define DT_N_S_soc_S_i2s_40003c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_i2s_40003c00_IRQ_NUM 1 +#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_VAL_irq 51 +#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_i2s_40003c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MATCHES_st_stm32h7_i2s 1 +#define DT_N_S_soc_S_i2s_40003c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MODEL_IDX_0 "stm32h7-i2s" +#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MATCHES_st_stm32_i2s 1 +#define DT_N_S_soc_S_i2s_40003c00_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MODEL_IDX_1 "stm32-i2s" +#define DT_N_S_soc_S_i2s_40003c00_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_i2s_40003c00_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_i2s_40003c00_P_reg {1073757184, 1024} +#define DT_N_S_soc_S_i2s_40003c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_reg_IDX_0 1073757184 +#define DT_N_S_soc_S_i2s_40003c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_i2s_40003c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_interrupts {51, 0} +#define DT_N_S_soc_S_i2s_40003c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_interrupts_IDX_0 51 +#define DT_N_S_soc_S_i2s_40003c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_i2s_40003c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel 0 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_slot 62 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel_config 132160 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_NAME "tx" +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_channel DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_slot DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_slot +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_channel_config DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel_config +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_slot 61 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel_config 132224 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_NAME "rx" +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_channel DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_slot DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_slot +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_channel_config DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel_config +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003c00, dmas, 0) \ + fn(DT_N_S_soc_S_i2s_40003c00, dmas, 1) +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003c00, dmas, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003c00, dmas, 1) +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003c00, dmas, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40003c00, dmas, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003c00, dmas, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003c00, dmas, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_LEN 2 +#define DT_N_S_soc_S_i2s_40003c00_P_dmas_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names {"tx", "rx"} +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_0 "tx" +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_0_STRING_UNQUOTED tx +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_0_STRING_TOKEN tx +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_0_STRING_UPPER_TOKEN TX +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_1 "rx" +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_1_STRING_UNQUOTED rx +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_1_STRING_TOKEN rx +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_1_STRING_UPPER_TOKEN RX +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 0) \ + fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 1) +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 1) +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_LEN 2 +#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_mck_enabled 0 +#define DT_N_S_soc_S_i2s_40003c00_P_mck_enabled_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_status "disabled" +#define DT_N_S_soc_S_i2s_40003c00_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_i2s_40003c00_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_i2s_40003c00_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_i2s_40003c00_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_i2s_40003c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_i2s_40003c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003c00, status, 0) +#define DT_N_S_soc_S_i2s_40003c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003c00, status, 0) +#define DT_N_S_soc_S_i2s_40003c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_P_status_LEN 1 +#define DT_N_S_soc_S_i2s_40003c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_compatible {"st,stm32h7-i2s", "st,stm32-i2s"} +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_0 "st,stm32h7-i2s" +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-i2s +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_i2s +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_I2S +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_1 "st,stm32-i2s" +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-i2s +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_1_STRING_TOKEN st_stm32_i2s +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_I2S +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003c00, compatible, 0) \ + fn(DT_N_S_soc_S_i2s_40003c00, compatible, 1) +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003c00, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003c00, compatible, 1) +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003c00, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40003c00, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003c00, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003c00, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_LEN 2 +#define DT_N_S_soc_S_i2s_40003c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_VAL_bits 32768 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_VAL_bits 30146640 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003c00, clocks, 0) \ + fn(DT_N_S_soc_S_i2s_40003c00, clocks, 1) +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003c00, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003c00, clocks, 1) +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003c00, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40003c00, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003c00, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40003c00, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_LEN 2 +#define DT_N_S_soc_S_i2s_40003c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_i2s_40003c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_wakeup_source 0 +#define DT_N_S_soc_S_i2s_40003c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_i2s_40003c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_i2s_40003c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/i2s@40013000 + * + * Node identifier: DT_N_S_soc_S_i2s_40013000 + * + * Binding (compatible = st,stm32h7-i2s): + * $ZEPHYR_BASE/dts/bindings/i2s/st,stm32h7-i2s.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_i2s_40013000_PATH "/soc/i2s@40013000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_i2s_40013000_FULL_NAME "i2s@40013000" +#define DT_N_S_soc_S_i2s_40013000_FULL_NAME_UNQUOTED i2s@40013000 +#define DT_N_S_soc_S_i2s_40013000_FULL_NAME_TOKEN i2s_40013000 +#define DT_N_S_soc_S_i2s_40013000_FULL_NAME_UPPER_TOKEN I2S_40013000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_i2s_40013000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_i2s_40013000_CHILD_IDX 28 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_i2s_40013000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_i2s_40013000_FOREACH_NODELABEL(fn) fn(i2s1) +#define DT_N_S_soc_S_i2s_40013000_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2s1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_i2s_40013000_CHILD_NUM 0 +#define DT_N_S_soc_S_i2s_40013000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_i2s_40013000_HASH AR40g4B08gpzWiZgw_CMbPN4L_FZHfvTMNyO8ZIF16c + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_i2s_40013000_ORD 137 +#define DT_N_S_soc_S_i2s_40013000_ORD_STR_SORTABLE 00137 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_i2s_40013000_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 134, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_i2s_40013000_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_i2s_40013000_EXISTS 1 +#define DT_N_INST_0_st_stm32h7_i2s DT_N_S_soc_S_i2s_40013000 +#define DT_N_INST_0_st_stm32_i2s DT_N_S_soc_S_i2s_40013000 +#define DT_N_NODELABEL_i2s1 DT_N_S_soc_S_i2s_40013000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_i2s_40013000_REG_NUM 1 +#define DT_N_S_soc_S_i2s_40013000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_REG_IDX_0_VAL_ADDRESS 1073819648 +#define DT_N_S_soc_S_i2s_40013000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_i2s_40013000_RANGES_NUM 0 +#define DT_N_S_soc_S_i2s_40013000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_i2s_40013000_IRQ_NUM 1 +#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_VAL_irq 35 +#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_VAL_priority 3 +#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_i2s_40013000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_i2s_40013000_COMPAT_MATCHES_st_stm32h7_i2s 1 +#define DT_N_S_soc_S_i2s_40013000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_i2s_40013000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_COMPAT_MODEL_IDX_0 "stm32h7-i2s" +#define DT_N_S_soc_S_i2s_40013000_COMPAT_MATCHES_st_stm32_i2s 1 +#define DT_N_S_soc_S_i2s_40013000_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_i2s_40013000_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_COMPAT_MODEL_IDX_1 "stm32-i2s" +#define DT_N_S_soc_S_i2s_40013000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_i2s_40013000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_i2s_40013000_P_reg {1073819648, 1024} +#define DT_N_S_soc_S_i2s_40013000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_reg_IDX_0 1073819648 +#define DT_N_S_soc_S_i2s_40013000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_i2s_40013000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_interrupts {35, 3} +#define DT_N_S_soc_S_i2s_40013000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_interrupts_IDX_0 35 +#define DT_N_S_soc_S_i2s_40013000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_interrupts_IDX_1 3 +#define DT_N_S_soc_S_i2s_40013000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel 0 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_slot 38 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel_config 132160 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_NAME "tx" +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_channel DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_slot DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_slot +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_channel_config DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel_config +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_slot 37 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel_config 132224 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_NAME "rx" +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_PH DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_channel DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_slot DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_slot +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_channel_config DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel_config +#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40013000, dmas, 0) \ + fn(DT_N_S_soc_S_i2s_40013000, dmas, 1) +#define DT_N_S_soc_S_i2s_40013000_P_dmas_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40013000, dmas, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40013000, dmas, 1) +#define DT_N_S_soc_S_i2s_40013000_P_dmas_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40013000, dmas, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40013000, dmas, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_P_dmas_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40013000, dmas, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40013000, dmas, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_P_dmas_LEN 2 +#define DT_N_S_soc_S_i2s_40013000_P_dmas_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dma_names {"tx", "rx"} +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_0 "tx" +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_0_STRING_UNQUOTED tx +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_0_STRING_TOKEN tx +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_0_STRING_UPPER_TOKEN TX +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_1 "rx" +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_1_STRING_UNQUOTED rx +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_1_STRING_TOKEN rx +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_1_STRING_UPPER_TOKEN RX +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40013000, dma_names, 0) \ + fn(DT_N_S_soc_S_i2s_40013000, dma_names, 1) +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40013000, dma_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40013000, dma_names, 1) +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40013000, dma_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40013000, dma_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40013000, dma_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40013000, dma_names, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_LEN 2 +#define DT_N_S_soc_S_i2s_40013000_P_dma_names_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_mck_enabled 0 +#define DT_N_S_soc_S_i2s_40013000_P_mck_enabled_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_status "disabled" +#define DT_N_S_soc_S_i2s_40013000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_i2s_40013000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_i2s_40013000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_i2s_40013000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_i2s_40013000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_i2s_40013000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40013000, status, 0) +#define DT_N_S_soc_S_i2s_40013000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40013000, status, 0) +#define DT_N_S_soc_S_i2s_40013000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40013000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40013000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_P_status_LEN 1 +#define DT_N_S_soc_S_i2s_40013000_P_status_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_compatible {"st,stm32h7-i2s", "st,stm32-i2s"} +#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_0 "st,stm32h7-i2s" +#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-i2s +#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_i2s +#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_I2S +#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_1 "st,stm32-i2s" +#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-i2s +#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_1_STRING_TOKEN st_stm32_i2s +#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_I2S +#define DT_N_S_soc_S_i2s_40013000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40013000, compatible, 0) \ + fn(DT_N_S_soc_S_i2s_40013000, compatible, 1) +#define DT_N_S_soc_S_i2s_40013000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40013000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40013000, compatible, 1) +#define DT_N_S_soc_S_i2s_40013000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40013000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40013000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40013000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40013000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_P_compatible_LEN 2 +#define DT_N_S_soc_S_i2s_40013000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_VAL_bus 240 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_VAL_bits 4096 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_VAL_bits 30146640 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40013000, clocks, 0) \ + fn(DT_N_S_soc_S_i2s_40013000, clocks, 1) +#define DT_N_S_soc_S_i2s_40013000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40013000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40013000, clocks, 1) +#define DT_N_S_soc_S_i2s_40013000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40013000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_i2s_40013000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40013000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_i2s_40013000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_i2s_40013000_P_clocks_LEN 2 +#define DT_N_S_soc_S_i2s_40013000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_i2s_40013000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_wakeup_source 0 +#define DT_N_S_soc_S_i2s_40013000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_i2s_40013000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_i2s_40013000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/interrupt-controller@58000000 + * + * Node identifier: DT_N_S_soc_S_interrupt_controller_58000000 + * + * Binding (compatible = st,stm32-exti): + * $ZEPHYR_BASE/dts/bindings/interrupt-controller/st,stm32-exti.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_PATH "/soc/interrupt-controller@58000000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_FULL_NAME "interrupt-controller@58000000" +#define DT_N_S_soc_S_interrupt_controller_58000000_FULL_NAME_UNQUOTED interrupt-controller@58000000 +#define DT_N_S_soc_S_interrupt_controller_58000000_FULL_NAME_TOKEN interrupt_controller_58000000 +#define DT_N_S_soc_S_interrupt_controller_58000000_FULL_NAME_UPPER_TOKEN INTERRUPT_CONTROLLER_58000000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_CHILD_IDX 4 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_NODELABEL(fn) fn(exti) +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(exti, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_interrupt_controller_58000000_CHILD_NUM 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_HASH uKGVm3rbaNzVd0m0zI0AR1_ddgP1_VnC7GQGtMH0Ldw + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_ORD 138 +#define DT_N_S_soc_S_interrupt_controller_58000000_ORD_STR_SORTABLE 00138 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_REQUIRES_ORDS \ + 3, \ + 4, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_EXISTS 1 +#define DT_N_INST_0_st_stm32_exti DT_N_S_soc_S_interrupt_controller_58000000 +#define DT_N_NODELABEL_exti DT_N_S_soc_S_interrupt_controller_58000000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_REG_NUM 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_REG_IDX_0_VAL_ADDRESS 1476395008 +#define DT_N_S_soc_S_interrupt_controller_58000000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_interrupt_controller_58000000_RANGES_NUM 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NUM 7 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_irq 6 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_irq 7 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_irq 8 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_irq 9 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_irq 10 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_irq 23 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_irq 40 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_priority 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line0_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line0_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line0_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line1_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line1_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line1_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line2_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line2_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line2_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line3_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line3_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line3_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line4_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line4_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line4_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line4_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line4_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line5_9_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line5_9_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line5_9_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line5_9_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line5_9_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line10_15_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_irq +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line10_15_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line10_15_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_priority +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line10_15_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line10_15_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_CONTROLLER +#define DT_N_S_soc_S_interrupt_controller_58000000_COMPAT_MATCHES_st_stm32_exti 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_interrupt_controller_58000000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_COMPAT_MODEL_IDX_0 "stm32-exti" +#define DT_N_S_soc_S_interrupt_controller_58000000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg {1476395008, 1024} +#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg_IDX_0 1476395008 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts {6, 0, 7, 0, 8, 0, 9, 0, 10, 0, 23, 0, 40, 0} +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_0 6 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_2 7 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_4 8 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_6 9 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_8 10 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_9 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_10 23 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_11 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_12_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_12 40 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_13_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_13 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names {"line0", "line1", "line2", "line3", "line4", "line5-9", "line10-15"} +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_0 "line0" +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_0_STRING_UNQUOTED line0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_0_STRING_TOKEN line0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN LINE0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_1 "line1" +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_1_STRING_UNQUOTED line1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_1_STRING_TOKEN line1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN LINE1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_2 "line2" +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_2_STRING_UNQUOTED line2 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_2_STRING_TOKEN line2 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN LINE2 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_3 "line3" +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_3_STRING_UNQUOTED line3 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_3_STRING_TOKEN line3 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN LINE3 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_4 "line4" +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_4_STRING_UNQUOTED line4 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_4_STRING_TOKEN line4 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_4_STRING_UPPER_TOKEN LINE4 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_5 "line5-9" +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_5_STRING_UNQUOTED line5-9 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_5_STRING_TOKEN line5_9 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_5_STRING_UPPER_TOKEN LINE5_9 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_6 "line10-15" +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_6_STRING_UNQUOTED line10-15 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_6_STRING_TOKEN line10_15 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_6_STRING_UPPER_TOKEN LINE10_15 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 0) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 1) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 2) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 3) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 4) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 5) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 6) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 6) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 6, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 6, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_LEN 7 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_num_lines 16 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_num_lines_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges {0, 1, 1, 1, 2, 1, 3, 1, 4, 1, 5, 5, 10, 6} +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_0 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_1 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_2 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_3 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_4 2 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_5 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_6 3 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_7 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_8 4 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_9 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_10 5 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_11 5 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_12_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_12 10 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_13_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_13 6 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 0) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 1) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 2) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 3) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 4) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 5) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 6) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 7) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 8) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 9) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 10) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 11) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 12) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 13) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 10) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 11) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 12) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 13) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 7, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 8, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 9, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 10, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 11, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 12, __VA_ARGS__) \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 13, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 13, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_LEN 14 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible {"st,stm32-exti"} +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_IDX_0 "st,stm32-exti" +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-exti +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_IDX_0_STRING_TOKEN st_stm32_exti +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_EXTI +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_58000000, compatible, 0) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_58000000, compatible, 0) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_LEN 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_wakeup_source 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_controller 1 +#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_controller_EXISTS 1 + +/* + * Devicetree node: /soc/mailbox@58026400 + * + * Node identifier: DT_N_S_soc_S_mailbox_58026400 + * + * Binding (compatible = st,stm32-hsem-mailbox): + * $ZEPHYR_BASE/dts/bindings/ipm/st,stm32-hsem-mailbox.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_mailbox_58026400_PATH "/soc/mailbox@58026400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_mailbox_58026400_FULL_NAME "mailbox@58026400" +#define DT_N_S_soc_S_mailbox_58026400_FULL_NAME_UNQUOTED mailbox@58026400 +#define DT_N_S_soc_S_mailbox_58026400_FULL_NAME_TOKEN mailbox_58026400 +#define DT_N_S_soc_S_mailbox_58026400_FULL_NAME_UPPER_TOKEN MAILBOX_58026400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_mailbox_58026400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_mailbox_58026400_CHILD_IDX 66 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_mailbox_58026400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_NODELABEL(fn) fn(mailbox) +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_NODELABEL_VARGS(fn, ...) fn(mailbox, __VA_ARGS__) +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_mailbox_58026400_CHILD_NUM 0 +#define DT_N_S_soc_S_mailbox_58026400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_mailbox_58026400_HASH EEDMy4UODFDtNiLV6t2seBZKwHkM1Q95e5cssXQ3UK8 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_mailbox_58026400_ORD 139 +#define DT_N_S_soc_S_mailbox_58026400_ORD_STR_SORTABLE 00139 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_mailbox_58026400_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_mailbox_58026400_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_mailbox_58026400_EXISTS 1 +#define DT_N_INST_0_st_stm32_hsem_mailbox DT_N_S_soc_S_mailbox_58026400 +#define DT_N_INST_0_st_mbox_stm32_hsem DT_N_S_soc_S_mailbox_58026400 +#define DT_N_NODELABEL_mailbox DT_N_S_soc_S_mailbox_58026400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_mailbox_58026400_REG_NUM 1 +#define DT_N_S_soc_S_mailbox_58026400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_REG_IDX_0_VAL_ADDRESS 1476551680 +#define DT_N_S_soc_S_mailbox_58026400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_mailbox_58026400_RANGES_NUM 0 +#define DT_N_S_soc_S_mailbox_58026400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_mailbox_58026400_IRQ_NUM 1 +#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_VAL_irq 125 +#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_mailbox_58026400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MATCHES_st_stm32_hsem_mailbox 1 +#define DT_N_S_soc_S_mailbox_58026400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MODEL_IDX_0 "stm32-hsem-mailbox" +#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MATCHES_st_mbox_stm32_hsem 1 +#define DT_N_S_soc_S_mailbox_58026400_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MODEL_IDX_1 "mbox-stm32-hsem" +#define DT_N_S_soc_S_mailbox_58026400_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_mailbox_58026400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_VAL_bits 33554432 +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_mailbox_58026400, clocks, 0) +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_mailbox_58026400, clocks, 0) +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_mailbox_58026400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_mailbox_58026400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_LEN 1 +#define DT_N_S_soc_S_mailbox_58026400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_interrupts {125, 0} +#define DT_N_S_soc_S_mailbox_58026400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_interrupts_IDX_0 125 +#define DT_N_S_soc_S_mailbox_58026400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_mailbox_58026400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_status "okay" +#define DT_N_S_soc_S_mailbox_58026400_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_mailbox_58026400_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_mailbox_58026400_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_mailbox_58026400_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_mailbox_58026400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_mailbox_58026400_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_mailbox_58026400, status, 0) +#define DT_N_S_soc_S_mailbox_58026400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_mailbox_58026400, status, 0) +#define DT_N_S_soc_S_mailbox_58026400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_mailbox_58026400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_mailbox_58026400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_mailbox_58026400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_mailbox_58026400_P_status_LEN 1 +#define DT_N_S_soc_S_mailbox_58026400_P_status_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_compatible {"st,stm32-hsem-mailbox", "st,mbox-stm32-hsem"} +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_0 "st,stm32-hsem-mailbox" +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-hsem-mailbox +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_0_STRING_TOKEN st_stm32_hsem_mailbox +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_HSEM_MAILBOX +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_1 "st,mbox-stm32-hsem" +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_1_STRING_UNQUOTED st,mbox-stm32-hsem +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_1_STRING_TOKEN st_mbox_stm32_hsem +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_MBOX_STM32_HSEM +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_mailbox_58026400, compatible, 0) \ + fn(DT_N_S_soc_S_mailbox_58026400, compatible, 1) +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_mailbox_58026400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_mailbox_58026400, compatible, 1) +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_mailbox_58026400, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_mailbox_58026400, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_mailbox_58026400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_mailbox_58026400, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_LEN 2 +#define DT_N_S_soc_S_mailbox_58026400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_reg {1476551680, 1024} +#define DT_N_S_soc_S_mailbox_58026400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_reg_IDX_0 1476551680 +#define DT_N_S_soc_S_mailbox_58026400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_mailbox_58026400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_mailbox_58026400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_wakeup_source 0 +#define DT_N_S_soc_S_mailbox_58026400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_mailbox_58026400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_mailbox_58026400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/memory@38800000 + * + * Node identifier: DT_N_S_soc_S_memory_38800000 + * + * Binding (compatible = zephyr,memory-region): + * $ZEPHYR_BASE/dts/bindings/base/zephyr,memory-region.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_memory_38800000_PATH "/soc/memory@38800000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_memory_38800000_FULL_NAME "memory@38800000" +#define DT_N_S_soc_S_memory_38800000_FULL_NAME_UNQUOTED memory@38800000 +#define DT_N_S_soc_S_memory_38800000_FULL_NAME_TOKEN memory_38800000 +#define DT_N_S_soc_S_memory_38800000_FULL_NAME_UPPER_TOKEN MEMORY_38800000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_memory_38800000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_memory_38800000_CHILD_IDX 63 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_memory_38800000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_memory_38800000_FOREACH_NODELABEL(fn) fn(backup_sram) +#define DT_N_S_soc_S_memory_38800000_FOREACH_NODELABEL_VARGS(fn, ...) fn(backup_sram, __VA_ARGS__) +#define DT_N_S_soc_S_memory_38800000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_memory_38800000_CHILD_NUM 0 +#define DT_N_S_soc_S_memory_38800000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_memory_38800000_HASH 7ck7jfzNr5JUKTE_fCwfei7NH6M14LTAgkyNzLdnGfI + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_memory_38800000_ORD 140 +#define DT_N_S_soc_S_memory_38800000_ORD_STR_SORTABLE 00140 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_memory_38800000_REQUIRES_ORDS \ + 3, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_memory_38800000_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_memory_38800000_EXISTS 1 +#define DT_N_INST_6_zephyr_memory_region DT_N_S_soc_S_memory_38800000 +#define DT_N_INST_0_st_stm32_backup_sram DT_N_S_soc_S_memory_38800000 +#define DT_N_NODELABEL_backup_sram DT_N_S_soc_S_memory_38800000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_memory_38800000_REG_NUM 1 +#define DT_N_S_soc_S_memory_38800000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_REG_IDX_0_VAL_ADDRESS 947912704 +#define DT_N_S_soc_S_memory_38800000_REG_IDX_0_VAL_SIZE 4096 +#define DT_N_S_soc_S_memory_38800000_RANGES_NUM 0 +#define DT_N_S_soc_S_memory_38800000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_memory_38800000_IRQ_NUM 0 +#define DT_N_S_soc_S_memory_38800000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_memory_38800000_COMPAT_MATCHES_zephyr_memory_region 1 +#define DT_N_S_soc_S_memory_38800000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding" +#define DT_N_S_soc_S_memory_38800000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_COMPAT_MODEL_IDX_0 "memory-region" +#define DT_N_S_soc_S_memory_38800000_COMPAT_MATCHES_st_stm32_backup_sram 1 +#define DT_N_S_soc_S_memory_38800000_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_memory_38800000_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_COMPAT_MODEL_IDX_1 "stm32-backup-sram" +#define DT_N_S_soc_S_memory_38800000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_memory_38800000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region "BACKUP_SRAM" +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_STRING_UNQUOTED BACKUP_SRAM +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_STRING_TOKEN BACKUP_SRAM +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_STRING_UPPER_TOKEN BACKUP_SRAM +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_IDX_0 "BACKUP_SRAM" +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_38800000, zephyr_memory_region, 0) +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_38800000, zephyr_memory_region, 0) +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_38800000, zephyr_memory_region, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_38800000, zephyr_memory_region, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_LEN 1 +#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_status "disabled" +#define DT_N_S_soc_S_memory_38800000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_memory_38800000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_memory_38800000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_memory_38800000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_memory_38800000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_memory_38800000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_38800000, status, 0) +#define DT_N_S_soc_S_memory_38800000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_38800000, status, 0) +#define DT_N_S_soc_S_memory_38800000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_38800000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_38800000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_38800000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_38800000_P_status_LEN 1 +#define DT_N_S_soc_S_memory_38800000_P_status_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_compatible {"zephyr,memory-region", "st,stm32-backup-sram"} +#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_0 "zephyr,memory-region" +#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_0_STRING_UNQUOTED zephyr,memory-region +#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_0_STRING_TOKEN zephyr_memory_region +#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_MEMORY_REGION +#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_1 "st,stm32-backup-sram" +#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-backup-sram +#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_1_STRING_TOKEN st_stm32_backup_sram +#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_BACKUP_SRAM +#define DT_N_S_soc_S_memory_38800000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_38800000, compatible, 0) \ + fn(DT_N_S_soc_S_memory_38800000, compatible, 1) +#define DT_N_S_soc_S_memory_38800000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_38800000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_38800000, compatible, 1) +#define DT_N_S_soc_S_memory_38800000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_38800000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_38800000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_memory_38800000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_38800000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_38800000, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_memory_38800000_P_compatible_LEN 2 +#define DT_N_S_soc_S_memory_38800000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_reg {947912704, 4096} +#define DT_N_S_soc_S_memory_38800000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_reg_IDX_0 947912704 +#define DT_N_S_soc_S_memory_38800000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_memory_38800000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_VAL_bus 224 +#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_VAL_bits 268435456 +#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_38800000, clocks, 0) +#define DT_N_S_soc_S_memory_38800000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_38800000, clocks, 0) +#define DT_N_S_soc_S_memory_38800000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_38800000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_38800000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_38800000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_38800000_P_clocks_LEN 1 +#define DT_N_S_soc_S_memory_38800000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_memory_38800000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_wakeup_source 0 +#define DT_N_S_soc_S_memory_38800000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_memory_38800000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_memory_38800000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/rng@48021800 + * + * Node identifier: DT_N_S_soc_S_rng_48021800 + * + * Binding (compatible = st,stm32-rng): + * $ZEPHYR_BASE/dts/bindings/rng/st,stm32-rng.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_rng_48021800_PATH "/soc/rng@48021800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_rng_48021800_FULL_NAME "rng@48021800" +#define DT_N_S_soc_S_rng_48021800_FULL_NAME_UNQUOTED rng@48021800 +#define DT_N_S_soc_S_rng_48021800_FULL_NAME_TOKEN rng_48021800 +#define DT_N_S_soc_S_rng_48021800_FULL_NAME_UPPER_TOKEN RNG_48021800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_rng_48021800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_rng_48021800_CHILD_IDX 58 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_rng_48021800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_rng_48021800_FOREACH_NODELABEL(fn) fn(rng) +#define DT_N_S_soc_S_rng_48021800_FOREACH_NODELABEL_VARGS(fn, ...) fn(rng, __VA_ARGS__) +#define DT_N_S_soc_S_rng_48021800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_rng_48021800_CHILD_NUM 0 +#define DT_N_S_soc_S_rng_48021800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_rng_48021800_HASH d6ka_Yk2ooJ3ol3sggiQatxqiRRZ8bDVPl803XX9V_c + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_rng_48021800_ORD 141 +#define DT_N_S_soc_S_rng_48021800_ORD_STR_SORTABLE 00141 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_rng_48021800_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_rng_48021800_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_rng_48021800_EXISTS 1 +#define DT_N_INST_0_st_stm32_rng DT_N_S_soc_S_rng_48021800 +#define DT_N_NODELABEL_rng DT_N_S_soc_S_rng_48021800 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_rng_48021800_REG_NUM 1 +#define DT_N_S_soc_S_rng_48021800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_REG_IDX_0_VAL_ADDRESS 1208096768 +#define DT_N_S_soc_S_rng_48021800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_rng_48021800_RANGES_NUM 0 +#define DT_N_S_soc_S_rng_48021800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_rng_48021800_IRQ_NUM 1 +#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_VAL_irq 80 +#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_rng_48021800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_rng_48021800_COMPAT_MATCHES_st_stm32_rng 1 +#define DT_N_S_soc_S_rng_48021800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_rng_48021800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_COMPAT_MODEL_IDX_0 "stm32-rng" +#define DT_N_S_soc_S_rng_48021800_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_rng_48021800_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_rng_48021800_P_reg {1208096768, 1024} +#define DT_N_S_soc_S_rng_48021800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_reg_IDX_0 1208096768 +#define DT_N_S_soc_S_rng_48021800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_rng_48021800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_VAL_bus 220 +#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_VAL_bits 64 +#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rng_48021800, clocks, 0) +#define DT_N_S_soc_S_rng_48021800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rng_48021800, clocks, 0) +#define DT_N_S_soc_S_rng_48021800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rng_48021800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_48021800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rng_48021800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_48021800_P_clocks_LEN 1 +#define DT_N_S_soc_S_rng_48021800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_status "okay" +#define DT_N_S_soc_S_rng_48021800_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_rng_48021800_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_rng_48021800_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_rng_48021800_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_rng_48021800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_rng_48021800_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rng_48021800, status, 0) +#define DT_N_S_soc_S_rng_48021800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rng_48021800, status, 0) +#define DT_N_S_soc_S_rng_48021800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rng_48021800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_48021800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rng_48021800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_48021800_P_status_LEN 1 +#define DT_N_S_soc_S_rng_48021800_P_status_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_compatible {"st,stm32-rng"} +#define DT_N_S_soc_S_rng_48021800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_compatible_IDX_0 "st,stm32-rng" +#define DT_N_S_soc_S_rng_48021800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-rng +#define DT_N_S_soc_S_rng_48021800_P_compatible_IDX_0_STRING_TOKEN st_stm32_rng +#define DT_N_S_soc_S_rng_48021800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_RNG +#define DT_N_S_soc_S_rng_48021800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rng_48021800, compatible, 0) +#define DT_N_S_soc_S_rng_48021800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rng_48021800, compatible, 0) +#define DT_N_S_soc_S_rng_48021800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rng_48021800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_48021800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rng_48021800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_rng_48021800_P_compatible_LEN 1 +#define DT_N_S_soc_S_rng_48021800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_interrupts {80, 0} +#define DT_N_S_soc_S_rng_48021800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_interrupts_IDX_0 80 +#define DT_N_S_soc_S_rng_48021800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_rng_48021800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_rng_48021800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_wakeup_source 0 +#define DT_N_S_soc_S_rng_48021800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_rng_48021800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_rng_48021800_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/sdmmc@48022400 + * + * Node identifier: DT_N_S_soc_S_sdmmc_48022400 + * + * Binding (compatible = st,stm32-sdmmc): + * $ZEPHYR_BASE/dts/bindings/mmc/st,stm32-sdmmc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_sdmmc_48022400_PATH "/soc/sdmmc@48022400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_sdmmc_48022400_FULL_NAME "sdmmc@48022400" +#define DT_N_S_soc_S_sdmmc_48022400_FULL_NAME_UNQUOTED sdmmc@48022400 +#define DT_N_S_soc_S_sdmmc_48022400_FULL_NAME_TOKEN sdmmc_48022400 +#define DT_N_S_soc_S_sdmmc_48022400_FULL_NAME_UPPER_TOKEN SDMMC_48022400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_sdmmc_48022400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_sdmmc_48022400_CHILD_IDX 60 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_sdmmc_48022400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_NODELABEL(fn) fn(sdmmc2) +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_NODELABEL_VARGS(fn, ...) fn(sdmmc2, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_sdmmc_48022400_CHILD_NUM 0 +#define DT_N_S_soc_S_sdmmc_48022400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_sdmmc_48022400_HASH FWnL4SsgC4pr3AW8TfPSyMj0yDgmJe1JK1TAHxSEFW4 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_sdmmc_48022400_ORD 142 +#define DT_N_S_soc_S_sdmmc_48022400_ORD_STR_SORTABLE 00142 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_sdmmc_48022400_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 51, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_sdmmc_48022400_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_sdmmc_48022400_EXISTS 1 +#define DT_N_INST_1_st_stm32_sdmmc DT_N_S_soc_S_sdmmc_48022400 +#define DT_N_NODELABEL_sdmmc2 DT_N_S_soc_S_sdmmc_48022400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_sdmmc_48022400_REG_NUM 1 +#define DT_N_S_soc_S_sdmmc_48022400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_REG_IDX_0_VAL_ADDRESS 1208099840 +#define DT_N_S_soc_S_sdmmc_48022400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_sdmmc_48022400_RANGES_NUM 0 +#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_sdmmc_48022400_IRQ_NUM 1 +#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_VAL_irq 124 +#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_sdmmc_48022400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_sdmmc_48022400_COMPAT_MATCHES_st_stm32_sdmmc 1 +#define DT_N_S_soc_S_sdmmc_48022400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_sdmmc_48022400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_COMPAT_MODEL_IDX_0 "stm32-sdmmc" +#define DT_N_S_soc_S_sdmmc_48022400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_sdmmc_48022400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_VAL_bus 220 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_VAL_bits 512 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_VAL_bits 5242956 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 0) \ + fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 1) +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 1) +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_LEN 2 +#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_reg {1208099840, 1024} +#define DT_N_S_soc_S_sdmmc_48022400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_reg_IDX_0 1208099840 +#define DT_N_S_soc_S_sdmmc_48022400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_sdmmc_48022400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_sdmmc_48022400_P_resets_IDX_0_VAL_id 4233 +#define DT_N_S_soc_S_sdmmc_48022400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_48022400, resets, 0) +#define DT_N_S_soc_S_sdmmc_48022400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_48022400, resets, 0) +#define DT_N_S_soc_S_sdmmc_48022400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_48022400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_48022400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_48022400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_48022400_P_resets_LEN 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_bus_width 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_bus_width_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_sdmmc_48022400_P_bus_width_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_bus_width_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_bus_width_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_clk_div 0 +#define DT_N_S_soc_S_sdmmc_48022400_P_clk_div_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_idma 0 +#define DT_N_S_soc_S_sdmmc_48022400_P_idma_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_status "disabled" +#define DT_N_S_soc_S_sdmmc_48022400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_sdmmc_48022400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_sdmmc_48022400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_sdmmc_48022400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_sdmmc_48022400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_sdmmc_48022400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_48022400, status, 0) +#define DT_N_S_soc_S_sdmmc_48022400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_48022400, status, 0) +#define DT_N_S_soc_S_sdmmc_48022400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_48022400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_48022400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_48022400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_48022400_P_status_LEN 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_status_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible {"st,stm32-sdmmc"} +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_IDX_0 "st,stm32-sdmmc" +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-sdmmc +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_IDX_0_STRING_TOKEN st_stm32_sdmmc +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SDMMC +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_48022400, compatible, 0) +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_48022400, compatible, 0) +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_48022400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_48022400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_LEN 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts {124, 0} +#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts_IDX_0 124 +#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_sdmmc_48022400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_wakeup_source 0 +#define DT_N_S_soc_S_sdmmc_48022400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_48022400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_sdmmc_48022400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/sdmmc@52007000 + * + * Node identifier: DT_N_S_soc_S_sdmmc_52007000 + * + * Binding (compatible = st,stm32-sdmmc): + * $ZEPHYR_BASE/dts/bindings/mmc/st,stm32-sdmmc.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_sdmmc_52007000_PATH "/soc/sdmmc@52007000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_sdmmc_52007000_FULL_NAME "sdmmc@52007000" +#define DT_N_S_soc_S_sdmmc_52007000_FULL_NAME_UNQUOTED sdmmc@52007000 +#define DT_N_S_soc_S_sdmmc_52007000_FULL_NAME_TOKEN sdmmc_52007000 +#define DT_N_S_soc_S_sdmmc_52007000_FULL_NAME_UPPER_TOKEN SDMMC_52007000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_sdmmc_52007000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_sdmmc_52007000_CHILD_IDX 59 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_sdmmc_52007000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_NODELABEL(fn) fn(sdmmc1) +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_NODELABEL_VARGS(fn, ...) fn(sdmmc1, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_sdmmc_52007000_CHILD_NUM 0 +#define DT_N_S_soc_S_sdmmc_52007000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_sdmmc_52007000_HASH HXN7xrSSBp_XQOyNK8_mK6qh2s7oq_z3h5ashoyXhJ4 + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_sdmmc_52007000_ORD 143 +#define DT_N_S_soc_S_sdmmc_52007000_ORD_STR_SORTABLE 00143 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_sdmmc_52007000_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 51, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_sdmmc_52007000_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_sdmmc_52007000_EXISTS 1 +#define DT_N_INST_0_st_stm32_sdmmc DT_N_S_soc_S_sdmmc_52007000 +#define DT_N_NODELABEL_sdmmc1 DT_N_S_soc_S_sdmmc_52007000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_sdmmc_52007000_REG_NUM 1 +#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_VAL_ADDRESS 1375760384 +#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_sdmmc_52007000_RANGES_NUM 0 +#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_NUM 1 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_irq 49 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_sdmmc_52007000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MATCHES_st_stm32_sdmmc 1 +#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MODEL_IDX_0 "stm32-sdmmc" +#define DT_N_S_soc_S_sdmmc_52007000_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_sdmmc_52007000_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bus 212 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bits 65536 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bits 5242956 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0) \ + fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1) +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1) +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_LEN 2 +#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_reg {1375760384, 1024} +#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_0 1375760384 +#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_sdmmc_52007000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_VAL_id 3984 +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_LEN 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_clk_div 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_clk_div_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_idma 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_idma_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_status "disabled" +#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_status_LEN 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_status_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible {"st,stm32-sdmmc"} +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0 "st,stm32-sdmmc" +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-sdmmc +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_TOKEN st_stm32_sdmmc +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SDMMC +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0) +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_LEN 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts {49, 0} +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_0 49 +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_wakeup_source 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/serial@40004400 + * + * Node identifier: DT_N_S_soc_S_serial_40004400 + * + * Binding (compatible = st,stm32-usart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_serial_40004400_PATH "/soc/serial@40004400" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_serial_40004400_FULL_NAME "serial@40004400" +#define DT_N_S_soc_S_serial_40004400_FULL_NAME_UNQUOTED serial@40004400 +#define DT_N_S_soc_S_serial_40004400_FULL_NAME_TOKEN serial_40004400 +#define DT_N_S_soc_S_serial_40004400_FULL_NAME_UPPER_TOKEN SERIAL_40004400 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40004400_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_serial_40004400_CHILD_IDX 9 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_serial_40004400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40004400_FOREACH_NODELABEL(fn) fn(usart2) +#define DT_N_S_soc_S_serial_40004400_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart2, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_serial_40004400_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40004400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_serial_40004400_HASH w0whRjCvTBPyVty9dxjB3Bsl1nzzH1xRQTJifgUAAKQ + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_serial_40004400_ORD 144 +#define DT_N_S_soc_S_serial_40004400_ORD_STR_SORTABLE 00144 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_serial_40004400_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 51, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_serial_40004400_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_serial_40004400_EXISTS 1 +#define DT_N_INST_2_st_stm32_usart DT_N_S_soc_S_serial_40004400 +#define DT_N_INST_4_st_stm32_uart DT_N_S_soc_S_serial_40004400 +#define DT_N_NODELABEL_usart2 DT_N_S_soc_S_serial_40004400 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_serial_40004400_REG_NUM 1 +#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_VAL_ADDRESS 1073759232 +#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_serial_40004400_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40004400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40004400_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_irq 38 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40004400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_MATCHES_st_stm32_usart 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_0 "stm32-usart" +#define DT_N_S_soc_S_serial_40004400_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_40004400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_serial_40004400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_serial_40004400_P_reg {1073759232, 1024} +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_0 1073759232 +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40004400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bits 131072 +#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, clocks, 0) +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, clocks, 0) +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_VAL_id 4625 +#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, resets, 0) +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, resets, 0) +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_interrupts {38, 0} +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_0 38 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40004400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40004400_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_data_bits 8 +#define DT_N_S_soc_S_serial_40004400_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40004400_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_single_wire 0 +#define DT_N_S_soc_S_serial_40004400_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40004400_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_enable 0 +#define DT_N_S_soc_S_serial_40004400_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40004400_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40004400_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_de_invert 0 +#define DT_N_S_soc_S_serial_40004400_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40004400_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40004400_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_parity "none" +#define DT_N_S_soc_S_serial_40004400_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40004400_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40004400_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, parity, 0) +#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, parity, 0) +#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_status "disabled" +#define DT_N_S_soc_S_serial_40004400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_serial_40004400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_serial_40004400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, status, 0) +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, status, 0) +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40004400_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_compatible {"st,stm32-usart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0 "st,stm32-usart" +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, compatible, 0) \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1) +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1) +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004400, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004400_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_40004400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40004400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40004400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40004400_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004400_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40004400_P_rx_invert_EXISTS 1 + +/* + * Devicetree node: /soc/serial@40004800 + * + * Node identifier: DT_N_S_soc_S_serial_40004800 + * + * Binding (compatible = st,stm32-usart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_serial_40004800_PATH "/soc/serial@40004800" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_serial_40004800_FULL_NAME "serial@40004800" +#define DT_N_S_soc_S_serial_40004800_FULL_NAME_UNQUOTED serial@40004800 +#define DT_N_S_soc_S_serial_40004800_FULL_NAME_TOKEN serial_40004800 +#define DT_N_S_soc_S_serial_40004800_FULL_NAME_UPPER_TOKEN SERIAL_40004800 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_serial_40004800_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_serial_40004800_CHILD_IDX 10 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_serial_40004800_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40004800_FOREACH_NODELABEL(fn) fn(usart3) +#define DT_N_S_soc_S_serial_40004800_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart3, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_serial_40004800_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40004800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_dsihost_50000000_HASH 9sTpBGS3zYCuf59HAeaEA3F6t_AO3h188_7ObTguxXg +#define DT_N_S_soc_S_serial_40004800_HASH zEiuovs75QHyumn1pL5rvTd5x6H1bdnak278L4bYuj0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dsihost_50000000_ORD 102 -#define DT_N_S_soc_S_dsihost_50000000_ORD_STR_SORTABLE 00102 +#define DT_N_S_soc_S_serial_40004800_ORD 145 +#define DT_N_S_soc_S_serial_40004800_ORD_STR_SORTABLE 00145 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_dsihost_50000000_REQUIRES_ORDS \ +#define DT_N_S_soc_S_serial_40004800_REQUIRES_ORDS \ 3, \ + 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_dsihost_50000000_SUPPORTS_ORDS +#define DT_N_S_soc_S_serial_40004800_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_dsihost_50000000_EXISTS 1 -#define DT_N_INST_0_st_stm32_mipi_dsi DT_N_S_soc_S_dsihost_50000000 -#define DT_N_NODELABEL_mipi_dsi DT_N_S_soc_S_dsihost_50000000 +#define DT_N_S_soc_S_serial_40004800_EXISTS 1 +#define DT_N_INST_3_st_stm32_usart DT_N_S_soc_S_serial_40004800 +#define DT_N_INST_5_st_stm32_uart DT_N_S_soc_S_serial_40004800 +#define DT_N_NODELABEL_usart3 DT_N_S_soc_S_serial_40004800 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_dsihost_50000000_REG_NUM 1 -#define DT_N_S_soc_S_dsihost_50000000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_REG_IDX_0_VAL_ADDRESS 1342177280 -#define DT_N_S_soc_S_dsihost_50000000_REG_IDX_0_VAL_SIZE 4096 -#define DT_N_S_soc_S_dsihost_50000000_RANGES_NUM 0 -#define DT_N_S_soc_S_dsihost_50000000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_dsihost_50000000_IRQ_NUM 0 -#define DT_N_S_soc_S_dsihost_50000000_IRQ_LEVEL 0 -#define DT_N_S_soc_S_dsihost_50000000_COMPAT_MATCHES_st_stm32_mipi_dsi 1 -#define DT_N_S_soc_S_dsihost_50000000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_dsihost_50000000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_COMPAT_MODEL_IDX_0 "stm32-mipi-dsi" -#define DT_N_S_soc_S_dsihost_50000000_STATUS_disabled 1 +#define DT_N_S_soc_S_serial_40004800_REG_NUM 1 +#define DT_N_S_soc_S_serial_40004800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_REG_IDX_0_VAL_ADDRESS 1073760256 +#define DT_N_S_soc_S_serial_40004800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_serial_40004800_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40004800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40004800_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_irq 39 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40004800_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_MATCHES_st_stm32_usart 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_0 "stm32-usart" +#define DT_N_S_soc_S_serial_40004800_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_40004800_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_dsihost_50000000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_serial_40004800_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bus 228 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bits 16 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_NAME "dsiclk" -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_VAL_bus DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bus -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_VAL_bits DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_0_VAL_bits -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_dsiclk_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bus 4 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bits 255 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_NAME "refclk" -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_VAL_bus DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bus -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_VAL_bits DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_1_VAL_bits -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_refclk_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bus 16 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bits 255 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_NAME "pixelclk" -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_VAL_bus DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bus -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_VAL_bits DT_N_S_soc_S_dsihost_50000000_P_clocks_IDX_2_VAL_bits -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_NAME_pixelclk_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dsihost_50000000, clocks, 0) \ - fn(DT_N_S_soc_S_dsihost_50000000, clocks, 1) \ - fn(DT_N_S_soc_S_dsihost_50000000, clocks, 2) -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dsihost_50000000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_dsihost_50000000, clocks, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_dsihost_50000000, clocks, 2) -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dsihost_50000000, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_dsihost_50000000, clocks, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_dsihost_50000000, clocks, 2, __VA_ARGS__) -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dsihost_50000000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_dsihost_50000000, clocks, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_dsihost_50000000, clocks, 2, __VA_ARGS__) -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_LEN 3 -#define DT_N_S_soc_S_dsihost_50000000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names {"dsiclk", "refclk", "pixelclk"} -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_0 "dsiclk" -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_0_STRING_UNQUOTED dsiclk -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_0_STRING_TOKEN dsiclk -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_0_STRING_UPPER_TOKEN DSICLK -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_1 "refclk" -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_1_STRING_UNQUOTED refclk -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_1_STRING_TOKEN refclk -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_1_STRING_UPPER_TOKEN REFCLK -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_2 "pixelclk" -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_2_STRING_UNQUOTED pixelclk -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_2_STRING_TOKEN pixelclk -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_IDX_2_STRING_UPPER_TOKEN PIXELCLK -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 0) \ - fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 1) \ - fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 2) -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 2) -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 2, __VA_ARGS__) -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_dsihost_50000000, clock_names, 2, __VA_ARGS__) -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_LEN 3 -#define DT_N_S_soc_S_dsihost_50000000_P_clock_names_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_dsihost_50000000_P_resets_IDX_0_VAL_id 4484 -#define DT_N_S_soc_S_dsihost_50000000_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dsihost_50000000, resets, 0) -#define DT_N_S_soc_S_dsihost_50000000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dsihost_50000000, resets, 0) -#define DT_N_S_soc_S_dsihost_50000000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dsihost_50000000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dsihost_50000000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dsihost_50000000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dsihost_50000000_P_resets_LEN 1 -#define DT_N_S_soc_S_dsihost_50000000_P_resets_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_hs_active_high 0 -#define DT_N_S_soc_S_dsihost_50000000_P_hs_active_high_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_vs_active_high 0 -#define DT_N_S_soc_S_dsihost_50000000_P_vs_active_high_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_de_active_high 0 -#define DT_N_S_soc_S_dsihost_50000000_P_de_active_high_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_loosely_packed 0 -#define DT_N_S_soc_S_dsihost_50000000_P_loosely_packed_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_bta_ack_disable 0 -#define DT_N_S_soc_S_dsihost_50000000_P_bta_ack_disable_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_non_continuous 0 -#define DT_N_S_soc_S_dsihost_50000000_P_non_continuous_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_status "disabled" -#define DT_N_S_soc_S_dsihost_50000000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_dsihost_50000000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_dsihost_50000000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_dsihost_50000000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_dsihost_50000000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_dsihost_50000000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dsihost_50000000, status, 0) -#define DT_N_S_soc_S_dsihost_50000000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dsihost_50000000, status, 0) -#define DT_N_S_soc_S_dsihost_50000000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dsihost_50000000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dsihost_50000000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dsihost_50000000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dsihost_50000000_P_status_LEN 1 -#define DT_N_S_soc_S_dsihost_50000000_P_status_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_compatible {"st,stm32-mipi-dsi"} -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_IDX_0 "st,stm32-mipi-dsi" -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-mipi-dsi -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_IDX_0_STRING_TOKEN st_stm32_mipi_dsi -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_MIPI_DSI -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dsihost_50000000, compatible, 0) -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dsihost_50000000, compatible, 0) -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dsihost_50000000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dsihost_50000000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_LEN 1 -#define DT_N_S_soc_S_dsihost_50000000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_reg {1342177280, 4096} -#define DT_N_S_soc_S_dsihost_50000000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_reg_IDX_0 1342177280 -#define DT_N_S_soc_S_dsihost_50000000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_reg_IDX_1 4096 -#define DT_N_S_soc_S_dsihost_50000000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_dsihost_50000000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_wakeup_source 0 -#define DT_N_S_soc_S_dsihost_50000000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_dsihost_50000000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_dsihost_50000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_reg {1073760256, 1024} +#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_0 1073760256 +#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40004800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bits 262144 +#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, clocks, 0) +#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, clocks, 0) +#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40004800_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_VAL_id 4626 +#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, resets, 0) +#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, resets, 0) +#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40004800_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_interrupts {39, 0} +#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_0 39 +#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40004800_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40004800_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0) +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40004800_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_data_bits 8 +#define DT_N_S_soc_S_serial_40004800_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40004800_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_single_wire 0 +#define DT_N_S_soc_S_serial_40004800_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40004800_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_de_enable 0 +#define DT_N_S_soc_S_serial_40004800_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40004800_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40004800_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_de_invert 0 +#define DT_N_S_soc_S_serial_40004800_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40004800_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40004800_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_parity "none" +#define DT_N_S_soc_S_serial_40004800_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40004800_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40004800_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, parity, 0) +#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, parity, 0) +#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40004800_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_status "disabled" +#define DT_N_S_soc_S_serial_40004800_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_serial_40004800_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_serial_40004800_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, status, 0) +#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, status, 0) +#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40004800_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_compatible {"st,stm32-usart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0 "st,stm32-usart" +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, compatible, 0) \ + fn(DT_N_S_soc_S_serial_40004800, compatible, 1) +#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004800, compatible, 1) +#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40004800, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40004800, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40004800_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_40004800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40004800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40004800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40004800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40004800_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40004800_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40004800_P_rx_invert_EXISTS 1 /* - * Devicetree node: /soc/dmamux@40020800 + * Devicetree node: /soc/serial@40005000 * - * Node identifier: DT_N_S_soc_S_dmamux_40020800 + * Node identifier: DT_N_S_soc_S_serial_40005000 * - * Binding (compatible = st,stm32-dmamux): - * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dmamux.yaml + * Binding (compatible = st,stm32-uart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-uart.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_dmamux_40020800_PATH "/soc/dmamux@40020800" +#define DT_N_S_soc_S_serial_40005000_PATH "/soc/serial@40005000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME "dmamux@40020800" -#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME_UNQUOTED dmamux@40020800 -#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME_TOKEN dmamux_40020800 -#define DT_N_S_soc_S_dmamux_40020800_FULL_NAME_UPPER_TOKEN DMAMUX_40020800 +#define DT_N_S_soc_S_serial_40005000_FULL_NAME "serial@40005000" +#define DT_N_S_soc_S_serial_40005000_FULL_NAME_UNQUOTED serial@40005000 +#define DT_N_S_soc_S_serial_40005000_FULL_NAME_TOKEN serial_40005000 +#define DT_N_S_soc_S_serial_40005000_FULL_NAME_UPPER_TOKEN SERIAL_40005000 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_dmamux_40020800_PARENT DT_N_S_soc +#define DT_N_S_soc_S_serial_40005000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_dmamux_40020800_CHILD_IDX 56 +#define DT_N_S_soc_S_serial_40005000_CHILD_IDX 12 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_dmamux_40020800_NODELABEL_NUM 1 -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_NODELABEL(fn) fn(dmamux1) -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_NODELABEL_VARGS(fn, ...) fn(dmamux1, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_serial_40005000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40005000_FOREACH_NODELABEL(fn) fn(uart5) +#define DT_N_S_soc_S_serial_40005000_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart5, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_dmamux_40020800_CHILD_NUM 0 -#define DT_N_S_soc_S_dmamux_40020800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40005000_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40005000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_dmamux_40020800_HASH jGulMrGrDMjffC0jOcX9YAYtoaIaoNYHlAm2EvPJs_w +#define DT_N_S_soc_S_serial_40005000_HASH zMMX5P6gmfqIczU7IzsjM4mPclQdCNjtpO0LqCzLhTI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_dmamux_40020800_ORD 103 -#define DT_N_S_soc_S_dmamux_40020800_ORD_STR_SORTABLE 00103 +#define DT_N_S_soc_S_serial_40005000_ORD 146 +#define DT_N_S_soc_S_serial_40005000_ORD_STR_SORTABLE 00146 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_dmamux_40020800_REQUIRES_ORDS \ +#define DT_N_S_soc_S_serial_40005000_REQUIRES_ORDS \ 3, \ 4, \ - 8, + 8, \ + 51, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_dmamux_40020800_SUPPORTS_ORDS \ - 104, \ - 105, \ - 106, +#define DT_N_S_soc_S_serial_40005000_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_dmamux_40020800_EXISTS 1 -#define DT_N_INST_0_st_stm32_dmamux DT_N_S_soc_S_dmamux_40020800 -#define DT_N_NODELABEL_dmamux1 DT_N_S_soc_S_dmamux_40020800 +#define DT_N_S_soc_S_serial_40005000_EXISTS 1 +#define DT_N_INST_6_st_stm32_uart DT_N_S_soc_S_serial_40005000 +#define DT_N_NODELABEL_uart5 DT_N_S_soc_S_serial_40005000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_dmamux_40020800_REG_NUM 1 -#define DT_N_S_soc_S_dmamux_40020800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_REG_IDX_0_VAL_ADDRESS 1073874944 -#define DT_N_S_soc_S_dmamux_40020800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_dmamux_40020800_RANGES_NUM 0 -#define DT_N_S_soc_S_dmamux_40020800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_dmamux_40020800_IRQ_NUM 1 -#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_irq 102 -#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_dmamux_40020800_IRQ_LEVEL 1 -#define DT_N_S_soc_S_dmamux_40020800_COMPAT_MATCHES_st_stm32_dmamux 1 -#define DT_N_S_soc_S_dmamux_40020800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_dmamux_40020800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_COMPAT_MODEL_IDX_0 "stm32-dmamux" -#define DT_N_S_soc_S_dmamux_40020800_STATUS_disabled 1 +#define DT_N_S_soc_S_serial_40005000_REG_NUM 1 +#define DT_N_S_soc_S_serial_40005000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_REG_IDX_0_VAL_ADDRESS 1073762304 +#define DT_N_S_soc_S_serial_40005000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_serial_40005000_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40005000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40005000_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_VAL_irq 53 +#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40005000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40005000_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40005000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40005000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_COMPAT_MODEL_IDX_0 "stm32-uart" +#define DT_N_S_soc_S_serial_40005000_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_dmamux_40020800_PINCTRL_NUM 0 +#define DT_N_S_soc_S_serial_40005000_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_dmamux_40020800_P_reg {1073874944, 1024} -#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_0 1073874944 -#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_dmamux_40020800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_dma_channels 16 -#define DT_N_S_soc_S_dmamux_40020800_P_dma_channels_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_dma_generators 8 -#define DT_N_S_soc_S_dmamux_40020800_P_dma_generators_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_dma_requests 107 -#define DT_N_S_soc_S_dmamux_40020800_P_dma_requests_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_status "disabled" -#define DT_N_S_soc_S_dmamux_40020800_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_dmamux_40020800_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_dmamux_40020800_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_dmamux_40020800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_40020800, status, 0) -#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, status, 0) -#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_40020800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_40020800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_40020800_P_status_LEN 1 -#define DT_N_S_soc_S_dmamux_40020800_P_status_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_compatible {"st,stm32-dmamux"} -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0 "st,stm32-dmamux" -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dmamux -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_STRING_TOKEN st_stm32_dmamux -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMAMUX -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0) -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0) -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_40020800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_LEN 1 -#define DT_N_S_soc_S_dmamux_40020800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_interrupts {102, 0} -#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_0 102 -#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_dmamux_40020800_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bus 216 -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bits 1 -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0) -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0) -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dmamux_40020800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_LEN 1 -#define DT_N_S_soc_S_dmamux_40020800_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_wakeup_source 0 -#define DT_N_S_soc_S_dmamux_40020800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_dmamux_40020800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_reg {1073762304, 1024} +#define DT_N_S_soc_S_serial_40005000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_reg_IDX_0 1073762304 +#define DT_N_S_soc_S_serial_40005000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40005000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_VAL_bits 1048576 +#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, clocks, 0) +#define DT_N_S_soc_S_serial_40005000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, clocks, 0) +#define DT_N_S_soc_S_serial_40005000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40005000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_40005000_P_resets_IDX_0_VAL_id 4628 +#define DT_N_S_soc_S_serial_40005000_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, resets, 0) +#define DT_N_S_soc_S_serial_40005000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, resets, 0) +#define DT_N_S_soc_S_serial_40005000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40005000_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_interrupts {53, 0} +#define DT_N_S_soc_S_serial_40005000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_interrupts_IDX_0 53 +#define DT_N_S_soc_S_serial_40005000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40005000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40005000_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, stop_bits, 0) +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, stop_bits, 0) +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40005000_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_data_bits 8 +#define DT_N_S_soc_S_serial_40005000_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40005000_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_single_wire 0 +#define DT_N_S_soc_S_serial_40005000_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40005000_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_de_enable 0 +#define DT_N_S_soc_S_serial_40005000_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40005000_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40005000_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_de_invert 0 +#define DT_N_S_soc_S_serial_40005000_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40005000_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40005000_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_parity "none" +#define DT_N_S_soc_S_serial_40005000_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40005000_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40005000_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40005000_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40005000_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40005000_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, parity, 0) +#define DT_N_S_soc_S_serial_40005000_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, parity, 0) +#define DT_N_S_soc_S_serial_40005000_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40005000_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_status "disabled" +#define DT_N_S_soc_S_serial_40005000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_serial_40005000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_serial_40005000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_serial_40005000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_serial_40005000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_serial_40005000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, status, 0) +#define DT_N_S_soc_S_serial_40005000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, status, 0) +#define DT_N_S_soc_S_serial_40005000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40005000_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_compatible {"st,stm32-uart"} +#define DT_N_S_soc_S_serial_40005000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_compatible_IDX_0 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40005000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40005000_P_compatible_IDX_0_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40005000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40005000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, compatible, 0) +#define DT_N_S_soc_S_serial_40005000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, compatible, 0) +#define DT_N_S_soc_S_serial_40005000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40005000_P_compatible_LEN 1 +#define DT_N_S_soc_S_serial_40005000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40005000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40005000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40005000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40005000_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40005000_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40005000_P_rx_invert_EXISTS 1 /* - * Devicetree node: /soc/i2s@40003800 - * - * Node identifier: DT_N_S_soc_S_i2s_40003800 + * Devicetree node: /soc/pin-controller@58020000/uart8_rx_pj9 * - * Binding (compatible = st,stm32h7-i2s): - * $ZEPHYR_BASE/dts/bindings/i2s/st,stm32h7-i2s.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_i2s_40003800_PATH "/soc/i2s@40003800" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_PATH "/soc/pin-controller@58020000/uart8_rx_pj9" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_i2s_40003800_FULL_NAME "i2s@40003800" -#define DT_N_S_soc_S_i2s_40003800_FULL_NAME_UNQUOTED i2s@40003800 -#define DT_N_S_soc_S_i2s_40003800_FULL_NAME_TOKEN i2s_40003800 -#define DT_N_S_soc_S_i2s_40003800_FULL_NAME_UPPER_TOKEN I2S_40003800 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FULL_NAME "uart8_rx_pj9" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FULL_NAME_UNQUOTED uart8_rx_pj9 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FULL_NAME_TOKEN uart8_rx_pj9 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FULL_NAME_UPPER_TOKEN UART8_RX_PJ9 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_i2s_40003800_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_i2s_40003800_CHILD_IDX 29 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_CHILD_IDX 109 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_i2s_40003800_NODELABEL_NUM 1 -#define DT_N_S_soc_S_i2s_40003800_FOREACH_NODELABEL(fn) fn(i2s2) -#define DT_N_S_soc_S_i2s_40003800_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2s2, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_NODELABEL(fn) fn(uart8_rx_pj9) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart8_rx_pj9, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_i2s_40003800_CHILD_NUM 0 -#define DT_N_S_soc_S_i2s_40003800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_i2s_40003800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_i2s_40003800_HASH cv1l7gk621LLT8KlSAOD4ESjUxFIqs_KOzY0gVU3ofE +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_HASH hlIXxX757bfq7rr8_wXbtlMaMqgSQ9fZS_eQnVOxLXE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2s_40003800_ORD 104 -#define DT_N_S_soc_S_i2s_40003800_ORD_STR_SORTABLE 00104 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_ORD 147 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_ORD_STR_SORTABLE 00147 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_i2s_40003800_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 103, +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_i2s_40003800_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_SUPPORTS_ORDS \ + 149, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_i2s_40003800_EXISTS 1 -#define DT_N_INST_1_st_stm32h7_i2s DT_N_S_soc_S_i2s_40003800 -#define DT_N_INST_1_st_stm32_i2s DT_N_S_soc_S_i2s_40003800 -#define DT_N_NODELABEL_i2s2 DT_N_S_soc_S_i2s_40003800 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_EXISTS 1 +#define DT_N_NODELABEL_uart8_rx_pj9 DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_pinmux 4904 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/uart8_tx_pj8 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_PATH "/soc/pin-controller@58020000/uart8_tx_pj8" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FULL_NAME "uart8_tx_pj8" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FULL_NAME_UNQUOTED uart8_tx_pj8 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FULL_NAME_TOKEN uart8_tx_pj8 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FULL_NAME_UPPER_TOKEN UART8_TX_PJ8 + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_CHILD_IDX 114 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_NODELABEL(fn) fn(uart8_tx_pj8) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart8_tx_pj8, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_HASH BO0LRKXIs8N51u90GcdoQpkuAGXhNxF284NOMqIsIdk + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_ORD 148 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_ORD_STR_SORTABLE 00148 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_REQUIRES_ORDS \ + 9, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_SUPPORTS_ORDS \ + 149, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_EXISTS 1 +#define DT_N_NODELABEL_uart8_tx_pj8 DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_i2s_40003800_REG_NUM 1 -#define DT_N_S_soc_S_i2s_40003800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_REG_IDX_0_VAL_ADDRESS 1073756160 -#define DT_N_S_soc_S_i2s_40003800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_i2s_40003800_RANGES_NUM 0 -#define DT_N_S_soc_S_i2s_40003800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_i2s_40003800_IRQ_NUM 1 -#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_VAL_irq 36 -#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_i2s_40003800_IRQ_LEVEL 1 -#define DT_N_S_soc_S_i2s_40003800_COMPAT_MATCHES_st_stm32h7_i2s 1 -#define DT_N_S_soc_S_i2s_40003800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_i2s_40003800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_COMPAT_MODEL_IDX_0 "stm32h7-i2s" -#define DT_N_S_soc_S_i2s_40003800_COMPAT_MATCHES_st_stm32_i2s 1 -#define DT_N_S_soc_S_i2s_40003800_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_i2s_40003800_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_COMPAT_MODEL_IDX_1 "stm32-i2s" -#define DT_N_S_soc_S_i2s_40003800_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_i2s_40003800_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_i2s_40003800_P_reg {1073756160, 1024} -#define DT_N_S_soc_S_i2s_40003800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_reg_IDX_0 1073756160 -#define DT_N_S_soc_S_i2s_40003800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_i2s_40003800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_interrupts {36, 0} -#define DT_N_S_soc_S_i2s_40003800_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_interrupts_IDX_0 36 -#define DT_N_S_soc_S_i2s_40003800_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_i2s_40003800_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel 0 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_slot 40 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel_config 132160 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_NAME "tx" -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_channel DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_slot DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_slot -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_channel_config DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_0_VAL_channel_config -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_tx_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_slot 39 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel_config 132224 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_NAME "rx" -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_channel DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_slot DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_slot -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_channel_config DT_N_S_soc_S_i2s_40003800_P_dmas_IDX_1_VAL_channel_config -#define DT_N_S_soc_S_i2s_40003800_P_dmas_NAME_rx_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003800, dmas, 0) \ - fn(DT_N_S_soc_S_i2s_40003800, dmas, 1) -#define DT_N_S_soc_S_i2s_40003800_P_dmas_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003800, dmas, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003800, dmas, 1) -#define DT_N_S_soc_S_i2s_40003800_P_dmas_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003800, dmas, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40003800, dmas, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_P_dmas_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003800, dmas, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003800, dmas, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_P_dmas_LEN 2 -#define DT_N_S_soc_S_i2s_40003800_P_dmas_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dma_names {"tx", "rx"} -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_0 "tx" -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_0_STRING_UNQUOTED tx -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_0_STRING_TOKEN tx -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_0_STRING_UPPER_TOKEN TX -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_1 "rx" -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_1_STRING_UNQUOTED rx -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_1_STRING_TOKEN rx -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_IDX_1_STRING_UPPER_TOKEN RX -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003800, dma_names, 0) \ - fn(DT_N_S_soc_S_i2s_40003800, dma_names, 1) -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003800, dma_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003800, dma_names, 1) -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003800, dma_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40003800, dma_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003800, dma_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003800, dma_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_LEN 2 -#define DT_N_S_soc_S_i2s_40003800_P_dma_names_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_mck_enabled 0 -#define DT_N_S_soc_S_i2s_40003800_P_mck_enabled_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_status "disabled" -#define DT_N_S_soc_S_i2s_40003800_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_i2s_40003800_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_i2s_40003800_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_i2s_40003800_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_i2s_40003800_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_i2s_40003800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003800, status, 0) -#define DT_N_S_soc_S_i2s_40003800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003800, status, 0) -#define DT_N_S_soc_S_i2s_40003800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_P_status_LEN 1 -#define DT_N_S_soc_S_i2s_40003800_P_status_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_compatible {"st,stm32h7-i2s", "st,stm32-i2s"} -#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_0 "st,stm32h7-i2s" -#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-i2s -#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_i2s -#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_I2S -#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_1 "st,stm32-i2s" -#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-i2s -#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_1_STRING_TOKEN st_stm32_i2s -#define DT_N_S_soc_S_i2s_40003800_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_I2S -#define DT_N_S_soc_S_i2s_40003800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003800, compatible, 0) \ - fn(DT_N_S_soc_S_i2s_40003800, compatible, 1) -#define DT_N_S_soc_S_i2s_40003800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003800, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003800, compatible, 1) -#define DT_N_S_soc_S_i2s_40003800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003800, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40003800, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003800, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003800, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_P_compatible_LEN 2 -#define DT_N_S_soc_S_i2s_40003800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_VAL_bits 16384 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_VAL_bus 9 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_VAL_bits 30146640 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003800, clocks, 0) \ - fn(DT_N_S_soc_S_i2s_40003800, clocks, 1) -#define DT_N_S_soc_S_i2s_40003800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003800, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003800, clocks, 1) -#define DT_N_S_soc_S_i2s_40003800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003800, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40003800, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003800, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003800, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003800_P_clocks_LEN 2 -#define DT_N_S_soc_S_i2s_40003800_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_i2s_40003800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_wakeup_source 0 -#define DT_N_S_soc_S_i2s_40003800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_i2s_40003800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_pinmux 4872 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_STRING_UNQUOTED low-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_STRING_TOKEN low_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_IDX_0 "low-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/i2s@40003c00 + * Devicetree node: /soc/serial@40007c00 * - * Node identifier: DT_N_S_soc_S_i2s_40003c00 + * Node identifier: DT_N_S_soc_S_serial_40007c00 * - * Binding (compatible = st,stm32h7-i2s): - * $ZEPHYR_BASE/dts/bindings/i2s/st,stm32h7-i2s.yaml + * Binding (compatible = st,stm32-uart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-uart.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_i2s_40003c00_PATH "/soc/i2s@40003c00" +#define DT_N_S_soc_S_serial_40007c00_PATH "/soc/serial@40007c00" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_i2s_40003c00_FULL_NAME "i2s@40003c00" -#define DT_N_S_soc_S_i2s_40003c00_FULL_NAME_UNQUOTED i2s@40003c00 -#define DT_N_S_soc_S_i2s_40003c00_FULL_NAME_TOKEN i2s_40003c00 -#define DT_N_S_soc_S_i2s_40003c00_FULL_NAME_UPPER_TOKEN I2S_40003C00 +#define DT_N_S_soc_S_serial_40007c00_FULL_NAME "serial@40007c00" +#define DT_N_S_soc_S_serial_40007c00_FULL_NAME_UNQUOTED serial@40007c00 +#define DT_N_S_soc_S_serial_40007c00_FULL_NAME_TOKEN serial_40007c00 +#define DT_N_S_soc_S_serial_40007c00_FULL_NAME_UPPER_TOKEN SERIAL_40007C00 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_i2s_40003c00_PARENT DT_N_S_soc +#define DT_N_S_soc_S_serial_40007c00_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_i2s_40003c00_CHILD_IDX 30 +#define DT_N_S_soc_S_serial_40007c00_CHILD_IDX 15 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_i2s_40003c00_NODELABEL_NUM 1 -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_NODELABEL(fn) fn(i2s3) -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2s3, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_serial_40007c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_40007c00_FOREACH_NODELABEL(fn) fn(uart8) +#define DT_N_S_soc_S_serial_40007c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart8, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_i2s_40003c00_CHILD_NUM 0 -#define DT_N_S_soc_S_i2s_40003c00_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40007c00_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_40007c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_i2s_40003c00_HASH cqu_NshQmISUpdQ_NZoLP2K_y7VkySXvopc7dRz2dUs +#define DT_N_S_soc_S_serial_40007c00_HASH X_JkTKIJdI0eAWONgmNDDiIT_A1U0dqJMPoCmX7VfRo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2s_40003c00_ORD 105 -#define DT_N_S_soc_S_i2s_40003c00_ORD_STR_SORTABLE 00105 +#define DT_N_S_soc_S_serial_40007c00_ORD 149 +#define DT_N_S_soc_S_serial_40007c00_ORD_STR_SORTABLE 00149 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_i2s_40003c00_REQUIRES_ORDS \ +#define DT_N_S_soc_S_serial_40007c00_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 103, + 51, \ + 147, \ + 148, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_i2s_40003c00_SUPPORTS_ORDS +#define DT_N_S_soc_S_serial_40007c00_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_i2s_40003c00_EXISTS 1 -#define DT_N_INST_2_st_stm32h7_i2s DT_N_S_soc_S_i2s_40003c00 -#define DT_N_INST_2_st_stm32_i2s DT_N_S_soc_S_i2s_40003c00 -#define DT_N_NODELABEL_i2s3 DT_N_S_soc_S_i2s_40003c00 +#define DT_N_S_soc_S_serial_40007c00_EXISTS 1 +#define DT_N_INST_7_st_stm32_uart DT_N_S_soc_S_serial_40007c00 +#define DT_N_NODELABEL_uart8 DT_N_S_soc_S_serial_40007c00 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_i2s_40003c00_REG_NUM 1 -#define DT_N_S_soc_S_i2s_40003c00_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_REG_IDX_0_VAL_ADDRESS 1073757184 -#define DT_N_S_soc_S_i2s_40003c00_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_i2s_40003c00_RANGES_NUM 0 -#define DT_N_S_soc_S_i2s_40003c00_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_i2s_40003c00_IRQ_NUM 1 -#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_VAL_irq 51 -#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_i2s_40003c00_IRQ_LEVEL 1 -#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MATCHES_st_stm32h7_i2s 1 -#define DT_N_S_soc_S_i2s_40003c00_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MODEL_IDX_0 "stm32h7-i2s" -#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MATCHES_st_stm32_i2s 1 -#define DT_N_S_soc_S_i2s_40003c00_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_COMPAT_MODEL_IDX_1 "stm32-i2s" -#define DT_N_S_soc_S_i2s_40003c00_STATUS_disabled 1 +#define DT_N_S_soc_S_serial_40007c00_REG_NUM 1 +#define DT_N_S_soc_S_serial_40007c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_REG_IDX_0_VAL_ADDRESS 1073773568 +#define DT_N_S_soc_S_serial_40007c00_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_serial_40007c00_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_40007c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_40007c00_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_VAL_irq 83 +#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_40007c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_40007c00_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_40007c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_40007c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_COMPAT_MODEL_IDX_0 "stm32-uart" +#define DT_N_S_soc_S_serial_40007c00_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_i2s_40003c00_PINCTRL_NUM 0 +#define DT_N_S_soc_S_serial_40007c00_PINCTRL_NUM 1 +#define DT_N_S_soc_S_serial_40007c00_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_serial_40007c00_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40007c00_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_serial_40007c00_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8 +#define DT_N_S_soc_S_serial_40007c00_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9 /* Generic property macros: */ -#define DT_N_S_soc_S_i2s_40003c00_P_reg {1073757184, 1024} -#define DT_N_S_soc_S_i2s_40003c00_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_reg_IDX_0 1073757184 -#define DT_N_S_soc_S_i2s_40003c00_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_i2s_40003c00_P_reg_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_interrupts {51, 0} -#define DT_N_S_soc_S_i2s_40003c00_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_interrupts_IDX_0 51 -#define DT_N_S_soc_S_i2s_40003c00_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_i2s_40003c00_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel 0 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_slot 62 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel_config 132160 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_NAME "tx" -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_channel DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_slot DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_slot -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_channel_config DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_0_VAL_channel_config -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_tx_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_slot 61 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel_config 132224 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_NAME "rx" -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_channel DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_slot DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_slot -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_channel_config DT_N_S_soc_S_i2s_40003c00_P_dmas_IDX_1_VAL_channel_config -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_NAME_rx_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003c00, dmas, 0) \ - fn(DT_N_S_soc_S_i2s_40003c00, dmas, 1) -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003c00, dmas, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003c00, dmas, 1) -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003c00, dmas, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40003c00, dmas, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003c00, dmas, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003c00, dmas, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_LEN 2 -#define DT_N_S_soc_S_i2s_40003c00_P_dmas_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names {"tx", "rx"} -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_0 "tx" -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_0_STRING_UNQUOTED tx -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_0_STRING_TOKEN tx -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_0_STRING_UPPER_TOKEN TX -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_1 "rx" -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_1_STRING_UNQUOTED rx -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_1_STRING_TOKEN rx -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_IDX_1_STRING_UPPER_TOKEN RX -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 0) \ - fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 1) -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 1) -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003c00, dma_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_LEN 2 -#define DT_N_S_soc_S_i2s_40003c00_P_dma_names_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_mck_enabled 0 -#define DT_N_S_soc_S_i2s_40003c00_P_mck_enabled_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_status "disabled" -#define DT_N_S_soc_S_i2s_40003c00_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_i2s_40003c00_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_i2s_40003c00_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_i2s_40003c00_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_i2s_40003c00_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_i2s_40003c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003c00, status, 0) -#define DT_N_S_soc_S_i2s_40003c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003c00, status, 0) -#define DT_N_S_soc_S_i2s_40003c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_P_status_LEN 1 -#define DT_N_S_soc_S_i2s_40003c00_P_status_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_compatible {"st,stm32h7-i2s", "st,stm32-i2s"} -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_0 "st,stm32h7-i2s" -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-i2s -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_i2s -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_I2S -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_1 "st,stm32-i2s" -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-i2s -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_1_STRING_TOKEN st_stm32_i2s -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_I2S -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003c00, compatible, 0) \ - fn(DT_N_S_soc_S_i2s_40003c00, compatible, 1) -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003c00, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003c00, compatible, 1) -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003c00, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40003c00, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003c00, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003c00, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_LEN 2 -#define DT_N_S_soc_S_i2s_40003c00_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_VAL_bits 32768 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_VAL_bus 9 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_VAL_bits 30146640 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40003c00, clocks, 0) \ - fn(DT_N_S_soc_S_i2s_40003c00, clocks, 1) -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40003c00, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003c00, clocks, 1) -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40003c00, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40003c00, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40003c00, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40003c00, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_LEN 2 -#define DT_N_S_soc_S_i2s_40003c00_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_i2s_40003c00_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_wakeup_source 0 -#define DT_N_S_soc_S_i2s_40003c00_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_i2s_40003c00_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_i2s_40003c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_reg {1073773568, 1024} +#define DT_N_S_soc_S_serial_40007c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_reg_IDX_0 1073773568 +#define DT_N_S_soc_S_serial_40007c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_40007c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_VAL_bits 2147483648 +#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, clocks, 0) +#define DT_N_S_soc_S_serial_40007c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, clocks, 0) +#define DT_N_S_soc_S_serial_40007c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_40007c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_40007c00_P_resets_IDX_0_VAL_id 4639 +#define DT_N_S_soc_S_serial_40007c00_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, resets, 0) +#define DT_N_S_soc_S_serial_40007c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, resets, 0) +#define DT_N_S_soc_S_serial_40007c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_40007c00_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_interrupts {83, 0} +#define DT_N_S_soc_S_serial_40007c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_interrupts_IDX_0 83 +#define DT_N_S_soc_S_serial_40007c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_40007c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_current_speed 115200 +#define DT_N_S_soc_S_serial_40007c00_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits "1" +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, stop_bits, 0) +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, stop_bits, 0) +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_data_bits 8 +#define DT_N_S_soc_S_serial_40007c00_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_40007c00_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_single_wire 0 +#define DT_N_S_soc_S_serial_40007c00_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_40007c00_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 1) +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_LEN 2 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_names, 0) +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_de_enable 0 +#define DT_N_S_soc_S_serial_40007c00_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_40007c00_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_40007c00_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_de_invert 0 +#define DT_N_S_soc_S_serial_40007c00_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_40007c00_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_40007c00_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_parity "none" +#define DT_N_S_soc_S_serial_40007c00_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_40007c00_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_40007c00_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_40007c00_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_40007c00_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_40007c00_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, parity, 0) +#define DT_N_S_soc_S_serial_40007c00_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, parity, 0) +#define DT_N_S_soc_S_serial_40007c00_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_40007c00_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_status "disabled" +#define DT_N_S_soc_S_serial_40007c00_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_serial_40007c00_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_serial_40007c00_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_serial_40007c00_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_serial_40007c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_serial_40007c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, status, 0) +#define DT_N_S_soc_S_serial_40007c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, status, 0) +#define DT_N_S_soc_S_serial_40007c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_status_LEN 1 +#define DT_N_S_soc_S_serial_40007c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_compatible {"st,stm32-uart"} +#define DT_N_S_soc_S_serial_40007c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_compatible_IDX_0 "st,stm32-uart" +#define DT_N_S_soc_S_serial_40007c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_40007c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_40007c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_40007c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, compatible, 0) +#define DT_N_S_soc_S_serial_40007c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, compatible, 0) +#define DT_N_S_soc_S_serial_40007c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_40007c00_P_compatible_LEN 1 +#define DT_N_S_soc_S_serial_40007c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_40007c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_40007c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_40007c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_tx_invert 0 +#define DT_N_S_soc_S_serial_40007c00_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_40007c00_P_rx_invert 0 +#define DT_N_S_soc_S_serial_40007c00_P_rx_invert_EXISTS 1 /* - * Devicetree node: /soc/i2s@40013000 + * Devicetree node: /soc/serial@58000c00 * - * Node identifier: DT_N_S_soc_S_i2s_40013000 + * Node identifier: DT_N_S_soc_S_serial_58000c00 * - * Binding (compatible = st,stm32h7-i2s): - * $ZEPHYR_BASE/dts/bindings/i2s/st,stm32h7-i2s.yaml + * Binding (compatible = st,stm32-lpuart): + * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-lpuart.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_i2s_40013000_PATH "/soc/i2s@40013000" +#define DT_N_S_soc_S_serial_58000c00_PATH "/soc/serial@58000c00" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_i2s_40013000_FULL_NAME "i2s@40013000" -#define DT_N_S_soc_S_i2s_40013000_FULL_NAME_UNQUOTED i2s@40013000 -#define DT_N_S_soc_S_i2s_40013000_FULL_NAME_TOKEN i2s_40013000 -#define DT_N_S_soc_S_i2s_40013000_FULL_NAME_UPPER_TOKEN I2S_40013000 +#define DT_N_S_soc_S_serial_58000c00_FULL_NAME "serial@58000c00" +#define DT_N_S_soc_S_serial_58000c00_FULL_NAME_UNQUOTED serial@58000c00 +#define DT_N_S_soc_S_serial_58000c00_FULL_NAME_TOKEN serial_58000c00 +#define DT_N_S_soc_S_serial_58000c00_FULL_NAME_UPPER_TOKEN SERIAL_58000C00 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_i2s_40013000_PARENT DT_N_S_soc +#define DT_N_S_soc_S_serial_58000c00_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_i2s_40013000_CHILD_IDX 28 +#define DT_N_S_soc_S_serial_58000c00_CHILD_IDX 16 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_i2s_40013000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_i2s_40013000_FOREACH_NODELABEL(fn) fn(i2s1) -#define DT_N_S_soc_S_i2s_40013000_FOREACH_NODELABEL_VARGS(fn, ...) fn(i2s1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_serial_58000c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_serial_58000c00_FOREACH_NODELABEL(fn) fn(lpuart1) +#define DT_N_S_soc_S_serial_58000c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(lpuart1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_i2s_40013000_CHILD_NUM 0 -#define DT_N_S_soc_S_i2s_40013000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_i2s_40013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_58000c00_CHILD_NUM 0 +#define DT_N_S_soc_S_serial_58000c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_i2s_40013000_HASH AR40g4B08gpzWiZgw_CMbPN4L_FZHfvTMNyO8ZIF16c +#define DT_N_S_soc_S_serial_58000c00_HASH ISescP3TKthYjEyAx79J9A1f_7TwIXBCVXALkWoe12E /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2s_40013000_ORD 106 -#define DT_N_S_soc_S_i2s_40013000_ORD_STR_SORTABLE 00106 +#define DT_N_S_soc_S_serial_58000c00_ORD 150 +#define DT_N_S_soc_S_serial_58000c00_ORD_STR_SORTABLE 00150 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_i2s_40013000_REQUIRES_ORDS \ +#define DT_N_S_soc_S_serial_58000c00_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 103, + 51, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_i2s_40013000_SUPPORTS_ORDS +#define DT_N_S_soc_S_serial_58000c00_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_i2s_40013000_EXISTS 1 -#define DT_N_INST_0_st_stm32h7_i2s DT_N_S_soc_S_i2s_40013000 -#define DT_N_INST_0_st_stm32_i2s DT_N_S_soc_S_i2s_40013000 -#define DT_N_NODELABEL_i2s1 DT_N_S_soc_S_i2s_40013000 +#define DT_N_S_soc_S_serial_58000c00_EXISTS 1 +#define DT_N_INST_0_st_stm32_lpuart DT_N_S_soc_S_serial_58000c00 +#define DT_N_INST_8_st_stm32_uart DT_N_S_soc_S_serial_58000c00 +#define DT_N_NODELABEL_lpuart1 DT_N_S_soc_S_serial_58000c00 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_i2s_40013000_REG_NUM 1 -#define DT_N_S_soc_S_i2s_40013000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_REG_IDX_0_VAL_ADDRESS 1073819648 -#define DT_N_S_soc_S_i2s_40013000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_i2s_40013000_RANGES_NUM 0 -#define DT_N_S_soc_S_i2s_40013000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_i2s_40013000_IRQ_NUM 1 -#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_VAL_irq 35 -#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_VAL_priority 3 -#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_i2s_40013000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_i2s_40013000_COMPAT_MATCHES_st_stm32h7_i2s 1 -#define DT_N_S_soc_S_i2s_40013000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_i2s_40013000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_COMPAT_MODEL_IDX_0 "stm32h7-i2s" -#define DT_N_S_soc_S_i2s_40013000_COMPAT_MATCHES_st_stm32_i2s 1 -#define DT_N_S_soc_S_i2s_40013000_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_i2s_40013000_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_COMPAT_MODEL_IDX_1 "stm32-i2s" -#define DT_N_S_soc_S_i2s_40013000_STATUS_disabled 1 +#define DT_N_S_soc_S_serial_58000c00_REG_NUM 1 +#define DT_N_S_soc_S_serial_58000c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_REG_IDX_0_VAL_ADDRESS 1476398080 +#define DT_N_S_soc_S_serial_58000c00_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_serial_58000c00_RANGES_NUM 0 +#define DT_N_S_soc_S_serial_58000c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_serial_58000c00_IRQ_NUM 1 +#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_VAL_irq 142 +#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_serial_58000c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_serial_58000c00_COMPAT_MATCHES_st_stm32_lpuart 1 +#define DT_N_S_soc_S_serial_58000c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_serial_58000c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_COMPAT_MODEL_IDX_0 "stm32-lpuart" +#define DT_N_S_soc_S_serial_58000c00_COMPAT_MATCHES_st_stm32_uart 1 +#define DT_N_S_soc_S_serial_58000c00_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_serial_58000c00_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_COMPAT_MODEL_IDX_1 "stm32-uart" +#define DT_N_S_soc_S_serial_58000c00_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_i2s_40013000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_serial_58000c00_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_i2s_40013000_P_reg {1073819648, 1024} -#define DT_N_S_soc_S_i2s_40013000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_reg_IDX_0 1073819648 -#define DT_N_S_soc_S_i2s_40013000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_i2s_40013000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_interrupts {35, 3} -#define DT_N_S_soc_S_i2s_40013000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_interrupts_IDX_0 35 -#define DT_N_S_soc_S_i2s_40013000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_interrupts_IDX_1 3 -#define DT_N_S_soc_S_i2s_40013000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel 0 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_slot 38 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel_config 132160 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_NAME "tx" -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_channel DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_slot DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_slot -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_channel_config DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_0_VAL_channel_config -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_tx_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_slot 37 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel_config 132224 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_NAME "rx" -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_PH DT_N_S_soc_S_dmamux_40020800 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_channel DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_channel_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_slot DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_slot -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_slot_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_channel_config DT_N_S_soc_S_i2s_40013000_P_dmas_IDX_1_VAL_channel_config -#define DT_N_S_soc_S_i2s_40013000_P_dmas_NAME_rx_VAL_channel_config_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40013000, dmas, 0) \ - fn(DT_N_S_soc_S_i2s_40013000, dmas, 1) -#define DT_N_S_soc_S_i2s_40013000_P_dmas_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40013000, dmas, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40013000, dmas, 1) -#define DT_N_S_soc_S_i2s_40013000_P_dmas_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40013000, dmas, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40013000, dmas, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_P_dmas_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40013000, dmas, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40013000, dmas, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_P_dmas_LEN 2 -#define DT_N_S_soc_S_i2s_40013000_P_dmas_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dma_names {"tx", "rx"} -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_0 "tx" -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_0_STRING_UNQUOTED tx -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_0_STRING_TOKEN tx -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_0_STRING_UPPER_TOKEN TX -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_1 "rx" -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_1_STRING_UNQUOTED rx -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_1_STRING_TOKEN rx -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_IDX_1_STRING_UPPER_TOKEN RX -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40013000, dma_names, 0) \ - fn(DT_N_S_soc_S_i2s_40013000, dma_names, 1) -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40013000, dma_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40013000, dma_names, 1) -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40013000, dma_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40013000, dma_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40013000, dma_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40013000, dma_names, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_LEN 2 -#define DT_N_S_soc_S_i2s_40013000_P_dma_names_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_mck_enabled 0 -#define DT_N_S_soc_S_i2s_40013000_P_mck_enabled_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_status "disabled" -#define DT_N_S_soc_S_i2s_40013000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_i2s_40013000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_i2s_40013000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_i2s_40013000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_i2s_40013000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_i2s_40013000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40013000, status, 0) -#define DT_N_S_soc_S_i2s_40013000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40013000, status, 0) -#define DT_N_S_soc_S_i2s_40013000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40013000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40013000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_P_status_LEN 1 -#define DT_N_S_soc_S_i2s_40013000_P_status_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_compatible {"st,stm32h7-i2s", "st,stm32-i2s"} -#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_0 "st,stm32h7-i2s" -#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-i2s -#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_i2s -#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_I2S -#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_1 "st,stm32-i2s" -#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-i2s -#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_1_STRING_TOKEN st_stm32_i2s -#define DT_N_S_soc_S_i2s_40013000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_I2S -#define DT_N_S_soc_S_i2s_40013000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40013000, compatible, 0) \ - fn(DT_N_S_soc_S_i2s_40013000, compatible, 1) -#define DT_N_S_soc_S_i2s_40013000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40013000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40013000, compatible, 1) -#define DT_N_S_soc_S_i2s_40013000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40013000, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40013000, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40013000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40013000, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_P_compatible_LEN 2 -#define DT_N_S_soc_S_i2s_40013000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_VAL_bus 240 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_VAL_bits 4096 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_VAL_bus 9 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_VAL_bits 30146640 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2s_40013000, clocks, 0) \ - fn(DT_N_S_soc_S_i2s_40013000, clocks, 1) -#define DT_N_S_soc_S_i2s_40013000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2s_40013000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40013000, clocks, 1) -#define DT_N_S_soc_S_i2s_40013000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2s_40013000, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_i2s_40013000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2s_40013000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_i2s_40013000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_i2s_40013000_P_clocks_LEN 2 -#define DT_N_S_soc_S_i2s_40013000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_i2s_40013000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_wakeup_source 0 -#define DT_N_S_soc_S_i2s_40013000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_i2s_40013000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_i2s_40013000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_reg {1476398080, 1024} +#define DT_N_S_soc_S_serial_58000c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_reg_IDX_0 1476398080 +#define DT_N_S_soc_S_serial_58000c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_serial_58000c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_VAL_bus 244 +#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_VAL_bits 8 +#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, clocks, 0) +#define DT_N_S_soc_S_serial_58000c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, clocks, 0) +#define DT_N_S_soc_S_serial_58000c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_clocks_LEN 1 +#define DT_N_S_soc_S_serial_58000c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_resets_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller +#define DT_N_S_soc_S_serial_58000c00_P_resets_IDX_0_VAL_id 4995 +#define DT_N_S_soc_S_serial_58000c00_P_resets_IDX_0_VAL_id_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, resets, 0) +#define DT_N_S_soc_S_serial_58000c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, resets, 0) +#define DT_N_S_soc_S_serial_58000c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, resets, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_resets_LEN 1 +#define DT_N_S_soc_S_serial_58000c00_P_resets_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_interrupts {142, 0} +#define DT_N_S_soc_S_serial_58000c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_interrupts_IDX_0 142 +#define DT_N_S_soc_S_serial_58000c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_serial_58000c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_current_speed 115200 +#define DT_N_S_soc_S_serial_58000c00_P_current_speed_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits "1" +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_STRING_UNQUOTED 1 +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_STRING_TOKEN 1 +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_STRING_UPPER_TOKEN 1 +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_IDX_0 "1" +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, stop_bits, 0) +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, stop_bits, 0) +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, stop_bits, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_LEN 1 +#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_data_bits 8 +#define DT_N_S_soc_S_serial_58000c00_P_data_bits_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_serial_58000c00_P_data_bits_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_data_bits_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_single_wire 0 +#define DT_N_S_soc_S_serial_58000c00_P_single_wire_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_tx_rx_swap 0 +#define DT_N_S_soc_S_serial_58000c00_P_tx_rx_swap_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_de_enable 0 +#define DT_N_S_soc_S_serial_58000c00_P_de_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_de_assert_time 0 +#define DT_N_S_soc_S_serial_58000c00_P_de_assert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_de_deassert_time 0 +#define DT_N_S_soc_S_serial_58000c00_P_de_deassert_time_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_de_invert 0 +#define DT_N_S_soc_S_serial_58000c00_P_de_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_fifo_enable 0 +#define DT_N_S_soc_S_serial_58000c00_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_hw_flow_control 0 +#define DT_N_S_soc_S_serial_58000c00_P_hw_flow_control_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_parity "none" +#define DT_N_S_soc_S_serial_58000c00_P_parity_STRING_UNQUOTED none +#define DT_N_S_soc_S_serial_58000c00_P_parity_STRING_TOKEN none +#define DT_N_S_soc_S_serial_58000c00_P_parity_STRING_UPPER_TOKEN NONE +#define DT_N_S_soc_S_serial_58000c00_P_parity_IDX_0 "none" +#define DT_N_S_soc_S_serial_58000c00_P_parity_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_parity_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_serial_58000c00_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, parity, 0) +#define DT_N_S_soc_S_serial_58000c00_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, parity, 0) +#define DT_N_S_soc_S_serial_58000c00_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, parity, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_parity_LEN 1 +#define DT_N_S_soc_S_serial_58000c00_P_parity_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_status "disabled" +#define DT_N_S_soc_S_serial_58000c00_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_serial_58000c00_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_serial_58000c00_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_serial_58000c00_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_serial_58000c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_serial_58000c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, status, 0) +#define DT_N_S_soc_S_serial_58000c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, status, 0) +#define DT_N_S_soc_S_serial_58000c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_status_LEN 1 +#define DT_N_S_soc_S_serial_58000c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_compatible {"st,stm32-lpuart", "st,stm32-uart"} +#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_0 "st,stm32-lpuart" +#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-lpuart +#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_lpuart +#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LPUART +#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_1 "st,stm32-uart" +#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart +#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart +#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART +#define DT_N_S_soc_S_serial_58000c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, compatible, 0) \ + fn(DT_N_S_soc_S_serial_58000c00, compatible, 1) +#define DT_N_S_soc_S_serial_58000c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_58000c00, compatible, 1) +#define DT_N_S_soc_S_serial_58000c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_serial_58000c00, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_serial_58000c00, compatible, 1, __VA_ARGS__) +#define DT_N_S_soc_S_serial_58000c00_P_compatible_LEN 2 +#define DT_N_S_soc_S_serial_58000c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_serial_58000c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_wakeup_source 0 +#define DT_N_S_soc_S_serial_58000c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_serial_58000c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_tx_invert 0 +#define DT_N_S_soc_S_serial_58000c00_P_tx_invert_EXISTS 1 +#define DT_N_S_soc_S_serial_58000c00_P_rx_invert 0 +#define DT_N_S_soc_S_serial_58000c00_P_rx_invert_EXISTS 1 /* - * Devicetree node: /soc/interrupt-controller@58000000 + * Devicetree node: /soc/spi@40003c00 * - * Node identifier: DT_N_S_soc_S_interrupt_controller_58000000 + * Node identifier: DT_N_S_soc_S_spi_40003c00 * - * Binding (compatible = st,stm32-exti): - * $ZEPHYR_BASE/dts/bindings/interrupt-controller/st,stm32-exti.yaml + * Binding (compatible = st,stm32h7-spi): + * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_PATH "/soc/interrupt-controller@58000000" +#define DT_N_S_soc_S_spi_40003c00_PATH "/soc/spi@40003c00" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_FULL_NAME "interrupt-controller@58000000" -#define DT_N_S_soc_S_interrupt_controller_58000000_FULL_NAME_UNQUOTED interrupt-controller@58000000 -#define DT_N_S_soc_S_interrupt_controller_58000000_FULL_NAME_TOKEN interrupt_controller_58000000 -#define DT_N_S_soc_S_interrupt_controller_58000000_FULL_NAME_UPPER_TOKEN INTERRUPT_CONTROLLER_58000000 +#define DT_N_S_soc_S_spi_40003c00_FULL_NAME "spi@40003c00" +#define DT_N_S_soc_S_spi_40003c00_FULL_NAME_UNQUOTED spi@40003c00 +#define DT_N_S_soc_S_spi_40003c00_FULL_NAME_TOKEN spi_40003c00 +#define DT_N_S_soc_S_spi_40003c00_FULL_NAME_UPPER_TOKEN SPI_40003C00 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_PARENT DT_N_S_soc +#define DT_N_S_soc_S_spi_40003c00_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_CHILD_IDX 4 +#define DT_N_S_soc_S_spi_40003c00_CHILD_IDX 24 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_NODELABEL(fn) fn(exti) -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_NODELABEL_VARGS(fn, ...) fn(exti, __VA_ARGS__) -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_spi_40003c00_NODELABEL_NUM 1 +#define DT_N_S_soc_S_spi_40003c00_FOREACH_NODELABEL(fn) fn(spi3) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi3, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_interrupt_controller_58000000_CHILD_NUM 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40003c00_CHILD_NUM 0 +#define DT_N_S_soc_S_spi_40003c00_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_HASH uKGVm3rbaNzVd0m0zI0AR1_ddgP1_VnC7GQGtMH0Ldw +#define DT_N_S_soc_S_spi_40003c00_HASH 2ZRlHGHWIr4tSgRVkDzDHSiC22m9C4PVNAuFo8LU_0A /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_ORD 107 -#define DT_N_S_soc_S_interrupt_controller_58000000_ORD_STR_SORTABLE 00107 +#define DT_N_S_soc_S_spi_40003c00_ORD 151 +#define DT_N_S_soc_S_spi_40003c00_ORD_STR_SORTABLE 00151 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_REQUIRES_ORDS \ +#define DT_N_S_soc_S_spi_40003c00_REQUIRES_ORDS \ 3, \ - 4, + 4, \ + 8, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_SUPPORTS_ORDS +#define DT_N_S_soc_S_spi_40003c00_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_EXISTS 1 -#define DT_N_INST_0_st_stm32_exti DT_N_S_soc_S_interrupt_controller_58000000 -#define DT_N_NODELABEL_exti DT_N_S_soc_S_interrupt_controller_58000000 +#define DT_N_S_soc_S_spi_40003c00_EXISTS 1 +#define DT_N_INST_2_st_stm32h7_spi DT_N_S_soc_S_spi_40003c00 +#define DT_N_INST_2_st_stm32_spi_fifo DT_N_S_soc_S_spi_40003c00 +#define DT_N_INST_2_st_stm32_spi DT_N_S_soc_S_spi_40003c00 +#define DT_N_NODELABEL_spi3 DT_N_S_soc_S_spi_40003c00 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_REG_NUM 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_REG_IDX_0_VAL_ADDRESS 1476395008 -#define DT_N_S_soc_S_interrupt_controller_58000000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_interrupt_controller_58000000_RANGES_NUM 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NUM 7 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_irq 6 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_irq 7 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_irq 8 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_priority 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_irq 9 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_priority 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_irq 10 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_priority 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_irq 23 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_priority 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_irq 40 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_priority 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line0_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line0_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line0_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line1_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_irq -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line1_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_VAL_priority -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line1_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_1_CONTROLLER -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line2_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_irq -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line2_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_VAL_priority -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line2_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_2_CONTROLLER -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line3_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_irq -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line3_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line3_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_VAL_priority -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line3_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line3_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_3_CONTROLLER -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line4_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_irq -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line4_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line4_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_VAL_priority -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line4_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line4_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_4_CONTROLLER -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line5_9_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_irq -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line5_9_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line5_9_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_VAL_priority -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line5_9_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line5_9_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_5_CONTROLLER -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line10_15_VAL_irq DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_irq -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line10_15_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line10_15_VAL_priority DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_VAL_priority -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line10_15_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_IRQ_NAME_line10_15_CONTROLLER DT_N_S_soc_S_interrupt_controller_58000000_IRQ_IDX_6_CONTROLLER -#define DT_N_S_soc_S_interrupt_controller_58000000_COMPAT_MATCHES_st_stm32_exti 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_interrupt_controller_58000000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_COMPAT_MODEL_IDX_0 "stm32-exti" -#define DT_N_S_soc_S_interrupt_controller_58000000_STATUS_okay 1 +#define DT_N_S_soc_S_spi_40003c00_REG_NUM 1 +#define DT_N_S_soc_S_spi_40003c00_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_REG_IDX_0_VAL_ADDRESS 1073757184 +#define DT_N_S_soc_S_spi_40003c00_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_spi_40003c00_RANGES_NUM 0 +#define DT_N_S_soc_S_spi_40003c00_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_spi_40003c00_IRQ_NUM 1 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_irq 51 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_spi_40003c00_IRQ_LEVEL 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MATCHES_st_stm32h7_spi 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_0 "stm32h7-spi" +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MATCHES_st_stm32_spi_fifo 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MATCHES_st_stm32_spi 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_2 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_2 "stm32-spi" +#define DT_N_S_soc_S_spi_40003c00_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_spi_40003c00_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg {1476395008, 1024} -#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg_IDX_0 1476395008 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts {6, 0, 7, 0, 8, 0, 9, 0, 10, 0, 23, 0, 40, 0} -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_0 6 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_2 7 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_4 8 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_5 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_6 9 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_7 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_8_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_8 10 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_9_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_9 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_10_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_10 23 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_11_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_11 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_12_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_12 40 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_13_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_IDX_13 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names {"line0", "line1", "line2", "line3", "line4", "line5-9", "line10-15"} -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_0 "line0" -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_0_STRING_UNQUOTED line0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_0_STRING_TOKEN line0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN LINE0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_1 "line1" -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_1_STRING_UNQUOTED line1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_1_STRING_TOKEN line1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN LINE1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_2 "line2" -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_2_STRING_UNQUOTED line2 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_2_STRING_TOKEN line2 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN LINE2 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_3 "line3" -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_3_STRING_UNQUOTED line3 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_3_STRING_TOKEN line3 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN LINE3 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_4 "line4" -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_4_STRING_UNQUOTED line4 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_4_STRING_TOKEN line4 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_4_STRING_UPPER_TOKEN LINE4 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_5 "line5-9" -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_5_STRING_UNQUOTED line5-9 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_5_STRING_TOKEN line5_9 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_5_STRING_UPPER_TOKEN LINE5_9 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_6 "line10-15" -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_6_STRING_UNQUOTED line10-15 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_6_STRING_TOKEN line10_15 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_IDX_6_STRING_UPPER_TOKEN LINE10_15 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 0) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 1) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 2) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 3) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 4) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 5) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 6) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 6) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 6, __VA_ARGS__) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, interrupt_names, 6, __VA_ARGS__) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_LEN 7 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_num_lines 16 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_num_lines_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges {0, 1, 1, 1, 2, 1, 3, 1, 4, 1, 5, 5, 10, 6} -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_0 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_1 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_2 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_3 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_4 2 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_5 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_6 3 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_7 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_8_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_8 4 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_9_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_9 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_10_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_10 5 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_11_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_11 5 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_12_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_12 10 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_13_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_IDX_13 6 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 0) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 1) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 2) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 3) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 4) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 5) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 6) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 7) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 8) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 9) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 10) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 11) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 12) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 13) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 6) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 7) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 8) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 9) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 10) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 11) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 12) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 13) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 6, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 7, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 8, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 9, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 10, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 11, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 12, __VA_ARGS__) \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 13, __VA_ARGS__) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_interrupt_controller_58000000, line_ranges, 13, __VA_ARGS__) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_LEN 14 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_line_ranges_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible {"st,stm32-exti"} -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_IDX_0 "st,stm32-exti" -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-exti -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_IDX_0_STRING_TOKEN st_stm32_exti -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_EXTI -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_interrupt_controller_58000000, compatible, 0) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_interrupt_controller_58000000, compatible, 0) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_interrupt_controller_58000000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_LEN 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_wakeup_source 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_controller 1 -#define DT_N_S_soc_S_interrupt_controller_58000000_P_interrupt_controller_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_midi_clock 0 +#define DT_N_S_soc_S_spi_40003c00_P_midi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_mssi_clock 0 +#define DT_N_S_soc_S_spi_40003c00_P_mssi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_fifo_enable 0 +#define DT_N_S_soc_S_spi_40003c00_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_reg {1073757184, 1024} +#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_0 1073757184 +#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_spi_40003c00_P_reg_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_interrupts {51, 0} +#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_0 51 +#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_spi_40003c00_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_status "disabled" +#define DT_N_S_soc_S_spi_40003c00_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_spi_40003c00_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_spi_40003c00_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, status, 0) +#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, status, 0) +#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_status_LEN 1 +#define DT_N_S_soc_S_spi_40003c00_P_status_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0 "st,stm32h7-spi" +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1 "st,stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_2 "st,stm32-spi" +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi +#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI +#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0) \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 1) \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 2) +#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 2) +#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_compatible_LEN 3 +#define DT_N_S_soc_S_spi_40003c00_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bits 32768 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_VAL_bits 30146640 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0) \ + fn(DT_N_S_soc_S_spi_40003c00, clocks, 1) +#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, clocks, 1) +#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40003c00, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40003c00, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40003c00_P_clocks_LEN 2 +#define DT_N_S_soc_S_spi_40003c00_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_spi_40003c00_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_wakeup_source 0 +#define DT_N_S_soc_S_spi_40003c00_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_spi_40003c00_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_spi_40003c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/mailbox@58026400 + * Devicetree node: /soc/spi@40013000 * - * Node identifier: DT_N_S_soc_S_mailbox_58026400 + * Node identifier: DT_N_S_soc_S_spi_40013000 * - * Binding (compatible = st,stm32-hsem-mailbox): - * $ZEPHYR_BASE/dts/bindings/ipm/st,stm32-hsem-mailbox.yaml + * Binding (compatible = st,stm32h7-spi): + * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_mailbox_58026400_PATH "/soc/mailbox@58026400" +#define DT_N_S_soc_S_spi_40013000_PATH "/soc/spi@40013000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_mailbox_58026400_FULL_NAME "mailbox@58026400" -#define DT_N_S_soc_S_mailbox_58026400_FULL_NAME_UNQUOTED mailbox@58026400 -#define DT_N_S_soc_S_mailbox_58026400_FULL_NAME_TOKEN mailbox_58026400 -#define DT_N_S_soc_S_mailbox_58026400_FULL_NAME_UPPER_TOKEN MAILBOX_58026400 +#define DT_N_S_soc_S_spi_40013000_FULL_NAME "spi@40013000" +#define DT_N_S_soc_S_spi_40013000_FULL_NAME_UNQUOTED spi@40013000 +#define DT_N_S_soc_S_spi_40013000_FULL_NAME_TOKEN spi_40013000 +#define DT_N_S_soc_S_spi_40013000_FULL_NAME_UPPER_TOKEN SPI_40013000 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_mailbox_58026400_PARENT DT_N_S_soc +#define DT_N_S_soc_S_spi_40013000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_mailbox_58026400_CHILD_IDX 66 +#define DT_N_S_soc_S_spi_40013000_CHILD_IDX 22 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_mailbox_58026400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_NODELABEL(fn) fn(mailbox) -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_NODELABEL_VARGS(fn, ...) fn(mailbox, __VA_ARGS__) -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_spi_40013000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_spi_40013000_FOREACH_NODELABEL(fn) fn(spi1) +#define DT_N_S_soc_S_spi_40013000_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_mailbox_58026400_CHILD_NUM 0 -#define DT_N_S_soc_S_mailbox_58026400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40013000_CHILD_NUM 0 +#define DT_N_S_soc_S_spi_40013000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_mailbox_58026400_HASH EEDMy4UODFDtNiLV6t2seBZKwHkM1Q95e5cssXQ3UK8 +#define DT_N_S_soc_S_spi_40013000_HASH q04f3jPcynKDa_9eKR_V34RQn5SAL2iX4yHIC7XGkLs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_mailbox_58026400_ORD 108 -#define DT_N_S_soc_S_mailbox_58026400_ORD_STR_SORTABLE 00108 +#define DT_N_S_soc_S_spi_40013000_ORD 152 +#define DT_N_S_soc_S_spi_40013000_ORD_STR_SORTABLE 00152 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_mailbox_58026400_REQUIRES_ORDS \ +#define DT_N_S_soc_S_spi_40013000_REQUIRES_ORDS \ 3, \ 4, \ 8, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_mailbox_58026400_SUPPORTS_ORDS +#define DT_N_S_soc_S_spi_40013000_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_mailbox_58026400_EXISTS 1 -#define DT_N_INST_0_st_stm32_hsem_mailbox DT_N_S_soc_S_mailbox_58026400 -#define DT_N_INST_0_st_mbox_stm32_hsem DT_N_S_soc_S_mailbox_58026400 -#define DT_N_NODELABEL_mailbox DT_N_S_soc_S_mailbox_58026400 +#define DT_N_S_soc_S_spi_40013000_EXISTS 1 +#define DT_N_INST_1_st_stm32h7_spi DT_N_S_soc_S_spi_40013000 +#define DT_N_INST_1_st_stm32_spi_fifo DT_N_S_soc_S_spi_40013000 +#define DT_N_INST_1_st_stm32_spi DT_N_S_soc_S_spi_40013000 +#define DT_N_NODELABEL_spi1 DT_N_S_soc_S_spi_40013000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_mailbox_58026400_REG_NUM 1 -#define DT_N_S_soc_S_mailbox_58026400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_REG_IDX_0_VAL_ADDRESS 1476551680 -#define DT_N_S_soc_S_mailbox_58026400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_mailbox_58026400_RANGES_NUM 0 -#define DT_N_S_soc_S_mailbox_58026400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_mailbox_58026400_IRQ_NUM 1 -#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_VAL_irq 125 -#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_mailbox_58026400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MATCHES_st_stm32_hsem_mailbox 1 -#define DT_N_S_soc_S_mailbox_58026400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MODEL_IDX_0 "stm32-hsem-mailbox" -#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MATCHES_st_mbox_stm32_hsem 1 -#define DT_N_S_soc_S_mailbox_58026400_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_COMPAT_MODEL_IDX_1 "mbox-stm32-hsem" -#define DT_N_S_soc_S_mailbox_58026400_STATUS_okay 1 +#define DT_N_S_soc_S_spi_40013000_REG_NUM 1 +#define DT_N_S_soc_S_spi_40013000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_REG_IDX_0_VAL_ADDRESS 1073819648 +#define DT_N_S_soc_S_spi_40013000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_spi_40013000_RANGES_NUM 0 +#define DT_N_S_soc_S_spi_40013000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_spi_40013000_IRQ_NUM 1 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_irq 35 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_spi_40013000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_MATCHES_st_stm32h7_spi 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_0 "stm32h7-spi" +#define DT_N_S_soc_S_spi_40013000_COMPAT_MATCHES_st_stm32_spi_fifo 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40013000_COMPAT_MATCHES_st_stm32_spi 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_2 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_2 "stm32-spi" +#define DT_N_S_soc_S_spi_40013000_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_mailbox_58026400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_spi_40013000_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_VAL_bits 33554432 -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_mailbox_58026400, clocks, 0) -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_mailbox_58026400, clocks, 0) -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_mailbox_58026400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_mailbox_58026400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_LEN 1 -#define DT_N_S_soc_S_mailbox_58026400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_interrupts {125, 0} -#define DT_N_S_soc_S_mailbox_58026400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_interrupts_IDX_0 125 -#define DT_N_S_soc_S_mailbox_58026400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_mailbox_58026400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_status "okay" -#define DT_N_S_soc_S_mailbox_58026400_P_status_STRING_UNQUOTED okay -#define DT_N_S_soc_S_mailbox_58026400_P_status_STRING_TOKEN okay -#define DT_N_S_soc_S_mailbox_58026400_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_mailbox_58026400_P_status_IDX_0 "okay" -#define DT_N_S_soc_S_mailbox_58026400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_mailbox_58026400_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_mailbox_58026400, status, 0) -#define DT_N_S_soc_S_mailbox_58026400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_mailbox_58026400, status, 0) -#define DT_N_S_soc_S_mailbox_58026400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_mailbox_58026400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_mailbox_58026400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_mailbox_58026400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_mailbox_58026400_P_status_LEN 1 -#define DT_N_S_soc_S_mailbox_58026400_P_status_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_compatible {"st,stm32-hsem-mailbox", "st,mbox-stm32-hsem"} -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_0 "st,stm32-hsem-mailbox" -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-hsem-mailbox -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_0_STRING_TOKEN st_stm32_hsem_mailbox -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_HSEM_MAILBOX -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_1 "st,mbox-stm32-hsem" -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_1_STRING_UNQUOTED st,mbox-stm32-hsem -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_1_STRING_TOKEN st_mbox_stm32_hsem -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_MBOX_STM32_HSEM -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_mailbox_58026400, compatible, 0) \ - fn(DT_N_S_soc_S_mailbox_58026400, compatible, 1) -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_mailbox_58026400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_mailbox_58026400, compatible, 1) -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_mailbox_58026400, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_mailbox_58026400, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_mailbox_58026400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_mailbox_58026400, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_LEN 2 -#define DT_N_S_soc_S_mailbox_58026400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_reg {1476551680, 1024} -#define DT_N_S_soc_S_mailbox_58026400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_reg_IDX_0 1476551680 -#define DT_N_S_soc_S_mailbox_58026400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_mailbox_58026400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_mailbox_58026400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_wakeup_source 0 -#define DT_N_S_soc_S_mailbox_58026400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_mailbox_58026400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_mailbox_58026400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_midi_clock 0 +#define DT_N_S_soc_S_spi_40013000_P_midi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_mssi_clock 0 +#define DT_N_S_soc_S_spi_40013000_P_mssi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_fifo_enable 0 +#define DT_N_S_soc_S_spi_40013000_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_reg {1073819648, 1024} +#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_0 1073819648 +#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_spi_40013000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_interrupts {35, 0} +#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_0 35 +#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_spi_40013000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_status "disabled" +#define DT_N_S_soc_S_spi_40013000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_spi_40013000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_spi_40013000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, status, 0) +#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, status, 0) +#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_status_LEN 1 +#define DT_N_S_soc_S_spi_40013000_P_status_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0 "st,stm32h7-spi" +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1 "st,stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_2 "st,stm32-spi" +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi +#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI +#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, compatible, 0) \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 1) \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 2) +#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 2) +#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_compatible_LEN 3 +#define DT_N_S_soc_S_spi_40013000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bus 240 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bits 4096 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_VAL_bus 9 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_VAL_bits 30146640 +#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, clocks, 0) \ + fn(DT_N_S_soc_S_spi_40013000, clocks, 1) +#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, clocks, 1) +#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40013000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013000_P_clocks_LEN 2 +#define DT_N_S_soc_S_spi_40013000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_spi_40013000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_wakeup_source 0 +#define DT_N_S_soc_S_spi_40013000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_spi_40013000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_spi_40013000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/memory@38800000 + * Devicetree node: /soc/spi@40013400 * - * Node identifier: DT_N_S_soc_S_memory_38800000 + * Node identifier: DT_N_S_soc_S_spi_40013400 * - * Binding (compatible = zephyr,memory-region): - * $ZEPHYR_BASE/dts/bindings/base/zephyr,memory-region.yaml + * Binding (compatible = st,stm32h7-spi): + * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_memory_38800000_PATH "/soc/memory@38800000" +#define DT_N_S_soc_S_spi_40013400_PATH "/soc/spi@40013400" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_memory_38800000_FULL_NAME "memory@38800000" -#define DT_N_S_soc_S_memory_38800000_FULL_NAME_UNQUOTED memory@38800000 -#define DT_N_S_soc_S_memory_38800000_FULL_NAME_TOKEN memory_38800000 -#define DT_N_S_soc_S_memory_38800000_FULL_NAME_UPPER_TOKEN MEMORY_38800000 +#define DT_N_S_soc_S_spi_40013400_FULL_NAME "spi@40013400" +#define DT_N_S_soc_S_spi_40013400_FULL_NAME_UNQUOTED spi@40013400 +#define DT_N_S_soc_S_spi_40013400_FULL_NAME_TOKEN spi_40013400 +#define DT_N_S_soc_S_spi_40013400_FULL_NAME_UPPER_TOKEN SPI_40013400 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_memory_38800000_PARENT DT_N_S_soc +#define DT_N_S_soc_S_spi_40013400_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_memory_38800000_CHILD_IDX 63 +#define DT_N_S_soc_S_spi_40013400_CHILD_IDX 25 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_memory_38800000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_memory_38800000_FOREACH_NODELABEL(fn) fn(backup_sram) -#define DT_N_S_soc_S_memory_38800000_FOREACH_NODELABEL_VARGS(fn, ...) fn(backup_sram, __VA_ARGS__) -#define DT_N_S_soc_S_memory_38800000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_spi_40013400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_spi_40013400_FOREACH_NODELABEL(fn) fn(spi4) +#define DT_N_S_soc_S_spi_40013400_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi4, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_memory_38800000_CHILD_NUM 0 -#define DT_N_S_soc_S_memory_38800000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_memory_38800000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40013400_CHILD_NUM 0 +#define DT_N_S_soc_S_spi_40013400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_memory_38800000_HASH 7ck7jfzNr5JUKTE_fCwfei7NH6M14LTAgkyNzLdnGfI +#define DT_N_S_soc_S_spi_40013400_HASH _gq_GFzBL2BriiF_xUBpw3VzRXUfex3S_XMm3qRcPgU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_38800000_ORD 109 -#define DT_N_S_soc_S_memory_38800000_ORD_STR_SORTABLE 00109 +#define DT_N_S_soc_S_spi_40013400_ORD 153 +#define DT_N_S_soc_S_spi_40013400_ORD_STR_SORTABLE 00153 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_memory_38800000_REQUIRES_ORDS \ +#define DT_N_S_soc_S_spi_40013400_REQUIRES_ORDS \ 3, \ + 4, \ 8, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_memory_38800000_SUPPORTS_ORDS +#define DT_N_S_soc_S_spi_40013400_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_memory_38800000_EXISTS 1 -#define DT_N_INST_6_zephyr_memory_region DT_N_S_soc_S_memory_38800000 -#define DT_N_INST_0_st_stm32_backup_sram DT_N_S_soc_S_memory_38800000 -#define DT_N_NODELABEL_backup_sram DT_N_S_soc_S_memory_38800000 +#define DT_N_S_soc_S_spi_40013400_EXISTS 1 +#define DT_N_INST_3_st_stm32h7_spi DT_N_S_soc_S_spi_40013400 +#define DT_N_INST_3_st_stm32_spi_fifo DT_N_S_soc_S_spi_40013400 +#define DT_N_INST_3_st_stm32_spi DT_N_S_soc_S_spi_40013400 +#define DT_N_NODELABEL_spi4 DT_N_S_soc_S_spi_40013400 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_memory_38800000_REG_NUM 1 -#define DT_N_S_soc_S_memory_38800000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_REG_IDX_0_VAL_ADDRESS 947912704 -#define DT_N_S_soc_S_memory_38800000_REG_IDX_0_VAL_SIZE 4096 -#define DT_N_S_soc_S_memory_38800000_RANGES_NUM 0 -#define DT_N_S_soc_S_memory_38800000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_memory_38800000_IRQ_NUM 0 -#define DT_N_S_soc_S_memory_38800000_IRQ_LEVEL 0 -#define DT_N_S_soc_S_memory_38800000_COMPAT_MATCHES_zephyr_memory_region 1 -#define DT_N_S_soc_S_memory_38800000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_COMPAT_VENDOR_IDX_0 "Zephyr-specific binding" -#define DT_N_S_soc_S_memory_38800000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_COMPAT_MODEL_IDX_0 "memory-region" -#define DT_N_S_soc_S_memory_38800000_COMPAT_MATCHES_st_stm32_backup_sram 1 -#define DT_N_S_soc_S_memory_38800000_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_memory_38800000_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_COMPAT_MODEL_IDX_1 "stm32-backup-sram" -#define DT_N_S_soc_S_memory_38800000_STATUS_disabled 1 +#define DT_N_S_soc_S_spi_40013400_REG_NUM 1 +#define DT_N_S_soc_S_spi_40013400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_REG_IDX_0_VAL_ADDRESS 1073820672 +#define DT_N_S_soc_S_spi_40013400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_spi_40013400_RANGES_NUM 0 +#define DT_N_S_soc_S_spi_40013400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_spi_40013400_IRQ_NUM 1 +#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_VAL_irq 84 +#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_spi_40013400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_spi_40013400_COMPAT_MATCHES_st_stm32h7_spi 1 +#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_0 "stm32h7-spi" +#define DT_N_S_soc_S_spi_40013400_COMPAT_MATCHES_st_stm32_spi_fifo 1 +#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40013400_COMPAT_MATCHES_st_stm32_spi 1 +#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_2 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_2 "stm32-spi" +#define DT_N_S_soc_S_spi_40013400_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_memory_38800000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_spi_40013400_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region "BACKUP_SRAM" -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_STRING_UNQUOTED BACKUP_SRAM -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_STRING_TOKEN BACKUP_SRAM -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_STRING_UPPER_TOKEN BACKUP_SRAM -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_IDX_0 "BACKUP_SRAM" -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_38800000, zephyr_memory_region, 0) -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_38800000, zephyr_memory_region, 0) -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_38800000, zephyr_memory_region, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_38800000, zephyr_memory_region, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_LEN 1 -#define DT_N_S_soc_S_memory_38800000_P_zephyr_memory_region_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_status "disabled" -#define DT_N_S_soc_S_memory_38800000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_memory_38800000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_memory_38800000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_memory_38800000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_memory_38800000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_memory_38800000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_38800000, status, 0) -#define DT_N_S_soc_S_memory_38800000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_38800000, status, 0) -#define DT_N_S_soc_S_memory_38800000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_38800000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_38800000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_38800000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_38800000_P_status_LEN 1 -#define DT_N_S_soc_S_memory_38800000_P_status_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_compatible {"zephyr,memory-region", "st,stm32-backup-sram"} -#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_0 "zephyr,memory-region" -#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_0_STRING_UNQUOTED zephyr,memory-region -#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_0_STRING_TOKEN zephyr_memory_region -#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_0_STRING_UPPER_TOKEN ZEPHYR_MEMORY_REGION -#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_1 "st,stm32-backup-sram" -#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-backup-sram -#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_1_STRING_TOKEN st_stm32_backup_sram -#define DT_N_S_soc_S_memory_38800000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_BACKUP_SRAM -#define DT_N_S_soc_S_memory_38800000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_38800000, compatible, 0) \ - fn(DT_N_S_soc_S_memory_38800000, compatible, 1) -#define DT_N_S_soc_S_memory_38800000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_38800000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_38800000, compatible, 1) -#define DT_N_S_soc_S_memory_38800000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_38800000, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_38800000, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_memory_38800000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_38800000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_38800000, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_memory_38800000_P_compatible_LEN 2 -#define DT_N_S_soc_S_memory_38800000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_reg {947912704, 4096} -#define DT_N_S_soc_S_memory_38800000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_reg_IDX_0 947912704 -#define DT_N_S_soc_S_memory_38800000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_reg_IDX_1 4096 -#define DT_N_S_soc_S_memory_38800000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_VAL_bits 268435456 -#define DT_N_S_soc_S_memory_38800000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_38800000, clocks, 0) -#define DT_N_S_soc_S_memory_38800000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_38800000, clocks, 0) -#define DT_N_S_soc_S_memory_38800000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_38800000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_38800000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_38800000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_38800000_P_clocks_LEN 1 -#define DT_N_S_soc_S_memory_38800000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_memory_38800000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_wakeup_source 0 -#define DT_N_S_soc_S_memory_38800000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_memory_38800000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_memory_38800000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_midi_clock 0 +#define DT_N_S_soc_S_spi_40013400_P_midi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_mssi_clock 0 +#define DT_N_S_soc_S_spi_40013400_P_mssi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_fifo_enable 0 +#define DT_N_S_soc_S_spi_40013400_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_reg {1073820672, 1024} +#define DT_N_S_soc_S_spi_40013400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_reg_IDX_0 1073820672 +#define DT_N_S_soc_S_spi_40013400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_spi_40013400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_interrupts {84, 0} +#define DT_N_S_soc_S_spi_40013400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_interrupts_IDX_0 84 +#define DT_N_S_soc_S_spi_40013400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_spi_40013400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_status "disabled" +#define DT_N_S_soc_S_spi_40013400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_spi_40013400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_spi_40013400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_spi_40013400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_spi_40013400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_spi_40013400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013400, status, 0) +#define DT_N_S_soc_S_spi_40013400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013400, status, 0) +#define DT_N_S_soc_S_spi_40013400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013400_P_status_LEN 1 +#define DT_N_S_soc_S_spi_40013400_P_status_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_0 "st,stm32h7-spi" +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_1 "st,stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_2 "st,stm32-spi" +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi +#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI +#define DT_N_S_soc_S_spi_40013400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013400, compatible, 0) \ + fn(DT_N_S_soc_S_spi_40013400, compatible, 1) \ + fn(DT_N_S_soc_S_spi_40013400, compatible, 2) +#define DT_N_S_soc_S_spi_40013400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013400, compatible, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013400, compatible, 2) +#define DT_N_S_soc_S_spi_40013400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013400, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40013400, compatible, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40013400, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013400, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40013400, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013400_P_compatible_LEN 3 +#define DT_N_S_soc_S_spi_40013400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_VAL_bus 240 +#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_VAL_bits 8192 +#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013400, clocks, 0) +#define DT_N_S_soc_S_spi_40013400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013400, clocks, 0) +#define DT_N_S_soc_S_spi_40013400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40013400_P_clocks_LEN 1 +#define DT_N_S_soc_S_spi_40013400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_spi_40013400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_wakeup_source 0 +#define DT_N_S_soc_S_spi_40013400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_spi_40013400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_spi_40013400_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/rng@48021800 + * Devicetree node: /soc/spi@40015000 * - * Node identifier: DT_N_S_soc_S_rng_48021800 + * Node identifier: DT_N_S_soc_S_spi_40015000 * - * Binding (compatible = st,stm32-rng): - * $ZEPHYR_BASE/dts/bindings/rng/st,stm32-rng.yaml + * Binding (compatible = st,stm32h7-spi): + * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_rng_48021800_PATH "/soc/rng@48021800" +#define DT_N_S_soc_S_spi_40015000_PATH "/soc/spi@40015000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_rng_48021800_FULL_NAME "rng@48021800" -#define DT_N_S_soc_S_rng_48021800_FULL_NAME_UNQUOTED rng@48021800 -#define DT_N_S_soc_S_rng_48021800_FULL_NAME_TOKEN rng_48021800 -#define DT_N_S_soc_S_rng_48021800_FULL_NAME_UPPER_TOKEN RNG_48021800 +#define DT_N_S_soc_S_spi_40015000_FULL_NAME "spi@40015000" +#define DT_N_S_soc_S_spi_40015000_FULL_NAME_UNQUOTED spi@40015000 +#define DT_N_S_soc_S_spi_40015000_FULL_NAME_TOKEN spi_40015000 +#define DT_N_S_soc_S_spi_40015000_FULL_NAME_UPPER_TOKEN SPI_40015000 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_rng_48021800_PARENT DT_N_S_soc +#define DT_N_S_soc_S_spi_40015000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_rng_48021800_CHILD_IDX 58 +#define DT_N_S_soc_S_spi_40015000_CHILD_IDX 26 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_rng_48021800_NODELABEL_NUM 1 -#define DT_N_S_soc_S_rng_48021800_FOREACH_NODELABEL(fn) fn(rng) -#define DT_N_S_soc_S_rng_48021800_FOREACH_NODELABEL_VARGS(fn, ...) fn(rng, __VA_ARGS__) -#define DT_N_S_soc_S_rng_48021800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_spi_40015000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_spi_40015000_FOREACH_NODELABEL(fn) fn(spi5) +#define DT_N_S_soc_S_spi_40015000_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi5, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40015000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_rng_48021800_CHILD_NUM 0 -#define DT_N_S_soc_S_rng_48021800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_rng_48021800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40015000_CHILD_NUM 0 +#define DT_N_S_soc_S_spi_40015000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_rng_48021800_HASH d6ka_Yk2ooJ3ol3sggiQatxqiRRZ8bDVPl803XX9V_c +#define DT_N_S_soc_S_spi_40015000_HASH _7uoLr5262nubu_Aw_eizLfScuJO0NCTRjc4zDKDojg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_rng_48021800_ORD 110 -#define DT_N_S_soc_S_rng_48021800_ORD_STR_SORTABLE 00110 +#define DT_N_S_soc_S_spi_40015000_ORD 154 +#define DT_N_S_soc_S_spi_40015000_ORD_STR_SORTABLE 00154 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_rng_48021800_REQUIRES_ORDS \ +#define DT_N_S_soc_S_spi_40015000_REQUIRES_ORDS \ 3, \ 4, \ 8, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_rng_48021800_SUPPORTS_ORDS +#define DT_N_S_soc_S_spi_40015000_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_rng_48021800_EXISTS 1 -#define DT_N_INST_0_st_stm32_rng DT_N_S_soc_S_rng_48021800 -#define DT_N_NODELABEL_rng DT_N_S_soc_S_rng_48021800 +#define DT_N_S_soc_S_spi_40015000_EXISTS 1 +#define DT_N_INST_4_st_stm32h7_spi DT_N_S_soc_S_spi_40015000 +#define DT_N_INST_4_st_stm32_spi_fifo DT_N_S_soc_S_spi_40015000 +#define DT_N_INST_4_st_stm32_spi DT_N_S_soc_S_spi_40015000 +#define DT_N_NODELABEL_spi5 DT_N_S_soc_S_spi_40015000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_rng_48021800_REG_NUM 1 -#define DT_N_S_soc_S_rng_48021800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_REG_IDX_0_VAL_ADDRESS 1208096768 -#define DT_N_S_soc_S_rng_48021800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_rng_48021800_RANGES_NUM 0 -#define DT_N_S_soc_S_rng_48021800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_rng_48021800_IRQ_NUM 1 -#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_VAL_irq 80 -#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_rng_48021800_IRQ_LEVEL 1 -#define DT_N_S_soc_S_rng_48021800_COMPAT_MATCHES_st_stm32_rng 1 -#define DT_N_S_soc_S_rng_48021800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_rng_48021800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_COMPAT_MODEL_IDX_0 "stm32-rng" -#define DT_N_S_soc_S_rng_48021800_STATUS_okay 1 +#define DT_N_S_soc_S_spi_40015000_REG_NUM 1 +#define DT_N_S_soc_S_spi_40015000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_REG_IDX_0_VAL_ADDRESS 1073827840 +#define DT_N_S_soc_S_spi_40015000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_spi_40015000_RANGES_NUM 0 +#define DT_N_S_soc_S_spi_40015000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_spi_40015000_IRQ_NUM 1 +#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_VAL_irq 85 +#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_spi_40015000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_spi_40015000_COMPAT_MATCHES_st_stm32h7_spi 1 +#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_0 "stm32h7-spi" +#define DT_N_S_soc_S_spi_40015000_COMPAT_MATCHES_st_stm32_spi_fifo 1 +#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40015000_COMPAT_MATCHES_st_stm32_spi 1 +#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_2 "STMicroelectronics" +#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_2 "stm32-spi" +#define DT_N_S_soc_S_spi_40015000_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_rng_48021800_PINCTRL_NUM 0 +#define DT_N_S_soc_S_spi_40015000_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_rng_48021800_P_reg {1208096768, 1024} -#define DT_N_S_soc_S_rng_48021800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_reg_IDX_0 1208096768 -#define DT_N_S_soc_S_rng_48021800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_rng_48021800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_VAL_bus 220 -#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_VAL_bits 64 -#define DT_N_S_soc_S_rng_48021800_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rng_48021800, clocks, 0) -#define DT_N_S_soc_S_rng_48021800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rng_48021800, clocks, 0) -#define DT_N_S_soc_S_rng_48021800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rng_48021800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_rng_48021800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rng_48021800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_rng_48021800_P_clocks_LEN 1 -#define DT_N_S_soc_S_rng_48021800_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_status "okay" -#define DT_N_S_soc_S_rng_48021800_P_status_STRING_UNQUOTED okay -#define DT_N_S_soc_S_rng_48021800_P_status_STRING_TOKEN okay -#define DT_N_S_soc_S_rng_48021800_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_rng_48021800_P_status_IDX_0 "okay" -#define DT_N_S_soc_S_rng_48021800_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_rng_48021800_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rng_48021800, status, 0) -#define DT_N_S_soc_S_rng_48021800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rng_48021800, status, 0) -#define DT_N_S_soc_S_rng_48021800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rng_48021800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_rng_48021800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rng_48021800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_rng_48021800_P_status_LEN 1 -#define DT_N_S_soc_S_rng_48021800_P_status_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_compatible {"st,stm32-rng"} -#define DT_N_S_soc_S_rng_48021800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_compatible_IDX_0 "st,stm32-rng" -#define DT_N_S_soc_S_rng_48021800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-rng -#define DT_N_S_soc_S_rng_48021800_P_compatible_IDX_0_STRING_TOKEN st_stm32_rng -#define DT_N_S_soc_S_rng_48021800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_RNG -#define DT_N_S_soc_S_rng_48021800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_rng_48021800, compatible, 0) -#define DT_N_S_soc_S_rng_48021800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_rng_48021800, compatible, 0) -#define DT_N_S_soc_S_rng_48021800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_rng_48021800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_rng_48021800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_rng_48021800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_rng_48021800_P_compatible_LEN 1 -#define DT_N_S_soc_S_rng_48021800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_interrupts {80, 0} -#define DT_N_S_soc_S_rng_48021800_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_interrupts_IDX_0 80 -#define DT_N_S_soc_S_rng_48021800_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_rng_48021800_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_rng_48021800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_wakeup_source 0 -#define DT_N_S_soc_S_rng_48021800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_rng_48021800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_rng_48021800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_midi_clock 0 +#define DT_N_S_soc_S_spi_40015000_P_midi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_mssi_clock 0 +#define DT_N_S_soc_S_spi_40015000_P_mssi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_fifo_enable 0 +#define DT_N_S_soc_S_spi_40015000_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_reg {1073827840, 1024} +#define DT_N_S_soc_S_spi_40015000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_reg_IDX_0 1073827840 +#define DT_N_S_soc_S_spi_40015000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_spi_40015000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_interrupts {85, 0} +#define DT_N_S_soc_S_spi_40015000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_interrupts_IDX_0 85 +#define DT_N_S_soc_S_spi_40015000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_spi_40015000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_status "disabled" +#define DT_N_S_soc_S_spi_40015000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_spi_40015000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_spi_40015000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_spi_40015000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_spi_40015000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_spi_40015000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40015000, status, 0) +#define DT_N_S_soc_S_spi_40015000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40015000, status, 0) +#define DT_N_S_soc_S_spi_40015000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40015000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40015000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40015000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40015000_P_status_LEN 1 +#define DT_N_S_soc_S_spi_40015000_P_status_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_0 "st,stm32h7-spi" +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_1 "st,stm32-spi-fifo" +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_2 "st,stm32-spi" +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi +#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI +#define DT_N_S_soc_S_spi_40015000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40015000, compatible, 0) \ + fn(DT_N_S_soc_S_spi_40015000, compatible, 1) \ + fn(DT_N_S_soc_S_spi_40015000, compatible, 2) +#define DT_N_S_soc_S_spi_40015000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40015000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40015000, compatible, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40015000, compatible, 2) +#define DT_N_S_soc_S_spi_40015000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40015000, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40015000, compatible, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_40015000, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40015000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40015000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40015000, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_40015000, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40015000_P_compatible_LEN 3 +#define DT_N_S_soc_S_spi_40015000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_VAL_bus 240 +#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_VAL_bits 1048576 +#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40015000, clocks, 0) +#define DT_N_S_soc_S_spi_40015000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40015000, clocks, 0) +#define DT_N_S_soc_S_spi_40015000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40015000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40015000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40015000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_40015000_P_clocks_LEN 1 +#define DT_N_S_soc_S_spi_40015000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_spi_40015000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_wakeup_source 0 +#define DT_N_S_soc_S_spi_40015000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_spi_40015000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_spi_40015000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/sdmmc@48022400 + * Devicetree node: /soc/spi@58001400 * - * Node identifier: DT_N_S_soc_S_sdmmc_48022400 + * Node identifier: DT_N_S_soc_S_spi_58001400 * - * Binding (compatible = st,stm32-sdmmc): - * $ZEPHYR_BASE/dts/bindings/mmc/st,stm32-sdmmc.yaml + * Binding (compatible = st,stm32h7-spi): + * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_sdmmc_48022400_PATH "/soc/sdmmc@48022400" +#define DT_N_S_soc_S_spi_58001400_PATH "/soc/spi@58001400" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_sdmmc_48022400_FULL_NAME "sdmmc@48022400" -#define DT_N_S_soc_S_sdmmc_48022400_FULL_NAME_UNQUOTED sdmmc@48022400 -#define DT_N_S_soc_S_sdmmc_48022400_FULL_NAME_TOKEN sdmmc_48022400 -#define DT_N_S_soc_S_sdmmc_48022400_FULL_NAME_UPPER_TOKEN SDMMC_48022400 +#define DT_N_S_soc_S_spi_58001400_FULL_NAME "spi@58001400" +#define DT_N_S_soc_S_spi_58001400_FULL_NAME_UNQUOTED spi@58001400 +#define DT_N_S_soc_S_spi_58001400_FULL_NAME_TOKEN spi_58001400 +#define DT_N_S_soc_S_spi_58001400_FULL_NAME_UPPER_TOKEN SPI_58001400 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_sdmmc_48022400_PARENT DT_N_S_soc +#define DT_N_S_soc_S_spi_58001400_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_sdmmc_48022400_CHILD_IDX 60 +#define DT_N_S_soc_S_spi_58001400_CHILD_IDX 27 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_sdmmc_48022400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_NODELABEL(fn) fn(sdmmc2) -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_NODELABEL_VARGS(fn, ...) fn(sdmmc2, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_spi_58001400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_spi_58001400_FOREACH_NODELABEL(fn) fn(spi6) +#define DT_N_S_soc_S_spi_58001400_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi6, __VA_ARGS__) +#define DT_N_S_soc_S_spi_58001400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_sdmmc_48022400_CHILD_NUM 0 -#define DT_N_S_soc_S_sdmmc_48022400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_58001400_CHILD_NUM 0 +#define DT_N_S_soc_S_spi_58001400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_sdmmc_48022400_HASH FWnL4SsgC4pr3AW8TfPSyMj0yDgmJe1JK1TAHxSEFW4 +#define DT_N_S_soc_S_spi_58001400_HASH MQ8Y8eusUQ_m2SL3yzoNAgkoH4u83k1uJWprWbvoQw0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_sdmmc_48022400_ORD 111 -#define DT_N_S_soc_S_sdmmc_48022400_ORD_STR_SORTABLE 00111 +#define DT_N_S_soc_S_spi_58001400_ORD 155 +#define DT_N_S_soc_S_spi_58001400_ORD_STR_SORTABLE 00155 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_sdmmc_48022400_REQUIRES_ORDS \ +#define DT_N_S_soc_S_spi_58001400_REQUIRES_ORDS \ 3, \ 4, \ - 8, \ - 41, + 8, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_sdmmc_48022400_SUPPORTS_ORDS +#define DT_N_S_soc_S_spi_58001400_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_sdmmc_48022400_EXISTS 1 -#define DT_N_INST_1_st_stm32_sdmmc DT_N_S_soc_S_sdmmc_48022400 -#define DT_N_NODELABEL_sdmmc2 DT_N_S_soc_S_sdmmc_48022400 +#define DT_N_S_soc_S_spi_58001400_EXISTS 1 +#define DT_N_INST_5_st_stm32h7_spi DT_N_S_soc_S_spi_58001400 +#define DT_N_INST_5_st_stm32_spi_fifo DT_N_S_soc_S_spi_58001400 +#define DT_N_INST_5_st_stm32_spi DT_N_S_soc_S_spi_58001400 +#define DT_N_NODELABEL_spi6 DT_N_S_soc_S_spi_58001400 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_sdmmc_48022400_REG_NUM 1 -#define DT_N_S_soc_S_sdmmc_48022400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_REG_IDX_0_VAL_ADDRESS 1208099840 -#define DT_N_S_soc_S_sdmmc_48022400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_sdmmc_48022400_RANGES_NUM 0 -#define DT_N_S_soc_S_sdmmc_48022400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_sdmmc_48022400_IRQ_NUM 1 -#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_VAL_irq 124 -#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_sdmmc_48022400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_sdmmc_48022400_COMPAT_MATCHES_st_stm32_sdmmc 1 -#define DT_N_S_soc_S_sdmmc_48022400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_sdmmc_48022400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_COMPAT_MODEL_IDX_0 "stm32-sdmmc" -#define DT_N_S_soc_S_sdmmc_48022400_STATUS_disabled 1 +#define DT_N_S_soc_S_spi_58001400_REG_NUM 1 +#define DT_N_S_soc_S_spi_58001400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_REG_IDX_0_VAL_ADDRESS 1476400128 +#define DT_N_S_soc_S_spi_58001400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_spi_58001400_RANGES_NUM 0 +#define DT_N_S_soc_S_spi_58001400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_spi_58001400_IRQ_NUM 1 +#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_VAL_irq 86 +#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_spi_58001400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_spi_58001400_COMPAT_MATCHES_st_stm32h7_spi 1 +#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_0 "stm32h7-spi" +#define DT_N_S_soc_S_spi_58001400_COMPAT_MATCHES_st_stm32_spi_fifo 1 +#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" +#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" +#define DT_N_S_soc_S_spi_58001400_COMPAT_MATCHES_st_stm32_spi 1 +#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_2 "STMicroelectronics" +#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_2 "stm32-spi" +#define DT_N_S_soc_S_spi_58001400_STATUS_disabled 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_spi_58001400_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_spi_58001400_P_midi_clock 0 +#define DT_N_S_soc_S_spi_58001400_P_midi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_mssi_clock 0 +#define DT_N_S_soc_S_spi_58001400_P_mssi_clock_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_fifo_enable 0 +#define DT_N_S_soc_S_spi_58001400_P_fifo_enable_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_reg {1476400128, 1024} +#define DT_N_S_soc_S_spi_58001400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_reg_IDX_0 1476400128 +#define DT_N_S_soc_S_spi_58001400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_spi_58001400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_interrupts {86, 0} +#define DT_N_S_soc_S_spi_58001400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_interrupts_IDX_0 86 +#define DT_N_S_soc_S_spi_58001400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_spi_58001400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_status "disabled" +#define DT_N_S_soc_S_spi_58001400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_spi_58001400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_spi_58001400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_spi_58001400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_spi_58001400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_spi_58001400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_58001400, status, 0) +#define DT_N_S_soc_S_spi_58001400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_58001400, status, 0) +#define DT_N_S_soc_S_spi_58001400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_58001400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_58001400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_58001400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_58001400_P_status_LEN 1 +#define DT_N_S_soc_S_spi_58001400_P_status_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_0 "st,stm32h7-spi" +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_1 "st,stm32-spi-fifo" +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_2 "st,stm32-spi" +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi +#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI +#define DT_N_S_soc_S_spi_58001400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_58001400, compatible, 0) \ + fn(DT_N_S_soc_S_spi_58001400, compatible, 1) \ + fn(DT_N_S_soc_S_spi_58001400, compatible, 2) +#define DT_N_S_soc_S_spi_58001400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_58001400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_58001400, compatible, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_58001400, compatible, 2) +#define DT_N_S_soc_S_spi_58001400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_58001400, compatible, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_58001400, compatible, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_spi_58001400, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_58001400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_58001400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_58001400, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_spi_58001400, compatible, 2, __VA_ARGS__) +#define DT_N_S_soc_S_spi_58001400_P_compatible_LEN 3 +#define DT_N_S_soc_S_spi_58001400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_VAL_bus 244 +#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_VAL_bits 32 +#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_58001400, clocks, 0) +#define DT_N_S_soc_S_spi_58001400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_58001400, clocks, 0) +#define DT_N_S_soc_S_spi_58001400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_58001400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_58001400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_58001400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_spi_58001400_P_clocks_LEN 1 +#define DT_N_S_soc_S_spi_58001400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_spi_58001400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_wakeup_source 0 +#define DT_N_S_soc_S_spi_58001400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_spi_58001400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_spi_58001400_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/timer@e000e010 + * + * Node identifier: DT_N_S_soc_S_timer_e000e010 + * + * Binding (compatible = arm,armv7m-systick): + * $ZEPHYR_BASE/dts/bindings/timer/arm,armv7m-systick.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_timer_e000e010_PATH "/soc/timer@e000e010" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_timer_e000e010_FULL_NAME "timer@e000e010" +#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_UNQUOTED timer@e000e010 +#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_TOKEN timer_e000e010 +#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_UPPER_TOKEN TIMER_E000E010 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_timer_e000e010_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_timer_e000e010_CHILD_IDX 1 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_timer_e000e010_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timer_e000e010_FOREACH_NODELABEL(fn) fn(systick) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_NODELABEL_VARGS(fn, ...) fn(systick, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM 0 +#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_timer_e000e010_HASH aZrzPLAIRgEwRZJIvTCzJONA6gPgc4QlhkiU5oWGArA + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_timer_e000e010_ORD 156 +#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00156 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \ + 3, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_timer_e000e010_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_timer_e000e010_EXISTS 1 +#define DT_N_INST_0_arm_armv7m_systick DT_N_S_soc_S_timer_e000e010 +#define DT_N_NODELABEL_systick DT_N_S_soc_S_timer_e000e010 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_timer_e000e010_REG_NUM 1 +#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_ADDRESS 3758153744 +#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_SIZE 16 +#define DT_N_S_soc_S_timer_e000e010_RANGES_NUM 0 +#define DT_N_S_soc_S_timer_e000e010_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timer_e000e010_IRQ_NUM 0 +#define DT_N_S_soc_S_timer_e000e010_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_MATCHES_arm_armv7m_systick 1 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0 "ARM Ltd." +#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0 "armv7m-systick" +#define DT_N_S_soc_S_timer_e000e010_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_sdmmc_48022400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_timer_e000e010_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_VAL_bus 220 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_VAL_bits 512 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_VAL_bus 9 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_VAL_bits 5242956 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 0) \ - fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 1) -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 1) -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_sdmmc_48022400, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_LEN 2 -#define DT_N_S_soc_S_sdmmc_48022400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_reg {1208099840, 1024} -#define DT_N_S_soc_S_sdmmc_48022400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_reg_IDX_0 1208099840 -#define DT_N_S_soc_S_sdmmc_48022400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_sdmmc_48022400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_sdmmc_48022400_P_resets_IDX_0_VAL_id 4233 -#define DT_N_S_soc_S_sdmmc_48022400_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_48022400, resets, 0) -#define DT_N_S_soc_S_sdmmc_48022400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_48022400, resets, 0) -#define DT_N_S_soc_S_sdmmc_48022400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_48022400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_48022400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_48022400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_48022400_P_resets_LEN 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_resets_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_bus_width 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_bus_width_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_sdmmc_48022400_P_bus_width_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_bus_width_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_bus_width_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_clk_div 0 -#define DT_N_S_soc_S_sdmmc_48022400_P_clk_div_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_idma 0 -#define DT_N_S_soc_S_sdmmc_48022400_P_idma_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_status "disabled" -#define DT_N_S_soc_S_sdmmc_48022400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_sdmmc_48022400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_sdmmc_48022400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_sdmmc_48022400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_sdmmc_48022400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_sdmmc_48022400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_48022400, status, 0) -#define DT_N_S_soc_S_sdmmc_48022400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_48022400, status, 0) -#define DT_N_S_soc_S_sdmmc_48022400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_48022400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_48022400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_48022400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_48022400_P_status_LEN 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_status_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible {"st,stm32-sdmmc"} -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_IDX_0 "st,stm32-sdmmc" -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-sdmmc -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_IDX_0_STRING_TOKEN st_stm32_sdmmc -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SDMMC -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_48022400, compatible, 0) -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_48022400, compatible, 0) -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_48022400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_48022400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_LEN 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts {124, 0} -#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts_IDX_0 124 -#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_sdmmc_48022400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_sdmmc_48022400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_wakeup_source 0 -#define DT_N_S_soc_S_sdmmc_48022400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_48022400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_sdmmc_48022400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_reg {3758153744, 16} +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0 3758153744 +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1 16 +#define DT_N_S_soc_S_timer_e000e010_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_compatible {"arm,armv7m-systick"} +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0 "arm,armv7m-systick" +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UNQUOTED arm,armv7m-systick +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_TOKEN arm_armv7m_systick +#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV7M_SYSTICK +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timer_e000e010_P_compatible_LEN 1 +#define DT_N_S_soc_S_timer_e000e010_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source 0 +#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/sdmmc@52007000 + * Devicetree node: /soc/timers@40002400 * - * Node identifier: DT_N_S_soc_S_sdmmc_52007000 + * Node identifier: DT_N_S_soc_S_timers_40002400 * - * Binding (compatible = st,stm32-sdmmc): - * $ZEPHYR_BASE/dts/bindings/mmc/st,stm32-sdmmc.yaml + * Binding (compatible = st,stm32-lptim): + * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-lptim.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_sdmmc_52007000_PATH "/soc/sdmmc@52007000" +#define DT_N_S_soc_S_timers_40002400_PATH "/soc/timers@40002400" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_sdmmc_52007000_FULL_NAME "sdmmc@52007000" -#define DT_N_S_soc_S_sdmmc_52007000_FULL_NAME_UNQUOTED sdmmc@52007000 -#define DT_N_S_soc_S_sdmmc_52007000_FULL_NAME_TOKEN sdmmc_52007000 -#define DT_N_S_soc_S_sdmmc_52007000_FULL_NAME_UPPER_TOKEN SDMMC_52007000 +#define DT_N_S_soc_S_timers_40002400_FULL_NAME "timers@40002400" +#define DT_N_S_soc_S_timers_40002400_FULL_NAME_UNQUOTED timers@40002400 +#define DT_N_S_soc_S_timers_40002400_FULL_NAME_TOKEN timers_40002400 +#define DT_N_S_soc_S_timers_40002400_FULL_NAME_UPPER_TOKEN TIMERS_40002400 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_sdmmc_52007000_PARENT DT_N_S_soc +#define DT_N_S_soc_S_timers_40002400_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_sdmmc_52007000_CHILD_IDX 59 +#define DT_N_S_soc_S_timers_40002400_CHILD_IDX 47 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_sdmmc_52007000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_NODELABEL(fn) fn(sdmmc1) -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_NODELABEL_VARGS(fn, ...) fn(sdmmc1, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_timers_40002400_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40002400_FOREACH_NODELABEL(fn) fn(lptim1) +#define DT_N_S_soc_S_timers_40002400_FOREACH_NODELABEL_VARGS(fn, ...) fn(lptim1, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_sdmmc_52007000_CHILD_NUM 0 -#define DT_N_S_soc_S_sdmmc_52007000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40002400_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40002400_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_sdmmc_52007000_HASH HXN7xrSSBp_XQOyNK8_mK6qh2s7oq_z3h5ashoyXhJ4 +#define DT_N_S_soc_S_timers_40002400_HASH osDElrar1XoqhN_VHTBp2BrAfP_cC1w6IcXhOPWwP8E /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_sdmmc_52007000_ORD 112 -#define DT_N_S_soc_S_sdmmc_52007000_ORD_STR_SORTABLE 00112 +#define DT_N_S_soc_S_timers_40002400_ORD 157 +#define DT_N_S_soc_S_timers_40002400_ORD_STR_SORTABLE 00157 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_sdmmc_52007000_REQUIRES_ORDS \ +#define DT_N_S_soc_S_timers_40002400_REQUIRES_ORDS \ 3, \ 4, \ - 8, \ - 41, + 8, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_sdmmc_52007000_SUPPORTS_ORDS +#define DT_N_S_soc_S_timers_40002400_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_sdmmc_52007000_EXISTS 1 -#define DT_N_INST_0_st_stm32_sdmmc DT_N_S_soc_S_sdmmc_52007000 -#define DT_N_NODELABEL_sdmmc1 DT_N_S_soc_S_sdmmc_52007000 +#define DT_N_S_soc_S_timers_40002400_EXISTS 1 +#define DT_N_INST_0_st_stm32_lptim DT_N_S_soc_S_timers_40002400 +#define DT_N_NODELABEL_lptim1 DT_N_S_soc_S_timers_40002400 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_sdmmc_52007000_REG_NUM 1 -#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_VAL_ADDRESS 1375760384 -#define DT_N_S_soc_S_sdmmc_52007000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_sdmmc_52007000_RANGES_NUM 0 -#define DT_N_S_soc_S_sdmmc_52007000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_NUM 1 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_irq 49 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_sdmmc_52007000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MATCHES_st_stm32_sdmmc 1 -#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_COMPAT_MODEL_IDX_0 "stm32-sdmmc" -#define DT_N_S_soc_S_sdmmc_52007000_STATUS_disabled 1 +#define DT_N_S_soc_S_timers_40002400_REG_NUM 1 +#define DT_N_S_soc_S_timers_40002400_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_REG_IDX_0_VAL_ADDRESS 1073751040 +#define DT_N_S_soc_S_timers_40002400_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_timers_40002400_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40002400_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40002400_IRQ_NUM 1 +#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_irq 93 +#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_priority 1 +#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_timers_40002400_IRQ_LEVEL 1 +#define DT_N_S_soc_S_timers_40002400_IRQ_NAME_wakeup_VAL_irq DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_timers_40002400_IRQ_NAME_wakeup_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_IRQ_NAME_wakeup_VAL_priority DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_timers_40002400_IRQ_NAME_wakeup_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_IRQ_NAME_wakeup_CONTROLLER DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_timers_40002400_COMPAT_MATCHES_st_stm32_lptim 1 +#define DT_N_S_soc_S_timers_40002400_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40002400_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_COMPAT_MODEL_IDX_0 "stm32-lptim" +#define DT_N_S_soc_S_timers_40002400_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_sdmmc_52007000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_timers_40002400_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bus 212 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bits 65536 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bus 9 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bits 5242956 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0) \ - fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1) -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1) -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_sdmmc_52007000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_LEN 2 -#define DT_N_S_soc_S_sdmmc_52007000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_reg {1375760384, 1024} -#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_0 1375760384 -#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_sdmmc_52007000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_VAL_id 3984 -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_LEN 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_resets_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_bus_width_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_clk_div 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_clk_div_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_idma 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_idma_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_status "disabled" -#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_sdmmc_52007000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_sdmmc_52007000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_status_LEN 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_status_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible {"st,stm32-sdmmc"} -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0 "st,stm32-sdmmc" -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-sdmmc -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_TOKEN st_stm32_sdmmc -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_SDMMC -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0) -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_sdmmc_52007000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_LEN 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts {49, 0} -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_0 49 -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_wakeup_source 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_sdmmc_52007000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_st_prescaler 1 +#define DT_N_S_soc_S_timers_40002400_P_st_prescaler_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_timers_40002400_P_st_prescaler_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_st_prescaler_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_st_prescaler_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_reg {1073751040, 1024} +#define DT_N_S_soc_S_timers_40002400_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_reg_IDX_0 1073751040 +#define DT_N_S_soc_S_timers_40002400_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_timers_40002400_P_reg_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_VAL_bus 232 +#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_VAL_bits 512 +#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002400, clocks, 0) +#define DT_N_S_soc_S_timers_40002400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002400, clocks, 0) +#define DT_N_S_soc_S_timers_40002400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002400, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002400_P_clocks_LEN 1 +#define DT_N_S_soc_S_timers_40002400_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_status "disabled" +#define DT_N_S_soc_S_timers_40002400_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40002400_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40002400_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40002400_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40002400_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_timers_40002400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002400, status, 0) +#define DT_N_S_soc_S_timers_40002400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002400, status, 0) +#define DT_N_S_soc_S_timers_40002400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002400, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002400_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40002400_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_compatible {"st,stm32-lptim"} +#define DT_N_S_soc_S_timers_40002400_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_compatible_IDX_0 "st,stm32-lptim" +#define DT_N_S_soc_S_timers_40002400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-lptim +#define DT_N_S_soc_S_timers_40002400_P_compatible_IDX_0_STRING_TOKEN st_stm32_lptim +#define DT_N_S_soc_S_timers_40002400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LPTIM +#define DT_N_S_soc_S_timers_40002400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002400, compatible, 0) +#define DT_N_S_soc_S_timers_40002400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002400, compatible, 0) +#define DT_N_S_soc_S_timers_40002400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002400, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002400_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40002400_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_interrupts {93, 1} +#define DT_N_S_soc_S_timers_40002400_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_interrupts_IDX_0 93 +#define DT_N_S_soc_S_timers_40002400_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_interrupts_IDX_1 1 +#define DT_N_S_soc_S_timers_40002400_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names {"wakeup"} +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_IDX_0 "wakeup" +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_IDX_0_STRING_UNQUOTED wakeup +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_IDX_0_STRING_TOKEN wakeup +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN WAKEUP +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002400, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002400, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002400, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002400, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40002400_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40002400_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40002400_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40002400_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/serial@40004400 + * Devicetree node: /otghs_fs_phy * - * Node identifier: DT_N_S_soc_S_serial_40004400 + * Node identifier: DT_N_S_otghs_fs_phy * - * Binding (compatible = st,stm32-usart): - * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * Binding (compatible = usb-nop-xceiv): + * $ZEPHYR_BASE/dts/bindings/phy/usb-nop-xceiv.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_serial_40004400_PATH "/soc/serial@40004400" +#define DT_N_S_otghs_fs_phy_PATH "/otghs_fs_phy" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_40004400_FULL_NAME "serial@40004400" -#define DT_N_S_soc_S_serial_40004400_FULL_NAME_UNQUOTED serial@40004400 -#define DT_N_S_soc_S_serial_40004400_FULL_NAME_TOKEN serial_40004400 -#define DT_N_S_soc_S_serial_40004400_FULL_NAME_UPPER_TOKEN SERIAL_40004400 +#define DT_N_S_otghs_fs_phy_FULL_NAME "otghs_fs_phy" +#define DT_N_S_otghs_fs_phy_FULL_NAME_UNQUOTED otghs_fs_phy +#define DT_N_S_otghs_fs_phy_FULL_NAME_TOKEN otghs_fs_phy +#define DT_N_S_otghs_fs_phy_FULL_NAME_UPPER_TOKEN OTGHS_FS_PHY -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_40004400_PARENT DT_N_S_soc +/* Node parent (/) identifier: */ +#define DT_N_S_otghs_fs_phy_PARENT DT_N /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_40004400_CHILD_IDX 9 +#define DT_N_S_otghs_fs_phy_CHILD_IDX 19 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_40004400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_serial_40004400_FOREACH_NODELABEL(fn) fn(usart2) -#define DT_N_S_soc_S_serial_40004400_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart2, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_otghs_fs_phy_NODELABEL_NUM 1 +#define DT_N_S_otghs_fs_phy_FOREACH_NODELABEL(fn) fn(otghs_fs_phy) +#define DT_N_S_otghs_fs_phy_FOREACH_NODELABEL_VARGS(fn, ...) fn(otghs_fs_phy, __VA_ARGS__) +#define DT_N_S_otghs_fs_phy_FOREACH_ANCESTOR(fn) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_40004400_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_40004400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40004400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_otghs_fs_phy_CHILD_NUM 0 +#define DT_N_S_otghs_fs_phy_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_otghs_fs_phy_FOREACH_CHILD(fn) +#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_serial_40004400_HASH w0whRjCvTBPyVty9dxjB3Bsl1nzzH1xRQTJifgUAAKQ +#define DT_N_S_otghs_fs_phy_HASH o2OMyBwvyxbYltqcvcFLzPkg8jqQm_Azar3MBmQRx1E /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40004400_ORD 113 -#define DT_N_S_soc_S_serial_40004400_ORD_STR_SORTABLE 00113 +#define DT_N_S_otghs_fs_phy_ORD 158 +#define DT_N_S_otghs_fs_phy_ORD_STR_SORTABLE 00158 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_40004400_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 41, +#define DT_N_S_otghs_fs_phy_REQUIRES_ORDS \ + 0, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_40004400_SUPPORTS_ORDS +#define DT_N_S_otghs_fs_phy_SUPPORTS_ORDS \ + 159, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_40004400_EXISTS 1 -#define DT_N_INST_2_st_stm32_usart DT_N_S_soc_S_serial_40004400 -#define DT_N_INST_4_st_stm32_uart DT_N_S_soc_S_serial_40004400 -#define DT_N_NODELABEL_usart2 DT_N_S_soc_S_serial_40004400 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_40004400_REG_NUM 1 -#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_VAL_ADDRESS 1073759232 -#define DT_N_S_soc_S_serial_40004400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_serial_40004400_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_40004400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_40004400_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_irq 38 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_40004400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_MATCHES_st_stm32_usart 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_0 "stm32-usart" -#define DT_N_S_soc_S_serial_40004400_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_COMPAT_MODEL_IDX_1 "stm32-uart" -#define DT_N_S_soc_S_serial_40004400_STATUS_disabled 1 +#define DT_N_S_otghs_fs_phy_EXISTS 1 +#define DT_N_INST_0_usb_nop_xceiv DT_N_S_otghs_fs_phy +#define DT_N_NODELABEL_otghs_fs_phy DT_N_S_otghs_fs_phy + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_otghs_fs_phy_REG_NUM 0 +#define DT_N_S_otghs_fs_phy_RANGES_NUM 0 +#define DT_N_S_otghs_fs_phy_FOREACH_RANGE(fn) +#define DT_N_S_otghs_fs_phy_IRQ_NUM 0 +#define DT_N_S_otghs_fs_phy_IRQ_LEVEL 0 +#define DT_N_S_otghs_fs_phy_COMPAT_MATCHES_usb_nop_xceiv 1 +#define DT_N_S_otghs_fs_phy_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_40004400_PINCTRL_NUM 0 +#define DT_N_S_otghs_fs_phy_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_serial_40004400_P_reg {1073759232, 1024} -#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_0 1073759232 -#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_40004400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bits 131072 -#define DT_N_S_soc_S_serial_40004400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, clocks, 0) -#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, clocks, 0) -#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_40004400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_VAL_id 4625 -#define DT_N_S_soc_S_serial_40004400_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, resets, 0) -#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, resets, 0) -#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_40004400_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_interrupts {38, 0} -#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_0 38 -#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_40004400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_current_speed 115200 -#define DT_N_S_soc_S_serial_40004400_P_current_speed_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_stop_bits "1" -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_STRING_UNQUOTED 1 -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_STRING_TOKEN 1 -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_STRING_UPPER_TOKEN 1 -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0 "1" -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0) -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0) -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_LEN 1 -#define DT_N_S_soc_S_serial_40004400_P_stop_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_data_bits 8 -#define DT_N_S_soc_S_serial_40004400_P_data_bits_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_serial_40004400_P_data_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_data_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_single_wire 0 -#define DT_N_S_soc_S_serial_40004400_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_40004400_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_de_enable 0 -#define DT_N_S_soc_S_serial_40004400_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_40004400_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_40004400_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_de_invert 0 -#define DT_N_S_soc_S_serial_40004400_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_40004400_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_40004400_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_parity "none" -#define DT_N_S_soc_S_serial_40004400_P_parity_STRING_UNQUOTED none -#define DT_N_S_soc_S_serial_40004400_P_parity_STRING_TOKEN none -#define DT_N_S_soc_S_serial_40004400_P_parity_STRING_UPPER_TOKEN NONE -#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0 "none" -#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_serial_40004400_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, parity, 0) -#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, parity, 0) -#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_parity_LEN 1 -#define DT_N_S_soc_S_serial_40004400_P_parity_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_status "disabled" -#define DT_N_S_soc_S_serial_40004400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_serial_40004400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_serial_40004400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_serial_40004400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, status, 0) -#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, status, 0) -#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_status_LEN 1 -#define DT_N_S_soc_S_serial_40004400_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_compatible {"st,stm32-usart", "st,stm32-uart"} -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0 "st,stm32-usart" -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1 "st,stm32-uart" -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_40004400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004400, compatible, 0) \ - fn(DT_N_S_soc_S_serial_40004400, compatible, 1) -#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40004400, compatible, 1) -#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004400, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40004400, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40004400, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004400_P_compatible_LEN 2 -#define DT_N_S_soc_S_serial_40004400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_40004400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_40004400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_40004400_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_tx_invert 0 -#define DT_N_S_soc_S_serial_40004400_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004400_P_rx_invert 0 -#define DT_N_S_soc_S_serial_40004400_P_rx_invert_EXISTS 1 +#define DT_N_S_otghs_fs_phy_P_compatible {"usb-nop-xceiv"} +#define DT_N_S_otghs_fs_phy_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_otghs_fs_phy_P_compatible_IDX_0 "usb-nop-xceiv" +#define DT_N_S_otghs_fs_phy_P_compatible_IDX_0_STRING_UNQUOTED usb-nop-xceiv +#define DT_N_S_otghs_fs_phy_P_compatible_IDX_0_STRING_TOKEN usb_nop_xceiv +#define DT_N_S_otghs_fs_phy_P_compatible_IDX_0_STRING_UPPER_TOKEN USB_NOP_XCEIV +#define DT_N_S_otghs_fs_phy_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_otghs_fs_phy, compatible, 0) +#define DT_N_S_otghs_fs_phy_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_otghs_fs_phy, compatible, 0) +#define DT_N_S_otghs_fs_phy_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_otghs_fs_phy, compatible, 0, __VA_ARGS__) +#define DT_N_S_otghs_fs_phy_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_otghs_fs_phy, compatible, 0, __VA_ARGS__) +#define DT_N_S_otghs_fs_phy_P_compatible_LEN 1 +#define DT_N_S_otghs_fs_phy_P_compatible_EXISTS 1 +#define DT_N_S_otghs_fs_phy_P_zephyr_deferred_init 0 +#define DT_N_S_otghs_fs_phy_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_otghs_fs_phy_P_wakeup_source 0 +#define DT_N_S_otghs_fs_phy_P_wakeup_source_EXISTS 1 +#define DT_N_S_otghs_fs_phy_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_otghs_fs_phy_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/serial@40004800 + * Devicetree node: /soc/usb@40080000 * - * Node identifier: DT_N_S_soc_S_serial_40004800 + * Node identifier: DT_N_S_soc_S_usb_40080000 * - * Binding (compatible = st,stm32-usart): - * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-usart.yaml + * Binding (compatible = st,stm32-otgfs): + * $ZEPHYR_BASE/dts/bindings/usb/st,stm32-otgfs.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_serial_40004800_PATH "/soc/serial@40004800" +#define DT_N_S_soc_S_usb_40080000_PATH "/soc/usb@40080000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_40004800_FULL_NAME "serial@40004800" -#define DT_N_S_soc_S_serial_40004800_FULL_NAME_UNQUOTED serial@40004800 -#define DT_N_S_soc_S_serial_40004800_FULL_NAME_TOKEN serial_40004800 -#define DT_N_S_soc_S_serial_40004800_FULL_NAME_UPPER_TOKEN SERIAL_40004800 +#define DT_N_S_soc_S_usb_40080000_FULL_NAME "usb@40080000" +#define DT_N_S_soc_S_usb_40080000_FULL_NAME_UNQUOTED usb@40080000 +#define DT_N_S_soc_S_usb_40080000_FULL_NAME_TOKEN usb_40080000 +#define DT_N_S_soc_S_usb_40080000_FULL_NAME_UPPER_TOKEN USB_40080000 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_40004800_PARENT DT_N_S_soc +#define DT_N_S_soc_S_usb_40080000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_40004800_CHILD_IDX 10 +#define DT_N_S_soc_S_usb_40080000_CHILD_IDX 69 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_40004800_NODELABEL_NUM 1 -#define DT_N_S_soc_S_serial_40004800_FOREACH_NODELABEL(fn) fn(usart3) -#define DT_N_S_soc_S_serial_40004800_FOREACH_NODELABEL_VARGS(fn, ...) fn(usart3, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_usb_40080000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_usb_40080000_FOREACH_NODELABEL(fn) fn(usbotg_fs) +#define DT_N_S_soc_S_usb_40080000_FOREACH_NODELABEL_VARGS(fn, ...) fn(usbotg_fs, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_40004800_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_40004800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40004800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_usb_40080000_CHILD_NUM 0 +#define DT_N_S_soc_S_usb_40080000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_serial_40004800_HASH zEiuovs75QHyumn1pL5rvTd5x6H1bdnak278L4bYuj0 +#define DT_N_S_soc_S_usb_40080000_HASH xQGu00gNbjCT_OUyCiyF7fOwmsW7_CAqPiYuAkB0nlI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40004800_ORD 114 -#define DT_N_S_soc_S_serial_40004800_ORD_STR_SORTABLE 00114 +#define DT_N_S_soc_S_usb_40080000_ORD 159 +#define DT_N_S_soc_S_usb_40080000_ORD_STR_SORTABLE 00159 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_40004800_REQUIRES_ORDS \ +#define DT_N_S_soc_S_usb_40080000_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 158, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_40004800_SUPPORTS_ORDS +#define DT_N_S_soc_S_usb_40080000_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_40004800_EXISTS 1 -#define DT_N_INST_3_st_stm32_usart DT_N_S_soc_S_serial_40004800 -#define DT_N_INST_5_st_stm32_uart DT_N_S_soc_S_serial_40004800 -#define DT_N_NODELABEL_usart3 DT_N_S_soc_S_serial_40004800 +#define DT_N_S_soc_S_usb_40080000_EXISTS 1 +#define DT_N_INST_0_st_stm32_otgfs DT_N_S_soc_S_usb_40080000 +#define DT_N_NODELABEL_usbotg_fs DT_N_S_soc_S_usb_40080000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_40004800_REG_NUM 1 -#define DT_N_S_soc_S_serial_40004800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_REG_IDX_0_VAL_ADDRESS 1073760256 -#define DT_N_S_soc_S_serial_40004800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_serial_40004800_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_40004800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_40004800_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_irq 39 -#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_40004800_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_40004800_COMPAT_MATCHES_st_stm32_usart 1 -#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_0 "stm32-usart" -#define DT_N_S_soc_S_serial_40004800_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_COMPAT_MODEL_IDX_1 "stm32-uart" -#define DT_N_S_soc_S_serial_40004800_STATUS_disabled 1 +#define DT_N_S_soc_S_usb_40080000_REG_NUM 1 +#define DT_N_S_soc_S_usb_40080000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_REG_IDX_0_VAL_ADDRESS 1074266112 +#define DT_N_S_soc_S_usb_40080000_REG_IDX_0_VAL_SIZE 262144 +#define DT_N_S_soc_S_usb_40080000_RANGES_NUM 0 +#define DT_N_S_soc_S_usb_40080000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_usb_40080000_IRQ_NUM 4 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_irq 98 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_irq 99 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_irq 100 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_irq 101 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_usb_40080000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_out_VAL_irq DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_out_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_out_VAL_priority DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_out_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_out_CONTROLLER DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_in_VAL_irq DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_irq +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_in_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_in_VAL_priority DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_priority +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_in_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_in_CONTROLLER DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_CONTROLLER +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_wkup_VAL_irq DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_irq +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_wkup_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_wkup_VAL_priority DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_priority +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_wkup_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_wkup_CONTROLLER DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_CONTROLLER +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_otgfs_VAL_irq DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_irq +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_otgfs_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_otgfs_VAL_priority DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_priority +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_otgfs_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_otgfs_CONTROLLER DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_CONTROLLER +#define DT_N_S_soc_S_usb_40080000_COMPAT_MATCHES_st_stm32_otgfs 1 +#define DT_N_S_soc_S_usb_40080000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_usb_40080000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_COMPAT_MODEL_IDX_0 "stm32-otgfs" +#define DT_N_S_soc_S_usb_40080000_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_40004800_PINCTRL_NUM 0 +#define DT_N_S_soc_S_usb_40080000_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_serial_40004800_P_reg {1073760256, 1024} -#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_0 1073760256 -#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_40004800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bits 262144 -#define DT_N_S_soc_S_serial_40004800_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, clocks, 0) -#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, clocks, 0) -#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_40004800_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_VAL_id 4626 -#define DT_N_S_soc_S_serial_40004800_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, resets, 0) -#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, resets, 0) -#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_40004800_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_interrupts {39, 0} -#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_0 39 -#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_40004800_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_current_speed 115200 -#define DT_N_S_soc_S_serial_40004800_P_current_speed_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_stop_bits "1" -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_STRING_UNQUOTED 1 -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_STRING_TOKEN 1 -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_STRING_UPPER_TOKEN 1 -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0 "1" -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0) -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0) -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_LEN 1 -#define DT_N_S_soc_S_serial_40004800_P_stop_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_data_bits 8 -#define DT_N_S_soc_S_serial_40004800_P_data_bits_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_serial_40004800_P_data_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_data_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_single_wire 0 -#define DT_N_S_soc_S_serial_40004800_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_40004800_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_de_enable 0 -#define DT_N_S_soc_S_serial_40004800_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_40004800_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_40004800_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_de_invert 0 -#define DT_N_S_soc_S_serial_40004800_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_40004800_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_40004800_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_parity "none" -#define DT_N_S_soc_S_serial_40004800_P_parity_STRING_UNQUOTED none -#define DT_N_S_soc_S_serial_40004800_P_parity_STRING_TOKEN none -#define DT_N_S_soc_S_serial_40004800_P_parity_STRING_UPPER_TOKEN NONE -#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0 "none" -#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_serial_40004800_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, parity, 0) -#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, parity, 0) -#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_parity_LEN 1 -#define DT_N_S_soc_S_serial_40004800_P_parity_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_status "disabled" -#define DT_N_S_soc_S_serial_40004800_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_serial_40004800_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_serial_40004800_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_serial_40004800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, status, 0) -#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, status, 0) -#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_status_LEN 1 -#define DT_N_S_soc_S_serial_40004800_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_compatible {"st,stm32-usart", "st,stm32-uart"} -#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0 "st,stm32-usart" -#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-usart -#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_STRING_TOKEN st_stm32_usart -#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_USART -#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1 "st,stm32-uart" -#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_40004800_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40004800, compatible, 0) \ - fn(DT_N_S_soc_S_serial_40004800, compatible, 1) -#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40004800, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40004800, compatible, 1) -#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40004800, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40004800, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40004800, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40004800, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40004800_P_compatible_LEN 2 -#define DT_N_S_soc_S_serial_40004800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_40004800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_40004800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_40004800_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_tx_invert 0 -#define DT_N_S_soc_S_serial_40004800_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40004800_P_rx_invert 0 -#define DT_N_S_soc_S_serial_40004800_P_rx_invert_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_reg {1074266112, 262144} +#define DT_N_S_soc_S_usb_40080000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_reg_IDX_0 1074266112 +#define DT_N_S_soc_S_usb_40080000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_reg_IDX_1 262144 +#define DT_N_S_soc_S_usb_40080000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupts {98, 0, 99, 0, 100, 0, 101, 0} +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_0 98 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_2 99 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_4 100 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_6 101 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_usb_40080000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_ram_size 4096 +#define DT_N_S_soc_S_usb_40080000_P_ram_size_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_phys DT_N_S_otghs_fs_phy +#define DT_N_S_soc_S_usb_40080000_P_phys_IDX_0 DT_N_S_otghs_fs_phy +#define DT_N_S_soc_S_usb_40080000_P_phys_IDX_0_PH DT_N_S_otghs_fs_phy +#define DT_N_S_soc_S_usb_40080000_P_phys_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_phys_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, phys, 0) +#define DT_N_S_soc_S_usb_40080000_P_phys_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, phys, 0) +#define DT_N_S_soc_S_usb_40080000_P_phys_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, phys, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_phys_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, phys, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_phys_LEN 1 +#define DT_N_S_soc_S_usb_40080000_P_phys_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_VAL_bus 216 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_VAL_bits 134217728 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_VAL_bus 5 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_VAL_bits 416546900 +#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, clocks, 0) \ + fn(DT_N_S_soc_S_usb_40080000, clocks, 1) +#define DT_N_S_soc_S_usb_40080000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40080000, clocks, 1) +#define DT_N_S_soc_S_usb_40080000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, clocks, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40080000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40080000, clocks, 1, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_clocks_LEN 2 +#define DT_N_S_soc_S_usb_40080000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_num_bidir_endpoints 9 +#define DT_N_S_soc_S_usb_40080000_P_num_bidir_endpoints_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed "full-speed" +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_STRING_UNQUOTED full-speed +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_STRING_TOKEN full_speed +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_STRING_UPPER_TOKEN FULL_SPEED +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_IDX_0 "full-speed" +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_IDX_0_ENUM_VAL_full_speed_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, maximum_speed, 0) +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, maximum_speed, 0) +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, maximum_speed, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, maximum_speed, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_LEN 1 +#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_status "disabled" +#define DT_N_S_soc_S_usb_40080000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_usb_40080000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_usb_40080000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_usb_40080000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_usb_40080000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_usb_40080000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, status, 0) +#define DT_N_S_soc_S_usb_40080000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, status, 0) +#define DT_N_S_soc_S_usb_40080000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_status_LEN 1 +#define DT_N_S_soc_S_usb_40080000_P_status_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_compatible {"st,stm32-otgfs"} +#define DT_N_S_soc_S_usb_40080000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_compatible_IDX_0 "st,stm32-otgfs" +#define DT_N_S_soc_S_usb_40080000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-otgfs +#define DT_N_S_soc_S_usb_40080000_P_compatible_IDX_0_STRING_TOKEN st_stm32_otgfs +#define DT_N_S_soc_S_usb_40080000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_OTGFS +#define DT_N_S_soc_S_usb_40080000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, compatible, 0) +#define DT_N_S_soc_S_usb_40080000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, compatible, 0) +#define DT_N_S_soc_S_usb_40080000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_compatible_LEN 1 +#define DT_N_S_soc_S_usb_40080000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names {"ep1_out", "ep1_in", "wkup", "otgfs"} +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_0 "ep1_out" +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_0_STRING_UNQUOTED ep1_out +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_0_STRING_TOKEN ep1_out +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN EP1_OUT +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_1 "ep1_in" +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_1_STRING_UNQUOTED ep1_in +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_1_STRING_TOKEN ep1_in +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN EP1_IN +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_2 "wkup" +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_2_STRING_UNQUOTED wkup +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_2_STRING_TOKEN wkup +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN WKUP +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_3 "otgfs" +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_3_STRING_UNQUOTED otgfs +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_3_STRING_TOKEN otgfs +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN OTGFS +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 0) \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 1) \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 2) \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 3) +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 3) +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 3, __VA_ARGS__) +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_LEN 4 +#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_usb_40080000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_wakeup_source 0 +#define DT_N_S_soc_S_usb_40080000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_usb_40080000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_usb_40080000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/serial@40005000 + * Devicetree node: /soc/watchdog@50003000 * - * Node identifier: DT_N_S_soc_S_serial_40005000 + * Node identifier: DT_N_S_soc_S_watchdog_50003000 * - * Binding (compatible = st,stm32-uart): - * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-uart.yaml + * Binding (compatible = st,stm32-window-watchdog): + * $ZEPHYR_BASE/dts/bindings/watchdog/st,stm32-window-watchdog.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_serial_40005000_PATH "/soc/serial@40005000" +#define DT_N_S_soc_S_watchdog_50003000_PATH "/soc/watchdog@50003000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_40005000_FULL_NAME "serial@40005000" -#define DT_N_S_soc_S_serial_40005000_FULL_NAME_UNQUOTED serial@40005000 -#define DT_N_S_soc_S_serial_40005000_FULL_NAME_TOKEN serial_40005000 -#define DT_N_S_soc_S_serial_40005000_FULL_NAME_UPPER_TOKEN SERIAL_40005000 +#define DT_N_S_soc_S_watchdog_50003000_FULL_NAME "watchdog@50003000" +#define DT_N_S_soc_S_watchdog_50003000_FULL_NAME_UNQUOTED watchdog@50003000 +#define DT_N_S_soc_S_watchdog_50003000_FULL_NAME_TOKEN watchdog_50003000 +#define DT_N_S_soc_S_watchdog_50003000_FULL_NAME_UPPER_TOKEN WATCHDOG_50003000 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_40005000_PARENT DT_N_S_soc +#define DT_N_S_soc_S_watchdog_50003000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_40005000_CHILD_IDX 12 +#define DT_N_S_soc_S_watchdog_50003000_CHILD_IDX 7 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_40005000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_serial_40005000_FOREACH_NODELABEL(fn) fn(uart5) -#define DT_N_S_soc_S_serial_40005000_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart5, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_watchdog_50003000_NODELABEL_NUM 2 +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_NODELABEL(fn) fn(wwdg) fn(wwdg1) +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_NODELABEL_VARGS(fn, ...) fn(wwdg, __VA_ARGS__) fn(wwdg1, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_40005000_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_40005000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40005000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_watchdog_50003000_CHILD_NUM 0 +#define DT_N_S_soc_S_watchdog_50003000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_serial_40005000_HASH zMMX5P6gmfqIczU7IzsjM4mPclQdCNjtpO0LqCzLhTI +#define DT_N_S_soc_S_watchdog_50003000_HASH h6NwKkuA2dqrATUehpYE_fmTSXYsEpA87_DH2Xd1Ie8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40005000_ORD 115 -#define DT_N_S_soc_S_serial_40005000_ORD_STR_SORTABLE 00115 +#define DT_N_S_soc_S_watchdog_50003000_ORD 160 +#define DT_N_S_soc_S_watchdog_50003000_ORD_STR_SORTABLE 00160 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_40005000_REQUIRES_ORDS \ +#define DT_N_S_soc_S_watchdog_50003000_REQUIRES_ORDS \ 3, \ 4, \ - 8, \ - 41, + 8, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_40005000_SUPPORTS_ORDS +#define DT_N_S_soc_S_watchdog_50003000_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_40005000_EXISTS 1 -#define DT_N_INST_6_st_stm32_uart DT_N_S_soc_S_serial_40005000 -#define DT_N_NODELABEL_uart5 DT_N_S_soc_S_serial_40005000 +#define DT_N_S_soc_S_watchdog_50003000_EXISTS 1 +#define DT_N_INST_0_st_stm32_window_watchdog DT_N_S_soc_S_watchdog_50003000 +#define DT_N_NODELABEL_wwdg DT_N_S_soc_S_watchdog_50003000 +#define DT_N_NODELABEL_wwdg1 DT_N_S_soc_S_watchdog_50003000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_40005000_REG_NUM 1 -#define DT_N_S_soc_S_serial_40005000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_REG_IDX_0_VAL_ADDRESS 1073762304 -#define DT_N_S_soc_S_serial_40005000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_serial_40005000_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_40005000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_40005000_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_VAL_irq 53 -#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_40005000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_40005000_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_40005000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40005000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_COMPAT_MODEL_IDX_0 "stm32-uart" -#define DT_N_S_soc_S_serial_40005000_STATUS_disabled 1 +#define DT_N_S_soc_S_watchdog_50003000_REG_NUM 1 +#define DT_N_S_soc_S_watchdog_50003000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_REG_IDX_0_VAL_ADDRESS 1342189568 +#define DT_N_S_soc_S_watchdog_50003000_REG_IDX_0_VAL_SIZE 4096 +#define DT_N_S_soc_S_watchdog_50003000_RANGES_NUM 0 +#define DT_N_S_soc_S_watchdog_50003000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_watchdog_50003000_IRQ_NUM 1 +#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_VAL_irq 0 +#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_VAL_priority 7 +#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_watchdog_50003000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_watchdog_50003000_COMPAT_MATCHES_st_stm32_window_watchdog 1 +#define DT_N_S_soc_S_watchdog_50003000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_watchdog_50003000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_COMPAT_MODEL_IDX_0 "stm32-window-watchdog" +#define DT_N_S_soc_S_watchdog_50003000_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_40005000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_watchdog_50003000_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_serial_40005000_P_reg {1073762304, 1024} -#define DT_N_S_soc_S_serial_40005000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_reg_IDX_0 1073762304 -#define DT_N_S_soc_S_serial_40005000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_40005000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_VAL_bits 1048576 -#define DT_N_S_soc_S_serial_40005000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, clocks, 0) -#define DT_N_S_soc_S_serial_40005000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, clocks, 0) -#define DT_N_S_soc_S_serial_40005000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_40005000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_40005000_P_resets_IDX_0_VAL_id 4628 -#define DT_N_S_soc_S_serial_40005000_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, resets, 0) -#define DT_N_S_soc_S_serial_40005000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, resets, 0) -#define DT_N_S_soc_S_serial_40005000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_40005000_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_interrupts {53, 0} -#define DT_N_S_soc_S_serial_40005000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_interrupts_IDX_0 53 -#define DT_N_S_soc_S_serial_40005000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_40005000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_current_speed 115200 -#define DT_N_S_soc_S_serial_40005000_P_current_speed_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_stop_bits "1" -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_STRING_UNQUOTED 1 -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_STRING_TOKEN 1 -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_STRING_UPPER_TOKEN 1 -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_IDX_0 "1" -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, stop_bits, 0) -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, stop_bits, 0) -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_LEN 1 -#define DT_N_S_soc_S_serial_40005000_P_stop_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_data_bits 8 -#define DT_N_S_soc_S_serial_40005000_P_data_bits_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_serial_40005000_P_data_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_data_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_single_wire 0 -#define DT_N_S_soc_S_serial_40005000_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_40005000_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_de_enable 0 -#define DT_N_S_soc_S_serial_40005000_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_40005000_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_40005000_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_de_invert 0 -#define DT_N_S_soc_S_serial_40005000_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_40005000_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_40005000_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_parity "none" -#define DT_N_S_soc_S_serial_40005000_P_parity_STRING_UNQUOTED none -#define DT_N_S_soc_S_serial_40005000_P_parity_STRING_TOKEN none -#define DT_N_S_soc_S_serial_40005000_P_parity_STRING_UPPER_TOKEN NONE -#define DT_N_S_soc_S_serial_40005000_P_parity_IDX_0 "none" -#define DT_N_S_soc_S_serial_40005000_P_parity_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_parity_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_serial_40005000_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, parity, 0) -#define DT_N_S_soc_S_serial_40005000_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, parity, 0) -#define DT_N_S_soc_S_serial_40005000_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_parity_LEN 1 -#define DT_N_S_soc_S_serial_40005000_P_parity_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_status "disabled" -#define DT_N_S_soc_S_serial_40005000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_serial_40005000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_serial_40005000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_serial_40005000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_serial_40005000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_serial_40005000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, status, 0) -#define DT_N_S_soc_S_serial_40005000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, status, 0) -#define DT_N_S_soc_S_serial_40005000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_status_LEN 1 -#define DT_N_S_soc_S_serial_40005000_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_compatible {"st,stm32-uart"} -#define DT_N_S_soc_S_serial_40005000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_compatible_IDX_0 "st,stm32-uart" -#define DT_N_S_soc_S_serial_40005000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_40005000_P_compatible_IDX_0_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_40005000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_40005000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40005000, compatible, 0) -#define DT_N_S_soc_S_serial_40005000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40005000, compatible, 0) -#define DT_N_S_soc_S_serial_40005000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40005000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40005000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40005000_P_compatible_LEN 1 -#define DT_N_S_soc_S_serial_40005000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_40005000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_40005000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_40005000_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_tx_invert 0 -#define DT_N_S_soc_S_serial_40005000_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40005000_P_rx_invert 0 -#define DT_N_S_soc_S_serial_40005000_P_rx_invert_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_reg {1342189568, 4096} +#define DT_N_S_soc_S_watchdog_50003000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_reg_IDX_0 1342189568 +#define DT_N_S_soc_S_watchdog_50003000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_reg_IDX_1 4096 +#define DT_N_S_soc_S_watchdog_50003000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_VAL_bus 228 +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_VAL_bits 64 +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_50003000, clocks, 0) +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_50003000, clocks, 0) +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_50003000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_50003000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_LEN 1 +#define DT_N_S_soc_S_watchdog_50003000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_status "disabled" +#define DT_N_S_soc_S_watchdog_50003000_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_watchdog_50003000_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_watchdog_50003000_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_watchdog_50003000_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_watchdog_50003000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_watchdog_50003000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_50003000, status, 0) +#define DT_N_S_soc_S_watchdog_50003000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_50003000, status, 0) +#define DT_N_S_soc_S_watchdog_50003000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_50003000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_50003000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_50003000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_50003000_P_status_LEN 1 +#define DT_N_S_soc_S_watchdog_50003000_P_status_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_compatible {"st,stm32-window-watchdog"} +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_IDX_0 "st,stm32-window-watchdog" +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-window-watchdog +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_IDX_0_STRING_TOKEN st_stm32_window_watchdog +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_WINDOW_WATCHDOG +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_50003000, compatible, 0) +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_50003000, compatible, 0) +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_50003000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_50003000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_LEN 1 +#define DT_N_S_soc_S_watchdog_50003000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_interrupts {0, 7} +#define DT_N_S_soc_S_watchdog_50003000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_interrupts_IDX_0 0 +#define DT_N_S_soc_S_watchdog_50003000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_interrupts_IDX_1 7 +#define DT_N_S_soc_S_watchdog_50003000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_watchdog_50003000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_wakeup_source 0 +#define DT_N_S_soc_S_watchdog_50003000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_watchdog_50003000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_watchdog_50003000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/uart8_rx_pj9 + * Devicetree node: /soc/watchdog@58004800 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9 + * Node identifier: DT_N_S_soc_S_watchdog_58004800 + * + * Binding (compatible = st,stm32-watchdog): + * $ZEPHYR_BASE/dts/bindings/watchdog/st,stm32-watchdog.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_PATH "/soc/pin-controller@58020000/uart8_rx_pj9" +#define DT_N_S_soc_S_watchdog_58004800_PATH "/soc/watchdog@58004800" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FULL_NAME "uart8_rx_pj9" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FULL_NAME_UNQUOTED uart8_rx_pj9 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FULL_NAME_TOKEN uart8_rx_pj9 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FULL_NAME_UPPER_TOKEN UART8_RX_PJ9 +#define DT_N_S_soc_S_watchdog_58004800_FULL_NAME "watchdog@58004800" +#define DT_N_S_soc_S_watchdog_58004800_FULL_NAME_UNQUOTED watchdog@58004800 +#define DT_N_S_soc_S_watchdog_58004800_FULL_NAME_TOKEN watchdog_58004800 +#define DT_N_S_soc_S_watchdog_58004800_FULL_NAME_UPPER_TOKEN WATCHDOG_58004800 -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_watchdog_58004800_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_CHILD_IDX 83 +#define DT_N_S_soc_S_watchdog_58004800_CHILD_IDX 6 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_NODELABEL(fn) fn(uart8_rx_pj9) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart8_rx_pj9, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_watchdog_58004800_NODELABEL_NUM 2 +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_NODELABEL(fn) fn(iwdg) fn(iwdg1) +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_NODELABEL_VARGS(fn, ...) fn(iwdg, __VA_ARGS__) fn(iwdg1, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_watchdog_58004800_CHILD_NUM 0 +#define DT_N_S_soc_S_watchdog_58004800_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_HASH hlIXxX757bfq7rr8_wXbtlMaMqgSQ9fZS_eQnVOxLXE +#define DT_N_S_soc_S_watchdog_58004800_HASH hmuLGnCZ0GRUbiqizyisLpZoBY0jIIGA5bKix63nTGY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_ORD 116 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_ORD_STR_SORTABLE 00116 +#define DT_N_S_soc_S_watchdog_58004800_ORD 161 +#define DT_N_S_soc_S_watchdog_58004800_ORD_STR_SORTABLE 00161 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_watchdog_58004800_REQUIRES_ORDS \ + 3, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_SUPPORTS_ORDS \ - 118, +#define DT_N_S_soc_S_watchdog_58004800_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_EXISTS 1 -#define DT_N_NODELABEL_uart8_rx_pj9 DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9 +#define DT_N_S_soc_S_watchdog_58004800_EXISTS 1 +#define DT_N_INST_0_st_stm32_watchdog DT_N_S_soc_S_watchdog_58004800 +#define DT_N_NODELABEL_iwdg DT_N_S_soc_S_watchdog_58004800 +#define DT_N_NODELABEL_iwdg1 DT_N_S_soc_S_watchdog_58004800 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_STATUS_okay 1 +#define DT_N_S_soc_S_watchdog_58004800_REG_NUM 1 +#define DT_N_S_soc_S_watchdog_58004800_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_REG_IDX_0_VAL_ADDRESS 1476413440 +#define DT_N_S_soc_S_watchdog_58004800_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_watchdog_58004800_RANGES_NUM 0 +#define DT_N_S_soc_S_watchdog_58004800_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_watchdog_58004800_IRQ_NUM 0 +#define DT_N_S_soc_S_watchdog_58004800_IRQ_LEVEL 0 +#define DT_N_S_soc_S_watchdog_58004800_COMPAT_MATCHES_st_stm32_watchdog 1 +#define DT_N_S_soc_S_watchdog_58004800_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_watchdog_58004800_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_COMPAT_MODEL_IDX_0 "stm32-watchdog" +#define DT_N_S_soc_S_watchdog_58004800_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_PINCTRL_NUM 0 +#define DT_N_S_soc_S_watchdog_58004800_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_pinmux 4904 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_reg {1476413440, 1024} +#define DT_N_S_soc_S_watchdog_58004800_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_reg_IDX_0 1476413440 +#define DT_N_S_soc_S_watchdog_58004800_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_watchdog_58004800_P_reg_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_status "disabled" +#define DT_N_S_soc_S_watchdog_58004800_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_watchdog_58004800_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_watchdog_58004800_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_watchdog_58004800_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_watchdog_58004800_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_watchdog_58004800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_58004800, status, 0) +#define DT_N_S_soc_S_watchdog_58004800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_58004800, status, 0) +#define DT_N_S_soc_S_watchdog_58004800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_58004800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_58004800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_58004800, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_58004800_P_status_LEN 1 +#define DT_N_S_soc_S_watchdog_58004800_P_status_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_compatible {"st,stm32-watchdog"} +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_IDX_0 "st,stm32-watchdog" +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-watchdog +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_IDX_0_STRING_TOKEN st_stm32_watchdog +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_WATCHDOG +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_58004800, compatible, 0) +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_58004800, compatible, 0) +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_58004800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_58004800, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_LEN 1 +#define DT_N_S_soc_S_watchdog_58004800_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_watchdog_58004800_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_wakeup_source 0 +#define DT_N_S_soc_S_watchdog_58004800_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_watchdog_58004800_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_watchdog_58004800_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/uart8_tx_pj8 + * Devicetree node: /soc/adc@40022000/channel@0 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8 + * Node identifier: DT_N_S_soc_S_adc_40022000_S_channel_0 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_PATH "/soc/pin-controller@58020000/uart8_tx_pj8" +#define DT_N_S_soc_S_adc_40022000_S_channel_0_PATH "/soc/adc@40022000/channel@0" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FULL_NAME "uart8_tx_pj8" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FULL_NAME_UNQUOTED uart8_tx_pj8 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FULL_NAME_TOKEN uart8_tx_pj8 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FULL_NAME_UPPER_TOKEN UART8_TX_PJ8 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FULL_NAME "channel@0" +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FULL_NAME_UNQUOTED channel@0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FULL_NAME_TOKEN channel_0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FULL_NAME_UPPER_TOKEN CHANNEL_0 -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc/adc@40022000) identifier: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_0_PARENT DT_N_S_soc_S_adc_40022000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_CHILD_IDX 88 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_CHILD_IDX 4 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_NODELABEL(fn) fn(uart8_tx_pj8) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart8_tx_pj8, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_NODELABEL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_HASH BO0LRKXIs8N51u90GcdoQpkuAGXhNxF284NOMqIsIdk +#define DT_N_S_soc_S_adc_40022000_S_channel_0_HASH PJJSNRXcN3GbrGs1wmylaq2kC9vWycnum1vMNckvf_M /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_ORD 117 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_ORD_STR_SORTABLE 00117 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_ORD 162 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_ORD_STR_SORTABLE 00162 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_adc_40022000_S_channel_0_REQUIRES_ORDS \ + 48, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_SUPPORTS_ORDS \ - 118, +#define DT_N_S_soc_S_adc_40022000_S_channel_0_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_EXISTS 1 -#define DT_N_NODELABEL_uart8_tx_pj8 DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_EXISTS 1 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_STATUS_okay 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_REG_NUM 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_REG_IDX_0_VAL_ADDRESS 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_IRQ_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_IRQ_LEVEL 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_PINCTRL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_pinmux 4872 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_reg {0} +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_reg_IDX_0 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_STRING_UNQUOTED ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_STRING_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_STRING_UPPER_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_IDX_0 "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_IDX_0_ENUM_IDX 9 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_IDX_0_ENUM_VAL_ADC_GAIN_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_gain_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_STRING_UNQUOTED ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_STRING_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_STRING_UPPER_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_IDX_0 "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_IDX_0_ENUM_IDX 4 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_IDX_0_ENUM_VAL_ADC_REF_INTERNAL_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_reference_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_acquisition_time 16383 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_acquisition_time_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_differential 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_differential_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_resolution 16 +#define DT_N_S_soc_S_adc_40022000_S_channel_0_P_zephyr_resolution_EXISTS 1 /* - * Devicetree node: /soc/serial@40007c00 - * - * Node identifier: DT_N_S_soc_S_serial_40007c00 + * Devicetree node: /soc/adc@40022000/channel@1 * - * Binding (compatible = st,stm32-uart): - * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-uart.yaml + * Node identifier: DT_N_S_soc_S_adc_40022000_S_channel_1 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_serial_40007c00_PATH "/soc/serial@40007c00" +#define DT_N_S_soc_S_adc_40022000_S_channel_1_PATH "/soc/adc@40022000/channel@1" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_40007c00_FULL_NAME "serial@40007c00" -#define DT_N_S_soc_S_serial_40007c00_FULL_NAME_UNQUOTED serial@40007c00 -#define DT_N_S_soc_S_serial_40007c00_FULL_NAME_TOKEN serial_40007c00 -#define DT_N_S_soc_S_serial_40007c00_FULL_NAME_UPPER_TOKEN SERIAL_40007C00 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FULL_NAME "channel@1" +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FULL_NAME_UNQUOTED channel@1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FULL_NAME_TOKEN channel_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FULL_NAME_UPPER_TOKEN CHANNEL_1 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_40007c00_PARENT DT_N_S_soc +/* Node parent (/soc/adc@40022000) identifier: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_1_PARENT DT_N_S_soc_S_adc_40022000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_40007c00_CHILD_IDX 15 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_CHILD_IDX 5 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_40007c00_NODELABEL_NUM 1 -#define DT_N_S_soc_S_serial_40007c00_FOREACH_NODELABEL(fn) fn(uart8) -#define DT_N_S_soc_S_serial_40007c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(uart8, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_NODELABEL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_40007c00_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_40007c00_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_40007c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_serial_40007c00_HASH X_JkTKIJdI0eAWONgmNDDiIT_A1U0dqJMPoCmX7VfRo +#define DT_N_S_soc_S_adc_40022000_S_channel_1_HASH 265ZdJS_q4RHg6Q2AsRDqB_HgIppHi9gtfY_8NZUtVo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40007c00_ORD 118 -#define DT_N_S_soc_S_serial_40007c00_ORD_STR_SORTABLE 00118 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_ORD 163 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_ORD_STR_SORTABLE 00163 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_40007c00_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 41, \ - 116, \ - 117, +#define DT_N_S_soc_S_adc_40022000_S_channel_1_REQUIRES_ORDS \ + 48, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_40007c00_SUPPORTS_ORDS +#define DT_N_S_soc_S_adc_40022000_S_channel_1_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_40007c00_EXISTS 1 -#define DT_N_INST_7_st_stm32_uart DT_N_S_soc_S_serial_40007c00 -#define DT_N_NODELABEL_uart8 DT_N_S_soc_S_serial_40007c00 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_EXISTS 1 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_40007c00_REG_NUM 1 -#define DT_N_S_soc_S_serial_40007c00_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_REG_IDX_0_VAL_ADDRESS 1073773568 -#define DT_N_S_soc_S_serial_40007c00_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_serial_40007c00_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_40007c00_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_40007c00_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_VAL_irq 83 -#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_40007c00_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_40007c00_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_40007c00_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_40007c00_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_COMPAT_MODEL_IDX_0 "stm32-uart" -#define DT_N_S_soc_S_serial_40007c00_STATUS_disabled 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_REG_NUM 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_REG_IDX_0_VAL_ADDRESS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_IRQ_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_IRQ_LEVEL 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_40007c00_PINCTRL_NUM 1 -#define DT_N_S_soc_S_serial_40007c00_PINCTRL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_PINCTRL_IDX_0_TOKEN default -#define DT_N_S_soc_S_serial_40007c00_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40007c00_PINCTRL_NAME_default_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_PINCTRL_NAME_default_IDX 0 -#define DT_N_S_soc_S_serial_40007c00_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8 -#define DT_N_S_soc_S_serial_40007c00_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_serial_40007c00_P_reg {1073773568, 1024} -#define DT_N_S_soc_S_serial_40007c00_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_reg_IDX_0 1073773568 -#define DT_N_S_soc_S_serial_40007c00_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_40007c00_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_VAL_bits 2147483648 -#define DT_N_S_soc_S_serial_40007c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, clocks, 0) -#define DT_N_S_soc_S_serial_40007c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, clocks, 0) -#define DT_N_S_soc_S_serial_40007c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_40007c00_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_40007c00_P_resets_IDX_0_VAL_id 4639 -#define DT_N_S_soc_S_serial_40007c00_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, resets, 0) -#define DT_N_S_soc_S_serial_40007c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, resets, 0) -#define DT_N_S_soc_S_serial_40007c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_40007c00_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_interrupts {83, 0} -#define DT_N_S_soc_S_serial_40007c00_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_interrupts_IDX_0 83 -#define DT_N_S_soc_S_serial_40007c00_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_40007c00_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_current_speed 115200 -#define DT_N_S_soc_S_serial_40007c00_P_current_speed_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits "1" -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_STRING_UNQUOTED 1 -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_STRING_TOKEN 1 -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_STRING_UPPER_TOKEN 1 -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_IDX_0 "1" -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, stop_bits, 0) -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, stop_bits, 0) -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_LEN 1 -#define DT_N_S_soc_S_serial_40007c00_P_stop_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_data_bits 8 -#define DT_N_S_soc_S_serial_40007c00_P_data_bits_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_serial_40007c00_P_data_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_data_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_single_wire 0 -#define DT_N_S_soc_S_serial_40007c00_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_40007c00_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 0) \ - fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 1) -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_40007c00, pinctrl_0, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_LEN 2 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names {"default"} -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_IDX_0 "default" -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_IDX_0_STRING_UNQUOTED default -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_IDX_0_STRING_TOKEN default -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_names, 0) -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_LEN 1 -#define DT_N_S_soc_S_serial_40007c00_P_pinctrl_names_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_de_enable 0 -#define DT_N_S_soc_S_serial_40007c00_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_40007c00_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_40007c00_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_de_invert 0 -#define DT_N_S_soc_S_serial_40007c00_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_40007c00_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_40007c00_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_parity "none" -#define DT_N_S_soc_S_serial_40007c00_P_parity_STRING_UNQUOTED none -#define DT_N_S_soc_S_serial_40007c00_P_parity_STRING_TOKEN none -#define DT_N_S_soc_S_serial_40007c00_P_parity_STRING_UPPER_TOKEN NONE -#define DT_N_S_soc_S_serial_40007c00_P_parity_IDX_0 "none" -#define DT_N_S_soc_S_serial_40007c00_P_parity_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_parity_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_serial_40007c00_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, parity, 0) -#define DT_N_S_soc_S_serial_40007c00_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, parity, 0) -#define DT_N_S_soc_S_serial_40007c00_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_parity_LEN 1 -#define DT_N_S_soc_S_serial_40007c00_P_parity_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_status "disabled" -#define DT_N_S_soc_S_serial_40007c00_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_serial_40007c00_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_serial_40007c00_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_serial_40007c00_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_serial_40007c00_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_serial_40007c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, status, 0) -#define DT_N_S_soc_S_serial_40007c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, status, 0) -#define DT_N_S_soc_S_serial_40007c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_status_LEN 1 -#define DT_N_S_soc_S_serial_40007c00_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_compatible {"st,stm32-uart"} -#define DT_N_S_soc_S_serial_40007c00_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_compatible_IDX_0 "st,stm32-uart" -#define DT_N_S_soc_S_serial_40007c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_40007c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_40007c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_40007c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_40007c00, compatible, 0) -#define DT_N_S_soc_S_serial_40007c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_40007c00, compatible, 0) -#define DT_N_S_soc_S_serial_40007c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_40007c00, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_40007c00, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_40007c00_P_compatible_LEN 1 -#define DT_N_S_soc_S_serial_40007c00_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_40007c00_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_40007c00_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_40007c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_tx_invert 0 -#define DT_N_S_soc_S_serial_40007c00_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_40007c00_P_rx_invert 0 -#define DT_N_S_soc_S_serial_40007c00_P_rx_invert_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_reg {1} +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_reg_IDX_0 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_STRING_UNQUOTED ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_STRING_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_STRING_UPPER_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_IDX_0 "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_IDX_0_ENUM_IDX 9 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_IDX_0_ENUM_VAL_ADC_GAIN_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_gain_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_STRING_UNQUOTED ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_STRING_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_STRING_UPPER_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_IDX_0 "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_IDX_0_ENUM_IDX 4 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_IDX_0_ENUM_VAL_ADC_REF_INTERNAL_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_reference_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_acquisition_time 16383 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_acquisition_time_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_differential 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_differential_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_resolution 16 +#define DT_N_S_soc_S_adc_40022000_S_channel_1_P_zephyr_resolution_EXISTS 1 /* - * Devicetree node: /soc/serial@58000c00 + * Devicetree node: /soc/adc@40022000/channel@3 * - * Node identifier: DT_N_S_soc_S_serial_58000c00 - * - * Binding (compatible = st,stm32-lpuart): - * $ZEPHYR_BASE/dts/bindings/serial/st,stm32-lpuart.yaml + * Node identifier: DT_N_S_soc_S_adc_40022000_S_channel_3 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_serial_58000c00_PATH "/soc/serial@58000c00" +#define DT_N_S_soc_S_adc_40022000_S_channel_3_PATH "/soc/adc@40022000/channel@3" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_serial_58000c00_FULL_NAME "serial@58000c00" -#define DT_N_S_soc_S_serial_58000c00_FULL_NAME_UNQUOTED serial@58000c00 -#define DT_N_S_soc_S_serial_58000c00_FULL_NAME_TOKEN serial_58000c00 -#define DT_N_S_soc_S_serial_58000c00_FULL_NAME_UPPER_TOKEN SERIAL_58000C00 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FULL_NAME "channel@3" +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FULL_NAME_UNQUOTED channel@3 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FULL_NAME_TOKEN channel_3 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FULL_NAME_UPPER_TOKEN CHANNEL_3 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_serial_58000c00_PARENT DT_N_S_soc +/* Node parent (/soc/adc@40022000) identifier: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_3_PARENT DT_N_S_soc_S_adc_40022000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_serial_58000c00_CHILD_IDX 16 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_CHILD_IDX 3 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_serial_58000c00_NODELABEL_NUM 1 -#define DT_N_S_soc_S_serial_58000c00_FOREACH_NODELABEL(fn) fn(lpuart1) -#define DT_N_S_soc_S_serial_58000c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(lpuart1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_NODELABEL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_serial_58000c00_CHILD_NUM 0 -#define DT_N_S_soc_S_serial_58000c00_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_serial_58000c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_serial_58000c00_HASH ISescP3TKthYjEyAx79J9A1f_7TwIXBCVXALkWoe12E +#define DT_N_S_soc_S_adc_40022000_S_channel_3_HASH bLOyHuSaFg9C4FeobHBH48S7UCnEmbfFjgzDBT8lvZM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_58000c00_ORD 119 -#define DT_N_S_soc_S_serial_58000c00_ORD_STR_SORTABLE 00119 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_ORD 164 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_ORD_STR_SORTABLE 00164 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_serial_58000c00_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 41, +#define DT_N_S_soc_S_adc_40022000_S_channel_3_REQUIRES_ORDS \ + 48, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_serial_58000c00_SUPPORTS_ORDS +#define DT_N_S_soc_S_adc_40022000_S_channel_3_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_serial_58000c00_EXISTS 1 -#define DT_N_INST_0_st_stm32_lpuart DT_N_S_soc_S_serial_58000c00 -#define DT_N_INST_8_st_stm32_uart DT_N_S_soc_S_serial_58000c00 -#define DT_N_NODELABEL_lpuart1 DT_N_S_soc_S_serial_58000c00 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_EXISTS 1 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_serial_58000c00_REG_NUM 1 -#define DT_N_S_soc_S_serial_58000c00_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_REG_IDX_0_VAL_ADDRESS 1476398080 -#define DT_N_S_soc_S_serial_58000c00_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_serial_58000c00_RANGES_NUM 0 -#define DT_N_S_soc_S_serial_58000c00_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_serial_58000c00_IRQ_NUM 1 -#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_VAL_irq 142 -#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_serial_58000c00_IRQ_LEVEL 1 -#define DT_N_S_soc_S_serial_58000c00_COMPAT_MATCHES_st_stm32_lpuart 1 -#define DT_N_S_soc_S_serial_58000c00_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_serial_58000c00_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_COMPAT_MODEL_IDX_0 "stm32-lpuart" -#define DT_N_S_soc_S_serial_58000c00_COMPAT_MATCHES_st_stm32_uart 1 -#define DT_N_S_soc_S_serial_58000c00_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_serial_58000c00_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_COMPAT_MODEL_IDX_1 "stm32-uart" -#define DT_N_S_soc_S_serial_58000c00_STATUS_disabled 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_REG_NUM 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_REG_IDX_0_VAL_ADDRESS 3 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_IRQ_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_IRQ_LEVEL 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_serial_58000c00_PINCTRL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_serial_58000c00_P_reg {1476398080, 1024} -#define DT_N_S_soc_S_serial_58000c00_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_reg_IDX_0 1476398080 -#define DT_N_S_soc_S_serial_58000c00_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_serial_58000c00_P_reg_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_VAL_bus 244 -#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_VAL_bits 8 -#define DT_N_S_soc_S_serial_58000c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, clocks, 0) -#define DT_N_S_soc_S_serial_58000c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, clocks, 0) -#define DT_N_S_soc_S_serial_58000c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_clocks_LEN 1 -#define DT_N_S_soc_S_serial_58000c00_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_serial_58000c00_P_resets_IDX_0_VAL_id 4995 -#define DT_N_S_soc_S_serial_58000c00_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, resets, 0) -#define DT_N_S_soc_S_serial_58000c00_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, resets, 0) -#define DT_N_S_soc_S_serial_58000c00_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_resets_LEN 1 -#define DT_N_S_soc_S_serial_58000c00_P_resets_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_interrupts {142, 0} -#define DT_N_S_soc_S_serial_58000c00_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_interrupts_IDX_0 142 -#define DT_N_S_soc_S_serial_58000c00_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_serial_58000c00_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_current_speed 115200 -#define DT_N_S_soc_S_serial_58000c00_P_current_speed_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits "1" -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_STRING_UNQUOTED 1 -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_STRING_TOKEN 1 -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_STRING_UPPER_TOKEN 1 -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_IDX_0 "1" -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, stop_bits, 0) -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, stop_bits, 0) -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, stop_bits, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_LEN 1 -#define DT_N_S_soc_S_serial_58000c00_P_stop_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_data_bits 8 -#define DT_N_S_soc_S_serial_58000c00_P_data_bits_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_serial_58000c00_P_data_bits_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_data_bits_IDX_0_ENUM_VAL_8_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_data_bits_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_single_wire 0 -#define DT_N_S_soc_S_serial_58000c00_P_single_wire_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_tx_rx_swap 0 -#define DT_N_S_soc_S_serial_58000c00_P_tx_rx_swap_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_de_enable 0 -#define DT_N_S_soc_S_serial_58000c00_P_de_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_de_assert_time 0 -#define DT_N_S_soc_S_serial_58000c00_P_de_assert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_de_deassert_time 0 -#define DT_N_S_soc_S_serial_58000c00_P_de_deassert_time_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_de_invert 0 -#define DT_N_S_soc_S_serial_58000c00_P_de_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_fifo_enable 0 -#define DT_N_S_soc_S_serial_58000c00_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_hw_flow_control 0 -#define DT_N_S_soc_S_serial_58000c00_P_hw_flow_control_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_parity "none" -#define DT_N_S_soc_S_serial_58000c00_P_parity_STRING_UNQUOTED none -#define DT_N_S_soc_S_serial_58000c00_P_parity_STRING_TOKEN none -#define DT_N_S_soc_S_serial_58000c00_P_parity_STRING_UPPER_TOKEN NONE -#define DT_N_S_soc_S_serial_58000c00_P_parity_IDX_0 "none" -#define DT_N_S_soc_S_serial_58000c00_P_parity_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_parity_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_serial_58000c00_P_parity_IDX_0_ENUM_VAL_none_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_parity_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, parity, 0) -#define DT_N_S_soc_S_serial_58000c00_P_parity_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, parity, 0) -#define DT_N_S_soc_S_serial_58000c00_P_parity_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_parity_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, parity, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_parity_LEN 1 -#define DT_N_S_soc_S_serial_58000c00_P_parity_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_status "disabled" -#define DT_N_S_soc_S_serial_58000c00_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_serial_58000c00_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_serial_58000c00_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_serial_58000c00_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_serial_58000c00_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_serial_58000c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, status, 0) -#define DT_N_S_soc_S_serial_58000c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, status, 0) -#define DT_N_S_soc_S_serial_58000c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_status_LEN 1 -#define DT_N_S_soc_S_serial_58000c00_P_status_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_compatible {"st,stm32-lpuart", "st,stm32-uart"} -#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_0 "st,stm32-lpuart" -#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-lpuart -#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_lpuart -#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LPUART -#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_1 "st,stm32-uart" -#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-uart -#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_1_STRING_TOKEN st_stm32_uart -#define DT_N_S_soc_S_serial_58000c00_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_UART -#define DT_N_S_soc_S_serial_58000c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_serial_58000c00, compatible, 0) \ - fn(DT_N_S_soc_S_serial_58000c00, compatible, 1) -#define DT_N_S_soc_S_serial_58000c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_serial_58000c00, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_58000c00, compatible, 1) -#define DT_N_S_soc_S_serial_58000c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_serial_58000c00, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_serial_58000c00, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_serial_58000c00, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_serial_58000c00, compatible, 1, __VA_ARGS__) -#define DT_N_S_soc_S_serial_58000c00_P_compatible_LEN 2 -#define DT_N_S_soc_S_serial_58000c00_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_serial_58000c00_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_wakeup_source 0 -#define DT_N_S_soc_S_serial_58000c00_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_serial_58000c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_tx_invert 0 -#define DT_N_S_soc_S_serial_58000c00_P_tx_invert_EXISTS 1 -#define DT_N_S_soc_S_serial_58000c00_P_rx_invert 0 -#define DT_N_S_soc_S_serial_58000c00_P_rx_invert_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_reg {3} +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_reg_IDX_0 3 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_STRING_UNQUOTED ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_STRING_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_STRING_UPPER_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_IDX_0 "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_IDX_0_ENUM_IDX 9 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_IDX_0_ENUM_VAL_ADC_GAIN_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_gain_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_STRING_UNQUOTED ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_STRING_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_STRING_UPPER_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_IDX_0 "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_IDX_0_ENUM_IDX 4 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_IDX_0_ENUM_VAL_ADC_REF_INTERNAL_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_reference_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_acquisition_time 16383 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_acquisition_time_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_differential 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_differential_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_resolution 16 +#define DT_N_S_soc_S_adc_40022000_S_channel_3_P_zephyr_resolution_EXISTS 1 + +/* + * Devicetree node: /soc/adc@40022000/channel@c + * + * Node identifier: DT_N_S_soc_S_adc_40022000_S_channel_c + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_PATH "/soc/adc@40022000/channel@c" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FULL_NAME "channel@c" +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FULL_NAME_UNQUOTED channel@c +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FULL_NAME_TOKEN channel_c +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FULL_NAME_UPPER_TOKEN CHANNEL_C + +/* Node parent (/soc/adc@40022000) identifier: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_PARENT DT_N_S_soc_S_adc_40022000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_NODELABEL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_HASH FQWfAB2Ul0prTNWsOB1z1BzzPDdf7FKP9p8SQ69b3IU + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_ORD 165 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_ORD_STR_SORTABLE 00165 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_REQUIRES_ORDS \ + 48, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_REG_NUM 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_REG_IDX_0_VAL_ADDRESS 12 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_IRQ_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_IRQ_LEVEL 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_reg {12} +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_reg_IDX_0 12 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_STRING_UNQUOTED ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_STRING_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_STRING_UPPER_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_IDX_0 "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_IDX_0_ENUM_IDX 9 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_IDX_0_ENUM_VAL_ADC_GAIN_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_gain_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_STRING_UNQUOTED ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_STRING_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_STRING_UPPER_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_IDX_0 "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_IDX_0_ENUM_IDX 4 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_IDX_0_ENUM_VAL_ADC_REF_INTERNAL_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_reference_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_acquisition_time 16383 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_acquisition_time_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_differential 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_differential_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_resolution 16 +#define DT_N_S_soc_S_adc_40022000_S_channel_c_P_zephyr_resolution_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/spi2_miso_pc2 + * Devicetree node: /soc/adc@40022000/channel@d * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2 + * Node identifier: DT_N_S_soc_S_adc_40022000_S_channel_d * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_PATH "/soc/pin-controller@58020000/spi2_miso_pc2" +#define DT_N_S_soc_S_adc_40022000_S_channel_d_PATH "/soc/adc@40022000/channel@d" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FULL_NAME "spi2_miso_pc2" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FULL_NAME_UNQUOTED spi2_miso_pc2 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FULL_NAME_TOKEN spi2_miso_pc2 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FULL_NAME_UPPER_TOKEN SPI2_MISO_PC2 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FULL_NAME "channel@d" +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FULL_NAME_UNQUOTED channel@d +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FULL_NAME_TOKEN channel_d +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FULL_NAME_UPPER_TOKEN CHANNEL_D -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc/adc@40022000) identifier: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_d_PARENT DT_N_S_soc_S_adc_40022000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_CHILD_IDX 73 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_CHILD_IDX 1 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_NODELABEL(fn) fn(spi2_miso_pc2) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_miso_pc2, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_NODELABEL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_HASH xjJq_tc5sj6pxzlCnAPJHDwhLAGljiJhi23kupcMZAY +#define DT_N_S_soc_S_adc_40022000_S_channel_d_HASH A4aPb6yz_4p5zaV3PzK_Hhx05yBz3OeQXVnSRHO2ATA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_ORD 120 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_ORD_STR_SORTABLE 00120 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_ORD 166 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_ORD_STR_SORTABLE 00166 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_adc_40022000_S_channel_d_REQUIRES_ORDS \ + 48, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_SUPPORTS_ORDS \ - 124, +#define DT_N_S_soc_S_adc_40022000_S_channel_d_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_EXISTS 1 -#define DT_N_NODELABEL_spi2_miso_pc2 DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_EXISTS 1 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_STATUS_okay 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_REG_NUM 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_REG_IDX_0_VAL_ADDRESS 13 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_IRQ_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_IRQ_LEVEL 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_PINCTRL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_pinmux 1093 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_pull_down 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_reg {13} +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_reg_IDX_0 13 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_STRING_UNQUOTED ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_STRING_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_STRING_UPPER_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_IDX_0 "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_IDX_0_ENUM_IDX 9 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_IDX_0_ENUM_VAL_ADC_GAIN_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_gain_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_STRING_UNQUOTED ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_STRING_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_STRING_UPPER_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_IDX_0 "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_IDX_0_ENUM_IDX 4 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_IDX_0_ENUM_VAL_ADC_REF_INTERNAL_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_reference_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_acquisition_time 16383 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_acquisition_time_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_differential 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_differential_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_resolution 16 +#define DT_N_S_soc_S_adc_40022000_S_channel_d_P_zephyr_resolution_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/spi2_mosi_pc3 + * Devicetree node: /soc/adc@40022000/channel@12 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3 + * Node identifier: DT_N_S_soc_S_adc_40022000_S_channel_12 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_PATH "/soc/pin-controller@58020000/spi2_mosi_pc3" +#define DT_N_S_soc_S_adc_40022000_S_channel_12_PATH "/soc/adc@40022000/channel@12" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FULL_NAME "spi2_mosi_pc3" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FULL_NAME_UNQUOTED spi2_mosi_pc3 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FULL_NAME_TOKEN spi2_mosi_pc3 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FULL_NAME_UPPER_TOKEN SPI2_MOSI_PC3 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FULL_NAME "channel@12" +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FULL_NAME_UNQUOTED channel@12 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FULL_NAME_TOKEN channel_12 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FULL_NAME_UPPER_TOKEN CHANNEL_12 -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc/adc@40022000) identifier: */ +#define DT_N_S_soc_S_adc_40022000_S_channel_12_PARENT DT_N_S_soc_S_adc_40022000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_CHILD_IDX 74 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_CHILD_IDX 2 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_NODELABEL(fn) fn(spi2_mosi_pc3) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_mosi_pc3, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_NODELABEL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_HASH dTAA_uzsDwCLkvZzHWaYbSrrBhSAJ3kfwF1u15lilg8 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_HASH n5zCIOQ_ToUlnL73iWLC7uwzLQ_xo3eEIrodZvMvydk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_ORD 121 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_ORD_STR_SORTABLE 00121 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_ORD 167 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_ORD_STR_SORTABLE 00167 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_adc_40022000_S_channel_12_REQUIRES_ORDS \ + 48, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_SUPPORTS_ORDS \ - 124, +#define DT_N_S_soc_S_adc_40022000_S_channel_12_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_EXISTS 1 -#define DT_N_NODELABEL_spi2_mosi_pc3 DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_EXISTS 1 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_STATUS_okay 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_REG_NUM 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_REG_IDX_0_VAL_ADDRESS 18 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_IRQ_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_IRQ_LEVEL 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_PINCTRL_NUM 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_pinmux 1125 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_pull_down 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_reg {18} +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_reg_IDX_0 18 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_STRING_UNQUOTED ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_STRING_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_STRING_UPPER_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_IDX_0 "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_IDX_0_ENUM_IDX 9 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_IDX_0_ENUM_VAL_ADC_GAIN_1_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_gain_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_STRING_UNQUOTED ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_STRING_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_STRING_UPPER_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_IDX_0 "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_IDX_0_ENUM_IDX 4 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_IDX_0_ENUM_VAL_ADC_REF_INTERNAL_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_LEN 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_reference_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_acquisition_time 16383 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_acquisition_time_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_differential 0 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_differential_EXISTS 1 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_resolution 16 +#define DT_N_S_soc_S_adc_40022000_S_channel_12_P_zephyr_resolution_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/spi2_nss_pi0 + * Devicetree node: /soc/adc@58026000/channel@0 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0 + * Node identifier: DT_N_S_soc_S_adc_58026000_S_channel_0 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_PATH "/soc/pin-controller@58020000/spi2_nss_pi0" +#define DT_N_S_soc_S_adc_58026000_S_channel_0_PATH "/soc/adc@58026000/channel@0" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FULL_NAME "spi2_nss_pi0" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FULL_NAME_UNQUOTED spi2_nss_pi0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FULL_NAME_TOKEN spi2_nss_pi0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FULL_NAME_UPPER_TOKEN SPI2_NSS_PI0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FULL_NAME "channel@0" +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FULL_NAME_UNQUOTED channel@0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FULL_NAME_TOKEN channel_0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FULL_NAME_UPPER_TOKEN CHANNEL_0 -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc/adc@58026000) identifier: */ +#define DT_N_S_soc_S_adc_58026000_S_channel_0_PARENT DT_N_S_soc_S_adc_58026000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_CHILD_IDX 75 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_NODELABEL(fn) fn(spi2_nss_pi0) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_nss_pi0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_NODELABEL_NUM 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_HASH tspWYDprCZEXsxeUWJm9KJv69TSpV8CD1IoIXXSHHkw +#define DT_N_S_soc_S_adc_58026000_S_channel_0_HASH fOoa7nNsSBUt39vexJwhirseVYjKRYt2ql9DwUh0ct4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_ORD 122 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_ORD_STR_SORTABLE 00122 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_ORD 168 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_ORD_STR_SORTABLE 00168 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_adc_58026000_S_channel_0_REQUIRES_ORDS \ + 12, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_SUPPORTS_ORDS \ - 124, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_EXISTS 1 -#define DT_N_NODELABEL_spi2_nss_pi0 DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_pinmux 4101 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_STRING_UNQUOTED low-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_STRING_TOKEN low_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_STRING_UPPER_TOKEN LOW_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_IDX_0 "low-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_IDX_0_ENUM_VAL_low_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_adc_58026000_S_channel_0_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_adc_58026000_S_channel_0_REG_NUM 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_REG_IDX_0_VAL_ADDRESS 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_IRQ_NUM 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_IRQ_LEVEL 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_adc_58026000_S_channel_0_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_reg {0} +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_reg_IDX_0 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_STRING_UNQUOTED ADC_GAIN_1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_STRING_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_STRING_UPPER_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_IDX_0 "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_IDX_0_ENUM_IDX 9 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_IDX_0_ENUM_VAL_ADC_GAIN_1_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_LEN 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_gain_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_STRING_UNQUOTED ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_STRING_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_STRING_UPPER_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_IDX_0 "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_IDX_0_ENUM_IDX 4 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_IDX_0_ENUM_VAL_ADC_REF_INTERNAL_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_LEN 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_reference_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_acquisition_time 16383 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_acquisition_time_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_differential 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_differential_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_resolution 16 +#define DT_N_S_soc_S_adc_58026000_S_channel_0_P_zephyr_resolution_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/spi2_sck_pi1 + * Devicetree node: /soc/adc@58026000/channel@1 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1 + * Node identifier: DT_N_S_soc_S_adc_58026000_S_channel_1 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_PATH "/soc/pin-controller@58020000/spi2_sck_pi1" +#define DT_N_S_soc_S_adc_58026000_S_channel_1_PATH "/soc/adc@58026000/channel@1" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FULL_NAME "spi2_sck_pi1" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FULL_NAME_UNQUOTED spi2_sck_pi1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FULL_NAME_TOKEN spi2_sck_pi1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FULL_NAME_UPPER_TOKEN SPI2_SCK_PI1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FULL_NAME "channel@1" +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FULL_NAME_UNQUOTED channel@1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FULL_NAME_TOKEN channel_1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FULL_NAME_UPPER_TOKEN CHANNEL_1 -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc/adc@58026000) identifier: */ +#define DT_N_S_soc_S_adc_58026000_S_channel_1_PARENT DT_N_S_soc_S_adc_58026000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_CHILD_IDX 76 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_CHILD_IDX 1 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_NODELABEL(fn) fn(spi2_sck_pi1) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2_sck_pi1, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_NODELABEL_NUM 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_CHILD_NUM 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_HASH ppgAVqg7K_IdEp_Te6VKDzlbs_KOy624bSJ_V1uWADw +#define DT_N_S_soc_S_adc_58026000_S_channel_1_HASH HHZXnq9rNXs4qGr9F8Vr_E6Xy8zccZkteykPUpteOg0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_ORD 123 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_ORD_STR_SORTABLE 00123 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_ORD 169 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_ORD_STR_SORTABLE 00169 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_REQUIRES_ORDS \ - 11, +#define DT_N_S_soc_S_adc_58026000_S_channel_1_REQUIRES_ORDS \ + 12, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_SUPPORTS_ORDS \ - 124, +#define DT_N_S_soc_S_adc_58026000_S_channel_1_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_adc_58026000_S_channel_1_EXISTS 1 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_adc_58026000_S_channel_1_REG_NUM 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_REG_IDX_0_VAL_ADDRESS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_RANGES_NUM 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_IRQ_NUM 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_IRQ_LEVEL 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_adc_58026000_S_channel_1_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_reg {1} +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_reg_IDX_0 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_reg_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_STRING_UNQUOTED ADC_GAIN_1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_STRING_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_STRING_UPPER_TOKEN ADC_GAIN_1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_IDX_0 "ADC_GAIN_1" +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_IDX_0_ENUM_IDX 9 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_IDX_0_ENUM_VAL_ADC_GAIN_1_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, zephyr_gain, 0) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, zephyr_gain, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_LEN 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_gain_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_STRING_UNQUOTED ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_STRING_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_STRING_UPPER_TOKEN ADC_REF_INTERNAL +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_IDX_0 "ADC_REF_INTERNAL" +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_IDX_0_ENUM_IDX 4 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_IDX_0_ENUM_VAL_ADC_REF_INTERNAL_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, zephyr_reference, 0) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, zephyr_reference, 0, __VA_ARGS__) +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_LEN 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_reference_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_acquisition_time 16383 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_acquisition_time_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_differential 0 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_differential_EXISTS 1 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_resolution 16 +#define DT_N_S_soc_S_adc_58026000_S_channel_1_P_zephyr_resolution_EXISTS 1 + +/* + * Devicetree node: /soc/dma@40020000 + * + * Node identifier: DT_N_S_soc_S_dma_40020000 + * + * Binding (compatible = st,stm32-dma-v1): + * $ZEPHYR_BASE/dts/bindings/dma/st,stm32-dma-v1.yaml + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dma_40020000_PATH "/soc/dma@40020000" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dma_40020000_FULL_NAME "dma@40020000" +#define DT_N_S_soc_S_dma_40020000_FULL_NAME_UNQUOTED dma@40020000 +#define DT_N_S_soc_S_dma_40020000_FULL_NAME_TOKEN dma_40020000 +#define DT_N_S_soc_S_dma_40020000_FULL_NAME_UPPER_TOKEN DMA_40020000 + +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_dma_40020000_PARENT DT_N_S_soc + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dma_40020000_CHILD_IDX 53 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dma_40020000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dma_40020000_FOREACH_NODELABEL(fn) fn(dma1) +#define DT_N_S_soc_S_dma_40020000_FOREACH_NODELABEL_VARGS(fn, ...) fn(dma1, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dma_40020000_CHILD_NUM 0 +#define DT_N_S_soc_S_dma_40020000_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dma_40020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_dma_40020000_HASH wrD_czGB0R3hBC1Od9iGdfNbQ3BZqmarPsJAc4MBFAs + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dma_40020000_ORD 170 +#define DT_N_S_soc_S_dma_40020000_ORD_STR_SORTABLE 00170 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dma_40020000_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dma_40020000_SUPPORTS_ORDS \ + 183, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_EXISTS 1 -#define DT_N_NODELABEL_spi2_sck_pi1 DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1 +#define DT_N_S_soc_S_dma_40020000_EXISTS 1 +#define DT_N_INST_0_st_stm32_dma_v1 DT_N_S_soc_S_dma_40020000 +#define DT_N_NODELABEL_dma1 DT_N_S_soc_S_dma_40020000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_STATUS_okay 1 +#define DT_N_S_soc_S_dma_40020000_REG_NUM 1 +#define DT_N_S_soc_S_dma_40020000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_REG_IDX_0_VAL_ADDRESS 1073872896 +#define DT_N_S_soc_S_dma_40020000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_dma_40020000_RANGES_NUM 0 +#define DT_N_S_soc_S_dma_40020000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dma_40020000_IRQ_NUM 8 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_irq 11 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_irq 12 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_irq 13 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_irq 14 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_irq 15 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_4_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_irq 16 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_5_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_VAL_irq 17 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_6_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_VAL_irq 47 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_VAL_priority 0 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_IRQ_IDX_7_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dma_40020000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_dma_40020000_COMPAT_MATCHES_st_stm32_dma_v1 1 +#define DT_N_S_soc_S_dma_40020000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dma_40020000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_COMPAT_MODEL_IDX_0 "stm32-dma-v1" +#define DT_N_S_soc_S_dma_40020000_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_PINCTRL_NUM 0 +#define DT_N_S_soc_S_dma_40020000_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_pinmux 4133 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate "very-high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_STRING_UNQUOTED very-high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_STRING_TOKEN very_high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_IDX_0 "very-high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_pull_up 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_pull_down 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1_P_output_high_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_reg {1073872896, 1024} +#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_0 1073872896 +#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dma_40020000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts {11, 0, 12, 0, 13, 0, 14, 0, 15, 0, 16, 0, 17, 0, 47, 0} +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_0 11 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_2 12 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_3 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_4 13 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_5 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_6 14 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_7 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_8 15 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_9 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_10 16 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_11 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_12_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_12 17 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_13_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_13 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_14_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_14 47 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_15_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_IDX_15 0 +#define DT_N_S_soc_S_dma_40020000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_st_mem2mem 1 +#define DT_N_S_soc_S_dma_40020000_P_st_mem2mem_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_dma_offset 0 +#define DT_N_S_soc_S_dma_40020000_P_dma_offset_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_dma_requests 8 +#define DT_N_S_soc_S_dma_40020000_P_dma_requests_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_status "okay" +#define DT_N_S_soc_S_dma_40020000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_dma_40020000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_dma_40020000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_dma_40020000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020000, status, 0) +#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, status, 0) +#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_status_LEN 1 +#define DT_N_S_soc_S_dma_40020000_P_status_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_compatible {"st,stm32-dma-v1"} +#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0 "st,stm32-dma-v1" +#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dma-v1 +#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_STRING_TOKEN st_stm32_dma_v1 +#define DT_N_S_soc_S_dma_40020000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DMA_V1 +#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020000, compatible, 0) +#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, compatible, 0) +#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_compatible_LEN 1 +#define DT_N_S_soc_S_dma_40020000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bus 216 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dma_40020000, clocks, 0) +#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dma_40020000, clocks, 0) +#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dma_40020000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dma_40020000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dma_40020000_P_clocks_LEN 1 +#define DT_N_S_soc_S_dma_40020000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dma_40020000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_wakeup_source 0 +#define DT_N_S_soc_S_dma_40020000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dma_40020000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dma_40020000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/spi@40003800 + * Devicetree node: /soc/i2c@40005c00/gc2145@3c * - * Node identifier: DT_N_S_soc_S_spi_40003800 + * Node identifier: DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c * - * Binding (compatible = st,stm32h7-spi): - * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml + * Binding (compatible = galaxycore,gc2145): + * $ZEPHYR_BASE/dts/bindings/video/galaxycore,gc2145.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_spi_40003800_PATH "/soc/spi@40003800" +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_PATH "/soc/i2c@40005c00/gc2145@3c" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_spi_40003800_FULL_NAME "spi@40003800" -#define DT_N_S_soc_S_spi_40003800_FULL_NAME_UNQUOTED spi@40003800 -#define DT_N_S_soc_S_spi_40003800_FULL_NAME_TOKEN spi_40003800 -#define DT_N_S_soc_S_spi_40003800_FULL_NAME_UPPER_TOKEN SPI_40003800 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FULL_NAME "gc2145@3c" +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FULL_NAME_UNQUOTED gc2145@3c +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FULL_NAME_TOKEN gc2145_3c +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FULL_NAME_UPPER_TOKEN GC2145_3C -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_spi_40003800_PARENT DT_N_S_soc +/* Node parent (/soc/i2c@40005c00) identifier: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_PARENT DT_N_S_soc_S_i2c_40005c00 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_spi_40003800_CHILD_IDX 23 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_spi_40003800_NODELABEL_NUM 1 -#define DT_N_S_soc_S_spi_40003800_FOREACH_NODELABEL(fn) fn(spi2) -#define DT_N_S_soc_S_spi_40003800_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_NODELABEL_NUM 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_NODELABEL(fn) fn(gc2145) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_NODELABEL_VARGS(fn, ...) fn(gc2145, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_spi_40003800_CHILD_NUM 0 -#define DT_N_S_soc_S_spi_40003800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_40003800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_CHILD_NUM 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_HASH A53dp4AfAVeml19grNzg5aJqnBBeTHCaVeJ2ZVyca1s + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_ORD 171 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_ORD_STR_SORTABLE 00171 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_REQUIRES_ORDS \ + 33, \ + 66, \ + 67, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_SUPPORTS_ORDS \ + 183, \ + 215, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_EXISTS 1 +#define DT_N_INST_0_galaxycore_gc2145 DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c +#define DT_N_NODELABEL_gc2145 DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c + +/* Bus info (controller: '/soc/i2c@40005c00', type: '['i2c']') */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_BUS_i2c 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_BUS DT_N_S_soc_S_i2c_40005c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_REG_NUM 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_REG_IDX_0_VAL_ADDRESS 60 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_RANGES_NUM 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_IRQ_NUM 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_IRQ_LEVEL 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_COMPAT_MATCHES_galaxycore_gc2145 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_COMPAT_VENDOR_IDX_0 "Galaxycore, Inc." +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_COMPAT_MODEL_IDX_0 "gc2145" +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_IDX_0_VAL_pin 3 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_IDX_0_VAL_flags 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, reset_gpios, 0) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, reset_gpios, 0) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, reset_gpios, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, reset_gpios, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_LEN 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reset_gpios_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_IDX_0_VAL_pin 5 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_IDX_0_VAL_pin_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_IDX_0_VAL_flags 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, pwdn_gpios, 0) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, pwdn_gpios, 0) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, pwdn_gpios, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, pwdn_gpios, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_LEN 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_pwdn_gpios_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reg {60} +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reg_IDX_0 60 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_reg_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible {"galaxycore,gc2145"} +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_IDX_0 "galaxycore,gc2145" +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_IDX_0_STRING_UNQUOTED galaxycore,gc2145 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_IDX_0_STRING_TOKEN galaxycore_gc2145 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_IDX_0_STRING_UPPER_TOKEN GALAXYCORE_GC2145 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, compatible, 0) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, compatible, 0) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_LEN 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_wakeup_source 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_P_zephyr_pm_device_runtime_auto_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/dcmi_d0_ph9 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_PATH "/soc/pin-controller@58020000/dcmi_d0_ph9" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FULL_NAME "dcmi_d0_ph9" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FULL_NAME_UNQUOTED dcmi_d0_ph9 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FULL_NAME_TOKEN dcmi_d0_ph9 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FULL_NAME_UPPER_TOKEN DCMI_D0_PH9 + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_CHILD_IDX 21 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_NODELABEL(fn) fn(dcmi_d0_ph9) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_d0_ph9, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_HASH viqFawzx6vEf2SqKkj9mhPeH_3odOekLRTY28iDj7Gg + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_ORD 172 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_ORD_STR_SORTABLE 00172 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_REQUIRES_ORDS \ + 9, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_SUPPORTS_ORDS \ + 183, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_EXISTS 1 +#define DT_N_NODELABEL_dcmi_d0_ph9 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_pinmux 3885 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9_P_output_high_EXISTS 1 + +/* + * Devicetree node: /soc/pin-controller@58020000/dcmi_d1_ph10 + * + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10 + * + * (Descriptions have moved to the Devicetree Bindings Index + * in the documentation.) + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_PATH "/soc/pin-controller@58020000/dcmi_d1_ph10" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FULL_NAME "dcmi_d1_ph10" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FULL_NAME_UNQUOTED dcmi_d1_ph10 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FULL_NAME_TOKEN dcmi_d1_ph10 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FULL_NAME_UPPER_TOKEN DCMI_D1_PH10 + +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_CHILD_IDX 22 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_NODELABEL(fn) fn(dcmi_d1_ph10) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_d1_ph10, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_spi_40003800_HASH XKwnj_54XNd9o8CRTIG33G9j_T58zD9aWx_JOqtlec4 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_HASH us1sYEwlee8_e6DQZuygCdkVONGThdr8xQyAYVCVmkA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40003800_ORD 124 -#define DT_N_S_soc_S_spi_40003800_ORD_STR_SORTABLE 00124 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_ORD 173 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_ORD_STR_SORTABLE 00173 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_spi_40003800_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 120, \ - 121, \ - 122, \ - 123, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_spi_40003800_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_SUPPORTS_ORDS \ + 183, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_spi_40003800_EXISTS 1 -#define DT_N_INST_1_st_stm32h7_spi DT_N_S_soc_S_spi_40003800 -#define DT_N_INST_1_st_stm32_spi_fifo DT_N_S_soc_S_spi_40003800 -#define DT_N_INST_1_st_stm32_spi DT_N_S_soc_S_spi_40003800 -#define DT_N_NODELABEL_spi2 DT_N_S_soc_S_spi_40003800 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_EXISTS 1 +#define DT_N_NODELABEL_dcmi_d1_ph10 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_spi_40003800_REG_NUM 1 -#define DT_N_S_soc_S_spi_40003800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_REG_IDX_0_VAL_ADDRESS 1073756160 -#define DT_N_S_soc_S_spi_40003800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_spi_40003800_RANGES_NUM 0 -#define DT_N_S_soc_S_spi_40003800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_spi_40003800_IRQ_NUM 1 -#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_irq 36 -#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_spi_40003800_IRQ_LEVEL 1 -#define DT_N_S_soc_S_spi_40003800_COMPAT_MATCHES_st_stm32h7_spi 1 -#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_0 "stm32h7-spi" -#define DT_N_S_soc_S_spi_40003800_COMPAT_MATCHES_st_stm32_spi_fifo 1 -#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" -#define DT_N_S_soc_S_spi_40003800_COMPAT_MATCHES_st_stm32_spi 1 -#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_COMPAT_VENDOR_IDX_2 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_COMPAT_MODEL_IDX_2 "stm32-spi" -#define DT_N_S_soc_S_spi_40003800_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_spi_40003800_PINCTRL_NUM 1 -#define DT_N_S_soc_S_spi_40003800_PINCTRL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_PINCTRL_IDX_0_TOKEN default -#define DT_N_S_soc_S_spi_40003800_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX 0 -#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0 -#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1 -#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2 -#define DT_N_S_soc_S_spi_40003800_PINCTRL_NAME_default_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_spi_40003800_P_midi_clock 0 -#define DT_N_S_soc_S_spi_40003800_P_midi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_mssi_clock 0 -#define DT_N_S_soc_S_spi_40003800_P_mssi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_fifo_enable 0 -#define DT_N_S_soc_S_spi_40003800_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_reg {1073756160, 1024} -#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_0 1073756160 -#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_spi_40003800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_interrupts {36, 0} -#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_0 36 -#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_spi_40003800_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_3 DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0) \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1) \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2) \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 3) -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 3) -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 3, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, pinctrl_0, 3, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_LEN 4 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names {"default"} -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0 "default" -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_STRING_UNQUOTED default -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_STRING_TOKEN default -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0) -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0) -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_LEN 1 -#define DT_N_S_soc_S_spi_40003800_P_pinctrl_names_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_status "disabled" -#define DT_N_S_soc_S_spi_40003800_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_spi_40003800_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_spi_40003800_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_spi_40003800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, status, 0) -#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, status, 0) -#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_P_status_LEN 1 -#define DT_N_S_soc_S_spi_40003800_P_status_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0 "st,stm32h7-spi" -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1 "st,stm32-spi-fifo" -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_2 "st,stm32-spi" -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi -#define DT_N_S_soc_S_spi_40003800_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI -#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, compatible, 0) \ - fn(DT_N_S_soc_S_spi_40003800, compatible, 1) \ - fn(DT_N_S_soc_S_spi_40003800, compatible, 2) -#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, compatible, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, compatible, 2) -#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40003800, compatible, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40003800, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_P_compatible_LEN 3 -#define DT_N_S_soc_S_spi_40003800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bits 16384 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_VAL_bus 9 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_VAL_bits 30146640 -#define DT_N_S_soc_S_spi_40003800_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003800, clocks, 0) \ - fn(DT_N_S_soc_S_spi_40003800, clocks, 1) -#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003800, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, clocks, 1) -#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003800, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40003800, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003800, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003800, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003800_P_clocks_LEN 2 -#define DT_N_S_soc_S_spi_40003800_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_spi_40003800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_wakeup_source 0 -#define DT_N_S_soc_S_spi_40003800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_spi_40003800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_spi_40003800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_pinmux 3917 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/spi@40003c00 - * - * Node identifier: DT_N_S_soc_S_spi_40003c00 + * Devicetree node: /soc/pin-controller@58020000/dcmi_d2_ph11 * - * Binding (compatible = st,stm32h7-spi): - * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_spi_40003c00_PATH "/soc/spi@40003c00" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_PATH "/soc/pin-controller@58020000/dcmi_d2_ph11" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_spi_40003c00_FULL_NAME "spi@40003c00" -#define DT_N_S_soc_S_spi_40003c00_FULL_NAME_UNQUOTED spi@40003c00 -#define DT_N_S_soc_S_spi_40003c00_FULL_NAME_TOKEN spi_40003c00 -#define DT_N_S_soc_S_spi_40003c00_FULL_NAME_UPPER_TOKEN SPI_40003C00 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FULL_NAME "dcmi_d2_ph11" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FULL_NAME_UNQUOTED dcmi_d2_ph11 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FULL_NAME_TOKEN dcmi_d2_ph11 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FULL_NAME_UPPER_TOKEN DCMI_D2_PH11 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_spi_40003c00_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_spi_40003c00_CHILD_IDX 24 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_CHILD_IDX 23 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_spi_40003c00_NODELABEL_NUM 1 -#define DT_N_S_soc_S_spi_40003c00_FOREACH_NODELABEL(fn) fn(spi3) -#define DT_N_S_soc_S_spi_40003c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi3, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_NODELABEL(fn) fn(dcmi_d2_ph11) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_d2_ph11, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_spi_40003c00_CHILD_NUM 0 -#define DT_N_S_soc_S_spi_40003c00_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_40003c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_spi_40003c00_HASH 2ZRlHGHWIr4tSgRVkDzDHSiC22m9C4PVNAuFo8LU_0A +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_HASH N6Hlm4eOaW_Fb82gwXs9ogvFEw4zt_HzAo7bKjPxif4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40003c00_ORD 125 -#define DT_N_S_soc_S_spi_40003c00_ORD_STR_SORTABLE 00125 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_ORD 174 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_ORD_STR_SORTABLE 00174 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_spi_40003c00_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_spi_40003c00_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_SUPPORTS_ORDS \ + 183, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_spi_40003c00_EXISTS 1 -#define DT_N_INST_2_st_stm32h7_spi DT_N_S_soc_S_spi_40003c00 -#define DT_N_INST_2_st_stm32_spi_fifo DT_N_S_soc_S_spi_40003c00 -#define DT_N_INST_2_st_stm32_spi DT_N_S_soc_S_spi_40003c00 -#define DT_N_NODELABEL_spi3 DT_N_S_soc_S_spi_40003c00 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_EXISTS 1 +#define DT_N_NODELABEL_dcmi_d2_ph11 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_spi_40003c00_REG_NUM 1 -#define DT_N_S_soc_S_spi_40003c00_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_REG_IDX_0_VAL_ADDRESS 1073757184 -#define DT_N_S_soc_S_spi_40003c00_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_spi_40003c00_RANGES_NUM 0 -#define DT_N_S_soc_S_spi_40003c00_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_spi_40003c00_IRQ_NUM 1 -#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_irq 51 -#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_spi_40003c00_IRQ_LEVEL 1 -#define DT_N_S_soc_S_spi_40003c00_COMPAT_MATCHES_st_stm32h7_spi 1 -#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_0 "stm32h7-spi" -#define DT_N_S_soc_S_spi_40003c00_COMPAT_MATCHES_st_stm32_spi_fifo 1 -#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" -#define DT_N_S_soc_S_spi_40003c00_COMPAT_MATCHES_st_stm32_spi 1 -#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_COMPAT_VENDOR_IDX_2 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_COMPAT_MODEL_IDX_2 "stm32-spi" -#define DT_N_S_soc_S_spi_40003c00_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_spi_40003c00_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_spi_40003c00_P_midi_clock 0 -#define DT_N_S_soc_S_spi_40003c00_P_midi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_mssi_clock 0 -#define DT_N_S_soc_S_spi_40003c00_P_mssi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_fifo_enable 0 -#define DT_N_S_soc_S_spi_40003c00_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_reg {1073757184, 1024} -#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_0 1073757184 -#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_spi_40003c00_P_reg_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_interrupts {51, 0} -#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_0 51 -#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_spi_40003c00_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_status "disabled" -#define DT_N_S_soc_S_spi_40003c00_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_spi_40003c00_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_spi_40003c00_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_spi_40003c00_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, status, 0) -#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, status, 0) -#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003c00_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003c00_P_status_LEN 1 -#define DT_N_S_soc_S_spi_40003c00_P_status_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0 "st,stm32h7-spi" -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1 "st,stm32-spi-fifo" -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_2 "st,stm32-spi" -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi -#define DT_N_S_soc_S_spi_40003c00_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI -#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0) \ - fn(DT_N_S_soc_S_spi_40003c00, compatible, 1) \ - fn(DT_N_S_soc_S_spi_40003c00, compatible, 2) -#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003c00, compatible, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003c00, compatible, 2) -#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40003c00, compatible, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40003c00, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003c00, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003c00, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003c00_P_compatible_LEN 3 -#define DT_N_S_soc_S_spi_40003c00_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bits 32768 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_VAL_bus 9 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_VAL_bits 30146640 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0) \ - fn(DT_N_S_soc_S_spi_40003c00, clocks, 1) -#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003c00, clocks, 1) -#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40003c00, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40003c00, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40003c00, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40003c00_P_clocks_LEN 2 -#define DT_N_S_soc_S_spi_40003c00_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_spi_40003c00_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_wakeup_source 0 -#define DT_N_S_soc_S_spi_40003c00_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_spi_40003c00_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_spi_40003c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_pinmux 3949 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/spi@40013000 - * - * Node identifier: DT_N_S_soc_S_spi_40013000 + * Devicetree node: /soc/pin-controller@58020000/dcmi_d3_ph12 * - * Binding (compatible = st,stm32h7-spi): - * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_spi_40013000_PATH "/soc/spi@40013000" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_PATH "/soc/pin-controller@58020000/dcmi_d3_ph12" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_spi_40013000_FULL_NAME "spi@40013000" -#define DT_N_S_soc_S_spi_40013000_FULL_NAME_UNQUOTED spi@40013000 -#define DT_N_S_soc_S_spi_40013000_FULL_NAME_TOKEN spi_40013000 -#define DT_N_S_soc_S_spi_40013000_FULL_NAME_UPPER_TOKEN SPI_40013000 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FULL_NAME "dcmi_d3_ph12" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FULL_NAME_UNQUOTED dcmi_d3_ph12 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FULL_NAME_TOKEN dcmi_d3_ph12 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FULL_NAME_UPPER_TOKEN DCMI_D3_PH12 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_spi_40013000_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_spi_40013000_CHILD_IDX 22 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_CHILD_IDX 24 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_spi_40013000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_spi_40013000_FOREACH_NODELABEL(fn) fn(spi1) -#define DT_N_S_soc_S_spi_40013000_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi1, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_NODELABEL(fn) fn(dcmi_d3_ph12) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_d3_ph12, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_spi_40013000_CHILD_NUM 0 -#define DT_N_S_soc_S_spi_40013000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_40013000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_spi_40013000_HASH q04f3jPcynKDa_9eKR_V34RQn5SAL2iX4yHIC7XGkLs +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_HASH hDikqDyGdXNWDDWUDbNzT26iPUArv_L1aMLUF89aoYU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40013000_ORD 126 -#define DT_N_S_soc_S_spi_40013000_ORD_STR_SORTABLE 00126 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_ORD 175 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_ORD_STR_SORTABLE 00175 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_spi_40013000_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_spi_40013000_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_SUPPORTS_ORDS \ + 183, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_spi_40013000_EXISTS 1 -#define DT_N_INST_0_st_stm32h7_spi DT_N_S_soc_S_spi_40013000 -#define DT_N_INST_0_st_stm32_spi_fifo DT_N_S_soc_S_spi_40013000 -#define DT_N_INST_0_st_stm32_spi DT_N_S_soc_S_spi_40013000 -#define DT_N_NODELABEL_spi1 DT_N_S_soc_S_spi_40013000 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_EXISTS 1 +#define DT_N_NODELABEL_dcmi_d3_ph12 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_spi_40013000_REG_NUM 1 -#define DT_N_S_soc_S_spi_40013000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_REG_IDX_0_VAL_ADDRESS 1073819648 -#define DT_N_S_soc_S_spi_40013000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_spi_40013000_RANGES_NUM 0 -#define DT_N_S_soc_S_spi_40013000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_spi_40013000_IRQ_NUM 1 -#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_irq 35 -#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_spi_40013000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_spi_40013000_COMPAT_MATCHES_st_stm32h7_spi 1 -#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_0 "stm32h7-spi" -#define DT_N_S_soc_S_spi_40013000_COMPAT_MATCHES_st_stm32_spi_fifo 1 -#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" -#define DT_N_S_soc_S_spi_40013000_COMPAT_MATCHES_st_stm32_spi 1 -#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_COMPAT_VENDOR_IDX_2 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_COMPAT_MODEL_IDX_2 "stm32-spi" -#define DT_N_S_soc_S_spi_40013000_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_spi_40013000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_spi_40013000_P_midi_clock 0 -#define DT_N_S_soc_S_spi_40013000_P_midi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_mssi_clock 0 -#define DT_N_S_soc_S_spi_40013000_P_mssi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_fifo_enable 0 -#define DT_N_S_soc_S_spi_40013000_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_reg {1073819648, 1024} -#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_0 1073819648 -#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_spi_40013000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_interrupts {35, 0} -#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_0 35 -#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_spi_40013000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_status "disabled" -#define DT_N_S_soc_S_spi_40013000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_spi_40013000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_spi_40013000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_spi_40013000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, status, 0) -#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, status, 0) -#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013000_P_status_LEN 1 -#define DT_N_S_soc_S_spi_40013000_P_status_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0 "st,stm32h7-spi" -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1 "st,stm32-spi-fifo" -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_2 "st,stm32-spi" -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi -#define DT_N_S_soc_S_spi_40013000_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI -#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, compatible, 0) \ - fn(DT_N_S_soc_S_spi_40013000, compatible, 1) \ - fn(DT_N_S_soc_S_spi_40013000, compatible, 2) -#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40013000, compatible, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40013000, compatible, 2) -#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40013000, compatible, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40013000, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40013000, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40013000, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013000_P_compatible_LEN 3 -#define DT_N_S_soc_S_spi_40013000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bus 240 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bits 4096 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_VAL_bus 9 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_VAL_bits 30146640 -#define DT_N_S_soc_S_spi_40013000_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013000, clocks, 0) \ - fn(DT_N_S_soc_S_spi_40013000, clocks, 1) -#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40013000, clocks, 1) -#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013000, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40013000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40013000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013000_P_clocks_LEN 2 -#define DT_N_S_soc_S_spi_40013000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_spi_40013000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_wakeup_source 0 -#define DT_N_S_soc_S_spi_40013000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_spi_40013000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_spi_40013000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_pinmux 3981 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/spi@40013400 + * Devicetree node: /soc/pin-controller@58020000/dcmi_d4_ph14 * - * Node identifier: DT_N_S_soc_S_spi_40013400 - * - * Binding (compatible = st,stm32h7-spi): - * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_spi_40013400_PATH "/soc/spi@40013400" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_PATH "/soc/pin-controller@58020000/dcmi_d4_ph14" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_spi_40013400_FULL_NAME "spi@40013400" -#define DT_N_S_soc_S_spi_40013400_FULL_NAME_UNQUOTED spi@40013400 -#define DT_N_S_soc_S_spi_40013400_FULL_NAME_TOKEN spi_40013400 -#define DT_N_S_soc_S_spi_40013400_FULL_NAME_UPPER_TOKEN SPI_40013400 - -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_spi_40013400_PARENT DT_N_S_soc - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_spi_40013400_CHILD_IDX 25 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_spi_40013400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_spi_40013400_FOREACH_NODELABEL(fn) fn(spi4) -#define DT_N_S_soc_S_spi_40013400_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi4, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FULL_NAME "dcmi_d4_ph14" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FULL_NAME_UNQUOTED dcmi_d4_ph14 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FULL_NAME_TOKEN dcmi_d4_ph14 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FULL_NAME_UPPER_TOKEN DCMI_D4_PH14 -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_spi_40013400_CHILD_NUM 0 -#define DT_N_S_soc_S_spi_40013400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_40013400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_PARENT DT_N_S_soc_S_pin_controller_58020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_CHILD_IDX 25 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_NODELABEL(fn) fn(dcmi_d4_ph14) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_d4_ph14, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_spi_40013400_HASH _gq_GFzBL2BriiF_xUBpw3VzRXUfex3S_XMm3qRcPgU +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_HASH 0umVcTpJBfHaKKZYd7PsUDU1Ja5n_LlsGKocPLbWILQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40013400_ORD 127 -#define DT_N_S_soc_S_spi_40013400_ORD_STR_SORTABLE 00127 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_ORD 176 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_ORD_STR_SORTABLE 00176 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_spi_40013400_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_spi_40013400_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_SUPPORTS_ORDS \ + 183, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_spi_40013400_EXISTS 1 -#define DT_N_INST_3_st_stm32h7_spi DT_N_S_soc_S_spi_40013400 -#define DT_N_INST_3_st_stm32_spi_fifo DT_N_S_soc_S_spi_40013400 -#define DT_N_INST_3_st_stm32_spi DT_N_S_soc_S_spi_40013400 -#define DT_N_NODELABEL_spi4 DT_N_S_soc_S_spi_40013400 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_EXISTS 1 +#define DT_N_NODELABEL_dcmi_d4_ph14 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_spi_40013400_REG_NUM 1 -#define DT_N_S_soc_S_spi_40013400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_REG_IDX_0_VAL_ADDRESS 1073820672 -#define DT_N_S_soc_S_spi_40013400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_spi_40013400_RANGES_NUM 0 -#define DT_N_S_soc_S_spi_40013400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_spi_40013400_IRQ_NUM 1 -#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_VAL_irq 84 -#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_spi_40013400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_spi_40013400_COMPAT_MATCHES_st_stm32h7_spi 1 -#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_0 "stm32h7-spi" -#define DT_N_S_soc_S_spi_40013400_COMPAT_MATCHES_st_stm32_spi_fifo 1 -#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" -#define DT_N_S_soc_S_spi_40013400_COMPAT_MATCHES_st_stm32_spi 1 -#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_COMPAT_VENDOR_IDX_2 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_COMPAT_MODEL_IDX_2 "stm32-spi" -#define DT_N_S_soc_S_spi_40013400_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_spi_40013400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_spi_40013400_P_midi_clock 0 -#define DT_N_S_soc_S_spi_40013400_P_midi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_mssi_clock 0 -#define DT_N_S_soc_S_spi_40013400_P_mssi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_fifo_enable 0 -#define DT_N_S_soc_S_spi_40013400_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_reg {1073820672, 1024} -#define DT_N_S_soc_S_spi_40013400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_reg_IDX_0 1073820672 -#define DT_N_S_soc_S_spi_40013400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_spi_40013400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_interrupts {84, 0} -#define DT_N_S_soc_S_spi_40013400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_interrupts_IDX_0 84 -#define DT_N_S_soc_S_spi_40013400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_spi_40013400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_status "disabled" -#define DT_N_S_soc_S_spi_40013400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_spi_40013400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_spi_40013400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_spi_40013400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_spi_40013400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_spi_40013400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013400, status, 0) -#define DT_N_S_soc_S_spi_40013400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013400, status, 0) -#define DT_N_S_soc_S_spi_40013400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013400_P_status_LEN 1 -#define DT_N_S_soc_S_spi_40013400_P_status_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_0 "st,stm32h7-spi" -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_1 "st,stm32-spi-fifo" -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_2 "st,stm32-spi" -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi -#define DT_N_S_soc_S_spi_40013400_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI -#define DT_N_S_soc_S_spi_40013400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013400, compatible, 0) \ - fn(DT_N_S_soc_S_spi_40013400, compatible, 1) \ - fn(DT_N_S_soc_S_spi_40013400, compatible, 2) -#define DT_N_S_soc_S_spi_40013400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40013400, compatible, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40013400, compatible, 2) -#define DT_N_S_soc_S_spi_40013400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013400, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40013400, compatible, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40013400, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40013400, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40013400, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013400_P_compatible_LEN 3 -#define DT_N_S_soc_S_spi_40013400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_VAL_bus 240 -#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_VAL_bits 8192 -#define DT_N_S_soc_S_spi_40013400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40013400, clocks, 0) -#define DT_N_S_soc_S_spi_40013400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40013400, clocks, 0) -#define DT_N_S_soc_S_spi_40013400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40013400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40013400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40013400_P_clocks_LEN 1 -#define DT_N_S_soc_S_spi_40013400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_spi_40013400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_wakeup_source 0 -#define DT_N_S_soc_S_spi_40013400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_spi_40013400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_spi_40013400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_pinmux 4045 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/spi@40015000 + * Devicetree node: /soc/pin-controller@58020000/dcmi_d5_pi4 * - * Node identifier: DT_N_S_soc_S_spi_40015000 - * - * Binding (compatible = st,stm32h7-spi): - * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_spi_40015000_PATH "/soc/spi@40015000" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_PATH "/soc/pin-controller@58020000/dcmi_d5_pi4" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_spi_40015000_FULL_NAME "spi@40015000" -#define DT_N_S_soc_S_spi_40015000_FULL_NAME_UNQUOTED spi@40015000 -#define DT_N_S_soc_S_spi_40015000_FULL_NAME_TOKEN spi_40015000 -#define DT_N_S_soc_S_spi_40015000_FULL_NAME_UPPER_TOKEN SPI_40015000 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FULL_NAME "dcmi_d5_pi4" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FULL_NAME_UNQUOTED dcmi_d5_pi4 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FULL_NAME_TOKEN dcmi_d5_pi4 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FULL_NAME_UPPER_TOKEN DCMI_D5_PI4 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_spi_40015000_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_spi_40015000_CHILD_IDX 26 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_CHILD_IDX 26 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_spi_40015000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_spi_40015000_FOREACH_NODELABEL(fn) fn(spi5) -#define DT_N_S_soc_S_spi_40015000_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi5, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40015000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_NODELABEL(fn) fn(dcmi_d5_pi4) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_d5_pi4, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_spi_40015000_CHILD_NUM 0 -#define DT_N_S_soc_S_spi_40015000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_40015000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_spi_40015000_HASH _7uoLr5262nubu_Aw_eizLfScuJO0NCTRjc4zDKDojg +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_HASH F4eIoMP9AaFc1hbqrMr7CaWRkku0Xsl1I_MtlkJAPog /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_40015000_ORD 128 -#define DT_N_S_soc_S_spi_40015000_ORD_STR_SORTABLE 00128 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_ORD 177 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_ORD_STR_SORTABLE 00177 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_spi_40015000_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_spi_40015000_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_SUPPORTS_ORDS \ + 183, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_spi_40015000_EXISTS 1 -#define DT_N_INST_4_st_stm32h7_spi DT_N_S_soc_S_spi_40015000 -#define DT_N_INST_4_st_stm32_spi_fifo DT_N_S_soc_S_spi_40015000 -#define DT_N_INST_4_st_stm32_spi DT_N_S_soc_S_spi_40015000 -#define DT_N_NODELABEL_spi5 DT_N_S_soc_S_spi_40015000 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_EXISTS 1 +#define DT_N_NODELABEL_dcmi_d5_pi4 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_spi_40015000_REG_NUM 1 -#define DT_N_S_soc_S_spi_40015000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_REG_IDX_0_VAL_ADDRESS 1073827840 -#define DT_N_S_soc_S_spi_40015000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_spi_40015000_RANGES_NUM 0 -#define DT_N_S_soc_S_spi_40015000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_spi_40015000_IRQ_NUM 1 -#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_VAL_irq 85 -#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_spi_40015000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_spi_40015000_COMPAT_MATCHES_st_stm32h7_spi 1 -#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_0 "stm32h7-spi" -#define DT_N_S_soc_S_spi_40015000_COMPAT_MATCHES_st_stm32_spi_fifo 1 -#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" -#define DT_N_S_soc_S_spi_40015000_COMPAT_MATCHES_st_stm32_spi 1 -#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_COMPAT_VENDOR_IDX_2 "STMicroelectronics" -#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_COMPAT_MODEL_IDX_2 "stm32-spi" -#define DT_N_S_soc_S_spi_40015000_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_spi_40015000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_spi_40015000_P_midi_clock 0 -#define DT_N_S_soc_S_spi_40015000_P_midi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_mssi_clock 0 -#define DT_N_S_soc_S_spi_40015000_P_mssi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_fifo_enable 0 -#define DT_N_S_soc_S_spi_40015000_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_reg {1073827840, 1024} -#define DT_N_S_soc_S_spi_40015000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_reg_IDX_0 1073827840 -#define DT_N_S_soc_S_spi_40015000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_spi_40015000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_interrupts {85, 0} -#define DT_N_S_soc_S_spi_40015000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_interrupts_IDX_0 85 -#define DT_N_S_soc_S_spi_40015000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_spi_40015000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_status "disabled" -#define DT_N_S_soc_S_spi_40015000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_spi_40015000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_spi_40015000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_spi_40015000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_spi_40015000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_spi_40015000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40015000, status, 0) -#define DT_N_S_soc_S_spi_40015000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40015000, status, 0) -#define DT_N_S_soc_S_spi_40015000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40015000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40015000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40015000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40015000_P_status_LEN 1 -#define DT_N_S_soc_S_spi_40015000_P_status_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_0 "st,stm32h7-spi" -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_1 "st,stm32-spi-fifo" -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_2 "st,stm32-spi" -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi -#define DT_N_S_soc_S_spi_40015000_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI -#define DT_N_S_soc_S_spi_40015000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40015000, compatible, 0) \ - fn(DT_N_S_soc_S_spi_40015000, compatible, 1) \ - fn(DT_N_S_soc_S_spi_40015000, compatible, 2) -#define DT_N_S_soc_S_spi_40015000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40015000, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40015000, compatible, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40015000, compatible, 2) -#define DT_N_S_soc_S_spi_40015000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40015000, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40015000, compatible, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_40015000, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40015000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40015000, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40015000, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_40015000, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40015000_P_compatible_LEN 3 -#define DT_N_S_soc_S_spi_40015000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_VAL_bus 240 -#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_VAL_bits 1048576 -#define DT_N_S_soc_S_spi_40015000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_40015000, clocks, 0) -#define DT_N_S_soc_S_spi_40015000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_40015000, clocks, 0) -#define DT_N_S_soc_S_spi_40015000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_40015000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40015000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_40015000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_40015000_P_clocks_LEN 1 -#define DT_N_S_soc_S_spi_40015000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_spi_40015000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_wakeup_source 0 -#define DT_N_S_soc_S_spi_40015000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_spi_40015000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_spi_40015000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_pinmux 4237 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/spi@58001400 + * Devicetree node: /soc/pin-controller@58020000/dcmi_d6_pi6 * - * Node identifier: DT_N_S_soc_S_spi_58001400 - * - * Binding (compatible = st,stm32h7-spi): - * $ZEPHYR_BASE/dts/bindings/spi/st,stm32h7-spi.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_spi_58001400_PATH "/soc/spi@58001400" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_PATH "/soc/pin-controller@58020000/dcmi_d6_pi6" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_spi_58001400_FULL_NAME "spi@58001400" -#define DT_N_S_soc_S_spi_58001400_FULL_NAME_UNQUOTED spi@58001400 -#define DT_N_S_soc_S_spi_58001400_FULL_NAME_TOKEN spi_58001400 -#define DT_N_S_soc_S_spi_58001400_FULL_NAME_UPPER_TOKEN SPI_58001400 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FULL_NAME "dcmi_d6_pi6" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FULL_NAME_UNQUOTED dcmi_d6_pi6 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FULL_NAME_TOKEN dcmi_d6_pi6 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FULL_NAME_UPPER_TOKEN DCMI_D6_PI6 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_spi_58001400_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_spi_58001400_CHILD_IDX 27 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_CHILD_IDX 28 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_spi_58001400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_spi_58001400_FOREACH_NODELABEL(fn) fn(spi6) -#define DT_N_S_soc_S_spi_58001400_FOREACH_NODELABEL_VARGS(fn, ...) fn(spi6, __VA_ARGS__) -#define DT_N_S_soc_S_spi_58001400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_NODELABEL(fn) fn(dcmi_d6_pi6) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_d6_pi6, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_spi_58001400_CHILD_NUM 0 -#define DT_N_S_soc_S_spi_58001400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_spi_58001400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_spi_58001400_HASH MQ8Y8eusUQ_m2SL3yzoNAgkoH4u83k1uJWprWbvoQw0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_HASH 4cUbjhg45_FZoAGdycnf2_D3eBV5igjPFbZxkBoxRUU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_58001400_ORD 129 -#define DT_N_S_soc_S_spi_58001400_ORD_STR_SORTABLE 00129 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_ORD 178 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_ORD_STR_SORTABLE 00178 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_spi_58001400_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_spi_58001400_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_SUPPORTS_ORDS \ + 183, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_spi_58001400_EXISTS 1 -#define DT_N_INST_5_st_stm32h7_spi DT_N_S_soc_S_spi_58001400 -#define DT_N_INST_5_st_stm32_spi_fifo DT_N_S_soc_S_spi_58001400 -#define DT_N_INST_5_st_stm32_spi DT_N_S_soc_S_spi_58001400 -#define DT_N_NODELABEL_spi6 DT_N_S_soc_S_spi_58001400 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_EXISTS 1 +#define DT_N_NODELABEL_dcmi_d6_pi6 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_spi_58001400_REG_NUM 1 -#define DT_N_S_soc_S_spi_58001400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_REG_IDX_0_VAL_ADDRESS 1476400128 -#define DT_N_S_soc_S_spi_58001400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_spi_58001400_RANGES_NUM 0 -#define DT_N_S_soc_S_spi_58001400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_spi_58001400_IRQ_NUM 1 -#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_VAL_irq 86 -#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_spi_58001400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_spi_58001400_COMPAT_MATCHES_st_stm32h7_spi 1 -#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_0 "stm32h7-spi" -#define DT_N_S_soc_S_spi_58001400_COMPAT_MATCHES_st_stm32_spi_fifo 1 -#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_1 "STMicroelectronics" -#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_1 "stm32-spi-fifo" -#define DT_N_S_soc_S_spi_58001400_COMPAT_MATCHES_st_stm32_spi 1 -#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_COMPAT_VENDOR_IDX_2 "STMicroelectronics" -#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_COMPAT_MODEL_IDX_2 "stm32-spi" -#define DT_N_S_soc_S_spi_58001400_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_spi_58001400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_spi_58001400_P_midi_clock 0 -#define DT_N_S_soc_S_spi_58001400_P_midi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_mssi_clock 0 -#define DT_N_S_soc_S_spi_58001400_P_mssi_clock_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_fifo_enable 0 -#define DT_N_S_soc_S_spi_58001400_P_fifo_enable_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_reg {1476400128, 1024} -#define DT_N_S_soc_S_spi_58001400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_reg_IDX_0 1476400128 -#define DT_N_S_soc_S_spi_58001400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_spi_58001400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_interrupts {86, 0} -#define DT_N_S_soc_S_spi_58001400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_interrupts_IDX_0 86 -#define DT_N_S_soc_S_spi_58001400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_spi_58001400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_status "disabled" -#define DT_N_S_soc_S_spi_58001400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_spi_58001400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_spi_58001400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_spi_58001400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_spi_58001400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_spi_58001400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_58001400, status, 0) -#define DT_N_S_soc_S_spi_58001400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_58001400, status, 0) -#define DT_N_S_soc_S_spi_58001400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_58001400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_58001400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_58001400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_58001400_P_status_LEN 1 -#define DT_N_S_soc_S_spi_58001400_P_status_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_compatible {"st,stm32h7-spi", "st,stm32-spi-fifo", "st,stm32-spi"} -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_0 "st,stm32h7-spi" -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-spi -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_spi -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_SPI -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_1 "st,stm32-spi-fifo" -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_1_STRING_UNQUOTED st,stm32-spi-fifo -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_1_STRING_TOKEN st_stm32_spi_fifo -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_1_STRING_UPPER_TOKEN ST_STM32_SPI_FIFO -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_2 "st,stm32-spi" -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_2_STRING_UNQUOTED st,stm32-spi -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_2_STRING_TOKEN st_stm32_spi -#define DT_N_S_soc_S_spi_58001400_P_compatible_IDX_2_STRING_UPPER_TOKEN ST_STM32_SPI -#define DT_N_S_soc_S_spi_58001400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_58001400, compatible, 0) \ - fn(DT_N_S_soc_S_spi_58001400, compatible, 1) \ - fn(DT_N_S_soc_S_spi_58001400, compatible, 2) -#define DT_N_S_soc_S_spi_58001400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_58001400, compatible, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_58001400, compatible, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_58001400, compatible, 2) -#define DT_N_S_soc_S_spi_58001400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_58001400, compatible, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_58001400, compatible, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_spi_58001400, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_58001400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_58001400, compatible, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_58001400, compatible, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_spi_58001400, compatible, 2, __VA_ARGS__) -#define DT_N_S_soc_S_spi_58001400_P_compatible_LEN 3 -#define DT_N_S_soc_S_spi_58001400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_VAL_bus 244 -#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_VAL_bits 32 -#define DT_N_S_soc_S_spi_58001400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_spi_58001400, clocks, 0) -#define DT_N_S_soc_S_spi_58001400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_spi_58001400, clocks, 0) -#define DT_N_S_soc_S_spi_58001400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_spi_58001400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_58001400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_spi_58001400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_spi_58001400_P_clocks_LEN 1 -#define DT_N_S_soc_S_spi_58001400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_spi_58001400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_wakeup_source 0 -#define DT_N_S_soc_S_spi_58001400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_spi_58001400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_spi_58001400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_pinmux 4301 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/timer@e000e010 + * Devicetree node: /soc/pin-controller@58020000/dcmi_d7_pi7 * - * Node identifier: DT_N_S_soc_S_timer_e000e010 - * - * Binding (compatible = arm,armv7m-systick): - * $ZEPHYR_BASE/dts/bindings/timer/arm,armv7m-systick.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_timer_e000e010_PATH "/soc/timer@e000e010" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_PATH "/soc/pin-controller@58020000/dcmi_d7_pi7" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_timer_e000e010_FULL_NAME "timer@e000e010" -#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_UNQUOTED timer@e000e010 -#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_TOKEN timer_e000e010 -#define DT_N_S_soc_S_timer_e000e010_FULL_NAME_UPPER_TOKEN TIMER_E000E010 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FULL_NAME "dcmi_d7_pi7" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FULL_NAME_UNQUOTED dcmi_d7_pi7 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FULL_NAME_TOKEN dcmi_d7_pi7 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FULL_NAME_UPPER_TOKEN DCMI_D7_PI7 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_timer_e000e010_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timer_e000e010_CHILD_IDX 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_CHILD_IDX 29 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timer_e000e010_NODELABEL_NUM 1 -#define DT_N_S_soc_S_timer_e000e010_FOREACH_NODELABEL(fn) fn(systick) -#define DT_N_S_soc_S_timer_e000e010_FOREACH_NODELABEL_VARGS(fn, ...) fn(systick, __VA_ARGS__) -#define DT_N_S_soc_S_timer_e000e010_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_NODELABEL(fn) fn(dcmi_d7_pi7) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_d7_pi7, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM 0 -#define DT_N_S_soc_S_timer_e000e010_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timer_e000e010_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_timer_e000e010_HASH aZrzPLAIRgEwRZJIvTCzJONA6gPgc4QlhkiU5oWGArA +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_HASH kapieOJTeUS132eSWwuE_kTDdo1nfMo5icj1X6EKixU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timer_e000e010_ORD 130 -#define DT_N_S_soc_S_timer_e000e010_ORD_STR_SORTABLE 00130 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_ORD 179 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_ORD_STR_SORTABLE 00179 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timer_e000e010_REQUIRES_ORDS \ - 3, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timer_e000e010_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_SUPPORTS_ORDS \ + 183, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timer_e000e010_EXISTS 1 -#define DT_N_INST_0_arm_armv7m_systick DT_N_S_soc_S_timer_e000e010 -#define DT_N_NODELABEL_systick DT_N_S_soc_S_timer_e000e010 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_EXISTS 1 +#define DT_N_NODELABEL_dcmi_d7_pi7 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timer_e000e010_REG_NUM 1 -#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_ADDRESS 3758153744 -#define DT_N_S_soc_S_timer_e000e010_REG_IDX_0_VAL_SIZE 16 -#define DT_N_S_soc_S_timer_e000e010_RANGES_NUM 0 -#define DT_N_S_soc_S_timer_e000e010_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timer_e000e010_IRQ_NUM 0 -#define DT_N_S_soc_S_timer_e000e010_IRQ_LEVEL 0 -#define DT_N_S_soc_S_timer_e000e010_COMPAT_MATCHES_arm_armv7m_systick 1 -#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timer_e000e010_COMPAT_VENDOR_IDX_0 "ARM Ltd." -#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timer_e000e010_COMPAT_MODEL_IDX_0 "armv7m-systick" -#define DT_N_S_soc_S_timer_e000e010_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timer_e000e010_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_timer_e000e010_P_reg {3758153744, 16} -#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_0 3758153744 -#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timer_e000e010_P_reg_IDX_1 16 -#define DT_N_S_soc_S_timer_e000e010_P_reg_EXISTS 1 -#define DT_N_S_soc_S_timer_e000e010_P_compatible {"arm,armv7m-systick"} -#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0 "arm,armv7m-systick" -#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UNQUOTED arm,armv7m-systick -#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_TOKEN arm_armv7m_systick -#define DT_N_S_soc_S_timer_e000e010_P_compatible_IDX_0_STRING_UPPER_TOKEN ARM_ARMV7M_SYSTICK -#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0) -#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0) -#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timer_e000e010_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timer_e000e010, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timer_e000e010_P_compatible_LEN 1 -#define DT_N_S_soc_S_timer_e000e010_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timer_e000e010_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source 0 -#define DT_N_S_soc_S_timer_e000e010_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timer_e000e010_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_pinmux 4333 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/timers@40002400 - * - * Node identifier: DT_N_S_soc_S_timers_40002400 + * Devicetree node: /soc/pin-controller@58020000/dcmi_hsync_pa4 * - * Binding (compatible = st,stm32-lptim): - * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-lptim.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_timers_40002400_PATH "/soc/timers@40002400" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_PATH "/soc/pin-controller@58020000/dcmi_hsync_pa4" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40002400_FULL_NAME "timers@40002400" -#define DT_N_S_soc_S_timers_40002400_FULL_NAME_UNQUOTED timers@40002400 -#define DT_N_S_soc_S_timers_40002400_FULL_NAME_TOKEN timers_40002400 -#define DT_N_S_soc_S_timers_40002400_FULL_NAME_UPPER_TOKEN TIMERS_40002400 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FULL_NAME "dcmi_hsync_pa4" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FULL_NAME_UNQUOTED dcmi_hsync_pa4 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FULL_NAME_TOKEN dcmi_hsync_pa4 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FULL_NAME_UPPER_TOKEN DCMI_HSYNC_PA4 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_timers_40002400_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40002400_CHILD_IDX 47 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_CHILD_IDX 19 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40002400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_timers_40002400_FOREACH_NODELABEL(fn) fn(lptim1) -#define DT_N_S_soc_S_timers_40002400_FOREACH_NODELABEL_VARGS(fn, ...) fn(lptim1, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_NODELABEL(fn) fn(dcmi_hsync_pa4) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_hsync_pa4, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40002400_CHILD_NUM 0 -#define DT_N_S_soc_S_timers_40002400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40002400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_timers_40002400_HASH osDElrar1XoqhN_VHTBp2BrAfP_cC1w6IcXhOPWwP8E +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_HASH iKiXwQzwbhlvqRTBX7cXjdqUFrf_jv7FszgiQSASOMY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40002400_ORD 131 -#define DT_N_S_soc_S_timers_40002400_ORD_STR_SORTABLE 00131 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_ORD 180 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_ORD_STR_SORTABLE 00180 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40002400_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40002400_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_SUPPORTS_ORDS \ + 183, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40002400_EXISTS 1 -#define DT_N_INST_0_st_stm32_lptim DT_N_S_soc_S_timers_40002400 -#define DT_N_NODELABEL_lptim1 DT_N_S_soc_S_timers_40002400 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_EXISTS 1 +#define DT_N_NODELABEL_dcmi_hsync_pa4 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40002400_REG_NUM 1 -#define DT_N_S_soc_S_timers_40002400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_REG_IDX_0_VAL_ADDRESS 1073751040 -#define DT_N_S_soc_S_timers_40002400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_timers_40002400_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40002400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40002400_IRQ_NUM 1 -#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_irq 93 -#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_priority 1 -#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40002400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_timers_40002400_IRQ_NAME_wakeup_VAL_irq DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_timers_40002400_IRQ_NAME_wakeup_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_IRQ_NAME_wakeup_VAL_priority DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_timers_40002400_IRQ_NAME_wakeup_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_IRQ_NAME_wakeup_CONTROLLER DT_N_S_soc_S_timers_40002400_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_timers_40002400_COMPAT_MATCHES_st_stm32_lptim 1 -#define DT_N_S_soc_S_timers_40002400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40002400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_COMPAT_MODEL_IDX_0 "stm32-lptim" -#define DT_N_S_soc_S_timers_40002400_STATUS_disabled 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40002400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_timers_40002400_P_st_prescaler 1 -#define DT_N_S_soc_S_timers_40002400_P_st_prescaler_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_timers_40002400_P_st_prescaler_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_st_prescaler_IDX_0_ENUM_VAL_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_st_prescaler_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_reg {1073751040, 1024} -#define DT_N_S_soc_S_timers_40002400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_reg_IDX_0 1073751040 -#define DT_N_S_soc_S_timers_40002400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_timers_40002400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_VAL_bits 512 -#define DT_N_S_soc_S_timers_40002400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002400, clocks, 0) -#define DT_N_S_soc_S_timers_40002400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002400, clocks, 0) -#define DT_N_S_soc_S_timers_40002400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002400_P_clocks_LEN 1 -#define DT_N_S_soc_S_timers_40002400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_status "disabled" -#define DT_N_S_soc_S_timers_40002400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40002400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40002400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40002400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40002400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40002400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002400, status, 0) -#define DT_N_S_soc_S_timers_40002400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002400, status, 0) -#define DT_N_S_soc_S_timers_40002400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002400_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40002400_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_compatible {"st,stm32-lptim"} -#define DT_N_S_soc_S_timers_40002400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_compatible_IDX_0 "st,stm32-lptim" -#define DT_N_S_soc_S_timers_40002400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-lptim -#define DT_N_S_soc_S_timers_40002400_P_compatible_IDX_0_STRING_TOKEN st_stm32_lptim -#define DT_N_S_soc_S_timers_40002400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_LPTIM -#define DT_N_S_soc_S_timers_40002400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002400, compatible, 0) -#define DT_N_S_soc_S_timers_40002400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002400, compatible, 0) -#define DT_N_S_soc_S_timers_40002400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002400_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40002400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_interrupts {93, 1} -#define DT_N_S_soc_S_timers_40002400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_interrupts_IDX_0 93 -#define DT_N_S_soc_S_timers_40002400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_interrupts_IDX_1 1 -#define DT_N_S_soc_S_timers_40002400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names {"wakeup"} -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_IDX_0 "wakeup" -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_IDX_0_STRING_UNQUOTED wakeup -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_IDX_0_STRING_TOKEN wakeup -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN WAKEUP -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002400, interrupt_names, 0) -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002400, interrupt_names, 0) -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002400, interrupt_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002400, interrupt_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_LEN 1 -#define DT_N_S_soc_S_timers_40002400_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40002400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40002400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40002400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40002400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_pinmux 141 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4_P_output_high_EXISTS 1 /* - * Devicetree node: /otghs_fs_phy - * - * Node identifier: DT_N_S_otghs_fs_phy + * Devicetree node: /soc/pin-controller@58020000/dcmi_pixclk_pa6 * - * Binding (compatible = usb-nop-xceiv): - * $ZEPHYR_BASE/dts/bindings/phy/usb-nop-xceiv.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_otghs_fs_phy_PATH "/otghs_fs_phy" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_PATH "/soc/pin-controller@58020000/dcmi_pixclk_pa6" /* Node's name with unit-address: */ -#define DT_N_S_otghs_fs_phy_FULL_NAME "otghs_fs_phy" -#define DT_N_S_otghs_fs_phy_FULL_NAME_UNQUOTED otghs_fs_phy -#define DT_N_S_otghs_fs_phy_FULL_NAME_TOKEN otghs_fs_phy -#define DT_N_S_otghs_fs_phy_FULL_NAME_UPPER_TOKEN OTGHS_FS_PHY +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FULL_NAME "dcmi_pixclk_pa6" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FULL_NAME_UNQUOTED dcmi_pixclk_pa6 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FULL_NAME_TOKEN dcmi_pixclk_pa6 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FULL_NAME_UPPER_TOKEN DCMI_PIXCLK_PA6 -/* Node parent (/) identifier: */ -#define DT_N_S_otghs_fs_phy_PARENT DT_N +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_otghs_fs_phy_CHILD_IDX 19 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_CHILD_IDX 20 /* Helpers for dealing with node labels: */ -#define DT_N_S_otghs_fs_phy_NODELABEL_NUM 1 -#define DT_N_S_otghs_fs_phy_FOREACH_NODELABEL(fn) fn(otghs_fs_phy) -#define DT_N_S_otghs_fs_phy_FOREACH_NODELABEL_VARGS(fn, ...) fn(otghs_fs_phy, __VA_ARGS__) -#define DT_N_S_otghs_fs_phy_FOREACH_ANCESTOR(fn) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_NODELABEL(fn) fn(dcmi_pixclk_pa6) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_pixclk_pa6, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_otghs_fs_phy_CHILD_NUM 0 -#define DT_N_S_otghs_fs_phy_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_otghs_fs_phy_FOREACH_CHILD(fn) -#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_otghs_fs_phy_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_otghs_fs_phy_HASH o2OMyBwvyxbYltqcvcFLzPkg8jqQm_Azar3MBmQRx1E +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_HASH mVi4YyOotcK1r2Fe2vvCwx71UuzWlve2s0gSPxBbdrY /* Node's dependency ordinal: */ -#define DT_N_S_otghs_fs_phy_ORD 132 -#define DT_N_S_otghs_fs_phy_ORD_STR_SORTABLE 00132 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_ORD 181 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_ORD_STR_SORTABLE 00181 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_otghs_fs_phy_REQUIRES_ORDS \ - 0, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_otghs_fs_phy_SUPPORTS_ORDS \ - 133, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_SUPPORTS_ORDS \ + 183, /* Existence and alternate IDs: */ -#define DT_N_S_otghs_fs_phy_EXISTS 1 -#define DT_N_INST_0_usb_nop_xceiv DT_N_S_otghs_fs_phy -#define DT_N_NODELABEL_otghs_fs_phy DT_N_S_otghs_fs_phy +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_EXISTS 1 +#define DT_N_NODELABEL_dcmi_pixclk_pa6 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6 /* Macros for properties that are special in the specification: */ -#define DT_N_S_otghs_fs_phy_REG_NUM 0 -#define DT_N_S_otghs_fs_phy_RANGES_NUM 0 -#define DT_N_S_otghs_fs_phy_FOREACH_RANGE(fn) -#define DT_N_S_otghs_fs_phy_IRQ_NUM 0 -#define DT_N_S_otghs_fs_phy_IRQ_LEVEL 0 -#define DT_N_S_otghs_fs_phy_COMPAT_MATCHES_usb_nop_xceiv 1 -#define DT_N_S_otghs_fs_phy_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_otghs_fs_phy_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_otghs_fs_phy_P_compatible {"usb-nop-xceiv"} -#define DT_N_S_otghs_fs_phy_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_otghs_fs_phy_P_compatible_IDX_0 "usb-nop-xceiv" -#define DT_N_S_otghs_fs_phy_P_compatible_IDX_0_STRING_UNQUOTED usb-nop-xceiv -#define DT_N_S_otghs_fs_phy_P_compatible_IDX_0_STRING_TOKEN usb_nop_xceiv -#define DT_N_S_otghs_fs_phy_P_compatible_IDX_0_STRING_UPPER_TOKEN USB_NOP_XCEIV -#define DT_N_S_otghs_fs_phy_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_otghs_fs_phy, compatible, 0) -#define DT_N_S_otghs_fs_phy_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_otghs_fs_phy, compatible, 0) -#define DT_N_S_otghs_fs_phy_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_otghs_fs_phy, compatible, 0, __VA_ARGS__) -#define DT_N_S_otghs_fs_phy_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_otghs_fs_phy, compatible, 0, __VA_ARGS__) -#define DT_N_S_otghs_fs_phy_P_compatible_LEN 1 -#define DT_N_S_otghs_fs_phy_P_compatible_EXISTS 1 -#define DT_N_S_otghs_fs_phy_P_zephyr_deferred_init 0 -#define DT_N_S_otghs_fs_phy_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_otghs_fs_phy_P_wakeup_source 0 -#define DT_N_S_otghs_fs_phy_P_wakeup_source_EXISTS 1 -#define DT_N_S_otghs_fs_phy_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_otghs_fs_phy_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_pinmux 205 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/usb@40080000 - * - * Node identifier: DT_N_S_soc_S_usb_40080000 + * Devicetree node: /soc/pin-controller@58020000/dcmi_vsync_pi5 * - * Binding (compatible = st,stm32-otgfs): - * $ZEPHYR_BASE/dts/bindings/usb/st,stm32-otgfs.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_usb_40080000_PATH "/soc/usb@40080000" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_PATH "/soc/pin-controller@58020000/dcmi_vsync_pi5" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_usb_40080000_FULL_NAME "usb@40080000" -#define DT_N_S_soc_S_usb_40080000_FULL_NAME_UNQUOTED usb@40080000 -#define DT_N_S_soc_S_usb_40080000_FULL_NAME_TOKEN usb_40080000 -#define DT_N_S_soc_S_usb_40080000_FULL_NAME_UPPER_TOKEN USB_40080000 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FULL_NAME "dcmi_vsync_pi5" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FULL_NAME_UNQUOTED dcmi_vsync_pi5 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FULL_NAME_TOKEN dcmi_vsync_pi5 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FULL_NAME_UPPER_TOKEN DCMI_VSYNC_PI5 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_usb_40080000_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_usb_40080000_CHILD_IDX 69 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_CHILD_IDX 27 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_usb_40080000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_usb_40080000_FOREACH_NODELABEL(fn) fn(usbotg_fs) -#define DT_N_S_soc_S_usb_40080000_FOREACH_NODELABEL_VARGS(fn, ...) fn(usbotg_fs, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_NODELABEL(fn) fn(dcmi_vsync_pi5) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_vsync_pi5, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_usb_40080000_CHILD_NUM 0 -#define DT_N_S_soc_S_usb_40080000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_usb_40080000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_usb_40080000_HASH xQGu00gNbjCT_OUyCiyF7fOwmsW7_CAqPiYuAkB0nlI +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_HASH 33sSwDavP9e2cqB9QXNLD4BvqG2MPRYyxCXxJbTdC1I /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_usb_40080000_ORD 133 -#define DT_N_S_soc_S_usb_40080000_ORD_STR_SORTABLE 00133 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_ORD 182 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_ORD_STR_SORTABLE 00182 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_usb_40080000_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 132, +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_usb_40080000_SUPPORTS_ORDS - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_usb_40080000_EXISTS 1 -#define DT_N_INST_0_st_stm32_otgfs DT_N_S_soc_S_usb_40080000 -#define DT_N_NODELABEL_usbotg_fs DT_N_S_soc_S_usb_40080000 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_usb_40080000_REG_NUM 1 -#define DT_N_S_soc_S_usb_40080000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_REG_IDX_0_VAL_ADDRESS 1074266112 -#define DT_N_S_soc_S_usb_40080000_REG_IDX_0_VAL_SIZE 262144 -#define DT_N_S_soc_S_usb_40080000_RANGES_NUM 0 -#define DT_N_S_soc_S_usb_40080000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_usb_40080000_IRQ_NUM 4 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_irq 98 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_irq 99 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_irq 100 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_priority 0 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_irq 101 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_priority 0 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_usb_40080000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_out_VAL_irq DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_out_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_out_VAL_priority DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_out_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_out_CONTROLLER DT_N_S_soc_S_usb_40080000_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_in_VAL_irq DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_irq -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_in_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_in_VAL_priority DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_VAL_priority -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_in_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_ep1_in_CONTROLLER DT_N_S_soc_S_usb_40080000_IRQ_IDX_1_CONTROLLER -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_wkup_VAL_irq DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_irq -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_wkup_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_wkup_VAL_priority DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_VAL_priority -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_wkup_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_wkup_CONTROLLER DT_N_S_soc_S_usb_40080000_IRQ_IDX_2_CONTROLLER -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_otgfs_VAL_irq DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_irq -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_otgfs_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_otgfs_VAL_priority DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_VAL_priority -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_otgfs_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_IRQ_NAME_otgfs_CONTROLLER DT_N_S_soc_S_usb_40080000_IRQ_IDX_3_CONTROLLER -#define DT_N_S_soc_S_usb_40080000_COMPAT_MATCHES_st_stm32_otgfs 1 -#define DT_N_S_soc_S_usb_40080000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_usb_40080000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_COMPAT_MODEL_IDX_0 "stm32-otgfs" -#define DT_N_S_soc_S_usb_40080000_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_usb_40080000_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_usb_40080000_P_reg {1074266112, 262144} -#define DT_N_S_soc_S_usb_40080000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_reg_IDX_0 1074266112 -#define DT_N_S_soc_S_usb_40080000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_reg_IDX_1 262144 -#define DT_N_S_soc_S_usb_40080000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupts {98, 0, 99, 0, 100, 0, 101, 0} -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_0 98 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_2 99 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_4 100 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_5 0 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_6 101 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_IDX_7 0 -#define DT_N_S_soc_S_usb_40080000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_ram_size 4096 -#define DT_N_S_soc_S_usb_40080000_P_ram_size_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_phys DT_N_S_otghs_fs_phy -#define DT_N_S_soc_S_usb_40080000_P_phys_IDX_0 DT_N_S_otghs_fs_phy -#define DT_N_S_soc_S_usb_40080000_P_phys_IDX_0_PH DT_N_S_otghs_fs_phy -#define DT_N_S_soc_S_usb_40080000_P_phys_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_phys_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, phys, 0) -#define DT_N_S_soc_S_usb_40080000_P_phys_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, phys, 0) -#define DT_N_S_soc_S_usb_40080000_P_phys_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, phys, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_phys_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, phys, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_phys_LEN 1 -#define DT_N_S_soc_S_usb_40080000_P_phys_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_VAL_bus 216 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_VAL_bits 134217728 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_VAL_bus 5 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_VAL_bits 416546900 -#define DT_N_S_soc_S_usb_40080000_P_clocks_IDX_1_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, clocks, 0) \ - fn(DT_N_S_soc_S_usb_40080000, clocks, 1) -#define DT_N_S_soc_S_usb_40080000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, clocks, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40080000, clocks, 1) -#define DT_N_S_soc_S_usb_40080000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, clocks, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40080000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, clocks, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40080000, clocks, 1, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_clocks_LEN 2 -#define DT_N_S_soc_S_usb_40080000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_num_bidir_endpoints 9 -#define DT_N_S_soc_S_usb_40080000_P_num_bidir_endpoints_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed "full-speed" -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_STRING_UNQUOTED full-speed -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_STRING_TOKEN full_speed -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_STRING_UPPER_TOKEN FULL_SPEED -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_IDX_0 "full-speed" -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_IDX_0_ENUM_VAL_full_speed_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, maximum_speed, 0) -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, maximum_speed, 0) -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, maximum_speed, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, maximum_speed, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_LEN 1 -#define DT_N_S_soc_S_usb_40080000_P_maximum_speed_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_status "disabled" -#define DT_N_S_soc_S_usb_40080000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_usb_40080000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_usb_40080000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_usb_40080000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_usb_40080000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_usb_40080000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, status, 0) -#define DT_N_S_soc_S_usb_40080000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, status, 0) -#define DT_N_S_soc_S_usb_40080000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_status_LEN 1 -#define DT_N_S_soc_S_usb_40080000_P_status_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_compatible {"st,stm32-otgfs"} -#define DT_N_S_soc_S_usb_40080000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_compatible_IDX_0 "st,stm32-otgfs" -#define DT_N_S_soc_S_usb_40080000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-otgfs -#define DT_N_S_soc_S_usb_40080000_P_compatible_IDX_0_STRING_TOKEN st_stm32_otgfs -#define DT_N_S_soc_S_usb_40080000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_OTGFS -#define DT_N_S_soc_S_usb_40080000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, compatible, 0) -#define DT_N_S_soc_S_usb_40080000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, compatible, 0) -#define DT_N_S_soc_S_usb_40080000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_compatible_LEN 1 -#define DT_N_S_soc_S_usb_40080000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names {"ep1_out", "ep1_in", "wkup", "otgfs"} -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_0 "ep1_out" -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_0_STRING_UNQUOTED ep1_out -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_0_STRING_TOKEN ep1_out -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN EP1_OUT -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_1 "ep1_in" -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_1_STRING_UNQUOTED ep1_in -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_1_STRING_TOKEN ep1_in -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN EP1_IN -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_2 "wkup" -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_2_STRING_UNQUOTED wkup -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_2_STRING_TOKEN wkup -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN WKUP -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_3 "otgfs" -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_3_STRING_UNQUOTED otgfs -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_3_STRING_TOKEN otgfs -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN OTGFS -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 0) \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 1) \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 2) \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 3) -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 3) -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 3, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_usb_40080000, interrupt_names, 3, __VA_ARGS__) -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_LEN 4 -#define DT_N_S_soc_S_usb_40080000_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_usb_40080000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_wakeup_source 0 -#define DT_N_S_soc_S_usb_40080000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_usb_40080000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_usb_40080000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_SUPPORTS_ORDS \ + 183, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_EXISTS 1 +#define DT_N_NODELABEL_dcmi_vsync_pi5 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_PINCTRL_NUM 0 + +/* Generic property macros: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_pinmux 4269 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_bias_pull_up 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/watchdog@50003000 + * Devicetree node: /soc/dcmi@48020000 * - * Node identifier: DT_N_S_soc_S_watchdog_50003000 + * Node identifier: DT_N_S_soc_S_dcmi_48020000 * - * Binding (compatible = st,stm32-window-watchdog): - * $ZEPHYR_BASE/dts/bindings/watchdog/st,stm32-window-watchdog.yaml + * Binding (compatible = st,stm32-dcmi): + * $ZEPHYR_BASE/dts/bindings/video/st,stm32-dcmi.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_watchdog_50003000_PATH "/soc/watchdog@50003000" +#define DT_N_S_soc_S_dcmi_48020000_PATH "/soc/dcmi@48020000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_watchdog_50003000_FULL_NAME "watchdog@50003000" -#define DT_N_S_soc_S_watchdog_50003000_FULL_NAME_UNQUOTED watchdog@50003000 -#define DT_N_S_soc_S_watchdog_50003000_FULL_NAME_TOKEN watchdog_50003000 -#define DT_N_S_soc_S_watchdog_50003000_FULL_NAME_UPPER_TOKEN WATCHDOG_50003000 +#define DT_N_S_soc_S_dcmi_48020000_FULL_NAME "dcmi@48020000" +#define DT_N_S_soc_S_dcmi_48020000_FULL_NAME_UNQUOTED dcmi@48020000 +#define DT_N_S_soc_S_dcmi_48020000_FULL_NAME_TOKEN dcmi_48020000 +#define DT_N_S_soc_S_dcmi_48020000_FULL_NAME_UPPER_TOKEN DCMI_48020000 /* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_watchdog_50003000_PARENT DT_N_S_soc +#define DT_N_S_soc_S_dcmi_48020000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_watchdog_50003000_CHILD_IDX 7 +#define DT_N_S_soc_S_dcmi_48020000_CHILD_IDX 65 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_watchdog_50003000_NODELABEL_NUM 2 -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_NODELABEL(fn) fn(wwdg) fn(wwdg1) -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_NODELABEL_VARGS(fn, ...) fn(wwdg, __VA_ARGS__) fn(wwdg1, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_dcmi_48020000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_NODELABEL(fn) fn(dcmi) +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_watchdog_50003000_CHILD_NUM 0 -#define DT_N_S_soc_S_watchdog_50003000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dcmi_48020000_CHILD_NUM 1 +#define DT_N_S_soc_S_dcmi_48020000_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_dcmi_48020000_S_port) +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000_S_port) +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_dcmi_48020000_S_port) +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000_S_port) +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_dcmi_48020000_HASH AKyVuuDdy0BqNKfdyf9nqyXlgLq6PAMDsyCrGlq8t7w + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dcmi_48020000_ORD 183 +#define DT_N_S_soc_S_dcmi_48020000_ORD_STR_SORTABLE 00183 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_dcmi_48020000_REQUIRES_ORDS \ + 3, \ + 4, \ + 8, \ + 170, \ + 171, \ + 172, \ + 173, \ + 174, \ + 175, \ + 176, \ + 177, \ + 178, \ + 179, \ + 180, \ + 181, \ + 182, -/* Node's hash: */ -#define DT_N_S_soc_S_watchdog_50003000_HASH h6NwKkuA2dqrATUehpYE_fmTSXYsEpA87_DH2Xd1Ie8 +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_dcmi_48020000_SUPPORTS_ORDS \ + 184, -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_watchdog_50003000_ORD 134 -#define DT_N_S_soc_S_watchdog_50003000_ORD_STR_SORTABLE 00134 +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_dcmi_48020000_EXISTS 1 +#define DT_N_INST_0_st_stm32_dcmi DT_N_S_soc_S_dcmi_48020000 +#define DT_N_NODELABEL_dcmi DT_N_S_soc_S_dcmi_48020000 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_dcmi_48020000_REG_NUM 1 +#define DT_N_S_soc_S_dcmi_48020000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_REG_IDX_0_VAL_ADDRESS 1208090624 +#define DT_N_S_soc_S_dcmi_48020000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_dcmi_48020000_RANGES_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dcmi_48020000_IRQ_NUM 1 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_irq 78 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_priority 0 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_LEVEL 1 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_NAME_dcmi_VAL_irq DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_irq +#define DT_N_S_soc_S_dcmi_48020000_IRQ_NAME_dcmi_VAL_irq_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_NAME_dcmi_VAL_priority DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_VAL_priority +#define DT_N_S_soc_S_dcmi_48020000_IRQ_NAME_dcmi_VAL_priority_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_IRQ_NAME_dcmi_CONTROLLER DT_N_S_soc_S_dcmi_48020000_IRQ_IDX_0_CONTROLLER +#define DT_N_S_soc_S_dcmi_48020000_COMPAT_MATCHES_st_stm32_dcmi 1 +#define DT_N_S_soc_S_dcmi_48020000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_dcmi_48020000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_COMPAT_MODEL_IDX_0 "stm32-dcmi" +#define DT_N_S_soc_S_dcmi_48020000_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NUM 1 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6 +#define DT_N_S_soc_S_dcmi_48020000_PINCTRL_NAME_default_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7 + +/* Generic property macros: */ +#define DT_N_S_soc_S_dcmi_48020000_P_interrupts {78, 0} +#define DT_N_S_soc_S_dcmi_48020000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_interrupts_IDX_0 78 +#define DT_N_S_soc_S_dcmi_48020000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_dcmi_48020000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_sensor DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c +#define DT_N_S_soc_S_dcmi_48020000_P_sensor_IDX_0 DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c +#define DT_N_S_soc_S_dcmi_48020000_P_sensor_IDX_0_PH DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c +#define DT_N_S_soc_S_dcmi_48020000_P_sensor_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_sensor_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, sensor, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_sensor_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, sensor, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_sensor_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, sensor, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_sensor_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, sensor, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_sensor_LEN 1 +#define DT_N_S_soc_S_dcmi_48020000_P_sensor_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_bus_width 8 +#define DT_N_S_soc_S_dcmi_48020000_P_bus_width_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_dcmi_48020000_P_bus_width_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_bus_width_IDX_0_ENUM_VAL_8_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_bus_width_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_hsync_active 0 +#define DT_N_S_soc_S_dcmi_48020000_P_hsync_active_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_dcmi_48020000_P_hsync_active_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_hsync_active_IDX_0_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_hsync_active_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_vsync_active 0 +#define DT_N_S_soc_S_dcmi_48020000_P_vsync_active_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_dcmi_48020000_P_vsync_active_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_vsync_active_IDX_0_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_vsync_active_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pixelclk_active 0 +#define DT_N_S_soc_S_dcmi_48020000_P_pixelclk_active_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_dcmi_48020000_P_pixelclk_active_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pixelclk_active_IDX_0_ENUM_VAL_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pixelclk_active_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_capture_rate 1 +#define DT_N_S_soc_S_dcmi_48020000_P_capture_rate_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_dcmi_48020000_P_capture_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_capture_rate_IDX_0_ENUM_VAL_1_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_capture_rate_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_IDX_0_PH DT_N_S_soc_S_dma_40020000 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_IDX_0_VAL_channel 0 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_IDX_0_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_IDX_0_VAL_slot 75 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_IDX_0_VAL_slot_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_IDX_0_VAL_channel_config 152704 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_IDX_0_VAL_channel_config_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_IDX_0_VAL_features 3 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_IDX_0_VAL_features_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, dmas, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, dmas, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, dmas, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, dmas, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_LEN 1 +#define DT_N_S_soc_S_dcmi_48020000_P_dmas_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_status "okay" +#define DT_N_S_soc_S_dcmi_48020000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_dcmi_48020000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_dcmi_48020000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_dcmi_48020000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_dcmi_48020000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_dcmi_48020000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, status, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, status, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_status_LEN 1 +#define DT_N_S_soc_S_dcmi_48020000_P_status_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_compatible {"st,stm32-dcmi"} +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_IDX_0 "st,stm32-dcmi" +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-dcmi +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_IDX_0_STRING_TOKEN st_stm32_dcmi +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_DCMI +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, compatible, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, compatible, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_LEN 1 +#define DT_N_S_soc_S_dcmi_48020000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_reg {1208090624, 1024} +#define DT_N_S_soc_S_dcmi_48020000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_reg_IDX_0 1208090624 +#define DT_N_S_soc_S_dcmi_48020000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_dcmi_48020000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names {"dcmi"} +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_IDX_0 "dcmi" +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_IDX_0_STRING_UNQUOTED dcmi +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_IDX_0_STRING_TOKEN dcmi +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN DCMI +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, interrupt_names, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, interrupt_names, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_dcmi_48020000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_VAL_bus 220 +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_VAL_bits 1 +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, clocks, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, clocks, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_LEN 1 +#define DT_N_S_soc_S_dcmi_48020000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_dcmi_48020000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_wakeup_source 0 +#define DT_N_S_soc_S_dcmi_48020000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_dcmi_48020000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_3 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_4 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_5 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_6 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_7 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_8 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_9 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_10 DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 1) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 2) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 3) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 4) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 5) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 6) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 7) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 8) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 9) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 10) +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 10) +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 7, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 8, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 9, __VA_ARGS__) \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 10, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_0, 10, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_LEN 11 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_names, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_names, 0) +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_dcmi_48020000_P_pinctrl_names_EXISTS 1 + +/* + * Devicetree node: /soc/dcmi@48020000/port + * + * Node identifier: DT_N_S_soc_S_dcmi_48020000_S_port + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_dcmi_48020000_S_port_PATH "/soc/dcmi@48020000/port" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_dcmi_48020000_S_port_FULL_NAME "port" +#define DT_N_S_soc_S_dcmi_48020000_S_port_FULL_NAME_UNQUOTED port +#define DT_N_S_soc_S_dcmi_48020000_S_port_FULL_NAME_TOKEN port +#define DT_N_S_soc_S_dcmi_48020000_S_port_FULL_NAME_UPPER_TOKEN PORT + +/* Node parent (/soc/dcmi@48020000) identifier: */ +#define DT_N_S_soc_S_dcmi_48020000_S_port_PARENT DT_N_S_soc_S_dcmi_48020000 + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_dcmi_48020000_S_port_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_dcmi_48020000_S_port_NODELABEL_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_dcmi_48020000_S_port_CHILD_NUM 1 +#define DT_N_S_soc_S_dcmi_48020000_S_port_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint) +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint) +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint) +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint) +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_dcmi_48020000_S_port_HASH FtRDZGuTtDnSxAKoDtjT4I75ptLd4ass4VeNz58HkcM + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_dcmi_48020000_S_port_ORD 184 +#define DT_N_S_soc_S_dcmi_48020000_S_port_ORD_STR_SORTABLE 00184 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_watchdog_50003000_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, +#define DT_N_S_soc_S_dcmi_48020000_S_port_REQUIRES_ORDS \ + 183, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_watchdog_50003000_SUPPORTS_ORDS +#define DT_N_S_soc_S_dcmi_48020000_S_port_SUPPORTS_ORDS \ + 185, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_watchdog_50003000_EXISTS 1 -#define DT_N_INST_0_st_stm32_window_watchdog DT_N_S_soc_S_watchdog_50003000 -#define DT_N_NODELABEL_wwdg DT_N_S_soc_S_watchdog_50003000 -#define DT_N_NODELABEL_wwdg1 DT_N_S_soc_S_watchdog_50003000 +#define DT_N_S_soc_S_dcmi_48020000_S_port_EXISTS 1 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_watchdog_50003000_REG_NUM 1 -#define DT_N_S_soc_S_watchdog_50003000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_REG_IDX_0_VAL_ADDRESS 1342189568 -#define DT_N_S_soc_S_watchdog_50003000_REG_IDX_0_VAL_SIZE 4096 -#define DT_N_S_soc_S_watchdog_50003000_RANGES_NUM 0 -#define DT_N_S_soc_S_watchdog_50003000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_watchdog_50003000_IRQ_NUM 1 -#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_VAL_irq 0 -#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_VAL_priority 7 -#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_watchdog_50003000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_watchdog_50003000_COMPAT_MATCHES_st_stm32_window_watchdog 1 -#define DT_N_S_soc_S_watchdog_50003000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_watchdog_50003000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_COMPAT_MODEL_IDX_0 "stm32-window-watchdog" -#define DT_N_S_soc_S_watchdog_50003000_STATUS_disabled 1 +#define DT_N_S_soc_S_dcmi_48020000_S_port_REG_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_RANGES_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dcmi_48020000_S_port_IRQ_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_IRQ_LEVEL 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_watchdog_50003000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_PINCTRL_NUM 0 -/* Generic property macros: */ -#define DT_N_S_soc_S_watchdog_50003000_P_reg {1342189568, 4096} -#define DT_N_S_soc_S_watchdog_50003000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_reg_IDX_0 1342189568 -#define DT_N_S_soc_S_watchdog_50003000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_reg_IDX_1 4096 -#define DT_N_S_soc_S_watchdog_50003000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_VAL_bus 228 -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_VAL_bits 64 -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_50003000, clocks, 0) -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_50003000, clocks, 0) -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_50003000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_50003000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_LEN 1 -#define DT_N_S_soc_S_watchdog_50003000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_status "disabled" -#define DT_N_S_soc_S_watchdog_50003000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_watchdog_50003000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_watchdog_50003000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_watchdog_50003000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_watchdog_50003000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_watchdog_50003000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_50003000, status, 0) -#define DT_N_S_soc_S_watchdog_50003000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_50003000, status, 0) -#define DT_N_S_soc_S_watchdog_50003000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_50003000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_50003000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_50003000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_50003000_P_status_LEN 1 -#define DT_N_S_soc_S_watchdog_50003000_P_status_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_compatible {"st,stm32-window-watchdog"} -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_IDX_0 "st,stm32-window-watchdog" -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-window-watchdog -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_IDX_0_STRING_TOKEN st_stm32_window_watchdog -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_WINDOW_WATCHDOG -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_50003000, compatible, 0) -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_50003000, compatible, 0) -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_50003000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_50003000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_LEN 1 -#define DT_N_S_soc_S_watchdog_50003000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_interrupts {0, 7} -#define DT_N_S_soc_S_watchdog_50003000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_interrupts_IDX_0 0 -#define DT_N_S_soc_S_watchdog_50003000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_interrupts_IDX_1 7 -#define DT_N_S_soc_S_watchdog_50003000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_watchdog_50003000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_wakeup_source 0 -#define DT_N_S_soc_S_watchdog_50003000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_watchdog_50003000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_watchdog_50003000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +/* (No generic property macros) */ /* - * Devicetree node: /soc/watchdog@58004800 - * - * Node identifier: DT_N_S_soc_S_watchdog_58004800 - * - * Binding (compatible = st,stm32-watchdog): - * $ZEPHYR_BASE/dts/bindings/watchdog/st,stm32-watchdog.yaml + * Devicetree node: /soc/dcmi@48020000/port/endpoint * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) + * Node identifier: DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint */ /* Node's full path: */ -#define DT_N_S_soc_S_watchdog_58004800_PATH "/soc/watchdog@58004800" +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_PATH "/soc/dcmi@48020000/port/endpoint" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_watchdog_58004800_FULL_NAME "watchdog@58004800" -#define DT_N_S_soc_S_watchdog_58004800_FULL_NAME_UNQUOTED watchdog@58004800 -#define DT_N_S_soc_S_watchdog_58004800_FULL_NAME_TOKEN watchdog_58004800 -#define DT_N_S_soc_S_watchdog_58004800_FULL_NAME_UPPER_TOKEN WATCHDOG_58004800 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FULL_NAME "endpoint" +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FULL_NAME_UNQUOTED endpoint +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FULL_NAME_TOKEN endpoint +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FULL_NAME_UPPER_TOKEN ENDPOINT -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_watchdog_58004800_PARENT DT_N_S_soc +/* Node parent (/soc/dcmi@48020000/port) identifier: */ +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_PARENT DT_N_S_soc_S_dcmi_48020000_S_port /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_watchdog_58004800_CHILD_IDX 6 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_watchdog_58004800_NODELABEL_NUM 2 -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_NODELABEL(fn) fn(iwdg) fn(iwdg1) -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_NODELABEL_VARGS(fn, ...) fn(iwdg, __VA_ARGS__) fn(iwdg1, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_NODELABEL_NUM 1 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_NODELABEL(fn) fn(dcmi_ep_in) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_NODELABEL_VARGS(fn, ...) fn(dcmi_ep_in, __VA_ARGS__) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_dcmi_48020000_S_port) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_watchdog_58004800_CHILD_NUM 0 -#define DT_N_S_soc_S_watchdog_58004800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_CHILD_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_watchdog_58004800_HASH hmuLGnCZ0GRUbiqizyisLpZoBY0jIIGA5bKix63nTGY +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_HASH yuA5OY7iwp3Pv_2NaRHhdPf_h2iVwx8JUWStpl69F2Y /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_watchdog_58004800_ORD 135 -#define DT_N_S_soc_S_watchdog_58004800_ORD_STR_SORTABLE 00135 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_ORD 185 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_ORD_STR_SORTABLE 00185 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_watchdog_58004800_REQUIRES_ORDS \ - 3, +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_REQUIRES_ORDS \ + 184, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_watchdog_58004800_SUPPORTS_ORDS +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_watchdog_58004800_EXISTS 1 -#define DT_N_INST_0_st_stm32_watchdog DT_N_S_soc_S_watchdog_58004800 -#define DT_N_NODELABEL_iwdg DT_N_S_soc_S_watchdog_58004800 -#define DT_N_NODELABEL_iwdg1 DT_N_S_soc_S_watchdog_58004800 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_EXISTS 1 +#define DT_N_NODELABEL_dcmi_ep_in DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_watchdog_58004800_REG_NUM 1 -#define DT_N_S_soc_S_watchdog_58004800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_REG_IDX_0_VAL_ADDRESS 1476413440 -#define DT_N_S_soc_S_watchdog_58004800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_watchdog_58004800_RANGES_NUM 0 -#define DT_N_S_soc_S_watchdog_58004800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_watchdog_58004800_IRQ_NUM 0 -#define DT_N_S_soc_S_watchdog_58004800_IRQ_LEVEL 0 -#define DT_N_S_soc_S_watchdog_58004800_COMPAT_MATCHES_st_stm32_watchdog 1 -#define DT_N_S_soc_S_watchdog_58004800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_watchdog_58004800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_COMPAT_MODEL_IDX_0 "stm32-watchdog" -#define DT_N_S_soc_S_watchdog_58004800_STATUS_disabled 1 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_REG_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_RANGES_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_IRQ_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_IRQ_LEVEL 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_watchdog_58004800_PINCTRL_NUM 0 +#define DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint_PINCTRL_NUM 0 -/* Generic property macros: */ -#define DT_N_S_soc_S_watchdog_58004800_P_reg {1476413440, 1024} -#define DT_N_S_soc_S_watchdog_58004800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_P_reg_IDX_0 1476413440 -#define DT_N_S_soc_S_watchdog_58004800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_watchdog_58004800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_P_status "disabled" -#define DT_N_S_soc_S_watchdog_58004800_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_watchdog_58004800_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_watchdog_58004800_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_watchdog_58004800_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_watchdog_58004800_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_watchdog_58004800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_58004800, status, 0) -#define DT_N_S_soc_S_watchdog_58004800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_58004800, status, 0) -#define DT_N_S_soc_S_watchdog_58004800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_58004800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_58004800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_58004800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_58004800_P_status_LEN 1 -#define DT_N_S_soc_S_watchdog_58004800_P_status_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_P_compatible {"st,stm32-watchdog"} -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_IDX_0 "st,stm32-watchdog" -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-watchdog -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_IDX_0_STRING_TOKEN st_stm32_watchdog -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_WATCHDOG -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_watchdog_58004800, compatible, 0) -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_watchdog_58004800, compatible, 0) -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_watchdog_58004800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_watchdog_58004800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_LEN 1 -#define DT_N_S_soc_S_watchdog_58004800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_watchdog_58004800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_P_wakeup_source 0 -#define DT_N_S_soc_S_watchdog_58004800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_watchdog_58004800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_watchdog_58004800_P_zephyr_pm_device_runtime_auto_EXISTS 1 +/* (No generic property macros) */ /* * Devicetree node: /soc/pin-controller@58020000/eth_crs_dv_pa7 @@ -21388,7 +28912,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_CHILD_IDX 11 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_CHILD_IDX 30 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_NODELABEL_NUM 1 @@ -21412,16 +28936,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_HASH oFKr9TEB6u59eLpjae5DRjGPWfCoMqfHv8e1xnql1L4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_ORD 136 -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_ORD_STR_SORTABLE 00136 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_ORD 186 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_ORD_STR_SORTABLE 00186 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_SUPPORTS_ORDS \ - 143, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7_EXISTS 1 @@ -21492,7 +29016,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_CHILD_IDX 14 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_CHILD_IDX 33 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_NODELABEL_NUM 1 @@ -21516,16 +29040,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_HASH MqJzuaMoSmG59LxvOEm0GtG_muwvpeJYXDnNz4hHG_Q /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_ORD 137 -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_ORD_STR_SORTABLE 00137 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_ORD 187 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_ORD_STR_SORTABLE 00187 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_SUPPORTS_ORDS \ - 143, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1_EXISTS 1 @@ -21596,7 +29120,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_CHILD_IDX 15 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_CHILD_IDX 34 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_NODELABEL_NUM 1 @@ -21620,16 +29144,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_HASH dvZDN8qUsPcQpCi7KRCfltMFXsclzfeJYoxmrX_OH1M /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_ORD 138 -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_ORD_STR_SORTABLE 00138 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_ORD 188 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_ORD_STR_SORTABLE 00188 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_SUPPORTS_ORDS \ - 143, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4_EXISTS 1 @@ -21700,7 +29224,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_CHILD_IDX 16 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_CHILD_IDX 35 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_NODELABEL_NUM 1 @@ -21724,16 +29248,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_HASH Szm83t7Y1uGharAcbaAdOwUR3iWwDjdxifUYYCL2G3w /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_ORD 139 -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_ORD_STR_SORTABLE 00139 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_ORD 189 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_ORD_STR_SORTABLE 00189 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_SUPPORTS_ORDS \ - 143, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5_EXISTS 1 @@ -21804,7 +29328,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_CHILD_IDX 19 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_CHILD_IDX 38 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_NODELABEL_NUM 1 @@ -21828,16 +29352,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_HASH _hYMfRTt9mSw618j8qNRaXm4oyiwUrDVG9Usxaea2_Y /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_ORD 140 -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_ORD_STR_SORTABLE 00140 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_ORD 190 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_ORD_STR_SORTABLE 00190 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_SUPPORTS_ORDS \ - 143, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11_EXISTS 1 @@ -21908,7 +29432,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_CHILD_IDX 17 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_CHILD_IDX 36 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_NODELABEL_NUM 1 @@ -21932,16 +29456,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_HASH Sk32h3rwydmEGtU79tBnTZK5pPgZC13PvNkG1xq80eU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_ORD 141 -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_ORD_STR_SORTABLE 00141 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_ORD 191 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_ORD_STR_SORTABLE 00191 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_SUPPORTS_ORDS \ - 143, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13_EXISTS 1 @@ -22012,7 +29536,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_CHILD_IDX 18 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_CHILD_IDX 37 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_NODELABEL_NUM 1 @@ -22036,16 +29560,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_HASH GJqwQ_pnlMrmDmXYSSTDxvQ0WcMovta_QyiEcMARVt8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_ORD 142 -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_ORD_STR_SORTABLE 00142 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_ORD 192 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_ORD_STR_SORTABLE 00192 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_SUPPORTS_ORDS \ - 143, + 193, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12_EXISTS 1 @@ -22143,25 +29667,25 @@ #define DT_N_S_soc_S_ethernet_40028000_HASH NBHLaJx7ay1JQmiZCtQoklPEGDXvh9V0u5wy5wSK0dE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_ethernet_40028000_ORD 143 -#define DT_N_S_soc_S_ethernet_40028000_ORD_STR_SORTABLE 00143 +#define DT_N_S_soc_S_ethernet_40028000_ORD 193 +#define DT_N_S_soc_S_ethernet_40028000_ORD_STR_SORTABLE 00193 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_ethernet_40028000_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 136, \ - 137, \ - 138, \ - 139, \ - 140, \ - 141, \ - 142, + 186, \ + 187, \ + 188, \ + 189, \ + 190, \ + 191, \ + 192, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_ethernet_40028000_SUPPORTS_ORDS \ - 146, + 196, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_ethernet_40028000_EXISTS 1 @@ -22451,7 +29975,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_CHILD_IDX 12 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_CHILD_IDX 31 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_NODELABEL_NUM 1 @@ -22475,16 +29999,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_HASH zorugiHZ1aufNh_9TUyDaQOXpjbTFffVW7V3x5Z_wiM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_ORD 144 -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_ORD_STR_SORTABLE 00144 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_ORD 194 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_ORD_STR_SORTABLE 00194 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_SUPPORTS_ORDS \ - 146, + 196, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1_EXISTS 1 @@ -22555,7 +30079,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_CHILD_IDX 13 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_CHILD_IDX 32 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_NODELABEL_NUM 1 @@ -22579,16 +30103,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_HASH sI1YZlEZNCOHNob9THopAPP8SD7rtxRxp4SDh5uDk6w /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_ORD 145 -#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_ORD_STR_SORTABLE 00145 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_ORD 195 +#define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_ORD_STR_SORTABLE 00195 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_SUPPORTS_ORDS \ - 146, + 196, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2_EXISTS 1 @@ -22686,18 +30210,18 @@ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_HASH 0taHKBrwQoii9rVChKS5oAHGd2QEKtUmsV_gJwnM__M /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD 146 -#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD_STR_SORTABLE 00146 +#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD 196 +#define DT_N_S_soc_S_ethernet_40028000_S_mdio_ORD_STR_SORTABLE 00196 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_REQUIRES_ORDS \ - 143, \ - 144, \ - 145, + 193, \ + 194, \ + 195, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_SUPPORTS_ORDS \ - 147, + 197, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_EXISTS 1 @@ -22842,12 +30366,12 @@ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0_HASH 5Hzt_4TkJtuRZNyUToQKcQuH82OwS_KjUpEwdt95biY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0_ORD 147 -#define DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0_ORD_STR_SORTABLE 00147 +#define DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0_ORD 197 +#define DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0_ORD_STR_SORTABLE 00197 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0_REQUIRES_ORDS \ - 146, + 196, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0_SUPPORTS_ORDS @@ -22963,8 +30487,8 @@ #define DT_N_S_soc_S_flash_controller_52002000_HASH WEWB1xRlcWFNLQZuhd2BHFjaiQlXm55cRtjwi1OAJxE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_ORD 148 -#define DT_N_S_soc_S_flash_controller_52002000_ORD_STR_SORTABLE 00148 +#define DT_N_S_soc_S_flash_controller_52002000_ORD 198 +#define DT_N_S_soc_S_flash_controller_52002000_ORD_STR_SORTABLE 00198 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_REQUIRES_ORDS \ @@ -22974,7 +30498,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_SUPPORTS_ORDS \ - 149, + 199, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_flash_controller_52002000_EXISTS 1 @@ -23117,16 +30641,16 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_HASH 7O_AwMJXCoBtwbLq9JRsLSatE9GW8CNWiahjp_NvuTQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD 149 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD_STR_SORTABLE 00149 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD 199 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_ORD_STR_SORTABLE 00199 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_REQUIRES_ORDS \ - 148, + 198, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_SUPPORTS_ORDS \ - 150, + 200, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_EXISTS 1 @@ -23258,20 +30782,20 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_HASH tEALcfODTfXPwglDO0S7Il2sMOwmw2wMLo53EGRFaO0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD 150 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD_STR_SORTABLE 00150 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD 200 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_ORD_STR_SORTABLE 00200 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_REQUIRES_ORDS \ - 149, + 199, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_SUPPORTS_ORDS \ - 151, \ - 152, \ - 153, \ - 154, \ - 155, + 201, \ + 202, \ + 203, \ + 204, \ + 205, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_EXISTS 1 @@ -23337,12 +30861,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_HASH Y2f6PyeZYeS9qr4h9B5CBE5nAVPkM_iJ_AH1rDDnYxg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD 151 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00151 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD 201 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00201 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_REQUIRES_ORDS \ - 150, + 200, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0_SUPPORTS_ORDS @@ -23436,12 +30960,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000_HASH hjEIGBcett7WrX5yGv5mDB16_Ru_zUdPJBVB7GWhGXY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000_ORD 152 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000_ORD_STR_SORTABLE 00152 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000_ORD 202 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000_ORD_STR_SORTABLE 00202 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000_REQUIRES_ORDS \ - 150, + 200, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000_SUPPORTS_ORDS @@ -23535,12 +31059,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_HASH kIHz4FLHo0sl_1qjfiajBQkRNmpBPSr0J4dz9SqHO6Q /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD 153 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD_STR_SORTABLE 00153 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD 203 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_ORD_STR_SORTABLE 00203 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_REQUIRES_ORDS \ - 150, + 200, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000_SUPPORTS_ORDS @@ -23634,12 +31158,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000_HASH JKVtLySIr5UGb2WqNurafWRgqIEmA5YxNYvlzJaukL4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000_ORD 154 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000_ORD_STR_SORTABLE 00154 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000_ORD 204 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000_ORD_STR_SORTABLE 00204 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000_REQUIRES_ORDS \ - 150, + 200, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000_SUPPORTS_ORDS @@ -23733,12 +31257,12 @@ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_HASH _mO1ZLWmKcfCbeIRVhMEcNzftLOdCs64I5PovCQqGjI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD 155 -#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD_STR_SORTABLE 00155 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD 205 +#define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_ORD_STR_SORTABLE 00205 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_REQUIRES_ORDS \ - 150, + 200, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000_SUPPORTS_ORDS @@ -23823,17 +31347,17 @@ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_HASH RAbXYYuHu9oFLlA7Yd2Jae6_GzbUj9b5D7ABUZVkNmM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_ORD 156 -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_ORD_STR_SORTABLE 00156 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_ORD 206 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_ORD_STR_SORTABLE 00206 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_REQUIRES_ORDS \ - 25, + 27, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_SUPPORTS_ORDS \ - 157, \ - 158, + 207, \ + 208, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_EXISTS 1 @@ -23949,13 +31473,13 @@ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger_HASH bA0a_bbhA9B3e9X_lPD_nHz5KH1i_19gC_EeWfGddDQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger_ORD 157 -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger_ORD_STR_SORTABLE 00157 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger_ORD 207 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger_ORD_STR_SORTABLE 00207 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger_REQUIRES_ORDS \ - 53, \ - 156, + 71, \ + 206, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger_SUPPORTS_ORDS @@ -24087,21 +31611,21 @@ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_HASH _Td97V5Akmc3NjBLZhcqRoa_2hpXMHr8mlK8Y3eDkdY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_ORD 158 -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_ORD_STR_SORTABLE 00158 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_ORD 208 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_ORD_STR_SORTABLE 00208 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_REQUIRES_ORDS \ - 156, + 206, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_SUPPORTS_ORDS \ - 159, \ - 160, \ - 161, \ - 162, \ - 163, \ - 164, + 209, \ + 210, \ + 211, \ + 212, \ + 213, \ + 214, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_EXISTS 1 @@ -24208,12 +31732,12 @@ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1_HASH 9eTl0h021SB1t4w_MevbEoEomYWpbKni513zBcUrcFA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1_ORD 159 -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1_ORD_STR_SORTABLE 00159 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1_ORD 209 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1_ORD_STR_SORTABLE 00209 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1_REQUIRES_ORDS \ - 158, + 208, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1_SUPPORTS_ORDS @@ -24291,12 +31815,12 @@ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2_HASH ATbZ_D2Tk3slnZW7WyTObMJogJhjHUKG2cshf1joits /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2_ORD 160 -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2_ORD_STR_SORTABLE 00160 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2_ORD 210 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2_ORD_STR_SORTABLE 00210 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2_REQUIRES_ORDS \ - 158, + 208, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2_SUPPORTS_ORDS @@ -24374,12 +31898,12 @@ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3_HASH aL5KDosfvJXQ6nZvIyEgcAyxqzn5PZ7R8_7GCERubEs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3_ORD 161 -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3_ORD_STR_SORTABLE 00161 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3_ORD 211 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3_ORD_STR_SORTABLE 00211 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3_REQUIRES_ORDS \ - 158, + 208, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3_SUPPORTS_ORDS @@ -24459,12 +31983,12 @@ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1_HASH EJCBWstaj7Q_yuMMpEd4HJ25na1UoIrugW3yy_BN7I8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1_ORD 162 -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1_ORD_STR_SORTABLE 00162 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1_ORD 212 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1_ORD_STR_SORTABLE 00212 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1_REQUIRES_ORDS \ - 158, + 208, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1_SUPPORTS_ORDS @@ -24542,12 +32066,12 @@ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2_HASH R8U4L0NULDhp_OBB4L3NWJDbc4cXx5V_eTESWSsjs7w /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2_ORD 163 -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2_ORD_STR_SORTABLE 00163 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2_ORD 213 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2_ORD_STR_SORTABLE 00213 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2_REQUIRES_ORDS \ - 158, + 208, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2_SUPPORTS_ORDS @@ -24625,12 +32149,12 @@ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3_HASH qfw2BZ0GjvYjQJzP5XCMAPmJE_30z2Qd_uB5feJe0cE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3_ORD 164 -#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3_ORD_STR_SORTABLE 00164 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3_ORD 214 +#define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3_ORD_STR_SORTABLE 00214 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3_REQUIRES_ORDS \ - 158, + 208, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3_SUPPORTS_ORDS @@ -24662,6 +32186,154 @@ #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3_P_regulator_boot_on 1 #define DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3_P_regulator_boot_on_EXISTS 1 +/* + * Devicetree node: /soc/i2c@40005c00/gc2145@3c/port + * + * Node identifier: DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_PATH "/soc/i2c@40005c00/gc2145@3c/port" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FULL_NAME "port" +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FULL_NAME_UNQUOTED port +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FULL_NAME_TOKEN port +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FULL_NAME_UPPER_TOKEN PORT + +/* Node parent (/soc/i2c@40005c00/gc2145@3c) identifier: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_PARENT DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_NODELABEL_NUM 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_CHILD_NUM 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint, __VA_ARGS__) + +/* Node's hash: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_HASH aBfaDib_0TuggPtJNL5w9ypd8ePYcEzBqB8oT_UOIAM + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_ORD 215 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_ORD_STR_SORTABLE 00215 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_REQUIRES_ORDS \ + 171, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_SUPPORTS_ORDS \ + 216, + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_EXISTS 1 + +/* Bus info (controller: '/soc/i2c@40005c00', type: '['i2c']') */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_BUS_i2c 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_BUS DT_N_S_soc_S_i2c_40005c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_REG_NUM 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_RANGES_NUM 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_IRQ_NUM 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_IRQ_LEVEL 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_PINCTRL_NUM 0 + +/* (No generic property macros) */ + +/* + * Devicetree node: /soc/i2c@40005c00/gc2145@3c/port/endpoint + * + * Node identifier: DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint + */ + +/* Node's full path: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_PATH "/soc/i2c@40005c00/gc2145@3c/port/endpoint" + +/* Node's name with unit-address: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FULL_NAME "endpoint" +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FULL_NAME_UNQUOTED endpoint +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FULL_NAME_TOKEN endpoint +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FULL_NAME_UPPER_TOKEN ENDPOINT + +/* Node parent (/soc/i2c@40005c00/gc2145@3c/port) identifier: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_PARENT DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port + +/* Node's index in its parent's list of children: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_CHILD_IDX 0 + +/* Helpers for dealing with node labels: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_NODELABEL_NUM 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_NODELABEL(fn) fn(gc2145_ep_out) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_NODELABEL_VARGS(fn, ...) fn(gc2145_ep_out, __VA_ARGS__) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc) fn(DT_N) + +/* Helper macros for child nodes of this node. */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_CHILD_NUM 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) + +/* Node's hash: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_HASH KR6n71tPML4tTu4Q__Q0AD05WTPJJ8PigfEC0c0pzNc + +/* Node's dependency ordinal: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_ORD 216 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_ORD_STR_SORTABLE 00216 + +/* Ordinals for what this node depends on directly: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_REQUIRES_ORDS \ + 215, + +/* Ordinals for what depends directly on this node: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_SUPPORTS_ORDS + +/* Existence and alternate IDs: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_EXISTS 1 +#define DT_N_NODELABEL_gc2145_ep_out DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint + +/* Bus info (controller: '/soc/i2c@40005c00', type: '['i2c']') */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_BUS_i2c 1 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_BUS DT_N_S_soc_S_i2c_40005c00 + +/* Macros for properties that are special in the specification: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_REG_NUM 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_RANGES_NUM 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_IRQ_NUM 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_IRQ_LEVEL 0 +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_STATUS_okay 1 + +/* Pin control (pinctrl-, pinctrl-names) properties: */ +#define DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint_PINCTRL_NUM 0 + +/* (No generic property macros) */ + /* * Devicetree node: /soc/pin-controller@58020000/fmc_a0_pf0 * @@ -24684,7 +32356,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_CHILD_IDX 40 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_CHILD_IDX 59 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_NODELABEL_NUM 1 @@ -24708,16 +32380,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_HASH CD2PiqCI4xQKP6d8LTJWcbVvcJ1zDf95YtUri7TYVnQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD 165 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD_STR_SORTABLE 00165 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD 217 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_ORD_STR_SORTABLE 00217 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0_EXISTS 1 @@ -24788,7 +32460,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_CHILD_IDX 51 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_CHILD_IDX 70 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_NODELABEL_NUM 1 @@ -24812,16 +32484,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_HASH qHlFsEpNUM3_uMqezR1bcLTU8cKe_mQpEDMEJ47KjKc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD 166 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD_STR_SORTABLE 00166 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD 218 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_ORD_STR_SORTABLE 00218 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0_EXISTS 1 @@ -24892,7 +32564,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_CHILD_IDX 52 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_CHILD_IDX 71 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_NODELABEL_NUM 1 @@ -24916,16 +32588,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_HASH b5VoCm0WFy4DuNsQM8cx0k1rNhMfIiprZ7BLL59OBFY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD 167 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD_STR_SORTABLE 00167 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD 219 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_ORD_STR_SORTABLE 00219 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1_EXISTS 1 @@ -24996,7 +32668,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_CHILD_IDX 53 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_CHILD_IDX 72 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_NODELABEL_NUM 1 @@ -25020,16 +32692,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_HASH TY5zmTBMpXZuRdNuJzfXNcgBQwqjks4bTbmmLj_5M_U /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD 168 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD_STR_SORTABLE 00168 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD 220 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_ORD_STR_SORTABLE 00220 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2_EXISTS 1 @@ -25100,7 +32772,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_CHILD_IDX 54 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_CHILD_IDX 73 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_NODELABEL_NUM 1 @@ -25124,16 +32796,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_HASH KkHnvHz1j_7XVF0Jmc5anRbXulMDmAaRUGvg2rrTtko /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD 169 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD_STR_SORTABLE 00169 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD 221 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_ORD_STR_SORTABLE 00221 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4_EXISTS 1 @@ -25204,7 +32876,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_CHILD_IDX 55 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_CHILD_IDX 74 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_NODELABEL_NUM 1 @@ -25228,16 +32900,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_HASH kpaWI4oWNw8kaxhpMa_Fjg8EJvHZbFBgz8TJg0TMUhQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD 170 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD_STR_SORTABLE 00170 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD 222 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_ORD_STR_SORTABLE 00222 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5_EXISTS 1 @@ -25308,7 +32980,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_CHILD_IDX 41 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_CHILD_IDX 60 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_NODELABEL_NUM 1 @@ -25332,16 +33004,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_HASH 1CXrMCa0BShPaH_EJPxrS_iy5md1Uy0BsrDx4bZREaw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD 171 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD_STR_SORTABLE 00171 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD 223 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_ORD_STR_SORTABLE 00223 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1_EXISTS 1 @@ -25412,7 +33084,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_CHILD_IDX 42 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_CHILD_IDX 61 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_NODELABEL_NUM 1 @@ -25436,16 +33108,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_HASH Dvl5JyUZbNaoDSw1PSu0JxO40aOIN_peR4dnht1iH30 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD 172 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD_STR_SORTABLE 00172 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD 224 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_ORD_STR_SORTABLE 00224 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2_EXISTS 1 @@ -25516,7 +33188,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_CHILD_IDX 43 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_CHILD_IDX 62 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_NODELABEL_NUM 1 @@ -25540,16 +33212,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_HASH KEkQhsJUJX9lK4WEdGRf6KRKn_CCrjWZx9ML4Q1fLxg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD 173 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD_STR_SORTABLE 00173 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD 225 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_ORD_STR_SORTABLE 00225 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3_EXISTS 1 @@ -25620,7 +33292,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_CHILD_IDX 44 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_CHILD_IDX 63 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_NODELABEL_NUM 1 @@ -25644,16 +33316,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_HASH p4YpourvJtWzC2aQUA3G8yfnTfFPXLKpFO1m2A8kots /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD 174 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD_STR_SORTABLE 00174 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD 226 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_ORD_STR_SORTABLE 00226 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4_EXISTS 1 @@ -25724,7 +33396,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_CHILD_IDX 45 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_CHILD_IDX 64 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_NODELABEL_NUM 1 @@ -25748,16 +33420,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_HASH yU_q1JtSVkSx0no8oasyOmmrTcMdTS8XYKoe4JEBaFU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD 175 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD_STR_SORTABLE 00175 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD 227 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_ORD_STR_SORTABLE 00227 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5_EXISTS 1 @@ -25828,7 +33500,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_CHILD_IDX 47 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_CHILD_IDX 66 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_NODELABEL_NUM 1 @@ -25852,16 +33524,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_HASH X3INshSaHWeFTE7LhWYDzEck8IBAP8eSc_9BZwzOjjk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD 176 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD_STR_SORTABLE 00176 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD 228 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_ORD_STR_SORTABLE 00228 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12_EXISTS 1 @@ -25932,7 +33604,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_CHILD_IDX 48 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_CHILD_IDX 67 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_NODELABEL_NUM 1 @@ -25956,16 +33628,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_HASH j4PJ1eSTaRR1JshJtrjBHS2zq17OIFczGsl8EXJJoFk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD 177 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD_STR_SORTABLE 00177 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD 229 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_ORD_STR_SORTABLE 00229 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13_EXISTS 1 @@ -26036,7 +33708,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_CHILD_IDX 49 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_CHILD_IDX 68 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_NODELABEL_NUM 1 @@ -26060,16 +33732,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_HASH YRtumExFJXs3MJiOXC63hpresAaVu9tlpi60je0di5U /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD 178 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD_STR_SORTABLE 00178 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD 230 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_ORD_STR_SORTABLE 00230 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14_EXISTS 1 @@ -26140,7 +33812,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_CHILD_IDX 50 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_CHILD_IDX 69 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_NODELABEL_NUM 1 @@ -26164,16 +33836,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_HASH bpTo8vASfFd7mFUlET6icwa_n_lmGOF_0AjbmnXLoSc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD 179 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD_STR_SORTABLE 00179 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD 231 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_ORD_STR_SORTABLE 00231 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15_EXISTS 1 @@ -26244,7 +33916,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_CHILD_IDX 27 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_CHILD_IDX 46 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_NODELABEL_NUM 1 @@ -26268,16 +33940,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_HASH NWh_6x0Yz7f4_FQTpQs5NEuy3nBx0z4fgwzF0WW0s8A /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD 180 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD_STR_SORTABLE 00180 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD 232 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_ORD_STR_SORTABLE 00232 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14_EXISTS 1 @@ -26348,7 +34020,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_CHILD_IDX 37 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_CHILD_IDX 56 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_NODELABEL_NUM 1 @@ -26372,16 +34044,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_HASH k9QbWqGmDSRXFWb0hLGNJ_QJ24Gs46MQ4kpL0jOIwqo /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD 181 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD_STR_SORTABLE 00181 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD 233 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_ORD_STR_SORTABLE 00233 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13_EXISTS 1 @@ -26452,7 +34124,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_CHILD_IDX 38 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_CHILD_IDX 57 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_NODELABEL_NUM 1 @@ -26476,16 +34148,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_HASH 337XDagGjF4W3SvBkGVasRIi4B2lKCPniDcJf25RNTY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD 182 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD_STR_SORTABLE 00182 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD 234 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_ORD_STR_SORTABLE 00234 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14_EXISTS 1 @@ -26556,7 +34228,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_CHILD_IDX 39 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_CHILD_IDX 58 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_NODELABEL_NUM 1 @@ -26580,16 +34252,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_HASH B_IhpsMexGPI8TLmNDd5MDHLUV253vF_IV7JYK4iotk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD 183 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD_STR_SORTABLE 00183 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD 235 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_ORD_STR_SORTABLE 00235 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15_EXISTS 1 @@ -26660,7 +34332,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_CHILD_IDX 24 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_CHILD_IDX 43 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_NODELABEL_NUM 1 @@ -26684,16 +34356,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_HASH kjABblsoJxumE2sAAelA5ZDR40trAONE3R1lkgfgZhk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD 184 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD_STR_SORTABLE 00184 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD 236 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_ORD_STR_SORTABLE 00236 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8_EXISTS 1 @@ -26764,7 +34436,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_CHILD_IDX 25 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_CHILD_IDX 44 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_NODELABEL_NUM 1 @@ -26788,16 +34460,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_HASH aqYLt1oALCAomS3B7Wqhm89DmZW_MC412gWsKMIlhxM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD 185 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD_STR_SORTABLE 00185 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD 237 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_ORD_STR_SORTABLE 00237 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9_EXISTS 1 @@ -26868,7 +34540,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_CHILD_IDX 26 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_CHILD_IDX 45 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_NODELABEL_NUM 1 @@ -26892,16 +34564,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_HASH EAiHNAYPc7TklqV1p8KLC6CZ7gTAuTcBRi4sB4sOe34 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD 186 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD_STR_SORTABLE 00186 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD 238 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_ORD_STR_SORTABLE 00238 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10_EXISTS 1 @@ -26972,7 +34644,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_CHILD_IDX 28 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_CHILD_IDX 47 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_NODELABEL_NUM 1 @@ -26996,16 +34668,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_HASH OIvqfzpgTzBmcBYmYtUHP4MP8IzEkSeKfhYh5gMSAeE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD 187 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD_STR_SORTABLE 00187 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD 239 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_ORD_STR_SORTABLE 00239 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15_EXISTS 1 @@ -27076,7 +34748,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_CHILD_IDX 22 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_CHILD_IDX 41 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_NODELABEL_NUM 1 @@ -27100,16 +34772,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_HASH 5gCcfR2X3hW4svgYGXhufQKZOEpXmN2cc2q0GCjDDUc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD 188 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD_STR_SORTABLE 00188 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD 240 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_ORD_STR_SORTABLE 00240 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0_EXISTS 1 @@ -27180,7 +34852,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_CHILD_IDX 23 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_CHILD_IDX 42 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_NODELABEL_NUM 1 @@ -27204,16 +34876,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_HASH _RB0qmIg1B8ARuvdOJeyPOVgg_NEn4DIjuse2TOun88 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD 189 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD_STR_SORTABLE 00189 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD 241 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_ORD_STR_SORTABLE 00241 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1_EXISTS 1 @@ -27284,7 +34956,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_CHILD_IDX 31 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_CHILD_IDX 50 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_NODELABEL_NUM 1 @@ -27308,16 +34980,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_HASH cEX32R7t1JllJDwPUOtVAddAKIWQbK_xZnNxU_Jzir0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD 190 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD_STR_SORTABLE 00190 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD 242 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_ORD_STR_SORTABLE 00242 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7_EXISTS 1 @@ -27388,7 +35060,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_CHILD_IDX 32 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_CHILD_IDX 51 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_NODELABEL_NUM 1 @@ -27412,16 +35084,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_HASH nvcQenFB791_Xivcn_tn2cXmvvyARNWaMoBjTT1ysRk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD 191 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD_STR_SORTABLE 00191 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD 243 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_ORD_STR_SORTABLE 00243 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8_EXISTS 1 @@ -27492,7 +35164,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_CHILD_IDX 33 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_CHILD_IDX 52 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_NODELABEL_NUM 1 @@ -27516,16 +35188,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_HASH h0fLmkTCfGhElZre1Xkqi9fRt_eTcrvQMsptRdtm9mM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD 192 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD_STR_SORTABLE 00192 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD 244 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_ORD_STR_SORTABLE 00244 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9_EXISTS 1 @@ -27596,7 +35268,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_CHILD_IDX 34 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_CHILD_IDX 53 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_NODELABEL_NUM 1 @@ -27620,16 +35292,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_HASH ICH7Ab3athAfb0Mm8urM2lnmVsqLbVx82O1p1vtQpNs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD 193 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD_STR_SORTABLE 00193 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD 245 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_ORD_STR_SORTABLE 00245 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10_EXISTS 1 @@ -27700,7 +35372,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_CHILD_IDX 35 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_CHILD_IDX 54 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_NODELABEL_NUM 1 @@ -27724,16 +35396,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_HASH 0qVIVjRsISEyySqLZ6v88SFKs1kAO9CLB0KjV1l67OA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD 194 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD_STR_SORTABLE 00194 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD 246 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_ORD_STR_SORTABLE 00246 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11_EXISTS 1 @@ -27804,7 +35476,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_CHILD_IDX 36 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_CHILD_IDX 55 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_NODELABEL_NUM 1 @@ -27828,16 +35500,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_HASH YeXd0VyYXkb3dJZxFkaITdJnd5RdbfwwCt_6ovb7qu0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD 195 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD_STR_SORTABLE 00195 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD 247 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_ORD_STR_SORTABLE 00247 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12_EXISTS 1 @@ -27908,7 +35580,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_CHILD_IDX 29 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_CHILD_IDX 48 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_NODELABEL_NUM 1 @@ -27932,16 +35604,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_HASH yK8Dng2zj9zfT0oDfWufdTZdMXrcYLeFzEOuVdCZ6WI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD 196 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD_STR_SORTABLE 00196 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD 248 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_ORD_STR_SORTABLE 00248 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0_EXISTS 1 @@ -28012,7 +35684,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_CHILD_IDX 30 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_CHILD_IDX 49 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_NODELABEL_NUM 1 @@ -28036,16 +35708,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_HASH 7Hk_zRaqU06qQXDbo2pWjlEZ7mBqTZXosG0inU2wkCM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD 197 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD_STR_SORTABLE 00197 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD 249 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_ORD_STR_SORTABLE 00249 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1_EXISTS 1 @@ -28116,7 +35788,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_CHILD_IDX 58 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_CHILD_IDX 77 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_NODELABEL_NUM 1 @@ -28140,16 +35812,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_HASH L9YUekRkZzLwoJcXQVg828CTTdOwhGIYEK7quZfK8Ww /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD 198 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD_STR_SORTABLE 00198 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD 250 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_ORD_STR_SORTABLE 00250 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2_EXISTS 1 @@ -28220,7 +35892,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_CHILD_IDX 56 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_CHILD_IDX 75 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_NODELABEL_NUM 1 @@ -28244,16 +35916,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_HASH XEqEV_PKSSraFHqmMscKtvZU7Gw7pdTnE6cTnpW44FM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD 199 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD_STR_SORTABLE 00199 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD 251 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_ORD_STR_SORTABLE 00251 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_SUPPORTS_ORDS \ - 204, + 256, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8_EXISTS 1 @@ -28305,1738 +35977,1234 @@ /* * Devicetree node: /soc/pin-controller@58020000/fmc_sdncas_pg15 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15 - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_PATH "/soc/pin-controller@58020000/fmc_sdncas_pg15" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FULL_NAME "fmc_sdncas_pg15" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FULL_NAME_UNQUOTED fmc_sdncas_pg15 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FULL_NAME_TOKEN fmc_sdncas_pg15 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FULL_NAME_UPPER_TOKEN FMC_SDNCAS_PG15 - -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_PARENT DT_N_S_soc_S_pin_controller_58020000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_CHILD_IDX 57 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_NODELABEL(fn) fn(fmc_sdncas_pg15) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_NODELABEL_VARGS(fn, ...) fn(fmc_sdncas_pg15, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_HASH jr0sNPOQ2x0IrXK3dgBszs_Qz02OTDH4X2HCPojy4jg - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD 200 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD_STR_SORTABLE 00200 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_REQUIRES_ORDS \ - 11, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_SUPPORTS_ORDS \ - 204, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_EXISTS 1 -#define DT_N_NODELABEL_fmc_sdncas_pg15 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_pinmux 3564 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate "very-high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_STRING_UNQUOTED very-high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_STRING_TOKEN very_high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_IDX_0 "very-high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_output_high_EXISTS 1 - -/* - * Devicetree node: /soc/pin-controller@58020000/fmc_sdne0_ph3 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3 - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_PATH "/soc/pin-controller@58020000/fmc_sdne0_ph3" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FULL_NAME "fmc_sdne0_ph3" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FULL_NAME_UNQUOTED fmc_sdne0_ph3 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FULL_NAME_TOKEN fmc_sdne0_ph3 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FULL_NAME_UPPER_TOKEN FMC_SDNE0_PH3 - -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_PARENT DT_N_S_soc_S_pin_controller_58020000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_CHILD_IDX 59 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_NODELABEL(fn) fn(fmc_sdne0_ph3) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_NODELABEL_VARGS(fn, ...) fn(fmc_sdne0_ph3, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_HASH 3NXxFc9ZOOAUbjbScLjSRSKnxm_PgL_YmieqG2QiQIA - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD 201 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD_STR_SORTABLE 00201 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_REQUIRES_ORDS \ - 11, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_SUPPORTS_ORDS \ - 204, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_EXISTS 1 -#define DT_N_NODELABEL_fmc_sdne0_ph3 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_pinmux 3692 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate "very-high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_STRING_UNQUOTED very-high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_STRING_TOKEN very_high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_IDX_0 "very-high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_output_high_EXISTS 1 - -/* - * Devicetree node: /soc/pin-controller@58020000/fmc_sdnras_pf11 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11 - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_PATH "/soc/pin-controller@58020000/fmc_sdnras_pf11" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FULL_NAME "fmc_sdnras_pf11" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FULL_NAME_UNQUOTED fmc_sdnras_pf11 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FULL_NAME_TOKEN fmc_sdnras_pf11 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FULL_NAME_UPPER_TOKEN FMC_SDNRAS_PF11 - -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_PARENT DT_N_S_soc_S_pin_controller_58020000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_CHILD_IDX 46 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_NODELABEL(fn) fn(fmc_sdnras_pf11) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_NODELABEL_VARGS(fn, ...) fn(fmc_sdnras_pf11, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_HASH Z9yckusJptLDpxWB5qOsIA_LWbS5emGyWnmQ09EpR_0 - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD 202 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD_STR_SORTABLE 00202 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_REQUIRES_ORDS \ - 11, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_SUPPORTS_ORDS \ - 204, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_EXISTS 1 -#define DT_N_NODELABEL_fmc_sdnras_pf11 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_pinmux 2924 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate "very-high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_STRING_UNQUOTED very-high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_STRING_TOKEN very_high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_IDX_0 "very-high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_output_high_EXISTS 1 - -/* - * Devicetree node: /soc/pin-controller@58020000/fmc_sdnwe_ph5 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5 - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_PATH "/soc/pin-controller@58020000/fmc_sdnwe_ph5" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FULL_NAME "fmc_sdnwe_ph5" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FULL_NAME_UNQUOTED fmc_sdnwe_ph5 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FULL_NAME_TOKEN fmc_sdnwe_ph5 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FULL_NAME_UPPER_TOKEN FMC_SDNWE_PH5 - -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_PARENT DT_N_S_soc_S_pin_controller_58020000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_CHILD_IDX 60 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_NODELABEL(fn) fn(fmc_sdnwe_ph5) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_NODELABEL_VARGS(fn, ...) fn(fmc_sdnwe_ph5, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_HASH OK9tq3HzGKMISXDTeSErVpo6Fz4LPv7AJAOPF4L4Wb8 - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD 203 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD_STR_SORTABLE 00203 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_REQUIRES_ORDS \ - 11, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_SUPPORTS_ORDS \ - 204, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_EXISTS 1 -#define DT_N_NODELABEL_fmc_sdnwe_ph5 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_REG_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_STATUS_okay 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_pinmux 3756 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_pinmux_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate "very-high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_STRING_UNQUOTED very-high-speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_STRING_TOKEN very_high_speed -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_IDX_0 "very-high-speed" -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_IDX_0_ENUM_IDX 3 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, slew_rate, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, slew_rate, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_disable 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_disable_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_pull_up 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_pull_up_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_pull_down 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_pull_down_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_drive_push_pull 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_drive_push_pull_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_drive_open_drain 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_drive_open_drain_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_output_low 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_output_low_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_output_high 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_output_high_EXISTS 1 - -/* - * Devicetree node: /soc/memory-controller@52004000 - * - * Node identifier: DT_N_S_soc_S_memory_controller_52004000 - * - * Binding (compatible = st,stm32h7-fmc): - * $ZEPHYR_BASE/dts/bindings/memory-controllers/st,stm32h7-fmc.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_memory_controller_52004000_PATH "/soc/memory-controller@52004000" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_PATH "/soc/pin-controller@58020000/fmc_sdncas_pg15" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_memory_controller_52004000_FULL_NAME "memory-controller@52004000" -#define DT_N_S_soc_S_memory_controller_52004000_FULL_NAME_UNQUOTED memory-controller@52004000 -#define DT_N_S_soc_S_memory_controller_52004000_FULL_NAME_TOKEN memory_controller_52004000 -#define DT_N_S_soc_S_memory_controller_52004000_FULL_NAME_UPPER_TOKEN MEMORY_CONTROLLER_52004000 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FULL_NAME "fmc_sdncas_pg15" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FULL_NAME_UNQUOTED fmc_sdncas_pg15 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FULL_NAME_TOKEN fmc_sdncas_pg15 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FULL_NAME_UPPER_TOKEN FMC_SDNCAS_PG15 -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_memory_controller_52004000_PARENT DT_N_S_soc +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_memory_controller_52004000_CHILD_IDX 62 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_CHILD_IDX 76 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_memory_controller_52004000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_NODELABEL(fn) fn(fmc) -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_NODELABEL_VARGS(fn, ...) fn(fmc, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_NODELABEL(fn) fn(fmc_sdncas_pg15) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_NODELABEL_VARGS(fn, ...) fn(fmc_sdncas_pg15, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_memory_controller_52004000_CHILD_NUM 1 -#define DT_N_S_soc_S_memory_controller_52004000_CHILD_NUM_STATUS_OKAY 1 -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_memory_controller_52004000_HASH kTmd62xLm1DVKtzu_bIobBAuYamR4w9y9dO1w2c1w_c +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_HASH jr0sNPOQ2x0IrXK3dgBszs_Qz02OTDH4X2HCPojy4jg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_controller_52004000_ORD 204 -#define DT_N_S_soc_S_memory_controller_52004000_ORD_STR_SORTABLE 00204 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD 252 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_ORD_STR_SORTABLE 00252 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_memory_controller_52004000_REQUIRES_ORDS \ - 3, \ - 8, \ - 165, \ - 166, \ - 167, \ - 168, \ - 169, \ - 170, \ - 171, \ - 172, \ - 173, \ - 174, \ - 175, \ - 176, \ - 177, \ - 178, \ - 179, \ - 180, \ - 181, \ - 182, \ - 183, \ - 184, \ - 185, \ - 186, \ - 187, \ - 188, \ - 189, \ - 190, \ - 191, \ - 192, \ - 193, \ - 194, \ - 195, \ - 196, \ - 197, \ - 198, \ - 199, \ - 200, \ - 201, \ - 202, \ - 203, +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_memory_controller_52004000_SUPPORTS_ORDS \ - 205, +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_SUPPORTS_ORDS \ + 256, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_memory_controller_52004000_EXISTS 1 -#define DT_N_INST_0_st_stm32h7_fmc DT_N_S_soc_S_memory_controller_52004000 -#define DT_N_NODELABEL_fmc DT_N_S_soc_S_memory_controller_52004000 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_EXISTS 1 +#define DT_N_NODELABEL_fmc_sdncas_pg15 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_memory_controller_52004000_REG_NUM 1 -#define DT_N_S_soc_S_memory_controller_52004000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_REG_IDX_0_VAL_ADDRESS 1375748096 -#define DT_N_S_soc_S_memory_controller_52004000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_memory_controller_52004000_RANGES_NUM 0 -#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_memory_controller_52004000_IRQ_NUM 0 -#define DT_N_S_soc_S_memory_controller_52004000_IRQ_LEVEL 0 -#define DT_N_S_soc_S_memory_controller_52004000_COMPAT_MATCHES_st_stm32h7_fmc 1 -#define DT_N_S_soc_S_memory_controller_52004000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_memory_controller_52004000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_COMPAT_MODEL_IDX_0 "stm32h7-fmc" -#define DT_N_S_soc_S_memory_controller_52004000_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NUM 1 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_IDX_0_TOKEN default -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX 0 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_11_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_12_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_13_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_14_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_15_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_16_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_17_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_18_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_19_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_20_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_21_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_22_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_23_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_24_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_25_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_26_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_27_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_28_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_29_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_30_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_31_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_32_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_33_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_34_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_35_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_36_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_37_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3 -#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_38_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap "disable" -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_STRING_UNQUOTED disable -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_STRING_TOKEN disable -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_STRING_UPPER_TOKEN DISABLE -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_IDX_0 "disable" -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_IDX_0_ENUM_IDX 0 -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_IDX_0_ENUM_VAL_disable_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, st_mem_swap, 0) -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, st_mem_swap, 0) -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, st_mem_swap, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, st_mem_swap, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_LEN 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_reg {1375748096, 1024} -#define DT_N_S_soc_S_memory_controller_52004000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_reg_IDX_0 1375748096 -#define DT_N_S_soc_S_memory_controller_52004000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_memory_controller_52004000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_VAL_bus 212 -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_VAL_bits 4096 -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, clocks, 0) -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, clocks, 0) -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_LEN 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_3 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_4 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_5 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_6 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_7 DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_8 DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_8_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_9 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_9_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_10 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_10_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_11 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_11_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_11_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_12 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_12_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_12_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_13 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_13_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_13_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_14 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_14_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_14_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_15 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_15_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_15_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_16 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_16_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_16_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_17 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_17_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_17_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_18 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_18_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_18_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_19 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_19_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_19_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_20 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_20_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_20_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_21 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_21_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_21_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_22 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_22_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_22_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_23 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_23_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_23_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_24 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_24_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_24_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_25 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_25_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_25_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_26 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_26_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_26_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_27 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_27_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_27_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_28 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_28_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_28_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_29 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_29_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_29_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_30 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_30_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_30_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_31 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_31_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_31_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_32 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_32_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_32_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_33 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_33_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_33_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_34 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_34_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_34_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_35 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_35_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_35_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_36 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_36_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_36_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_37 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_37_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_37_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_38 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_38_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_38_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 0) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 1) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 2) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 3) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 4) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 5) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 6) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 7) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 8) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 9) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 10) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 11) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 12) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 13) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 14) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 15) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 16) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 17) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 18) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 19) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 20) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 21) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 22) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 23) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 24) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 25) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 26) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 27) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 28) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 29) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 30) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 31) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 32) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 33) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 34) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 35) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 36) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 37) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 38) -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 6) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 7) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 8) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 9) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 10) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 11) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 12) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 13) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 14) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 15) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 16) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 17) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 18) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 19) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 20) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 21) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 22) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 23) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 24) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 25) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 26) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 27) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 28) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 29) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 30) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 31) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 32) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 33) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 34) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 35) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 36) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 37) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 38) -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 6, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 7, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 8, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 9, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 10, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 11, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 12, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 13, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 14, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 15, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 16, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 17, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 18, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 19, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 20, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 21, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 22, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 23, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 24, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 25, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 26, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 27, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 28, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 29, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 30, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 31, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 32, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 33, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 34, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 35, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 36, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 37, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 38, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 16, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 17, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 18, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 19, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 20, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 21, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 22, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 23, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 24, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 25, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 26, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 27, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 28, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 29, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 30, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 31, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 32, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 33, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 34, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 35, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 36, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 37, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 38, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_LEN 39 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names {"default"} -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_IDX_0 "default" -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_IDX_0_STRING_TOKEN default -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_names, 0) -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_names, 0) -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_LEN 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_status "okay" -#define DT_N_S_soc_S_memory_controller_52004000_P_status_STRING_UNQUOTED okay -#define DT_N_S_soc_S_memory_controller_52004000_P_status_STRING_TOKEN okay -#define DT_N_S_soc_S_memory_controller_52004000_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_memory_controller_52004000_P_status_IDX_0 "okay" -#define DT_N_S_soc_S_memory_controller_52004000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, status, 0) -#define DT_N_S_soc_S_memory_controller_52004000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, status, 0) -#define DT_N_S_soc_S_memory_controller_52004000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_status_LEN 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_status_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible {"st,stm32h7-fmc"} -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_IDX_0 "st,stm32h7-fmc" -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-fmc -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_fmc -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_FMC -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, compatible, 0) -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, compatible, 0) -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_LEN 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_memory_controller_52004000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_wakeup_source 0 -#define DT_N_S_soc_S_memory_controller_52004000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_memory_controller_52004000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_pinmux 3564 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/memory-controller@52004000/sdram - * - * Node identifier: DT_N_S_soc_S_memory_controller_52004000_S_sdram + * Devicetree node: /soc/pin-controller@58020000/fmc_sdne0_ph3 * - * Binding (compatible = st,stm32-fmc-sdram): - * $ZEPHYR_BASE/dts/bindings/memory-controllers/st,stm32-fmc-sdram.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_PATH "/soc/memory-controller@52004000/sdram" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_PATH "/soc/pin-controller@58020000/fmc_sdne0_ph3" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FULL_NAME "sdram" -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FULL_NAME_UNQUOTED sdram -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FULL_NAME_TOKEN sdram -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FULL_NAME_UPPER_TOKEN SDRAM +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FULL_NAME "fmc_sdne0_ph3" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FULL_NAME_UNQUOTED fmc_sdne0_ph3 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FULL_NAME_TOKEN fmc_sdne0_ph3 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FULL_NAME_UPPER_TOKEN FMC_SDNE0_PH3 -/* Node parent (/soc/memory-controller@52004000) identifier: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_PARENT DT_N_S_soc_S_memory_controller_52004000 +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_CHILD_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_CHILD_IDX 78 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_NODELABEL_NUM 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_NODELABEL(fn) fn(sdram) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_NODELABEL_VARGS(fn, ...) fn(sdram, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_NODELABEL(fn) fn(fmc_sdne0_ph3) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_NODELABEL_VARGS(fn, ...) fn(fmc_sdne0_ph3, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_CHILD_NUM 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_CHILD_NUM_STATUS_OKAY 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_HASH TpfMR84hwpUHVdwEVm_B43KwOiOIegn_XuS5Nw5WT8Y +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_HASH 3NXxFc9ZOOAUbjbScLjSRSKnxm_PgL_YmieqG2QiQIA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD 205 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD_STR_SORTABLE 00205 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD 253 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_ORD_STR_SORTABLE 00253 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_REQUIRES_ORDS \ - 204, +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_SUPPORTS_ORDS \ - 206, +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_SUPPORTS_ORDS \ + 256, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_EXISTS 1 -#define DT_N_INST_0_st_stm32_fmc_sdram DT_N_S_soc_S_memory_controller_52004000_S_sdram -#define DT_N_NODELABEL_sdram DT_N_S_soc_S_memory_controller_52004000_S_sdram +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_EXISTS 1 +#define DT_N_NODELABEL_fmc_sdne0_ph3 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_REG_NUM 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_RANGES_NUM 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_IRQ_NUM 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_IRQ_LEVEL 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_COMPAT_MATCHES_st_stm32_fmc_sdram 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_COMPAT_MODEL_IDX_0 "stm32-fmc-sdram" -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_power_up_delay 100 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_power_up_delay_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_num_auto_refresh 8 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_num_auto_refresh_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_mode_register 544 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_mode_register_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_refresh_rate 683 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_refresh_rate_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status "okay" -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_STRING_UNQUOTED okay -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_STRING_TOKEN okay -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_STRING_UPPER_TOKEN OKAY -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_IDX_0 "okay" -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_IDX_0_ENUM_IDX 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, status, 0) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, status, 0) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_LEN 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible {"st,stm32-fmc-sdram"} -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_IDX_0 "st,stm32-fmc-sdram" -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-fmc-sdram -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_IDX_0_STRING_TOKEN st_stm32_fmc_sdram -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_FMC_SDRAM -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, compatible, 0) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, compatible, 0) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_LEN 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_wakeup_source 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_pinmux 3692 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/memory-controller@52004000/sdram/bank@0 + * Devicetree node: /soc/pin-controller@58020000/fmc_sdnras_pf11 * - * Node identifier: DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0 + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_PATH "/soc/memory-controller@52004000/sdram/bank@0" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_PATH "/soc/pin-controller@58020000/fmc_sdnras_pf11" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FULL_NAME "bank@0" -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FULL_NAME_UNQUOTED bank@0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FULL_NAME_TOKEN bank_0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FULL_NAME_UPPER_TOKEN BANK_0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FULL_NAME "fmc_sdnras_pf11" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FULL_NAME_UNQUOTED fmc_sdnras_pf11 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FULL_NAME_TOKEN fmc_sdnras_pf11 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FULL_NAME_UPPER_TOKEN FMC_SDNRAS_PF11 -/* Node parent (/soc/memory-controller@52004000/sdram) identifier: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_PARENT DT_N_S_soc_S_memory_controller_52004000_S_sdram +/* Node parent (/soc/pin-controller@58020000) identifier: */ +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_CHILD_IDX 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_CHILD_IDX 65 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_NODELABEL_NUM 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_NODELABEL(fn) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_NODELABEL(fn) fn(fmc_sdnras_pf11) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_NODELABEL_VARGS(fn, ...) fn(fmc_sdnras_pf11, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_CHILD_NUM 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_HASH QY51JdEkckBOXX58v1GkjBGJCv24_LOtVO55YJ1NOkM +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_HASH Z9yckusJptLDpxWB5qOsIA_LWbS5emGyWnmQ09EpR_0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD 206 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD_STR_SORTABLE 00206 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD 254 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_ORD_STR_SORTABLE 00254 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_REQUIRES_ORDS \ - 205, +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_SUPPORTS_ORDS \ + 256, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_EXISTS 1 +#define DT_N_NODELABEL_fmc_sdnras_pf11 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_REG_NUM 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_REG_IDX_0_VAL_ADDRESS 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_RANGES_NUM 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_IRQ_NUM 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_IRQ_LEVEL 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_reg 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_reg_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control {0, 4, 16, 64, 256, 2048, 4096, 0} -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_0 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_1 4 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_2 16 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_3 64 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_4 256 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_5 2048 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_6 4096 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_7 0 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 0) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 1) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 2) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 3) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 4) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 5) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 6) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 7) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 6) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 7) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 6, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 7, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 7, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_LEN 8 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing {2, 7, 5, 7, 2, 3, 3} -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_0 2 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_1 7 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_2 5 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_3 7 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_4 2 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_5 3 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_6 3 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 0) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 1) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 2) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 3) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 4) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 5) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 6) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 3) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 4) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 5) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 6) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 3, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 4, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 5, __VA_ARGS__) \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 6, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 6, __VA_ARGS__) -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_LEN 7 -#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_pinmux 2924 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/gpio@58020400 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 + * Devicetree node: /soc/pin-controller@58020000/fmc_sdnwe_ph5 * - * Binding (compatible = st,stm32-gpio): - * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_PATH "/soc/pin-controller@58020000/gpio@58020400" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_PATH "/soc/pin-controller@58020000/fmc_sdnwe_ph5" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FULL_NAME "gpio@58020400" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FULL_NAME_UNQUOTED gpio@58020400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FULL_NAME_TOKEN gpio_58020400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FULL_NAME_UPPER_TOKEN GPIO_58020400 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FULL_NAME "fmc_sdnwe_ph5" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FULL_NAME_UNQUOTED fmc_sdnwe_ph5 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FULL_NAME_TOKEN fmc_sdnwe_ph5 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FULL_NAME_UPPER_TOKEN FMC_SDNWE_PH5 /* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_PARENT DT_N_S_soc_S_pin_controller_58020000 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_CHILD_IDX 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_CHILD_IDX 79 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_NODELABEL(fn) fn(gpiob) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiob, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_NODELABEL_NUM 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_NODELABEL(fn) fn(fmc_sdnwe_ph5) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_NODELABEL_VARGS(fn, ...) fn(fmc_sdnwe_ph5, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_CHILD_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_HASH gYdP39QIPaBB6nc4XDkGh_lITUPL5FSXbdH2SzSFKKk +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_HASH OK9tq3HzGKMISXDTeSErVpo6Fz4LPv7AJAOPF4L4Wb8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_ORD 207 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_ORD_STR_SORTABLE 00207 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD 255 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_ORD_STR_SORTABLE 00255 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REQUIRES_ORDS \ - 8, \ - 11, +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_REQUIRES_ORDS \ + 9, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_SUPPORTS_ORDS +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_SUPPORTS_ORDS \ + 256, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_EXISTS 1 -#define DT_N_INST_1_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 -#define DT_N_NODELABEL_gpiob DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_EXISTS 1 +#define DT_N_NODELABEL_fmc_sdnwe_ph5 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REG_IDX_0_VAL_ADDRESS 1476527104 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_COMPAT_MATCHES_st_stm32_gpio 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_COMPAT_MODEL_IDX_0 "stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_STATUS_okay 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_REG_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_RANGES_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_IRQ_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_IRQ_LEVEL 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg {1476527104, 1024} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg_IDX_0 1476527104 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_VAL_bits 2 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_ngpios 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_ngpios_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_gpio_controller 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_gpio_controller_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible {"st,stm32-gpio"} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_IDX_0 "st,stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_pinmux 3756 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_pinmux_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_STRING_UNQUOTED very-high-speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_STRING_TOKEN very_high_speed +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_STRING_UPPER_TOKEN VERY_HIGH_SPEED +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_IDX_0 "very-high-speed" +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_IDX_0_ENUM_IDX 3 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_IDX_0_ENUM_VAL_very_high_speed_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, slew_rate, 0) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, slew_rate, 0, __VA_ARGS__) +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_LEN 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_slew_rate_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_disable 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_disable_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_pull_up 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_pull_up_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_pull_down 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_bias_pull_down_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_drive_push_pull 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_drive_push_pull_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_drive_open_drain 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_drive_open_drain_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_output_low 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_output_low_EXISTS 1 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_output_high 0 +#define DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5_P_output_high_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/gpio@58020C00 + * Devicetree node: /soc/memory-controller@52004000 * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 + * Node identifier: DT_N_S_soc_S_memory_controller_52004000 * - * Binding (compatible = st,stm32-gpio): - * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * Binding (compatible = st,stm32h7-fmc): + * $ZEPHYR_BASE/dts/bindings/memory-controllers/st,stm32h7-fmc.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_PATH "/soc/pin-controller@58020000/gpio@58020C00" +#define DT_N_S_soc_S_memory_controller_52004000_PATH "/soc/memory-controller@52004000" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FULL_NAME "gpio@58020C00" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FULL_NAME_UNQUOTED gpio@58020C00 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FULL_NAME_TOKEN gpio_58020C00 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FULL_NAME_UPPER_TOKEN GPIO_58020C00 +#define DT_N_S_soc_S_memory_controller_52004000_FULL_NAME "memory-controller@52004000" +#define DT_N_S_soc_S_memory_controller_52004000_FULL_NAME_UNQUOTED memory-controller@52004000 +#define DT_N_S_soc_S_memory_controller_52004000_FULL_NAME_TOKEN memory_controller_52004000 +#define DT_N_S_soc_S_memory_controller_52004000_FULL_NAME_UPPER_TOKEN MEMORY_CONTROLLER_52004000 -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc) identifier: */ +#define DT_N_S_soc_S_memory_controller_52004000_PARENT DT_N_S_soc /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_CHILD_IDX 3 +#define DT_N_S_soc_S_memory_controller_52004000_CHILD_IDX 62 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_NODELABEL(fn) fn(gpiod) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiod, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_memory_controller_52004000_NODELABEL_NUM 1 +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_NODELABEL(fn) fn(fmc) +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_NODELABEL_VARGS(fn, ...) fn(fmc, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_memory_controller_52004000_CHILD_NUM 1 +#define DT_N_S_soc_S_memory_controller_52004000_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_HASH tKRd3cbFp9ssRvkcTuioUrRdj9PDUyedSyHZBEJhbfw +#define DT_N_S_soc_S_memory_controller_52004000_HASH kTmd62xLm1DVKtzu_bIobBAuYamR4w9y9dO1w2c1w_c /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_ORD 208 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_ORD_STR_SORTABLE 00208 +#define DT_N_S_soc_S_memory_controller_52004000_ORD 256 +#define DT_N_S_soc_S_memory_controller_52004000_ORD_STR_SORTABLE 00256 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REQUIRES_ORDS \ +#define DT_N_S_soc_S_memory_controller_52004000_REQUIRES_ORDS \ + 3, \ 8, \ - 11, + 217, \ + 218, \ + 219, \ + 220, \ + 221, \ + 222, \ + 223, \ + 224, \ + 225, \ + 226, \ + 227, \ + 228, \ + 229, \ + 230, \ + 231, \ + 232, \ + 233, \ + 234, \ + 235, \ + 236, \ + 237, \ + 238, \ + 239, \ + 240, \ + 241, \ + 242, \ + 243, \ + 244, \ + 245, \ + 246, \ + 247, \ + 248, \ + 249, \ + 250, \ + 251, \ + 252, \ + 253, \ + 254, \ + 255, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_SUPPORTS_ORDS +#define DT_N_S_soc_S_memory_controller_52004000_SUPPORTS_ORDS \ + 257, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_EXISTS 1 -#define DT_N_INST_3_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 -#define DT_N_NODELABEL_gpiod DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00 +#define DT_N_S_soc_S_memory_controller_52004000_EXISTS 1 +#define DT_N_INST_0_st_stm32h7_fmc DT_N_S_soc_S_memory_controller_52004000 +#define DT_N_NODELABEL_fmc DT_N_S_soc_S_memory_controller_52004000 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REG_IDX_0_VAL_ADDRESS 1476529152 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_COMPAT_MATCHES_st_stm32_gpio 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_COMPAT_MODEL_IDX_0 "stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_STATUS_okay 1 +#define DT_N_S_soc_S_memory_controller_52004000_REG_NUM 1 +#define DT_N_S_soc_S_memory_controller_52004000_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_REG_IDX_0_VAL_ADDRESS 1375748096 +#define DT_N_S_soc_S_memory_controller_52004000_REG_IDX_0_VAL_SIZE 1024 +#define DT_N_S_soc_S_memory_controller_52004000_RANGES_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_memory_controller_52004000_IRQ_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_IRQ_LEVEL 0 +#define DT_N_S_soc_S_memory_controller_52004000_COMPAT_MATCHES_st_stm32h7_fmc 1 +#define DT_N_S_soc_S_memory_controller_52004000_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_memory_controller_52004000_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_COMPAT_MODEL_IDX_0 "stm32h7-fmc" +#define DT_N_S_soc_S_memory_controller_52004000_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_PINCTRL_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NUM 1 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_IDX_0_TOKEN default +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_IDX_0_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX 0 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_11_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_12_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_13_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_14_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_15_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_16_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_17_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_18_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_19_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_20_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_21_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_22_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_23_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_24_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_25_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_26_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_27_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_28_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_29_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_30_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_31_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_32_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_33_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_34_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_35_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_36_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_37_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3 +#define DT_N_S_soc_S_memory_controller_52004000_PINCTRL_NAME_default_IDX_38_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg {1476529152, 1024} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg_IDX_0 1476529152 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_VAL_bits 8 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_ngpios 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_ngpios_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_gpio_controller 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_gpio_controller_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible {"st,stm32-gpio"} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_IDX_0 "st,stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap "disable" +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_STRING_UNQUOTED disable +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_STRING_TOKEN disable +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_STRING_UPPER_TOKEN DISABLE +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_IDX_0 "disable" +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_IDX_0_ENUM_IDX 0 +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_IDX_0_ENUM_VAL_disable_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, st_mem_swap, 0) +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, st_mem_swap, 0) +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, st_mem_swap, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, st_mem_swap, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_LEN 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_st_mem_swap_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_reg {1375748096, 1024} +#define DT_N_S_soc_S_memory_controller_52004000_P_reg_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_reg_IDX_0 1375748096 +#define DT_N_S_soc_S_memory_controller_52004000_P_reg_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_reg_IDX_1 1024 +#define DT_N_S_soc_S_memory_controller_52004000_P_reg_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_VAL_bus 212 +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_VAL_bus_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_VAL_bits 4096 +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_IDX_0_VAL_bits_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, clocks, 0) +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, clocks, 0) +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, clocks, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_LEN 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_clocks_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_0 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_0_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_1 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_1_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_2 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_2_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_3 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_3_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_4 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_4_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_5 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_5_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_6 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_6_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_7 DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_7_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_8 DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_8_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_8_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_9 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_9_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_9_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_10 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_10_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_10_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_11 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_11_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_11_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_12 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_12_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_12_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_13 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_13_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_13_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_14 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_14_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_14_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_15 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_15_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_15_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_16 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_16_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_16_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_17 DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_17_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_17_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_18 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_18_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_18_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_19 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_19_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_19_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_20 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_20_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_20_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_21 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_21_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_21_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_22 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_22_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_22_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_23 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_23_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_23_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_24 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_24_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_24_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_25 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_25_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_25_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_26 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_26_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_26_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_27 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_27_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_27_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_28 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_28_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_28_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_29 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_29_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_29_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_30 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_30_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_30_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_31 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_31_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_31_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_32 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_32_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_32_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_33 DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_33_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_33_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_34 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_34_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_34_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_35 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_35_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_35_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_36 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_36_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_36_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_37 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_37_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_37_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_38 DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_38_PH DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_IDX_38_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 0) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 1) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 2) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 3) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 4) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 5) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 6) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 7) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 8) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 9) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 10) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 11) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 12) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 13) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 14) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 15) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 16) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 17) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 18) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 19) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 20) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 21) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 22) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 23) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 24) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 25) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 26) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 27) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 28) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 29) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 30) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 31) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 32) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 33) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 34) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 35) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 36) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 37) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 38) +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 7) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 8) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 9) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 10) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 11) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 12) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 13) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 14) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 15) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 16) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 17) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 18) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 19) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 20) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 21) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 22) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 23) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 24) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 25) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 26) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 27) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 28) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 29) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 30) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 31) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 32) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 33) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 34) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 35) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 36) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 37) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 38) +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 7, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 8, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 9, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 10, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 11, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 12, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 13, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 14, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 15, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 16, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 17, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 18, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 19, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 20, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 21, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 22, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 23, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 24, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 25, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 26, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 27, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 28, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 29, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 30, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 31, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 32, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 33, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 34, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 35, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 36, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 37, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 38, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 7, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 8, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 9, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 10, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 11, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 12, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 13, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 14, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 15, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 16, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 17, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 18, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 19, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 20, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 21, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 22, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 23, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 24, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 25, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 26, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 27, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 28, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 29, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 30, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 31, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 32, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 33, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 34, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 35, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 36, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 37, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_0, 38, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_LEN 39 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names {"default"} +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_IDX_0 "default" +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_IDX_0_STRING_UNQUOTED default +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_IDX_0_STRING_TOKEN default +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_IDX_0_STRING_UPPER_TOKEN DEFAULT +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_names, 0) +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_names, 0) +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, pinctrl_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_LEN 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_pinctrl_names_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_status "okay" +#define DT_N_S_soc_S_memory_controller_52004000_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_memory_controller_52004000_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_memory_controller_52004000_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_memory_controller_52004000_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_memory_controller_52004000_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, status, 0) +#define DT_N_S_soc_S_memory_controller_52004000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, status, 0) +#define DT_N_S_soc_S_memory_controller_52004000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_status_LEN 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_status_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible {"st,stm32h7-fmc"} +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_IDX_0 "st,stm32h7-fmc" +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32h7-fmc +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_IDX_0_STRING_TOKEN st_stm32h7_fmc +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32H7_FMC +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000, compatible, 0) +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000, compatible, 0) +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_LEN 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_memory_controller_52004000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_wakeup_source 0 +#define DT_N_S_soc_S_memory_controller_52004000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_memory_controller_52004000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/gpio@58021000 + * Devicetree node: /soc/memory-controller@52004000/sdram * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 + * Node identifier: DT_N_S_soc_S_memory_controller_52004000_S_sdram * - * Binding (compatible = st,stm32-gpio): - * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * Binding (compatible = st,stm32-fmc-sdram): + * $ZEPHYR_BASE/dts/bindings/memory-controllers/st,stm32-fmc-sdram.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_PATH "/soc/pin-controller@58020000/gpio@58021000" +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_PATH "/soc/memory-controller@52004000/sdram" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FULL_NAME "gpio@58021000" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FULL_NAME_UNQUOTED gpio@58021000 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FULL_NAME_TOKEN gpio_58021000 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FULL_NAME_UPPER_TOKEN GPIO_58021000 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FULL_NAME "sdram" +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FULL_NAME_UNQUOTED sdram +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FULL_NAME_TOKEN sdram +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FULL_NAME_UPPER_TOKEN SDRAM -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc/memory-controller@52004000) identifier: */ +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_PARENT DT_N_S_soc_S_memory_controller_52004000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_CHILD_IDX 4 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_NODELABEL(fn) fn(gpioe) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpioe, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_NODELABEL_NUM 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_NODELABEL(fn) fn(sdram) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_NODELABEL_VARGS(fn, ...) fn(sdram, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_CHILD_NUM 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_CHILD_NUM_STATUS_OKAY 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_STATUS_OKAY(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_HASH csLAO4okPfBG3MacvTQLEHUy_JHRJo1r_5mn7_Zx4zI +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_HASH TpfMR84hwpUHVdwEVm_B43KwOiOIegn_XuS5Nw5WT8Y /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_ORD 209 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_ORD_STR_SORTABLE 00209 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD 257 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_ORD_STR_SORTABLE 00257 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REQUIRES_ORDS \ - 8, \ - 11, +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_REQUIRES_ORDS \ + 256, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_SUPPORTS_ORDS +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_SUPPORTS_ORDS \ + 258, /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_EXISTS 1 -#define DT_N_INST_4_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 -#define DT_N_NODELABEL_gpioe DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_EXISTS 1 +#define DT_N_INST_0_st_stm32_fmc_sdram DT_N_S_soc_S_memory_controller_52004000_S_sdram +#define DT_N_NODELABEL_sdram DT_N_S_soc_S_memory_controller_52004000_S_sdram /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REG_IDX_0_VAL_ADDRESS 1476530176 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_COMPAT_MATCHES_st_stm32_gpio 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_COMPAT_MODEL_IDX_0 "stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_STATUS_okay 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_REG_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_RANGES_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_IRQ_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_IRQ_LEVEL 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_COMPAT_MATCHES_st_stm32_fmc_sdram 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_COMPAT_MODEL_IDX_0 "stm32-fmc-sdram" +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_PINCTRL_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg {1476530176, 1024} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg_IDX_0 1476530176 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_VAL_bits 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_ngpios 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_ngpios_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_gpio_controller 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_gpio_controller_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible {"st,stm32-gpio"} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_IDX_0 "st,stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_power_up_delay 100 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_power_up_delay_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_num_auto_refresh 8 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_num_auto_refresh_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_mode_register 544 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_mode_register_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_refresh_rate 683 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_refresh_rate_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status "okay" +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, status, 0) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, status, 0) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_LEN 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_status_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible {"st,stm32-fmc-sdram"} +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_IDX_0 "st,stm32-fmc-sdram" +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-fmc-sdram +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_IDX_0_STRING_TOKEN st_stm32_fmc_sdram +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_FMC_SDRAM +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, compatible, 0) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, compatible, 0) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_LEN 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_wakeup_source 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/pin-controller@58020000/gpio@58021400 - * - * Node identifier: DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 + * Devicetree node: /soc/memory-controller@52004000/sdram/bank@0 * - * Binding (compatible = st,stm32-gpio): - * $ZEPHYR_BASE/dts/bindings/gpio/st,stm32-gpio.yaml + * Node identifier: DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0 * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PATH "/soc/pin-controller@58020000/gpio@58021400" +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_PATH "/soc/memory-controller@52004000/sdram/bank@0" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME "gpio@58021400" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_UNQUOTED gpio@58021400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_TOKEN gpio_58021400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FULL_NAME_UPPER_TOKEN GPIO_58021400 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FULL_NAME "bank@0" +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FULL_NAME_UNQUOTED bank@0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FULL_NAME_TOKEN bank_0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FULL_NAME_UPPER_TOKEN BANK_0 -/* Node parent (/soc/pin-controller@58020000) identifier: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PARENT DT_N_S_soc_S_pin_controller_58020000 +/* Node parent (/soc/memory-controller@52004000/sdram) identifier: */ +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_PARENT DT_N_S_soc_S_memory_controller_52004000_S_sdram /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_IDX 5 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_NODELABEL(fn) fn(gpiof) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_NODELABEL_VARGS(fn, ...) fn(gpiof, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_NODELABEL_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_CHILD_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_HASH l5_L_caVLxj349B3OJV4wWPbN099OasLrBnDSU0_4ok +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_HASH QY51JdEkckBOXX58v1GkjBGJCv24_LOtVO55YJ1NOkM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD 210 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_ORD_STR_SORTABLE 00210 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD 258 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_ORD_STR_SORTABLE 00258 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REQUIRES_ORDS \ - 8, \ - 11, +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_REQUIRES_ORDS \ + 257, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_SUPPORTS_ORDS +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_EXISTS 1 -#define DT_N_INST_5_st_stm32_gpio DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 -#define DT_N_NODELABEL_gpiof DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_EXISTS 1 /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_NUM 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_VAL_ADDRESS 1476531200 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_RANGES_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_IRQ_NUM 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_IRQ_LEVEL 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MATCHES_st_stm32_gpio 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_COMPAT_MODEL_IDX_0 "stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_STATUS_okay 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_REG_NUM 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_REG_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_REG_IDX_0_VAL_ADDRESS 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_RANGES_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_IRQ_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_IRQ_LEVEL 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg {1476531200, 1024} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_0 1476531200 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bus 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bits 32 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_ngpios 16 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_ngpios_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_gpio_controller 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_gpio_controller_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible {"st,stm32-gpio"} -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0 "st,stm32-gpio" -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_TOKEN st_stm32_gpio -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_GPIO -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_LEN 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_wakeup_source 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_reg 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_reg_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control {0, 4, 16, 64, 256, 2048, 4096, 0} +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_0 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_1 4 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_2 16 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_3 64 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_4 256 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_5 2048 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_6 4096 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_7_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_IDX_7 0 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 0) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 1) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 2) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 3) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 4) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 5) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 6) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 7) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 6) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 7) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 6, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 7, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 6, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_control, 7, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_LEN 8 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_control_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing {2, 7, 5, 7, 2, 3, 3} +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_0 2 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_1 7 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_2_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_2 5 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_3_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_3 7 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_4_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_4 2 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_5_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_5 3 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_6_EXISTS 1 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_IDX_6 3 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 0) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 1) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 2) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 3) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 4) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 5) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 6) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 0) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 1) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 2) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 3) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 4) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 5) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 6) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 0, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 1, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 2, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 3, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 4, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 5, __VA_ARGS__) \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 6, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 3, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 4, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 5, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ + fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, st_sdram_timing, 6, __VA_ARGS__) +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_LEN 7 +#define DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0_P_st_sdram_timing_EXISTS 1 /* * Devicetree node: /soc/rtc@58004000 @@ -30087,8 +37255,8 @@ #define DT_N_S_soc_S_rtc_58004000_HASH gkw286t52G4_sJf8lAGLo0DSBHXliaICUQOG50q6fFk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_rtc_58004000_ORD 211 -#define DT_N_S_soc_S_rtc_58004000_ORD_STR_SORTABLE 00211 +#define DT_N_S_soc_S_rtc_58004000_ORD 259 +#define DT_N_S_soc_S_rtc_58004000_ORD_STR_SORTABLE 00259 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_rtc_58004000_REQUIRES_ORDS \ @@ -30098,7 +37266,7 @@ /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_rtc_58004000_SUPPORTS_ORDS \ - 212, + 260, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_rtc_58004000_EXISTS 1 @@ -30244,12 +37412,12 @@ #define DT_N_S_soc_S_rtc_58004000_S_backup_regs_HASH IStSYoUhtHqrUjM9yY_XAIRfQ_pesYYPWcD67wZRs80 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_rtc_58004000_S_backup_regs_ORD 212 -#define DT_N_S_soc_S_rtc_58004000_S_backup_regs_ORD_STR_SORTABLE 00212 +#define DT_N_S_soc_S_rtc_58004000_S_backup_regs_ORD 260 +#define DT_N_S_soc_S_rtc_58004000_S_backup_regs_ORD_STR_SORTABLE 00260 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_rtc_58004000_S_backup_regs_REQUIRES_ORDS \ - 211, + 259, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_rtc_58004000_S_backup_regs_SUPPORTS_ORDS @@ -30333,7 +37501,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_CHILD_IDX 77 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_CHILD_IDX 103 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_NODELABEL_NUM 1 @@ -30357,16 +37525,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_HASH 2teowxUjE8_FxvCIn8DGuUYirblEyMpZ4lr8HqSXaaw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_ORD 213 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_ORD_STR_SORTABLE 00213 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_ORD 261 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_ORD_STR_SORTABLE 00261 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_SUPPORTS_ORDS \ - 217, + 265, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9_EXISTS 1 @@ -30437,7 +37605,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_CHILD_IDX 78 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_CHILD_IDX 104 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_NODELABEL_NUM 1 @@ -30461,16 +37629,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_HASH 3HZYvQCzh2CKUuQxXZVhfA0IsxHIPiApYVLrU0CZri8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_ORD 214 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_ORD_STR_SORTABLE 00214 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_ORD 262 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_ORD_STR_SORTABLE 00262 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_SUPPORTS_ORDS \ - 217, + 265, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8_EXISTS 1 @@ -30541,7 +37709,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_CHILD_IDX 82 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_CHILD_IDX 108 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_NODELABEL_NUM 1 @@ -30565,16 +37733,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_HASH ePv7fmbJxK0t7YYDjYg1Ohy12gRZUgbJSF1gO_t8Dgk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_ORD 215 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_ORD_STR_SORTABLE 00215 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_ORD 263 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_ORD_STR_SORTABLE 00263 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_SUPPORTS_ORDS \ - 217, + 265, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6_EXISTS 1 @@ -30645,7 +37813,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_CHILD_IDX 87 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_CHILD_IDX 113 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_NODELABEL_NUM 1 @@ -30669,16 +37837,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_HASH B9uLXc_N_H8Zax7uKcJeGW2RqLW9Z_qKkaFEzKRf0vc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_ORD 216 -#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_ORD_STR_SORTABLE 00216 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_ORD 264 +#define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_ORD_STR_SORTABLE 00264 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_SUPPORTS_ORDS \ - 217, + 265, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15_EXISTS 1 @@ -30776,23 +37944,23 @@ #define DT_N_S_soc_S_serial_40007800_HASH B1n8AhUVQ1w9M632DgTYUTge_yAZlcZs3gBpMVS0S2o /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40007800_ORD 217 -#define DT_N_S_soc_S_serial_40007800_ORD_STR_SORTABLE 00217 +#define DT_N_S_soc_S_serial_40007800_ORD 265 +#define DT_N_S_soc_S_serial_40007800_ORD_STR_SORTABLE 00265 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40007800_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, \ - 213, \ - 214, \ - 215, \ - 216, + 51, \ + 261, \ + 262, \ + 263, \ + 264, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40007800_SUPPORTS_ORDS \ - 218, + 266, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_serial_40007800_EXISTS 1 @@ -31048,16 +38216,16 @@ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_HASH 0_FEtRbmSqRY8m6SEMSerqA2k1Js7X7ZOTOkS31607w /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_ORD 218 -#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_ORD_STR_SORTABLE 00218 +#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_ORD 266 +#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_ORD_STR_SORTABLE 00266 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_REQUIRES_ORDS \ - 217, + 265, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_SUPPORTS_ORDS \ - 219, + 267, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_EXISTS 1 @@ -31195,13 +38363,13 @@ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_HASH RQ9gKlwjhI_oOOFXbyxqL076912cRKfwaPheiG1UTxk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_ORD 219 -#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_ORD_STR_SORTABLE 00219 +#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_ORD 267 +#define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_ORD_STR_SORTABLE 00267 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_REQUIRES_ORDS \ - 12, \ - 218, + 14, \ + 266, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx_SUPPORTS_ORDS @@ -31308,7 +38476,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_CHILD_IDX 67 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_CHILD_IDX 86 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_NODELABEL_NUM 1 @@ -31332,16 +38500,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_HASH C75AXIPqbztrT8qX90ujxmE5GjOftjH6XTnQcrYmNu0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_ORD 220 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_ORD_STR_SORTABLE 00220 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_ORD 268 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_ORD_STR_SORTABLE 00268 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_SUPPORTS_ORDS \ - 226, + 274, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11_EXISTS 1 @@ -31412,7 +38580,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_CHILD_IDX 68 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_CHILD_IDX 87 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_NODELABEL_NUM 1 @@ -31436,16 +38604,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_HASH MnckT78VmLrSZ9iWePDXsEc9c2e05BkCOfF3hw1jZlw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_ORD 221 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_ORD_STR_SORTABLE 00221 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_ORD 269 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_ORD_STR_SORTABLE 00269 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_SUPPORTS_ORDS \ - 226, + 274, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12_EXISTS 1 @@ -31516,7 +38684,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_CHILD_IDX 70 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_CHILD_IDX 89 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_NODELABEL_NUM 1 @@ -31540,16 +38708,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_HASH _XKN9Z_iAmrlaJZw2E_tZTjO4wvF4kFQwFeCp8Fhb94 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_ORD 222 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_ORD_STR_SORTABLE 00222 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_ORD 270 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_ORD_STR_SORTABLE 00270 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_SUPPORTS_ORDS \ - 226, + 274, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7_EXISTS 1 @@ -31620,7 +38788,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_CHILD_IDX 69 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_CHILD_IDX 88 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_NODELABEL_NUM 1 @@ -31644,16 +38812,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_HASH K76HRz7OhGY700FTjJ0vDxyPqRM5MLIgbZ2LuZqgTZM /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_ORD 223 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_ORD_STR_SORTABLE 00223 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_ORD 271 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_ORD_STR_SORTABLE 00271 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_SUPPORTS_ORDS \ - 226, + 274, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13_EXISTS 1 @@ -31724,7 +38892,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_CHILD_IDX 72 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_CHILD_IDX 91 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_NODELABEL_NUM 1 @@ -31748,16 +38916,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_HASH fNwfqMDDmHqJIgS0PwL2mx2ijK_80zzVdKj6fBsKnmA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_ORD 224 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_ORD_STR_SORTABLE 00224 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_ORD 272 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_ORD_STR_SORTABLE 00272 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_SUPPORTS_ORDS \ - 226, + 274, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6_EXISTS 1 @@ -31828,7 +38996,7 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_PARENT DT_N_S_soc_S_pin_controller_58020000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_CHILD_IDX 71 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_CHILD_IDX 90 /* Helpers for dealing with node labels: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_NODELABEL_NUM 1 @@ -31852,16 +39020,16 @@ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_HASH UubVLWKFp67Dn2dfEbl_p7O6Pj_U0a8k33QFXfGSg5I /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_ORD 225 -#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_ORD_STR_SORTABLE 00225 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_ORD 273 +#define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_ORD_STR_SORTABLE 00273 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_REQUIRES_ORDS \ - 11, + 9, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_SUPPORTS_ORDS \ - 226, + 274, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10_EXISTS 1 @@ -31959,24 +39127,24 @@ #define DT_N_S_soc_S_spi_52005000_HASH etwCSEQ3CxPLi1c1qfelhgqg6mOHQY7POv1y23ELnnw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_52005000_ORD 226 -#define DT_N_S_soc_S_spi_52005000_ORD_STR_SORTABLE 00226 +#define DT_N_S_soc_S_spi_52005000_ORD 274 +#define DT_N_S_soc_S_spi_52005000_ORD_STR_SORTABLE 00274 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_52005000_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 220, \ - 221, \ - 222, \ - 223, \ - 224, \ - 225, + 268, \ + 269, \ + 270, \ + 271, \ + 272, \ + 273, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_spi_52005000_SUPPORTS_ORDS \ - 227, + 275, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_spi_52005000_EXISTS 1 @@ -32185,16 +39353,16 @@ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_HASH _6gtCDvKygUTrvkroZc3fCA2_Z0XKK6fuum9A_AIRIw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_ORD 227 -#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_ORD_STR_SORTABLE 00227 +#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_ORD 275 +#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_ORD_STR_SORTABLE 00275 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_REQUIRES_ORDS \ - 226, + 274, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_SUPPORTS_ORDS \ - 228, + 276, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_EXISTS 1 @@ -32732,17 +39900,17 @@ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_HASH XY0AFUmGKuWlclzD5Kruco_CxHkJ_60B2SeSRi8_b3E /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_ORD 228 -#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_ORD_STR_SORTABLE 00228 +#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_ORD 276 +#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_ORD_STR_SORTABLE 00276 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_REQUIRES_ORDS \ - 227, + 275, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_SUPPORTS_ORDS \ - 229, \ - 230, + 277, \ + 278, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_EXISTS 1 @@ -32808,12 +39976,12 @@ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_HASH M29yLXErBqH75kvz9edGHsXCYsY2KArhdieyXpekmw4 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_ORD 229 -#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00229 +#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_ORD 277 +#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_ORD_STR_SORTABLE 00277 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_REQUIRES_ORDS \ - 228, + 276, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0_SUPPORTS_ORDS @@ -32907,12 +40075,12 @@ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000_HASH wVxg_DUCIJSlE2dFAwDbtgYPoDoHai8_STlx7rfO0ZI /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000_ORD 230 -#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000_ORD_STR_SORTABLE 00230 +#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000_ORD 278 +#define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000_ORD_STR_SORTABLE 00278 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000_REQUIRES_ORDS \ - 228, + 276, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000_SUPPORTS_ORDS @@ -33009,24 +40177,24 @@ #define DT_N_S_soc_S_timers_40000000_HASH EG81bdVGBcHLEHOWL0pmGPFAUziNY8yKUHEsHXKaWCc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000000_ORD 231 -#define DT_N_S_soc_S_timers_40000000_ORD_STR_SORTABLE 00231 +#define DT_N_S_soc_S_timers_40000000_ORD 279 +#define DT_N_S_soc_S_timers_40000000_ORD_STR_SORTABLE 00279 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000000_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000000_SUPPORTS_ORDS \ - 232, \ - 233, + 280, \ + 281, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000000_EXISTS 1 -#define DT_N_INST_1_st_stm32_timers DT_N_S_soc_S_timers_40000000 +#define DT_N_INST_4_st_stm32_timers DT_N_S_soc_S_timers_40000000 #define DT_N_NODELABEL_timers2 DT_N_S_soc_S_timers_40000000 /* Macros for properties that are special in the specification: */ @@ -33193,12 +40361,12 @@ #define DT_N_S_soc_S_timers_40000000_S_counter_HASH q1HYCxKR_QqakI62hwcbYK3CrWp5E_XbPwXUySU4se8 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000000_S_counter_ORD 232 -#define DT_N_S_soc_S_timers_40000000_S_counter_ORD_STR_SORTABLE 00232 +#define DT_N_S_soc_S_timers_40000000_S_counter_ORD 280 +#define DT_N_S_soc_S_timers_40000000_S_counter_ORD_STR_SORTABLE 00280 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000000_S_counter_REQUIRES_ORDS \ - 231, + 279, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000000_S_counter_SUPPORTS_ORDS @@ -33306,19 +40474,19 @@ #define DT_N_S_soc_S_timers_40000000_S_pwm_HASH EPAdjmCelZ_p_2x7j2JfW0691g5_Ul9BLhqJG9tnJMk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD 233 -#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD_STR_SORTABLE 00233 +#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD 281 +#define DT_N_S_soc_S_timers_40000000_S_pwm_ORD_STR_SORTABLE 00281 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000000_S_pwm_REQUIRES_ORDS \ - 231, + 279, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000000_S_pwm_SUPPORTS_ORDS /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000000_S_pwm_EXISTS 1 -#define DT_N_INST_1_st_stm32_pwm DT_N_S_soc_S_timers_40000000_S_pwm +#define DT_N_INST_4_st_stm32_pwm DT_N_S_soc_S_timers_40000000_S_pwm /* Macros for properties that are special in the specification: */ #define DT_N_S_soc_S_timers_40000000_S_pwm_REG_NUM 0 @@ -33372,190 +40540,6 @@ #define DT_N_S_soc_S_timers_40000000_S_pwm_P_zephyr_pm_device_runtime_auto 0 #define DT_N_S_soc_S_timers_40000000_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 -/* - * Devicetree node: /soc/timers@40000400 - * - * Node identifier: DT_N_S_soc_S_timers_40000400 - * - * Binding (compatible = st,stm32-timers): - * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_timers_40000400_PATH "/soc/timers@40000400" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40000400_FULL_NAME "timers@40000400" -#define DT_N_S_soc_S_timers_40000400_FULL_NAME_UNQUOTED timers@40000400 -#define DT_N_S_soc_S_timers_40000400_FULL_NAME_TOKEN timers_40000400 -#define DT_N_S_soc_S_timers_40000400_FULL_NAME_UPPER_TOKEN TIMERS_40000400 - -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_timers_40000400_PARENT DT_N_S_soc - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40000400_CHILD_IDX 35 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40000400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_timers_40000400_FOREACH_NODELABEL(fn) fn(timers3) -#define DT_N_S_soc_S_timers_40000400_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers3, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40000400_CHILD_NUM 2 -#define DT_N_S_soc_S_timers_40000400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm) fn(DT_N_S_soc_S_timers_40000400_S_counter) -#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400_S_counter) -#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40000400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_timers_40000400_HASH baeUapzy1gNL2E23NOiz9371NQp1G8KhvyeXIcEPqLk - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000400_ORD 234 -#define DT_N_S_soc_S_timers_40000400_ORD_STR_SORTABLE 00234 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40000400_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 41, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40000400_SUPPORTS_ORDS \ - 235, \ - 236, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40000400_EXISTS 1 -#define DT_N_INST_2_st_stm32_timers DT_N_S_soc_S_timers_40000400 -#define DT_N_NODELABEL_timers3 DT_N_S_soc_S_timers_40000400 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40000400_REG_NUM 1 -#define DT_N_S_soc_S_timers_40000400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_REG_IDX_0_VAL_ADDRESS 1073742848 -#define DT_N_S_soc_S_timers_40000400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_timers_40000400_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40000400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40000400_IRQ_NUM 1 -#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_irq 29 -#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40000400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40000400_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_timers_40000400_COMPAT_MATCHES_st_stm32_timers 1 -#define DT_N_S_soc_S_timers_40000400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40000400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_COMPAT_MODEL_IDX_0 "stm32-timers" -#define DT_N_S_soc_S_timers_40000400_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40000400_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_timers_40000400_P_reg {1073742848, 1024} -#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_0 1073742848 -#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_timers_40000400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bits 2 -#define DT_N_S_soc_S_timers_40000400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, clocks, 0) -#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, clocks, 0) -#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_P_clocks_LEN 1 -#define DT_N_S_soc_S_timers_40000400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_VAL_id 4609 -#define DT_N_S_soc_S_timers_40000400_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, resets, 0) -#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, resets, 0) -#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_P_resets_LEN 1 -#define DT_N_S_soc_S_timers_40000400_P_resets_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_st_prescaler 0 -#define DT_N_S_soc_S_timers_40000400_P_st_prescaler_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_st_countermode 0 -#define DT_N_S_soc_S_timers_40000400_P_st_countermode_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_status "disabled" -#define DT_N_S_soc_S_timers_40000400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40000400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40000400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40000400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, status, 0) -#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, status, 0) -#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40000400_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_compatible {"st,stm32-timers"} -#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0 "st,stm32-timers" -#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers -#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers -#define DT_N_S_soc_S_timers_40000400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS -#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, compatible, 0) -#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, compatible, 0) -#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40000400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_interrupts {29, 0} -#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_0 29 -#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_timers_40000400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names {"global"} -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0 "global" -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_STRING_UNQUOTED global -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_STRING_TOKEN global -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0) -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0) -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400, interrupt_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_LEN 1 -#define DT_N_S_soc_S_timers_40000400_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40000400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40000400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40000400_P_zephyr_pm_device_runtime_auto_EXISTS 1 - /* * Devicetree node: /soc/timers@40000400/counter * @@ -33605,12 +40589,12 @@ #define DT_N_S_soc_S_timers_40000400_S_counter_HASH JNkHbJAdpxqum04dZjR7ujFGNxo62pj2eB31ikv0Phc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000400_S_counter_ORD 235 -#define DT_N_S_soc_S_timers_40000400_S_counter_ORD_STR_SORTABLE 00235 +#define DT_N_S_soc_S_timers_40000400_S_counter_ORD 282 +#define DT_N_S_soc_S_timers_40000400_S_counter_ORD_STR_SORTABLE 00282 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000400_S_counter_REQUIRES_ORDS \ - 234, + 72, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000400_S_counter_SUPPORTS_ORDS @@ -33669,121 +40653,6 @@ #define DT_N_S_soc_S_timers_40000400_S_counter_P_zephyr_pm_device_runtime_auto 0 #define DT_N_S_soc_S_timers_40000400_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 -/* - * Devicetree node: /soc/timers@40000400/pwm - * - * Node identifier: DT_N_S_soc_S_timers_40000400_S_pwm - * - * Binding (compatible = st,stm32-pwm): - * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_PATH "/soc/timers@40000400/pwm" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME "pwm" -#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME_UNQUOTED pwm -#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME_TOKEN pwm -#define DT_N_S_soc_S_timers_40000400_S_pwm_FULL_NAME_UPPER_TOKEN PWM - -/* Node parent (/soc/timers@40000400) identifier: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_PARENT DT_N_S_soc_S_timers_40000400 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_CHILD_IDX 0 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_NODELABEL_NUM 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_NODELABEL(fn) -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_CHILD_NUM 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_HASH 3XEqw4Q0MqUTTpvQ0Yrht2rVkAAPsKyjdgccEVU8gEE - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD 236 -#define DT_N_S_soc_S_timers_40000400_S_pwm_ORD_STR_SORTABLE 00236 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_REQUIRES_ORDS \ - 234, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_SUPPORTS_ORDS - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_EXISTS 1 -#define DT_N_INST_2_st_stm32_pwm DT_N_S_soc_S_timers_40000400_S_pwm - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_REG_NUM 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40000400_S_pwm_IRQ_NUM 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_IRQ_LEVEL 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" -#define DT_N_S_soc_S_timers_40000400_S_pwm_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_four_channel_capture_support 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_four_channel_capture_support_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status "disabled" -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0) -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0) -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible {"st,stm32-pwm"} -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0) -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0) -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40000400_S_pwm, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40000400_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 - /* * Devicetree node: /soc/timers@40000800 * @@ -33833,24 +40702,24 @@ #define DT_N_S_soc_S_timers_40000800_HASH VTBFi6bYiewunKr1vKL59kMmaq2wTI7eroMWbGtK2dw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000800_ORD 237 -#define DT_N_S_soc_S_timers_40000800_ORD_STR_SORTABLE 00237 +#define DT_N_S_soc_S_timers_40000800_ORD 283 +#define DT_N_S_soc_S_timers_40000800_ORD_STR_SORTABLE 00283 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000800_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000800_SUPPORTS_ORDS \ - 238, \ - 239, + 284, \ + 285, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000800_EXISTS 1 -#define DT_N_INST_3_st_stm32_timers DT_N_S_soc_S_timers_40000800 +#define DT_N_INST_5_st_stm32_timers DT_N_S_soc_S_timers_40000800 #define DT_N_NODELABEL_timers4 DT_N_S_soc_S_timers_40000800 /* Macros for properties that are special in the specification: */ @@ -34017,12 +40886,12 @@ #define DT_N_S_soc_S_timers_40000800_S_counter_HASH It81r5Kkjm8b1AfJHPW0z0jZ9dof3VW5417OU_gyZtc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000800_S_counter_ORD 238 -#define DT_N_S_soc_S_timers_40000800_S_counter_ORD_STR_SORTABLE 00238 +#define DT_N_S_soc_S_timers_40000800_S_counter_ORD 284 +#define DT_N_S_soc_S_timers_40000800_S_counter_ORD_STR_SORTABLE 00284 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000800_S_counter_REQUIRES_ORDS \ - 237, + 283, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000800_S_counter_SUPPORTS_ORDS @@ -34130,19 +40999,19 @@ #define DT_N_S_soc_S_timers_40000800_S_pwm_HASH rmmRd1gBchFTmlpcPkj2kPN2S9h0o7_bVDPViAglyik /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD 239 -#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD_STR_SORTABLE 00239 +#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD 285 +#define DT_N_S_soc_S_timers_40000800_S_pwm_ORD_STR_SORTABLE 00285 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000800_S_pwm_REQUIRES_ORDS \ - 237, + 283, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000800_S_pwm_SUPPORTS_ORDS /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000800_S_pwm_EXISTS 1 -#define DT_N_INST_3_st_stm32_pwm DT_N_S_soc_S_timers_40000800_S_pwm +#define DT_N_INST_5_st_stm32_pwm DT_N_S_soc_S_timers_40000800_S_pwm /* Macros for properties that are special in the specification: */ #define DT_N_S_soc_S_timers_40000800_S_pwm_REG_NUM 0 @@ -34245,24 +41114,24 @@ #define DT_N_S_soc_S_timers_40000c00_HASH QK_gD7RT_mF_sn_to7wpxIKr0c1D_KZ7j86aqguJXxk /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000c00_ORD 240 -#define DT_N_S_soc_S_timers_40000c00_ORD_STR_SORTABLE 00240 +#define DT_N_S_soc_S_timers_40000c00_ORD 286 +#define DT_N_S_soc_S_timers_40000c00_ORD_STR_SORTABLE 00286 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000c00_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000c00_SUPPORTS_ORDS \ - 241, \ - 242, + 287, \ + 288, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000c00_EXISTS 1 -#define DT_N_INST_4_st_stm32_timers DT_N_S_soc_S_timers_40000c00 +#define DT_N_INST_6_st_stm32_timers DT_N_S_soc_S_timers_40000c00 #define DT_N_NODELABEL_timers5 DT_N_S_soc_S_timers_40000c00 /* Macros for properties that are special in the specification: */ @@ -34429,12 +41298,12 @@ #define DT_N_S_soc_S_timers_40000c00_S_counter_HASH SRmSz9_Gy7Y2Ew5bN2f2oN589iJ0Ygd6yjjRU92Vo2Q /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000c00_S_counter_ORD 241 -#define DT_N_S_soc_S_timers_40000c00_S_counter_ORD_STR_SORTABLE 00241 +#define DT_N_S_soc_S_timers_40000c00_S_counter_ORD 287 +#define DT_N_S_soc_S_timers_40000c00_S_counter_ORD_STR_SORTABLE 00287 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000c00_S_counter_REQUIRES_ORDS \ - 240, + 286, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000c00_S_counter_SUPPORTS_ORDS @@ -34542,19 +41411,19 @@ #define DT_N_S_soc_S_timers_40000c00_S_pwm_HASH KSO3eNoSPYFOR_AlcenmOupE8OUZymwAp8eJUzabeJg /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40000c00_S_pwm_ORD 242 -#define DT_N_S_soc_S_timers_40000c00_S_pwm_ORD_STR_SORTABLE 00242 +#define DT_N_S_soc_S_timers_40000c00_S_pwm_ORD 288 +#define DT_N_S_soc_S_timers_40000c00_S_pwm_ORD_STR_SORTABLE 00288 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40000c00_S_pwm_REQUIRES_ORDS \ - 240, + 286, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40000c00_S_pwm_SUPPORTS_ORDS /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40000c00_S_pwm_EXISTS 1 -#define DT_N_INST_4_st_stm32_pwm DT_N_S_soc_S_timers_40000c00_S_pwm +#define DT_N_INST_6_st_stm32_pwm DT_N_S_soc_S_timers_40000c00_S_pwm /* Macros for properties that are special in the specification: */ #define DT_N_S_soc_S_timers_40000c00_S_pwm_REG_NUM 0 @@ -34657,23 +41526,23 @@ #define DT_N_S_soc_S_timers_40001000_HASH Nsz_iy2H8UvqHZMouFTv3bvFrOuL3LyjaTTN24v0eBQ /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001000_ORD 243 -#define DT_N_S_soc_S_timers_40001000_ORD_STR_SORTABLE 00243 +#define DT_N_S_soc_S_timers_40001000_ORD 289 +#define DT_N_S_soc_S_timers_40001000_ORD_STR_SORTABLE 00289 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001000_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001000_SUPPORTS_ORDS \ - 244, + 290, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40001000_EXISTS 1 -#define DT_N_INST_5_st_stm32_timers DT_N_S_soc_S_timers_40001000 +#define DT_N_INST_7_st_stm32_timers DT_N_S_soc_S_timers_40001000 #define DT_N_NODELABEL_timers6 DT_N_S_soc_S_timers_40001000 /* Macros for properties that are special in the specification: */ @@ -34840,12 +41709,12 @@ #define DT_N_S_soc_S_timers_40001000_S_counter_HASH kRqNwCO_GFQ9B_IU80aWEsZniZ2xLsueygEKHK_oRqE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001000_S_counter_ORD 244 -#define DT_N_S_soc_S_timers_40001000_S_counter_ORD_STR_SORTABLE 00244 +#define DT_N_S_soc_S_timers_40001000_S_counter_ORD 290 +#define DT_N_S_soc_S_timers_40001000_S_counter_ORD_STR_SORTABLE 00290 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001000_S_counter_REQUIRES_ORDS \ - 243, + 289, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001000_S_counter_SUPPORTS_ORDS @@ -34953,23 +41822,23 @@ #define DT_N_S_soc_S_timers_40001400_HASH NWGZgzDJgqZSuO0DPWROIlkjRWjN3_VzkmbGsEAbECw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001400_ORD 245 -#define DT_N_S_soc_S_timers_40001400_ORD_STR_SORTABLE 00245 +#define DT_N_S_soc_S_timers_40001400_ORD 291 +#define DT_N_S_soc_S_timers_40001400_ORD_STR_SORTABLE 00291 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001400_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001400_SUPPORTS_ORDS \ - 246, + 292, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40001400_EXISTS 1 -#define DT_N_INST_6_st_stm32_timers DT_N_S_soc_S_timers_40001400 +#define DT_N_INST_8_st_stm32_timers DT_N_S_soc_S_timers_40001400 #define DT_N_NODELABEL_timers7 DT_N_S_soc_S_timers_40001400 /* Macros for properties that are special in the specification: */ @@ -35136,12 +42005,12 @@ #define DT_N_S_soc_S_timers_40001400_S_counter_HASH yUMrsaqgcXElOUnLnHc7vIdLGcToiUBEnmAPHwvJ0BA /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001400_S_counter_ORD 246 -#define DT_N_S_soc_S_timers_40001400_S_counter_ORD_STR_SORTABLE 00246 +#define DT_N_S_soc_S_timers_40001400_S_counter_ORD 292 +#define DT_N_S_soc_S_timers_40001400_S_counter_ORD_STR_SORTABLE 00292 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001400_S_counter_REQUIRES_ORDS \ - 245, + 291, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001400_S_counter_SUPPORTS_ORDS @@ -35200,190 +42069,6 @@ #define DT_N_S_soc_S_timers_40001400_S_counter_P_zephyr_pm_device_runtime_auto 0 #define DT_N_S_soc_S_timers_40001400_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 -/* - * Devicetree node: /soc/timers@40001800 - * - * Node identifier: DT_N_S_soc_S_timers_40001800 - * - * Binding (compatible = st,stm32-timers): - * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_timers_40001800_PATH "/soc/timers@40001800" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40001800_FULL_NAME "timers@40001800" -#define DT_N_S_soc_S_timers_40001800_FULL_NAME_UNQUOTED timers@40001800 -#define DT_N_S_soc_S_timers_40001800_FULL_NAME_TOKEN timers_40001800 -#define DT_N_S_soc_S_timers_40001800_FULL_NAME_UPPER_TOKEN TIMERS_40001800 - -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_timers_40001800_PARENT DT_N_S_soc - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40001800_CHILD_IDX 41 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40001800_NODELABEL_NUM 1 -#define DT_N_S_soc_S_timers_40001800_FOREACH_NODELABEL(fn) fn(timers12) -#define DT_N_S_soc_S_timers_40001800_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers12, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40001800_CHILD_NUM 2 -#define DT_N_S_soc_S_timers_40001800_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40001800_S_pwm) fn(DT_N_S_soc_S_timers_40001800_S_counter) -#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_pwm) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001800_S_counter) -#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_counter, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep fn(DT_N_S_soc_S_timers_40001800_S_counter, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40001800_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_timers_40001800_HASH qfLQQZgyR253_Bl3FxzOIzJN7i8JBpwjwqhvZ_fm11E - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001800_ORD 247 -#define DT_N_S_soc_S_timers_40001800_ORD_STR_SORTABLE 00247 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40001800_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 41, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40001800_SUPPORTS_ORDS \ - 248, \ - 249, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40001800_EXISTS 1 -#define DT_N_INST_8_st_stm32_timers DT_N_S_soc_S_timers_40001800 -#define DT_N_NODELABEL_timers12 DT_N_S_soc_S_timers_40001800 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40001800_REG_NUM 1 -#define DT_N_S_soc_S_timers_40001800_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_REG_IDX_0_VAL_ADDRESS 1073747968 -#define DT_N_S_soc_S_timers_40001800_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_timers_40001800_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40001800_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40001800_IRQ_NUM 1 -#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_irq 43 -#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40001800_IRQ_LEVEL 1 -#define DT_N_S_soc_S_timers_40001800_IRQ_NAME_global_VAL_irq DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_timers_40001800_IRQ_NAME_global_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_IRQ_NAME_global_VAL_priority DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_timers_40001800_IRQ_NAME_global_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_IRQ_NAME_global_CONTROLLER DT_N_S_soc_S_timers_40001800_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_timers_40001800_COMPAT_MATCHES_st_stm32_timers 1 -#define DT_N_S_soc_S_timers_40001800_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40001800_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_COMPAT_MODEL_IDX_0 "stm32-timers" -#define DT_N_S_soc_S_timers_40001800_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40001800_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_timers_40001800_P_reg {1073747968, 1024} -#define DT_N_S_soc_S_timers_40001800_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_reg_IDX_0 1073747968 -#define DT_N_S_soc_S_timers_40001800_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_timers_40001800_P_reg_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_VAL_bus 232 -#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_VAL_bits 64 -#define DT_N_S_soc_S_timers_40001800_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800, clocks, 0) -#define DT_N_S_soc_S_timers_40001800_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800, clocks, 0) -#define DT_N_S_soc_S_timers_40001800_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_P_clocks_LEN 1 -#define DT_N_S_soc_S_timers_40001800_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_timers_40001800_P_resets_IDX_0_VAL_id 4614 -#define DT_N_S_soc_S_timers_40001800_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800, resets, 0) -#define DT_N_S_soc_S_timers_40001800_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800, resets, 0) -#define DT_N_S_soc_S_timers_40001800_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_P_resets_LEN 1 -#define DT_N_S_soc_S_timers_40001800_P_resets_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_st_prescaler 0 -#define DT_N_S_soc_S_timers_40001800_P_st_prescaler_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_st_countermode 0 -#define DT_N_S_soc_S_timers_40001800_P_st_countermode_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_status "disabled" -#define DT_N_S_soc_S_timers_40001800_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40001800_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40001800_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40001800_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40001800_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40001800_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800, status, 0) -#define DT_N_S_soc_S_timers_40001800_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800, status, 0) -#define DT_N_S_soc_S_timers_40001800_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40001800_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_compatible {"st,stm32-timers"} -#define DT_N_S_soc_S_timers_40001800_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_compatible_IDX_0 "st,stm32-timers" -#define DT_N_S_soc_S_timers_40001800_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers -#define DT_N_S_soc_S_timers_40001800_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers -#define DT_N_S_soc_S_timers_40001800_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS -#define DT_N_S_soc_S_timers_40001800_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800, compatible, 0) -#define DT_N_S_soc_S_timers_40001800_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800, compatible, 0) -#define DT_N_S_soc_S_timers_40001800_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40001800_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_interrupts {43, 0} -#define DT_N_S_soc_S_timers_40001800_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_interrupts_IDX_0 43 -#define DT_N_S_soc_S_timers_40001800_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_timers_40001800_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names {"global"} -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_IDX_0 "global" -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_IDX_0_STRING_UNQUOTED global -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_IDX_0_STRING_TOKEN global -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800, interrupt_names, 0) -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800, interrupt_names, 0) -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800, interrupt_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800, interrupt_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_LEN 1 -#define DT_N_S_soc_S_timers_40001800_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40001800_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40001800_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40001800_P_zephyr_pm_device_runtime_auto_EXISTS 1 - /* * Devicetree node: /soc/timers@40001800/counter * @@ -35433,12 +42118,12 @@ #define DT_N_S_soc_S_timers_40001800_S_counter_HASH fwQklgV179p_6HslAjdqF1c8jjC2BF4aua0ZbByE3PE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001800_S_counter_ORD 248 -#define DT_N_S_soc_S_timers_40001800_S_counter_ORD_STR_SORTABLE 00248 +#define DT_N_S_soc_S_timers_40001800_S_counter_ORD 293 +#define DT_N_S_soc_S_timers_40001800_S_counter_ORD_STR_SORTABLE 00293 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001800_S_counter_REQUIRES_ORDS \ - 247, + 76, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001800_S_counter_SUPPORTS_ORDS @@ -35480,137 +42165,22 @@ #define DT_N_S_soc_S_timers_40001800_S_counter_P_status_EXISTS 1 #define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible {"st,stm32-counter"} #define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_IDX_0 "st,stm32-counter" -#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter -#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter -#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER -#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800_S_counter, compatible, 0) -#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_counter, compatible, 0) -#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_counter, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_counter, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_counter_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40001800_S_counter_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_counter_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40001800_S_counter_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_counter_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40001800_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 - -/* - * Devicetree node: /soc/timers@40001800/pwm - * - * Node identifier: DT_N_S_soc_S_timers_40001800_S_pwm - * - * Binding (compatible = st,stm32-pwm): - * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_PATH "/soc/timers@40001800/pwm" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_FULL_NAME "pwm" -#define DT_N_S_soc_S_timers_40001800_S_pwm_FULL_NAME_UNQUOTED pwm -#define DT_N_S_soc_S_timers_40001800_S_pwm_FULL_NAME_TOKEN pwm -#define DT_N_S_soc_S_timers_40001800_S_pwm_FULL_NAME_UPPER_TOKEN PWM - -/* Node parent (/soc/timers@40001800) identifier: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_PARENT DT_N_S_soc_S_timers_40001800 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_CHILD_IDX 0 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_NODELABEL_NUM 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_NODELABEL(fn) -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40001800) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_CHILD_NUM 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_HASH K6wIUvCEy1gKgAak61GnZ_6WjWnijyfqkSvLs81dD80 - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_ORD 249 -#define DT_N_S_soc_S_timers_40001800_S_pwm_ORD_STR_SORTABLE 00249 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_REQUIRES_ORDS \ - 247, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_SUPPORTS_ORDS - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_EXISTS 1 -#define DT_N_INST_6_st_stm32_pwm DT_N_S_soc_S_timers_40001800_S_pwm - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_REG_NUM 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40001800_S_pwm_IRQ_NUM 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_IRQ_LEVEL 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40001800_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" -#define DT_N_S_soc_S_timers_40001800_S_pwm_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_four_channel_capture_support 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_four_channel_capture_support_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status "disabled" -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800_S_pwm, status, 0) -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_pwm, status, 0) -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible {"st,stm32-pwm"} -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800_S_pwm, compatible, 0) -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_pwm, compatible, 0) -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_pwm, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40001800_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40001800_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40001800_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40001800_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40001800_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40001800_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40001800_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40001800_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40001800_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40001800_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* * Devicetree node: /soc/timers@40001c00 @@ -35661,20 +42231,20 @@ #define DT_N_S_soc_S_timers_40001c00_HASH C10pHSqK_DBrhy8hrLH60y9fcj7aeZfIUJONPe1VrQs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001c00_ORD 250 -#define DT_N_S_soc_S_timers_40001c00_ORD_STR_SORTABLE 00250 +#define DT_N_S_soc_S_timers_40001c00_ORD 294 +#define DT_N_S_soc_S_timers_40001c00_ORD_STR_SORTABLE 00294 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001c00_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001c00_SUPPORTS_ORDS \ - 251, \ - 252, + 295, \ + 296, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40001c00_EXISTS 1 @@ -35845,12 +42415,12 @@ #define DT_N_S_soc_S_timers_40001c00_S_counter_HASH 9d8shZK9BRqoW9USlHmfnTMZSMrS4V_cs1TIO8Lq_48 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001c00_S_counter_ORD 251 -#define DT_N_S_soc_S_timers_40001c00_S_counter_ORD_STR_SORTABLE 00251 +#define DT_N_S_soc_S_timers_40001c00_S_counter_ORD 295 +#define DT_N_S_soc_S_timers_40001c00_S_counter_ORD_STR_SORTABLE 00295 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001c00_S_counter_REQUIRES_ORDS \ - 250, + 294, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001c00_S_counter_SUPPORTS_ORDS @@ -35958,12 +42528,12 @@ #define DT_N_S_soc_S_timers_40001c00_S_pwm_HASH a7Cf86O7zDlEGiIaLzI_4ROzwp0EjjUcTtMDoWesoDc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40001c00_S_pwm_ORD 252 -#define DT_N_S_soc_S_timers_40001c00_S_pwm_ORD_STR_SORTABLE 00252 +#define DT_N_S_soc_S_timers_40001c00_S_pwm_ORD 296 +#define DT_N_S_soc_S_timers_40001c00_S_pwm_ORD_STR_SORTABLE 00296 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40001c00_S_pwm_REQUIRES_ORDS \ - 250, + 294, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40001c00_S_pwm_SUPPORTS_ORDS @@ -36073,20 +42643,20 @@ #define DT_N_S_soc_S_timers_40002000_HASH Bwr917V_KDoq_2_yT2ELAebGrj8EfjUgvAAGsUjSK2c /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40002000_ORD 253 -#define DT_N_S_soc_S_timers_40002000_ORD_STR_SORTABLE 00253 +#define DT_N_S_soc_S_timers_40002000_ORD 297 +#define DT_N_S_soc_S_timers_40002000_ORD_STR_SORTABLE 00297 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40002000_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40002000_SUPPORTS_ORDS \ - 254, \ - 255, + 298, \ + 299, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40002000_EXISTS 1 @@ -36178,1009 +42748,391 @@ #define DT_N_S_soc_S_timers_40002000_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers #define DT_N_S_soc_S_timers_40002000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS #define DT_N_S_soc_S_timers_40002000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000, compatible, 0) -#define DT_N_S_soc_S_timers_40002000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000, compatible, 0) -#define DT_N_S_soc_S_timers_40002000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40002000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_P_interrupts {45, 0} -#define DT_N_S_soc_S_timers_40002000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_P_interrupts_IDX_0 45 -#define DT_N_S_soc_S_timers_40002000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_timers_40002000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names {"global"} -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_IDX_0 "global" -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_IDX_0_STRING_UNQUOTED global -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_IDX_0_STRING_TOKEN global -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000, interrupt_names, 0) -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000, interrupt_names, 0) -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000, interrupt_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000, interrupt_names, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_LEN 1 -#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40002000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40002000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40002000_P_zephyr_pm_device_runtime_auto_EXISTS 1 - -/* - * Devicetree node: /soc/timers@40002000/counter - * - * Node identifier: DT_N_S_soc_S_timers_40002000_S_counter - * - * Binding (compatible = st,stm32-counter): - * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_PATH "/soc/timers@40002000/counter" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_FULL_NAME "counter" -#define DT_N_S_soc_S_timers_40002000_S_counter_FULL_NAME_UNQUOTED counter -#define DT_N_S_soc_S_timers_40002000_S_counter_FULL_NAME_TOKEN counter -#define DT_N_S_soc_S_timers_40002000_S_counter_FULL_NAME_UPPER_TOKEN COUNTER - -/* Node parent (/soc/timers@40002000) identifier: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_PARENT DT_N_S_soc_S_timers_40002000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_CHILD_IDX 1 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_NODELABEL_NUM 0 -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_NODELABEL(fn) -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40002000) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40002000_S_counter_CHILD_NUM 0 -#define DT_N_S_soc_S_timers_40002000_S_counter_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_HASH zJvOaxLLjATz51CJNhv5ls0CmMiTKSdYQecKTBIOLLU - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_ORD 254 -#define DT_N_S_soc_S_timers_40002000_S_counter_ORD_STR_SORTABLE 00254 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_REQUIRES_ORDS \ - 253, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_SUPPORTS_ORDS - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_EXISTS 1 -#define DT_N_INST_8_st_stm32_counter DT_N_S_soc_S_timers_40002000_S_counter - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_REG_NUM 0 -#define DT_N_S_soc_S_timers_40002000_S_counter_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40002000_S_counter_IRQ_NUM 0 -#define DT_N_S_soc_S_timers_40002000_S_counter_IRQ_LEVEL 0 -#define DT_N_S_soc_S_timers_40002000_S_counter_COMPAT_MATCHES_st_stm32_counter 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40002000_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" -#define DT_N_S_soc_S_timers_40002000_S_counter_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status "disabled" -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000_S_counter, status, 0) -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000_S_counter, status, 0) -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000_S_counter, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000_S_counter, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible {"st,stm32-counter"} -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_IDX_0 "st,stm32-counter" -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000_S_counter, compatible, 0) -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000_S_counter, compatible, 0) -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000_S_counter, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000_S_counter, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40002000_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 - -/* - * Devicetree node: /soc/timers@40002000/pwm - * - * Node identifier: DT_N_S_soc_S_timers_40002000_S_pwm - * - * Binding (compatible = st,stm32-pwm): - * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_PATH "/soc/timers@40002000/pwm" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_FULL_NAME "pwm" -#define DT_N_S_soc_S_timers_40002000_S_pwm_FULL_NAME_UNQUOTED pwm -#define DT_N_S_soc_S_timers_40002000_S_pwm_FULL_NAME_TOKEN pwm -#define DT_N_S_soc_S_timers_40002000_S_pwm_FULL_NAME_UPPER_TOKEN PWM - -/* Node parent (/soc/timers@40002000) identifier: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_PARENT DT_N_S_soc_S_timers_40002000 - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_CHILD_IDX 0 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_NODELABEL_NUM 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_NODELABEL(fn) -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40002000) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_CHILD_NUM 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_HASH c6um8v5jI9Kwk4onLqCxe9XQjuDnMLyybl6AyMLjikc - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_ORD 255 -#define DT_N_S_soc_S_timers_40002000_S_pwm_ORD_STR_SORTABLE 00255 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_REQUIRES_ORDS \ - 253, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_SUPPORTS_ORDS - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_EXISTS 1 -#define DT_N_INST_8_st_stm32_pwm DT_N_S_soc_S_timers_40002000_S_pwm - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_REG_NUM 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40002000_S_pwm_IRQ_NUM 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_IRQ_LEVEL 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40002000_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" -#define DT_N_S_soc_S_timers_40002000_S_pwm_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_four_channel_capture_support 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_four_channel_capture_support_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status "disabled" -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000_S_pwm, status, 0) -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000_S_pwm, status, 0) -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000_S_pwm, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000_S_pwm, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible {"st,stm32-pwm"} -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000_S_pwm, compatible, 0) -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000_S_pwm, compatible, 0) -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000_S_pwm, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000_S_pwm, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40002000_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 - -/* - * Devicetree node: /soc/timers@40010000 - * - * Node identifier: DT_N_S_soc_S_timers_40010000 - * - * Binding (compatible = st,stm32-timers): - * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml - * - * (Descriptions have moved to the Devicetree Bindings Index - * in the documentation.) - */ - -/* Node's full path: */ -#define DT_N_S_soc_S_timers_40010000_PATH "/soc/timers@40010000" - -/* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40010000_FULL_NAME "timers@40010000" -#define DT_N_S_soc_S_timers_40010000_FULL_NAME_UNQUOTED timers@40010000 -#define DT_N_S_soc_S_timers_40010000_FULL_NAME_TOKEN timers_40010000 -#define DT_N_S_soc_S_timers_40010000_FULL_NAME_UPPER_TOKEN TIMERS_40010000 - -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_timers_40010000_PARENT DT_N_S_soc - -/* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40010000_CHILD_IDX 33 - -/* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40010000_NODELABEL_NUM 1 -#define DT_N_S_soc_S_timers_40010000_FOREACH_NODELABEL(fn) fn(timers1) -#define DT_N_S_soc_S_timers_40010000_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers1, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) - -/* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40010000_CHILD_NUM 1 -#define DT_N_S_soc_S_timers_40010000_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm) -#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm) -#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40010000_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) - -/* Node's hash: */ -#define DT_N_S_soc_S_timers_40010000_HASH wxcvRN_mA3ySgl7Qy6w43tAOklIzHZ0umwDnKMTErAk - -/* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010000_ORD 256 -#define DT_N_S_soc_S_timers_40010000_ORD_STR_SORTABLE 00256 - -/* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40010000_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 41, - -/* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40010000_SUPPORTS_ORDS \ - 257, - -/* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40010000_EXISTS 1 -#define DT_N_INST_0_st_stm32_timers DT_N_S_soc_S_timers_40010000 -#define DT_N_NODELABEL_timers1 DT_N_S_soc_S_timers_40010000 - -/* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40010000_REG_NUM 1 -#define DT_N_S_soc_S_timers_40010000_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_REG_IDX_0_VAL_ADDRESS 1073807360 -#define DT_N_S_soc_S_timers_40010000_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_timers_40010000_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40010000_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40010000_IRQ_NUM 4 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_irq 24 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_irq 25 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_irq 26 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_priority 0 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_irq 27 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_priority 0 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40010000_IRQ_LEVEL 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_brk_VAL_irq DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_brk_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_brk_VAL_priority DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_brk_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_brk_CONTROLLER DT_N_S_soc_S_timers_40010000_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_up_VAL_irq DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_irq -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_up_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_up_VAL_priority DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_VAL_priority -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_up_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_up_CONTROLLER DT_N_S_soc_S_timers_40010000_IRQ_IDX_1_CONTROLLER -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_trgcom_VAL_irq DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_irq -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_trgcom_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_trgcom_VAL_priority DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_VAL_priority -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_trgcom_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_trgcom_CONTROLLER DT_N_S_soc_S_timers_40010000_IRQ_IDX_2_CONTROLLER -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_cc_VAL_irq DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_irq -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_cc_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_cc_VAL_priority DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_VAL_priority -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_cc_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_IRQ_NAME_cc_CONTROLLER DT_N_S_soc_S_timers_40010000_IRQ_IDX_3_CONTROLLER -#define DT_N_S_soc_S_timers_40010000_COMPAT_MATCHES_st_stm32_timers 1 -#define DT_N_S_soc_S_timers_40010000_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40010000_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_COMPAT_MODEL_IDX_0 "stm32-timers" -#define DT_N_S_soc_S_timers_40010000_STATUS_disabled 1 - -/* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40010000_PINCTRL_NUM 0 - -/* Generic property macros: */ -#define DT_N_S_soc_S_timers_40010000_P_reg {1073807360, 1024} -#define DT_N_S_soc_S_timers_40010000_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_reg_IDX_0 1073807360 -#define DT_N_S_soc_S_timers_40010000_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_timers_40010000_P_reg_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_VAL_bus 240 -#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_VAL_bits 1 -#define DT_N_S_soc_S_timers_40010000_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000, clocks, 0) -#define DT_N_S_soc_S_timers_40010000_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000, clocks, 0) -#define DT_N_S_soc_S_timers_40010000_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_P_clocks_LEN 1 -#define DT_N_S_soc_S_timers_40010000_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_timers_40010000_P_resets_IDX_0_VAL_id 4864 -#define DT_N_S_soc_S_timers_40010000_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000, resets, 0) -#define DT_N_S_soc_S_timers_40010000_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000, resets, 0) -#define DT_N_S_soc_S_timers_40010000_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_P_resets_LEN 1 -#define DT_N_S_soc_S_timers_40010000_P_resets_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_st_prescaler 0 -#define DT_N_S_soc_S_timers_40010000_P_st_prescaler_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_st_countermode 0 -#define DT_N_S_soc_S_timers_40010000_P_st_countermode_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_status "disabled" -#define DT_N_S_soc_S_timers_40010000_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40010000_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40010000_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40010000_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40010000_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40010000_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000, status, 0) -#define DT_N_S_soc_S_timers_40010000_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000, status, 0) -#define DT_N_S_soc_S_timers_40010000_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40010000_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_compatible {"st,stm32-timers"} -#define DT_N_S_soc_S_timers_40010000_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_compatible_IDX_0 "st,stm32-timers" -#define DT_N_S_soc_S_timers_40010000_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers -#define DT_N_S_soc_S_timers_40010000_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers -#define DT_N_S_soc_S_timers_40010000_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS -#define DT_N_S_soc_S_timers_40010000_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000, compatible, 0) -#define DT_N_S_soc_S_timers_40010000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000, compatible, 0) -#define DT_N_S_soc_S_timers_40010000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40010000_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupts {24, 0, 25, 0, 26, 0, 27, 0} -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_0 24 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_2 25 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_4 26 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_5 0 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_6 27 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_IDX_7 0 -#define DT_N_S_soc_S_timers_40010000_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names {"brk", "up", "trgcom", "cc"} -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_0 "brk" -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_0_STRING_UNQUOTED brk -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_0_STRING_TOKEN brk -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN BRK -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_1 "up" -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_1_STRING_UNQUOTED up -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_1_STRING_TOKEN up -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN UP -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_2 "trgcom" -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_2_STRING_UNQUOTED trgcom -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_2_STRING_TOKEN trgcom -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN TRGCOM -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_3 "cc" -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_3_STRING_UNQUOTED cc -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_3_STRING_TOKEN cc -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN CC -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 0) \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 1) \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 2) \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 3) -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 3) -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 3, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010000, interrupt_names, 3, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_LEN 4 -#define DT_N_S_soc_S_timers_40010000_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40010000_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40010000_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40010000_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000, compatible, 0) +#define DT_N_S_soc_S_timers_40002000_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40002000_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_P_interrupts {45, 0} +#define DT_N_S_soc_S_timers_40002000_P_interrupts_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_P_interrupts_IDX_0 45 +#define DT_N_S_soc_S_timers_40002000_P_interrupts_IDX_1_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_P_interrupts_IDX_1 0 +#define DT_N_S_soc_S_timers_40002000_P_interrupts_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names {"global"} +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_IDX_0 "global" +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_IDX_0_STRING_UNQUOTED global +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_IDX_0_STRING_TOKEN global +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN GLOBAL +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000, interrupt_names, 0) +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000, interrupt_names, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_LEN 1 +#define DT_N_S_soc_S_timers_40002000_P_interrupt_names_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40002000_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40002000_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40002000_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/timers@40010000/pwm + * Devicetree node: /soc/timers@40002000/counter * - * Node identifier: DT_N_S_soc_S_timers_40010000_S_pwm + * Node identifier: DT_N_S_soc_S_timers_40002000_S_counter * - * Binding (compatible = st,stm32-pwm): - * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * Binding (compatible = st,stm32-counter): + * $ZEPHYR_BASE/dts/bindings/counter/st,stm32-counter.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_PATH "/soc/timers@40010000/pwm" +#define DT_N_S_soc_S_timers_40002000_S_counter_PATH "/soc/timers@40002000/counter" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_FULL_NAME "pwm" -#define DT_N_S_soc_S_timers_40010000_S_pwm_FULL_NAME_UNQUOTED pwm -#define DT_N_S_soc_S_timers_40010000_S_pwm_FULL_NAME_TOKEN pwm -#define DT_N_S_soc_S_timers_40010000_S_pwm_FULL_NAME_UPPER_TOKEN PWM +#define DT_N_S_soc_S_timers_40002000_S_counter_FULL_NAME "counter" +#define DT_N_S_soc_S_timers_40002000_S_counter_FULL_NAME_UNQUOTED counter +#define DT_N_S_soc_S_timers_40002000_S_counter_FULL_NAME_TOKEN counter +#define DT_N_S_soc_S_timers_40002000_S_counter_FULL_NAME_UPPER_TOKEN COUNTER -/* Node parent (/soc/timers@40010000) identifier: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_PARENT DT_N_S_soc_S_timers_40010000 +/* Node parent (/soc/timers@40002000) identifier: */ +#define DT_N_S_soc_S_timers_40002000_S_counter_PARENT DT_N_S_soc_S_timers_40002000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_CHILD_IDX 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_CHILD_IDX 1 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_NODELABEL_NUM 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_NODELABEL(fn) -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_timers_40002000_S_counter_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40002000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_CHILD_NUM 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40002000_S_counter_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_HASH Z55Ao8vxhtP2i2tfz7SNLkdCnBJdzyWWXJ_lALG31Pk +#define DT_N_S_soc_S_timers_40002000_S_counter_HASH zJvOaxLLjATz51CJNhv5ls0CmMiTKSdYQecKTBIOLLU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD 257 -#define DT_N_S_soc_S_timers_40010000_S_pwm_ORD_STR_SORTABLE 00257 +#define DT_N_S_soc_S_timers_40002000_S_counter_ORD 298 +#define DT_N_S_soc_S_timers_40002000_S_counter_ORD_STR_SORTABLE 00298 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_REQUIRES_ORDS \ - 256, +#define DT_N_S_soc_S_timers_40002000_S_counter_REQUIRES_ORDS \ + 297, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_SUPPORTS_ORDS +#define DT_N_S_soc_S_timers_40002000_S_counter_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_EXISTS 1 -#define DT_N_INST_0_st_stm32_pwm DT_N_S_soc_S_timers_40010000_S_pwm +#define DT_N_S_soc_S_timers_40002000_S_counter_EXISTS 1 +#define DT_N_INST_8_st_stm32_counter DT_N_S_soc_S_timers_40002000_S_counter /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_REG_NUM 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40010000_S_pwm_IRQ_NUM 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_IRQ_LEVEL 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40010000_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" -#define DT_N_S_soc_S_timers_40010000_S_pwm_STATUS_disabled 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_REG_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40002000_S_counter_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_COMPAT_MATCHES_st_stm32_counter 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40002000_S_counter_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_COMPAT_MODEL_IDX_0 "stm32-counter" +#define DT_N_S_soc_S_timers_40002000_S_counter_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_PINCTRL_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_four_channel_capture_support 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_four_channel_capture_support_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status "disabled" -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm, status, 0) -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm, status, 0) -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible {"st,stm32-pwm"} -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm, compatible, 0) -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm, compatible, 0) -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40010000_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status "disabled" +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000_S_counter, status, 0) +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000_S_counter, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible {"st,stm32-counter"} +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_IDX_0 "st,stm32-counter" +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-counter +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_IDX_0_STRING_TOKEN st_stm32_counter +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_COUNTER +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000_S_counter, compatible, 0) +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000_S_counter, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40002000_S_counter_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/timers@40010400 + * Devicetree node: /soc/timers@40002000/pwm * - * Node identifier: DT_N_S_soc_S_timers_40010400 + * Node identifier: DT_N_S_soc_S_timers_40002000_S_pwm * - * Binding (compatible = st,stm32-timers): - * $ZEPHYR_BASE/dts/bindings/timer/st,stm32-timers.yaml + * Binding (compatible = st,stm32-pwm): + * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_timers_40010400_PATH "/soc/timers@40010400" +#define DT_N_S_soc_S_timers_40002000_S_pwm_PATH "/soc/timers@40002000/pwm" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40010400_FULL_NAME "timers@40010400" -#define DT_N_S_soc_S_timers_40010400_FULL_NAME_UNQUOTED timers@40010400 -#define DT_N_S_soc_S_timers_40010400_FULL_NAME_TOKEN timers_40010400 -#define DT_N_S_soc_S_timers_40010400_FULL_NAME_UPPER_TOKEN TIMERS_40010400 +#define DT_N_S_soc_S_timers_40002000_S_pwm_FULL_NAME "pwm" +#define DT_N_S_soc_S_timers_40002000_S_pwm_FULL_NAME_UNQUOTED pwm +#define DT_N_S_soc_S_timers_40002000_S_pwm_FULL_NAME_TOKEN pwm +#define DT_N_S_soc_S_timers_40002000_S_pwm_FULL_NAME_UPPER_TOKEN PWM -/* Node parent (/soc) identifier: */ -#define DT_N_S_soc_S_timers_40010400_PARENT DT_N_S_soc +/* Node parent (/soc/timers@40002000) identifier: */ +#define DT_N_S_soc_S_timers_40002000_S_pwm_PARENT DT_N_S_soc_S_timers_40002000 /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40010400_CHILD_IDX 40 +#define DT_N_S_soc_S_timers_40002000_S_pwm_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40010400_NODELABEL_NUM 1 -#define DT_N_S_soc_S_timers_40010400_FOREACH_NODELABEL(fn) fn(timers8) -#define DT_N_S_soc_S_timers_40010400_FOREACH_NODELABEL_VARGS(fn, ...) fn(timers8, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_timers_40002000_S_pwm_NODELABEL_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_NODELABEL(fn) +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40002000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40010400_CHILD_NUM 1 -#define DT_N_S_soc_S_timers_40010400_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD(fn) fn(DT_N_S_soc_S_timers_40010400_S_pwm) -#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400_S_pwm) -#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40010400_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40002000_S_pwm_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_timers_40010400_HASH NPzXzIr4jFBRLlwwLLrw1OQABEA_j6hU6F_PLAZ5J4U +#define DT_N_S_soc_S_timers_40002000_S_pwm_HASH c6um8v5jI9Kwk4onLqCxe9XQjuDnMLyybl6AyMLjikc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010400_ORD 258 -#define DT_N_S_soc_S_timers_40010400_ORD_STR_SORTABLE 00258 +#define DT_N_S_soc_S_timers_40002000_S_pwm_ORD 299 +#define DT_N_S_soc_S_timers_40002000_S_pwm_ORD_STR_SORTABLE 00299 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40010400_REQUIRES_ORDS \ - 3, \ - 4, \ - 8, \ - 41, +#define DT_N_S_soc_S_timers_40002000_S_pwm_REQUIRES_ORDS \ + 297, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40010400_SUPPORTS_ORDS \ - 259, +#define DT_N_S_soc_S_timers_40002000_S_pwm_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40010400_EXISTS 1 -#define DT_N_INST_7_st_stm32_timers DT_N_S_soc_S_timers_40010400 -#define DT_N_NODELABEL_timers8 DT_N_S_soc_S_timers_40010400 +#define DT_N_S_soc_S_timers_40002000_S_pwm_EXISTS 1 +#define DT_N_INST_8_st_stm32_pwm DT_N_S_soc_S_timers_40002000_S_pwm /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40010400_REG_NUM 1 -#define DT_N_S_soc_S_timers_40010400_REG_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_REG_IDX_0_VAL_ADDRESS 1073808384 -#define DT_N_S_soc_S_timers_40010400_REG_IDX_0_VAL_SIZE 1024 -#define DT_N_S_soc_S_timers_40010400_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40010400_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40010400_IRQ_NUM 4 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_irq 43 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_priority 0 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_irq 44 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_priority 0 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_irq 45 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_priority 0 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_irq 46 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_priority 0 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_CONTROLLER DT_N_S_soc_S_interrupt_controller_e000e100 -#define DT_N_S_soc_S_timers_40010400_IRQ_LEVEL 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_brk_VAL_irq DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_irq -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_brk_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_brk_VAL_priority DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_VAL_priority -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_brk_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_brk_CONTROLLER DT_N_S_soc_S_timers_40010400_IRQ_IDX_0_CONTROLLER -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_up_VAL_irq DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_irq -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_up_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_up_VAL_priority DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_VAL_priority -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_up_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_up_CONTROLLER DT_N_S_soc_S_timers_40010400_IRQ_IDX_1_CONTROLLER -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_trgcom_VAL_irq DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_irq -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_trgcom_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_trgcom_VAL_priority DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_VAL_priority -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_trgcom_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_trgcom_CONTROLLER DT_N_S_soc_S_timers_40010400_IRQ_IDX_2_CONTROLLER -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_cc_VAL_irq DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_irq -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_cc_VAL_irq_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_cc_VAL_priority DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_VAL_priority -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_cc_VAL_priority_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_IRQ_NAME_cc_CONTROLLER DT_N_S_soc_S_timers_40010400_IRQ_IDX_3_CONTROLLER -#define DT_N_S_soc_S_timers_40010400_COMPAT_MATCHES_st_stm32_timers 1 -#define DT_N_S_soc_S_timers_40010400_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40010400_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_COMPAT_MODEL_IDX_0 "stm32-timers" -#define DT_N_S_soc_S_timers_40010400_STATUS_disabled 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_REG_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40002000_S_pwm_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" +#define DT_N_S_soc_S_timers_40002000_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" +#define DT_N_S_soc_S_timers_40002000_S_pwm_STATUS_disabled 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40010400_PINCTRL_NUM 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_timers_40010400_P_reg {1073808384, 1024} -#define DT_N_S_soc_S_timers_40010400_P_reg_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_reg_IDX_0 1073808384 -#define DT_N_S_soc_S_timers_40010400_P_reg_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_reg_IDX_1 1024 -#define DT_N_S_soc_S_timers_40010400_P_reg_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_PH DT_N_S_soc_S_rcc_58024400 -#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_VAL_bus 240 -#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_VAL_bus_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_VAL_bits 2 -#define DT_N_S_soc_S_timers_40010400_P_clocks_IDX_0_VAL_bits_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_clocks_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400, clocks, 0) -#define DT_N_S_soc_S_timers_40010400_P_clocks_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400, clocks, 0) -#define DT_N_S_soc_S_timers_40010400_P_clocks_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_P_clocks_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400, clocks, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_P_clocks_LEN 1 -#define DT_N_S_soc_S_timers_40010400_P_clocks_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_resets_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_resets_IDX_0_PH DT_N_S_soc_S_rcc_58024400_S_reset_controller -#define DT_N_S_soc_S_timers_40010400_P_resets_IDX_0_VAL_id 4865 -#define DT_N_S_soc_S_timers_40010400_P_resets_IDX_0_VAL_id_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_resets_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400, resets, 0) -#define DT_N_S_soc_S_timers_40010400_P_resets_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400, resets, 0) -#define DT_N_S_soc_S_timers_40010400_P_resets_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_P_resets_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400, resets, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_P_resets_LEN 1 -#define DT_N_S_soc_S_timers_40010400_P_resets_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_st_prescaler 0 -#define DT_N_S_soc_S_timers_40010400_P_st_prescaler_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_st_countermode 0 -#define DT_N_S_soc_S_timers_40010400_P_st_countermode_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_status "disabled" -#define DT_N_S_soc_S_timers_40010400_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40010400_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40010400_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40010400_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40010400_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40010400_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400, status, 0) -#define DT_N_S_soc_S_timers_40010400_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400, status, 0) -#define DT_N_S_soc_S_timers_40010400_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40010400_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_compatible {"st,stm32-timers"} -#define DT_N_S_soc_S_timers_40010400_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_compatible_IDX_0 "st,stm32-timers" -#define DT_N_S_soc_S_timers_40010400_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-timers -#define DT_N_S_soc_S_timers_40010400_P_compatible_IDX_0_STRING_TOKEN st_stm32_timers -#define DT_N_S_soc_S_timers_40010400_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_TIMERS -#define DT_N_S_soc_S_timers_40010400_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400, compatible, 0) -#define DT_N_S_soc_S_timers_40010400_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400, compatible, 0) -#define DT_N_S_soc_S_timers_40010400_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40010400_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupts {43, 0, 44, 0, 45, 0, 46, 0} -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_0 43 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_1 0 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_2 44 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_3 0 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_4_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_4 45 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_5_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_5 0 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_6_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_6 46 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_7_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_IDX_7 0 -#define DT_N_S_soc_S_timers_40010400_P_interrupts_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names {"brk", "up", "trgcom", "cc"} -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_0 "brk" -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_0_STRING_UNQUOTED brk -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_0_STRING_TOKEN brk -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_0_STRING_UPPER_TOKEN BRK -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_1_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_1 "up" -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_1_STRING_UNQUOTED up -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_1_STRING_TOKEN up -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_1_STRING_UPPER_TOKEN UP -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_2_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_2 "trgcom" -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_2_STRING_UNQUOTED trgcom -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_2_STRING_TOKEN trgcom -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_2_STRING_UPPER_TOKEN TRGCOM -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_3_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_3 "cc" -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_3_STRING_UNQUOTED cc -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_3_STRING_TOKEN cc -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_IDX_3_STRING_UPPER_TOKEN CC -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 0) \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 1) \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 2) \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 3) -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 0) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 1) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 2) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 3) -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 0, __VA_ARGS__) \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 1, __VA_ARGS__) \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 2, __VA_ARGS__) \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 3, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 0, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 1, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 2, __VA_ARGS__) DT_DEBRACKET_INTERNAL sep \ - fn(DT_N_S_soc_S_timers_40010400, interrupt_names, 3, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_LEN 4 -#define DT_N_S_soc_S_timers_40010400_P_interrupt_names_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40010400_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40010400_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40010400_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_four_channel_capture_support 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_four_channel_capture_support_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status "disabled" +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_STRING_UNQUOTED disabled +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_STRING_TOKEN disabled +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_IDX_0 "disabled" +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_IDX_0_ENUM_IDX 2 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000_S_pwm, status, 0) +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000_S_pwm, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible {"st,stm32-pwm"} +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40002000_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40002000_S_pwm, compatible, 0) +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40002000_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40002000_S_pwm, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40002000_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* - * Devicetree node: /soc/timers@40010400/pwm + * Devicetree node: /soc/timers@40010000/pwm/pwmclock * - * Node identifier: DT_N_S_soc_S_timers_40010400_S_pwm + * Node identifier: DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock * - * Binding (compatible = st,stm32-pwm): - * $ZEPHYR_BASE/dts/bindings/pwm/st,stm32-pwm.yaml + * Binding (compatible = pwm-clock): + * $ZEPHYR_BASE/dts/bindings/clock/pwm-clock.yaml * * (Descriptions have moved to the Devicetree Bindings Index * in the documentation.) */ /* Node's full path: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_PATH "/soc/timers@40010400/pwm" +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_PATH "/soc/timers@40010000/pwm/pwmclock" /* Node's name with unit-address: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_FULL_NAME "pwm" -#define DT_N_S_soc_S_timers_40010400_S_pwm_FULL_NAME_UNQUOTED pwm -#define DT_N_S_soc_S_timers_40010400_S_pwm_FULL_NAME_TOKEN pwm -#define DT_N_S_soc_S_timers_40010400_S_pwm_FULL_NAME_UPPER_TOKEN PWM +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FULL_NAME "pwmclock" +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FULL_NAME_UNQUOTED pwmclock +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FULL_NAME_TOKEN pwmclock +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FULL_NAME_UPPER_TOKEN PWMCLOCK -/* Node parent (/soc/timers@40010400) identifier: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_PARENT DT_N_S_soc_S_timers_40010400 +/* Node parent (/soc/timers@40010000/pwm) identifier: */ +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_PARENT DT_N_S_soc_S_timers_40010000_S_pwm /* Node's index in its parent's list of children: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_CHILD_IDX 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_CHILD_IDX 0 /* Helpers for dealing with node labels: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_NODELABEL_NUM 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_NODELABEL(fn) -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_NODELABEL_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40010400) fn(DT_N_S_soc) fn(DT_N) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_NODELABEL_NUM 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_NODELABEL(fn) fn(pwmclock) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_NODELABEL_VARGS(fn, ...) fn(pwmclock, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_ANCESTOR(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc) fn(DT_N) /* Helper macros for child nodes of this node. */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_CHILD_NUM 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_CHILD_NUM_STATUS_OKAY 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD(fn) -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_STATUS_OKAY(fn) -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_CHILD_NUM 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_CHILD_NUM_STATUS_OKAY 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_CHILD(fn) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_CHILD_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_CHILD_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_CHILD_SEP_VARGS(fn, sep, ...) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_CHILD_STATUS_OKAY(fn) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_CHILD_STATUS_OKAY_SEP(fn, sep) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_CHILD_STATUS_OKAY_VARGS(fn, ...) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_CHILD_STATUS_OKAY_SEP_VARGS(fn, sep, ...) /* Node's hash: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_HASH eluEMoLASiCnBNpjXGb0gqHlmoRtkjfjgbVEXs4QAVA +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_HASH s_r8lUm3JdUtOrGLUyk3zAYV2gx8t2fIwcx3DspjzjU /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD 259 -#define DT_N_S_soc_S_timers_40010400_S_pwm_ORD_STR_SORTABLE 00259 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_ORD 300 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_ORD_STR_SORTABLE 00300 /* Ordinals for what this node depends on directly: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_REQUIRES_ORDS \ - 258, +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_REQUIRES_ORDS \ + 82, /* Ordinals for what depends directly on this node: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_SUPPORTS_ORDS +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_SUPPORTS_ORDS /* Existence and alternate IDs: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_EXISTS 1 -#define DT_N_INST_5_st_stm32_pwm DT_N_S_soc_S_timers_40010400_S_pwm +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_EXISTS 1 +#define DT_N_INST_0_pwm_clock DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock +#define DT_N_NODELABEL_pwmclock DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock /* Macros for properties that are special in the specification: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_REG_NUM 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_RANGES_NUM 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_FOREACH_RANGE(fn) -#define DT_N_S_soc_S_timers_40010400_S_pwm_IRQ_NUM 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_IRQ_LEVEL 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_COMPAT_MATCHES_st_stm32_pwm 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_COMPAT_VENDOR_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_COMPAT_VENDOR_IDX_0 "STMicroelectronics" -#define DT_N_S_soc_S_timers_40010400_S_pwm_COMPAT_MODEL_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_COMPAT_MODEL_IDX_0 "stm32-pwm" -#define DT_N_S_soc_S_timers_40010400_S_pwm_STATUS_disabled 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_REG_NUM 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_RANGES_NUM 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_FOREACH_RANGE(fn) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_IRQ_NUM 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_IRQ_LEVEL 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_COMPAT_MATCHES_pwm_clock 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_STATUS_okay 1 /* Pin control (pinctrl-, pinctrl-names) properties: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_PINCTRL_NUM 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_PINCTRL_NUM 0 /* Generic property macros: */ -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_four_channel_capture_support 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_four_channel_capture_support_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status "disabled" -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_STRING_UNQUOTED disabled -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_STRING_TOKEN disabled -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_STRING_UPPER_TOKEN DISABLED -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_IDX_0 "disabled" -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_IDX_0_ENUM_IDX 2 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_IDX_0_ENUM_VAL_disabled_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400_S_pwm, status, 0) -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400_S_pwm, status, 0) -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, status, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_LEN 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_status_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible {"st,stm32-pwm"} -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_IDX_0_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_IDX_0 "st,stm32-pwm" -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_IDX_0_STRING_UNQUOTED st,stm32-pwm -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_IDX_0_STRING_TOKEN st_stm32_pwm -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_IDX_0_STRING_UPPER_TOKEN ST_STM32_PWM -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010400_S_pwm, compatible, 0) -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010400_S_pwm, compatible, 0) -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010400_S_pwm, compatible, 0, __VA_ARGS__) -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_LEN 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_compatible_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_zephyr_deferred_init 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_zephyr_deferred_init_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_wakeup_source 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_wakeup_source_EXISTS 1 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_zephyr_pm_device_runtime_auto 0 -#define DT_N_S_soc_S_timers_40010400_S_pwm_P_zephyr_pm_device_runtime_auto_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_IDX_0_PH DT_N_S_soc_S_timers_40010000_S_pwm +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_IDX_0_VAL_channel 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_IDX_0_VAL_channel_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_IDX_0_VAL_period 83 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_IDX_0_VAL_period_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_IDX_0_VAL_flags 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_IDX_0_VAL_flags_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, pwms, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, pwms, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, pwms, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, pwms, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_LEN 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwms_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_clock_frequency 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_clock_frequency_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwm_on_delay 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_pwm_on_delay_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status "okay" +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_STRING_UNQUOTED okay +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_STRING_TOKEN okay +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_STRING_UPPER_TOKEN OKAY +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_IDX_0 "okay" +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_IDX_0_ENUM_IDX 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_IDX_0_ENUM_VAL_okay_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, status, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, status, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, status, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_LEN 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_status_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible {"pwm-clock"} +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_IDX_0_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_IDX_0 "pwm-clock" +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_IDX_0_STRING_UNQUOTED pwm-clock +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_IDX_0_STRING_TOKEN pwm_clock +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_IDX_0_STRING_UPPER_TOKEN PWM_CLOCK +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_FOREACH_PROP_ELEM(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, compatible, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_FOREACH_PROP_ELEM_SEP(fn, sep) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, compatible, 0) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_FOREACH_PROP_ELEM_VARGS(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_FOREACH_PROP_ELEM_SEP_VARGS(fn, sep, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, compatible, 0, __VA_ARGS__) +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_LEN 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_compatible_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_zephyr_deferred_init 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_zephyr_deferred_init_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_wakeup_source 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_wakeup_source_EXISTS 1 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_zephyr_pm_device_runtime_auto 0 +#define DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock_P_zephyr_pm_device_runtime_auto_EXISTS 1 /* * Devicetree node: /soc/timers@40014000 @@ -37231,20 +43183,20 @@ #define DT_N_S_soc_S_timers_40014000_HASH lq5p3vgPpp0Pc1e97jH3shzpysrGZocBMMy1grfenUs /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014000_ORD 260 -#define DT_N_S_soc_S_timers_40014000_ORD_STR_SORTABLE 00260 +#define DT_N_S_soc_S_timers_40014000_ORD 301 +#define DT_N_S_soc_S_timers_40014000_ORD_STR_SORTABLE 00301 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014000_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014000_SUPPORTS_ORDS \ - 261, \ - 262, + 302, \ + 303, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40014000_EXISTS 1 @@ -37415,12 +43367,12 @@ #define DT_N_S_soc_S_timers_40014000_S_counter_HASH HTxmpxrEMdGrjqKzwYEQ3Db8lHf9V4eSc5b5awosPW0 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014000_S_counter_ORD 261 -#define DT_N_S_soc_S_timers_40014000_S_counter_ORD_STR_SORTABLE 00261 +#define DT_N_S_soc_S_timers_40014000_S_counter_ORD 302 +#define DT_N_S_soc_S_timers_40014000_S_counter_ORD_STR_SORTABLE 00302 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014000_S_counter_REQUIRES_ORDS \ - 260, + 301, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014000_S_counter_SUPPORTS_ORDS @@ -37528,12 +43480,12 @@ #define DT_N_S_soc_S_timers_40014000_S_pwm_HASH kSLo0yu1rvkKjWd1KPNaOZTkLqT1fXRh8ItGZQcov88 /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014000_S_pwm_ORD 262 -#define DT_N_S_soc_S_timers_40014000_S_pwm_ORD_STR_SORTABLE 00262 +#define DT_N_S_soc_S_timers_40014000_S_pwm_ORD 303 +#define DT_N_S_soc_S_timers_40014000_S_pwm_ORD_STR_SORTABLE 00303 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014000_S_pwm_REQUIRES_ORDS \ - 260, + 301, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014000_S_pwm_SUPPORTS_ORDS @@ -37643,20 +43595,20 @@ #define DT_N_S_soc_S_timers_40014400_HASH LhbzUUvofdpe9RJBdWKw1tw8MqV4XObGHJe29iNM0Lc /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014400_ORD 263 -#define DT_N_S_soc_S_timers_40014400_ORD_STR_SORTABLE 00263 +#define DT_N_S_soc_S_timers_40014400_ORD 304 +#define DT_N_S_soc_S_timers_40014400_ORD_STR_SORTABLE 00304 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014400_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014400_SUPPORTS_ORDS \ - 264, \ - 265, + 305, \ + 306, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40014400_EXISTS 1 @@ -37827,12 +43779,12 @@ #define DT_N_S_soc_S_timers_40014400_S_counter_HASH p37X7wit0iPn8X9v8y4Gj2t07AN6oeaaeHeLb6OojSE /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014400_S_counter_ORD 264 -#define DT_N_S_soc_S_timers_40014400_S_counter_ORD_STR_SORTABLE 00264 +#define DT_N_S_soc_S_timers_40014400_S_counter_ORD 305 +#define DT_N_S_soc_S_timers_40014400_S_counter_ORD_STR_SORTABLE 00305 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014400_S_counter_REQUIRES_ORDS \ - 263, + 304, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014400_S_counter_SUPPORTS_ORDS @@ -37940,12 +43892,12 @@ #define DT_N_S_soc_S_timers_40014400_S_pwm_HASH qSncIfFrKmBeFCfySGntGi5dvRM62NXtfq0Z60Th_Tw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014400_S_pwm_ORD 265 -#define DT_N_S_soc_S_timers_40014400_S_pwm_ORD_STR_SORTABLE 00265 +#define DT_N_S_soc_S_timers_40014400_S_pwm_ORD 306 +#define DT_N_S_soc_S_timers_40014400_S_pwm_ORD_STR_SORTABLE 00306 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014400_S_pwm_REQUIRES_ORDS \ - 263, + 304, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014400_S_pwm_SUPPORTS_ORDS @@ -38055,20 +44007,20 @@ #define DT_N_S_soc_S_timers_40014800_HASH HFfK32JNDgTzZmhucfswXs63t4LSBAvBFi__WAnpexw /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014800_ORD 266 -#define DT_N_S_soc_S_timers_40014800_ORD_STR_SORTABLE 00266 +#define DT_N_S_soc_S_timers_40014800_ORD 307 +#define DT_N_S_soc_S_timers_40014800_ORD_STR_SORTABLE 00307 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014800_REQUIRES_ORDS \ 3, \ 4, \ 8, \ - 41, + 51, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014800_SUPPORTS_ORDS \ - 267, \ - 268, + 308, \ + 309, /* Existence and alternate IDs: */ #define DT_N_S_soc_S_timers_40014800_EXISTS 1 @@ -38239,12 +44191,12 @@ #define DT_N_S_soc_S_timers_40014800_S_counter_HASH S6y2pTOmJHjQSdFjECAm7CIldgBp6UkB1xRx45LXe9E /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014800_S_counter_ORD 267 -#define DT_N_S_soc_S_timers_40014800_S_counter_ORD_STR_SORTABLE 00267 +#define DT_N_S_soc_S_timers_40014800_S_counter_ORD 308 +#define DT_N_S_soc_S_timers_40014800_S_counter_ORD_STR_SORTABLE 00308 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014800_S_counter_REQUIRES_ORDS \ - 266, + 307, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014800_S_counter_SUPPORTS_ORDS @@ -38352,12 +44304,12 @@ #define DT_N_S_soc_S_timers_40014800_S_pwm_HASH pP_vpmBmH6Uc99dxi1iL0vcGxl00Y6rTzAdbQLvVodY /* Node's dependency ordinal: */ -#define DT_N_S_soc_S_timers_40014800_S_pwm_ORD 268 -#define DT_N_S_soc_S_timers_40014800_S_pwm_ORD_STR_SORTABLE 00268 +#define DT_N_S_soc_S_timers_40014800_S_pwm_ORD 309 +#define DT_N_S_soc_S_timers_40014800_S_pwm_ORD_STR_SORTABLE 00309 /* Ordinals for what this node depends on directly: */ #define DT_N_S_soc_S_timers_40014800_S_pwm_REQUIRES_ORDS \ - 266, + 307, /* Ordinals for what depends directly on this node: */ #define DT_N_S_soc_S_timers_40014800_S_pwm_SUPPORTS_ORDS @@ -38443,14 +44395,16 @@ #define DT_CHOSEN_zephyr_code_partition_EXISTS 1 #define DT_CHOSEN_zephyr_bt_hci DT_N_S_soc_S_serial_40007800_S_bt_hci_uart #define DT_CHOSEN_zephyr_bt_hci_EXISTS 1 +#define DT_CHOSEN_zephyr_camera DT_N_S_soc_S_dcmi_48020000 +#define DT_CHOSEN_zephyr_camera_EXISTS 1 #define DT_CHOSEN_zephyr_cdc_acm_uart0 DT_N_S_soc_S_serial_40011400 #define DT_CHOSEN_zephyr_cdc_acm_uart0_EXISTS 1 /* Macros for iterating over all nodes and enabled nodes */ -#define DT_FOREACH_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) fn(DT_N_S_soc_S_watchdog_58004800) fn(DT_N_S_soc_S_watchdog_50003000) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004400) fn(DT_N_S_soc_S_serial_40004800) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40005000) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx) fn(DT_N_S_soc_S_serial_40007c00) fn(DT_N_S_soc_S_serial_58000c00) fn(DT_N_S_soc_S_rtc_58004000) fn(DT_N_S_soc_S_rtc_58004000_S_backup_regs) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger) fn(DT_N_S_soc_S_i2c_40005800) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) fn(DT_N_S_soc_S_spi_40013400) fn(DT_N_S_soc_S_spi_40015000) fn(DT_N_S_soc_S_spi_58001400) fn(DT_N_S_soc_S_i2s_40013000) fn(DT_N_S_soc_S_i2s_40003800) fn(DT_N_S_soc_S_i2s_40003c00) fn(DT_N_S_soc_S_can_4000a000) fn(DT_N_S_soc_S_can_4000a400) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc_S_timers_40010000_S_pwm) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc_S_timers_40000000_S_pwm) fn(DT_N_S_soc_S_timers_40000000_S_counter) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc_S_timers_40000400_S_pwm) fn(DT_N_S_soc_S_timers_40000400_S_counter) fn(DT_N_S_soc_S_timers_40000800) fn(DT_N_S_soc_S_timers_40000800_S_pwm) fn(DT_N_S_soc_S_timers_40000800_S_counter) fn(DT_N_S_soc_S_timers_40000c00) fn(DT_N_S_soc_S_timers_40000c00_S_pwm) fn(DT_N_S_soc_S_timers_40000c00_S_counter) fn(DT_N_S_soc_S_timers_40001000) fn(DT_N_S_soc_S_timers_40001000_S_counter) fn(DT_N_S_soc_S_timers_40001400) fn(DT_N_S_soc_S_timers_40001400_S_counter) fn(DT_N_S_soc_S_timers_40010400) fn(DT_N_S_soc_S_timers_40010400_S_pwm) fn(DT_N_S_soc_S_timers_40001800) fn(DT_N_S_soc_S_timers_40001800_S_pwm) fn(DT_N_S_soc_S_timers_40001800_S_counter) fn(DT_N_S_soc_S_timers_40001c00) fn(DT_N_S_soc_S_timers_40001c00_S_pwm) fn(DT_N_S_soc_S_timers_40001c00_S_counter) fn(DT_N_S_soc_S_timers_40002000) fn(DT_N_S_soc_S_timers_40002000_S_pwm) fn(DT_N_S_soc_S_timers_40002000_S_counter) fn(DT_N_S_soc_S_timers_40014000) fn(DT_N_S_soc_S_timers_40014000_S_pwm) fn(DT_N_S_soc_S_timers_40014000_S_counter) fn(DT_N_S_soc_S_timers_40014400) fn(DT_N_S_soc_S_timers_40014400_S_pwm) fn(DT_N_S_soc_S_timers_40014400_S_counter) fn(DT_N_S_soc_S_timers_40014800) fn(DT_N_S_soc_S_timers_40014800_S_pwm) fn(DT_N_S_soc_S_timers_40014800_S_counter) fn(DT_N_S_soc_S_timers_40002400) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc_S_adc_40022100) fn(DT_N_S_soc_S_adc_40022300) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc_S_dac_40007400) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dma_40020400) fn(DT_N_S_soc_S_bdma_58025400) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_dmamux_58025800) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_sdmmc_52007000) fn(DT_N_S_soc_S_sdmmc_48022400) fn(DT_N_S_soc_S_ethernet_40028000) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) fn(DT_N_S_soc_S_memory_38800000) fn(DT_N_S_soc_S_spi_52005000) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_display_controller_50001000) fn(DT_N_S_soc_S_usb_40040000) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) fn(DT_N_S_soc_S_usb_40080000) fn(DT_N_S_soc_S_dsihost_50000000) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_csi) fn(DT_N_S_clocks_S_clk_lse) fn(DT_N_S_clocks_S_clk_lsi) fn(DT_N_S_clocks_S_pll_0) fn(DT_N_S_clocks_S_pll_1) fn(DT_N_S_clocks_S_pll_2) fn(DT_N_S_clocks_S_perck) fn(DT_N_S_mcos) fn(DT_N_S_mcos_S_mco1) fn(DT_N_S_mcos_S_mco2) fn(DT_N_S_dietemp) fn(DT_N_S_vbat) fn(DT_N_S_vref) fn(DT_N_S_smbus1) fn(DT_N_S_smbus2) fn(DT_N_S_smbus3) fn(DT_N_S_smbus4) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_otghs_ulpis_phy) fn(DT_N_S_oscen) fn(DT_N_S_ethernet_phy_en) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_zephyr_user) -#define DT_FOREACH_OKAY_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx) fn(DT_N_S_soc_S_rtc_58004000) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_ethernet_40028000) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) fn(DT_N_S_soc_S_spi_52005000) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_usb_40040000) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_lsi) fn(DT_N_S_clocks_S_pll_0) fn(DT_N_S_mcos) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_otghs_ulpis_phy) fn(DT_N_S_oscen) fn(DT_N_S_ethernet_phy_en) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_zephyr_user) -#define DT_FOREACH_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_58004800, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40005000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_58000c00, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000_S_backup_regs, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013400, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_58001400, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002400, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022100, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022300, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) fn(DT_N_S_soc_S_dac_40007400, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020400, __VA_ARGS__) fn(DT_N_S_soc_S_bdma_58025400, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_58025800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_sdmmc_52007000, __VA_ARGS__) fn(DT_N_S_soc_S_sdmmc_48022400, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) fn(DT_N_S_soc_S_memory_38800000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_display_controller_50001000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000, __VA_ARGS__) fn(DT_N_S_soc_S_dsihost_50000000, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_csi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_0, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_1, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_2, __VA_ARGS__) fn(DT_N_S_clocks_S_perck, __VA_ARGS__) fn(DT_N_S_mcos, __VA_ARGS__) fn(DT_N_S_mcos_S_mco1, __VA_ARGS__) fn(DT_N_S_mcos_S_mco2, __VA_ARGS__) fn(DT_N_S_dietemp, __VA_ARGS__) fn(DT_N_S_vbat, __VA_ARGS__) fn(DT_N_S_vref, __VA_ARGS__) fn(DT_N_S_smbus1, __VA_ARGS__) fn(DT_N_S_smbus2, __VA_ARGS__) fn(DT_N_S_smbus3, __VA_ARGS__) fn(DT_N_S_smbus4, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) fn(DT_N_S_oscen, __VA_ARGS__) fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) -#define DT_FOREACH_OKAY_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_nss_pi0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_0, __VA_ARGS__) fn(DT_N_S_mcos, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) fn(DT_N_S_oscen, __VA_ARGS__) fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) +#define DT_FOREACH_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) fn(DT_N_S_soc_S_watchdog_58004800) fn(DT_N_S_soc_S_watchdog_50003000) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004400) fn(DT_N_S_soc_S_serial_40004800) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40005000) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx) fn(DT_N_S_soc_S_serial_40007c00) fn(DT_N_S_soc_S_serial_58000c00) fn(DT_N_S_soc_S_rtc_58004000) fn(DT_N_S_soc_S_rtc_58004000_S_backup_regs) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger) fn(DT_N_S_soc_S_i2c_40005800) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_spi_40013000) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_spi_40003c00) fn(DT_N_S_soc_S_spi_40013400) fn(DT_N_S_soc_S_spi_40015000) fn(DT_N_S_soc_S_spi_58001400) fn(DT_N_S_soc_S_i2s_40013000) fn(DT_N_S_soc_S_i2s_40003800) fn(DT_N_S_soc_S_i2s_40003c00) fn(DT_N_S_soc_S_can_4000a000) fn(DT_N_S_soc_S_can_4000a400) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc_S_timers_40010000_S_pwm) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) fn(DT_N_S_soc_S_timers_40000000) fn(DT_N_S_soc_S_timers_40000000_S_pwm) fn(DT_N_S_soc_S_timers_40000000_S_counter) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc_S_timers_40000400_S_pwm) fn(DT_N_S_soc_S_timers_40000400_S_counter) fn(DT_N_S_soc_S_timers_40000800) fn(DT_N_S_soc_S_timers_40000800_S_pwm) fn(DT_N_S_soc_S_timers_40000800_S_counter) fn(DT_N_S_soc_S_timers_40000c00) fn(DT_N_S_soc_S_timers_40000c00_S_pwm) fn(DT_N_S_soc_S_timers_40000c00_S_counter) fn(DT_N_S_soc_S_timers_40001000) fn(DT_N_S_soc_S_timers_40001000_S_counter) fn(DT_N_S_soc_S_timers_40001400) fn(DT_N_S_soc_S_timers_40001400_S_counter) fn(DT_N_S_soc_S_timers_40010400) fn(DT_N_S_soc_S_timers_40010400_S_pwm) fn(DT_N_S_soc_S_timers_40001800) fn(DT_N_S_soc_S_timers_40001800_S_pwm) fn(DT_N_S_soc_S_timers_40001800_S_counter) fn(DT_N_S_soc_S_timers_40001c00) fn(DT_N_S_soc_S_timers_40001c00_S_pwm) fn(DT_N_S_soc_S_timers_40001c00_S_counter) fn(DT_N_S_soc_S_timers_40002000) fn(DT_N_S_soc_S_timers_40002000_S_pwm) fn(DT_N_S_soc_S_timers_40002000_S_counter) fn(DT_N_S_soc_S_timers_40014000) fn(DT_N_S_soc_S_timers_40014000_S_pwm) fn(DT_N_S_soc_S_timers_40014000_S_counter) fn(DT_N_S_soc_S_timers_40014400) fn(DT_N_S_soc_S_timers_40014400_S_pwm) fn(DT_N_S_soc_S_timers_40014400_S_counter) fn(DT_N_S_soc_S_timers_40014800) fn(DT_N_S_soc_S_timers_40014800_S_pwm) fn(DT_N_S_soc_S_timers_40014800_S_counter) fn(DT_N_S_soc_S_timers_40002400) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc_S_adc_40022000_S_channel_c) fn(DT_N_S_soc_S_adc_40022000_S_channel_d) fn(DT_N_S_soc_S_adc_40022000_S_channel_12) fn(DT_N_S_soc_S_adc_40022000_S_channel_3) fn(DT_N_S_soc_S_adc_40022000_S_channel_0) fn(DT_N_S_soc_S_adc_40022000_S_channel_1) fn(DT_N_S_soc_S_adc_40022100) fn(DT_N_S_soc_S_adc_40022300) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc_S_adc_58026000_S_channel_0) fn(DT_N_S_soc_S_adc_58026000_S_channel_1) fn(DT_N_S_soc_S_dac_40007400) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dma_40020400) fn(DT_N_S_soc_S_bdma_58025400) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_dmamux_58025800) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_sdmmc_52007000) fn(DT_N_S_soc_S_sdmmc_48022400) fn(DT_N_S_soc_S_ethernet_40028000) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) fn(DT_N_S_soc_S_memory_38800000) fn(DT_N_S_soc_S_spi_52005000) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc_S_dcmi_48020000_S_port) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_display_controller_50001000) fn(DT_N_S_soc_S_usb_40040000) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) fn(DT_N_S_soc_S_usb_40080000) fn(DT_N_S_soc_S_dsihost_50000000) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_csi) fn(DT_N_S_clocks_S_clk_lse) fn(DT_N_S_clocks_S_clk_lsi) fn(DT_N_S_clocks_S_pll_0) fn(DT_N_S_clocks_S_pll_1) fn(DT_N_S_clocks_S_pll_2) fn(DT_N_S_clocks_S_perck) fn(DT_N_S_mcos) fn(DT_N_S_mcos_S_mco1) fn(DT_N_S_mcos_S_mco2) fn(DT_N_S_dietemp) fn(DT_N_S_vbat) fn(DT_N_S_vref) fn(DT_N_S_smbus1) fn(DT_N_S_smbus2) fn(DT_N_S_smbus3) fn(DT_N_S_smbus4) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_otghs_ulpis_phy) fn(DT_N_S_oscen) fn(DT_N_S_ethernet_phy_en) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_gpio_deadbeef) fn(DT_N_S_zephyr_user) +#define DT_FOREACH_OKAY_HELPER(fn) fn(DT_N) fn(DT_N_S_chosen) fn(DT_N_S_aliases) fn(DT_N_S_soc) fn(DT_N_S_soc_S_interrupt_controller_e000e100) fn(DT_N_S_soc_S_timer_e000e010) fn(DT_N_S_soc_S_flash_controller_52002000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000) fn(DT_N_S_soc_S_rcc_58024400) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller) fn(DT_N_S_soc_S_interrupt_controller_58000000) fn(DT_N_S_soc_S_pin_controller_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11) fn(DT_N_S_soc_S_serial_40011000) fn(DT_N_S_soc_S_serial_40004c00) fn(DT_N_S_soc_S_serial_40011400) fn(DT_N_S_soc_S_serial_40007800) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx) fn(DT_N_S_soc_S_rtc_58004000) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint) fn(DT_N_S_soc_S_i2c_58001c00) fn(DT_N_S_soc_S_spi_40003800) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc_S_timers_40010000_S_pwm) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc_S_timers_40000400_S_pwm) fn(DT_N_S_soc_S_timers_40010400) fn(DT_N_S_soc_S_timers_40010400_S_pwm) fn(DT_N_S_soc_S_timers_40001800) fn(DT_N_S_soc_S_timers_40001800_S_pwm) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc_S_adc_40022000_S_channel_c) fn(DT_N_S_soc_S_adc_40022000_S_channel_d) fn(DT_N_S_soc_S_adc_40022000_S_channel_12) fn(DT_N_S_soc_S_adc_40022000_S_channel_3) fn(DT_N_S_soc_S_adc_40022000_S_channel_0) fn(DT_N_S_soc_S_adc_40022000_S_channel_1) fn(DT_N_S_soc_S_adc_58026000) fn(DT_N_S_soc_S_adc_58026000_S_channel_0) fn(DT_N_S_soc_S_adc_58026000_S_channel_1) fn(DT_N_S_soc_S_dma_40020000) fn(DT_N_S_soc_S_dmamux_40020800) fn(DT_N_S_soc_S_rng_48021800) fn(DT_N_S_soc_S_ethernet_40028000) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0) fn(DT_N_S_soc_S_memory_controller_52004000) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0) fn(DT_N_S_soc_S_spi_52005000) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000) fn(DT_N_S_soc_S_dcmi_48020000) fn(DT_N_S_soc_S_dcmi_48020000_S_port) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint) fn(DT_N_S_soc_S_mailbox_58026400) fn(DT_N_S_soc_S_usb_40040000) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart) fn(DT_N_S_cpus) fn(DT_N_S_cpus_S_cpu_0) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90) fn(DT_N_S_memory_90000000) fn(DT_N_S_clocks) fn(DT_N_S_clocks_S_clk_hse) fn(DT_N_S_clocks_S_clk_hsi) fn(DT_N_S_clocks_S_clk_hsi48) fn(DT_N_S_clocks_S_clk_lsi) fn(DT_N_S_clocks_S_pll_0) fn(DT_N_S_mcos) fn(DT_N_S_memory_24000000) fn(DT_N_S_memory_30000000) fn(DT_N_S_memory_30020000) fn(DT_N_S_memory_30040000) fn(DT_N_S_memory_38000000) fn(DT_N_S_otghs_fs_phy) fn(DT_N_S_leds) fn(DT_N_S_leds_S_led_0) fn(DT_N_S_leds_S_led_1) fn(DT_N_S_leds_S_led_2) fn(DT_N_S_otghs_ulpis_phy) fn(DT_N_S_oscen) fn(DT_N_S_ethernet_phy_en) fn(DT_N_S_sdram_c0000000) fn(DT_N_S_gpio_deadbeef) fn(DT_N_S_zephyr_user) +#define DT_FOREACH_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_58004800, __VA_ARGS__) fn(DT_N_S_soc_S_watchdog_50003000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40005000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_58000c00, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000_S_backup_regs, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005800, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40013400, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40015000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_58001400, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40013000, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_i2s_40003c00, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a000, __VA_ARGS__) fn(DT_N_S_soc_S_can_4000a400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000c00_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001c00_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014000_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014400_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40014800_S_counter, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40002400, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022100, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022300, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_dac_40007400, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020400, __VA_ARGS__) fn(DT_N_S_soc_S_bdma_58025400, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_58025800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_sdmmc_52007000, __VA_ARGS__) fn(DT_N_S_soc_S_sdmmc_48022400, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) fn(DT_N_S_soc_S_memory_38800000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_display_controller_50001000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40080000, __VA_ARGS__) fn(DT_N_S_soc_S_dsihost_50000000, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_csi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_0, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_1, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_2, __VA_ARGS__) fn(DT_N_S_clocks_S_perck, __VA_ARGS__) fn(DT_N_S_mcos, __VA_ARGS__) fn(DT_N_S_mcos_S_mco1, __VA_ARGS__) fn(DT_N_S_mcos_S_mco2, __VA_ARGS__) fn(DT_N_S_dietemp, __VA_ARGS__) fn(DT_N_S_vbat, __VA_ARGS__) fn(DT_N_S_vref, __VA_ARGS__) fn(DT_N_S_smbus1, __VA_ARGS__) fn(DT_N_S_smbus2, __VA_ARGS__) fn(DT_N_S_smbus3, __VA_ARGS__) fn(DT_N_S_smbus4, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) fn(DT_N_S_oscen, __VA_ARGS__) fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) +#define DT_FOREACH_OKAY_VARGS_HELPER(fn, ...) fn(DT_N, __VA_ARGS__) fn(DT_N_S_chosen, __VA_ARGS__) fn(DT_N_S_aliases, __VA_ARGS__) fn(DT_N_S_soc, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_e000e100, __VA_ARGS__) fn(DT_N_S_soc_S_timer_e000e010, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_40000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_a0000, __VA_ARGS__) fn(DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_e0000, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400, __VA_ARGS__) fn(DT_N_S_soc_S_rcc_58024400_S_reset_controller, __VA_ARGS__) fn(DT_N_S_soc_S_interrupt_controller_58000000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58020c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58021c00, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022000, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022400, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_gpio_58022800, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp0_pa0_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp1_pa1_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp18_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp3_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp12_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc1_inp13_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp0_pc2_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_adc3_inp1_pc3_c, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_hsync_pa4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_pixclk_pa6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d0_ph9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d1_ph10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d2_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d3_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d4_ph14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d5_pi4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_vsync_pi5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d6_pi6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_dcmi_d7_pi7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_crs_dv_pa7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdc_pc1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_mdio_pa2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_ref_clk_pa1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd0_pc4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_rxd1_pc5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd0_pg13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_txd1_pg12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_eth_tx_en_pg11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_rx_pb8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fdcan1_tx_ph13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d2_pd0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d3_pd1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d13_pd8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d14_pd9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d15_pd10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d0_pd14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d1_pd15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl0_pe0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_nbl1_pe1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d4_pe7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d5_pe8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d6_pe9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d7_pe10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d8_pe11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d9_pe12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d10_pe13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d11_pe14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_d12_pe15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a0_pf0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a1_pf1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a2_pf2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a3_pf3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a4_pf4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a5_pf5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnras_pf11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a6_pf12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a7_pf13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a8_pf14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a9_pf15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a10_pg0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a11_pg1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a12_pg2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a14_pg4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_a15_pg5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdclk_pg8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdncas_pg15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdcke0_ph2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdne0_ph3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_fmc_sdnwe_ph5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_scl_pb6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_scl_ph7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_scl_ph11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c1_sda_pb7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c3_sda_ph8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_i2c4_sda_ph12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io0_pd11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io1_pd12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io3_pd13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_io2_pf7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_clk_pf10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_quadspi_bk1_ncs_pg6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_miso_pc2, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_mosi_pc3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_spi2_sck_pi1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch1_pa8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim1_ch2_pj11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim12_ch1_ph6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch1_pc6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim3_ch2_pc7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch3n_ph15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2n_pj7, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_tim8_ch2_pj10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_cts_pf9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rts_pf8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_rx_pa10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_rx_pi9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_rx_pg9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_rx_pf6, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_rx_pj9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart1_tx_pa9, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart4_tx_pa0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usart6_tx_pg14, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart7_tx_pa15, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_uart8_tx_pj8, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d0_pa3, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_ck_pa5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d1_pb0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d2_pb1, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d7_pb5, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d3_pb10, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d4_pb11, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d5_pb12, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_d6_pb13, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_stp_pc0, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_nxt_ph4, __VA_ARGS__) fn(DT_N_S_soc_S_pin_controller_58020000_S_usb_otg_hs_ulpi_dir_pi11, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011000, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40004c00, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40011400, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart, __VA_ARGS__) fn(DT_N_S_soc_S_serial_40007800_S_bt_hci_uart_S_murata_1dx, __VA_ARGS__) fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck1, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck2, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_buck3, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo1, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo2, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_regulators_S_ldo3, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_c, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_d, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_12, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_3, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_40022000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_0, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000_S_channel_1, __VA_ARGS__) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio, __VA_ARGS__) fn(DT_N_S_soc_S_ethernet_40028000_S_mdio_S_ethernet_phy_0, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram, __VA_ARGS__) fn(DT_N_S_soc_S_memory_controller_52004000_S_sdram_S_bank_0, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_0, __VA_ARGS__) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000_S_partitions_S_partition_f80000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port, __VA_ARGS__) fn(DT_N_S_soc_S_dcmi_48020000_S_port_S_endpoint, __VA_ARGS__) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000, __VA_ARGS__) fn(DT_N_S_soc_S_usb_40040000_S_board_cdc_acm_uart, __VA_ARGS__) fn(DT_N_S_cpus, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0, __VA_ARGS__) fn(DT_N_S_cpus_S_cpu_0_S_mpu_e000ed90, __VA_ARGS__) fn(DT_N_S_memory_90000000, __VA_ARGS__) fn(DT_N_S_clocks, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hse, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_hsi48, __VA_ARGS__) fn(DT_N_S_clocks_S_clk_lsi, __VA_ARGS__) fn(DT_N_S_clocks_S_pll_0, __VA_ARGS__) fn(DT_N_S_mcos, __VA_ARGS__) fn(DT_N_S_memory_24000000, __VA_ARGS__) fn(DT_N_S_memory_30000000, __VA_ARGS__) fn(DT_N_S_memory_30020000, __VA_ARGS__) fn(DT_N_S_memory_30040000, __VA_ARGS__) fn(DT_N_S_memory_38000000, __VA_ARGS__) fn(DT_N_S_otghs_fs_phy, __VA_ARGS__) fn(DT_N_S_leds, __VA_ARGS__) fn(DT_N_S_leds_S_led_0, __VA_ARGS__) fn(DT_N_S_leds_S_led_1, __VA_ARGS__) fn(DT_N_S_leds_S_led_2, __VA_ARGS__) fn(DT_N_S_otghs_ulpis_phy, __VA_ARGS__) fn(DT_N_S_oscen, __VA_ARGS__) fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) fn(DT_N_S_sdram_c0000000, __VA_ARGS__) fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) fn(DT_N_S_zephyr_user, __VA_ARGS__) #define DT_COMPAT_fixed_partitions_LABEL_mcuboot DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_0 #define DT_COMPAT_fixed_partitions_LABEL_mcuboot_EXISTS 1 #define DT_COMPAT_fixed_partitions_LABEL_image_scratch DT_N_S_soc_S_flash_controller_52002000_S_flash_8000000_S_partitions_S_partition_10000 @@ -38492,6 +44446,16 @@ #define DT_COMPAT_HAS_OKAY_nxp_pf1550 1 #define DT_COMPAT_HAS_OKAY_nxp_pf1550_regulator 1 #define DT_COMPAT_HAS_OKAY_nxp_pf1550_charger 1 +#define DT_COMPAT_HAS_OKAY_galaxycore_gc2145 1 +#define DT_COMPAT_HAS_OKAY_st_stm32h7_spi 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_spi_fifo 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_spi 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_timers 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_pwm 1 +#define DT_COMPAT_HAS_OKAY_pwm_clock 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_adc 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_dma_v1 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_dmamux 1 #define DT_COMPAT_HAS_OKAY_st_stm32_rng 1 #define DT_COMPAT_HAS_OKAY_st_stm32h7_ethernet 1 #define DT_COMPAT_HAS_OKAY_st_stm32_ethernet 1 @@ -38501,6 +44465,7 @@ #define DT_COMPAT_HAS_OKAY_st_stm32_fmc_sdram 1 #define DT_COMPAT_HAS_OKAY_st_stm32_qspi 1 #define DT_COMPAT_HAS_OKAY_st_stm32_qspi_nor 1 +#define DT_COMPAT_HAS_OKAY_st_stm32_dcmi 1 #define DT_COMPAT_HAS_OKAY_st_stm32_hsem_mailbox 1 #define DT_COMPAT_HAS_OKAY_st_mbox_stm32_hsem 1 #define DT_COMPAT_HAS_OKAY_st_stm32_otghs 1 @@ -38517,6 +44482,7 @@ #define DT_COMPAT_HAS_OKAY_gpio_leds 1 #define DT_COMPAT_HAS_OKAY_usb_ulpi_phy 1 #define DT_COMPAT_HAS_OKAY_regulator_fixed 1 +#define DT_COMPAT_HAS_OKAY_vnd_gpio 1 /* * Macros for status "okay" instances of each compatible @@ -38542,10 +44508,20 @@ #define DT_N_INST_zephyr_bt_hci_uart_NUM_OKAY 1 #define DT_N_INST_infineon_cyw43xxx_bt_hci_NUM_OKAY 1 #define DT_N_INST_st_stm32_rtc_NUM_OKAY 1 -#define DT_N_INST_st_stm32_i2c_v2_NUM_OKAY 2 +#define DT_N_INST_st_stm32_i2c_v2_NUM_OKAY 3 #define DT_N_INST_nxp_pf1550_NUM_OKAY 1 #define DT_N_INST_nxp_pf1550_regulator_NUM_OKAY 1 #define DT_N_INST_nxp_pf1550_charger_NUM_OKAY 1 +#define DT_N_INST_galaxycore_gc2145_NUM_OKAY 1 +#define DT_N_INST_st_stm32h7_spi_NUM_OKAY 1 +#define DT_N_INST_st_stm32_spi_fifo_NUM_OKAY 1 +#define DT_N_INST_st_stm32_spi_NUM_OKAY 1 +#define DT_N_INST_st_stm32_timers_NUM_OKAY 4 +#define DT_N_INST_st_stm32_pwm_NUM_OKAY 4 +#define DT_N_INST_pwm_clock_NUM_OKAY 1 +#define DT_N_INST_st_stm32_adc_NUM_OKAY 2 +#define DT_N_INST_st_stm32_dma_v1_NUM_OKAY 1 +#define DT_N_INST_st_stm32_dmamux_NUM_OKAY 1 #define DT_N_INST_st_stm32_rng_NUM_OKAY 1 #define DT_N_INST_st_stm32h7_ethernet_NUM_OKAY 1 #define DT_N_INST_st_stm32_ethernet_NUM_OKAY 1 @@ -38555,6 +44531,7 @@ #define DT_N_INST_st_stm32_fmc_sdram_NUM_OKAY 1 #define DT_N_INST_st_stm32_qspi_NUM_OKAY 1 #define DT_N_INST_st_stm32_qspi_nor_NUM_OKAY 1 +#define DT_N_INST_st_stm32_dcmi_NUM_OKAY 1 #define DT_N_INST_st_stm32_hsem_mailbox_NUM_OKAY 1 #define DT_N_INST_st_mbox_stm32_hsem_NUM_OKAY 1 #define DT_N_INST_st_stm32_otghs_NUM_OKAY 1 @@ -38571,6 +44548,7 @@ #define DT_N_INST_gpio_leds_NUM_OKAY 1 #define DT_N_INST_usb_ulpi_phy_NUM_OKAY 1 #define DT_N_INST_regulator_fixed_NUM_OKAY 2 +#define DT_N_INST_vnd_gpio_NUM_OKAY 1 #define DT_FOREACH_OKAY_arduino_portenta_h7(fn) fn(DT_N) #define DT_FOREACH_OKAY_VARGS_arduino_portenta_h7(fn, ...) fn(DT_N, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_arduino_portenta_h7(fn) fn(0) @@ -38655,10 +44633,10 @@ #define DT_FOREACH_OKAY_VARGS_st_stm32_rtc(fn, ...) fn(DT_N_S_soc_S_rtc_58004000, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_st_stm32_rtc(fn) fn(0) #define DT_FOREACH_OKAY_INST_VARGS_st_stm32_rtc(fn, ...) fn(0, __VA_ARGS__) -#define DT_FOREACH_OKAY_st_stm32_i2c_v2(fn) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_58001c00) -#define DT_FOREACH_OKAY_VARGS_st_stm32_i2c_v2(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) -#define DT_FOREACH_OKAY_INST_st_stm32_i2c_v2(fn) fn(0) fn(1) -#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_i2c_v2(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_i2c_v2(fn) fn(DT_N_S_soc_S_i2c_40005400) fn(DT_N_S_soc_S_i2c_40005c00) fn(DT_N_S_soc_S_i2c_58001c00) +#define DT_FOREACH_OKAY_VARGS_st_stm32_i2c_v2(fn, ...) fn(DT_N_S_soc_S_i2c_40005400, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_40005c00, __VA_ARGS__) fn(DT_N_S_soc_S_i2c_58001c00, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_i2c_v2(fn) fn(0) fn(1) fn(2) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_i2c_v2(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) #define DT_FOREACH_OKAY_nxp_pf1550(fn) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8) #define DT_FOREACH_OKAY_VARGS_nxp_pf1550(fn, ...) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_nxp_pf1550(fn) fn(0) @@ -38671,6 +44649,46 @@ #define DT_FOREACH_OKAY_VARGS_nxp_pf1550_charger(fn, ...) fn(DT_N_S_soc_S_i2c_40005400_S_pmic_8_S_charger, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_nxp_pf1550_charger(fn) fn(0) #define DT_FOREACH_OKAY_INST_VARGS_nxp_pf1550_charger(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_galaxycore_gc2145(fn) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c) +#define DT_FOREACH_OKAY_VARGS_galaxycore_gc2145(fn, ...) fn(DT_N_S_soc_S_i2c_40005c00_S_gc2145_3c, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_galaxycore_gc2145(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_galaxycore_gc2145(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32h7_spi(fn) fn(DT_N_S_soc_S_spi_40003800) +#define DT_FOREACH_OKAY_VARGS_st_stm32h7_spi(fn, ...) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32h7_spi(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32h7_spi(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_spi_fifo(fn) fn(DT_N_S_soc_S_spi_40003800) +#define DT_FOREACH_OKAY_VARGS_st_stm32_spi_fifo(fn, ...) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_spi_fifo(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_spi_fifo(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_spi(fn) fn(DT_N_S_soc_S_spi_40003800) +#define DT_FOREACH_OKAY_VARGS_st_stm32_spi(fn, ...) fn(DT_N_S_soc_S_spi_40003800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_spi(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_spi(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_timers(fn) fn(DT_N_S_soc_S_timers_40010000) fn(DT_N_S_soc_S_timers_40000400) fn(DT_N_S_soc_S_timers_40010400) fn(DT_N_S_soc_S_timers_40001800) +#define DT_FOREACH_OKAY_VARGS_st_stm32_timers(fn, ...) fn(DT_N_S_soc_S_timers_40010000, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_timers(fn) fn(0) fn(1) fn(2) fn(3) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_timers(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_pwm(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm) fn(DT_N_S_soc_S_timers_40000400_S_pwm) fn(DT_N_S_soc_S_timers_40010400_S_pwm) fn(DT_N_S_soc_S_timers_40001800_S_pwm) +#define DT_FOREACH_OKAY_VARGS_st_stm32_pwm(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40000400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40010400_S_pwm, __VA_ARGS__) fn(DT_N_S_soc_S_timers_40001800_S_pwm, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_pwm(fn) fn(0) fn(1) fn(2) fn(3) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_pwm(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) fn(2, __VA_ARGS__) fn(3, __VA_ARGS__) +#define DT_FOREACH_OKAY_pwm_clock(fn) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock) +#define DT_FOREACH_OKAY_VARGS_pwm_clock(fn, ...) fn(DT_N_S_soc_S_timers_40010000_S_pwm_S_pwmclock, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_pwm_clock(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_pwm_clock(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_adc(fn) fn(DT_N_S_soc_S_adc_40022000) fn(DT_N_S_soc_S_adc_58026000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_adc(fn, ...) fn(DT_N_S_soc_S_adc_40022000, __VA_ARGS__) fn(DT_N_S_soc_S_adc_58026000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_adc(fn) fn(0) fn(1) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_adc(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_dma_v1(fn) fn(DT_N_S_soc_S_dma_40020000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_dma_v1(fn, ...) fn(DT_N_S_soc_S_dma_40020000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_dma_v1(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_dma_v1(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_dmamux(fn) fn(DT_N_S_soc_S_dmamux_40020800) +#define DT_FOREACH_OKAY_VARGS_st_stm32_dmamux(fn, ...) fn(DT_N_S_soc_S_dmamux_40020800, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_dmamux(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_dmamux(fn, ...) fn(0, __VA_ARGS__) #define DT_FOREACH_OKAY_st_stm32_rng(fn) fn(DT_N_S_soc_S_rng_48021800) #define DT_FOREACH_OKAY_VARGS_st_stm32_rng(fn, ...) fn(DT_N_S_soc_S_rng_48021800, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_st_stm32_rng(fn) fn(0) @@ -38707,6 +44725,10 @@ #define DT_FOREACH_OKAY_VARGS_st_stm32_qspi_nor(fn, ...) fn(DT_N_S_soc_S_spi_52005000_S_qspi_nor_flash_90000000, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_st_stm32_qspi_nor(fn) fn(0) #define DT_FOREACH_OKAY_INST_VARGS_st_stm32_qspi_nor(fn, ...) fn(0, __VA_ARGS__) +#define DT_FOREACH_OKAY_st_stm32_dcmi(fn) fn(DT_N_S_soc_S_dcmi_48020000) +#define DT_FOREACH_OKAY_VARGS_st_stm32_dcmi(fn, ...) fn(DT_N_S_soc_S_dcmi_48020000, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_st_stm32_dcmi(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_st_stm32_dcmi(fn, ...) fn(0, __VA_ARGS__) #define DT_FOREACH_OKAY_st_stm32_hsem_mailbox(fn) fn(DT_N_S_soc_S_mailbox_58026400) #define DT_FOREACH_OKAY_VARGS_st_stm32_hsem_mailbox(fn, ...) fn(DT_N_S_soc_S_mailbox_58026400, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_st_stm32_hsem_mailbox(fn) fn(0) @@ -38771,6 +44793,10 @@ #define DT_FOREACH_OKAY_VARGS_regulator_fixed(fn, ...) fn(DT_N_S_oscen, __VA_ARGS__) fn(DT_N_S_ethernet_phy_en, __VA_ARGS__) #define DT_FOREACH_OKAY_INST_regulator_fixed(fn) fn(0) fn(1) #define DT_FOREACH_OKAY_INST_VARGS_regulator_fixed(fn, ...) fn(0, __VA_ARGS__) fn(1, __VA_ARGS__) +#define DT_FOREACH_OKAY_vnd_gpio(fn) fn(DT_N_S_gpio_deadbeef) +#define DT_FOREACH_OKAY_VARGS_vnd_gpio(fn, ...) fn(DT_N_S_gpio_deadbeef, __VA_ARGS__) +#define DT_FOREACH_OKAY_INST_vnd_gpio(fn) fn(0) +#define DT_FOREACH_OKAY_INST_VARGS_vnd_gpio(fn, ...) fn(0, __VA_ARGS__) /* * Bus information for status "okay" nodes of each compatible @@ -38780,6 +44806,7 @@ #define DT_COMPAT_nxp_pf1550_BUS_i2c 1 #define DT_COMPAT_nxp_pf1550_regulator_BUS_i2c 1 #define DT_COMPAT_nxp_pf1550_charger_BUS_i2c 1 +#define DT_COMPAT_galaxycore_gc2145_BUS_i2c 1 #define DT_COMPAT_ethernet_phy_BUS_mdio 1 #define DT_COMPAT_st_stm32_qspi_nor_BUS_qspi 1 #define DT_COMPAT_zephyr_cdc_acm_uart_BUS_usb 1 diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/driver-validation.h b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/driver-validation.h index c8c58c45..55ab70fb 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/driver-validation.h +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/driver-validation.h @@ -4,6 +4,10 @@ (K_SYSCALL_OBJ(ptr, K_OBJ_DRIVER_##driver_upper_case) || \ K_SYSCALL_DRIVER_OP(ptr, driver_lower_case##_driver_api, op)) +#define K_SYSCALL_DRIVER_ADC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, adc, ADC) + +#define K_SYSCALL_DRIVER_DMA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dma, DMA) + #define K_SYSCALL_DRIVER_ENTROPY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, entropy, ENTROPY) #define K_SYSCALL_DRIVER_FLASH(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, flash, FLASH) @@ -14,6 +18,8 @@ #define K_SYSCALL_DRIVER_I2C_TARGET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, i2c_target, I2C_TARGET) +#define K_SYSCALL_DRIVER_PWM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pwm, PWM) + #define K_SYSCALL_DRIVER_RESET(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, reset, RESET) #define K_SYSCALL_DRIVER_SPI(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, spi, SPI) @@ -22,8 +28,6 @@ #define K_SYSCALL_DRIVER_CRYPTO(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, crypto, CRYPTO) -#define K_SYSCALL_DRIVER_ADC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, adc, ADC) - #define K_SYSCALL_DRIVER_AUXDISPLAY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, auxdisplay, AUXDISPLAY) #define K_SYSCALL_DRIVER_BBRAM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, bbram, BBRAM) @@ -50,8 +54,6 @@ #define K_SYSCALL_DRIVER_DISPLAY(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, display, DISPLAY) -#define K_SYSCALL_DRIVER_DMA(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, dma, DMA) - #define K_SYSCALL_DRIVER_EDAC(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, edac, EDAC) #define K_SYSCALL_DRIVER_EEPROM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, eeprom, EEPROM) @@ -104,8 +106,6 @@ #define K_SYSCALL_DRIVER_PTP_CLOCK(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, ptp_clock, PTP_CLOCK) -#define K_SYSCALL_DRIVER_PWM(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, pwm, PWM) - #define K_SYSCALL_DRIVER_REGULATOR_PARENT(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, regulator_parent, REGULATOR_PARENT) #define K_SYSCALL_DRIVER_REGULATOR(ptr, op) K_SYSCALL_DRIVER_GEN(ptr, op, regulator, REGULATOR) diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/kobj-types-enum.h b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/kobj-types-enum.h index 6e138137..3fffde7d 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/kobj-types-enum.h +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/kobj-types-enum.h @@ -40,16 +40,18 @@ K_OBJ_RTIO_IODEV, K_OBJ_SENSOR_DECODER_API, #endif /* Driver subsystems */ +K_OBJ_DRIVER_ADC, +K_OBJ_DRIVER_DMA, K_OBJ_DRIVER_ENTROPY, K_OBJ_DRIVER_FLASH, K_OBJ_DRIVER_GPIO, K_OBJ_DRIVER_I2C, K_OBJ_DRIVER_I2C_TARGET, +K_OBJ_DRIVER_PWM, K_OBJ_DRIVER_RESET, K_OBJ_DRIVER_SPI, K_OBJ_DRIVER_SHARED_IRQ, K_OBJ_DRIVER_CRYPTO, -K_OBJ_DRIVER_ADC, K_OBJ_DRIVER_AUXDISPLAY, K_OBJ_DRIVER_BBRAM, K_OBJ_DRIVER_BT_HCI, @@ -63,7 +65,6 @@ K_OBJ_DRIVER_COUNTER, K_OBJ_DRIVER_DAC, K_OBJ_DRIVER_DAI, K_OBJ_DRIVER_DISPLAY, -K_OBJ_DRIVER_DMA, K_OBJ_DRIVER_EDAC, K_OBJ_DRIVER_EEPROM, K_OBJ_DRIVER_EMUL_BBRAM, @@ -90,7 +91,6 @@ K_OBJ_DRIVER_MSPI, K_OBJ_DRIVER_PECI, K_OBJ_DRIVER_PS2, K_OBJ_DRIVER_PTP_CLOCK, -K_OBJ_DRIVER_PWM, K_OBJ_DRIVER_REGULATOR_PARENT, K_OBJ_DRIVER_REGULATOR, K_OBJ_DRIVER_RETAINED_MEM, diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/otype-to-str.h b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/otype-to-str.h index eb9a2e78..b17c92d2 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/otype-to-str.h +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/otype-to-str.h @@ -40,16 +40,18 @@ case K_OBJ_RTIO_IODEV: ret = "rtio_iodev"; break; case K_OBJ_SENSOR_DECODER_API: ret = "sensor_decoder_api"; break; #endif /* Driver subsystems */ +case K_OBJ_DRIVER_ADC: ret = "adc driver"; break; +case K_OBJ_DRIVER_DMA: ret = "dma driver"; break; case K_OBJ_DRIVER_ENTROPY: ret = "entropy driver"; break; case K_OBJ_DRIVER_FLASH: ret = "flash driver"; break; case K_OBJ_DRIVER_GPIO: ret = "gpio driver"; break; case K_OBJ_DRIVER_I2C: ret = "i2c driver"; break; case K_OBJ_DRIVER_I2C_TARGET: ret = "i2c_target driver"; break; +case K_OBJ_DRIVER_PWM: ret = "pwm driver"; break; case K_OBJ_DRIVER_RESET: ret = "reset driver"; break; case K_OBJ_DRIVER_SPI: ret = "spi driver"; break; case K_OBJ_DRIVER_SHARED_IRQ: ret = "shared_irq driver"; break; case K_OBJ_DRIVER_CRYPTO: ret = "crypto driver"; break; -case K_OBJ_DRIVER_ADC: ret = "adc driver"; break; case K_OBJ_DRIVER_AUXDISPLAY: ret = "auxdisplay driver"; break; case K_OBJ_DRIVER_BBRAM: ret = "bbram driver"; break; case K_OBJ_DRIVER_BT_HCI: ret = "bt_hci driver"; break; @@ -63,7 +65,6 @@ case K_OBJ_DRIVER_COUNTER: ret = "counter driver"; break; case K_OBJ_DRIVER_DAC: ret = "dac driver"; break; case K_OBJ_DRIVER_DAI: ret = "dai driver"; break; case K_OBJ_DRIVER_DISPLAY: ret = "display driver"; break; -case K_OBJ_DRIVER_DMA: ret = "dma driver"; break; case K_OBJ_DRIVER_EDAC: ret = "edac driver"; break; case K_OBJ_DRIVER_EEPROM: ret = "eeprom driver"; break; case K_OBJ_DRIVER_EMUL_BBRAM: ret = "emul_bbram driver"; break; @@ -90,7 +91,6 @@ case K_OBJ_DRIVER_MSPI: ret = "mspi driver"; break; case K_OBJ_DRIVER_PECI: ret = "peci driver"; break; case K_OBJ_DRIVER_PS2: ret = "ps2 driver"; break; case K_OBJ_DRIVER_PTP_CLOCK: ret = "ptp_clock driver"; break; -case K_OBJ_DRIVER_PWM: ret = "pwm driver"; break; case K_OBJ_DRIVER_REGULATOR_PARENT: ret = "regulator_parent driver"; break; case K_OBJ_DRIVER_REGULATOR: ret = "regulator driver"; break; case K_OBJ_DRIVER_RETAINED_MEM: ret = "retained_mem driver"; break; diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/syscall_list.h b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/syscall_list.h index 82d20fb7..ecf7da09 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/syscall_list.h +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/syscall_list.h @@ -3,468 +3,468 @@ #ifndef ZEPHYR_SYSCALL_LIST_H #define ZEPHYR_SYSCALL_LIST_H -#define K_SYSCALL_DEVICE_DEINIT 0 -#define K_SYSCALL_DEVICE_GET_BINDING 1 -#define K_SYSCALL_DEVICE_GET_BY_DT_NODELABEL 2 -#define K_SYSCALL_DEVICE_INIT 3 -#define K_SYSCALL_DEVICE_IS_READY 4 -#define K_SYSCALL_ENTROPY_GET_ENTROPY 5 -#define K_SYSCALL_FLASH_COPY 6 -#define K_SYSCALL_FLASH_ERASE 7 -#define K_SYSCALL_FLASH_EX_OP 8 -#define K_SYSCALL_FLASH_FILL 9 -#define K_SYSCALL_FLASH_FLATTEN 10 -#define K_SYSCALL_FLASH_GET_PAGE_COUNT 11 -#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX 12 -#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS 13 -#define K_SYSCALL_FLASH_GET_PARAMETERS 14 -#define K_SYSCALL_FLASH_GET_SIZE 15 -#define K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE 16 -#define K_SYSCALL_FLASH_READ 17 -#define K_SYSCALL_FLASH_READ_JEDEC_ID 18 -#define K_SYSCALL_FLASH_SFDP_READ 19 -#define K_SYSCALL_FLASH_WRITE 20 -#define K_SYSCALL_GPIO_GET_PENDING_INT 21 -#define K_SYSCALL_GPIO_PIN_CONFIGURE 22 -#define K_SYSCALL_GPIO_PIN_GET_CONFIG 23 -#define K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE 24 -#define K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW 25 -#define K_SYSCALL_GPIO_PORT_GET_DIRECTION 26 -#define K_SYSCALL_GPIO_PORT_GET_RAW 27 -#define K_SYSCALL_GPIO_PORT_SET_BITS_RAW 28 -#define K_SYSCALL_GPIO_PORT_SET_MASKED_RAW 29 -#define K_SYSCALL_GPIO_PORT_TOGGLE_BITS 30 -#define K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE 31 -#define K_SYSCALL_HWINFO_GET_DEVICE_EUI64 32 -#define K_SYSCALL_HWINFO_GET_DEVICE_ID 33 -#define K_SYSCALL_HWINFO_GET_RESET_CAUSE 34 -#define K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE 35 -#define K_SYSCALL_I2C_CONFIGURE 36 -#define K_SYSCALL_I2C_GET_CONFIG 37 -#define K_SYSCALL_I2C_RECOVER_BUS 38 -#define K_SYSCALL_I2C_TARGET_DRIVER_REGISTER 39 -#define K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER 40 -#define K_SYSCALL_I2C_TRANSFER 41 -#define K_SYSCALL_K_BUSY_WAIT 42 -#define K_SYSCALL_K_CONDVAR_BROADCAST 43 -#define K_SYSCALL_K_CONDVAR_INIT 44 -#define K_SYSCALL_K_CONDVAR_SIGNAL 45 -#define K_SYSCALL_K_CONDVAR_WAIT 46 -#define K_SYSCALL_K_EVENT_CLEAR 47 -#define K_SYSCALL_K_EVENT_INIT 48 -#define K_SYSCALL_K_EVENT_POST 49 -#define K_SYSCALL_K_EVENT_SET 50 -#define K_SYSCALL_K_EVENT_SET_MASKED 51 -#define K_SYSCALL_K_EVENT_WAIT 52 -#define K_SYSCALL_K_EVENT_WAIT_ALL 53 -#define K_SYSCALL_K_FLOAT_DISABLE 54 -#define K_SYSCALL_K_FLOAT_ENABLE 55 -#define K_SYSCALL_K_FUTEX_WAIT 56 -#define K_SYSCALL_K_FUTEX_WAKE 57 -#define K_SYSCALL_K_IS_PREEMPT_THREAD 58 -#define K_SYSCALL_K_MSGQ_ALLOC_INIT 59 -#define K_SYSCALL_K_MSGQ_GET 60 -#define K_SYSCALL_K_MSGQ_GET_ATTRS 61 -#define K_SYSCALL_K_MSGQ_NUM_FREE_GET 62 -#define K_SYSCALL_K_MSGQ_NUM_USED_GET 63 -#define K_SYSCALL_K_MSGQ_PEEK 64 -#define K_SYSCALL_K_MSGQ_PEEK_AT 65 -#define K_SYSCALL_K_MSGQ_PURGE 66 -#define K_SYSCALL_K_MSGQ_PUT 67 -#define K_SYSCALL_K_MUTEX_INIT 68 -#define K_SYSCALL_K_MUTEX_LOCK 69 -#define K_SYSCALL_K_MUTEX_UNLOCK 70 -#define K_SYSCALL_K_OBJECT_ACCESS_GRANT 71 -#define K_SYSCALL_K_OBJECT_ALLOC 72 -#define K_SYSCALL_K_OBJECT_ALLOC_SIZE 73 -#define K_SYSCALL_K_OBJECT_RELEASE 74 -#define K_SYSCALL_K_PIPE_ALLOC_INIT 75 -#define K_SYSCALL_K_PIPE_BUFFER_FLUSH 76 -#define K_SYSCALL_K_PIPE_CLOSE 77 -#define K_SYSCALL_K_PIPE_FLUSH 78 -#define K_SYSCALL_K_PIPE_GET 79 -#define K_SYSCALL_K_PIPE_INIT 80 -#define K_SYSCALL_K_PIPE_PUT 81 -#define K_SYSCALL_K_PIPE_READ 82 -#define K_SYSCALL_K_PIPE_READ_AVAIL 83 -#define K_SYSCALL_K_PIPE_RESET 84 -#define K_SYSCALL_K_PIPE_WRITE 85 -#define K_SYSCALL_K_PIPE_WRITE_AVAIL 86 -#define K_SYSCALL_K_POLL 87 -#define K_SYSCALL_K_POLL_SIGNAL_CHECK 88 -#define K_SYSCALL_K_POLL_SIGNAL_INIT 89 -#define K_SYSCALL_K_POLL_SIGNAL_RAISE 90 -#define K_SYSCALL_K_POLL_SIGNAL_RESET 91 -#define K_SYSCALL_K_QUEUE_ALLOC_APPEND 92 -#define K_SYSCALL_K_QUEUE_ALLOC_PREPEND 93 -#define K_SYSCALL_K_QUEUE_CANCEL_WAIT 94 -#define K_SYSCALL_K_QUEUE_GET 95 -#define K_SYSCALL_K_QUEUE_INIT 96 -#define K_SYSCALL_K_QUEUE_IS_EMPTY 97 -#define K_SYSCALL_K_QUEUE_PEEK_HEAD 98 -#define K_SYSCALL_K_QUEUE_PEEK_TAIL 99 -#define K_SYSCALL_K_RESCHEDULE 100 -#define K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY 101 -#define K_SYSCALL_K_SEM_COUNT_GET 102 -#define K_SYSCALL_K_SEM_GIVE 103 -#define K_SYSCALL_K_SEM_INIT 104 -#define K_SYSCALL_K_SEM_RESET 105 -#define K_SYSCALL_K_SEM_TAKE 106 -#define K_SYSCALL_K_SLEEP 107 -#define K_SYSCALL_K_STACK_ALLOC_INIT 108 -#define K_SYSCALL_K_STACK_POP 109 -#define K_SYSCALL_K_STACK_PUSH 110 -#define K_SYSCALL_K_STR_OUT 111 -#define K_SYSCALL_K_THREAD_ABORT 112 -#define K_SYSCALL_K_THREAD_CREATE 113 -#define K_SYSCALL_K_THREAD_CUSTOM_DATA_GET 114 -#define K_SYSCALL_K_THREAD_CUSTOM_DATA_SET 115 -#define K_SYSCALL_K_THREAD_DEADLINE_SET 116 -#define K_SYSCALL_K_THREAD_JOIN 117 -#define K_SYSCALL_K_THREAD_NAME_COPY 118 -#define K_SYSCALL_K_THREAD_NAME_SET 119 -#define K_SYSCALL_K_THREAD_PRIORITY_GET 120 -#define K_SYSCALL_K_THREAD_PRIORITY_SET 121 -#define K_SYSCALL_K_THREAD_RESUME 122 -#define K_SYSCALL_K_THREAD_STACK_ALLOC 123 -#define K_SYSCALL_K_THREAD_STACK_FREE 124 -#define K_SYSCALL_K_THREAD_STACK_SPACE_GET 125 -#define K_SYSCALL_K_THREAD_SUSPEND 126 -#define K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS 127 -#define K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS 128 -#define K_SYSCALL_K_TIMER_EXPIRES_TICKS 129 -#define K_SYSCALL_K_TIMER_REMAINING_TICKS 130 -#define K_SYSCALL_K_TIMER_START 131 -#define K_SYSCALL_K_TIMER_STATUS_GET 132 -#define K_SYSCALL_K_TIMER_STATUS_SYNC 133 -#define K_SYSCALL_K_TIMER_STOP 134 -#define K_SYSCALL_K_TIMER_USER_DATA_GET 135 -#define K_SYSCALL_K_TIMER_USER_DATA_SET 136 -#define K_SYSCALL_K_UPTIME_TICKS 137 -#define K_SYSCALL_K_USLEEP 138 -#define K_SYSCALL_K_WAKEUP 139 -#define K_SYSCALL_K_YIELD 140 -#define K_SYSCALL_LLEXT_GET_FN_TABLE 141 -#define K_SYSCALL_LOG_BUFFERED_CNT 142 -#define K_SYSCALL_LOG_FILTER_SET 143 -#define K_SYSCALL_LOG_FRONTEND_FILTER_SET 144 -#define K_SYSCALL_LOG_PANIC 145 -#define K_SYSCALL_LOG_PROCESS 146 -#define K_SYSCALL_NET_ADDR_NTOP 147 -#define K_SYSCALL_NET_ADDR_PTON 148 -#define K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX 149 -#define K_SYSCALL_NET_IF_GET_BY_INDEX 150 -#define K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX 151 -#define K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX 152 -#define K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX 153 -#define K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX 154 -#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX 155 -#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX 156 -#define K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX 157 -#define K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX 158 -#define K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX 159 -#define K_SYSCALL_RESET_LINE_ASSERT 160 -#define K_SYSCALL_RESET_LINE_DEASSERT 161 -#define K_SYSCALL_RESET_LINE_TOGGLE 162 -#define K_SYSCALL_RESET_STATUS 163 -#define K_SYSCALL_SPI_RELEASE 164 -#define K_SYSCALL_SPI_TRANSCEIVE 165 -#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE 166 -#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE 167 -#define K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE 168 -#define K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET 169 -#define K_SYSCALL_SYS_CSRAND_GET 170 -#define K_SYSCALL_SYS_RAND_GET 171 -#define K_SYSCALL_UART_CONFIGURE 172 -#define K_SYSCALL_UART_CONFIG_GET 173 -#define K_SYSCALL_UART_DRV_CMD 174 -#define K_SYSCALL_UART_ERR_CHECK 175 -#define K_SYSCALL_UART_IRQ_ERR_DISABLE 176 -#define K_SYSCALL_UART_IRQ_ERR_ENABLE 177 -#define K_SYSCALL_UART_IRQ_IS_PENDING 178 -#define K_SYSCALL_UART_IRQ_RX_DISABLE 179 -#define K_SYSCALL_UART_IRQ_RX_ENABLE 180 -#define K_SYSCALL_UART_IRQ_TX_DISABLE 181 -#define K_SYSCALL_UART_IRQ_TX_ENABLE 182 -#define K_SYSCALL_UART_IRQ_UPDATE 183 -#define K_SYSCALL_UART_LINE_CTRL_GET 184 -#define K_SYSCALL_UART_LINE_CTRL_SET 185 -#define K_SYSCALL_UART_POLL_IN 186 -#define K_SYSCALL_UART_POLL_IN_U16 187 -#define K_SYSCALL_UART_POLL_OUT 188 -#define K_SYSCALL_UART_POLL_OUT_U16 189 -#define K_SYSCALL_UART_RX_DISABLE 190 -#define K_SYSCALL_UART_RX_ENABLE 191 -#define K_SYSCALL_UART_RX_ENABLE_U16 192 -#define K_SYSCALL_UART_TX 193 -#define K_SYSCALL_UART_TX_ABORT 194 -#define K_SYSCALL_UART_TX_U16 195 -#define K_SYSCALL_ZEPHYR_FPUTC 196 -#define K_SYSCALL_ZEPHYR_FWRITE 197 -#define K_SYSCALL_ZEPHYR_READ_STDIN 198 -#define K_SYSCALL_ZEPHYR_WRITE_STDOUT 199 -#define K_SYSCALL_ZSOCK_ACCEPT 200 -#define K_SYSCALL_ZSOCK_BIND 201 -#define K_SYSCALL_ZSOCK_CLOSE 202 -#define K_SYSCALL_ZSOCK_CONNECT 203 -#define K_SYSCALL_ZSOCK_FCNTL_IMPL 204 -#define K_SYSCALL_ZSOCK_GETHOSTNAME 205 -#define K_SYSCALL_ZSOCK_GETPEERNAME 206 -#define K_SYSCALL_ZSOCK_GETSOCKNAME 207 -#define K_SYSCALL_ZSOCK_GETSOCKOPT 208 -#define K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT 209 -#define K_SYSCALL_ZSOCK_INET_PTON 210 -#define K_SYSCALL_ZSOCK_IOCTL_IMPL 211 -#define K_SYSCALL_ZSOCK_LISTEN 212 -#define K_SYSCALL_ZSOCK_RECVFROM 213 -#define K_SYSCALL_ZSOCK_RECVMSG 214 -#define K_SYSCALL_ZSOCK_SENDMSG 215 -#define K_SYSCALL_ZSOCK_SENDTO 216 -#define K_SYSCALL_ZSOCK_SETSOCKOPT 217 -#define K_SYSCALL_ZSOCK_SHUTDOWN 218 -#define K_SYSCALL_ZSOCK_SOCKET 219 -#define K_SYSCALL_ZSOCK_SOCKETPAIR 220 -#define K_SYSCALL_ZVFS_POLL 221 -#define K_SYSCALL_ZVFS_SELECT 222 -#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0 223 -#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1 224 -#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2 225 -#define K_SYSCALL_Z_LOG_MSG_STATIC_CREATE 226 -#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK 227 -#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK 228 -#define K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL 229 -#define K_SYSCALL___POSIX_CLOCK_GET_BASE 230 -#define K_SYSCALL_BAD 231 -#define K_SYSCALL_LIMIT 232 +#define K_SYSCALL_ADC_CHANNEL_SETUP 0 +#define K_SYSCALL_ADC_READ 1 +#define K_SYSCALL_ADC_READ_ASYNC 2 +#define K_SYSCALL_DEVICE_DEINIT 3 +#define K_SYSCALL_DEVICE_GET_BINDING 4 +#define K_SYSCALL_DEVICE_GET_BY_DT_NODELABEL 5 +#define K_SYSCALL_DEVICE_INIT 6 +#define K_SYSCALL_DEVICE_IS_READY 7 +#define K_SYSCALL_DMA_CHAN_FILTER 8 +#define K_SYSCALL_DMA_RELEASE_CHANNEL 9 +#define K_SYSCALL_DMA_REQUEST_CHANNEL 10 +#define K_SYSCALL_DMA_RESUME 11 +#define K_SYSCALL_DMA_START 12 +#define K_SYSCALL_DMA_STOP 13 +#define K_SYSCALL_DMA_SUSPEND 14 +#define K_SYSCALL_ENTROPY_GET_ENTROPY 15 +#define K_SYSCALL_FLASH_COPY 16 +#define K_SYSCALL_FLASH_ERASE 17 +#define K_SYSCALL_FLASH_EX_OP 18 +#define K_SYSCALL_FLASH_FILL 19 +#define K_SYSCALL_FLASH_FLATTEN 20 +#define K_SYSCALL_FLASH_GET_PAGE_COUNT 21 +#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_IDX 22 +#define K_SYSCALL_FLASH_GET_PAGE_INFO_BY_OFFS 23 +#define K_SYSCALL_FLASH_GET_PARAMETERS 24 +#define K_SYSCALL_FLASH_GET_SIZE 25 +#define K_SYSCALL_FLASH_GET_WRITE_BLOCK_SIZE 26 +#define K_SYSCALL_FLASH_READ 27 +#define K_SYSCALL_FLASH_READ_JEDEC_ID 28 +#define K_SYSCALL_FLASH_SFDP_READ 29 +#define K_SYSCALL_FLASH_WRITE 30 +#define K_SYSCALL_GPIO_GET_PENDING_INT 31 +#define K_SYSCALL_GPIO_PIN_CONFIGURE 32 +#define K_SYSCALL_GPIO_PIN_GET_CONFIG 33 +#define K_SYSCALL_GPIO_PIN_INTERRUPT_CONFIGURE 34 +#define K_SYSCALL_GPIO_PORT_CLEAR_BITS_RAW 35 +#define K_SYSCALL_GPIO_PORT_GET_DIRECTION 36 +#define K_SYSCALL_GPIO_PORT_GET_RAW 37 +#define K_SYSCALL_GPIO_PORT_SET_BITS_RAW 38 +#define K_SYSCALL_GPIO_PORT_SET_MASKED_RAW 39 +#define K_SYSCALL_GPIO_PORT_TOGGLE_BITS 40 +#define K_SYSCALL_HWINFO_CLEAR_RESET_CAUSE 41 +#define K_SYSCALL_HWINFO_GET_DEVICE_EUI64 42 +#define K_SYSCALL_HWINFO_GET_DEVICE_ID 43 +#define K_SYSCALL_HWINFO_GET_RESET_CAUSE 44 +#define K_SYSCALL_HWINFO_GET_SUPPORTED_RESET_CAUSE 45 +#define K_SYSCALL_I2C_CONFIGURE 46 +#define K_SYSCALL_I2C_GET_CONFIG 47 +#define K_SYSCALL_I2C_RECOVER_BUS 48 +#define K_SYSCALL_I2C_TARGET_DRIVER_REGISTER 49 +#define K_SYSCALL_I2C_TARGET_DRIVER_UNREGISTER 50 +#define K_SYSCALL_I2C_TRANSFER 51 +#define K_SYSCALL_K_BUSY_WAIT 52 +#define K_SYSCALL_K_CONDVAR_BROADCAST 53 +#define K_SYSCALL_K_CONDVAR_INIT 54 +#define K_SYSCALL_K_CONDVAR_SIGNAL 55 +#define K_SYSCALL_K_CONDVAR_WAIT 56 +#define K_SYSCALL_K_EVENT_CLEAR 57 +#define K_SYSCALL_K_EVENT_INIT 58 +#define K_SYSCALL_K_EVENT_POST 59 +#define K_SYSCALL_K_EVENT_SET 60 +#define K_SYSCALL_K_EVENT_SET_MASKED 61 +#define K_SYSCALL_K_EVENT_WAIT 62 +#define K_SYSCALL_K_EVENT_WAIT_ALL 63 +#define K_SYSCALL_K_FLOAT_DISABLE 64 +#define K_SYSCALL_K_FLOAT_ENABLE 65 +#define K_SYSCALL_K_FUTEX_WAIT 66 +#define K_SYSCALL_K_FUTEX_WAKE 67 +#define K_SYSCALL_K_IS_PREEMPT_THREAD 68 +#define K_SYSCALL_K_MSGQ_ALLOC_INIT 69 +#define K_SYSCALL_K_MSGQ_GET 70 +#define K_SYSCALL_K_MSGQ_GET_ATTRS 71 +#define K_SYSCALL_K_MSGQ_NUM_FREE_GET 72 +#define K_SYSCALL_K_MSGQ_NUM_USED_GET 73 +#define K_SYSCALL_K_MSGQ_PEEK 74 +#define K_SYSCALL_K_MSGQ_PEEK_AT 75 +#define K_SYSCALL_K_MSGQ_PURGE 76 +#define K_SYSCALL_K_MSGQ_PUT 77 +#define K_SYSCALL_K_MUTEX_INIT 78 +#define K_SYSCALL_K_MUTEX_LOCK 79 +#define K_SYSCALL_K_MUTEX_UNLOCK 80 +#define K_SYSCALL_K_OBJECT_ACCESS_GRANT 81 +#define K_SYSCALL_K_OBJECT_ALLOC 82 +#define K_SYSCALL_K_OBJECT_ALLOC_SIZE 83 +#define K_SYSCALL_K_OBJECT_RELEASE 84 +#define K_SYSCALL_K_PIPE_ALLOC_INIT 85 +#define K_SYSCALL_K_PIPE_BUFFER_FLUSH 86 +#define K_SYSCALL_K_PIPE_CLOSE 87 +#define K_SYSCALL_K_PIPE_FLUSH 88 +#define K_SYSCALL_K_PIPE_GET 89 +#define K_SYSCALL_K_PIPE_INIT 90 +#define K_SYSCALL_K_PIPE_PUT 91 +#define K_SYSCALL_K_PIPE_READ 92 +#define K_SYSCALL_K_PIPE_READ_AVAIL 93 +#define K_SYSCALL_K_PIPE_RESET 94 +#define K_SYSCALL_K_PIPE_WRITE 95 +#define K_SYSCALL_K_PIPE_WRITE_AVAIL 96 +#define K_SYSCALL_K_POLL 97 +#define K_SYSCALL_K_POLL_SIGNAL_CHECK 98 +#define K_SYSCALL_K_POLL_SIGNAL_INIT 99 +#define K_SYSCALL_K_POLL_SIGNAL_RAISE 100 +#define K_SYSCALL_K_POLL_SIGNAL_RESET 101 +#define K_SYSCALL_K_QUEUE_ALLOC_APPEND 102 +#define K_SYSCALL_K_QUEUE_ALLOC_PREPEND 103 +#define K_SYSCALL_K_QUEUE_CANCEL_WAIT 104 +#define K_SYSCALL_K_QUEUE_GET 105 +#define K_SYSCALL_K_QUEUE_INIT 106 +#define K_SYSCALL_K_QUEUE_IS_EMPTY 107 +#define K_SYSCALL_K_QUEUE_PEEK_HEAD 108 +#define K_SYSCALL_K_QUEUE_PEEK_TAIL 109 +#define K_SYSCALL_K_RESCHEDULE 110 +#define K_SYSCALL_K_SCHED_CURRENT_THREAD_QUERY 111 +#define K_SYSCALL_K_SEM_COUNT_GET 112 +#define K_SYSCALL_K_SEM_GIVE 113 +#define K_SYSCALL_K_SEM_INIT 114 +#define K_SYSCALL_K_SEM_RESET 115 +#define K_SYSCALL_K_SEM_TAKE 116 +#define K_SYSCALL_K_SLEEP 117 +#define K_SYSCALL_K_STACK_ALLOC_INIT 118 +#define K_SYSCALL_K_STACK_POP 119 +#define K_SYSCALL_K_STACK_PUSH 120 +#define K_SYSCALL_K_STR_OUT 121 +#define K_SYSCALL_K_THREAD_ABORT 122 +#define K_SYSCALL_K_THREAD_CREATE 123 +#define K_SYSCALL_K_THREAD_CUSTOM_DATA_GET 124 +#define K_SYSCALL_K_THREAD_CUSTOM_DATA_SET 125 +#define K_SYSCALL_K_THREAD_DEADLINE_SET 126 +#define K_SYSCALL_K_THREAD_JOIN 127 +#define K_SYSCALL_K_THREAD_NAME_COPY 128 +#define K_SYSCALL_K_THREAD_NAME_SET 129 +#define K_SYSCALL_K_THREAD_PRIORITY_GET 130 +#define K_SYSCALL_K_THREAD_PRIORITY_SET 131 +#define K_SYSCALL_K_THREAD_RESUME 132 +#define K_SYSCALL_K_THREAD_STACK_ALLOC 133 +#define K_SYSCALL_K_THREAD_STACK_FREE 134 +#define K_SYSCALL_K_THREAD_STACK_SPACE_GET 135 +#define K_SYSCALL_K_THREAD_SUSPEND 136 +#define K_SYSCALL_K_THREAD_TIMEOUT_EXPIRES_TICKS 137 +#define K_SYSCALL_K_THREAD_TIMEOUT_REMAINING_TICKS 138 +#define K_SYSCALL_K_TIMER_EXPIRES_TICKS 139 +#define K_SYSCALL_K_TIMER_REMAINING_TICKS 140 +#define K_SYSCALL_K_TIMER_START 141 +#define K_SYSCALL_K_TIMER_STATUS_GET 142 +#define K_SYSCALL_K_TIMER_STATUS_SYNC 143 +#define K_SYSCALL_K_TIMER_STOP 144 +#define K_SYSCALL_K_TIMER_USER_DATA_GET 145 +#define K_SYSCALL_K_TIMER_USER_DATA_SET 146 +#define K_SYSCALL_K_UPTIME_TICKS 147 +#define K_SYSCALL_K_USLEEP 148 +#define K_SYSCALL_K_WAKEUP 149 +#define K_SYSCALL_K_YIELD 150 +#define K_SYSCALL_LLEXT_GET_FN_TABLE 151 +#define K_SYSCALL_LOG_BUFFERED_CNT 152 +#define K_SYSCALL_LOG_FILTER_SET 153 +#define K_SYSCALL_LOG_FRONTEND_FILTER_SET 154 +#define K_SYSCALL_LOG_PANIC 155 +#define K_SYSCALL_LOG_PROCESS 156 +#define K_SYSCALL_NET_ADDR_NTOP 157 +#define K_SYSCALL_NET_ADDR_PTON 158 +#define K_SYSCALL_NET_ETH_GET_PTP_CLOCK_BY_INDEX 159 +#define K_SYSCALL_NET_IF_GET_BY_INDEX 160 +#define K_SYSCALL_NET_IF_IPV4_ADDR_ADD_BY_INDEX 161 +#define K_SYSCALL_NET_IF_IPV4_ADDR_LOOKUP_BY_INDEX 162 +#define K_SYSCALL_NET_IF_IPV4_ADDR_RM_BY_INDEX 163 +#define K_SYSCALL_NET_IF_IPV4_SET_GW_BY_INDEX 164 +#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_ADDR_BY_INDEX 165 +#define K_SYSCALL_NET_IF_IPV4_SET_NETMASK_BY_INDEX 166 +#define K_SYSCALL_NET_IF_IPV6_ADDR_ADD_BY_INDEX 167 +#define K_SYSCALL_NET_IF_IPV6_ADDR_LOOKUP_BY_INDEX 168 +#define K_SYSCALL_NET_IF_IPV6_ADDR_RM_BY_INDEX 169 +#define K_SYSCALL_PWM_CAPTURE_CYCLES 170 +#define K_SYSCALL_PWM_DISABLE_CAPTURE 171 +#define K_SYSCALL_PWM_ENABLE_CAPTURE 172 +#define K_SYSCALL_PWM_GET_CYCLES_PER_SEC 173 +#define K_SYSCALL_PWM_SET_CYCLES 174 +#define K_SYSCALL_RESET_LINE_ASSERT 175 +#define K_SYSCALL_RESET_LINE_DEASSERT 176 +#define K_SYSCALL_RESET_LINE_TOGGLE 177 +#define K_SYSCALL_RESET_STATUS 178 +#define K_SYSCALL_SPI_RELEASE 179 +#define K_SYSCALL_SPI_TRANSCEIVE 180 +#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_AND_INVD_RANGE 181 +#define K_SYSCALL_SYS_CACHE_DATA_FLUSH_RANGE 182 +#define K_SYSCALL_SYS_CACHE_DATA_INVD_RANGE 183 +#define K_SYSCALL_SYS_CLOCK_HW_CYCLES_PER_SEC_RUNTIME_GET 184 +#define K_SYSCALL_SYS_CSRAND_GET 185 +#define K_SYSCALL_SYS_RAND_GET 186 +#define K_SYSCALL_UART_CONFIGURE 187 +#define K_SYSCALL_UART_CONFIG_GET 188 +#define K_SYSCALL_UART_DRV_CMD 189 +#define K_SYSCALL_UART_ERR_CHECK 190 +#define K_SYSCALL_UART_IRQ_ERR_DISABLE 191 +#define K_SYSCALL_UART_IRQ_ERR_ENABLE 192 +#define K_SYSCALL_UART_IRQ_IS_PENDING 193 +#define K_SYSCALL_UART_IRQ_RX_DISABLE 194 +#define K_SYSCALL_UART_IRQ_RX_ENABLE 195 +#define K_SYSCALL_UART_IRQ_TX_DISABLE 196 +#define K_SYSCALL_UART_IRQ_TX_ENABLE 197 +#define K_SYSCALL_UART_IRQ_UPDATE 198 +#define K_SYSCALL_UART_LINE_CTRL_GET 199 +#define K_SYSCALL_UART_LINE_CTRL_SET 200 +#define K_SYSCALL_UART_POLL_IN 201 +#define K_SYSCALL_UART_POLL_IN_U16 202 +#define K_SYSCALL_UART_POLL_OUT 203 +#define K_SYSCALL_UART_POLL_OUT_U16 204 +#define K_SYSCALL_UART_RX_DISABLE 205 +#define K_SYSCALL_UART_RX_ENABLE 206 +#define K_SYSCALL_UART_RX_ENABLE_U16 207 +#define K_SYSCALL_UART_TX 208 +#define K_SYSCALL_UART_TX_ABORT 209 +#define K_SYSCALL_UART_TX_U16 210 +#define K_SYSCALL_ZEPHYR_FPUTC 211 +#define K_SYSCALL_ZEPHYR_FWRITE 212 +#define K_SYSCALL_ZEPHYR_READ_STDIN 213 +#define K_SYSCALL_ZEPHYR_WRITE_STDOUT 214 +#define K_SYSCALL_ZSOCK_ACCEPT 215 +#define K_SYSCALL_ZSOCK_BIND 216 +#define K_SYSCALL_ZSOCK_CLOSE 217 +#define K_SYSCALL_ZSOCK_CONNECT 218 +#define K_SYSCALL_ZSOCK_FCNTL_IMPL 219 +#define K_SYSCALL_ZSOCK_GETHOSTNAME 220 +#define K_SYSCALL_ZSOCK_GETPEERNAME 221 +#define K_SYSCALL_ZSOCK_GETSOCKNAME 222 +#define K_SYSCALL_ZSOCK_GETSOCKOPT 223 +#define K_SYSCALL_ZSOCK_GET_CONTEXT_OBJECT 224 +#define K_SYSCALL_ZSOCK_INET_PTON 225 +#define K_SYSCALL_ZSOCK_IOCTL_IMPL 226 +#define K_SYSCALL_ZSOCK_LISTEN 227 +#define K_SYSCALL_ZSOCK_RECVFROM 228 +#define K_SYSCALL_ZSOCK_RECVMSG 229 +#define K_SYSCALL_ZSOCK_SENDMSG 230 +#define K_SYSCALL_ZSOCK_SENDTO 231 +#define K_SYSCALL_ZSOCK_SETSOCKOPT 232 +#define K_SYSCALL_ZSOCK_SHUTDOWN 233 +#define K_SYSCALL_ZSOCK_SOCKET 234 +#define K_SYSCALL_ZSOCK_SOCKETPAIR 235 +#define K_SYSCALL_ZVFS_POLL 236 +#define K_SYSCALL_ZVFS_SELECT 237 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_0 238 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_1 239 +#define K_SYSCALL_Z_LOG_MSG_SIMPLE_CREATE_2 240 +#define K_SYSCALL_Z_LOG_MSG_STATIC_CREATE 241 +#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_LOCK 242 +#define K_SYSCALL_Z_SYS_MUTEX_KERNEL_UNLOCK 243 +#define K_SYSCALL_Z_ZSOCK_GETADDRINFO_INTERNAL 244 +#define K_SYSCALL___POSIX_CLOCK_GET_BASE 245 +#define K_SYSCALL_BAD 246 +#define K_SYSCALL_LIMIT 247 /* Following syscalls are not used in image */ -#define K_SYSCALL_ADC_CHANNEL_SETUP 233 -#define K_SYSCALL_ADC_READ 234 -#define K_SYSCALL_ADC_READ_ASYNC 235 -#define K_SYSCALL_ATOMIC_ADD 236 -#define K_SYSCALL_ATOMIC_AND 237 -#define K_SYSCALL_ATOMIC_CAS 238 -#define K_SYSCALL_ATOMIC_NAND 239 -#define K_SYSCALL_ATOMIC_OR 240 -#define K_SYSCALL_ATOMIC_PTR_CAS 241 -#define K_SYSCALL_ATOMIC_PTR_SET 242 -#define K_SYSCALL_ATOMIC_SET 243 -#define K_SYSCALL_ATOMIC_SUB 244 -#define K_SYSCALL_ATOMIC_XOR 245 -#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET 246 -#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET 247 -#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET 248 -#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET 249 -#define K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET 250 -#define K_SYSCALL_AUXDISPLAY_CLEAR 251 -#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET 252 -#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET 253 -#define K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED 254 -#define K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET 255 -#define K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET 256 -#define K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND 257 -#define K_SYSCALL_AUXDISPLAY_DISPLAY_OFF 258 -#define K_SYSCALL_AUXDISPLAY_DISPLAY_ON 259 -#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET 260 -#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET 261 -#define K_SYSCALL_AUXDISPLAY_IS_BUSY 262 -#define K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED 263 -#define K_SYSCALL_AUXDISPLAY_WRITE 264 -#define K_SYSCALL_BBRAM_CHECK_INVALID 265 -#define K_SYSCALL_BBRAM_CHECK_POWER 266 -#define K_SYSCALL_BBRAM_CHECK_STANDBY_POWER 267 -#define K_SYSCALL_BBRAM_GET_SIZE 268 -#define K_SYSCALL_BBRAM_READ 269 -#define K_SYSCALL_BBRAM_WRITE 270 -#define K_SYSCALL_BC12_SET_RESULT_CB 271 -#define K_SYSCALL_BC12_SET_ROLE 272 -#define K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ 273 -#define K_SYSCALL_CAN_CALC_TIMING 274 -#define K_SYSCALL_CAN_CALC_TIMING_DATA 275 -#define K_SYSCALL_CAN_GET_BITRATE_MAX 276 -#define K_SYSCALL_CAN_GET_BITRATE_MIN 277 -#define K_SYSCALL_CAN_GET_CAPABILITIES 278 -#define K_SYSCALL_CAN_GET_CORE_CLOCK 279 -#define K_SYSCALL_CAN_GET_MAX_FILTERS 280 -#define K_SYSCALL_CAN_GET_MODE 281 -#define K_SYSCALL_CAN_GET_STATE 282 -#define K_SYSCALL_CAN_GET_TIMING_DATA_MAX 283 -#define K_SYSCALL_CAN_GET_TIMING_DATA_MIN 284 -#define K_SYSCALL_CAN_GET_TIMING_MAX 285 -#define K_SYSCALL_CAN_GET_TIMING_MIN 286 -#define K_SYSCALL_CAN_GET_TRANSCEIVER 287 -#define K_SYSCALL_CAN_RECOVER 288 -#define K_SYSCALL_CAN_REMOVE_RX_FILTER 289 -#define K_SYSCALL_CAN_SEND 290 -#define K_SYSCALL_CAN_SET_BITRATE 291 -#define K_SYSCALL_CAN_SET_BITRATE_DATA 292 -#define K_SYSCALL_CAN_SET_MODE 293 -#define K_SYSCALL_CAN_SET_TIMING 294 -#define K_SYSCALL_CAN_SET_TIMING_DATA 295 -#define K_SYSCALL_CAN_START 296 -#define K_SYSCALL_CAN_STATS_GET_ACK_ERRORS 297 -#define K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS 298 -#define K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS 299 -#define K_SYSCALL_CAN_STATS_GET_BIT_ERRORS 300 -#define K_SYSCALL_CAN_STATS_GET_CRC_ERRORS 301 -#define K_SYSCALL_CAN_STATS_GET_FORM_ERRORS 302 -#define K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS 303 -#define K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS 304 -#define K_SYSCALL_CAN_STOP 305 -#define K_SYSCALL_CHARGER_CHARGE_ENABLE 306 -#define K_SYSCALL_CHARGER_GET_PROP 307 -#define K_SYSCALL_CHARGER_SET_PROP 308 -#define K_SYSCALL_COMPARATOR_GET_OUTPUT 309 -#define K_SYSCALL_COMPARATOR_SET_TRIGGER 310 -#define K_SYSCALL_COMPARATOR_TRIGGER_IS_PENDING 311 -#define K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM 312 -#define K_SYSCALL_COUNTER_GET_FREQUENCY 313 -#define K_SYSCALL_COUNTER_GET_GUARD_PERIOD 314 -#define K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE 315 -#define K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS 316 -#define K_SYSCALL_COUNTER_GET_PENDING_INT 317 -#define K_SYSCALL_COUNTER_GET_TOP_VALUE 318 -#define K_SYSCALL_COUNTER_GET_VALUE 319 -#define K_SYSCALL_COUNTER_GET_VALUE_64 320 -#define K_SYSCALL_COUNTER_IS_COUNTING_UP 321 -#define K_SYSCALL_COUNTER_SET_CHANNEL_ALARM 322 -#define K_SYSCALL_COUNTER_SET_GUARD_PERIOD 323 -#define K_SYSCALL_COUNTER_SET_TOP_VALUE 324 -#define K_SYSCALL_COUNTER_START 325 -#define K_SYSCALL_COUNTER_STOP 326 -#define K_SYSCALL_COUNTER_TICKS_TO_US 327 -#define K_SYSCALL_COUNTER_US_TO_TICKS 328 -#define K_SYSCALL_DAC_CHANNEL_SETUP 329 -#define K_SYSCALL_DAC_WRITE_VALUE 330 -#define K_SYSCALL_DEVMUX_SELECT_GET 331 -#define K_SYSCALL_DEVMUX_SELECT_SET 332 -#define K_SYSCALL_DMA_CHAN_FILTER 333 -#define K_SYSCALL_DMA_RELEASE_CHANNEL 334 -#define K_SYSCALL_DMA_REQUEST_CHANNEL 335 -#define K_SYSCALL_DMA_RESUME 336 -#define K_SYSCALL_DMA_START 337 -#define K_SYSCALL_DMA_STOP 338 -#define K_SYSCALL_DMA_SUSPEND 339 -#define K_SYSCALL_EEPROM_GET_SIZE 340 -#define K_SYSCALL_EEPROM_READ 341 -#define K_SYSCALL_EEPROM_WRITE 342 -#define K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF 343 -#define K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING 344 -#define K_SYSCALL_ESPI_CONFIG 345 -#define K_SYSCALL_ESPI_FLASH_ERASE 346 -#define K_SYSCALL_ESPI_GET_CHANNEL_STATUS 347 -#define K_SYSCALL_ESPI_READ_FLASH 348 -#define K_SYSCALL_ESPI_READ_LPC_REQUEST 349 -#define K_SYSCALL_ESPI_READ_REQUEST 350 -#define K_SYSCALL_ESPI_RECEIVE_OOB 351 -#define K_SYSCALL_ESPI_RECEIVE_VWIRE 352 -#define K_SYSCALL_ESPI_SAF_ACTIVATE 353 -#define K_SYSCALL_ESPI_SAF_CONFIG 354 -#define K_SYSCALL_ESPI_SAF_FLASH_ERASE 355 -#define K_SYSCALL_ESPI_SAF_FLASH_READ 356 -#define K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS 357 -#define K_SYSCALL_ESPI_SAF_FLASH_WRITE 358 -#define K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS 359 -#define K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS 360 -#define K_SYSCALL_ESPI_SEND_OOB 361 -#define K_SYSCALL_ESPI_SEND_VWIRE 362 -#define K_SYSCALL_ESPI_WRITE_FLASH 363 -#define K_SYSCALL_ESPI_WRITE_LPC_REQUEST 364 -#define K_SYSCALL_ESPI_WRITE_REQUEST 365 -#define K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY 366 -#define K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF 367 -#define K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP 368 -#define K_SYSCALL_FUEL_GAUGE_GET_PROP 369 -#define K_SYSCALL_FUEL_GAUGE_GET_PROPS 370 -#define K_SYSCALL_FUEL_GAUGE_SET_PROP 371 -#define K_SYSCALL_FUEL_GAUGE_SET_PROPS 372 -#define K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS 373 -#define K_SYSCALL_GNSS_GET_FIX_RATE 374 -#define K_SYSCALL_GNSS_GET_LATEST_TIMEPULSE 375 -#define K_SYSCALL_GNSS_GET_NAVIGATION_MODE 376 -#define K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS 377 -#define K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS 378 -#define K_SYSCALL_GNSS_SET_FIX_RATE 379 -#define K_SYSCALL_GNSS_SET_NAVIGATION_MODE 380 -#define K_SYSCALL_HAPTICS_START_OUTPUT 381 -#define K_SYSCALL_HAPTICS_STOP_OUTPUT 382 -#define K_SYSCALL_HWSPINLOCK_GET_MAX_ID 383 -#define K_SYSCALL_HWSPINLOCK_LOCK 384 -#define K_SYSCALL_HWSPINLOCK_TRYLOCK 385 -#define K_SYSCALL_HWSPINLOCK_UNLOCK 386 -#define K_SYSCALL_I2S_BUF_READ 387 -#define K_SYSCALL_I2S_BUF_WRITE 388 -#define K_SYSCALL_I2S_CONFIGURE 389 -#define K_SYSCALL_I2S_TRIGGER 390 -#define K_SYSCALL_I3C_DO_CCC 391 -#define K_SYSCALL_I3C_TRANSFER 392 -#define K_SYSCALL_IPM_COMPLETE 393 -#define K_SYSCALL_IPM_MAX_DATA_SIZE_GET 394 -#define K_SYSCALL_IPM_MAX_ID_VAL_GET 395 -#define K_SYSCALL_IPM_SEND 396 -#define K_SYSCALL_IPM_SET_ENABLED 397 -#define K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS 398 -#define K_SYSCALL_IVSHMEM_GET_ID 399 -#define K_SYSCALL_IVSHMEM_GET_MAX_PEERS 400 -#define K_SYSCALL_IVSHMEM_GET_MEM 401 -#define K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION 402 -#define K_SYSCALL_IVSHMEM_GET_PROTOCOL 403 -#define K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION 404 -#define K_SYSCALL_IVSHMEM_GET_STATE 405 -#define K_SYSCALL_IVSHMEM_GET_VECTORS 406 -#define K_SYSCALL_IVSHMEM_INT_PEER 407 -#define K_SYSCALL_IVSHMEM_REGISTER_HANDLER 408 -#define K_SYSCALL_IVSHMEM_SET_STATE 409 -#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET 410 -#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET 411 -#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET 412 -#define K_SYSCALL_K_MEM_PAGING_STATS_GET 413 -#define K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET 414 -#define K_SYSCALL_LED_BLINK 415 -#define K_SYSCALL_LED_GET_INFO 416 -#define K_SYSCALL_LED_OFF 417 -#define K_SYSCALL_LED_ON 418 -#define K_SYSCALL_LED_SET_BRIGHTNESS 419 -#define K_SYSCALL_LED_SET_CHANNEL 420 -#define K_SYSCALL_LED_SET_COLOR 421 -#define K_SYSCALL_LED_WRITE_CHANNELS 422 -#define K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT 423 -#define K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT 424 -#define K_SYSCALL_MBOX_MAX_CHANNELS_GET 425 -#define K_SYSCALL_MBOX_MTU_GET 426 -#define K_SYSCALL_MBOX_SEND 427 -#define K_SYSCALL_MBOX_SET_ENABLED 428 -#define K_SYSCALL_MDIO_BUS_DISABLE 429 -#define K_SYSCALL_MDIO_BUS_ENABLE 430 -#define K_SYSCALL_MDIO_READ 431 -#define K_SYSCALL_MDIO_READ_C45 432 -#define K_SYSCALL_MDIO_WRITE 433 -#define K_SYSCALL_MDIO_WRITE_C45 434 -#define K_SYSCALL_MSPI_CONFIG 435 -#define K_SYSCALL_MSPI_DEV_CONFIG 436 -#define K_SYSCALL_MSPI_GET_CHANNEL_STATUS 437 -#define K_SYSCALL_MSPI_SCRAMBLE_CONFIG 438 -#define K_SYSCALL_MSPI_TIMING_CONFIG 439 -#define K_SYSCALL_MSPI_TRANSCEIVE 440 -#define K_SYSCALL_MSPI_XIP_CONFIG 441 -#define K_SYSCALL_NET_SOCKET_SERVICE_REGISTER 442 -#define K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE 443 -#define K_SYSCALL_PECI_CONFIG 444 -#define K_SYSCALL_PECI_DISABLE 445 -#define K_SYSCALL_PECI_ENABLE 446 -#define K_SYSCALL_PECI_TRANSFER 447 -#define K_SYSCALL_PS2_CONFIG 448 -#define K_SYSCALL_PS2_DISABLE_CALLBACK 449 -#define K_SYSCALL_PS2_ENABLE_CALLBACK 450 -#define K_SYSCALL_PS2_READ 451 -#define K_SYSCALL_PS2_WRITE 452 -#define K_SYSCALL_PTP_CLOCK_GET 453 -#define K_SYSCALL_PWM_CAPTURE_CYCLES 454 -#define K_SYSCALL_PWM_DISABLE_CAPTURE 455 -#define K_SYSCALL_PWM_ENABLE_CAPTURE 456 -#define K_SYSCALL_PWM_GET_CYCLES_PER_SEC 457 -#define K_SYSCALL_PWM_SET_CYCLES 458 +#define K_SYSCALL_ATOMIC_ADD 248 +#define K_SYSCALL_ATOMIC_AND 249 +#define K_SYSCALL_ATOMIC_CAS 250 +#define K_SYSCALL_ATOMIC_NAND 251 +#define K_SYSCALL_ATOMIC_OR 252 +#define K_SYSCALL_ATOMIC_PTR_CAS 253 +#define K_SYSCALL_ATOMIC_PTR_SET 254 +#define K_SYSCALL_ATOMIC_SET 255 +#define K_SYSCALL_ATOMIC_SUB 256 +#define K_SYSCALL_ATOMIC_XOR 257 +#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_GET 258 +#define K_SYSCALL_AUXDISPLAY_BACKLIGHT_SET 259 +#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_GET 260 +#define K_SYSCALL_AUXDISPLAY_BRIGHTNESS_SET 261 +#define K_SYSCALL_AUXDISPLAY_CAPABILITIES_GET 262 +#define K_SYSCALL_AUXDISPLAY_CLEAR 263 +#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_GET 264 +#define K_SYSCALL_AUXDISPLAY_CURSOR_POSITION_SET 265 +#define K_SYSCALL_AUXDISPLAY_CURSOR_SET_ENABLED 266 +#define K_SYSCALL_AUXDISPLAY_CURSOR_SHIFT_SET 267 +#define K_SYSCALL_AUXDISPLAY_CUSTOM_CHARACTER_SET 268 +#define K_SYSCALL_AUXDISPLAY_CUSTOM_COMMAND 269 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_OFF 270 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_ON 271 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_GET 272 +#define K_SYSCALL_AUXDISPLAY_DISPLAY_POSITION_SET 273 +#define K_SYSCALL_AUXDISPLAY_IS_BUSY 274 +#define K_SYSCALL_AUXDISPLAY_POSITION_BLINKING_SET_ENABLED 275 +#define K_SYSCALL_AUXDISPLAY_WRITE 276 +#define K_SYSCALL_BBRAM_CHECK_INVALID 277 +#define K_SYSCALL_BBRAM_CHECK_POWER 278 +#define K_SYSCALL_BBRAM_CHECK_STANDBY_POWER 279 +#define K_SYSCALL_BBRAM_GET_SIZE 280 +#define K_SYSCALL_BBRAM_READ 281 +#define K_SYSCALL_BBRAM_WRITE 282 +#define K_SYSCALL_BC12_SET_RESULT_CB 283 +#define K_SYSCALL_BC12_SET_ROLE 284 +#define K_SYSCALL_CAN_ADD_RX_FILTER_MSGQ 285 +#define K_SYSCALL_CAN_CALC_TIMING 286 +#define K_SYSCALL_CAN_CALC_TIMING_DATA 287 +#define K_SYSCALL_CAN_GET_BITRATE_MAX 288 +#define K_SYSCALL_CAN_GET_BITRATE_MIN 289 +#define K_SYSCALL_CAN_GET_CAPABILITIES 290 +#define K_SYSCALL_CAN_GET_CORE_CLOCK 291 +#define K_SYSCALL_CAN_GET_MAX_FILTERS 292 +#define K_SYSCALL_CAN_GET_MODE 293 +#define K_SYSCALL_CAN_GET_STATE 294 +#define K_SYSCALL_CAN_GET_TIMING_DATA_MAX 295 +#define K_SYSCALL_CAN_GET_TIMING_DATA_MIN 296 +#define K_SYSCALL_CAN_GET_TIMING_MAX 297 +#define K_SYSCALL_CAN_GET_TIMING_MIN 298 +#define K_SYSCALL_CAN_GET_TRANSCEIVER 299 +#define K_SYSCALL_CAN_RECOVER 300 +#define K_SYSCALL_CAN_REMOVE_RX_FILTER 301 +#define K_SYSCALL_CAN_SEND 302 +#define K_SYSCALL_CAN_SET_BITRATE 303 +#define K_SYSCALL_CAN_SET_BITRATE_DATA 304 +#define K_SYSCALL_CAN_SET_MODE 305 +#define K_SYSCALL_CAN_SET_TIMING 306 +#define K_SYSCALL_CAN_SET_TIMING_DATA 307 +#define K_SYSCALL_CAN_START 308 +#define K_SYSCALL_CAN_STATS_GET_ACK_ERRORS 309 +#define K_SYSCALL_CAN_STATS_GET_BIT0_ERRORS 310 +#define K_SYSCALL_CAN_STATS_GET_BIT1_ERRORS 311 +#define K_SYSCALL_CAN_STATS_GET_BIT_ERRORS 312 +#define K_SYSCALL_CAN_STATS_GET_CRC_ERRORS 313 +#define K_SYSCALL_CAN_STATS_GET_FORM_ERRORS 314 +#define K_SYSCALL_CAN_STATS_GET_RX_OVERRUNS 315 +#define K_SYSCALL_CAN_STATS_GET_STUFF_ERRORS 316 +#define K_SYSCALL_CAN_STOP 317 +#define K_SYSCALL_CHARGER_CHARGE_ENABLE 318 +#define K_SYSCALL_CHARGER_GET_PROP 319 +#define K_SYSCALL_CHARGER_SET_PROP 320 +#define K_SYSCALL_COMPARATOR_GET_OUTPUT 321 +#define K_SYSCALL_COMPARATOR_SET_TRIGGER 322 +#define K_SYSCALL_COMPARATOR_TRIGGER_IS_PENDING 323 +#define K_SYSCALL_COUNTER_CANCEL_CHANNEL_ALARM 324 +#define K_SYSCALL_COUNTER_GET_FREQUENCY 325 +#define K_SYSCALL_COUNTER_GET_GUARD_PERIOD 326 +#define K_SYSCALL_COUNTER_GET_MAX_TOP_VALUE 327 +#define K_SYSCALL_COUNTER_GET_NUM_OF_CHANNELS 328 +#define K_SYSCALL_COUNTER_GET_PENDING_INT 329 +#define K_SYSCALL_COUNTER_GET_TOP_VALUE 330 +#define K_SYSCALL_COUNTER_GET_VALUE 331 +#define K_SYSCALL_COUNTER_GET_VALUE_64 332 +#define K_SYSCALL_COUNTER_IS_COUNTING_UP 333 +#define K_SYSCALL_COUNTER_SET_CHANNEL_ALARM 334 +#define K_SYSCALL_COUNTER_SET_GUARD_PERIOD 335 +#define K_SYSCALL_COUNTER_SET_TOP_VALUE 336 +#define K_SYSCALL_COUNTER_START 337 +#define K_SYSCALL_COUNTER_STOP 338 +#define K_SYSCALL_COUNTER_TICKS_TO_US 339 +#define K_SYSCALL_COUNTER_US_TO_TICKS 340 +#define K_SYSCALL_DAC_CHANNEL_SETUP 341 +#define K_SYSCALL_DAC_WRITE_VALUE 342 +#define K_SYSCALL_DEVMUX_SELECT_GET 343 +#define K_SYSCALL_DEVMUX_SELECT_SET 344 +#define K_SYSCALL_EEPROM_GET_SIZE 345 +#define K_SYSCALL_EEPROM_READ 346 +#define K_SYSCALL_EEPROM_WRITE 347 +#define K_SYSCALL_EMUL_FUEL_GAUGE_IS_BATTERY_CUTOFF 348 +#define K_SYSCALL_EMUL_FUEL_GAUGE_SET_BATTERY_CHARGING 349 +#define K_SYSCALL_ESPI_CONFIG 350 +#define K_SYSCALL_ESPI_FLASH_ERASE 351 +#define K_SYSCALL_ESPI_GET_CHANNEL_STATUS 352 +#define K_SYSCALL_ESPI_READ_FLASH 353 +#define K_SYSCALL_ESPI_READ_LPC_REQUEST 354 +#define K_SYSCALL_ESPI_READ_REQUEST 355 +#define K_SYSCALL_ESPI_RECEIVE_OOB 356 +#define K_SYSCALL_ESPI_RECEIVE_VWIRE 357 +#define K_SYSCALL_ESPI_SAF_ACTIVATE 358 +#define K_SYSCALL_ESPI_SAF_CONFIG 359 +#define K_SYSCALL_ESPI_SAF_FLASH_ERASE 360 +#define K_SYSCALL_ESPI_SAF_FLASH_READ 361 +#define K_SYSCALL_ESPI_SAF_FLASH_UNSUCCESS 362 +#define K_SYSCALL_ESPI_SAF_FLASH_WRITE 363 +#define K_SYSCALL_ESPI_SAF_GET_CHANNEL_STATUS 364 +#define K_SYSCALL_ESPI_SAF_SET_PROTECTION_REGIONS 365 +#define K_SYSCALL_ESPI_SEND_OOB 366 +#define K_SYSCALL_ESPI_SEND_VWIRE 367 +#define K_SYSCALL_ESPI_WRITE_FLASH 368 +#define K_SYSCALL_ESPI_WRITE_LPC_REQUEST 369 +#define K_SYSCALL_ESPI_WRITE_REQUEST 370 +#define K_SYSCALL_FLASH_SIMULATOR_GET_MEMORY 371 +#define K_SYSCALL_FUEL_GAUGE_BATTERY_CUTOFF 372 +#define K_SYSCALL_FUEL_GAUGE_GET_BUFFER_PROP 373 +#define K_SYSCALL_FUEL_GAUGE_GET_PROP 374 +#define K_SYSCALL_FUEL_GAUGE_GET_PROPS 375 +#define K_SYSCALL_FUEL_GAUGE_SET_PROP 376 +#define K_SYSCALL_FUEL_GAUGE_SET_PROPS 377 +#define K_SYSCALL_GNSS_GET_ENABLED_SYSTEMS 378 +#define K_SYSCALL_GNSS_GET_FIX_RATE 379 +#define K_SYSCALL_GNSS_GET_LATEST_TIMEPULSE 380 +#define K_SYSCALL_GNSS_GET_NAVIGATION_MODE 381 +#define K_SYSCALL_GNSS_GET_SUPPORTED_SYSTEMS 382 +#define K_SYSCALL_GNSS_SET_ENABLED_SYSTEMS 383 +#define K_SYSCALL_GNSS_SET_FIX_RATE 384 +#define K_SYSCALL_GNSS_SET_NAVIGATION_MODE 385 +#define K_SYSCALL_HAPTICS_START_OUTPUT 386 +#define K_SYSCALL_HAPTICS_STOP_OUTPUT 387 +#define K_SYSCALL_HWSPINLOCK_GET_MAX_ID 388 +#define K_SYSCALL_HWSPINLOCK_LOCK 389 +#define K_SYSCALL_HWSPINLOCK_TRYLOCK 390 +#define K_SYSCALL_HWSPINLOCK_UNLOCK 391 +#define K_SYSCALL_I2S_BUF_READ 392 +#define K_SYSCALL_I2S_BUF_WRITE 393 +#define K_SYSCALL_I2S_CONFIGURE 394 +#define K_SYSCALL_I2S_TRIGGER 395 +#define K_SYSCALL_I3C_DO_CCC 396 +#define K_SYSCALL_I3C_TRANSFER 397 +#define K_SYSCALL_IPM_COMPLETE 398 +#define K_SYSCALL_IPM_MAX_DATA_SIZE_GET 399 +#define K_SYSCALL_IPM_MAX_ID_VAL_GET 400 +#define K_SYSCALL_IPM_SEND 401 +#define K_SYSCALL_IPM_SET_ENABLED 402 +#define K_SYSCALL_IVSHMEM_ENABLE_INTERRUPTS 403 +#define K_SYSCALL_IVSHMEM_GET_ID 404 +#define K_SYSCALL_IVSHMEM_GET_MAX_PEERS 405 +#define K_SYSCALL_IVSHMEM_GET_MEM 406 +#define K_SYSCALL_IVSHMEM_GET_OUTPUT_MEM_SECTION 407 +#define K_SYSCALL_IVSHMEM_GET_PROTOCOL 408 +#define K_SYSCALL_IVSHMEM_GET_RW_MEM_SECTION 409 +#define K_SYSCALL_IVSHMEM_GET_STATE 410 +#define K_SYSCALL_IVSHMEM_GET_VECTORS 411 +#define K_SYSCALL_IVSHMEM_INT_PEER 412 +#define K_SYSCALL_IVSHMEM_REGISTER_HANDLER 413 +#define K_SYSCALL_IVSHMEM_SET_STATE 414 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_IN_GET 415 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_BACKING_STORE_PAGE_OUT_GET 416 +#define K_SYSCALL_K_MEM_PAGING_HISTOGRAM_EVICTION_GET 417 +#define K_SYSCALL_K_MEM_PAGING_STATS_GET 418 +#define K_SYSCALL_K_MEM_PAGING_THREAD_STATS_GET 419 +#define K_SYSCALL_LED_BLINK 420 +#define K_SYSCALL_LED_GET_INFO 421 +#define K_SYSCALL_LED_OFF 422 +#define K_SYSCALL_LED_ON 423 +#define K_SYSCALL_LED_SET_BRIGHTNESS 424 +#define K_SYSCALL_LED_SET_CHANNEL 425 +#define K_SYSCALL_LED_SET_COLOR 426 +#define K_SYSCALL_LED_WRITE_CHANNELS 427 +#define K_SYSCALL_MAXIM_DS3231_GET_SYNCPOINT 428 +#define K_SYSCALL_MAXIM_DS3231_REQ_SYNCPOINT 429 +#define K_SYSCALL_MBOX_MAX_CHANNELS_GET 430 +#define K_SYSCALL_MBOX_MTU_GET 431 +#define K_SYSCALL_MBOX_SEND 432 +#define K_SYSCALL_MBOX_SET_ENABLED 433 +#define K_SYSCALL_MDIO_BUS_DISABLE 434 +#define K_SYSCALL_MDIO_BUS_ENABLE 435 +#define K_SYSCALL_MDIO_READ 436 +#define K_SYSCALL_MDIO_READ_C45 437 +#define K_SYSCALL_MDIO_WRITE 438 +#define K_SYSCALL_MDIO_WRITE_C45 439 +#define K_SYSCALL_MSPI_CONFIG 440 +#define K_SYSCALL_MSPI_DEV_CONFIG 441 +#define K_SYSCALL_MSPI_GET_CHANNEL_STATUS 442 +#define K_SYSCALL_MSPI_SCRAMBLE_CONFIG 443 +#define K_SYSCALL_MSPI_TIMING_CONFIG 444 +#define K_SYSCALL_MSPI_TRANSCEIVE 445 +#define K_SYSCALL_MSPI_XIP_CONFIG 446 +#define K_SYSCALL_NET_SOCKET_SERVICE_REGISTER 447 +#define K_SYSCALL_NRF_QSPI_NOR_XIP_ENABLE 448 +#define K_SYSCALL_PECI_CONFIG 449 +#define K_SYSCALL_PECI_DISABLE 450 +#define K_SYSCALL_PECI_ENABLE 451 +#define K_SYSCALL_PECI_TRANSFER 452 +#define K_SYSCALL_PS2_CONFIG 453 +#define K_SYSCALL_PS2_DISABLE_CALLBACK 454 +#define K_SYSCALL_PS2_ENABLE_CALLBACK 455 +#define K_SYSCALL_PS2_READ 456 +#define K_SYSCALL_PS2_WRITE 457 +#define K_SYSCALL_PTP_CLOCK_GET 458 #define K_SYSCALL_RETAINED_MEM_CLEAR 459 #define K_SYSCALL_RETAINED_MEM_READ 460 #define K_SYSCALL_RETAINED_MEM_SIZE 461 diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/version.h b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/version.h index 9a30242a..76aa14d4 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/version.h +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/llext-edk/include/zephyr/include/generated/zephyr/version.h @@ -19,7 +19,7 @@ #define KERNEL_VERSION_EXTENDED_STRING "4.1.99+0" #define KERNEL_VERSION_TWEAK_STRING "4.1.99+0" -#define BUILD_VERSION v4.1.0-894-g9f06fc60e255 +#define BUILD_VERSION v4.1.0-898-g6b32f4d75066 #endif /* _KERNEL_VERSION_H_ */ diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/provides.ld b/variants/arduino_portenta_h7_stm32h747xx_m7/provides.ld index 59e2252a..5485c0b6 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/provides.ld +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/provides.ld @@ -1,2332 +1,2634 @@ -PROVIDE(cmd_kernel_uptime = 0x080414e9); -PROVIDE(clock_control_on = 0x08072167); -PROVIDE(eth_stm32_hal_get_capabilities = 0x08072175); -PROVIDE(eth_stm32_hal_get_phy = 0x08057a09); -PROVIDE(k_uptime_get_32 = 0x08072179); -PROVIDE(eth0_irq_config = 0x08072189); -PROVIDE(eth_isr = 0x0807219f); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080721a7); -PROVIDE(eth_initialize = 0x08057a11); -PROVIDE(rx_thread = 0x08041661); -PROVIDE(allocate_tx_buffer = 0x08057b39); -PROVIDE(eth_stm32_hal_set_config = 0x080721c5); -PROVIDE(eth_iface_init = 0x08057b65); -PROVIDE(eth_tx = 0x08057ea9); -PROVIDE(mulShift64 = 0x080792e9); -PROVIDE(loader = 0x08042f05); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080430c9); -PROVIDE(stdinout_read_vmeth = 0x0806afd1); -PROVIDE(stdinout_ioctl_vmeth = 0x08043851); -PROVIDE(_check_fd = 0x08043869); -PROVIDE(zvfs_fdtable_call_ioctl = 0x0806afd5); -PROVIDE(stdinout_write_vmeth = 0x0806aff3); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0806aff7); -PROVIDE(k_mutex_unlock.isra.0 = 0x0806affb); -PROVIDE(z_fd_unref.isra.0 = 0x080438a1); -PROVIDE(st_stm32_common_config = 0x08043c45); -PROVIDE(stm32h7_m4_wakeup = 0x08043c61); -PROVIDE(dummy_timestamp = 0x0806b505); -PROVIDE(default_lf_get_timestamp = 0x0806b509); -PROVIDE(atomic_inc = 0x0806b519); -PROVIDE(z_log_init.isra.0 = 0x08043d25); -PROVIDE(enable_logger = 0x0806b533); -PROVIDE(backend_filter_set = 0x08044099); -PROVIDE(z_cbprintf_cpy = 0x0806b5c1); -PROVIDE(z_log_msg_simple_create = 0x0806b61f); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0806b68d); -PROVIDE(log_output_write = 0x0806b6eb); -PROVIDE(out_func = 0x0806b707); -PROVIDE(cr_out_func = 0x0806b723); -PROVIDE(print_formatted = 0x080442cd); -PROVIDE(newline_print = 0x080442f1); -PROVIDE(get_ep_bm_from_addr = 0x0806b7d5); -PROVIDE(class_handler = 0x08044671); -PROVIDE(custom_handler = 0x080446b1); -PROVIDE(vendor_handler = 0x08044711); -PROVIDE(disable_endpoint = 0x0804474d); -PROVIDE(usb_reset_alt_setting = 0x08044779); -PROVIDE(is_ep_valid.part.0 = 0x08044789); -PROVIDE(usb_handle_request.constprop.0 = 0x080447c1); -PROVIDE(forward_status_cb = 0x080447ed); -PROVIDE(usb_halt_endpoint_req.isra.0 = 0x08044899); -PROVIDE(set_endpoint = 0x080448e9); -PROVIDE(usb_handle_standard_request = 0x0804496d); -PROVIDE(usb_data_to_host = 0x08044cb9); -PROVIDE(usb_handle_control_transfer = 0x08044d19); -PROVIDE(usb_device_init = 0x0806b823); -PROVIDE(usb_ep_get_transfer = 0x080451cd); -PROVIDE(usb_transfer_work = 0x080451f9); -PROVIDE(cdc_interface_config = 0x0806b89b); -PROVIDE(cdc_acm_irq_callback_work_handler = 0x0806b8af); -PROVIDE(cdc_acm_irq_tx_disable = 0x0806b8b9); -PROVIDE(cdc_acm_irq_tx_ready = 0x0806b8c3); -PROVIDE(cdc_acm_irq_rx_disable = 0x0806b8e3); -PROVIDE(cdc_acm_irq_rx_ready = 0x0806b8ed); -PROVIDE(cdc_acm_irq_is_pending = 0x0806b8fb); -PROVIDE(cdc_acm_irq_callback_set = 0x0806b917); -PROVIDE(cdc_acm_line_ctrl_get = 0x0806b91f); -PROVIDE(cdc_acm_configure = 0x0806b951); -PROVIDE(cdc_acm_config_get = 0x0806b969); -PROVIDE(cdc_acm_irq_rx_enable = 0x080454e5); -PROVIDE(cdc_acm_irq_tx_enable = 0x08045505); -PROVIDE(cdc_acm_fifo_fill = 0x08045525); -PROVIDE(cdc_acm_write_cb = 0x08045561); -PROVIDE(cdc_acm_int_in = 0x08045635); -PROVIDE(cdc_acm_reset_port = 0x0804564d); -PROVIDE(cdc_acm_init = 0x08045689); -PROVIDE(tx_work_handler = 0x08045785); -PROVIDE(cdc_acm_send_notification.isra.0 = 0x080456d1); -PROVIDE(cdc_acm_line_ctrl_set = 0x0806b9c5); -PROVIDE(cdc_acm_poll_out = 0x08045715); -PROVIDE(cdc_acm_read_cb = 0x08045801); -PROVIDE(cdc_acm_fifo_read = 0x0806ba83); -PROVIDE(cdc_acm_poll_in = 0x0806bacd); -PROVIDE(cdc_acm_dev_status_cb = 0x08045879); -PROVIDE(cdc_acm_irq_update = 0x0806badf); -PROVIDE(z_usb_work_q_init = 0x08045911); -PROVIDE(cmd_kernel_cycles = 0x08045945); -PROVIDE(cmd_kernel_sleep = 0x08045961); -PROVIDE(cmd_kernel_version = 0x080459a1); -PROVIDE(cmd_kernel_log_level_set = 0x080459b9); -PROVIDE(thread_valid_cb = 0x0806bb1f); -PROVIDE(cmd_kernel_thread_list = 0x08045a5d); -PROVIDE(shell_tdata_dump = 0x08045a91); -PROVIDE(cmd_kernel_thread_stacks = 0x08045b51); -PROVIDE(shell_stack_dump = 0x08045bc1); -PROVIDE(cmd_kernel_thread_suspend = 0x08045c21); -PROVIDE(cmd_kernel_thread_resume = 0x08045c85); -PROVIDE(cmd_kernel_thread_kill = 0x08045ce9); -PROVIDE(cmd_device_list = 0x08045d4d); -PROVIDE(date_print = 0x08045e25); -PROVIDE(cmd_date_get = 0x0806bb2b); -PROVIDE(get_h_m_s = 0x08045e51); -PROVIDE(cmd_date_set = 0x08045ee9); -PROVIDE(cmd_devmem = 0x08045ff5); -PROVIDE(cmd_dump = 0x080460b9); -PROVIDE(set_bypass.isra.0 = 0x08046231); -PROVIDE(bypass_cb = 0x0804627d); -PROVIDE(cmd_load = 0x08046391); -PROVIDE(log_msg_generic_get_wlen = 0x0806bb4f); -PROVIDE(z_impl_uart_irq_tx_enable = 0x0806bb6f); -PROVIDE(uart_irq_tx_disable = 0x0806bb79); -PROVIDE(enable = 0x0806bb83); -PROVIDE(read_uart = 0x0806bb95); -PROVIDE(uart_dtr_check = 0x0806bba7); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08046469); -PROVIDE(enable_shell_uart = 0x0804648d); -PROVIDE(write_uart = 0x0806bbd1); -PROVIDE(init = 0x080464c5); -PROVIDE(uart_callback = 0x08046531); -PROVIDE(dtr_timer_handler = 0x0806bc57); -PROVIDE(uninit = 0x0806bc37); -PROVIDE(cmd_buffer_clear = 0x0806bc77); -PROVIDE(atomic_or = 0x0806bc8d); -PROVIDE(atomic_and = 0x0806bcab); -PROVIDE(k_mutex_lock = 0x0806bcc9); -PROVIDE(z_shell_raw_fprintf = 0x0806bccd); -PROVIDE(shell_internal_help_print = 0x08046699); -PROVIDE(z_shell_strlen = 0x0806bce7); -PROVIDE(shell_log_process = 0x0806bcf3); -PROVIDE(transport_evt_handler = 0x0806bd25); -PROVIDE(kill_handler = 0x080466b9); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x08046715); -PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x0806bd3d); -PROVIDE(z_flag_history_exit_set.isra.0 = 0x0806bd55); -PROVIDE(history_handle = 0x08046721); -PROVIDE(z_flag_insert_mode_set.isra.0 = 0x0806bd6b); -PROVIDE(k_mutex_unlock.isra.0 = 0x0806bd8b); -PROVIDE(execute = 0x080467d1); -PROVIDE(shell_signal_handle = 0x0806bd8f); -PROVIDE(state_set.constprop.0 = 0x08046a99); -PROVIDE(cmd_help = 0x0804728d); -PROVIDE(out_func = 0x0806c001); -PROVIDE(z_shell_strlen = 0x0806c03d); -PROVIDE(z_shell_raw_fprintf = 0x0806c41f); -PROVIDE(z_clear_eos = 0x0804757d); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x08047599); -PROVIDE(full_line_cmd.isra.0 = 0x0806c439); -PROVIDE(reprint_from_cursor = 0x080477c5); -PROVIDE(data_insert = 0x0806c74d); -PROVIDE(z_shell_raw_fprintf = 0x0806c9dd); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x08047949); -PROVIDE(formatted_text_print.constprop.0 = 0x0806c9f7); -PROVIDE(cmd_comment = 0x0806cad9); -PROVIDE(cmd_shell_stats_reset = 0x0806cadd); -PROVIDE(z_shell_raw_fprintf = 0x0806cae5); -PROVIDE(cmd_resize_default = 0x08047a71); -PROVIDE(cmd_shell_stats_show = 0x08047a9d); -PROVIDE(cmd_backends = 0x08047ab1); -PROVIDE(cmd_prompt_on = 0x0806caff); -PROVIDE(cmd_prompt_off = 0x08047b01); -PROVIDE(cmd_history = 0x08047b11); -PROVIDE(cmd_get_retval = 0x08047b51); -PROVIDE(cmd_echo = 0x08047b6d); -PROVIDE(cmd_clear = 0x08047bbd); -PROVIDE(cmd_resize = 0x08047bf5); -PROVIDE(cmd_vt100_off = 0x0806cb0b); -PROVIDE(cmd_bacskpace_mode_delete = 0x0806cb2f); -PROVIDE(cmd_colors_off = 0x0806cb53); -PROVIDE(cmd_bacskpace_mode_backspace = 0x0806cb77); -PROVIDE(cmd_echo_off = 0x0806cb9b); -PROVIDE(cmd_colors_on = 0x0806cbbf); -PROVIDE(cmd_vt100_on = 0x0806cbe3); -PROVIDE(cmd_echo_on = 0x0806cc07); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0806ce49); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0806cf81); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0806cfa9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0806cfc9); -PROVIDE(bus_fault.constprop.0 = 0x080484f9); -PROVIDE(usage_fault.constprop.0 = 0x08048665); -PROVIDE(mem_manage_fault = 0x08048795); -PROVIDE(size_to_mpu_rasr_size = 0x0806d021); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0806d041); -PROVIDE(region_allocate_and_init = 0x08049125); -PROVIDE(mpu_configure_regions = 0x08049189); -PROVIDE(cbputc = 0x0806d061); -PROVIDE(picolibc_put = 0x0806d06d); -PROVIDE(malloc_prepare = 0x080494c9); -PROVIDE(malloc_lock = 0x080494ed); -PROVIDE(malloc_unlock = 0x08049501); -PROVIDE(pthread_barrier_pool_init = 0x080495c9); -PROVIDE(posix_fs_alloc_obj = 0x08049769); -PROVIDE(fs_close_vmeth = 0x0806d2eb); -PROVIDE(fs_ioctl_vmeth = 0x080497b5); -PROVIDE(fs_write_vmeth = 0x08049811); -PROVIDE(fs_read_vmeth = 0x08049831); -PROVIDE(pthread_cond_pool_init = 0x080499f5); -PROVIDE(pthread_mutex_pool_init = 0x08049a11); -PROVIDE(posix_thread_pool_init = 0x08049a2d); -PROVIDE(fixed_data_unref = 0x0806d367); -PROVIDE(net_buf_destroy = 0x08049a65); -PROVIDE(fixed_data_alloc = 0x08049ac5); -PROVIDE(zvfs_eventfd_ioctl_op = 0x08049c21); -PROVIDE(zvfs_eventfd_write_locked = 0x0806d473); -PROVIDE(zvfs_eventfd_rw_op = 0x08049d51); -PROVIDE(zvfs_eventfd_write_op = 0x08049e4d); -PROVIDE(zvfs_eventfd_read_op = 0x08049e59); -PROVIDE(zvfs_eventfd_read_locked = 0x0806d4df); -PROVIDE(zvfs_eventfd_close_op = 0x08049e65); -PROVIDE(zvfs_fdtable_call_ioctl = 0x0806d53f); -PROVIDE(board_init = 0x0804a3e5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0806d587); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0804a419); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x0804a429); -PROVIDE(fs_get_mnt_point = 0x0804a435); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0806d5a5); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x0804a941); -PROVIDE(call_fn_table = 0x0804a94d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0804ac8d); -PROVIDE(llext_copy_region = 0x0804acb1); -PROVIDE(llext_read = 0x0806d643); -PROVIDE(llext_seek = 0x0806d647); -PROVIDE(llext_peek = 0x0806d64b); -PROVIDE(llext_alloc = 0x0804ae01); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0806d655); -PROVIDE(llext_find_extension_sym_iterate = 0x0806d697); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0806d6af); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0804bc69); -PROVIDE(llext_shell_name_cb = 0x0806d805); -PROVIDE(llext_name_get = 0x0804bd3d); -PROVIDE(llext_name_arg_get = 0x0806d81b); -PROVIDE(cmd_llext_list_symbols = 0x0804bd6d); -PROVIDE(cmd_llext_list = 0x0804bdd9); -PROVIDE(llext_shell_list_cb = 0x0804bdf9); -PROVIDE(cmd_llext_load_hex = 0x0804be11); -PROVIDE(cmd_llext_load_fs = 0x0804bee5); -PROVIDE(cmd_llext_call_fn = 0x0804bfa5); -PROVIDE(cmd_llext_unload = 0x0804bfd1); -PROVIDE(trigger_net_event = 0x0804c011); -PROVIDE(dns_resolve_cb = 0x0806d82d); -PROVIDE(zvfs_fdtable_call_ioctl = 0x0806d9ab); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0806d9c9); -PROVIDE(k_mutex_unlock.isra.0 = 0x0806d9cd); -PROVIDE(inet_is_supported = 0x0806da0b); -PROVIDE(net_if_get_by_index = 0x0806da17); -PROVIDE(zsock_connected_cb = 0x0806da1b); -PROVIDE(ipv4_multicast_group.constprop.0 = 0x0804c889); -PROVIDE(zsock_socket_internal = 0x0804c8d9); -PROVIDE(zsock_accepted_cb = 0x0804c961); -PROVIDE(zsock_received_cb = 0x0806da2d); -PROVIDE(send_check_and_wait = 0x0804c9ad); -PROVIDE(zsock_flush_queue = 0x0806daaf); -PROVIDE(zsock_recv_stream_immediate = 0x0806daf5); -PROVIDE(sock_ioctl_vmeth = 0x0804cab1); -PROVIDE(sock_close2_vmeth = 0x0806dbed); -PROVIDE(sock_shutdown_vmeth = 0x0806dbf1); -PROVIDE(sock_bind_vmeth = 0x0806dbf5); -PROVIDE(sock_connect_vmeth = 0x0806dbf9); -PROVIDE(sock_listen_vmeth = 0x0806dbfd); -PROVIDE(sock_sendto_vmeth = 0x0806dc01); -PROVIDE(sock_write_vmeth = 0x0806dc05); -PROVIDE(sock_sendmsg_vmeth = 0x0806dc17); -PROVIDE(sock_accept_vmeth = 0x0806dc53); -PROVIDE(zsock_recv_dgram = 0x0804d17d); -PROVIDE(zsock_recv_stream = 0x0804d42d); -PROVIDE(sock_recvfrom_vmeth = 0x0806dc57); -PROVIDE(sock_read_vmeth = 0x0806dc5b); -PROVIDE(sock_recvmsg_vmeth = 0x0806dc6d); -PROVIDE(sock_getsockopt_vmeth = 0x0806dc71); -PROVIDE(sock_setsockopt_vmeth = 0x0806dc75); -PROVIDE(sock_getpeername_vmeth = 0x0806dc79); -PROVIDE(sock_getsockname_vmeth = 0x0806dc7d); -PROVIDE(timeout_to_ms = 0x0806dc81); -PROVIDE(tls_release = 0x0804da65); -PROVIDE(zvfs_fdtable_call_ioctl = 0x0806dcb7); -PROVIDE(zsock_fcntl_wrapper = 0x0806dcd5); -PROVIDE(is_blocking = 0x0806dcf1); -PROVIDE(tls_ctr_drbg_random = 0x0806dd17); -PROVIDE(crt_is_pem = 0x0804dabd); -PROVIDE(tls_mbedtls_reset = 0x0806dd1f); -PROVIDE(tls_sock_getsockname_vmeth = 0x0806dd39); -PROVIDE(tls_sock_getpeername_vmeth = 0x0806dd3f); -PROVIDE(tls_sock_listen_vmeth = 0x0806dd45); -PROVIDE(tls_sock_bind_vmeth = 0x0806dd53); -PROVIDE(tls_sock_shutdown_vmeth = 0x0806dd59); -PROVIDE(ztls_poll_update_pollin.constprop.0 = 0x0806dd5f); -PROVIDE(tls_mbedtls_init = 0x0804dae1); -PROVIDE(tls_rx = 0x0804dcfd); -PROVIDE(tls_tx = 0x0804dcc9); -PROVIDE(wait = 0x0806de4d); -PROVIDE(tls_init = 0x0804dd31); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0806dead); -PROVIDE(k_mutex_unlock.isra.0 = 0x0806deb1); -PROVIDE(tls_alloc = 0x0804dd61); -PROVIDE(ztls_socket = 0x0804ddf9); -PROVIDE(wait_for_reason = 0x0806deb5); -PROVIDE(tls_mbedtls_handshake.constprop.0 = 0x0806dedf); -PROVIDE(tls_is_supported = 0x0806dfa3); -PROVIDE(tls_sock_ioctl_vmeth = 0x0804de95); -PROVIDE(tls_sock_close2_vmeth = 0x0806dfbd); -PROVIDE(tls_sock_connect_vmeth = 0x0806dfc1); -PROVIDE(tls_sock_accept_vmeth = 0x0806dfc5); -PROVIDE(tls_sock_sendto_vmeth = 0x0806dfc9); -PROVIDE(tls_sock_write_vmeth = 0x0806dfcd); -PROVIDE(tls_sock_sendmsg_vmeth = 0x0806dfdf); -PROVIDE(tls_sock_recvfrom_vmeth = 0x0806dfe3); -PROVIDE(tls_sock_read_vmeth = 0x0806dfe7); -PROVIDE(tls_sock_getsockopt_vmeth = 0x0806dff9); -PROVIDE(tls_sock_setsockopt_vmeth = 0x0806dffd); -PROVIDE(socket_service_thread = 0x0804eb49); -PROVIDE(net_mgmt_sock_write = 0x0804ecf9); -PROVIDE(net_mgmt_sock_ioctl = 0x0804ed19); -PROVIDE(net_mgmt_sock_connect = 0x0806e01b); -PROVIDE(net_mgmt_sock_listen = 0x0806e01f); -PROVIDE(net_mgmt_sock_accept = 0x0806e023); -PROVIDE(net_mgmt_is_supported = 0x0806e027); -PROVIDE(net_mgmt_sock_setsockopt = 0x0804ed9d); -PROVIDE(net_mgmt_sock_getsockopt = 0x0804ede5); -PROVIDE(net_mgmt_sock_bind = 0x0804ee31); -PROVIDE(znet_mgmt_recvfrom.constprop.0 = 0x0804ee81); -PROVIDE(net_mgmt_sock_read = 0x0806e039); -PROVIDE(net_mgmt_sock_recvfrom = 0x0806e049); -PROVIDE(net_mgmt_sock_sendto = 0x0804ef4d); -PROVIDE(spair_bind = 0x0804ef6d); -PROVIDE(spair_listen = 0x0804ef85); -PROVIDE(spair_accept = 0x0804ef9d); -PROVIDE(spair_getsockopt = 0x0804efb5); -PROVIDE(spair_setsockopt = 0x0804efcd); -PROVIDE(k_sem_take = 0x0806e04d); -PROVIDE(k_sem_give = 0x0806e051); -PROVIDE(spair_write_avail.isra.0 = 0x0804efe5); -PROVIDE(sock_is_connected.isra.0 = 0x0804f005); -PROVIDE(k_poll_signal_raise.isra.0 = 0x0806e055); -PROVIDE(spair_delete = 0x0804f01d); -PROVIDE(spair_close = 0x0806e059); -PROVIDE(spair_connect = 0x0804f0a9); -PROVIDE(spair_read = 0x0804f0c1); -PROVIDE(spair_recvfrom = 0x0806e075); -PROVIDE(spair_write = 0x0804f209); -PROVIDE(spair_sendmsg = 0x0804f3d9); -PROVIDE(spair_sendto = 0x0806e087); -PROVIDE(spair_ioctl = 0x0804f471); -PROVIDE(credentials_init = 0x0804f7dd); -PROVIDE(net_ipv4_is_addr_mcast = 0x0806e08b); -PROVIDE(net_if_l2_data = 0x0806e09b); -PROVIDE(net_if_get_device = 0x0806e0a5); -PROVIDE(net_eth_get_hw_capabilities = 0x0806e0af); -PROVIDE(ethernet_enable = 0x0806e0d1); -PROVIDE(net_eth_is_addr_broadcast = 0x0806e107); -PROVIDE(ethernet_ip_recv = 0x0806e135); -PROVIDE(carrier_on_off = 0x0806e195); -PROVIDE(ethernet_recv = 0x0804f8cd); -PROVIDE(ethernet_mcast_monitor_cb = 0x0804fa09); -PROVIDE(ethernet_send = 0x0804fa71); -PROVIDE(is_hw_caps_supported = 0x0806e25f); -PROVIDE(net_if_flag_is_set = 0x0806e27b); -PROVIDE(net_if_is_up = 0x0806e293); -PROVIDE(ethernet_set_config = 0x0804fc49); -PROVIDE(ethernet_get_config = 0x0804fec1); -PROVIDE(sys_slist_prepend = 0x0806e2af); -PROVIDE(sys_slist_remove = 0x0806e2bd); -PROVIDE(net_if_get_link_addr = 0x0806e2dd); -PROVIDE(net_eth_is_addr_all_zeroes = 0x0806e2e7); -PROVIDE(net_eth_is_addr_unspecified = 0x0806e2e7); -PROVIDE(k_uptime_get_32 = 0x0806e30f); -PROVIDE(net_eth_is_addr_broadcast = 0x0806e31f); -PROVIDE(net_if_flag_is_set.constprop.0 = 0x0806e34d); -PROVIDE(arp_entry_get_last_from_table = 0x0805012d); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0806e363); -PROVIDE(net_linkaddr_set.constprop.0.isra.0 = 0x0806e367); -PROVIDE(if_get_addr.isra.0 = 0x0806e379); -PROVIDE(arp_entry_find.isra.0 = 0x0806e3a1); -PROVIDE(k_mutex_unlock.isra.0 = 0x0806e3bd); -PROVIDE(net_if_tx_unlock = 0x0806e3c1); -PROVIDE(arp_entry_cleanup = 0x0806e3d9); -PROVIDE(arp_request_timeout = 0x08050155); -PROVIDE(arp_recv = 0x0806e5f7); -PROVIDE(sys_slist_find_and_remove = 0x0806e895); -PROVIDE(net_ipv4_is_ll_addr = 0x080506fd); -PROVIDE(net_if_l2 = 0x0806e8cb); -PROVIDE(net_if_get_device = 0x0806e8d5); -PROVIDE(net_context_send_cb = 0x0806e8df); -PROVIDE(l2_flags_get = 0x0806e8f7); -PROVIDE(net_if_flag_is_set = 0x0806e911); -PROVIDE(k_uptime_get_32 = 0x0806e929); -PROVIDE(net_if_flag_set = 0x0806e939); -PROVIDE(net_if_flag_clear = 0x0806e95f); -PROVIDE(need_calc_checksum = 0x08050715); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0806e987); -PROVIDE(net_if_lock = 0x0806e98b); -PROVIDE(k_mutex_unlock.isra.0 = 0x0806e999); -PROVIDE(get_ifaddr.constprop.0 = 0x0806e99d); -PROVIDE(iface_router_update_timer = 0x08050779); -PROVIDE(net_if_ipv4_get_best_match = 0x080507f5); -PROVIDE(if_ipv4_get_addr = 0x0806e9db); -PROVIDE(ipv4_is_broadcast_address = 0x0806ea35); -PROVIDE(net_if_flag_test_and_set = 0x0806ea71); -PROVIDE(net_if_flag_test_and_clear = 0x0806eaa3); -PROVIDE(iface_router_expired = 0x0805088d); -PROVIDE(net_if_ipv4_set_netmask_deprecated = 0x0806eb33); -PROVIDE(update_operational_state = 0x08050d05); -PROVIDE(net_if_tx.isra.0 = 0x08050f41); -PROVIDE(parse_ipv4 = 0x0806eff9); -PROVIDE(k_mutex_unlock.isra.0 = 0x0806f339); -PROVIDE(mgmt_event_work_handler = 0x080516b9); -PROVIDE(sys_slist_find_and_remove.constprop.0.isra.0 = 0x080517fd); -PROVIDE(mgmt_rebuild_global_event_mask = 0x08051835); -PROVIDE(mgmt_event_wait_call = 0x0806f33d); -PROVIDE(net_ipv4_is_addr_mcast = 0x0806f401); -PROVIDE(net_if_flag_is_set = 0x0806f411); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0806f429); -PROVIDE(k_mutex_unlock.isra.0 = 0x0806f42d); -PROVIDE(net_context_get_iface.isra.0 = 0x0806f431); -PROVIDE(check_used_port.constprop.0 = 0x08051a99); -PROVIDE(find_available_port = 0x0806f435); -PROVIDE(bind_default = 0x0806f5ff); -PROVIDE(context_sendto = 0x0806f6df); -PROVIDE(net_pkt_set_iface = 0x0806fc7d); -PROVIDE(clone_pkt_attributes = 0x0806fc97); -PROVIDE(pkt_cursor_jump = 0x0806fd89); -PROVIDE(pkt_cursor_advance = 0x0806fdb5); -PROVIDE(pkt_cursor_update = 0x0806fde5); -PROVIDE(pkt_estimate_headers_length.part.0 = 0x0806fe3b); -PROVIDE(pkt_alloc_buffer.constprop.0 = 0x0806fe5f); -PROVIDE(net_pkt_get_len.isra.0 = 0x0806feff); -PROVIDE(net_pkt_cursor_operate = 0x0806ff0f); -PROVIDE(pkt_alloc = 0x08052139); -PROVIDE(pkt_alloc_with_buffer = 0x08070205); -PROVIDE(net_pkt_clone_internal = 0x08070441); -PROVIDE(tc_rx_handler = 0x080705d5); -PROVIDE(icmp_call_handlers = 0x0805244d); -PROVIDE(net_conn_change_remote = 0x0807060d); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x08052509); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x08052519); -PROVIDE(conn_set_unused = 0x08052525); -PROVIDE(net_ipv4_is_addr_bcast = 0x08070661); -PROVIDE(icmpv4_handle_echo_request = 0x080706b5); -PROVIDE(sys_slist_get = 0x08070cb7); -PROVIDE(tcp_window_full = 0x08070ccb); -PROVIDE(tcp_unsent_len = 0x08070ce9); -PROVIDE(tcp_validate_seq = 0x08070d25); -PROVIDE(tcp_send = 0x08052ac1); -PROVIDE(tcp_setup_last_ack_timer = 0x08052afd); -PROVIDE(tcp_last_ack_timeout = 0x0807113f); -PROVIDE(tcp_derive_rto = 0x08070d43); -PROVIDE(k_sem_take = 0x08070d67); -PROVIDE(is_destination_local = 0x08070d6b); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x08070db5); -PROVIDE(tcp_compute_new_length = 0x08070db9); -PROVIDE(net_pkt_get_len.isra.0 = 0x08070dd3); -PROVIDE(tcp_pkt_pull = 0x08070de3); -PROVIDE(th_get = 0x08070e1d); -PROVIDE(tcp_data_len = 0x08070f0b); -PROVIDE(tcp_endpoint_set = 0x08070f35); -PROVIDE(tcp_endpoint_cmp = 0x08070f85); -PROVIDE(tcp_pkt_append = 0x08070fb5); -PROVIDE(k_mutex_unlock.isra.0 = 0x0807103d); -PROVIDE(tcp_send_timer_cancel = 0x08052b31); -PROVIDE(tcp_enter_time_wait = 0x08052bb1); -PROVIDE(tcp_cleanup_recv_queue = 0x08071041); -PROVIDE(tcp_send_process_no_lock = 0x08052bd9); -PROVIDE(atomic_inc.isra.0 = 0x08071073); -PROVIDE(tcp_conn_release = 0x08052cf9); -PROVIDE(tcp_conn_unref.isra.0 = 0x08052e49); -PROVIDE(tcp_conn_close.isra.0 = 0x0807108b); -PROVIDE(tcp_send_process = 0x08071107); -PROVIDE(tcp_timewait_timeout = 0x0807114b); -PROVIDE(tcp_fin_timeout = 0x08071157); -PROVIDE(tcp_resend_data = 0x0805349d); -PROVIDE(tcp_send_zwp = 0x08053335); -PROVIDE(tcp_send_ack = 0x08071319); -PROVIDE(tcp_recv = 0x08054859); -PROVIDE(tcp_out_ext = 0x08053165); -PROVIDE(tcp_out = 0x0807130f); -PROVIDE(tcp_send_data = 0x08071343); -PROVIDE(tcp_short_window = 0x0807146b); -PROVIDE(tcp_update_recv_wnd = 0x080714f5); -PROVIDE(tcp_data_get = 0x08053661); -PROVIDE(tcp_send_queued_data.part.0 = 0x08053771); -PROVIDE(tcp_new_reno_init = 0x08071715); -PROVIDE(tcp_in = 0x08053811); -PROVIDE(dhcpv4_option_callback_get_unique_types = 0x08054b89); -PROVIDE(k_uptime_get = 0x080718af); -PROVIDE(dhcpv4_set_timeout = 0x08054be1); -PROVIDE(dhcpv4_update_message_timeout = 0x080718bf); -PROVIDE(dhcpv4_enter_bound = 0x08054c05); -PROVIDE(net_if_flag_is_set = 0x0807190b); -PROVIDE(net_send_data = 0x08071921); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x08054c6d); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x08054c7d); -PROVIDE(dhcpv4_iface_event_handler = 0x08054c89); -PROVIDE(dhcpv4_start_internal = 0x08054d11); -PROVIDE(dhcpv4_add_option_length_value = 0x08071939); -PROVIDE(dhcpv4_create_message = 0x08054d99); -PROVIDE(dhcpv4_send_discover = 0x0807197d); -PROVIDE(dhcpv4_send_request = 0x080719d3); -PROVIDE(dhcpv4_timeout = 0x08054f79); -PROVIDE(net_dhcpv4_input = 0x0805517d); -PROVIDE(net_ipv4_is_addr_mcast = 0x08071dbf); -PROVIDE(join_ipv4_mcast_group = 0x08071dcf); -PROVIDE(invoke_query_callback = 0x08071dd1); -PROVIDE(get_slot_by_id = 0x08071de1); -PROVIDE(k_mutex_lock = 0x08071e05); -PROVIDE(release_query = 0x08071e09); -PROVIDE(k_mutex_unlock.isra.0 = 0x08071e1d); -PROVIDE(dns_resolve_cancel_with_hash.constprop.0 = 0x08071e21); -PROVIDE(dns_resolve_close_locked = 0x080558f5); -PROVIDE(query_timeout = 0x08071e7d); -PROVIDE(join_ipv6_mcast_group = 0x08071eb7); -PROVIDE(dns_postprocess_server = 0x08055991); -PROVIDE(dns_resolve_init_locked = 0x08055ac5); -PROVIDE(dispatcher_cb = 0x08055d89); -PROVIDE(dns_write.constprop.0 = 0x08071eb9); -PROVIDE(stm32_exti_isr = 0x0805642d); -PROVIDE(stm32_fill_irq_table = 0x0805647d); -PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x08056495); -PROVIDE(stm32_exti_init = 0x080564c9); -PROVIDE(usb_dc_stm32_get_ep_state = 0x08056701); -PROVIDE(usb_dc_stm32_isr = 0x0805672d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08072027); -PROVIDE(LL_RCC_HSI_IsReady = 0x080570bd); -PROVIDE(get_pllsrc_frequency = 0x080570cd); -PROVIDE(get_hclk_frequency = 0x080570f1); -PROVIDE(stm32_clock_control_get_subsys_rate = 0x08057131); -PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x08057219); -PROVIDE(stm32_clock_control_off = 0x0805724d); -PROVIDE(stm32_clock_control_on = 0x08057291); -PROVIDE(stm32_clock_control_configure = 0x08057525); -PROVIDE(uart_console_init = 0x08057585); -PROVIDE(console_out = 0x080575ad); -PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x080575d5); -PROVIDE(entropy_stm32_suspend.isra.0 = 0x080575ed); -PROVIDE(acquire_rng = 0x08057625); -PROVIDE(start_pool_filling = 0x08057669); -PROVIDE(rng_pool_get = 0x080576c5); -PROVIDE(pool_filling_work_handler = 0x0807214f); -PROVIDE(entropy_stm32_rng_get_entropy = 0x08057759); -PROVIDE(entropy_stm32_rng_init = 0x080577b1); -PROVIDE(random_byte_get = 0x08057845); -PROVIDE(entropy_stm32_rng_get_entropy_isr = 0x080578a1); -PROVIDE(stm32_rng_isr = 0x08057985); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08072209); -PROVIDE(phy_mii_reg_write.isra.0 = 0x08072227); -PROVIDE(phy_mii_write = 0x08072251); -PROVIDE(phy_mii_reg_read.isra.0 = 0x08072259); -PROVIDE(phy_mii_cfg_link = 0x08072283); -PROVIDE(phy_mii_read = 0x08072375); -PROVIDE(phy_mii_get_link_state = 0x0807237b); -PROVIDE(invoke_link_cb = 0x080723a3); -PROVIDE(phy_mii_link_cb_set = 0x080723bf); -PROVIDE(monitor_work_handler = 0x080580e5); -PROVIDE(phy_mii_initialize = 0x08058305); -PROVIDE(extract_instr = 0x080723cf); -PROVIDE(flash_stm32_qspi_get_parameters = 0x080584ad); -PROVIDE(flash_stm32_qspi_get_size = 0x080725b3); -PROVIDE(flash_stm32_qspi_pages_layout = 0x080725bf); -PROVIDE(k_sem_give = 0x080725cb); -PROVIDE(flash_stm32_qspi_irq_config_func = 0x080725cf); -PROVIDE(flash_stm32_qspi_isr = 0x080725e5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080725eb); -PROVIDE(qspi_read_sfdp.isra.0 = 0x080584b5); -PROVIDE(qspi_write_access.isra.0 = 0x08058581); -PROVIDE(qspi_lock_thread.isra.0 = 0x08072609); -PROVIDE(qspi_send_cmd.isra.0 = 0x08058601); -PROVIDE(qspi_read_access.isra.0 = 0x08058655); -PROVIDE(qspi_read_status_register = 0x08072617); -PROVIDE(flash_stm32_qspi_read = 0x08072651); -PROVIDE(qspi_wait_until_ready = 0x080726eb); -PROVIDE(flash_stm32_qspi_erase = 0x080586d5); -PROVIDE(flash_stm32_qspi_write = 0x08058805); -PROVIDE(flash_stm32_qspi_init = 0x080588f1); -PROVIDE(flash_stm32h7_get_parameters = 0x08059099); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0807274f); -PROVIDE(stm32h7_flash_init = 0x080590fd); -PROVIDE(get_sector.isra.0 = 0x08059181); -PROVIDE(flash_stm32_check_status.isra.0 = 0x08059201); -PROVIDE(_flash_stm32_sem_take.isra.0 = 0x080592f5); -PROVIDE(flash_stm32h7_read = 0x080593c5); -PROVIDE(flash_stm32h7_cr_lock = 0x080594ed); -PROVIDE(write_ndwords.constprop.0 = 0x08059545); -PROVIDE(flash_stm32h7_erase = 0x08059701); -PROVIDE(flash_stm32h7_write = 0x080597d9); -PROVIDE(gpio_stm32_port_get_raw = 0x080727cb); -PROVIDE(gpio_stm32_port_set_bits_raw = 0x080727d7); -PROVIDE(gpio_stm32_port_clear_bits_raw = 0x080727e1); -PROVIDE(gpio_stm32_manage_callback = 0x080727ed); -PROVIDE(gpio_stm32_pin_interrupt_configure = 0x08059875); -PROVIDE(gpio_stm32_isr = 0x08072917); -PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x08059925); -PROVIDE(gpio_stm32_port_toggle_bits = 0x08059959); -PROVIDE(gpio_stm32_port_set_masked_raw = 0x0805997d); -PROVIDE(gpio_stm32_init = 0x080599a5); -PROVIDE(gpio_stm32_configure_raw.isra.0 = 0x080599dd); -PROVIDE(gpio_stm32_config = 0x0807283f); -PROVIDE(stm32_i2c_disable_transfer_interrupts = 0x08072981); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080729bf); -PROVIDE(stm32_i2c_enable_transfer_interrupts.isra.0 = 0x080729df); -PROVIDE(stm32_i2c_master_mode_end = 0x08072a03); -PROVIDE(msg_init = 0x08059b79); -PROVIDE(i2c_stm32_irq_config_func_0 = 0x08072c43); -PROVIDE(i2c_stm32_irq_config_func_1 = 0x08072c69); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08072c8f); -PROVIDE(i2c_stm32_transfer = 0x08072caf); -PROVIDE(i2c_stm32_init = 0x08059ec1); -PROVIDE(gpio_pin_set = 0x0807307f); -PROVIDE(regulator_fixed_enable = 0x0807309f); -PROVIDE(regulator_fixed_count_voltages = 0x080730bd); -PROVIDE(regulator_fixed_list_voltage = 0x080730cb); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805a0d1); -PROVIDE(regulator_fixed_init = 0x0805a0f5); -PROVIDE(regulator_fixed_disable = 0x080730e5); -PROVIDE(uart_stm32_ll2cfg_databits = 0x080734ff); -PROVIDE(uart_stm32_err_check = 0x08073529); -PROVIDE(uart_stm32_irq_tx_enable = 0x08073583); -PROVIDE(uart_stm32_irq_tx_disable = 0x08073599); -PROVIDE(uart_stm32_irq_rx_enable = 0x080735af); -PROVIDE(uart_stm32_irq_rx_disable = 0x080735c5); -PROVIDE(uart_stm32_irq_rx_ready = 0x080735db); -PROVIDE(uart_stm32_irq_err_enable = 0x0805a175); -PROVIDE(uart_stm32_irq_err_disable = 0x0805a1ed); -PROVIDE(uart_stm32_irq_update = 0x080735e7); -PROVIDE(uart_stm32_irq_callback_set = 0x080735eb); -PROVIDE(uart_stm32_isr = 0x080735f3); -PROVIDE(uart_stm32_irq_config_func_0 = 0x080735ff); -PROVIDE(uart_stm32_irq_config_func_1 = 0x08073615); -PROVIDE(uart_stm32_irq_config_func_2 = 0x0807362b); -PROVIDE(uart_stm32_irq_config_func_3 = 0x08073641); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08073657); -PROVIDE(uart_stm32_set_baudrate = 0x0805a265); -PROVIDE(uart_stm32_irq_tx_complete = 0x08073677); -PROVIDE(uart_stm32_irq_tx_ready = 0x08073683); -PROVIDE(uart_stm32_parameters_set = 0x0805a2c5); -PROVIDE(uart_stm32_init = 0x0805a3f9); -PROVIDE(uart_stm32_config_get = 0x08073697); -PROVIDE(uart_stm32_configure = 0x0805a5fd); -PROVIDE(uart_stm32_fifo_fill = 0x08073729); -PROVIDE(uart_stm32_poll_out = 0x08073781); -PROVIDE(uart_stm32_irq_is_pending = 0x080737b7); -PROVIDE(uart_stm32_fifo_read = 0x080737db); -PROVIDE(uart_stm32_poll_in = 0x0807381d); -PROVIDE(elapsed = 0x0805a769); -PROVIDE(sys_clock_driver_init = 0x0805a7b5); -PROVIDE(ETH_SetMACConfig = 0x0807384d); -PROVIDE(ETH_SetDMAConfig = 0x0805ab91); -PROVIDE(ETH_Prepare_Tx_Descriptors = 0x0805ac35); -PROVIDE(ETH_UpdateDescriptor = 0x080739db); -PROVIDE(QSPI_Config = 0x08074589); -PROVIDE(QSPI_WaitFlagStateUntilTimeout = 0x080746fd); -PROVIDE(QSPI_DMAAbortCplt = 0x08074a07); -PROVIDE(USB_CoreReset = 0x08074a45); -PROVIDE(aes_gen_tables = 0x0805c26d); -PROVIDE(asn1_get_sequence_of_cb = 0x0807509d); -PROVIDE(asn1_get_tagged_int = 0x08075161); -PROVIDE(mbedtls_ct_uchar_in_range_if = 0x0805ce61); -PROVIDE(mbedtls_ct_base64_dec_value = 0x080753db); -PROVIDE(mbedtls_ct_bool = 0x0805cfb1); -PROVIDE(mbedtls_mpi_core_exp_mod_optionally_safe = 0x0805cff9); -PROVIDE(mbedtls_ct_mpi_sign_if = 0x0805d199); -PROVIDE(mbedtls_mpi_resize_clear = 0x08075abf); -PROVIDE(add_sub_mpi = 0x08075f27); -PROVIDE(mbedtls_mpi_exp_mod_optionally_safe = 0x08076197); -PROVIDE(get_no_padding = 0x0805d4e5); -PROVIDE(mbedtls_ct_bool = 0x0805d979); -PROVIDE(verify_header = 0x0805e63d); -PROVIDE(verify_chain = 0x0805e67d); -PROVIDE(buffer_alloc_calloc = 0x0805e6b9); -PROVIDE(buffer_alloc_free = 0x0805e7cd); -PROVIDE(oid_sig_alg_from_asn1.part.0 = 0x0805e95d); -PROVIDE(mbedtls_ct_bool = 0x0805eee1); -PROVIDE(mbedtls_ct_uint_lt = 0x0805eef9); -PROVIDE(mbedtls_ct_uint_ne = 0x0805ef2d); -PROVIDE(mbedtls_md_get_size_from_type = 0x08076ae9); -PROVIDE(mgf_mask = 0x0805ef41); -PROVIDE(hash_mprime = 0x0805f00d); -PROVIDE(rsa_rsassa_pkcs1_v15_encode = 0x0805f09d); -PROVIDE(asn1_get_nonzero_mpi = 0x0805f19d); -PROVIDE(rsa_check_context.constprop.0 = 0x0805f1c1); -PROVIDE(rsa_rsassa_pss_sign_no_mode_check = 0x0805fa0d); -PROVIDE(_mbedtls_init = 0x08061f59); -PROVIDE(pem_aes_decrypt = 0x08077175); -PROVIDE(mbedtls_pk_rsa = 0x080772d5); -PROVIDE(pk_get_pk_alg.constprop.0 = 0x08062241); -PROVIDE(pk_parse_key_pkcs8_unencrypted_der.constprop.0 = 0x08062295); -PROVIDE(pk_hashlen_helper = 0x080772f1); -PROVIDE(rsa_can_do = 0x08077379); -PROVIDE(rsa_debug = 0x08062771); -PROVIDE(rsa_free_wrap = 0x08077385); -PROVIDE(rsa_alloc_wrap = 0x08077397); -PROVIDE(rsa_check_pair_wrap = 0x080773ad); -PROVIDE(rsa_encrypt_wrap = 0x08062795); -PROVIDE(rsa_decrypt_wrap = 0x080627d9); -PROVIDE(rsa_sign_wrap = 0x0806281d); -PROVIDE(rsa_verify_wrap = 0x08062865); -PROVIDE(rsa_get_bitlen = 0x080773b5); -PROVIDE(x509_parse2_int = 0x080773bb); -PROVIDE(x509_memcasecmp = 0x08077439); -PROVIDE(x509_name_cmp = 0x08077469); -PROVIDE(x509_profile_check_key = 0x080774e7); -PROVIDE(x509_crt_check_cn = 0x08077515); -PROVIDE(x509_crt_verify_restartable_ca_cb.constprop.0.isra.0 = 0x08062fe9); -PROVIDE(mbedtls_x509_crt_parse_der_internal = 0x080633a9); -PROVIDE(mbedtls_ct_bool = 0x08063f79); -PROVIDE(mbedtls_ct_uint_lt = 0x08063f91); -PROVIDE(mbedtls_ct_uint_eq = 0x08063fc5); -PROVIDE(mbedtls_ssl_own_key = 0x08077817); -PROVIDE(mbedtls_ct_uint_ne = 0x0806514d); -PROVIDE(ssl_ciphersuite_match = 0x08065171); -PROVIDE(ssl_mfl_code_to_length = 0x08065b21); -PROVIDE(tls_prf_generic = 0x08065b39); -PROVIDE(tls_prf_sha256 = 0x0807782b); -PROVIDE(tls_prf_sha384 = 0x0807784b); -PROVIDE(ssl_update_checksum_sha256 = 0x0807786b); -PROVIDE(ssl_update_checksum_sha384 = 0x08077873); -PROVIDE(ssl_calc_finished_tls_generic = 0x08065ca1); -PROVIDE(ssl_calc_finished_tls_sha256 = 0x0807787b); -PROVIDE(ssl_calc_finished_tls_sha384 = 0x08077895); -PROVIDE(ssl_calc_verify_tls_legacy.constprop.0 = 0x080778af); -PROVIDE(ssl_calc_verify_tls_sha384 = 0x08077903); -PROVIDE(ssl_calc_verify_tls_sha256 = 0x0807790b); -PROVIDE(ssl_update_checksum_start = 0x08077913); -PROVIDE(ssl_handshake_init = 0x0806625d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08077e2f); -PROVIDE(do_device_init = 0x08077e65); -PROVIDE(z_sys_init_run_level = 0x080670b9); -PROVIDE(bg_thread_main = 0x080670e9); -PROVIDE(statics_init = 0x0806733d); -PROVIDE(create_free_list = 0x08077f9f); -PROVIDE(init_mem_slab_obj_core_list = 0x08067361); -PROVIDE(init_mbox_module = 0x080673e1); -PROVIDE(unpend_thread_no_timeout = 0x08078065); -PROVIDE(adjust_owner_prio.isra.0 = 0x080781eb); -PROVIDE(unpend_thread_no_timeout = 0x08078209); -PROVIDE(queue_insert = 0x08078223); -PROVIDE(k_sys_work_q_init = 0x08067939); -PROVIDE(flag_test_and_clear = 0x080784f7); -PROVIDE(unschedule_locked = 0x0807850d); -PROVIDE(notify_queue_locked.isra.0 = 0x0807852b); -PROVIDE(work_queue_main = 0x0806796d); -PROVIDE(cancel_async_locked = 0x0807853b); -PROVIDE(submit_to_queue_locked = 0x08067ab9); -PROVIDE(work_timeout = 0x080785a1); -PROVIDE(unpend_thread_no_timeout = 0x080786a3); -PROVIDE(sys_dlist_remove = 0x08078723); -PROVIDE(unpend_thread_no_timeout = 0x08078733); -PROVIDE(z_swap_irqlock = 0x08067ff5); -PROVIDE(ready_thread = 0x08068029); -PROVIDE(unready_thread = 0x080680ad); -PROVIDE(add_to_waitq_locked = 0x08078747); -PROVIDE(z_tick_sleep = 0x080685a9); -PROVIDE(wait_for = 0x08078931); -PROVIDE(z_sched_wake_all.constprop.0 = 0x080789a3); -PROVIDE(slice_timeout = 0x0806894d); -PROVIDE(first = 0x08068b49); -PROVIDE(elapsed = 0x08068b59); -PROVIDE(next_timeout = 0x08078bd3); -PROVIDE(remove_timeout = 0x08068b6d); -PROVIDE(timeout_rem = 0x08068ba5); -PROVIDE(clear_event_registrations = 0x08068f49); -PROVIDE(add_event = 0x08078d85); -PROVIDE(register_events = 0x08078dd9); -PROVIDE(signal_poll_event = 0x08078edd); -PROVIDE(z_heap_aligned_alloc = 0x08078fd9); -PROVIDE(__ultoa_invert = 0x08079299); -PROVIDE(skip_to_arg = 0x08069581); -PROVIDE(mulShiftAll64 = 0x0807934b); -PROVIDE(div10 = 0x0806a075); -PROVIDE(chunk_field = 0x0806a85d); -PROVIDE(chunk_set = 0x0806a873); -PROVIDE(chunk_size = 0x0806a889); -PROVIDE(set_chunk_used = 0x0806a895); -PROVIDE(set_chunk_size = 0x0806a8c5); -PROVIDE(mem_to_chunkid = 0x0806a8cd); -PROVIDE(bucket_idx.isra.0 = 0x0806a8e1); -PROVIDE(free_list_remove_bidx = 0x0806a8ff); -PROVIDE(free_list_remove = 0x0806a95b); -PROVIDE(alloc_chunk = 0x0806a989); -PROVIDE(split_chunks = 0x0806a9fd); -PROVIDE(merge_chunks = 0x0806aa4b); -PROVIDE(free_list_add = 0x0806aa87); -PROVIDE(free_chunk = 0x0806ab0b); -PROVIDE(setup_bundle_data.constprop.0 = 0x0806b10f); -PROVIDE(set_region = 0x0806b14d); -PROVIDE(match_region = 0x0806b1dd); -PROVIDE(ring_buf_put_claim = 0x0806b3a9); -PROVIDE(ring_buf_get_claim = 0x0806b3c7); -PROVIDE(cmd_kernel_reboot_cold = 0x0806bb0f); -PROVIDE(cmd_kernel_reboot_warm = 0x0806bb17); -PROVIDE(panic = 0x0806c857); -PROVIDE(process_log_msg.constprop.0 = 0x0806c859); -PROVIDE(process = 0x0806c8e5); -PROVIDE(dropped = 0x0806c925); -PROVIDE(remove_from_tail.part.0 = 0x0806cc2b); -PROVIDE(foldcase = 0x0806d077); -PROVIDE(fnmatchx = 0x0806d087); -PROVIDE(processing_data = 0x0806e613); -PROVIDE(net_init = 0x0806e67d); -PROVIDE(net_ipv4_is_addr_mcast = 0x08070963); -PROVIDE(net_ipv4_is_addr_bcast = 0x08070973); -PROVIDE(net_ipv4_is_my_addr = 0x08070995); -PROVIDE(flash_get_page_info = 0x08072513); -PROVIDE(mdio_stm32_bus_enable = 0x08072d3d); -PROVIDE(mdio_stm32_init = 0x08072d3f); -PROVIDE(mdio_stm32_read = 0x08072d73); -PROVIDE(mdio_stm32_bus_disable = 0x08072db3); -PROVIDE(mdio_stm32_write = 0x08072db5); -PROVIDE(mfd_pf1550_init = 0x08072def); -PROVIDE(regulator_delay = 0x08072e77); -PROVIDE(linear_range_group_get_value = 0x080730fb); -PROVIDE(regulator_pf1550_count_voltages = 0x08073133); -PROVIDE(regulator_pf1550_list_voltage = 0x0807315f); -PROVIDE(regulator_pf1550_list_current_limit = 0x0807316f); -PROVIDE(regulator_pf1550_init = 0x0807318d); -PROVIDE(linear_range_group_get_win_index = 0x080731b3); -PROVIDE(regulator_pf1550_common_init = 0x0807322f); -PROVIDE(i2c_write_read.constprop.0 = 0x08073245); -PROVIDE(i2c_reg_update_byte = 0x0807327b); -PROVIDE(regulator_pf1550_disable = 0x080732e1); -PROVIDE(regulator_pf1550_power_off = 0x080732fd); -PROVIDE(regulator_pf1550_get_voltage = 0x08073317); -PROVIDE(regulator_pf1550_enable = 0x0807334f); -PROVIDE(regulator_pf1550_count_current_limits = 0x0807336b); -PROVIDE(regulator_pf1550_set_current_limit = 0x080733a5); -PROVIDE(regulator_pf1550_set_voltage = 0x08073435); -PROVIDE(reset_stm32_status = 0x0807348d); -PROVIDE(reset_stm32_line_assert = 0x080734af); -PROVIDE(reset_stm32_line_deassert = 0x080734cb); -PROVIDE(reset_stm32_line_toggle = 0x080734e9); -PROVIDE(aes_ctx_free = 0x08076765); -PROVIDE(aes_ctx_alloc = 0x08076777); -PROVIDE(aes_setkey_dec_wrap = 0x0807678f); -PROVIDE(aes_setkey_enc_wrap = 0x08076793); -PROVIDE(aes_crypt_cbc_wrap = 0x08076797); -PROVIDE(aes_crypt_ecb_wrap = 0x0807679b); -PROVIDE(mbedtls_ssl_session_free = 0x08077b67); -PROVIDE(mbedtls_mpi_core_sub = 0x0807564b); -PROVIDE(dns_resolve_init_with_svc = 0x08071fa7); -PROVIDE(net_conn_init = 0x08052a71); -PROVIDE(net_ipv4_unspecified_address = 0x080516a9); -PROVIDE(main = 0x0806a81b); +PROVIDE(cmd_kernel_uptime = 0x08041511); +PROVIDE(clock_control_pwm_get_rate = 0x08057f01); +PROVIDE(clock_control_pwm_init = 0x08077a95); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08057f29); +PROVIDE(clock_control_pwm_on = 0x08041689); +PROVIDE(clock_control_pwm_set_rate = 0x08077aab); +PROVIDE(clock_control_on = 0x08077f79); +PROVIDE(eth_stm32_hal_get_capabilities = 0x08077f87); +PROVIDE(eth_stm32_hal_get_phy = 0x08059695); +PROVIDE(k_uptime_get_32 = 0x08077f8b); +PROVIDE(eth0_irq_config = 0x08077f9b); +PROVIDE(eth_isr = 0x08077fb1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08077fb9); +PROVIDE(eth_initialize = 0x0805969d); +PROVIDE(rx_thread = 0x080417c1); +PROVIDE(allocate_tx_buffer = 0x080597c5); +PROVIDE(eth_stm32_hal_set_config = 0x08077fd7); +PROVIDE(eth_iface_init = 0x080597f1); +PROVIDE(eth_tx = 0x08059b35); +PROVIDE(mulShift64 = 0x0807fdd3); +PROVIDE(loader = 0x08043265); +PROVIDE(smh_choice = 0x08043429); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08043559); +PROVIDE(stdinout_read_vmeth = 0x0807080b); +PROVIDE(stdinout_ioctl_vmeth = 0x08043ce1); +PROVIDE(_check_fd = 0x08043cf9); +PROVIDE(zvfs_fdtable_call_ioctl = 0x0807080f); +PROVIDE(stdinout_write_vmeth = 0x0807082d); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x08070831); +PROVIDE(k_mutex_unlock.isra.0 = 0x08070835); +PROVIDE(z_fd_unref.isra.0 = 0x08043d31); +PROVIDE(st_stm32_common_config = 0x080440d5); +PROVIDE(stm32h7_m4_wakeup = 0x080440f1); +PROVIDE(dummy_timestamp = 0x08070d3f); +PROVIDE(default_lf_get_timestamp = 0x08070d43); +PROVIDE(atomic_inc = 0x08070d53); +PROVIDE(z_log_init.isra.0 = 0x080441b5); +PROVIDE(enable_logger = 0x08070d6d); +PROVIDE(backend_filter_set = 0x08044529); +PROVIDE(z_cbprintf_cpy = 0x08070dfb); +PROVIDE(z_log_msg_simple_create = 0x08070e59); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08070ec7); +PROVIDE(log_output_write = 0x08070f25); +PROVIDE(out_func = 0x08070f41); +PROVIDE(cr_out_func = 0x08070f5d); +PROVIDE(print_formatted = 0x0804475d); +PROVIDE(newline_print = 0x08044781); +PROVIDE(get_ep_bm_from_addr = 0x0807100f); +PROVIDE(class_handler = 0x08044b01); +PROVIDE(custom_handler = 0x08044b41); +PROVIDE(vendor_handler = 0x08044ba1); +PROVIDE(disable_endpoint = 0x08044bdd); +PROVIDE(usb_reset_alt_setting = 0x08044c09); +PROVIDE(is_ep_valid.part.0 = 0x08044c19); +PROVIDE(usb_handle_request.constprop.0 = 0x08044c51); +PROVIDE(forward_status_cb = 0x08044c7d); +PROVIDE(usb_halt_endpoint_req.isra.0 = 0x08044d29); +PROVIDE(set_endpoint = 0x08044d79); +PROVIDE(usb_handle_standard_request = 0x08044dfd); +PROVIDE(usb_data_to_host = 0x08045149); +PROVIDE(usb_handle_control_transfer = 0x080451a9); +PROVIDE(usb_device_init = 0x0807105d); +PROVIDE(usb_ep_get_transfer = 0x0804565d); +PROVIDE(usb_transfer_work = 0x08045689); +PROVIDE(cdc_interface_config = 0x080710d5); +PROVIDE(cdc_acm_irq_callback_work_handler = 0x080710e9); +PROVIDE(cdc_acm_irq_tx_disable = 0x080710f3); +PROVIDE(cdc_acm_irq_tx_ready = 0x080710fd); +PROVIDE(cdc_acm_irq_rx_disable = 0x0807111d); +PROVIDE(cdc_acm_irq_rx_ready = 0x08071127); +PROVIDE(cdc_acm_irq_is_pending = 0x08071135); +PROVIDE(cdc_acm_irq_callback_set = 0x08071151); +PROVIDE(cdc_acm_line_ctrl_get = 0x08071159); +PROVIDE(cdc_acm_configure = 0x0807118b); +PROVIDE(cdc_acm_config_get = 0x080711a3); +PROVIDE(cdc_acm_irq_rx_enable = 0x08045975); +PROVIDE(cdc_acm_irq_tx_enable = 0x08045995); +PROVIDE(cdc_acm_fifo_fill = 0x080459b5); +PROVIDE(cdc_acm_write_cb = 0x080459f1); +PROVIDE(cdc_acm_int_in = 0x08045ac5); +PROVIDE(cdc_acm_reset_port = 0x08045add); +PROVIDE(cdc_acm_init = 0x08045b19); +PROVIDE(tx_work_handler = 0x08045c15); +PROVIDE(cdc_acm_send_notification.isra.0 = 0x08045b61); +PROVIDE(cdc_acm_line_ctrl_set = 0x080711ff); +PROVIDE(cdc_acm_poll_out = 0x08045ba5); +PROVIDE(cdc_acm_read_cb = 0x08045c91); +PROVIDE(cdc_acm_fifo_read = 0x080712bd); +PROVIDE(cdc_acm_poll_in = 0x08071307); +PROVIDE(cdc_acm_dev_status_cb = 0x08045d09); +PROVIDE(cdc_acm_irq_update = 0x08071319); +PROVIDE(z_usb_work_q_init = 0x08045da1); +PROVIDE(cmd_kernel_cycles = 0x08045dd5); +PROVIDE(cmd_kernel_sleep = 0x08045df1); +PROVIDE(cmd_kernel_version = 0x08045e31); +PROVIDE(cmd_kernel_log_level_set = 0x08045e49); +PROVIDE(thread_valid_cb = 0x08071359); +PROVIDE(cmd_kernel_thread_list = 0x08045eed); +PROVIDE(shell_tdata_dump = 0x08045f21); +PROVIDE(cmd_kernel_thread_stacks = 0x08045fe1); +PROVIDE(shell_stack_dump = 0x08046051); +PROVIDE(cmd_kernel_thread_suspend = 0x080460b1); +PROVIDE(cmd_kernel_thread_resume = 0x08046115); +PROVIDE(cmd_kernel_thread_kill = 0x08046179); +PROVIDE(cmd_device_list = 0x080461dd); +PROVIDE(date_print = 0x080462b5); +PROVIDE(cmd_date_get = 0x08071365); +PROVIDE(get_h_m_s = 0x080462e1); +PROVIDE(cmd_date_set = 0x08046379); +PROVIDE(cmd_devmem = 0x08046485); +PROVIDE(cmd_dump = 0x08046549); +PROVIDE(set_bypass.isra.0 = 0x080466c1); +PROVIDE(bypass_cb = 0x0804670d); +PROVIDE(cmd_load = 0x08046821); +PROVIDE(log_msg_generic_get_wlen = 0x08071389); +PROVIDE(z_impl_uart_irq_tx_enable = 0x080713a9); +PROVIDE(uart_irq_tx_disable = 0x080713b3); +PROVIDE(enable = 0x080713bd); +PROVIDE(read_uart = 0x080713cf); +PROVIDE(uart_dtr_check = 0x080713e1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080468f9); +PROVIDE(enable_shell_uart = 0x0804691d); +PROVIDE(write_uart = 0x0807140b); +PROVIDE(init = 0x08046955); +PROVIDE(uart_callback = 0x080469c1); +PROVIDE(dtr_timer_handler = 0x08071491); +PROVIDE(uninit = 0x08071471); +PROVIDE(cmd_buffer_clear = 0x080714b1); +PROVIDE(atomic_or = 0x080714c7); +PROVIDE(atomic_and = 0x080714e5); +PROVIDE(k_mutex_lock = 0x08071503); +PROVIDE(z_shell_raw_fprintf = 0x08071507); +PROVIDE(shell_internal_help_print = 0x08046b29); +PROVIDE(z_shell_strlen = 0x08071521); +PROVIDE(shell_log_process = 0x0807152d); +PROVIDE(transport_evt_handler = 0x0807155f); +PROVIDE(kill_handler = 0x08046b49); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x08046ba5); +PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x08071577); +PROVIDE(z_flag_history_exit_set.isra.0 = 0x0807158f); +PROVIDE(history_handle = 0x08046bb1); +PROVIDE(z_flag_insert_mode_set.isra.0 = 0x080715a5); +PROVIDE(k_mutex_unlock.isra.0 = 0x080715c5); +PROVIDE(execute = 0x08046c61); +PROVIDE(shell_signal_handle = 0x080715c9); +PROVIDE(state_set.constprop.0 = 0x08046f29); +PROVIDE(cmd_help = 0x0804771d); +PROVIDE(out_func = 0x0807183b); +PROVIDE(z_shell_strlen = 0x08071877); +PROVIDE(z_shell_raw_fprintf = 0x08071c59); +PROVIDE(z_clear_eos = 0x08047a0d); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x08047a29); +PROVIDE(full_line_cmd.isra.0 = 0x08071c73); +PROVIDE(reprint_from_cursor = 0x08047c55); +PROVIDE(data_insert = 0x08071f87); +PROVIDE(z_shell_raw_fprintf = 0x08072217); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x08047dd9); +PROVIDE(formatted_text_print.constprop.0 = 0x08072231); +PROVIDE(cmd_comment = 0x08072313); +PROVIDE(cmd_shell_stats_reset = 0x08072317); +PROVIDE(z_shell_raw_fprintf = 0x0807231f); +PROVIDE(cmd_resize_default = 0x08047f01); +PROVIDE(cmd_shell_stats_show = 0x08047f2d); +PROVIDE(cmd_backends = 0x08047f41); +PROVIDE(cmd_prompt_on = 0x08072339); +PROVIDE(cmd_prompt_off = 0x08047f91); +PROVIDE(cmd_history = 0x08047fa1); +PROVIDE(cmd_get_retval = 0x08047fe1); +PROVIDE(cmd_echo = 0x08047ffd); +PROVIDE(cmd_clear = 0x0804804d); +PROVIDE(cmd_resize = 0x08048085); +PROVIDE(cmd_vt100_off = 0x08072345); +PROVIDE(cmd_bacskpace_mode_delete = 0x08072369); +PROVIDE(cmd_colors_off = 0x0807238d); +PROVIDE(cmd_bacskpace_mode_backspace = 0x080723b1); +PROVIDE(cmd_echo_off = 0x080723d5); +PROVIDE(cmd_colors_on = 0x080723f9); +PROVIDE(cmd_vt100_on = 0x0807241d); +PROVIDE(cmd_echo_on = 0x08072441); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08072683); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080727bb); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080727e3); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08072803); +PROVIDE(bus_fault.constprop.0 = 0x08048989); +PROVIDE(usage_fault.constprop.0 = 0x08048af5); +PROVIDE(mem_manage_fault = 0x08048c25); +PROVIDE(size_to_mpu_rasr_size = 0x0807285b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0807287b); +PROVIDE(region_allocate_and_init = 0x080495b5); +PROVIDE(mpu_configure_regions = 0x08049619); +PROVIDE(cbputc = 0x0807289b); +PROVIDE(picolibc_put = 0x080728a7); +PROVIDE(malloc_prepare = 0x08049959); +PROVIDE(malloc_lock = 0x0804997d); +PROVIDE(malloc_unlock = 0x08049991); +PROVIDE(pthread_barrier_pool_init = 0x08049a59); +PROVIDE(posix_fs_alloc_obj = 0x08049bf9); +PROVIDE(fs_close_vmeth = 0x08072b25); +PROVIDE(fs_ioctl_vmeth = 0x08049c45); +PROVIDE(fs_write_vmeth = 0x08049ca1); +PROVIDE(fs_read_vmeth = 0x08049cc1); +PROVIDE(pthread_cond_pool_init = 0x08049e85); +PROVIDE(pthread_mutex_pool_init = 0x08049ea1); +PROVIDE(posix_thread_pool_init = 0x08049ebd); +PROVIDE(fixed_data_unref = 0x08072ba1); +PROVIDE(net_buf_destroy = 0x08049ef5); +PROVIDE(fixed_data_alloc = 0x08049f55); +PROVIDE(zvfs_eventfd_ioctl_op = 0x0804a0b1); +PROVIDE(zvfs_eventfd_write_locked = 0x08072cad); +PROVIDE(zvfs_eventfd_rw_op = 0x0804a1e1); +PROVIDE(zvfs_eventfd_write_op = 0x0804a2dd); +PROVIDE(zvfs_eventfd_read_op = 0x0804a2e9); +PROVIDE(zvfs_eventfd_read_locked = 0x08072d19); +PROVIDE(zvfs_eventfd_close_op = 0x0804a2f5); +PROVIDE(zvfs_fdtable_call_ioctl = 0x08072d79); +PROVIDE(board_init = 0x0804a875); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08072dc1); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x0804a8a9); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x0804a8b9); +PROVIDE(fs_get_mnt_point = 0x0804a8c5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08072ddf); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x0804add1); +PROVIDE(call_fn_table = 0x0804addd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0804b11d); +PROVIDE(llext_copy_region = 0x0804b141); +PROVIDE(llext_read = 0x08072e7d); +PROVIDE(llext_seek = 0x08072e81); +PROVIDE(llext_peek = 0x08072e85); +PROVIDE(llext_alloc = 0x0804b291); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08072e8f); +PROVIDE(llext_find_extension_sym_iterate = 0x08072ed1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08072ee9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0804c0f9); +PROVIDE(llext_shell_name_cb = 0x0807303f); +PROVIDE(llext_name_get = 0x0804c1cd); +PROVIDE(llext_name_arg_get = 0x08073055); +PROVIDE(cmd_llext_list_symbols = 0x0804c1fd); +PROVIDE(cmd_llext_list = 0x0804c269); +PROVIDE(llext_shell_list_cb = 0x0804c289); +PROVIDE(cmd_llext_load_hex = 0x0804c2a1); +PROVIDE(cmd_llext_load_fs = 0x0804c375); +PROVIDE(cmd_llext_call_fn = 0x0804c435); +PROVIDE(cmd_llext_unload = 0x0804c461); +PROVIDE(trigger_net_event = 0x0804c4a1); +PROVIDE(dns_resolve_cb = 0x08073067); +PROVIDE(zvfs_fdtable_call_ioctl = 0x080731e5); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x08073203); +PROVIDE(k_mutex_unlock.isra.0 = 0x08073207); +PROVIDE(inet_is_supported = 0x08073245); +PROVIDE(net_if_get_by_index = 0x08073251); +PROVIDE(zsock_connected_cb = 0x08073255); +PROVIDE(ipv4_multicast_group.constprop.0 = 0x0804cd19); +PROVIDE(zsock_socket_internal = 0x0804cd69); +PROVIDE(zsock_accepted_cb = 0x0804cdf1); +PROVIDE(zsock_received_cb = 0x08073267); +PROVIDE(send_check_and_wait = 0x0804ce3d); +PROVIDE(zsock_flush_queue = 0x080732e9); +PROVIDE(zsock_recv_stream_immediate = 0x0807332f); +PROVIDE(sock_ioctl_vmeth = 0x0804cf41); +PROVIDE(sock_close2_vmeth = 0x08073427); +PROVIDE(sock_shutdown_vmeth = 0x0807342b); +PROVIDE(sock_bind_vmeth = 0x0807342f); +PROVIDE(sock_connect_vmeth = 0x08073433); +PROVIDE(sock_listen_vmeth = 0x08073437); +PROVIDE(sock_sendto_vmeth = 0x0807343b); +PROVIDE(sock_write_vmeth = 0x0807343f); +PROVIDE(sock_sendmsg_vmeth = 0x08073451); +PROVIDE(sock_accept_vmeth = 0x0807348d); +PROVIDE(zsock_recv_dgram = 0x0804d60d); +PROVIDE(zsock_recv_stream = 0x0804d8bd); +PROVIDE(sock_recvfrom_vmeth = 0x08073491); +PROVIDE(sock_read_vmeth = 0x08073495); +PROVIDE(sock_recvmsg_vmeth = 0x080734a7); +PROVIDE(sock_getsockopt_vmeth = 0x080734ab); +PROVIDE(sock_setsockopt_vmeth = 0x080734af); +PROVIDE(sock_getpeername_vmeth = 0x080734b3); +PROVIDE(sock_getsockname_vmeth = 0x080734b7); +PROVIDE(timeout_to_ms = 0x080734bb); +PROVIDE(tls_release = 0x0804def5); +PROVIDE(zvfs_fdtable_call_ioctl = 0x080734f1); +PROVIDE(zsock_fcntl_wrapper = 0x0807350f); +PROVIDE(is_blocking = 0x0807352b); +PROVIDE(tls_ctr_drbg_random = 0x08073551); +PROVIDE(crt_is_pem = 0x0804df4d); +PROVIDE(tls_mbedtls_reset = 0x08073559); +PROVIDE(tls_sock_getsockname_vmeth = 0x08073573); +PROVIDE(tls_sock_getpeername_vmeth = 0x08073579); +PROVIDE(tls_sock_listen_vmeth = 0x0807357f); +PROVIDE(tls_sock_bind_vmeth = 0x0807358d); +PROVIDE(tls_sock_shutdown_vmeth = 0x08073593); +PROVIDE(ztls_poll_update_pollin.constprop.0 = 0x08073599); +PROVIDE(tls_mbedtls_init = 0x0804df71); +PROVIDE(tls_rx = 0x0804e18d); +PROVIDE(tls_tx = 0x0804e159); +PROVIDE(wait = 0x08073687); +PROVIDE(tls_init = 0x0804e1c1); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x080736e7); +PROVIDE(k_mutex_unlock.isra.0 = 0x080736eb); +PROVIDE(tls_alloc = 0x0804e1f1); +PROVIDE(ztls_socket = 0x0804e289); +PROVIDE(wait_for_reason = 0x080736ef); +PROVIDE(tls_mbedtls_handshake.constprop.0 = 0x08073719); +PROVIDE(tls_is_supported = 0x080737dd); +PROVIDE(tls_sock_ioctl_vmeth = 0x0804e325); +PROVIDE(tls_sock_close2_vmeth = 0x080737f7); +PROVIDE(tls_sock_connect_vmeth = 0x080737fb); +PROVIDE(tls_sock_accept_vmeth = 0x080737ff); +PROVIDE(tls_sock_sendto_vmeth = 0x08073803); +PROVIDE(tls_sock_write_vmeth = 0x08073807); +PROVIDE(tls_sock_sendmsg_vmeth = 0x08073819); +PROVIDE(tls_sock_recvfrom_vmeth = 0x0807381d); +PROVIDE(tls_sock_read_vmeth = 0x08073821); +PROVIDE(tls_sock_getsockopt_vmeth = 0x08073833); +PROVIDE(tls_sock_setsockopt_vmeth = 0x08073837); +PROVIDE(socket_service_thread = 0x0804efd9); +PROVIDE(net_mgmt_sock_write = 0x0804f189); +PROVIDE(net_mgmt_sock_ioctl = 0x0804f1a9); +PROVIDE(net_mgmt_sock_connect = 0x08073855); +PROVIDE(net_mgmt_sock_listen = 0x08073859); +PROVIDE(net_mgmt_sock_accept = 0x0807385d); +PROVIDE(net_mgmt_is_supported = 0x08073861); +PROVIDE(net_mgmt_sock_setsockopt = 0x0804f22d); +PROVIDE(net_mgmt_sock_getsockopt = 0x0804f275); +PROVIDE(net_mgmt_sock_bind = 0x0804f2c1); +PROVIDE(znet_mgmt_recvfrom.constprop.0 = 0x0804f311); +PROVIDE(net_mgmt_sock_read = 0x08073873); +PROVIDE(net_mgmt_sock_recvfrom = 0x08073883); +PROVIDE(net_mgmt_sock_sendto = 0x0804f3dd); +PROVIDE(spair_bind = 0x0804f3fd); +PROVIDE(spair_listen = 0x0804f415); +PROVIDE(spair_accept = 0x0804f42d); +PROVIDE(spair_getsockopt = 0x0804f445); +PROVIDE(spair_setsockopt = 0x0804f45d); +PROVIDE(k_sem_take = 0x08073887); +PROVIDE(k_sem_give = 0x0807388b); +PROVIDE(spair_write_avail.isra.0 = 0x0804f475); +PROVIDE(sock_is_connected.isra.0 = 0x0804f495); +PROVIDE(k_poll_signal_raise.isra.0 = 0x0807388f); +PROVIDE(spair_delete = 0x0804f4ad); +PROVIDE(spair_close = 0x08073893); +PROVIDE(spair_connect = 0x0804f539); +PROVIDE(spair_read = 0x0804f551); +PROVIDE(spair_recvfrom = 0x080738af); +PROVIDE(spair_write = 0x0804f699); +PROVIDE(spair_sendmsg = 0x0804f869); +PROVIDE(spair_sendto = 0x080738c1); +PROVIDE(spair_ioctl = 0x0804f901); +PROVIDE(credentials_init = 0x0804fc6d); +PROVIDE(net_ipv4_is_addr_mcast = 0x080738c5); +PROVIDE(net_if_l2_data = 0x080738d5); +PROVIDE(net_if_get_device = 0x080738df); +PROVIDE(net_eth_get_hw_capabilities = 0x080738e9); +PROVIDE(ethernet_enable = 0x0807390b); +PROVIDE(net_eth_is_addr_broadcast = 0x08073941); +PROVIDE(ethernet_ip_recv = 0x0807396f); +PROVIDE(carrier_on_off = 0x080739cf); +PROVIDE(ethernet_recv = 0x0804fd5d); +PROVIDE(ethernet_mcast_monitor_cb = 0x0804fe99); +PROVIDE(ethernet_send = 0x0804ff01); +PROVIDE(is_hw_caps_supported = 0x08073a99); +PROVIDE(net_if_flag_is_set = 0x08073ab5); +PROVIDE(net_if_is_up = 0x08073acd); +PROVIDE(ethernet_set_config = 0x080500d9); +PROVIDE(ethernet_get_config = 0x08050351); +PROVIDE(sys_slist_prepend = 0x08073ae9); +PROVIDE(sys_slist_remove = 0x08073af7); +PROVIDE(net_if_get_link_addr = 0x08073b17); +PROVIDE(net_eth_is_addr_all_zeroes = 0x08073b21); +PROVIDE(net_eth_is_addr_unspecified = 0x08073b21); +PROVIDE(k_uptime_get_32 = 0x08073b49); +PROVIDE(net_eth_is_addr_broadcast = 0x08073b59); +PROVIDE(net_if_flag_is_set.constprop.0 = 0x08073b87); +PROVIDE(arp_entry_get_last_from_table = 0x080505bd); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x08073b9d); +PROVIDE(net_linkaddr_set.constprop.0.isra.0 = 0x08073ba1); +PROVIDE(if_get_addr.isra.0 = 0x08073bb3); +PROVIDE(arp_entry_find.isra.0 = 0x08073bdb); +PROVIDE(k_mutex_unlock.isra.0 = 0x08073bf7); +PROVIDE(net_if_tx_unlock = 0x08073bfb); +PROVIDE(arp_entry_cleanup = 0x08073c13); +PROVIDE(arp_request_timeout = 0x080505e5); +PROVIDE(arp_recv = 0x08073e31); +PROVIDE(sys_slist_find_and_remove = 0x080740cf); +PROVIDE(net_ipv4_is_ll_addr = 0x08050b8d); +PROVIDE(net_if_l2 = 0x08074105); +PROVIDE(net_if_get_device = 0x0807410f); +PROVIDE(net_context_send_cb = 0x08074119); +PROVIDE(l2_flags_get = 0x08074131); +PROVIDE(net_if_flag_is_set = 0x0807414b); +PROVIDE(k_uptime_get_32 = 0x08074163); +PROVIDE(net_if_flag_set = 0x08074173); +PROVIDE(net_if_flag_clear = 0x08074199); +PROVIDE(need_calc_checksum = 0x08050ba5); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x080741c1); +PROVIDE(net_if_lock = 0x080741c5); +PROVIDE(k_mutex_unlock.isra.0 = 0x080741d3); +PROVIDE(get_ifaddr.constprop.0 = 0x080741d7); +PROVIDE(iface_router_update_timer = 0x08050c09); +PROVIDE(net_if_ipv4_get_best_match = 0x08050c85); +PROVIDE(if_ipv4_get_addr = 0x08074215); +PROVIDE(ipv4_is_broadcast_address = 0x0807426f); +PROVIDE(net_if_flag_test_and_set = 0x080742ab); +PROVIDE(net_if_flag_test_and_clear = 0x080742dd); +PROVIDE(iface_router_expired = 0x08050d1d); +PROVIDE(net_if_ipv4_set_netmask_deprecated = 0x0807436d); +PROVIDE(update_operational_state = 0x080511bd); +PROVIDE(net_if_tx.isra.0 = 0x080513f9); +PROVIDE(parse_ipv4 = 0x08074833); +PROVIDE(k_mutex_unlock.isra.0 = 0x08074b73); +PROVIDE(mgmt_event_work_handler = 0x08051b71); +PROVIDE(sys_slist_find_and_remove.constprop.0.isra.0 = 0x08051cb5); +PROVIDE(mgmt_rebuild_global_event_mask = 0x08051ced); +PROVIDE(mgmt_event_wait_call = 0x08074b77); +PROVIDE(net_ipv4_is_addr_mcast = 0x08074c3b); +PROVIDE(net_if_flag_is_set = 0x08074c4b); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x08074c63); +PROVIDE(k_mutex_unlock.isra.0 = 0x08074c67); +PROVIDE(net_context_get_iface.isra.0 = 0x08074c6b); +PROVIDE(check_used_port.constprop.0 = 0x08051f51); +PROVIDE(find_available_port = 0x08074c6f); +PROVIDE(bind_default = 0x08074e39); +PROVIDE(context_sendto = 0x08074f19); +PROVIDE(net_pkt_set_iface = 0x080754b7); +PROVIDE(clone_pkt_attributes = 0x080754d1); +PROVIDE(pkt_cursor_jump = 0x080755c3); +PROVIDE(pkt_cursor_advance = 0x080755ef); +PROVIDE(pkt_cursor_update = 0x0807561f); +PROVIDE(pkt_estimate_headers_length.part.0 = 0x08075675); +PROVIDE(pkt_alloc_buffer.constprop.0 = 0x08075699); +PROVIDE(net_pkt_get_len.isra.0 = 0x08075739); +PROVIDE(net_pkt_cursor_operate = 0x08075749); +PROVIDE(pkt_alloc = 0x080525f1); +PROVIDE(pkt_alloc_with_buffer = 0x08075a3f); +PROVIDE(net_pkt_clone_internal = 0x08075c7b); +PROVIDE(tc_rx_handler = 0x08075e0f); +PROVIDE(icmp_call_handlers = 0x08052905); +PROVIDE(net_conn_change_remote = 0x08075e47); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x080529c1); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x080529d1); +PROVIDE(conn_set_unused = 0x080529dd); +PROVIDE(net_ipv4_is_addr_bcast = 0x08075e9b); +PROVIDE(icmpv4_handle_echo_request = 0x08075eef); +PROVIDE(sys_slist_get = 0x080764f1); +PROVIDE(tcp_window_full = 0x08076505); +PROVIDE(tcp_unsent_len = 0x08076523); +PROVIDE(tcp_validate_seq = 0x0807655f); +PROVIDE(tcp_send = 0x08052f79); +PROVIDE(tcp_setup_last_ack_timer = 0x08052fb5); +PROVIDE(tcp_last_ack_timeout = 0x08076979); +PROVIDE(tcp_derive_rto = 0x0807657d); +PROVIDE(k_sem_take = 0x080765a1); +PROVIDE(is_destination_local = 0x080765a5); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x080765ef); +PROVIDE(tcp_compute_new_length = 0x080765f3); +PROVIDE(net_pkt_get_len.isra.0 = 0x0807660d); +PROVIDE(tcp_pkt_pull = 0x0807661d); +PROVIDE(th_get = 0x08076657); +PROVIDE(tcp_data_len = 0x08076745); +PROVIDE(tcp_endpoint_set = 0x0807676f); +PROVIDE(tcp_endpoint_cmp = 0x080767bf); +PROVIDE(tcp_pkt_append = 0x080767ef); +PROVIDE(k_mutex_unlock.isra.0 = 0x08076877); +PROVIDE(tcp_send_timer_cancel = 0x08052fe9); +PROVIDE(tcp_enter_time_wait = 0x08053069); +PROVIDE(tcp_cleanup_recv_queue = 0x0807687b); +PROVIDE(tcp_send_process_no_lock = 0x08053091); +PROVIDE(atomic_inc.isra.0 = 0x080768ad); +PROVIDE(tcp_conn_release = 0x080531b1); +PROVIDE(tcp_conn_unref.isra.0 = 0x08053301); +PROVIDE(tcp_conn_close.isra.0 = 0x080768c5); +PROVIDE(tcp_send_process = 0x08076941); +PROVIDE(tcp_timewait_timeout = 0x08076985); +PROVIDE(tcp_fin_timeout = 0x08076991); +PROVIDE(tcp_resend_data = 0x08053955); +PROVIDE(tcp_send_zwp = 0x080537ed); +PROVIDE(tcp_send_ack = 0x08076b53); +PROVIDE(tcp_recv = 0x08054d11); +PROVIDE(tcp_out_ext = 0x0805361d); +PROVIDE(tcp_out = 0x08076b49); +PROVIDE(tcp_send_data = 0x08076b7d); +PROVIDE(tcp_short_window = 0x08076ca5); +PROVIDE(tcp_update_recv_wnd = 0x08076d2f); +PROVIDE(tcp_data_get = 0x08053b19); +PROVIDE(tcp_send_queued_data.part.0 = 0x08053c29); +PROVIDE(tcp_new_reno_init = 0x08076f4f); +PROVIDE(tcp_in = 0x08053cc9); +PROVIDE(dhcpv4_option_callback_get_unique_types = 0x08055041); +PROVIDE(k_uptime_get = 0x080770e9); +PROVIDE(dhcpv4_set_timeout = 0x08055099); +PROVIDE(dhcpv4_update_message_timeout = 0x080770f9); +PROVIDE(dhcpv4_enter_bound = 0x080550bd); +PROVIDE(net_if_flag_is_set = 0x08077145); +PROVIDE(net_send_data = 0x0807715b); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x08055125); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x08055135); +PROVIDE(dhcpv4_iface_event_handler = 0x08055141); +PROVIDE(dhcpv4_start_internal = 0x080551c9); +PROVIDE(dhcpv4_add_option_length_value = 0x08077173); +PROVIDE(dhcpv4_create_message = 0x08055251); +PROVIDE(dhcpv4_send_discover = 0x080771b7); +PROVIDE(dhcpv4_send_request = 0x0807720d); +PROVIDE(dhcpv4_timeout = 0x08055431); +PROVIDE(net_dhcpv4_input = 0x08055635); +PROVIDE(net_ipv4_is_addr_mcast = 0x080775f9); +PROVIDE(join_ipv4_mcast_group = 0x08077609); +PROVIDE(invoke_query_callback = 0x0807760b); +PROVIDE(get_slot_by_id = 0x0807761b); +PROVIDE(k_mutex_lock = 0x0807763f); +PROVIDE(release_query = 0x08077643); +PROVIDE(k_mutex_unlock.isra.0 = 0x08077657); +PROVIDE(dns_resolve_cancel_with_hash.constprop.0 = 0x0807765b); +PROVIDE(dns_resolve_close_locked = 0x08055dad); +PROVIDE(query_timeout = 0x080776b7); +PROVIDE(join_ipv6_mcast_group = 0x080776f1); +PROVIDE(dns_postprocess_server = 0x08055e49); +PROVIDE(dns_resolve_init_locked = 0x08055f7d); +PROVIDE(dispatcher_cb = 0x08056241); +PROVIDE(dns_write.constprop.0 = 0x080776f3); +PROVIDE(stm32_exti_isr = 0x080568e5); +PROVIDE(stm32_fill_irq_table = 0x08056935); +PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x0805694d); +PROVIDE(stm32_exti_init = 0x08056981); +PROVIDE(usb_dc_stm32_get_ep_state = 0x08056bb9); +PROVIDE(usb_dc_stm32_isr = 0x08056be5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08077861); +PROVIDE(adc_stm32_isr_18_init = 0x0807796b); +PROVIDE(adc_stm32_isr_127_init = 0x08077981); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08077997); +PROVIDE(adc_stm32_channel_setup = 0x08057575); +PROVIDE(adc_context_start_sampling = 0x080779b5); +PROVIDE(adc_context_on_timer_expired = 0x080779d3); +PROVIDE(adc_stm32_isr = 0x080576a1); +PROVIDE(adc_stm32_isr_18 = 0x080577a5); +PROVIDE(adc_stm32_isr_127 = 0x080577b1); +PROVIDE(adc_stm32_enable = 0x08077a05); +PROVIDE(adc_stm32_disable = 0x08077a3f); +PROVIDE(adc_stm32_calibrate.isra.0 = 0x080577bd); +PROVIDE(adc_stm32_init = 0x080578b5); +PROVIDE(adc_stm32_read = 0x08057b99); +PROVIDE(LL_RCC_HSI_IsReady = 0x08057f4d); +PROVIDE(get_pllsrc_frequency = 0x08057f5d); +PROVIDE(get_hclk_frequency = 0x08057f81); +PROVIDE(stm32_clock_control_get_subsys_rate = 0x08057fc1); +PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x080580a9); +PROVIDE(stm32_clock_control_off = 0x080580dd); +PROVIDE(stm32_clock_control_on = 0x08058121); +PROVIDE(stm32_clock_control_configure = 0x080583b5); +PROVIDE(uart_console_init = 0x08058415); +PROVIDE(console_out = 0x0805843d); +PROVIDE(dma_stm32_config_irq_0 = 0x08077af5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08077b7b); +PROVIDE(dma_stm32_init = 0x080584a9); +PROVIDE(dma_stm32_disable_stream = 0x08077b99); +PROVIDE(dma_stm32_clear_stream_irq.isra.0 = 0x08077bc1); +PROVIDE(dma_stm32_irq_handler = 0x08058a01); +PROVIDE(dma_stm32_irq_0_0 = 0x08077c1f); +PROVIDE(dma_stm32_irq_0_1 = 0x08077c25); +PROVIDE(dma_stm32_irq_0_2 = 0x08077c2b); +PROVIDE(dma_stm32_irq_0_3 = 0x08077c31); +PROVIDE(dma_stm32_irq_0_4 = 0x08077c37); +PROVIDE(dma_stm32_irq_0_5 = 0x08077c3d); +PROVIDE(dma_stm32_irq_0_6 = 0x08077c43); +PROVIDE(dma_stm32_irq_0_7 = 0x08077c49); +PROVIDE(LL_DMA_IsActiveFlag_HT0 = 0x08077c4f); +PROVIDE(LL_DMA_IsActiveFlag_HT1 = 0x08077c57); +PROVIDE(LL_DMA_IsActiveFlag_HT2 = 0x08077c5f); +PROVIDE(LL_DMA_IsActiveFlag_HT3 = 0x08077c67); +PROVIDE(LL_DMA_IsActiveFlag_HT4 = 0x08077c6f); +PROVIDE(LL_DMA_IsActiveFlag_HT5 = 0x08077c77); +PROVIDE(LL_DMA_IsActiveFlag_HT6 = 0x08077c7f); +PROVIDE(LL_DMA_IsActiveFlag_HT7 = 0x08077c87); +PROVIDE(LL_DMA_IsActiveFlag_TC0 = 0x08077c8f); +PROVIDE(LL_DMA_IsActiveFlag_TC1 = 0x08077c97); +PROVIDE(LL_DMA_IsActiveFlag_TC2 = 0x08077c9f); +PROVIDE(LL_DMA_IsActiveFlag_TC3 = 0x08077ca7); +PROVIDE(LL_DMA_IsActiveFlag_TC4 = 0x08077caf); +PROVIDE(LL_DMA_IsActiveFlag_TC5 = 0x08077cb7); +PROVIDE(LL_DMA_IsActiveFlag_TC6 = 0x08077cbf); +PROVIDE(LL_DMA_IsActiveFlag_TC7 = 0x08077cc7); +PROVIDE(LL_DMA_IsActiveFlag_TE0 = 0x08077ccf); +PROVIDE(LL_DMA_IsActiveFlag_TE1 = 0x08077cd7); +PROVIDE(LL_DMA_IsActiveFlag_TE2 = 0x08077cdf); +PROVIDE(LL_DMA_IsActiveFlag_TE3 = 0x08077ce7); +PROVIDE(LL_DMA_IsActiveFlag_TE4 = 0x08077cef); +PROVIDE(LL_DMA_IsActiveFlag_TE5 = 0x08077cf7); +PROVIDE(LL_DMA_IsActiveFlag_TE6 = 0x08077cff); +PROVIDE(LL_DMA_IsActiveFlag_TE7 = 0x08077d07); +PROVIDE(LL_DMA_IsActiveFlag_DME0 = 0x08077d0f); +PROVIDE(LL_DMA_IsActiveFlag_DME1 = 0x08077d17); +PROVIDE(LL_DMA_IsActiveFlag_DME2 = 0x08077d1f); +PROVIDE(LL_DMA_IsActiveFlag_DME3 = 0x08077d27); +PROVIDE(LL_DMA_IsActiveFlag_DME4 = 0x08077d2f); +PROVIDE(LL_DMA_IsActiveFlag_DME5 = 0x08077d37); +PROVIDE(LL_DMA_IsActiveFlag_DME6 = 0x08077d3f); +PROVIDE(LL_DMA_IsActiveFlag_DME7 = 0x08077d47); +PROVIDE(LL_DMA_IsActiveFlag_FE0 = 0x08077d4f); +PROVIDE(LL_DMA_IsActiveFlag_FE1 = 0x08077d57); +PROVIDE(LL_DMA_IsActiveFlag_FE2 = 0x08077d5f); +PROVIDE(LL_DMA_IsActiveFlag_FE3 = 0x08077d67); +PROVIDE(LL_DMA_IsActiveFlag_FE4 = 0x08077d6f); +PROVIDE(LL_DMA_IsActiveFlag_FE5 = 0x08077d77); +PROVIDE(LL_DMA_IsActiveFlag_FE6 = 0x08077d7f); +PROVIDE(LL_DMA_IsActiveFlag_FE7 = 0x08077d87); +PROVIDE(LL_DMA_ClearFlag_HT0 = 0x08077d8f); +PROVIDE(LL_DMA_ClearFlag_HT1 = 0x08077d95); +PROVIDE(LL_DMA_ClearFlag_HT2 = 0x08077d9d); +PROVIDE(LL_DMA_ClearFlag_HT3 = 0x08077da5); +PROVIDE(LL_DMA_ClearFlag_HT4 = 0x08077dad); +PROVIDE(LL_DMA_ClearFlag_HT5 = 0x08077db3); +PROVIDE(LL_DMA_ClearFlag_HT6 = 0x08077dbb); +PROVIDE(LL_DMA_ClearFlag_HT7 = 0x08077dc3); +PROVIDE(LL_DMA_ClearFlag_TC0 = 0x08077dcb); +PROVIDE(LL_DMA_ClearFlag_TC1 = 0x08077dd1); +PROVIDE(LL_DMA_ClearFlag_TC2 = 0x08077dd9); +PROVIDE(LL_DMA_ClearFlag_TC3 = 0x08077de1); +PROVIDE(LL_DMA_ClearFlag_TC4 = 0x08077de9); +PROVIDE(LL_DMA_ClearFlag_TC5 = 0x08077def); +PROVIDE(LL_DMA_ClearFlag_TC6 = 0x08077df7); +PROVIDE(LL_DMA_ClearFlag_TC7 = 0x08077dff); +PROVIDE(LL_DMA_ClearFlag_TE0 = 0x08077e07); +PROVIDE(LL_DMA_ClearFlag_TE1 = 0x08077e0d); +PROVIDE(LL_DMA_ClearFlag_TE2 = 0x08077e15); +PROVIDE(LL_DMA_ClearFlag_TE3 = 0x08077e1d); +PROVIDE(LL_DMA_ClearFlag_TE4 = 0x08077e25); +PROVIDE(LL_DMA_ClearFlag_TE5 = 0x08077e2b); +PROVIDE(LL_DMA_ClearFlag_TE6 = 0x08077e33); +PROVIDE(LL_DMA_ClearFlag_TE7 = 0x08077e3b); +PROVIDE(LL_DMA_ClearFlag_DME0 = 0x08077e43); +PROVIDE(LL_DMA_ClearFlag_DME1 = 0x08077e49); +PROVIDE(LL_DMA_ClearFlag_DME2 = 0x08077e51); +PROVIDE(LL_DMA_ClearFlag_DME3 = 0x08077e59); +PROVIDE(LL_DMA_ClearFlag_DME4 = 0x08077e61); +PROVIDE(LL_DMA_ClearFlag_DME5 = 0x08077e67); +PROVIDE(LL_DMA_ClearFlag_DME6 = 0x08077e6f); +PROVIDE(LL_DMA_ClearFlag_DME7 = 0x08077e77); +PROVIDE(LL_DMA_ClearFlag_FE0 = 0x08077e7f); +PROVIDE(LL_DMA_ClearFlag_FE1 = 0x08077e85); +PROVIDE(LL_DMA_ClearFlag_FE2 = 0x08077e8b); +PROVIDE(LL_DMA_ClearFlag_FE3 = 0x08077e93); +PROVIDE(LL_DMA_ClearFlag_FE4 = 0x08077e9b); +PROVIDE(LL_DMA_ClearFlag_FE5 = 0x08077ea1); +PROVIDE(LL_DMA_ClearFlag_FE6 = 0x08077ea7); +PROVIDE(LL_DMA_ClearFlag_FE7 = 0x08077eaf); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08077eb7); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08077f41); +PROVIDE(dmamux_stm32_init = 0x080591d1); +PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x08059261); +PROVIDE(entropy_stm32_suspend.isra.0 = 0x08059279); +PROVIDE(acquire_rng = 0x080592b1); +PROVIDE(start_pool_filling = 0x080592f5); +PROVIDE(rng_pool_get = 0x08059351); +PROVIDE(pool_filling_work_handler = 0x08077f61); +PROVIDE(entropy_stm32_rng_get_entropy = 0x080593e5); +PROVIDE(entropy_stm32_rng_init = 0x0805943d); +PROVIDE(random_byte_get = 0x080594d1); +PROVIDE(entropy_stm32_rng_get_entropy_isr = 0x0805952d); +PROVIDE(stm32_rng_isr = 0x08059611); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0807801b); +PROVIDE(phy_mii_reg_write.isra.0 = 0x08078039); +PROVIDE(phy_mii_write = 0x08078063); +PROVIDE(phy_mii_reg_read.isra.0 = 0x0807806b); +PROVIDE(phy_mii_cfg_link = 0x08078095); +PROVIDE(phy_mii_read = 0x08078187); +PROVIDE(phy_mii_get_link_state = 0x0807818d); +PROVIDE(invoke_link_cb = 0x080781b5); +PROVIDE(phy_mii_link_cb_set = 0x080781d1); +PROVIDE(monitor_work_handler = 0x08059d71); +PROVIDE(phy_mii_initialize = 0x08059f91); +PROVIDE(extract_instr = 0x080781e1); +PROVIDE(flash_stm32_qspi_get_parameters = 0x0805a139); +PROVIDE(flash_stm32_qspi_get_size = 0x080783c5); +PROVIDE(flash_stm32_qspi_pages_layout = 0x080783d1); +PROVIDE(k_sem_give = 0x080783dd); +PROVIDE(flash_stm32_qspi_irq_config_func = 0x080783e1); +PROVIDE(flash_stm32_qspi_isr = 0x080783f7); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080783fd); +PROVIDE(qspi_read_sfdp.isra.0 = 0x0805a141); +PROVIDE(qspi_write_access.isra.0 = 0x0805a20d); +PROVIDE(qspi_lock_thread.isra.0 = 0x0807841b); +PROVIDE(qspi_send_cmd.isra.0 = 0x0805a28d); +PROVIDE(qspi_read_access.isra.0 = 0x0805a2e1); +PROVIDE(qspi_read_status_register = 0x08078429); +PROVIDE(flash_stm32_qspi_read = 0x08078463); +PROVIDE(qspi_wait_until_ready = 0x080784fd); +PROVIDE(flash_stm32_qspi_erase = 0x0805a361); +PROVIDE(flash_stm32_qspi_write = 0x0805a491); +PROVIDE(flash_stm32_qspi_init = 0x0805a57d); +PROVIDE(flash_stm32h7_get_parameters = 0x0805ad25); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08078561); +PROVIDE(stm32h7_flash_init = 0x0805ad89); +PROVIDE(get_sector.isra.0 = 0x0805ae0d); +PROVIDE(flash_stm32_check_status.isra.0 = 0x0805ae8d); +PROVIDE(_flash_stm32_sem_take.isra.0 = 0x0805af81); +PROVIDE(flash_stm32h7_read = 0x0805b051); +PROVIDE(flash_stm32h7_cr_lock = 0x0805b179); +PROVIDE(write_ndwords.constprop.0 = 0x0805b1d1); +PROVIDE(flash_stm32h7_erase = 0x0805b38d); +PROVIDE(flash_stm32h7_write = 0x0805b465); +PROVIDE(gpio_stm32_port_get_raw = 0x080785dd); +PROVIDE(gpio_stm32_port_set_bits_raw = 0x080785e9); +PROVIDE(gpio_stm32_port_clear_bits_raw = 0x080785f3); +PROVIDE(gpio_stm32_manage_callback = 0x080785ff); +PROVIDE(gpio_stm32_pin_interrupt_configure = 0x0805b501); +PROVIDE(gpio_stm32_isr = 0x08078729); +PROVIDE(z_stm32_hsem_lock.constprop.0 = 0x0805b5b1); +PROVIDE(gpio_stm32_port_toggle_bits = 0x0805b5e5); +PROVIDE(gpio_stm32_port_set_masked_raw = 0x0805b609); +PROVIDE(gpio_stm32_init = 0x0805b631); +PROVIDE(gpio_stm32_configure_raw.isra.0 = 0x0805b669); +PROVIDE(gpio_stm32_config = 0x08078651); +PROVIDE(stm32_i2c_disable_transfer_interrupts = 0x080787b7); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080787f5); +PROVIDE(stm32_i2c_enable_transfer_interrupts.isra.0 = 0x08078815); +PROVIDE(stm32_i2c_master_mode_end = 0x08078839); +PROVIDE(msg_init = 0x0805b805); +PROVIDE(i2c_stm32_irq_config_func_0 = 0x08078a79); +PROVIDE(i2c_stm32_irq_config_func_1 = 0x08078a9f); +PROVIDE(i2c_stm32_irq_config_func_2 = 0x08078ac5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08078aeb); +PROVIDE(i2c_stm32_transfer = 0x08078b0b); +PROVIDE(i2c_stm32_init = 0x0805bb4d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08078c4b); +PROVIDE(memc_stm32_init = 0x0805bcd9); +PROVIDE(LL_TIM_OC_GetPolarity = 0x0805be09); +PROVIDE(LL_TIM_OC_SetCompareCH1 = 0x08078dc3); +PROVIDE(LL_TIM_OC_SetCompareCH2 = 0x08078dc7); +PROVIDE(LL_TIM_OC_SetCompareCH3 = 0x08078dcb); +PROVIDE(LL_TIM_OC_SetCompareCH4 = 0x08078dcf); +PROVIDE(LL_TIM_OC_SetCompareCH5 = 0x08078dd3); +PROVIDE(LL_TIM_OC_SetCompareCH6 = 0x08078dd9); +PROVIDE(pwm_stm32_get_cycles_per_sec = 0x08078ddd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08078df3); +PROVIDE(pwm_stm32_set_cycles = 0x0805be6d); +PROVIDE(pwm_stm32_init = 0x0805c115); +PROVIDE(gpio_pin_set = 0x0807901b); +PROVIDE(regulator_fixed_enable = 0x0807903b); +PROVIDE(regulator_fixed_count_voltages = 0x08079059); +PROVIDE(regulator_fixed_list_voltage = 0x08079067); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0805c295); +PROVIDE(regulator_fixed_init = 0x0805c2b9); +PROVIDE(regulator_fixed_disable = 0x08079081); +PROVIDE(uart_stm32_ll2cfg_databits = 0x0807949b); +PROVIDE(uart_stm32_err_check = 0x080794c5); +PROVIDE(uart_stm32_irq_tx_enable = 0x0807951f); +PROVIDE(uart_stm32_irq_tx_disable = 0x08079535); +PROVIDE(uart_stm32_irq_rx_enable = 0x0807954b); +PROVIDE(uart_stm32_irq_rx_disable = 0x08079561); +PROVIDE(uart_stm32_irq_rx_ready = 0x08079577); +PROVIDE(uart_stm32_irq_err_enable = 0x0805c339); +PROVIDE(uart_stm32_irq_err_disable = 0x0805c3b1); +PROVIDE(uart_stm32_irq_update = 0x08079583); +PROVIDE(uart_stm32_irq_callback_set = 0x08079587); +PROVIDE(uart_stm32_isr = 0x0807958f); +PROVIDE(uart_stm32_irq_config_func_0 = 0x0807959b); +PROVIDE(uart_stm32_irq_config_func_1 = 0x080795b1); +PROVIDE(uart_stm32_irq_config_func_2 = 0x080795c7); +PROVIDE(uart_stm32_irq_config_func_3 = 0x080795dd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080795f3); +PROVIDE(uart_stm32_set_baudrate = 0x0805c429); +PROVIDE(uart_stm32_irq_tx_complete = 0x08079613); +PROVIDE(uart_stm32_irq_tx_ready = 0x0807961f); +PROVIDE(uart_stm32_parameters_set = 0x0805c489); +PROVIDE(uart_stm32_init = 0x0805c5bd); +PROVIDE(uart_stm32_config_get = 0x08079633); +PROVIDE(uart_stm32_configure = 0x0805c7c1); +PROVIDE(uart_stm32_fifo_fill = 0x080796c5); +PROVIDE(uart_stm32_poll_out = 0x0807971d); +PROVIDE(uart_stm32_irq_is_pending = 0x08079753); +PROVIDE(uart_stm32_fifo_read = 0x08079777); +PROVIDE(uart_stm32_poll_in = 0x080797b9); +PROVIDE(LL_SPI_SetTransferDirection = 0x080797db); +PROVIDE(spi_context_get_next_buf = 0x080797f9); +PROVIDE(spi_context_buffers_setup = 0x08079825); +PROVIDE(spi_stm32_send_next_frame = 0x08079883); +PROVIDE(spi_stm32_read_next_frame = 0x08079915); +PROVIDE(spi_stm32_irq_config_func_0 = 0x0807999d); +PROVIDE(spi_stm32_count_bufset_frames = 0x080799b3); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x080799f7); +PROVIDE(spi_stm32_get_err = 0x0805c92d); +PROVIDE(gpio_pin_set_dt.isra.0 = 0x08079a17); +PROVIDE(ll_func_disable_spi = 0x08079a3f); +PROVIDE(spi_context_unlock_unconditionally = 0x08079a5b); +PROVIDE(spi_stm32_release = 0x08079a8b); +PROVIDE(spi_stm32_init = 0x0805c97d); +PROVIDE(spi_stm32_complete = 0x08079a9f); +PROVIDE(spi_stm32_isr = 0x08079bd7); +PROVIDE(transceive = 0x0805cb05); +PROVIDE(spi_stm32_transceive_async = 0x08079df9); +PROVIDE(spi_stm32_transceive = 0x08079e0f); +PROVIDE(elapsed = 0x0805d05d); +PROVIDE(sys_clock_driver_init = 0x0805d0a9); +PROVIDE(gpio_pin_configure_dt = 0x08079e35); +PROVIDE(gc2145_get_fmt = 0x08079e6b); +PROVIDE(gc2145_get_caps = 0x0805d351); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x08079e7b); +PROVIDE(k_sleep.isra.0 = 0x08079e99); +PROVIDE(k_msleep.isra.0 = 0x08079e9d); +PROVIDE(gc2145_write_reg = 0x0805d35d); +PROVIDE(gc2145_set_stream = 0x08079ea7); +PROVIDE(gc2145_set_window.isra.0 = 0x08079eb5); +PROVIDE(gc2145_read_reg = 0x0805d3e1); +PROVIDE(gc2145_set_fmt = 0x0805d469); +PROVIDE(gc2145_set_ctrl = 0x0805d699); +PROVIDE(gc2145_init_0 = 0x0805d709); +PROVIDE(video_stm32_dcmi_set_fmt = 0x0805d8c9); +PROVIDE(video_stm32_dcmi_get_fmt = 0x08079f5f); +PROVIDE(video_stm32_dcmi_set_ctrl = 0x08079fb1); +PROVIDE(video_stm32_dcmi_get_ctrl = 0x08079fc3); +PROVIDE(video_stm32_dcmi_enqueue = 0x08079fd5); +PROVIDE(video_stm32_dcmi_dequeue = 0x0807a00b); +PROVIDE(video_stm32_dcmi_irq_config_func = 0x0807a037); +PROVIDE(stm32_dcmi_isr = 0x0807a04d); +PROVIDE(video_stm32_dcmi_get_caps = 0x0807a055); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0807a087); +PROVIDE(dmci_dma_callback = 0x0805d975); +PROVIDE(video_stm32_dcmi_init = 0x0805d9ad); +PROVIDE(video_stm32_dcmi_set_stream = 0x0805dd1d); +PROVIDE(DCMI_DMAXferCplt = 0x0807a0a7); +PROVIDE(DCMI_DMAError = 0x0807a159); +PROVIDE(DMA_SetConfig = 0x0805e35d); +PROVIDE(DMA_CalcBaseAndBitshift = 0x0805e4e9); +PROVIDE(DMA_CalcDMAMUXChannelBaseAndMask = 0x0805e59d); +PROVIDE(DMA_CalcDMAMUXRequestGenBaseAndMask = 0x0805e635); +PROVIDE(DMA_MultiBufferSetConfig = 0x0805f7d9); +PROVIDE(ETH_SetMACConfig = 0x0807a17d); +PROVIDE(ETH_SetDMAConfig = 0x0805fbfd); +PROVIDE(ETH_Prepare_Tx_Descriptors = 0x0805fca1); +PROVIDE(ETH_UpdateDescriptor = 0x0807a30b); +PROVIDE(QSPI_Config = 0x0807aeb9); +PROVIDE(QSPI_WaitFlagStateUntilTimeout = 0x0807b02d); +PROVIDE(QSPI_DMAAbortCplt = 0x0807b337); +PROVIDE(LL_RCC_HSE_IsReady = 0x08060e0d); +PROVIDE(LL_RCC_HSI_IsReady = 0x08060e1d); +PROVIDE(LL_RCC_CSI_IsReady = 0x08060e2d); +PROVIDE(RCC_GetHCLKClockFreq = 0x08060e3d); +PROVIDE(RCC_GetPCLK1ClockFreq = 0x08060e59); +PROVIDE(RCC_GetPCLK2ClockFreq = 0x08060e75); +PROVIDE(RCC_GetPCLK4ClockFreq = 0x08060e91); +PROVIDE(RCC_GetSystemClockFreq = 0x08060f7d); +PROVIDE(USB_CoreReset = 0x0807b52f); +PROVIDE(aes_gen_tables = 0x080619f1); +PROVIDE(asn1_get_sequence_of_cb = 0x0807bb87); +PROVIDE(asn1_get_tagged_int = 0x0807bc4b); +PROVIDE(mbedtls_ct_uchar_in_range_if = 0x080625e5); +PROVIDE(mbedtls_ct_base64_dec_value = 0x0807bec5); +PROVIDE(mbedtls_ct_bool = 0x08062735); +PROVIDE(mbedtls_mpi_core_exp_mod_optionally_safe = 0x0806277d); +PROVIDE(mbedtls_ct_mpi_sign_if = 0x0806291d); +PROVIDE(mbedtls_mpi_resize_clear = 0x0807c5a9); +PROVIDE(add_sub_mpi = 0x0807ca11); +PROVIDE(mbedtls_mpi_exp_mod_optionally_safe = 0x0807cc81); +PROVIDE(get_no_padding = 0x08062c69); +PROVIDE(mbedtls_ct_bool = 0x080630fd); +PROVIDE(verify_header = 0x08063dc1); +PROVIDE(verify_chain = 0x08063e01); +PROVIDE(buffer_alloc_calloc = 0x08063e3d); +PROVIDE(buffer_alloc_free = 0x08063f51); +PROVIDE(oid_sig_alg_from_asn1.part.0 = 0x080640e1); +PROVIDE(mbedtls_ct_bool = 0x08064665); +PROVIDE(mbedtls_ct_uint_lt = 0x0806467d); +PROVIDE(mbedtls_ct_uint_ne = 0x080646b1); +PROVIDE(mbedtls_md_get_size_from_type = 0x0807d5d3); +PROVIDE(mgf_mask = 0x080646c5); +PROVIDE(hash_mprime = 0x08064791); +PROVIDE(rsa_rsassa_pkcs1_v15_encode = 0x08064821); +PROVIDE(asn1_get_nonzero_mpi = 0x08064921); +PROVIDE(rsa_check_context.constprop.0 = 0x08064945); +PROVIDE(rsa_rsassa_pss_sign_no_mode_check = 0x08065191); +PROVIDE(_mbedtls_init = 0x080676dd); +PROVIDE(pem_aes_decrypt = 0x0807dc5f); +PROVIDE(mbedtls_pk_rsa = 0x0807ddbf); +PROVIDE(pk_get_pk_alg.constprop.0 = 0x080679c5); +PROVIDE(pk_parse_key_pkcs8_unencrypted_der.constprop.0 = 0x08067a19); +PROVIDE(pk_hashlen_helper = 0x0807dddb); +PROVIDE(rsa_can_do = 0x0807de63); +PROVIDE(rsa_debug = 0x08067ef5); +PROVIDE(rsa_free_wrap = 0x0807de6f); +PROVIDE(rsa_alloc_wrap = 0x0807de81); +PROVIDE(rsa_check_pair_wrap = 0x0807de97); +PROVIDE(rsa_encrypt_wrap = 0x08067f19); +PROVIDE(rsa_decrypt_wrap = 0x08067f5d); +PROVIDE(rsa_sign_wrap = 0x08067fa1); +PROVIDE(rsa_verify_wrap = 0x08067fe9); +PROVIDE(rsa_get_bitlen = 0x0807de9f); +PROVIDE(x509_parse2_int = 0x0807dea5); +PROVIDE(x509_memcasecmp = 0x0807df23); +PROVIDE(x509_name_cmp = 0x0807df53); +PROVIDE(x509_profile_check_key = 0x0807dfd1); +PROVIDE(x509_crt_check_cn = 0x0807dfff); +PROVIDE(x509_crt_verify_restartable_ca_cb.constprop.0.isra.0 = 0x0806876d); +PROVIDE(mbedtls_x509_crt_parse_der_internal = 0x08068b2d); +PROVIDE(mbedtls_ct_bool = 0x080696fd); +PROVIDE(mbedtls_ct_uint_lt = 0x08069715); +PROVIDE(mbedtls_ct_uint_eq = 0x08069749); +PROVIDE(mbedtls_ssl_own_key = 0x0807e301); +PROVIDE(mbedtls_ct_uint_ne = 0x0806a8d1); +PROVIDE(ssl_ciphersuite_match = 0x0806a8f5); +PROVIDE(ssl_mfl_code_to_length = 0x0806b2a5); +PROVIDE(tls_prf_generic = 0x0806b2bd); +PROVIDE(tls_prf_sha256 = 0x0807e315); +PROVIDE(tls_prf_sha384 = 0x0807e335); +PROVIDE(ssl_update_checksum_sha256 = 0x0807e355); +PROVIDE(ssl_update_checksum_sha384 = 0x0807e35d); +PROVIDE(ssl_calc_finished_tls_generic = 0x0806b425); +PROVIDE(ssl_calc_finished_tls_sha256 = 0x0807e365); +PROVIDE(ssl_calc_finished_tls_sha384 = 0x0807e37f); +PROVIDE(ssl_calc_verify_tls_legacy.constprop.0 = 0x0807e399); +PROVIDE(ssl_calc_verify_tls_sha384 = 0x0807e3ed); +PROVIDE(ssl_calc_verify_tls_sha256 = 0x0807e3f5); +PROVIDE(ssl_update_checksum_start = 0x0807e3fd); +PROVIDE(ssl_handshake_init = 0x0806b9e1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0807e919); +PROVIDE(do_device_init = 0x0807e94f); +PROVIDE(z_sys_init_run_level = 0x0806c83d); +PROVIDE(bg_thread_main = 0x0806c86d); +PROVIDE(statics_init = 0x0806cac1); +PROVIDE(create_free_list = 0x0807ea89); +PROVIDE(init_mem_slab_obj_core_list = 0x0806cae5); +PROVIDE(init_mbox_module = 0x0806cb65); +PROVIDE(unpend_thread_no_timeout = 0x0807eb4f); +PROVIDE(adjust_owner_prio.isra.0 = 0x0807ecd5); +PROVIDE(unpend_thread_no_timeout = 0x0807ecf3); +PROVIDE(queue_insert = 0x0807ed0d); +PROVIDE(k_sys_work_q_init = 0x0806d0bd); +PROVIDE(flag_test_and_clear = 0x0807efe1); +PROVIDE(unschedule_locked = 0x0807eff7); +PROVIDE(notify_queue_locked.isra.0 = 0x0807f015); +PROVIDE(work_queue_main = 0x0806d0f1); +PROVIDE(cancel_async_locked = 0x0807f025); +PROVIDE(submit_to_queue_locked = 0x0806d23d); +PROVIDE(work_timeout = 0x0807f08b); +PROVIDE(unpend_thread_no_timeout = 0x0807f18d); +PROVIDE(sys_dlist_remove = 0x0807f20d); +PROVIDE(unpend_thread_no_timeout = 0x0807f21d); +PROVIDE(z_swap_irqlock = 0x0806d779); +PROVIDE(ready_thread = 0x0806d7ad); +PROVIDE(unready_thread = 0x0806d831); +PROVIDE(add_to_waitq_locked = 0x0807f231); +PROVIDE(z_tick_sleep = 0x0806dd2d); +PROVIDE(wait_for = 0x0807f41b); +PROVIDE(z_sched_wake_all.constprop.0 = 0x0807f48d); +PROVIDE(slice_timeout = 0x0806e0d1); +PROVIDE(first = 0x0806e2cd); +PROVIDE(elapsed = 0x0806e2dd); +PROVIDE(next_timeout = 0x0807f6bd); +PROVIDE(remove_timeout = 0x0806e2f1); +PROVIDE(timeout_rem = 0x0806e329); +PROVIDE(clear_event_registrations = 0x0806e6cd); +PROVIDE(add_event = 0x0807f86f); +PROVIDE(register_events = 0x0807f8c3); +PROVIDE(signal_poll_event = 0x0807f9c7); +PROVIDE(z_heap_aligned_alloc = 0x0807fac3); +PROVIDE(__ultoa_invert = 0x0807fd83); +PROVIDE(skip_to_arg = 0x0806ed05); +PROVIDE(mulShiftAll64 = 0x0807fe35); +PROVIDE(div10 = 0x0806f7f9); +PROVIDE(chunk_field = 0x0806ffe1); +PROVIDE(chunk_set = 0x0806fff7); +PROVIDE(chunk_size = 0x0807000d); +PROVIDE(set_chunk_used = 0x08070019); +PROVIDE(set_chunk_size = 0x08070049); +PROVIDE(mem_to_chunkid = 0x08070051); +PROVIDE(bucket_idx.isra.0 = 0x08070065); +PROVIDE(free_list_remove_bidx = 0x08070083); +PROVIDE(free_list_remove = 0x080700df); +PROVIDE(alloc_chunk = 0x0807010d); +PROVIDE(split_chunks = 0x08070181); +PROVIDE(merge_chunks = 0x080701cf); +PROVIDE(free_list_add = 0x0807020b); +PROVIDE(free_chunk = 0x0807028f); +PROVIDE(setup_bundle_data.constprop.0 = 0x08070949); +PROVIDE(set_region = 0x08070987); +PROVIDE(match_region = 0x08070a17); +PROVIDE(ring_buf_put_claim = 0x08070be3); +PROVIDE(ring_buf_get_claim = 0x08070c01); +PROVIDE(cmd_kernel_reboot_cold = 0x08071349); +PROVIDE(cmd_kernel_reboot_warm = 0x08071351); +PROVIDE(panic = 0x08072091); +PROVIDE(process_log_msg.constprop.0 = 0x08072093); +PROVIDE(process = 0x0807211f); +PROVIDE(dropped = 0x0807215f); +PROVIDE(remove_from_tail.part.0 = 0x08072465); +PROVIDE(foldcase = 0x080728b1); +PROVIDE(fnmatchx = 0x080728c1); +PROVIDE(processing_data = 0x08073e4d); +PROVIDE(net_init = 0x08073eb7); +PROVIDE(net_ipv4_is_addr_mcast = 0x0807619d); +PROVIDE(net_ipv4_is_addr_bcast = 0x080761ad); +PROVIDE(net_ipv4_is_my_addr = 0x080761cf); +PROVIDE(flash_get_page_info = 0x08078325); +PROVIDE(vnd_gpio_pin_configure = 0x08078785); +PROVIDE(vnd_gpio_port_get_raw = 0x0807878b); +PROVIDE(vnd_gpio_port_set_masked_raw = 0x08078791); +PROVIDE(vnd_gpio_port_set_bits_raw = 0x08078797); +PROVIDE(vnd_gpio_port_clear_bits_raw = 0x0807879d); +PROVIDE(vnd_gpio_port_toggle_bits = 0x080787a3); +PROVIDE(mdio_stm32_bus_enable = 0x08078b99); +PROVIDE(mdio_stm32_init = 0x08078b9b); +PROVIDE(mdio_stm32_read = 0x08078bcf); +PROVIDE(mdio_stm32_bus_disable = 0x08078c0f); +PROVIDE(mdio_stm32_write = 0x08078c11); +PROVIDE(memc_stm32_sdram_init = 0x08078c6b); +PROVIDE(mfd_pf1550_init = 0x08078d3b); +PROVIDE(regulator_delay = 0x08078e13); +PROVIDE(linear_range_group_get_value = 0x08079097); +PROVIDE(regulator_pf1550_count_voltages = 0x080790cf); +PROVIDE(regulator_pf1550_list_voltage = 0x080790fb); +PROVIDE(regulator_pf1550_list_current_limit = 0x0807910b); +PROVIDE(regulator_pf1550_init = 0x08079129); +PROVIDE(linear_range_group_get_win_index = 0x0807914f); +PROVIDE(regulator_pf1550_common_init = 0x080791cb); +PROVIDE(i2c_write_read.constprop.0 = 0x080791e1); +PROVIDE(i2c_reg_update_byte = 0x08079217); +PROVIDE(regulator_pf1550_disable = 0x0807927d); +PROVIDE(regulator_pf1550_power_off = 0x08079299); +PROVIDE(regulator_pf1550_get_voltage = 0x080792b3); +PROVIDE(regulator_pf1550_enable = 0x080792eb); +PROVIDE(regulator_pf1550_count_current_limits = 0x08079307); +PROVIDE(regulator_pf1550_set_current_limit = 0x08079341); +PROVIDE(regulator_pf1550_set_voltage = 0x080793d1); +PROVIDE(reset_stm32_status = 0x08079429); +PROVIDE(reset_stm32_line_assert = 0x0807944b); +PROVIDE(reset_stm32_line_deassert = 0x08079467); +PROVIDE(reset_stm32_line_toggle = 0x08079485); +PROVIDE(aes_ctx_free = 0x0807d24f); +PROVIDE(aes_ctx_alloc = 0x0807d261); +PROVIDE(aes_setkey_dec_wrap = 0x0807d279); +PROVIDE(aes_setkey_enc_wrap = 0x0807d27d); +PROVIDE(aes_crypt_cbc_wrap = 0x0807d281); +PROVIDE(aes_crypt_ecb_wrap = 0x0807d285); +PROVIDE(dma_stm32_reload = 0x08058ae1); +PROVIDE(LL_RCC_CalcPLLClockFreq = 0x0807b4c7); +PROVIDE(mbedtls_ssl_session_free = 0x0807e651); +PROVIDE(mbedtls_mpi_core_sub = 0x0807c135); +PROVIDE(dmamux_stm32_start = 0x080590ad); +PROVIDE(dns_resolve_init_with_svc = 0x080777e1); +PROVIDE(net_conn_init = 0x08052f29); +PROVIDE(net_ipv4_unspecified_address = 0x08051b61); +PROVIDE(main = 0x0806ff9f); PROVIDE(__aeabi_ul2d = 0x080406e1); -PROVIDE(z_impl_net_if_ipv4_addr_add_by_index = 0x0806eccf); -PROVIDE(zsock_bind_ctx = 0x0804cd55); -PROVIDE(mbedtls_ssl_init = 0x08077a03); -PROVIDE(mbedtls_internal_sha256_process = 0x080614c1); -PROVIDE(mbedtls_md5_free = 0x0807686d); -PROVIDE(mbedtls_oid_get_x509_ext_type = 0x0805e989); -PROVIDE(mbedtls_sha256_update = 0x08076e01); -PROVIDE(mbedtls_ssl_conf_max_frag_len = 0x08065e0d); -PROVIDE(z_timeout_remaining = 0x08078c47); +PROVIDE(z_impl_net_if_ipv4_addr_add_by_index = 0x08074509); +PROVIDE(zsock_bind_ctx = 0x0804d1e5); +PROVIDE(mbedtls_ssl_init = 0x0807e4ed); +PROVIDE(mbedtls_internal_sha256_process = 0x08066c45); +PROVIDE(mbedtls_md5_free = 0x0807d357); +PROVIDE(mbedtls_oid_get_x509_ext_type = 0x0806410d); +PROVIDE(mbedtls_sha256_update = 0x0807d8eb); +PROVIDE(mbedtls_ssl_conf_max_frag_len = 0x0806b591); +PROVIDE(z_timeout_remaining = 0x0807f731); +PROVIDE(sys_multi_heap_alloc = 0x080706eb); PROVIDE(__floatdidf = 0x080406f1); -PROVIDE(memcmp = 0x0807915d); -PROVIDE(HAL_PCDEx_ActivateLPM = 0x08074561); -PROVIDE(mbedtls_ssl_update_handshake_status = 0x080776ed); -PROVIDE(mbedtls_md_hmac_reset = 0x0805de6d); -PROVIDE(z_shell_fprintf_fmt = 0x08047491); -PROVIDE(mbedtls_internal_aes_encrypt = 0x0805c73d); -PROVIDE(ethernet_mgmt_raise_carrier_on_event = 0x0805010d); -PROVIDE(net_tcp_conn_sem_get = 0x08071843); -PROVIDE(mbedtls_x509_get_serial = 0x080628b1); -PROVIDE(HAL_QSPI_StatusMatchCallback = 0x08072745); -PROVIDE(listen = 0x0806d311); -PROVIDE(net_eth_carrier_off = 0x0806e22d); -PROVIDE(z_shell_op_cursor_vert_move = 0x080475a5); -PROVIDE(mbedtls_pk_decrypt = 0x0806263d); -PROVIDE(net_buf_alloc_len = 0x08049ae9); -PROVIDE(mbedtls_mpi_core_read_be = 0x08075487); -PROVIDE(zvfs_free_fd = 0x0806afff); -PROVIDE(ztls_close_ctx = 0x0804e249); -PROVIDE(mbedtls_ssl_session_reset_int = 0x08077c75); -PROVIDE(credentials_lock = 0x0804f85d); -PROVIDE(mbedtls_md5_starts = 0x0805de99); -PROVIDE(mbedtls_ssl_ciphersuite_from_string = 0x08063ca1); +PROVIDE(memcmp = 0x0807fc47); +PROVIDE(HAL_PCDEx_ActivateLPM = 0x0807ae91); +PROVIDE(HAL_DCMI_Init = 0x0805e059); +PROVIDE(mbedtls_ssl_update_handshake_status = 0x0807e1d7); +PROVIDE(mbedtls_md_hmac_reset = 0x080635f1); +PROVIDE(z_shell_fprintf_fmt = 0x08047921); +PROVIDE(mbedtls_internal_aes_encrypt = 0x08061ec1); +PROVIDE(ethernet_mgmt_raise_carrier_on_event = 0x0805059d); +PROVIDE(net_tcp_conn_sem_get = 0x0807707d); +PROVIDE(mbedtls_x509_get_serial = 0x08068035); +PROVIDE(HAL_QSPI_StatusMatchCallback = 0x08078557); +PROVIDE(listen = 0x08072b4b); +PROVIDE(net_eth_carrier_off = 0x08073a67); +PROVIDE(z_shell_op_cursor_vert_move = 0x08047a35); +PROVIDE(mbedtls_pk_decrypt = 0x08067dc1); +PROVIDE(net_buf_alloc_len = 0x08049f79); +PROVIDE(dma_stm32_configure = 0x080585cd); +PROVIDE(mbedtls_mpi_core_read_be = 0x0807bf71); +PROVIDE(zvfs_free_fd = 0x08070839); +PROVIDE(ztls_close_ctx = 0x0804e6d9); +PROVIDE(mbedtls_ssl_session_reset_int = 0x0807e75f); +PROVIDE(credentials_lock = 0x0804fced); +PROVIDE(mbedtls_md5_starts = 0x0806361d); +PROVIDE(mbedtls_ssl_ciphersuite_from_string = 0x08069425); PROVIDE(__aeabi_cdcmple = 0x08040c0d); -PROVIDE(net_pkt_get_data = 0x0807058f); -PROVIDE(mbedtls_pk_encrypt = 0x08062665); -PROVIDE(crc16_reflect = 0x0806a831); -PROVIDE(mbedtls_pk_verify_ext = 0x0806268d); -PROVIDE(z_shell_history_init = 0x0806cdb3); -PROVIDE(tanl = 0x08042439); -PROVIDE(z_impl_k_timer_status_sync = 0x08068ef5); -PROVIDE(llext_call_fn = 0x0806d5c5); -PROVIDE(disable_mpu_rasr_xn = 0x08042ed9); -PROVIDE(abort = 0x080494ad); -PROVIDE(net_pkt_get_reserve_rx_data = 0x080520fd); -PROVIDE(fs_seek = 0x0804a70d); -PROVIDE(mbedtls_md5_finish = 0x080768f3); -PROVIDE(USB_ReadDevAllOutEpInterrupt = 0x08074f0f); -PROVIDE(dns_resolve_cancel = 0x08071fef); -PROVIDE(dns_msg_pack_qname = 0x08071b3b); -PROVIDE(is_ptr = 0x0806af65); -PROVIDE(net_tx_priority2tc = 0x080705f1); -PROVIDE(arch_irq_unlock_outlined = 0x0806cff7); -PROVIDE(mbedtls_base64_decode = 0x0805ce85); -PROVIDE(__wrap_realloc = 0x08049541); -PROVIDE(connect = 0x0806d30d); -PROVIDE(fs_read = 0x0804a67d); -PROVIDE(HAL_PCD_Init = 0x0807411d); -PROVIDE(z_row_span_with_buffer_offsets_get = 0x0806c067); -PROVIDE(__pow5Factor = 0x0806a591); -PROVIDE(USB_EPClearStall = 0x08074e1d); -PROVIDE(char2hex = 0x0806b071); -PROVIDE(usb_update_sn_string_descriptor = 0x08044f5d); -PROVIDE(shell_thread = 0x080471a5); -PROVIDE(sys_clock_announce = 0x08068cc1); -PROVIDE(mbedtls_platform_set_calloc_free = 0x0805ea49); -PROVIDE(arch_system_halt = 0x08077e4f); -PROVIDE(ethernet_init = 0x0804fbf1); -PROVIDE(pinctrl_lookup_state = 0x08072e51); -PROVIDE(log_filter_get = 0x080440c9); -PROVIDE(mbedtls_ssl_check_cert_usage = 0x08066b31); -PROVIDE(mbedtls_mpi_core_from_mont_rep = 0x08075a31); +PROVIDE(net_pkt_get_data = 0x08075dc9); +PROVIDE(mbedtls_pk_encrypt = 0x08067de9); +PROVIDE(crc16_reflect = 0x0806ffb5); +PROVIDE(mbedtls_pk_verify_ext = 0x08067e11); +PROVIDE(z_shell_history_init = 0x080725ed); +PROVIDE(tanl = 0x08042771); +PROVIDE(z_impl_k_timer_status_sync = 0x0806e679); +PROVIDE(llext_call_fn = 0x08072dff); +PROVIDE(disable_mpu_rasr_xn = 0x08043211); +PROVIDE(abort = 0x0804993d); +PROVIDE(net_pkt_get_reserve_rx_data = 0x080525b5); +PROVIDE(fs_seek = 0x0804ab9d); +PROVIDE(mbedtls_md5_finish = 0x0807d3dd); +PROVIDE(USB_ReadDevAllOutEpInterrupt = 0x0807b9f9); +PROVIDE(dns_resolve_cancel = 0x08077829); +PROVIDE(dns_msg_pack_qname = 0x08077375); +PROVIDE(is_ptr = 0x0807079f); +PROVIDE(net_tx_priority2tc = 0x08075e2b); +PROVIDE(arch_irq_unlock_outlined = 0x08072831); +PROVIDE(mbedtls_base64_decode = 0x08062609); +PROVIDE(__wrap_realloc = 0x080499d1); +PROVIDE(connect = 0x08072b47); +PROVIDE(LL_TIM_OC_Init = 0x080610c5); +PROVIDE(fs_read = 0x0804ab0d); +PROVIDE(HAL_PCD_Init = 0x0807aa4d); +PROVIDE(z_row_span_with_buffer_offsets_get = 0x080718a1); +PROVIDE(__pow5Factor = 0x0806fd15); +PROVIDE(USB_EPClearStall = 0x0807b907); +PROVIDE(char2hex = 0x080708ab); +PROVIDE(usb_update_sn_string_descriptor = 0x080453ed); +PROVIDE(shell_thread = 0x08047635); +PROVIDE(sys_clock_announce = 0x0806e445); +PROVIDE(mbedtls_platform_set_calloc_free = 0x080641cd); +PROVIDE(arch_system_halt = 0x0807e939); +PROVIDE(ethernet_init = 0x08050081); +PROVIDE(pinctrl_lookup_state = 0x08078d9d); +PROVIDE(log_filter_get = 0x08044559); +PROVIDE(mbedtls_ssl_check_cert_usage = 0x0806c2b5); +PROVIDE(mbedtls_mpi_core_from_mont_rep = 0x0807c51b); PROVIDE(__aeabi_fcmplt = 0x08041095); -PROVIDE(z_impl_k_queue_init = 0x0807831b); -PROVIDE(mbedtls_ssl_pend_fatal_alert = 0x08077807); -PROVIDE(net_context_unref = 0x0806f4a3); -PROVIDE(net_buf_unref = 0x08049be9); +PROVIDE(z_impl_k_queue_init = 0x0807ee05); +PROVIDE(mbedtls_ssl_pend_fatal_alert = 0x0807e2f1); +PROVIDE(net_context_unref = 0x08074cdd); +PROVIDE(net_buf_unref = 0x0804a079); PROVIDE(__aeabi_fadd = 0x08040de9); -PROVIDE(_exit = 0x08049475); -PROVIDE(USB_ReadPacket = 0x08074d87); -PROVIDE(dns_dispatcher_unregister = 0x08055855); -PROVIDE(net_process_rx_packet = 0x0806e7fd); +PROVIDE(_exit = 0x08049905); +PROVIDE(USB_ReadPacket = 0x0807b871); +PROVIDE(dns_dispatcher_unregister = 0x08055d0d); +PROVIDE(net_process_rx_packet = 0x08074037); PROVIDE(__aeabi_ui2f = 0x08040f49); -PROVIDE(mbedtls_mpi_read_binary = 0x08075c53); -PROVIDE(mbedtls_rsa_get_len = 0x08076c0f); +PROVIDE(mbedtls_mpi_read_binary = 0x0807c73d); +PROVIDE(mbedtls_rsa_get_len = 0x0807d6f9); PROVIDE(__aeabi_ui2d = 0x08040659); -PROVIDE(log_msg_get_source_id = 0x080442b5); -PROVIDE(z_impl_k_pipe_init = 0x080789bd); -PROVIDE(z_log_msg_alloc = 0x0806b563); -PROVIDE(net_conn_update = 0x080527f5); -PROVIDE(_sin = 0x08042399); -PROVIDE(mbedtls_ssl_add_hs_hdr_to_checksum = 0x08077937); +PROVIDE(log_msg_get_source_id = 0x08044745); +PROVIDE(z_impl_k_pipe_init = 0x0807f4a7); +PROVIDE(z_log_msg_alloc = 0x08070d9d); +PROVIDE(net_conn_update = 0x08052cad); +PROVIDE(_sin = 0x080426d1); +PROVIDE(mbedtls_ssl_add_hs_hdr_to_checksum = 0x0807e421); PROVIDE(__aeabi_dsub = 0x080403dd); PROVIDE(__ltsf2 = 0x08041001); -PROVIDE(mbedtls_cipher_update = 0x0805d63d); -PROVIDE(mbedtls_ssl_set_timer = 0x080776a5); -PROVIDE(mbedtls_mpi_shift_r = 0x08075cc5); +PROVIDE(mbedtls_cipher_update = 0x08062dc1); +PROVIDE(mbedtls_ssl_set_timer = 0x0807e18f); +PROVIDE(mbedtls_mpi_shift_r = 0x0807c7af); PROVIDE(vfscanf = 0x00000001); -PROVIDE(srandom = 0x0806912d); -PROVIDE(net_tcp_finalize = 0x0805309d); -PROVIDE(z_shell_vfprintf = 0x0806c6e7); -PROVIDE(net_udp_register = 0x08071883); -PROVIDE(k_thread_name_get = 0x080786d7); -PROVIDE(z_impl_zsock_close = 0x0806d9e1); -PROVIDE(__printk_hook_install = 0x080437f5); -PROVIDE(net_pkt_rx_alloc_with_buffer = 0x08052391); -PROVIDE(net_hostname_get = 0x0804c049); -PROVIDE(net_icmpv4_init = 0x08052aad); -PROVIDE(net_ipv4_input = 0x08070b11); -PROVIDE(mbedtls_aes_crypt_ecb = 0x08074fa1); -PROVIDE(mbedtls_internal_md5_process = 0x0805dec5); -PROVIDE(mbedtls_mpi_shift_l = 0x08075c8b); -PROVIDE(mbedtls_x509_get_sig = 0x08062b7d); -PROVIDE(stm32_gpio_intc_enable_line = 0x0805657d); -PROVIDE(printk = 0x0806afb7); -PROVIDE(z_arm_exc_spurious = 0x08048b79); -PROVIDE(net_pkt_get_contiguous_len = 0x08070507); -PROVIDE(tan = 0x08042439); -PROVIDE(mbedtls_ssl_set_calc_verify_md = 0x080668c5); -PROVIDE(mbedtls_asn1_get_bitstring = 0x0807522b); -PROVIDE(net_if_ipv4_is_addr_bcast = 0x08050a29); -PROVIDE(z_impl_k_queue_alloc_prepend = 0x080783dd); +PROVIDE(srandom = 0x0806e8b1); +PROVIDE(net_tcp_finalize = 0x08053555); +PROVIDE(z_shell_vfprintf = 0x08071f21); +PROVIDE(net_udp_register = 0x080770bd); +PROVIDE(k_thread_name_get = 0x0807f1c1); +PROVIDE(z_impl_zsock_close = 0x0807321b); +PROVIDE(__printk_hook_install = 0x08043c85); +PROVIDE(net_pkt_rx_alloc_with_buffer = 0x08052849); +PROVIDE(net_hostname_get = 0x0804c4d9); +PROVIDE(net_icmpv4_init = 0x08052f65); +PROVIDE(net_ipv4_input = 0x0807634b); +PROVIDE(mbedtls_aes_crypt_ecb = 0x0807ba8b); +PROVIDE(mbedtls_internal_md5_process = 0x08063649); +PROVIDE(mbedtls_mpi_shift_l = 0x0807c775); +PROVIDE(mbedtls_x509_get_sig = 0x08068301); +PROVIDE(stm32_gpio_intc_enable_line = 0x08056a35); +PROVIDE(printk = 0x080707f1); +PROVIDE(z_arm_exc_spurious = 0x08049009); +PROVIDE(net_pkt_get_contiguous_len = 0x08075d41); +PROVIDE(tan = 0x08042771); +PROVIDE(mbedtls_ssl_set_calc_verify_md = 0x0806c049); +PROVIDE(mbedtls_asn1_get_bitstring = 0x0807bd15); +PROVIDE(net_if_ipv4_is_addr_bcast = 0x08050ee1); +PROVIDE(z_impl_k_queue_alloc_prepend = 0x0807eec7); +PROVIDE(sys_multi_heap_init = 0x08070687); PROVIDE(__eqsf2 = 0x08041009); -PROVIDE(HAL_PCD_EP_Transmit = 0x080743ef); -PROVIDE(arm_core_mpu_enable = 0x08049201); -PROVIDE(net_if_ipv4_addr_rm = 0x0806edc7); -PROVIDE(HAL_PCD_EP_Receive = 0x080743a3); -PROVIDE(z_impl_k_mutex_init = 0x080781fb); -PROVIDE(mbedtls_cipher_free = 0x0805d511); -PROVIDE(z_impl_zsock_getsockopt = 0x0804c709); -PROVIDE(z_shell_print_stream = 0x0806c6e3); -PROVIDE(z_shell_op_delete_from_cursor = 0x0806c609); -PROVIDE(HAL_PCD_DataInStageCallback = 0x080720f9); -PROVIDE(z_arm_cpu_idle_init = 0x08048f2d); +PROVIDE(HAL_PCD_EP_Transmit = 0x0807ad1f); +PROVIDE(sys_multi_heap_aligned_alloc = 0x080706fb); +PROVIDE(arm_core_mpu_enable = 0x08049691); +PROVIDE(net_if_ipv4_addr_rm = 0x08074601); +PROVIDE(HAL_PCD_EP_Receive = 0x0807acd3); +PROVIDE(z_impl_k_mutex_init = 0x0807ece5); +PROVIDE(dma_stm32_clear_dme = 0x08058c35); +PROVIDE(mbedtls_cipher_free = 0x08062c95); +PROVIDE(z_impl_zsock_getsockopt = 0x0804cb99); +PROVIDE(z_shell_print_stream = 0x08071f1d); +PROVIDE(z_shell_op_delete_from_cursor = 0x08071e43); +PROVIDE(LL_RCC_GetPLL1ClockFreq = 0x08060ead); +PROVIDE(HAL_DMAEx_ChangeMemory = 0x0805fba5); +PROVIDE(dma_stm32_start = 0x08077be1); +PROVIDE(HAL_PCD_DataInStageCallback = 0x08077933); +PROVIDE(HAL_SDRAM_MspInit = 0x0807b375); +PROVIDE(z_arm_cpu_idle_init = 0x080493bd); PROVIDE(__floatundidf = 0x080406e1); -PROVIDE(z_impl_k_msgq_purge = 0x08078165); -PROVIDE(net_pkt_set_data = 0x080705cb); -PROVIDE(net_context_get_option = 0x08051fad); -PROVIDE(sys_clock_elapsed = 0x0805a949); -PROVIDE(z_impl_k_poll_signal_init = 0x08078fbf); -PROVIDE(mbedtls_mpi_copy = 0x08075b57); -PROVIDE(net_socket_service_callback = 0x0806e001); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXTIME_PARAM = 0x0804fc49); -PROVIDE(mbedtls_x509_crt_init = 0x080775c3); -PROVIDE(net_pkt_read = 0x080702a1); -PROVIDE(HAL_QSPI_FifoThresholdCallback = 0x08074a43); -PROVIDE(__file_str_put = 0x08079667); -PROVIDE(mbedtls_mpi_gcd = 0x08076397); -PROVIDE(z_do_kernel_oops = 0x0806cfa1); -PROVIDE(net_context_get_local_addr = 0x0806fc25); +PROVIDE(z_impl_k_msgq_purge = 0x0807ec4f); +PROVIDE(net_pkt_set_data = 0x08075e05); +PROVIDE(net_context_get_option = 0x08052465); +PROVIDE(sys_clock_elapsed = 0x0805d23d); +PROVIDE(z_impl_k_poll_signal_init = 0x0807faa9); +PROVIDE(mbedtls_mpi_copy = 0x0807c641); +PROVIDE(net_socket_service_callback = 0x0807383b); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXTIME_PARAM = 0x080500d9); +PROVIDE(LL_TIM_StructInit = 0x0807b509); +PROVIDE(mbedtls_x509_crt_init = 0x0807e0ad); +PROVIDE(net_pkt_read = 0x08075adb); +PROVIDE(HAL_QSPI_FifoThresholdCallback = 0x0807b373); +PROVIDE(__file_str_put = 0x08080151); +PROVIDE(mbedtls_mpi_gcd = 0x0807ce81); +PROVIDE(z_do_kernel_oops = 0x080727db); +PROVIDE(net_context_get_local_addr = 0x0807545f); PROVIDE(__floatsisf = 0x08040f51); -PROVIDE(z_impl_k_thread_name_set = 0x08067de1); -PROVIDE(z_impl_zsock_connect = 0x0804c3dd); -PROVIDE(credential_get = 0x0804f7fd); -PROVIDE(pinctrl_configure_pins = 0x0805a04d); -PROVIDE(z_impl_log_filter_set = 0x0806b56b); -PROVIDE(ring_buf_area_claim = 0x0806b379); -PROVIDE(z_thread_monitor_exit = 0x08068a59); -PROVIDE(srand = 0x08079159); -PROVIDE(mbedtls_ct_memcpy_offset = 0x0805da5d); -PROVIDE(flash_stm32_block_erase_loop = 0x08059655); -PROVIDE(mbedtls_x509_get_alg = 0x080773d9); -PROVIDE(z_impl_k_queue_get = 0x08067729); -PROVIDE(net_context_init = 0x080520ed); -PROVIDE(shell_help = 0x0806bf9d); -PROVIDE(HAL_PCDEx_LPM_Callback = 0x08074587); -PROVIDE(mbedtls_mpi_inv_mod = 0x080764bf); -PROVIDE(z_data_copy = 0x08068b11); -PROVIDE(net_buf_frag_add = 0x0806d393); -PROVIDE(net_arp_update = 0x08050429); -PROVIDE(mem_attr_get_regions = 0x08044619); -PROVIDE(net_udp_input = 0x08054afd); -PROVIDE(mbedtls_cipher_finish = 0x0805d7f1); -PROVIDE(z_impl_k_msgq_put = 0x08067411); -PROVIDE(HAL_QSPI_ErrorCallback = 0x08072727); -PROVIDE(HAL_ETH_Transmit_IT = 0x08073afb); -PROVIDE(mbedtls_oid_get_oid_by_md = 0x0805e9f1); -PROVIDE(net_if_need_calc_rx_checksum = 0x0806ef13); -PROVIDE(shell_backend_uart_get_ptr = 0x08046691); -PROVIDE(net_if_ipv4_addr_get_first_by_index = 0x0806ebb5); -PROVIDE(flash_stm32_valid_range = 0x0805931d); -PROVIDE(snprintf = 0x08069321); -PROVIDE(z_impl_k_thread_priority_get = 0x080786d1); -PROVIDE(dns_resolve_get_default = 0x08056401); +PROVIDE(z_impl_k_thread_name_set = 0x0806d565); +PROVIDE(z_impl_zsock_connect = 0x0804c86d); +PROVIDE(credential_get = 0x0804fc8d); +PROVIDE(pinctrl_configure_pins = 0x0805bd85); +PROVIDE(z_impl_log_filter_set = 0x08070da5); +PROVIDE(ring_buf_area_claim = 0x08070bb3); +PROVIDE(z_thread_monitor_exit = 0x0806e1dd); +PROVIDE(srand = 0x0807fc43); +PROVIDE(mbedtls_ct_memcpy_offset = 0x080631e1); +PROVIDE(flash_stm32_block_erase_loop = 0x0805b2e1); +PROVIDE(mbedtls_x509_get_alg = 0x0807dec3); +PROVIDE(z_impl_k_queue_get = 0x0806cead); +PROVIDE(net_context_init = 0x080525a5); +PROVIDE(shell_help = 0x080717d7); +PROVIDE(HAL_PCDEx_LPM_Callback = 0x0807aeb7); +PROVIDE(mbedtls_mpi_inv_mod = 0x0807cfa9); +PROVIDE(z_data_copy = 0x0806e295); +PROVIDE(net_buf_frag_add = 0x08072bcd); +PROVIDE(net_arp_update = 0x080508b9); +PROVIDE(mem_attr_get_regions = 0x08044aa9); +PROVIDE(net_udp_input = 0x08054fb5); +PROVIDE(mbedtls_cipher_finish = 0x08062f75); +PROVIDE(z_impl_k_msgq_put = 0x0806cb95); +PROVIDE(HAL_QSPI_ErrorCallback = 0x08078539); +PROVIDE(HAL_ETH_Transmit_IT = 0x0807a42b); +PROVIDE(mbedtls_oid_get_oid_by_md = 0x08064175); +PROVIDE(net_if_need_calc_rx_checksum = 0x0807474d); +PROVIDE(shell_backend_uart_get_ptr = 0x08046b21); +PROVIDE(net_if_ipv4_addr_get_first_by_index = 0x080743ef); +PROVIDE(flash_stm32_valid_range = 0x0805afa9); +PROVIDE(snprintf = 0x0806eaa5); +PROVIDE(z_impl_k_thread_priority_get = 0x0807f1bb); +PROVIDE(dns_resolve_get_default = 0x080568b9); PROVIDE(__gtdf2 = 0x08040b71); -PROVIDE(i2c_stm32_runtime_configure = 0x08059e25); -PROVIDE(cosl = 0x08042081); -PROVIDE(mbedtls_ssl_parse_certificate = 0x08066ca1); -PROVIDE(k_queue_prepend = 0x080783b5); -PROVIDE(zsock_sendmsg_ctx = 0x0804cfb5); -PROVIDE(net_calc_chksum_ipv4 = 0x0806f2db); -PROVIDE(mbedtls_ssl_check_timer = 0x080776b3); -PROVIDE(net_dhcpv4_start = 0x08071aef); -PROVIDE(isprint = 0x080790df); -PROVIDE(USB_WritePacket = 0x08074d61); -PROVIDE(dns_unpack_response_query = 0x08071ced); -PROVIDE(mbedtls_memory_buffer_alloc_init = 0x0805e8f1); -PROVIDE(z_work_submit_to_queue = 0x0807860d); -PROVIDE(mbedtls_pk_sign_restartable = 0x080625e1); -PROVIDE(llext_adjust_mmu_permissions = 0x0806d641); -PROVIDE(mbedtls_mpi_core_add = 0x0807561f); -PROVIDE(z_check_thread_stack_fail = 0x08048e5d); -PROVIDE(mbedtls_asn1_get_sequence_of = 0x0805ce25); -PROVIDE(mbedtls_ssl_pk_alg_from_sig = 0x08077c6d); +PROVIDE(i2c_stm32_runtime_configure = 0x0805bab1); +PROVIDE(cosl = 0x080423b9); +PROVIDE(mbedtls_ssl_parse_certificate = 0x0806c425); +PROVIDE(k_queue_prepend = 0x0807ee9f); +PROVIDE(zsock_sendmsg_ctx = 0x0804d445); +PROVIDE(net_calc_chksum_ipv4 = 0x08074b15); +PROVIDE(stm32_dma_is_ht_irq_active = 0x08058d35); +PROVIDE(mbedtls_ssl_check_timer = 0x0807e19d); +PROVIDE(net_dhcpv4_start = 0x08077329); +PROVIDE(isprint = 0x0807fbc9); +PROVIDE(USB_WritePacket = 0x0807b84b); +PROVIDE(shared_multi_heap_alloc = 0x080434d5); +PROVIDE(dns_unpack_response_query = 0x08077527); +PROVIDE(mbedtls_memory_buffer_alloc_init = 0x08064075); +PROVIDE(z_work_submit_to_queue = 0x0807f0f7); +PROVIDE(sys_multi_heap_free = 0x08070729); +PROVIDE(HAL_DCMI_Start_DMA = 0x0805e0e1); +PROVIDE(mbedtls_pk_sign_restartable = 0x08067d65); +PROVIDE(llext_adjust_mmu_permissions = 0x08072e7b); +PROVIDE(mbedtls_mpi_core_add = 0x0807c109); +PROVIDE(z_check_thread_stack_fail = 0x080492ed); +PROVIDE(mbedtls_asn1_get_sequence_of = 0x080625a9); +PROVIDE(mbedtls_ssl_pk_alg_from_sig = 0x0807e757); PROVIDE(CONFIG_SYS_HASH_FUNC32_CHOICE_MURMUR3 = 0x00000001); -PROVIDE(mbedtls_ssl_reset_checksum = 0x0807795b); -PROVIDE(mbedtls_ssl_session_load = 0x080660a1); -PROVIDE(net_pkt_cursor_init = 0x080701d7); -PROVIDE(z_init_static = 0x08077ead); -PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x08059b55); -PROVIDE(net_mgmt_event_init = 0x080519ad); -PROVIDE(ztls_recvfrom_ctx = 0x0804e665); +PROVIDE(mbedtls_ssl_reset_checksum = 0x0807e445); +PROVIDE(mbedtls_ssl_session_load = 0x0806b825); +PROVIDE(net_pkt_cursor_init = 0x08075a11); +PROVIDE(z_init_static = 0x0807e997); +PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x0805b7e1); +PROVIDE(net_mgmt_event_init = 0x08051e65); +PROVIDE(ztls_recvfrom_ctx = 0x0804eaf5); PROVIDE(__aeabi_fcmple = 0x080410a9); -PROVIDE(z_impl_k_thread_abort = 0x08048bf5); -PROVIDE(HAL_PCDEx_SetTxFiFo = 0x0807451b); -PROVIDE(usb_dc_ep_set_callback = 0x08072045); -PROVIDE(HAL_ETH_Start_IT = 0x08073a5f); -PROVIDE(mbedtls_md_get_type = 0x08076859); -PROVIDE(net_icmpv4_finalize = 0x080707af); -PROVIDE(shell_fprintf_impl = 0x0806becd); -PROVIDE(llext_by_name = 0x0804a9ed); +PROVIDE(z_impl_k_thread_abort = 0x08049085); +PROVIDE(HAL_PCDEx_SetTxFiFo = 0x0807ae4b); +PROVIDE(usb_dc_ep_set_callback = 0x0807787f); +PROVIDE(HAL_ETH_Start_IT = 0x0807a38f); +PROVIDE(mbedtls_md_get_type = 0x0807d343); +PROVIDE(net_icmpv4_finalize = 0x08075fe9); +PROVIDE(shell_fprintf_impl = 0x08071707); +PROVIDE(llext_by_name = 0x0804ae7d); PROVIDE(__ltdf2 = 0x08040b79); -PROVIDE(credential_next_get = 0x0804f829); -PROVIDE(mbedtls_ssl_config_defaults = 0x080661c1); -PROVIDE(__d_vfprintf = 0x080696b9); -PROVIDE(mbedtls_free = 0x0805ea3d); -PROVIDE(net_conn_register = 0x08052559); -PROVIDE(flash_stm32_wait_flash_idle = 0x08059471); -PROVIDE(shell_process = 0x08046ae9); +PROVIDE(credential_next_get = 0x0804fcb9); +PROVIDE(stm32_dma_check_fifo_mburst = 0x08077ef3); +PROVIDE(mbedtls_ssl_config_defaults = 0x0806b945); +PROVIDE(__d_vfprintf = 0x0806ee3d); +PROVIDE(mbedtls_free = 0x080641c1); +PROVIDE(net_conn_register = 0x08052a11); +PROVIDE(flash_stm32_wait_flash_idle = 0x0805b0fd); +PROVIDE(shell_process = 0x08046f79); PROVIDE(CONFIG_LOG_FUNC_NAME_PREFIX_DBG = 0x00000001); -PROVIDE(z_reset_time_slice = 0x080689a9); -PROVIDE(mbedtls_sha512_clone = 0x08076f7f); -PROVIDE(z_impl_k_thread_priority_set = 0x080684a1); -PROVIDE(cos = 0x08042081); +PROVIDE(z_reset_time_slice = 0x0806e12d); +PROVIDE(stm32_dma_get_fifo_threshold = 0x08058f05); +PROVIDE(mbedtls_sha512_clone = 0x0807da69); +PROVIDE(z_impl_k_thread_priority_set = 0x0806dc25); +PROVIDE(cos = 0x080423b9); PROVIDE(strcmp = 0x080411e1); -PROVIDE(z_setup_new_thread = 0x08067e85); +PROVIDE(z_setup_new_thread = 0x0806d609); PROVIDE(__lesf2 = 0x08041001); -PROVIDE(z_shell_op_cursor_horiz_move = 0x080475d1); -PROVIDE(mbedtls_sha512_update = 0x08076f89); -PROVIDE(mbedtls_pk_init = 0x08077311); -PROVIDE(z_impl_k_thread_create = 0x08067f7d); -PROVIDE(__umul128 = 0x080794c5); -PROVIDE(z_impl_zsock_bind = 0x0804c385); -PROVIDE(stm32_exti_get_line_src_port = 0x080566c9); -PROVIDE(arch_cpu_idle = 0x0806d005); -PROVIDE(z_impl_log_frontend_filter_set = 0x0806b57b); -PROVIDE(z_impl_k_sleep = 0x0807887b); -PROVIDE(mbedtls_rsa_import_raw = 0x08076b7d); -PROVIDE(ethernet_mgmt_raise_carrier_off_event = 0x0805011d); -PROVIDE(mbedtls_ssl_config_init = 0x08077c1f); -PROVIDE(sys_heap_init = 0x0806ae53); -PROVIDE(net_buf_alloc_fixed = 0x0806d369); -PROVIDE(usb_dc_ep_mps = 0x080720bb); -PROVIDE(mbedtls_md5_clone = 0x08076877); -PROVIDE(z_shell_fprintf = 0x0806c733); -PROVIDE(zsock_recvfrom_ctx = 0x0804d5b1); -PROVIDE(ztls_sendto_ctx = 0x0804e519); -PROVIDE(mbedtls_ssl_session_copy = 0x08065fe9); -PROVIDE(mbedtls_rsa_get_bitlen = 0x08076c09); -PROVIDE(net_if_up = 0x08051039); -PROVIDE(net_if_config_ipv4_get = 0x080509c1); -PROVIDE(mbedtls_cipher_setkey = 0x0805d589); -PROVIDE(z_impl_zsock_inet_pton = 0x0806d9e5); -PROVIDE(USB_SetTurnaroundTime = 0x0805bc45); -PROVIDE(mbedtls_ct_memcmp = 0x080767a7); -PROVIDE(net_tcp_endpoint_copy = 0x08071163); -PROVIDE(mbedtls_mpi_mul_int = 0x080760d1); -PROVIDE(z_impl_k_queue_peek_head = 0x0807840f); -PROVIDE(HAL_ETH_WritePHYRegister = 0x0805af51); -PROVIDE(USB_StopDevice = 0x08074e6f); -PROVIDE(net_conn_unregister = 0x0805277d); -PROVIDE(memset = 0x0807906f); -PROVIDE(HAL_PCD_ResetCallback = 0x08056fcd); +PROVIDE(HAL_DCMI_Suspend = 0x0805e255); +PROVIDE(z_shell_op_cursor_horiz_move = 0x08047a61); +PROVIDE(mbedtls_sha512_update = 0x0807da73); +PROVIDE(mbedtls_pk_init = 0x0807ddfb); +PROVIDE(z_impl_k_thread_create = 0x0806d701); +PROVIDE(__umul128 = 0x0807ffaf); +PROVIDE(__popcountsi2 = 0x08041215); +PROVIDE(z_impl_zsock_bind = 0x0804c815); +PROVIDE(stm32_exti_get_line_src_port = 0x08056b81); +PROVIDE(arch_cpu_idle = 0x0807283f); +PROVIDE(z_impl_log_frontend_filter_set = 0x08070db5); +PROVIDE(z_impl_k_sleep = 0x0807f365); +PROVIDE(mbedtls_rsa_import_raw = 0x0807d667); +PROVIDE(ethernet_mgmt_raise_carrier_off_event = 0x080505ad); +PROVIDE(mbedtls_ssl_config_init = 0x0807e709); +PROVIDE(sys_heap_init = 0x080705d7); +PROVIDE(net_buf_alloc_fixed = 0x08072ba3); +PROVIDE(usb_dc_ep_mps = 0x080778f5); +PROVIDE(mbedtls_md5_clone = 0x0807d361); +PROVIDE(z_shell_fprintf = 0x08071f6d); +PROVIDE(zsock_recvfrom_ctx = 0x0804da41); +PROVIDE(ztls_sendto_ctx = 0x0804e9a9); +PROVIDE(mbedtls_ssl_session_copy = 0x0806b76d); +PROVIDE(mbedtls_rsa_get_bitlen = 0x0807d6f3); +PROVIDE(net_if_up = 0x080514f1); +PROVIDE(net_if_config_ipv4_get = 0x08050e79); +PROVIDE(mbedtls_cipher_setkey = 0x08062d0d); +PROVIDE(z_impl_zsock_inet_pton = 0x0807321f); +PROVIDE(USB_SetTurnaroundTime = 0x080613c9); +PROVIDE(mbedtls_ct_memcmp = 0x0807d291); +PROVIDE(net_tcp_endpoint_copy = 0x0807699d); +PROVIDE(mbedtls_mpi_mul_int = 0x0807cbbb); +PROVIDE(z_impl_k_queue_peek_head = 0x0807eef9); +PROVIDE(HAL_ETH_WritePHYRegister = 0x0805ffbd); +PROVIDE(USB_StopDevice = 0x0807b959); +PROVIDE(net_conn_unregister = 0x08052c35); +PROVIDE(memset = 0x0807fb59); +PROVIDE(shared_multi_heap_aligned_alloc = 0x080434ed); +PROVIDE(HAL_PCD_ResetCallback = 0x08057485); PROVIDE(__gedf2 = 0x08040b71); -PROVIDE(net_context_get = 0x08051b7d); -PROVIDE(HAL_QSPI_CmdCpltCallback = 0x08072733); +PROVIDE(net_context_get = 0x08052035); +PROVIDE(HAL_QSPI_CmdCpltCallback = 0x08078545); PROVIDE(__floatdisf = 0x08040f7d); -PROVIDE(k_thread_foreach = 0x08068a95); -PROVIDE(net_mgmt_event_wait_on_iface = 0x0806f3ef); -PROVIDE(usb_dc_detach = 0x08056f45); -PROVIDE(__do_global_ctors_aux = 0x08067305); -PROVIDE(net_arp_prepare = 0x080501fd); -PROVIDE(z_time_slice = 0x080689f9); -PROVIDE(mbedtls_rsa_check_privkey = 0x0805f4b1); +PROVIDE(k_thread_foreach = 0x0806e219); +PROVIDE(net_mgmt_event_wait_on_iface = 0x08074c29); +PROVIDE(usb_dc_detach = 0x080573fd); +PROVIDE(__do_global_ctors_aux = 0x0806ca89); +PROVIDE(net_arp_prepare = 0x0805068d); +PROVIDE(z_time_slice = 0x0806e17d); +PROVIDE(mbedtls_rsa_check_privkey = 0x08064c35); PROVIDE(__aeabi_ddiv = 0x080409a1); -PROVIDE(mbedtls_aes_setkey_enc = 0x0805c471); -PROVIDE(net_pkt_remaining_data = 0x0807036d); -PROVIDE(mbedtls_md_finish = 0x0805dc6d); -PROVIDE(recvfrom = 0x0806d325); -PROVIDE(mbedtls_x509_get_ns_cert_type = 0x08062c41); -PROVIDE(z_irq_spurious = 0x0806cfe9); -PROVIDE(mbedtls_asn1_get_len = 0x080750d1); -PROVIDE(USB_EPSetStall = 0x08074dc7); -PROVIDE(z_shell_op_cursor_word_move = 0x0806c545); -PROVIDE(k_is_in_isr = 0x080786c5); -PROVIDE(net_pkt_ref = 0x08070069); -PROVIDE(__kernel_rem_pio2 = 0x080425a1); -PROVIDE(z_arm_int_exit = 0x080484d9); -PROVIDE(mbedtls_mpi_write_binary = 0x08075c7f); -PROVIDE(_ConfigAbsSyms = 0x0806b4dd); -PROVIDE(ring_buf_put = 0x0806b417); -PROVIDE(arm_irq_enable = 0x08048ce5); +PROVIDE(mbedtls_aes_setkey_enc = 0x08061bf5); +PROVIDE(net_pkt_remaining_data = 0x08075ba7); +PROVIDE(mbedtls_md_finish = 0x080633f1); +PROVIDE(recvfrom = 0x08072b5f); +PROVIDE(mbedtls_x509_get_ns_cert_type = 0x080683c5); +PROVIDE(z_irq_spurious = 0x08072823); +PROVIDE(mbedtls_asn1_get_len = 0x0807bbbb); +PROVIDE(USB_EPSetStall = 0x0807b8b1); +PROVIDE(z_shell_op_cursor_word_move = 0x08071d7f); +PROVIDE(k_is_in_isr = 0x0807f1af); +PROVIDE(net_pkt_ref = 0x080758a3); +PROVIDE(__kernel_rem_pio2 = 0x080428d9); +PROVIDE(z_arm_int_exit = 0x08048969); +PROVIDE(mbedtls_mpi_write_binary = 0x0807c769); +PROVIDE(_ConfigAbsSyms = 0x08070d17); +PROVIDE(ring_buf_put = 0x08070c51); +PROVIDE(arm_irq_enable = 0x08049175); PROVIDE(__extendsfdf2 = 0x0804069d); -PROVIDE(HAL_PCD_DataOutStageCallback = 0x080720cd); -PROVIDE(HAL_QSPI_RxCpltCallback = 0x08072739); -PROVIDE(z_impl_k_timer_stop = 0x08078d2d); +PROVIDE(HAL_PCD_DataOutStageCallback = 0x08077907); +PROVIDE(HAL_QSPI_RxCpltCallback = 0x0807854b); +PROVIDE(z_impl_k_timer_stop = 0x0807f817); PROVIDE(CONFIG_SYS_HASH_FUNC32_MURMUR3 = 0x00000001); -PROVIDE(mbedtls_ssl_get_session = 0x08066069); -PROVIDE(llext_buf_peek = 0x0806d783); -PROVIDE(mbedtls_rsa_deduce_primes = 0x0805ea5d); -PROVIDE(__wrap_malloc = 0x0804950d); -PROVIDE(flash_area_read = 0x0806b7ab); -PROVIDE(z_impl_k_poll = 0x08068fa9); -PROVIDE(mbedtls_ssl_free = 0x08077b8d); -PROVIDE(mbedtls_ssl_session_reset_msg_layer = 0x08077a0b); -PROVIDE(z_impl_zvfs_poll = 0x0806d55d); -PROVIDE(mbedtls_ssl_handshake_wrapup_free_hs_transform = 0x08077caf); -PROVIDE(mbedtls_mpi_size = 0x08075c47); -PROVIDE(sys_clock_cycle_get_32 = 0x0805a985); -PROVIDE(mbedtls_asn1_free_named_data_list_shallow = 0x080753cb); -PROVIDE(__fixdfdi = 0x08041215); -PROVIDE(usb_dc_set_status_callback = 0x08056a2d); -PROVIDE(USB_DevConnect = 0x08074ecf); -PROVIDE(shell_init = 0x0804739d); -PROVIDE(sys_heap_aligned_realloc = 0x0806ad0f); -PROVIDE(net_if_get_default = 0x08050959); -PROVIDE(HAL_RCC_GetHCLKFreq = 0x0805ab35); +PROVIDE(mbedtls_ssl_get_session = 0x0806b7ed); +PROVIDE(llext_buf_peek = 0x08072fbd); +PROVIDE(mbedtls_rsa_deduce_primes = 0x080641e1); +PROVIDE(__wrap_malloc = 0x0804999d); +PROVIDE(flash_area_read = 0x08070fe5); +PROVIDE(z_impl_k_poll = 0x0806e72d); +PROVIDE(stm32_dma_disable_stream = 0x08058e01); +PROVIDE(mbedtls_ssl_free = 0x0807e677); +PROVIDE(mbedtls_ssl_session_reset_msg_layer = 0x0807e4f5); +PROVIDE(z_impl_zvfs_poll = 0x08072d97); +PROVIDE(mbedtls_ssl_handshake_wrapup_free_hs_transform = 0x0807e799); +PROVIDE(mbedtls_mpi_size = 0x0807c731); +PROVIDE(sys_clock_cycle_get_32 = 0x0805d279); +PROVIDE(mbedtls_asn1_free_named_data_list_shallow = 0x0807beb5); +PROVIDE(__fixdfdi = 0x0804123b); +PROVIDE(usb_dc_set_status_callback = 0x08056ee5); +PROVIDE(shared_multi_heap_pool_init = 0x08043505); +PROVIDE(USB_DevConnect = 0x0807b9b9); +PROVIDE(shell_init = 0x0804782d); +PROVIDE(sys_heap_aligned_realloc = 0x08070493); +PROVIDE(net_if_get_default = 0x08050e11); +PROVIDE(HAL_RCC_GetHCLKFreq = 0x0805dffd); PROVIDE(__gtsf2 = 0x08040ff9); -PROVIDE(mbedtls_sha512_finish = 0x08077029); -PROVIDE(mbedtls_internal_sha1_process = 0x0806054d); -PROVIDE(__wrap_random = 0x080690f5); -PROVIDE(HAL_QSPI_MspInit = 0x0807474b); -PROVIDE(__math_invalid = 0x080424a1); -PROVIDE(memmove = 0x0807903b); -PROVIDE(mbedtls_ssl_get_mode_from_transform = 0x08077a99); -PROVIDE(LL_SetFlashLatency = 0x0805c179); +PROVIDE(mbedtls_sha512_finish = 0x0807db13); +PROVIDE(mbedtls_internal_sha1_process = 0x08065cd1); +PROVIDE(__wrap_random = 0x0806e879); +PROVIDE(HAL_QSPI_MspInit = 0x0807b07b); +PROVIDE(__math_invalid = 0x080427d9); +PROVIDE(memmove = 0x0807fb25); +PROVIDE(mbedtls_ssl_get_mode_from_transform = 0x0807e583); +PROVIDE(LL_SetFlashLatency = 0x080618fd); PROVIDE(__nesf2 = 0x08041009); -PROVIDE(iscntrl = 0x080790a9); -PROVIDE(islower = 0x080790d3); -PROVIDE(mbedtls_ssl_verify_certificate = 0x08066ba9); -PROVIDE(strcat = 0x080791ad); -PROVIDE(net_pkt_copy = 0x080702cb); -PROVIDE(mbedtls_ssl_write_change_cipher_spec = 0x0807773f); -PROVIDE(rand = 0x08079155); -PROVIDE(llext_file_offset = 0x0806d6cf); -PROVIDE(net_if_carrier_off = 0x0806ef63); -PROVIDE(strncmp = 0x080791e5); -PROVIDE(z_arm_configure_dynamic_mpu_regions = 0x080490f9); -PROVIDE(mbedtls_ssl_tls12_get_preferred_hash_for_sig_alg = 0x08077d83); -PROVIDE(mbedtls_mpi_core_exp_mod_unsafe = 0x080759bd); -PROVIDE(z_impl_zsock_socket = 0x0804c2cd); -PROVIDE(net_pkt_remove_tail = 0x080701a1); -PROVIDE(recv = 0x0806d315); -PROVIDE(net_buf_linearize = 0x0806d3b5); -PROVIDE(ldexpl = 0x08042d91); -PROVIDE(__math_inexact64 = 0x08042eb1); -PROVIDE(mbedtls_md_hmac_starts = 0x0805dd05); -PROVIDE(mbedtls_md5_update = 0x08076881); -PROVIDE(isxdigit = 0x0807910b); +PROVIDE(HAL_DCMI_Resume = 0x0807a125); +PROVIDE(iscntrl = 0x0807fb93); +PROVIDE(islower = 0x0807fbbd); +PROVIDE(mbedtls_ssl_verify_certificate = 0x0806c32d); +PROVIDE(strcat = 0x0807fc97); +PROVIDE(net_pkt_copy = 0x08075b05); +PROVIDE(mbedtls_ssl_write_change_cipher_spec = 0x0807e229); +PROVIDE(rand = 0x0807fc3f); +PROVIDE(llext_file_offset = 0x08072f09); +PROVIDE(net_if_carrier_off = 0x0807479d); +PROVIDE(strncmp = 0x0807fccf); +PROVIDE(z_arm_configure_dynamic_mpu_regions = 0x08049589); +PROVIDE(mbedtls_ssl_tls12_get_preferred_hash_for_sig_alg = 0x0807e86d); +PROVIDE(mbedtls_mpi_core_exp_mod_unsafe = 0x0807c4a7); +PROVIDE(z_impl_zsock_socket = 0x0804c75d); +PROVIDE(net_pkt_remove_tail = 0x080759db); +PROVIDE(recv = 0x08072b4f); +PROVIDE(net_buf_linearize = 0x08072bef); +PROVIDE(ldexpl = 0x080430c9); +PROVIDE(__math_inexact64 = 0x080431e9); +PROVIDE(mbedtls_md_hmac_starts = 0x08063489); +PROVIDE(mbedtls_md5_update = 0x0807d36b); +PROVIDE(isxdigit = 0x0807fbf5); +PROVIDE(dmamux_stm32_get_status = 0x08058f4d); PROVIDE(__aeabi_cdcmpeq = 0x08040c0d); -PROVIDE(__aeabi_memcpy4 = 0x0807901f); -PROVIDE(net_hostname_init = 0x0804c051); -PROVIDE(mbedtls_asn1_sequence_free = 0x08075327); -PROVIDE(assert_post_action = 0x0806b003); -PROVIDE(z_arm_usage_fault = 0x08048b79); -PROVIDE(stm32_i2c_configure_timing = 0x08059c15); -PROVIDE(net_tcp_set_option = 0x08071797); -PROVIDE(mbedtls_rsa_pkcs1_verify = 0x08060345); +PROVIDE(__aeabi_memcpy4 = 0x0807fb09); +PROVIDE(net_hostname_init = 0x0804c4e1); +PROVIDE(mbedtls_asn1_sequence_free = 0x0807be11); +PROVIDE(assert_post_action = 0x0807083d); +PROVIDE(z_arm_usage_fault = 0x08049009); +PROVIDE(stm32_i2c_configure_timing = 0x0805b8a1); +PROVIDE(net_tcp_set_option = 0x08076fd1); +PROVIDE(mbedtls_rsa_pkcs1_verify = 0x08065ac9); PROVIDE(strcpy = 0x080411f5); -PROVIDE(net_buf_frag_insert = 0x0806d37d); -PROVIDE(mbedtls_asn1_get_bitstring_null = 0x080752ff); -PROVIDE(z_shell_help_subcmd_print = 0x08047955); -PROVIDE(mbedtls_ssl_config_free = 0x08077c27); -PROVIDE(usb_transfer_ep_callback = 0x080452f9); -PROVIDE(mbedtls_sha1_clone = 0x08076c97); -PROVIDE(usb_dc_ep_enable = 0x08056c51); -PROVIDE(net_context_recv = 0x08051d4d); -PROVIDE(scalbnl = 0x08042d91); -PROVIDE(net_if_ipv4_select_src_iface = 0x0806ebed); -PROVIDE(usb_dc_ep_is_stalled = 0x08072085); -PROVIDE(z_impl_k_stack_alloc_init = 0x08078453); -PROVIDE(__aeabi_memcpy = 0x0807901f); -PROVIDE(do_llext_load = 0x0804ae41); -PROVIDE(mbedtls_ssl_start_handshake_msg = 0x080776cd); -PROVIDE(__aeabi_memcpy8 = 0x0807901f); +PROVIDE(net_buf_frag_insert = 0x08072bb7); +PROVIDE(mbedtls_asn1_get_bitstring_null = 0x0807bde9); +PROVIDE(z_shell_help_subcmd_print = 0x08047de5); +PROVIDE(mbedtls_ssl_config_free = 0x0807e711); +PROVIDE(usb_transfer_ep_callback = 0x08045789); +PROVIDE(mbedtls_sha1_clone = 0x0807d781); +PROVIDE(usb_dc_ep_enable = 0x08057109); +PROVIDE(net_context_recv = 0x08052205); +PROVIDE(scalbnl = 0x080430c9); +PROVIDE(net_if_ipv4_select_src_iface = 0x08074427); +PROVIDE(usb_dc_ep_is_stalled = 0x080778bf); +PROVIDE(z_impl_k_stack_alloc_init = 0x0807ef3d); +PROVIDE(shared_multi_heap_free = 0x080434c9); +PROVIDE(__aeabi_memcpy = 0x0807fb09); +PROVIDE(do_llext_load = 0x0804b2d1); +PROVIDE(mbedtls_ssl_start_handshake_msg = 0x0807e1b7); +PROVIDE(__aeabi_memcpy8 = 0x0807fb09); PROVIDE(__aeabi_fcmpun = 0x080410e5); -PROVIDE(z_impl_k_msgq_get_attrs = 0x080780df); +PROVIDE(z_impl_k_msgq_get_attrs = 0x0807ebc9); PROVIDE(__aeabi_fsub = 0x08040de5); -PROVIDE(strrchr = 0x08079241); -PROVIDE(z_thread_aligned_alloc = 0x080690c5); -PROVIDE(net_pkt_memset = 0x0807028b); -PROVIDE(z_impl_k_float_enable = 0x08078047); -PROVIDE(net_context_set_option = 0x08051e8d); -PROVIDE(mbedtls_mpi_shrink = 0x08075af5); -PROVIDE(clock_gettime = 0x0804996d); -PROVIDE(__atod_engine = 0x08041cb9); -PROVIDE(mbedtls_mpi_core_write_be = 0x080754d1); -PROVIDE(net_pkt_trim_buffer = 0x0807016d); -PROVIDE(mbedtls_ssl_get_ciphersuite_sig_alg = 0x0807768b); -PROVIDE(mbedtls_rsa_validate_params = 0x0805ec45); -PROVIDE(z_shell_make_argv = 0x0806c0a9); -PROVIDE(usb_dc_ep_start_read = 0x08056a7d); -PROVIDE(__libc_fini_array = 0x0806a7ed); -PROVIDE(net_if_is_wifi = 0x08051105); -PROVIDE(z_shell_history_get = 0x0806cc55); -PROVIDE(stm32_i2c_event_isr = 0x08072a35); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_DUPLEX = 0x0804fc49); -PROVIDE(mbedtls_ssl_send_alert_message = 0x080647a5); -PROVIDE(mbedtls_asn1_get_bool = 0x080751cb); -PROVIDE(mbedtls_md_hmac_update = 0x0805ddf9); -PROVIDE(log_source_id_get = 0x08043fa5); -PROVIDE(ztls_sendmsg_ctx = 0x0804e5f1); +PROVIDE(strrchr = 0x0807fd2b); +PROVIDE(z_thread_aligned_alloc = 0x0806e849); +PROVIDE(net_pkt_memset = 0x08075ac5); +PROVIDE(z_impl_k_float_enable = 0x0807eb31); +PROVIDE(net_context_set_option = 0x08052345); +PROVIDE(mbedtls_mpi_shrink = 0x0807c5df); +PROVIDE(clock_gettime = 0x08049dfd); +PROVIDE(__atod_engine = 0x08041e19); +PROVIDE(mbedtls_mpi_core_write_be = 0x0807bfbb); +PROVIDE(net_pkt_trim_buffer = 0x080759a7); +PROVIDE(mbedtls_ssl_get_ciphersuite_sig_alg = 0x0807e175); +PROVIDE(mbedtls_rsa_validate_params = 0x080643c9); +PROVIDE(z_shell_make_argv = 0x080718e3); +PROVIDE(usb_dc_ep_start_read = 0x08056f35); +PROVIDE(__libc_fini_array = 0x0806ff71); +PROVIDE(net_if_is_wifi = 0x080515bd); +PROVIDE(z_shell_history_get = 0x0807248f); +PROVIDE(stm32_i2c_event_isr = 0x0807886b); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_DUPLEX = 0x080500d9); +PROVIDE(mbedtls_ssl_send_alert_message = 0x08069f29); +PROVIDE(mbedtls_asn1_get_bool = 0x0807bcb5); +PROVIDE(mbedtls_md_hmac_update = 0x0806357d); +PROVIDE(log_source_id_get = 0x08044435); +PROVIDE(ztls_sendmsg_ctx = 0x0804ea81); PROVIDE(__aeabi_cdrcmple = 0x08040bfd); -PROVIDE(net_tcp_get = 0x08052e81); -PROVIDE(HAL_PCD_EP_Open = 0x080742d5); -PROVIDE(z_init_cpu = 0x080671c5); -PROVIDE(mbedtls_ssl_get_output_max_frag_len = 0x08077acf); -PROVIDE(net_context_put = 0x08051cfd); -PROVIDE(mbedtls_pk_can_do = 0x08077339); -PROVIDE(mbedtls_ct_memmove_left = 0x0805d991); -PROVIDE(tls_credential_add = 0x0804f87d); -PROVIDE(dns_resolve_init_default = 0x08056409); -PROVIDE(z_impl_log_process = 0x0806b55f); -PROVIDE(net_pkt_write = 0x08070559); -PROVIDE(sys_bitarray_free = 0x0806b30d); -PROVIDE(z_SysNmiOnReset = 0x080480b5); -PROVIDE(net_if_ipv4_addr_add = 0x08050b71); -PROVIDE(net_tcp_reply_rst = 0x080711c5); -PROVIDE(z_shell_history_put = 0x0806ccc3); -PROVIDE(strnlen = 0x08079229); -PROVIDE(net_eth_broadcast_addr = 0x0804fa01); -PROVIDE(mbedtls_pk_get_bitlen = 0x08077361); -PROVIDE(isgraph = 0x080790c7); -PROVIDE(z_impl_log_panic = 0x08043e69); -PROVIDE(net_buf_simple_add = 0x0806d413); +PROVIDE(HAL_SDRAM_ProgramRefreshRate = 0x0807b3b5); +PROVIDE(net_tcp_get = 0x08053339); +PROVIDE(HAL_PCD_EP_Open = 0x0807ac05); +PROVIDE(HAL_DCMI_VsyncEventCallback = 0x0807a17b); +PROVIDE(z_init_cpu = 0x0806c949); +PROVIDE(mbedtls_ssl_get_output_max_frag_len = 0x0807e5b9); +PROVIDE(net_context_put = 0x080521b5); +PROVIDE(mbedtls_pk_can_do = 0x0807de23); +PROVIDE(mbedtls_ct_memmove_left = 0x08063115); +PROVIDE(tls_credential_add = 0x0804fd0d); +PROVIDE(dns_resolve_init_default = 0x080568c1); +PROVIDE(atan2l = 0x080421e1); +PROVIDE(z_impl_log_process = 0x08070d99); +PROVIDE(net_pkt_write = 0x08075d93); +PROVIDE(sys_bitarray_free = 0x08070b47); +PROVIDE(z_SysNmiOnReset = 0x08048545); +PROVIDE(net_if_ipv4_addr_add = 0x08051029); +PROVIDE(net_tcp_reply_rst = 0x080769ff); +PROVIDE(stm32_dma_clear_stream_irq = 0x08077ed5); +PROVIDE(z_shell_history_put = 0x080724fd); +PROVIDE(strnlen = 0x0807fd13); +PROVIDE(net_eth_broadcast_addr = 0x0804fe91); +PROVIDE(mbedtls_pk_get_bitlen = 0x0807de4b); +PROVIDE(isgraph = 0x0807fbb1); +PROVIDE(z_impl_log_panic = 0x080442f9); +PROVIDE(net_buf_simple_add = 0x08072c4d); PROVIDE(__aeabi_cfcmple = 0x08041071); -PROVIDE(net_if_ipv4_select_src_addr = 0x08050a59); -PROVIDE(idle = 0x0807804f); -PROVIDE(net_dhcpv4_init = 0x080555bd); -PROVIDE(net_context_ref = 0x0806f487); -PROVIDE(net_ipv4_create = 0x08070a61); -PROVIDE(mbedtls_mpi_cmp_mpi = 0x08075d35); -PROVIDE(z_shell_history_purge = 0x0806ccab); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QAV_PARAM = 0x0804fec1); -PROVIDE(log_backend_disable = 0x0806b5a9); -PROVIDE(HAL_QSPI_AbortCpltCallback = 0x08074a41); -PROVIDE(assert_print = 0x0806b015); -PROVIDE(k_heap_aligned_alloc = 0x08077ed1); -PROVIDE(mbedtls_calloc = 0x0805ea31); -PROVIDE(z_column_span_with_buffer_offsets_get = 0x0806c049); -PROVIDE(net_if_recv_data = 0x0806ee1d); -PROVIDE(usb_dc_ep_clear_stall = 0x08056bf9); -PROVIDE(z_impl_zsock_get_context_object = 0x0806d9d1); -PROVIDE(llext_unload = 0x0804ab89); -PROVIDE(HAL_PCD_SuspendCallback = 0x08057049); -PROVIDE(fs_stat = 0x0804a82d); -PROVIDE(z_impl_k_timer_status_get = 0x08078d65); -PROVIDE(HAL_PCD_ConnectCallback = 0x08057021); -PROVIDE(z_shell_log_backend_disable = 0x0806c9cb); -PROVIDE(strtold = 0x08041921); -PROVIDE(net_pkt_get_reserve_tx_data = 0x08052109); -PROVIDE(k_heap_free = 0x08077f67); -PROVIDE(mbedtls_mpi_sub_abs = 0x08075e85); -PROVIDE(USB_SetCurrentMode = 0x08074b3f); -PROVIDE(z_shell_op_cursor_move = 0x0806c4f5); -PROVIDE(net_pkt_frag_unref = 0x080700a1); -PROVIDE(z_timer_expiration_handler = 0x08068da1); -PROVIDE(net_pkt_clone = 0x08070501); +PROVIDE(net_if_ipv4_select_src_addr = 0x08050f11); +PROVIDE(idle = 0x0807eb39); +PROVIDE(net_dhcpv4_init = 0x08055a75); +PROVIDE(net_context_ref = 0x08074cc1); +PROVIDE(net_ipv4_create = 0x0807629b); +PROVIDE(mbedtls_mpi_cmp_mpi = 0x0807c81f); +PROVIDE(z_shell_history_purge = 0x080724e5); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QAV_PARAM = 0x08050351); +PROVIDE(log_backend_disable = 0x08070de3); +PROVIDE(HAL_QSPI_AbortCpltCallback = 0x0807b371); +PROVIDE(assert_print = 0x0807084f); +PROVIDE(k_heap_aligned_alloc = 0x0807e9bb); +PROVIDE(mbedtls_calloc = 0x080641b5); +PROVIDE(z_column_span_with_buffer_offsets_get = 0x08071883); +PROVIDE(net_if_recv_data = 0x08074657); +PROVIDE(dma_stm32_clear_fe = 0x08058c41); +PROVIDE(usb_dc_ep_clear_stall = 0x080570b1); +PROVIDE(z_impl_zsock_get_context_object = 0x0807320b); +PROVIDE(llext_unload = 0x0804b019); +PROVIDE(HAL_PCD_SuspendCallback = 0x08057501); +PROVIDE(fs_stat = 0x0804acbd); +PROVIDE(z_impl_k_timer_status_get = 0x0807f84f); +PROVIDE(HAL_PCD_ConnectCallback = 0x080574d9); +PROVIDE(z_shell_log_backend_disable = 0x08072205); +PROVIDE(strtold = 0x08041a81); +PROVIDE(net_pkt_get_reserve_tx_data = 0x080525c1); +PROVIDE(k_heap_free = 0x0807ea51); +PROVIDE(mbedtls_mpi_sub_abs = 0x0807c96f); +PROVIDE(USB_SetCurrentMode = 0x0807b629); +PROVIDE(z_shell_op_cursor_move = 0x08071d2f); +PROVIDE(net_pkt_frag_unref = 0x080758db); +PROVIDE(net_pkt_clone = 0x08075d3b); +PROVIDE(z_timer_expiration_handler = 0x0806e525); PROVIDE(__floatunsidf = 0x08040659); -PROVIDE(mbedtls_md_starts = 0x0805dbd1); -PROVIDE(HAL_ETH_RxAllocateCallback = 0x08057e1d); -PROVIDE(net_tc_tx_init = 0x080705f5); -PROVIDE(mpsc_pbuf_init = 0x0806b02f); +PROVIDE(mbedtls_md_starts = 0x08063355); +PROVIDE(HAL_ETH_RxAllocateCallback = 0x08059aa9); +PROVIDE(net_tc_tx_init = 0x08075e2f); +PROVIDE(mpsc_pbuf_init = 0x08070869); +PROVIDE(video_buffer_release = 0x0805d319); PROVIDE(__floatundisf = 0x08040f6d); -PROVIDE(__kernel_sin = 0x08042aa9); -PROVIDE(usb_dc_ep_check_cap = 0x08056b51); -PROVIDE(z_abort_timeout = 0x08078c05); -PROVIDE(open = 0x0806d2cb); +PROVIDE(__kernel_sin = 0x08042de1); +PROVIDE(usb_dc_ep_check_cap = 0x08057009); +PROVIDE(z_abort_timeout = 0x0807f6ef); +PROVIDE(open = 0x08072b05); PROVIDE(__aeabi_f2d = 0x0804069d); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_ADDRESS = 0x0804fc49); -PROVIDE(mbedtls_ssl_get_max_out_record_payload = 0x08077b01); -PROVIDE(net_context_packet_received = 0x080519e9); -PROVIDE(net_if_try_queue_tx = 0x0806ee2f); -PROVIDE(z_impl_k_reschedule = 0x080684cd); -PROVIDE(z_reschedule = 0x08068379); -PROVIDE(mbedtls_md_update = 0x0805dc19); -PROVIDE(mbedtls_pk_parse_subpubkey = 0x08062369); -PROVIDE(sys_heap_free = 0x0806ab8f); -PROVIDE(z_impl_net_if_ipv4_set_netmask_by_index = 0x0806ec71); -PROVIDE(net_ipv4_broadcast_address = 0x080516b1); -PROVIDE(HAL_PCD_ResumeCallback = 0x0805705d); -PROVIDE(sys_arch_reboot = 0x08048bd1); -PROVIDE(mbedtls_ssl_handshake_server_step = 0x08065209); -PROVIDE(net_arp_clear_pending = 0x08050661); -PROVIDE(HAL_PCDEx_SetRxFiFo = 0x08074559); -PROVIDE(z_bss_zero = 0x080671ad); -PROVIDE(HAL_ETH_TxCpltCallback = 0x080721fb); -PROVIDE(__math_oflow = 0x08042e89); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_ADDRESS = 0x080500d9); +PROVIDE(mbedtls_ssl_get_max_out_record_payload = 0x0807e5eb); +PROVIDE(net_context_packet_received = 0x08051ea1); +PROVIDE(net_if_try_queue_tx = 0x08074669); +PROVIDE(dmamux_stm32_configure = 0x08059121); +PROVIDE(z_impl_k_reschedule = 0x0806dc51); +PROVIDE(z_reschedule = 0x0806dafd); +PROVIDE(mbedtls_md_update = 0x0806339d); +PROVIDE(sys_multi_heap_get_heap = 0x08070707); +PROVIDE(mbedtls_pk_parse_subpubkey = 0x08067aed); +PROVIDE(sys_heap_free = 0x08070313); +PROVIDE(z_impl_net_if_ipv4_set_netmask_by_index = 0x080744ab); +PROVIDE(net_ipv4_broadcast_address = 0x08051b69); +PROVIDE(HAL_PCD_ResumeCallback = 0x08057515); +PROVIDE(sys_arch_reboot = 0x08049061); +PROVIDE(mbedtls_ssl_handshake_server_step = 0x0806a98d); +PROVIDE(net_arp_clear_pending = 0x08050af1); +PROVIDE(HAL_PCDEx_SetRxFiFo = 0x0807ae89); +PROVIDE(z_bss_zero = 0x0806c931); +PROVIDE(HAL_ETH_TxCpltCallback = 0x0807800d); +PROVIDE(dma_stm32_get_status = 0x08058465); +PROVIDE(__math_oflow = 0x080431c1); PROVIDE(__aeabi_uidivmod = 0x08040395); PROVIDE(__aeabi_d2uiz = 0x08040cfd); -PROVIDE(net_buf_id = 0x08049aa1); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_LINK = 0x0804fc49); -PROVIDE(net_recv_data = 0x0806e809); -PROVIDE(k_work_submit = 0x08067b69); -PROVIDE(z_shell_cursor_in_empty_line = 0x0806c45d); -PROVIDE(shell_get_return_value = 0x0806bfc9); -PROVIDE(net_context_bind = 0x0806f4fd); -PROVIDE(net_if_ipv4_set_netmask_by_addr = 0x0806ec1f); -PROVIDE(strstr = 0x0807926d); -PROVIDE(net_pkt_available_buffer = 0x0807010b); -PROVIDE(net_icmpv4_input = 0x08070901); -PROVIDE(usb_get_dev_data_by_ep = 0x0806b859); -PROVIDE(mbedtls_pk_free = 0x08077319); -PROVIDE(regulator_set_voltage = 0x08072efd); -PROVIDE(USB_DevInit = 0x0805bd25); -PROVIDE(usb_cancel_transfers = 0x08045471); -PROVIDE(vfprintf = 0x080696b9); -PROVIDE(mbedtls_rsa_validate_crt = 0x0805edc9); -PROVIDE(ZVFS_FD_ZERO = 0x0806d571); -PROVIDE(mbedtls_sha1_update = 0x08076ca1); -PROVIDE(z_impl_k_sem_take = 0x08067805); -PROVIDE(mbedtls_rsa_rsaes_oaep_decrypt = 0x0805fd21); -PROVIDE(net_if_addr_ref = 0x0806ed8b); -PROVIDE(USB_DisableGlobalInt = 0x08074b33); +PROVIDE(net_buf_id = 0x08049f31); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_LINK = 0x080500d9); +PROVIDE(net_recv_data = 0x08074043); +PROVIDE(k_work_submit = 0x0806d2ed); +PROVIDE(z_shell_cursor_in_empty_line = 0x08071c97); +PROVIDE(shell_get_return_value = 0x08071803); +PROVIDE(net_context_bind = 0x08074d37); +PROVIDE(net_if_ipv4_set_netmask_by_addr = 0x08074459); +PROVIDE(strstr = 0x0807fd57); +PROVIDE(net_pkt_available_buffer = 0x08075945); +PROVIDE(net_icmpv4_input = 0x0807613b); +PROVIDE(usb_get_dev_data_by_ep = 0x08071093); +PROVIDE(mbedtls_pk_free = 0x0807de03); +PROVIDE(regulator_set_voltage = 0x08078e99); +PROVIDE(USB_DevInit = 0x080614a9); +PROVIDE(usb_cancel_transfers = 0x08045901); +PROVIDE(vfprintf = 0x0806ee3d); +PROVIDE(mbedtls_rsa_validate_crt = 0x0806454d); +PROVIDE(ZVFS_FD_ZERO = 0x08072dab); +PROVIDE(mbedtls_sha1_update = 0x0807d78b); +PROVIDE(z_impl_k_sem_take = 0x0806cf89); +PROVIDE(mbedtls_rsa_rsaes_oaep_decrypt = 0x080654a5); +PROVIDE(net_if_addr_ref = 0x080745c5); +PROVIDE(USB_DisableGlobalInt = 0x0807b61d); PROVIDE(__aeabi_fcmpeq = 0x08041081); -PROVIDE(zvfs_get_fd_obj = 0x080438ed); -PROVIDE(mbedtls_x509_get_key_usage = 0x080773e7); -PROVIDE(mbedtls_mpi_grow = 0x08075a77); -PROVIDE(ethernet_flags = 0x0806e0c7); -PROVIDE(mbedtls_x509_get_sig_alg = 0x08062bb5); -PROVIDE(z_thread_is_valid = 0x08045a3d); -PROVIDE(log_output_msg_process = 0x0806b73f); -PROVIDE(usb_write = 0x0806b7f3); -PROVIDE(HAL_ETH_SetMACFilterConfig = 0x0805b291); -PROVIDE(mbedtls_ssl_get_bytes_avail = 0x08077791); -PROVIDE(net_tcp_put = 0x080533d9); -PROVIDE(llext_buf_seek = 0x0806d76f); -PROVIDE(log_set_timestamp_func = 0x08043df9); -PROVIDE(mbedtls_internal_aes_decrypt = 0x0805cab1); -PROVIDE(mbedtls_mpi_div_mpi = 0x0805d1b5); -PROVIDE(z_device_state_init = 0x08077de7); -PROVIDE(mbedtls_sha512_free = 0x08076f75); -PROVIDE(mbedtls_aes_setkey_dec = 0x0805c62d); -PROVIDE(regulator_set_current_limit = 0x08072f25); -PROVIDE(sys_heap_alloc = 0x0806abb3); +PROVIDE(zvfs_get_fd_obj = 0x08043d7d); +PROVIDE(mbedtls_x509_get_key_usage = 0x0807ded1); +PROVIDE(mbedtls_mpi_grow = 0x0807c561); +PROVIDE(dma_stm32_is_dme_active = 0x08058c65); +PROVIDE(ethernet_flags = 0x08073901); +PROVIDE(mbedtls_x509_get_sig_alg = 0x08068339); +PROVIDE(z_thread_is_valid = 0x08045ecd); +PROVIDE(log_output_msg_process = 0x08070f79); +PROVIDE(usb_write = 0x0807102d); +PROVIDE(HAL_ETH_SetMACFilterConfig = 0x080602fd); +PROVIDE(mbedtls_ssl_get_bytes_avail = 0x0807e27b); +PROVIDE(net_tcp_put = 0x08053891); +PROVIDE(llext_buf_seek = 0x08072fa9); +PROVIDE(log_set_timestamp_func = 0x08044289); +PROVIDE(mbedtls_internal_aes_decrypt = 0x08062235); +PROVIDE(mbedtls_mpi_div_mpi = 0x08062939); +PROVIDE(z_device_state_init = 0x0807e8d1); +PROVIDE(mbedtls_sha512_free = 0x0807da5f); +PROVIDE(mbedtls_aes_setkey_dec = 0x08061db1); +PROVIDE(regulator_set_current_limit = 0x08078ec1); +PROVIDE(sys_heap_alloc = 0x08070337); PROVIDE(__floatunsisf = 0x08040f49); -PROVIDE(fs_sync = 0x0804a7e5); -PROVIDE(net_if_try_send_data = 0x0806ee4f); -PROVIDE(USB_ActivateSetup = 0x08074f6b); -PROVIDE(arm_irq_disable = 0x08048d01); -PROVIDE(mbedtls_rsa_pkcs1_encrypt = 0x0805fced); -PROVIDE(mbedtls_ssl_transform_free = 0x0807779b); -PROVIDE(mbedtls_ssl_handshake_step = 0x08065f3d); -PROVIDE(z_impl_k_str_out = 0x08043801); -PROVIDE(mbedtls_ssl_write_finished = 0x08077d17); -PROVIDE(net_ipv4_prepare_for_send = 0x08070cb1); -PROVIDE(z_shell_log_backend_enable = 0x0806c971); -PROVIDE(mbedtls_platform_zeroize = 0x0805ea19); -PROVIDE(net_pkt_frag_insert = 0x080700f7); -PROVIDE(mbedtls_ssl_flush_output = 0x080645c5); -PROVIDE(HAL_PCD_SetAddress = 0x080742af); -PROVIDE(z_impl_net_if_ipv4_addr_rm_by_index = 0x0806ee0b); -PROVIDE(mbedtls_x509_crt_parse_cn_inet_pton = 0x08077579); -PROVIDE(z_shell_backend_rx_buffer_flush = 0x0806c82d); -PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x0806b6bf); -PROVIDE(mbedtls_zeroize_and_free = 0x08076993); -PROVIDE(mbedtls_rsa_rsaes_pkcs1_v15_encrypt = 0x0805fc5d); -PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x0806b6ad); +PROVIDE(fs_sync = 0x0804ac75); +PROVIDE(net_if_try_send_data = 0x08074689); +PROVIDE(USB_ActivateSetup = 0x0807ba55); +PROVIDE(arm_irq_disable = 0x08049191); +PROVIDE(mbedtls_rsa_pkcs1_encrypt = 0x08065471); +PROVIDE(mbedtls_ssl_transform_free = 0x0807e285); +PROVIDE(mbedtls_ssl_handshake_step = 0x0806b6c1); +PROVIDE(z_impl_k_str_out = 0x08043c91); +PROVIDE(mbedtls_ssl_write_finished = 0x0807e801); +PROVIDE(net_ipv4_prepare_for_send = 0x080764eb); +PROVIDE(z_shell_log_backend_enable = 0x080721ab); +PROVIDE(mbedtls_platform_zeroize = 0x0806419d); +PROVIDE(net_pkt_frag_insert = 0x08075931); +PROVIDE(mbedtls_ssl_flush_output = 0x08069d49); +PROVIDE(HAL_PCD_SetAddress = 0x0807abdf); +PROVIDE(z_impl_net_if_ipv4_addr_rm_by_index = 0x08074645); +PROVIDE(mbedtls_x509_crt_parse_cn_inet_pton = 0x0807e063); +PROVIDE(z_shell_backend_rx_buffer_flush = 0x08072067); +PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x08070ef9); +PROVIDE(mbedtls_zeroize_and_free = 0x0807d47d); +PROVIDE(mbedtls_rsa_rsaes_pkcs1_v15_encrypt = 0x080653e1); +PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x08070ee7); PROVIDE(__aeabi_dcmpeq = 0x08040c1d); -PROVIDE(z_impl_k_stack_pop = 0x080678d1); -PROVIDE(net_if_mcast_mon_register = 0x0805097d); -PROVIDE(zvfs_finalize_typed_fd = 0x08043a55); -PROVIDE(mbedtls_ssl_write_certificate = 0x080668ed); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXINJECTION_MODE = 0x0804fec1); -PROVIDE(ztls_getsockopt_ctx = 0x0804e78d); -PROVIDE(stm32_exti_set_line_src_port = 0x08056679); -PROVIDE(mbedtls_mpi_core_exp_mod = 0x0807599d); -PROVIDE(net_mgmt_event_wait = 0x0806f3d7); -PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x0806b6d3); -PROVIDE(USB_GetDevSpeed = 0x08074c31); -PROVIDE(llext_load = 0x0804aabd); -PROVIDE(__start = 0x08048b8d); -PROVIDE(z_stack_space_get = 0x08078701); +PROVIDE(z_impl_k_stack_pop = 0x0806d055); +PROVIDE(net_if_mcast_mon_register = 0x08050e35); +PROVIDE(zvfs_finalize_typed_fd = 0x08043ee5); +PROVIDE(mbedtls_ssl_write_certificate = 0x0806c071); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXINJECTION_MODE = 0x08050351); +PROVIDE(ztls_getsockopt_ctx = 0x0804ec1d); +PROVIDE(stm32_exti_set_line_src_port = 0x08056b31); +PROVIDE(HAL_SDRAM_Init = 0x08060cb1); +PROVIDE(mbedtls_mpi_core_exp_mod = 0x0807c487); +PROVIDE(LL_DMA_StructInit = 0x0807b3e5); +PROVIDE(net_mgmt_event_wait = 0x08074c11); +PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x08070f0d); +PROVIDE(USB_GetDevSpeed = 0x0807b71b); +PROVIDE(llext_load = 0x0804af4d); +PROVIDE(__start = 0x0804901d); +PROVIDE(z_stack_space_get = 0x0807f1eb); PROVIDE(__cmpsf2 = 0x08041009); -PROVIDE(strchr = 0x080791cb); -PROVIDE(net_tcp_input = 0x0805310d); -PROVIDE(mbedtls_ssl_close_notify = 0x08064b49); -PROVIDE(llext_iterate = 0x0804aa25); -PROVIDE(dns_unpack_response_header = 0x08071c2b); -PROVIDE(net_context_connect = 0x0806f951); -PROVIDE(__stdout_hook_install = 0x08049495); -PROVIDE(z_thread_timeout = 0x08078811); -PROVIDE(inet_pton = 0x0806d2fd); -PROVIDE(net_context_sendmsg = 0x0806fb5b); -PROVIDE(mbedtls_rsa_check_pub_priv = 0x0805f519); -PROVIDE(log_core_init = 0x08043e19); +PROVIDE(strchr = 0x0807fcb5); +PROVIDE(net_tcp_input = 0x080535c5); +PROVIDE(mbedtls_ssl_close_notify = 0x0806a2cd); +PROVIDE(llext_iterate = 0x0804aeb5); +PROVIDE(dns_unpack_response_header = 0x08077465); +PROVIDE(net_context_connect = 0x0807518b); +PROVIDE(__stdout_hook_install = 0x08049925); +PROVIDE(z_thread_timeout = 0x0807f2fb); +PROVIDE(inet_pton = 0x08072b37); +PROVIDE(net_context_sendmsg = 0x08075395); +PROVIDE(mbedtls_rsa_check_pub_priv = 0x08064c9d); +PROVIDE(log_core_init = 0x080442a9); PROVIDE(CONFIG_SYS_HASH_FUNC32 = 0x00000001); -PROVIDE(z_impl_zsock_getsockname = 0x0804c831); -PROVIDE(z_shell_help_cmd_print = 0x08047a09); -PROVIDE(z_early_memcpy = 0x08077e97); -PROVIDE(zvfs_eventfd_read = 0x08049fc1); -PROVIDE(socket_service_init = 0x0804ecb5); -PROVIDE(mbedtls_ssl_setup = 0x08066391); -PROVIDE(shell_vfprintf = 0x0806be3b); -PROVIDE(HAL_ETH_GetError = 0x080740e3); -PROVIDE(arch_tls_stack_setup = 0x080480bd); -PROVIDE(z_shell_fprintf_buffer_flush = 0x0806bfe9); -PROVIDE(mbedtls_rsa_public = 0x0805f559); -PROVIDE(z_impl_net_if_ipv4_set_netmask_by_addr_by_index = 0x0806ec81); -PROVIDE(zvfs_reserve_fd = 0x080439c9); -PROVIDE(HAL_ETH_GetMACConfig = 0x08073e75); -PROVIDE(z_sched_init = 0x08068491); -PROVIDE(HAL_QSPI_TxCpltCallback = 0x0807273f); +PROVIDE(z_impl_zsock_getsockname = 0x0804ccc1); +PROVIDE(z_shell_help_cmd_print = 0x08047e99); +PROVIDE(z_early_memcpy = 0x0807e981); +PROVIDE(zvfs_eventfd_read = 0x0804a451); +PROVIDE(socket_service_init = 0x0804f145); +PROVIDE(mbedtls_ssl_setup = 0x0806bb15); +PROVIDE(shell_vfprintf = 0x08071675); +PROVIDE(HAL_ETH_GetError = 0x0807aa13); +PROVIDE(arch_tls_stack_setup = 0x0804854d); +PROVIDE(z_shell_fprintf_buffer_flush = 0x08071823); +PROVIDE(mbedtls_rsa_public = 0x08064cdd); +PROVIDE(z_impl_net_if_ipv4_set_netmask_by_addr_by_index = 0x080744bb); +PROVIDE(zvfs_reserve_fd = 0x08043e59); +PROVIDE(HAL_ETH_GetMACConfig = 0x0807a7a5); +PROVIDE(z_sched_init = 0x0806dc15); +PROVIDE(HAL_QSPI_TxCpltCallback = 0x08078551); PROVIDE(__addsf3 = 0x08040de9); -PROVIDE(__shiftright128 = 0x080794fb); -PROVIDE(z_impl_flash_flatten = 0x0806ce69); -PROVIDE(z_shell_print_cmd = 0x080475fd); -PROVIDE(net_buf_simple_tailroom = 0x0806d455); -PROVIDE(z_shell_vt100_colors_restore = 0x080476b9); +PROVIDE(__shiftright128 = 0x0807ffe5); +PROVIDE(z_impl_flash_flatten = 0x080726a3); +PROVIDE(z_shell_print_cmd = 0x08047a8d); +PROVIDE(net_buf_simple_tailroom = 0x08072c8f); +PROVIDE(z_shell_vt100_colors_restore = 0x08047b49); PROVIDE(__aeabi_frsub = 0x08040ddd); -PROVIDE(cdc_acm_dte_rate_callback_set = 0x080458f9); -PROVIDE(bind = 0x0806d309); -PROVIDE(mbedtls_mpi_core_to_mont_rep = 0x08075a19); -PROVIDE(k_malloc = 0x0807900d); -PROVIDE(z_impl_k_poll_signal_check = 0x08078fcf); -PROVIDE(sys_timepoint_timeout = 0x08078cd3); -PROVIDE(mbedtls_asn1_get_mpi = 0x08075205); -PROVIDE(z_impl_zsock_recvmsg = 0x0804c611); -PROVIDE(mbedtls_rsa_rsassa_pkcs1_v15_sign = 0x08060039); -PROVIDE(z_shell_spaces_trim = 0x0806c34b); -PROVIDE(mbedtls_mpi_cmp_int = 0x08075dc5); -PROVIDE(scalbn = 0x08042d91); -PROVIDE(HAL_ETH_GetMACFilterConfig = 0x08074065); -PROVIDE(ring_buf_peek = 0x0806b49b); -PROVIDE(zsock_wait_data = 0x0806dc1b); -PROVIDE(HAL_ETH_EEECallback = 0x08073cbf); -PROVIDE(mbedtls_x509_crt_free = 0x080775cd); -PROVIDE(z_impl_device_get_binding = 0x08066efd); -PROVIDE(log_backend_enable = 0x0806b587); +PROVIDE(cdc_acm_dte_rate_callback_set = 0x08045d89); +PROVIDE(bind = 0x08072b43); +PROVIDE(mbedtls_mpi_core_to_mont_rep = 0x0807c503); +PROVIDE(k_malloc = 0x0807faf7); +PROVIDE(z_impl_k_poll_signal_check = 0x0807fab9); +PROVIDE(sys_timepoint_timeout = 0x0807f7bd); +PROVIDE(mbedtls_asn1_get_mpi = 0x0807bcef); +PROVIDE(z_impl_zsock_recvmsg = 0x0804caa1); +PROVIDE(mbedtls_rsa_rsassa_pkcs1_v15_sign = 0x080657bd); +PROVIDE(z_shell_spaces_trim = 0x08071b85); +PROVIDE(mbedtls_mpi_cmp_int = 0x0807c8af); +PROVIDE(scalbn = 0x080430c9); +PROVIDE(HAL_ETH_GetMACFilterConfig = 0x0807a995); +PROVIDE(ring_buf_peek = 0x08070cd5); +PROVIDE(zsock_wait_data = 0x08073455); +PROVIDE(HAL_ETH_EEECallback = 0x0807a5ef); +PROVIDE(mbedtls_x509_crt_free = 0x0807e0b7); +PROVIDE(z_impl_device_get_binding = 0x0806c681); +PROVIDE(log_backend_enable = 0x08070dc1); PROVIDE(__aeabi_ldiv0 = 0x080403d1); -PROVIDE(sys_bitarray_alloc = 0x0806b269); -PROVIDE(HAL_ETH_SetMACConfig = 0x0807404d); -PROVIDE(__dtoa_engine = 0x0806a09d); -PROVIDE(z_impl_net_eth_get_ptp_clock_by_index = 0x0806e25b); -PROVIDE(USB_GetMode = 0x08074f63); -PROVIDE(z_arm_interrupt_init = 0x08048f39); -PROVIDE(z_shell_get_last_command = 0x0806c2ef); -PROVIDE(net_context_create_ipv4_new = 0x0806f67d); -PROVIDE(fs_write = 0x0804a6c5); -PROVIDE(HAL_ETH_ReadPHYRegister = 0x08073e1b); -PROVIDE(isalpha = 0x08079099); -PROVIDE(mbedtls_aes_free = 0x08074f95); -PROVIDE(HAL_QSPI_Init = 0x0805b9b9); -PROVIDE(z_sched_wake = 0x080788eb); -PROVIDE(mbedtls_cipher_set_iv = 0x0805d5f5); -PROVIDE(printf = 0x080692b1); -PROVIDE(z_shell_cmd_trim = 0x0806c3ab); +PROVIDE(stm32_dma_is_tc_irq_active = 0x08058d09); +PROVIDE(sys_bitarray_alloc = 0x08070aa3); +PROVIDE(HAL_ETH_SetMACConfig = 0x0807a97d); +PROVIDE(__dtoa_engine = 0x0806f821); +PROVIDE(z_impl_net_eth_get_ptp_clock_by_index = 0x08073a95); +PROVIDE(USB_GetMode = 0x0807ba4d); +PROVIDE(HAL_DCMI_MspInit = 0x0807a123); +PROVIDE(z_arm_interrupt_init = 0x080493c9); +PROVIDE(z_shell_get_last_command = 0x08071b29); +PROVIDE(net_context_create_ipv4_new = 0x08074eb7); +PROVIDE(fs_write = 0x0804ab55); +PROVIDE(HAL_ETH_ReadPHYRegister = 0x0807a74b); +PROVIDE(isalpha = 0x0807fb83); +PROVIDE(mbedtls_aes_free = 0x0807ba7f); +PROVIDE(HAL_QSPI_Init = 0x08060a25); +PROVIDE(z_sched_wake = 0x0807f3d5); +PROVIDE(mbedtls_cipher_set_iv = 0x08062d79); +PROVIDE(printf = 0x0806ea35); +PROVIDE(z_shell_cmd_trim = 0x08071be5); PROVIDE(__aeabi_uldivmod = 0x080411b1); -PROVIDE(stm32_gpio_intc_set_irq_callback = 0x08056615); -PROVIDE(mbedtls_pk_verify_restartable = 0x08062591); -PROVIDE(net_icmpv4_send_error = 0x080707ff); -PROVIDE(mbedtls_sha1_init = 0x08076c85); -PROVIDE(zsock_connect_ctx = 0x0804cda1); -PROVIDE(fs_close = 0x0804a631); -PROVIDE(ztls_connect_ctx = 0x0804e281); -PROVIDE(HAL_ETH_SetMDIOClockRange = 0x0805afb1); -PROVIDE(mbedtls_rsa_parse_pubkey = 0x0805f3fd); -PROVIDE(z_impl_k_pipe_close = 0x08078ba5); -PROVIDE(usb_dc_ep_disable = 0x08056cc5); -PROVIDE(net_if_need_calc_tx_checksum = 0x0806ef0b); -PROVIDE(HAL_RCC_GetSysClockFreq = 0x0805a9f1); -PROVIDE(fnmatch = 0x0806d2c1); +PROVIDE(stm32_gpio_intc_set_irq_callback = 0x08056acd); +PROVIDE(mbedtls_pk_verify_restartable = 0x08067d15); +PROVIDE(net_icmpv4_send_error = 0x08076039); +PROVIDE(mbedtls_sha1_init = 0x0807d76f); +PROVIDE(zsock_connect_ctx = 0x0804d231); +PROVIDE(fs_close = 0x0804aac1); +PROVIDE(ztls_connect_ctx = 0x0804e711); +PROVIDE(HAL_ETH_SetMDIOClockRange = 0x0806001d); +PROVIDE(mbedtls_rsa_parse_pubkey = 0x08064b81); +PROVIDE(z_impl_k_pipe_close = 0x0807f68f); +PROVIDE(usb_dc_ep_disable = 0x0805717d); +PROVIDE(net_if_need_calc_tx_checksum = 0x08074745); +PROVIDE(HAL_RCC_GetSysClockFreq = 0x0805deb9); +PROVIDE(fnmatch = 0x08072afb); PROVIDE(__aeabi_drsub = 0x080403d5); PROVIDE(__aeabi_d2ulz = 0x08040341); -PROVIDE(mbedtls_ssl_handshake = 0x08065fc5); -PROVIDE(shell_fprintf_warn = 0x0806bf03); -PROVIDE(arch_switch_to_main_thread = 0x08048ed5); -PROVIDE(z_shell_wildcard_prepare = 0x0806cde7); -PROVIDE(z_shell_wildcard_finalize = 0x0806ce29); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBU_PARAM = 0x0804fec1); -PROVIDE(timeutil_timegm64 = 0x08043b39); -PROVIDE(z_impl_k_queue_alloc_append = 0x080783c9); -PROVIDE(usb_get_device_descriptor = 0x08044fe9); -PROVIDE(z_impl_net_if_ipv4_addr_lookup_by_index = 0x0806ef1b); -PROVIDE(mbedtls_aes_crypt_cbc = 0x08074fc9); -PROVIDE(mbedtls_ssl_sig_from_pk_alg = 0x08077c59); -PROVIDE(mbedtls_ssl_write_client_hello = 0x08063d3d); -PROVIDE(mbedtls_ssl_read_record = 0x080647e9); -PROVIDE(zsock_setsockopt_ctx = 0x0804d7cd); -PROVIDE(mbedtls_pk_verify = 0x0807734b); -PROVIDE(mbedtls_ssl_update_out_pointers = 0x08077711); -PROVIDE(net_ipv4_init = 0x08070cb5); -PROVIDE(fs_truncate = 0x0804a79d); -PROVIDE(filter_set = 0x08043fdd); -PROVIDE(crc32_ieee = 0x0806a827); -PROVIDE(arm_irq_priority_set = 0x08048d45); -PROVIDE(__double_computeInvPow5 = 0x0806a6a9); -PROVIDE(z_shell_pattern_remove = 0x0806c249); -PROVIDE(k_work_init = 0x080785dd); -PROVIDE(k_timer_init = 0x08078d15); -PROVIDE(mbedtls_pk_setup = 0x08062565); -PROVIDE(sys_reboot = 0x08043b05); -PROVIDE(HAL_Delay = 0x0806b4ef); -PROVIDE(llext_fs_prepare = 0x0806d78b); -PROVIDE(z_impl_zsock_sendmsg = 0x0804c54d); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBV_PARAM = 0x0804fc49); -PROVIDE(net_pkt_unref = 0x080700a9); -PROVIDE(llext_dependency_remove_all = 0x0806d6ff); -PROVIDE(llext_find_sym = 0x0804aa61); -PROVIDE(net_if_get_name = 0x0806ef8b); +PROVIDE(mbedtls_ssl_handshake = 0x0806b749); +PROVIDE(shell_fprintf_warn = 0x0807173d); +PROVIDE(arch_switch_to_main_thread = 0x08049365); +PROVIDE(z_shell_wildcard_prepare = 0x08072621); +PROVIDE(z_shell_wildcard_finalize = 0x08072663); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBU_PARAM = 0x08050351); +PROVIDE(timeutil_timegm64 = 0x08043fc9); +PROVIDE(z_impl_k_queue_alloc_append = 0x0807eeb3); +PROVIDE(usb_get_device_descriptor = 0x08045479); +PROVIDE(z_impl_net_if_ipv4_addr_lookup_by_index = 0x08074755); +PROVIDE(mbedtls_aes_crypt_cbc = 0x0807bab3); +PROVIDE(mbedtls_ssl_sig_from_pk_alg = 0x0807e743); +PROVIDE(mbedtls_ssl_write_client_hello = 0x080694c1); +PROVIDE(mbedtls_ssl_read_record = 0x08069f6d); +PROVIDE(zsock_setsockopt_ctx = 0x0804dc5d); +PROVIDE(mbedtls_pk_verify = 0x0807de35); +PROVIDE(mbedtls_ssl_update_out_pointers = 0x0807e1fb); +PROVIDE(net_ipv4_init = 0x080764ef); +PROVIDE(fs_truncate = 0x0804ac2d); +PROVIDE(filter_set = 0x0804446d); +PROVIDE(crc32_ieee = 0x0806ffab); +PROVIDE(arm_irq_priority_set = 0x080491d5); +PROVIDE(__double_computeInvPow5 = 0x0806fe2d); +PROVIDE(z_shell_pattern_remove = 0x08071a83); +PROVIDE(k_work_init = 0x0807f0c7); +PROVIDE(k_timer_init = 0x0807f7ff); +PROVIDE(mbedtls_pk_setup = 0x08067ce9); +PROVIDE(sys_reboot = 0x08043f95); +PROVIDE(HAL_Delay = 0x08070d29); +PROVIDE(llext_fs_prepare = 0x08072fc5); +PROVIDE(z_impl_zsock_sendmsg = 0x0804c9dd); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBV_PARAM = 0x080500d9); +PROVIDE(net_pkt_unref = 0x080758e3); +PROVIDE(llext_dependency_remove_all = 0x08072f39); +PROVIDE(llext_find_sym = 0x0804aef1); +PROVIDE(net_if_get_name = 0x080747c5); PROVIDE(__aeabi_d2iz = 0x08040cad); -PROVIDE(z_unpend_all = 0x08078855); -PROVIDE(mbedtls_ssl_get_ciphersuite_id = 0x0807765d); -PROVIDE(z_arm_svc = 0x08048cc1); -PROVIDE(cbvprintf_package = 0x080430ed); -PROVIDE(usb_disable = 0x08044c59); +PROVIDE(z_unpend_all = 0x0807f33f); +PROVIDE(mbedtls_ssl_get_ciphersuite_id = 0x0807e147); +PROVIDE(z_arm_svc = 0x08049151); +PROVIDE(cbvprintf_package = 0x0804357d); +PROVIDE(usb_disable = 0x080450e9); PROVIDE(__aeabi_idiv0 = 0x080403d1); -PROVIDE(mbedtls_ssl_write_version = 0x080777cd); -PROVIDE(ring_buf_get = 0x0806b457); -PROVIDE(HAL_SYSCFG_ETHInterfaceSelect = 0x0805a9dd); -PROVIDE(z_queue_node_peek = 0x08078303); -PROVIDE(dns_resolve_name_internal = 0x08056109); -PROVIDE(usb_transfer_init = 0x080454b5); -PROVIDE(net_pkt_alloc_buffer = 0x080522f1); -PROVIDE(HAL_ETH_RxLinkCallback = 0x08057e5d); -PROVIDE(llext_lookup_symbol = 0x0804b9a5); -PROVIDE(llext_buf_read = 0x0806d745); -PROVIDE(z_early_memset = 0x08077e93); -PROVIDE(mbedtls_mpi_init = 0x08075a51); -PROVIDE(strncpy = 0x08079209); -PROVIDE(z_arm_configure_static_mpu_regions = 0x080490e1); -PROVIDE(mbedtls_mpi_add_int = 0x08075f97); -PROVIDE(z_shell_op_cursor_end_move = 0x0806c5cf); -PROVIDE(llext_bootstrap = 0x0804ac35); -PROVIDE(z_impl_k_poll_signal_raise = 0x08069059); -PROVIDE(mbedtls_rsa_check_pubkey = 0x0805f3b1); -PROVIDE(zsock_sendto_ctx = 0x0804cead); -PROVIDE(mbedtls_ssl_write_record = 0x08064621); -PROVIDE(net_if_get_by_name = 0x08051199); -PROVIDE(mbedtls_ct_memcpy_if = 0x0805da11); -PROVIDE(stm32_i2c_error_isr = 0x08072ac1); -PROVIDE(z_thread_prio_set = 0x080682d9); -PROVIDE(net_ipaddr_parse = 0x0806f303); +PROVIDE(mbedtls_ssl_write_version = 0x0807e2b7); +PROVIDE(ring_buf_get = 0x08070c91); +PROVIDE(HAL_SYSCFG_ETHInterfaceSelect = 0x0805dea5); +PROVIDE(z_queue_node_peek = 0x0807eded); +PROVIDE(dns_resolve_name_internal = 0x080565c1); +PROVIDE(usb_transfer_init = 0x08045945); +PROVIDE(net_pkt_alloc_buffer = 0x080527a9); +PROVIDE(HAL_ETH_RxLinkCallback = 0x08059ae9); +PROVIDE(llext_lookup_symbol = 0x0804be35); +PROVIDE(llext_buf_read = 0x08072f7f); +PROVIDE(z_early_memset = 0x0807e97d); +PROVIDE(mbedtls_mpi_init = 0x0807c53b); +PROVIDE(strncpy = 0x0807fcf3); +PROVIDE(z_arm_configure_static_mpu_regions = 0x08049571); +PROVIDE(HAL_DMA_Init = 0x0805e6a5); +PROVIDE(mbedtls_mpi_add_int = 0x0807ca81); +PROVIDE(z_shell_op_cursor_end_move = 0x08071e09); +PROVIDE(llext_bootstrap = 0x0804b0c5); +PROVIDE(z_impl_k_poll_signal_raise = 0x0806e7dd); +PROVIDE(mbedtls_rsa_check_pubkey = 0x08064b35); +PROVIDE(zsock_sendto_ctx = 0x0804d33d); +PROVIDE(sys_multi_heap_add_heap = 0x0807068f); +PROVIDE(mbedtls_ssl_write_record = 0x08069da5); +PROVIDE(net_if_get_by_name = 0x08051651); +PROVIDE(mbedtls_ct_memcpy_if = 0x08063195); +PROVIDE(stm32_i2c_error_isr = 0x080788f7); +PROVIDE(z_thread_prio_set = 0x0806da5d); +PROVIDE(net_ipaddr_parse = 0x08074b3d); PROVIDE(__cmpdf2 = 0x08040b81); -PROVIDE(z_arm_fault = 0x08048925); -PROVIDE(mbedtls_md5_init = 0x08076865); -PROVIDE(putchar = 0x080692d5); -PROVIDE(zsock_listen_ctx = 0x0804ce6d); -PROVIDE(dns_msg_pack_query = 0x08071c7f); +PROVIDE(z_arm_fault = 0x08048db5); +PROVIDE(mbedtls_md5_init = 0x0807d34f); +PROVIDE(putchar = 0x0806ea59); +PROVIDE(zsock_listen_ctx = 0x0804d2fd); +PROVIDE(dns_msg_pack_query = 0x080774b9); PROVIDE(CONFIG_POSIX_THREAD_SAFE_FUNCTIONS = 0x00000001); -PROVIDE(usb_enable = 0x08044e21); -PROVIDE(mbedtls_sha256_finish = 0x08076e7f); -PROVIDE(z_log_runtime_filters_init = 0x08043f69); -PROVIDE(z_arm_exc_exit = 0x080484d9); -PROVIDE(z_impl_k_mutex_lock = 0x08067599); -PROVIDE(zsock_accept_ctx = 0x0804d069); -PROVIDE(znet_mgmt_socket = 0x0804ed31); -PROVIDE(mbedtls_mpi_core_shift_l = 0x080755b3); -PROVIDE(zsock_getaddrinfo = 0x0806d8bb); -PROVIDE(z_log_msg_commit = 0x08043ee1); -PROVIDE(z_prep_c = 0x08048d71); -PROVIDE(mbedtls_x509_get_name = 0x080628fd); -PROVIDE(k_work_reschedule_for_queue = 0x08067c51); +PROVIDE(usb_enable = 0x080452b1); +PROVIDE(mbedtls_sha256_finish = 0x0807d969); +PROVIDE(z_log_runtime_filters_init = 0x080443f9); +PROVIDE(z_arm_exc_exit = 0x08048969); +PROVIDE(FMC_SDRAM_SendCommand = 0x0807b48f); +PROVIDE(z_impl_k_mutex_lock = 0x0806cd1d); +PROVIDE(zsock_accept_ctx = 0x0804d4f9); +PROVIDE(znet_mgmt_socket = 0x0804f1c1); +PROVIDE(mbedtls_mpi_core_shift_l = 0x0807c09d); +PROVIDE(zsock_getaddrinfo = 0x080730f5); +PROVIDE(z_log_msg_commit = 0x08044371); +PROVIDE(z_prep_c = 0x08049201); +PROVIDE(mbedtls_x509_get_name = 0x08068081); +PROVIDE(k_work_reschedule_for_queue = 0x0806d3d5); PROVIDE(__aeabi_cfcmpeq = 0x08041071); -PROVIDE(z_impl_zvfs_select = 0x0804a22d); -PROVIDE(mbedtls_mpi_core_cond_assign = 0x0805cfc9); -PROVIDE(z_impl_k_pipe_reset = 0x08078b65); -PROVIDE(mbedtls_pem_free = 0x080772b1); -PROVIDE(mbedtls_rsa_parse_key = 0x08060379); -PROVIDE(mbedtls_rsa_free = 0x08076c13); -PROVIDE(net_tcp_recv = 0x080712d3); -PROVIDE(mbedtls_ssl_update_in_pointers = 0x08077759); -PROVIDE(k_sched_unlock = 0x08068429); -PROVIDE(net_if_ipv4_get_ttl = 0x0806ed33); -PROVIDE(llext_fs_finalize = 0x0806d7eb); -PROVIDE(z_impl_k_sched_current_thread_query = 0x08068671); -PROVIDE(net_context_is_v6only_set = 0x0806f483); -PROVIDE(z_impl_k_condvar_init = 0x080786bd); -PROVIDE(exit = 0x08069149); -PROVIDE(mbedtls_ssl_conf_authmode = 0x08077a75); -PROVIDE(HAL_QSPI_Command_IT = 0x080747d5); -PROVIDE(mbedtls_md_get_size = 0x08076853); -PROVIDE(z_impl_hwinfo_get_reset_cause = 0x08059ad5); -PROVIDE(zsock_getsockopt_ctx = 0x0804d675); -PROVIDE(net_if_init = 0x080511dd); -PROVIDE(mbedtls_cipher_init = 0x0807679f); -PROVIDE(mbedtls_md_info_from_ctx = 0x0807685f); -PROVIDE(k_sys_fatal_error_handler = 0x08066fa1); -PROVIDE(net_socket_is_tls = 0x0804e229); -PROVIDE(net_buf_simple_add_mem = 0x0806d41f); -PROVIDE(mbedtls_rsa_deduce_private_exponent = 0x080769a7); -PROVIDE(HAL_ETH_GetMACError = 0x080740ef); -PROVIDE(_cos = 0x08042081); -PROVIDE(vprintk = 0x0806afb3); -PROVIDE(z_shell_op_completion_insert = 0x0806c7c5); +PROVIDE(z_impl_zvfs_select = 0x0804a6bd); +PROVIDE(mbedtls_mpi_core_cond_assign = 0x0806274d); +PROVIDE(z_impl_k_pipe_reset = 0x0807f64f); +PROVIDE(mbedtls_pem_free = 0x0807dd9b); +PROVIDE(mbedtls_rsa_parse_key = 0x08065afd); +PROVIDE(mbedtls_rsa_free = 0x0807d6fd); +PROVIDE(net_tcp_recv = 0x08076b0d); +PROVIDE(mbedtls_ssl_update_in_pointers = 0x0807e243); +PROVIDE(k_sched_unlock = 0x0806dbad); +PROVIDE(net_if_ipv4_get_ttl = 0x0807456d); +PROVIDE(llext_fs_finalize = 0x08073025); +PROVIDE(z_impl_k_sched_current_thread_query = 0x0806ddf5); +PROVIDE(net_context_is_v6only_set = 0x08074cbd); +PROVIDE(z_impl_k_condvar_init = 0x0807f1a7); +PROVIDE(dma_stm32_is_fe_active = 0x08058c7d); +PROVIDE(exit = 0x0806e8cd); +PROVIDE(mbedtls_ssl_conf_authmode = 0x0807e55f); +PROVIDE(HAL_QSPI_Command_IT = 0x0807b105); +PROVIDE(mbedtls_md_get_size = 0x0807d33d); +PROVIDE(z_impl_hwinfo_get_reset_cause = 0x0805b761); +PROVIDE(zsock_getsockopt_ctx = 0x0804db05); +PROVIDE(net_if_init = 0x08051695); +PROVIDE(mbedtls_cipher_init = 0x0807d289); +PROVIDE(mbedtls_md_info_from_ctx = 0x0807d349); +PROVIDE(k_sys_fatal_error_handler = 0x0806c725); +PROVIDE(net_socket_is_tls = 0x0804e6b9); +PROVIDE(net_buf_simple_add_mem = 0x08072c59); +PROVIDE(mbedtls_rsa_deduce_private_exponent = 0x0807d491); +PROVIDE(HAL_ETH_GetMACError = 0x0807aa1f); +PROVIDE(_cos = 0x080423b9); +PROVIDE(vprintk = 0x080707ed); +PROVIDE(z_shell_op_completion_insert = 0x08071fff); PROVIDE(__aeabi_d2f = 0x08040d3d); -PROVIDE(usb_dc_ep_read_continue = 0x08056eed); -PROVIDE(mbedtls_ssl_sig_from_pk = 0x08077c49); -PROVIDE(mbedtls_md_setup = 0x0805db19); -PROVIDE(usb_dc_ep_write = 0x08056d15); -PROVIDE(HAL_ETH_ErrorCallback = 0x08072201); -PROVIDE(shell_uninit = 0x0806bdbd); -PROVIDE(usb_dc_attach = 0x08056739); +PROVIDE(usb_dc_ep_read_continue = 0x080573a5); +PROVIDE(mbedtls_ssl_sig_from_pk = 0x0807e733); +PROVIDE(mbedtls_md_setup = 0x0806329d); +PROVIDE(usb_dc_ep_write = 0x080571cd); +PROVIDE(FMC_SDRAM_ProgramRefreshRate = 0x0807b4b3); +PROVIDE(HAL_ETH_ErrorCallback = 0x08078013); +PROVIDE(shell_uninit = 0x080715f7); +PROVIDE(usb_dc_attach = 0x08056bf1); PROVIDE(__aeabi_idivmod = 0x080403c1); -PROVIDE(z_shell_op_cursor_home_move = 0x0806c5c1); -PROVIDE(HAL_PCD_EP_Close = 0x08074347); -PROVIDE(z_impl_k_sem_init = 0x0807841f); -PROVIDE(mbedtls_ssl_set_bio = 0x08077a7f); -PROVIDE(net_tcp_accept = 0x08053015); -PROVIDE(USB_FlushTxFifo = 0x08074b9b); -PROVIDE(__do_init_array_aux = 0x08067321); -PROVIDE(USB_ReadInterrupts = 0x08074f07); -PROVIDE(net_if_get_by_iface = 0x08050fe9); -PROVIDE(stm32_i2c_transaction = 0x08072af3); -PROVIDE(send = 0x0806d335); -PROVIDE(mbedtls_ssl_get_ciphersuite_sig_pk_alg = 0x08077669); -PROVIDE(HAL_ETH_MspInit = 0x08073a5d); +PROVIDE(z_shell_op_cursor_home_move = 0x08071dfb); +PROVIDE(HAL_PCD_EP_Close = 0x0807ac77); +PROVIDE(z_impl_k_sem_init = 0x0807ef09); +PROVIDE(mbedtls_ssl_set_bio = 0x0807e569); +PROVIDE(net_tcp_accept = 0x080534cd); +PROVIDE(USB_FlushTxFifo = 0x0807b685); +PROVIDE(__do_init_array_aux = 0x0806caa5); +PROVIDE(USB_ReadInterrupts = 0x0807b9f1); +PROVIDE(net_if_get_by_iface = 0x080514a1); +PROVIDE(stm32_i2c_transaction = 0x08078929); +PROVIDE(send = 0x08072b6f); +PROVIDE(mbedtls_ssl_get_ciphersuite_sig_pk_alg = 0x0807e153); +PROVIDE(HAL_ETH_MspInit = 0x0807a38d); PROVIDE(__fixunsdfsi = 0x08040cfd); -PROVIDE(mbedtls_x509_crt_check_extended_key_usage = 0x08062f95); -PROVIDE(mbedtls_oid_get_pk_alg = 0x0805e9bd); -PROVIDE(z_shell_op_word_remove = 0x080476f9); -PROVIDE(net_pkt_rx_alloc = 0x08052199); -PROVIDE(net_buf_frag_last = 0x0806d371); -PROVIDE(k_work_schedule_for_queue = 0x08067bf1); -PROVIDE(arch_spin_relax = 0x0807804b); -PROVIDE(HAL_ETH_IRQHandler = 0x08073cc3); -PROVIDE(mbedtls_rsa_init = 0x08076c01); -PROVIDE(net_context_send = 0x0806fae9); -PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x08066f45); -PROVIDE(z_unpend_thread = 0x08078845); +PROVIDE(mbedtls_x509_crt_check_extended_key_usage = 0x08068719); +PROVIDE(mbedtls_oid_get_pk_alg = 0x08064141); +PROVIDE(z_shell_op_word_remove = 0x08047b89); +PROVIDE(stm32_dma_is_enabled_stream = 0x08058de5); +PROVIDE(net_pkt_rx_alloc = 0x08052651); +PROVIDE(dma_stm32_is_tc_active = 0x08058c11); +PROVIDE(net_buf_frag_last = 0x08072bab); +PROVIDE(k_work_schedule_for_queue = 0x0806d375); +PROVIDE(arch_spin_relax = 0x0807eb35); +PROVIDE(HAL_ETH_IRQHandler = 0x0807a5f3); +PROVIDE(mbedtls_rsa_init = 0x0807d6eb); +PROVIDE(HAL_DCMI_LineEventCallback = 0x0807a179); +PROVIDE(net_context_send = 0x08075323); +PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x0806c6c9); +PROVIDE(z_unpend_thread = 0x0807f32f); PROVIDE(__aeabi_dcmpge = 0x08040c59); -PROVIDE(z_cstart = 0x08067239); -PROVIDE(sys_clock_isr = 0x0805a7ed); -PROVIDE(mbedtls_cipher_setup = 0x0805d549); -PROVIDE(z_shell_help_request = 0x08047a49); -PROVIDE(z_impl_z_log_msg_static_create = 0x080441c9); -PROVIDE(arm_irq_is_enabled = 0x08048d29); -PROVIDE(net_eth_ipv4_mcast_to_mac_addr = 0x0806e1df); -PROVIDE(mbedtls_ssl_read = 0x080649c1); -PROVIDE(thread_is_sliceable = 0x0806896d); -PROVIDE(z_log_notify_backend_enabled = 0x0806b55d); -PROVIDE(mbedtls_ssl_handshake_wrapup = 0x08077cd9); -PROVIDE(mbedtls_ssl_set_session = 0x08066031); -PROVIDE(ZVFS_FD_SET = 0x0806d577); -PROVIDE(mbedtls_ssl_parse_sig_alg_ext = 0x0806642d); -PROVIDE(zvfs_get_obj_lock_and_cond = 0x08043929); -PROVIDE(mbedtls_ssl_handle_pending_alert = 0x080777db); -PROVIDE(mbedtls_mpi_core_montmul = 0x0807585f); -PROVIDE(z_impl_k_thread_stack_space_get = 0x08078719); -PROVIDE(atan = 0x08041e81); -PROVIDE(mbedtls_mpi_core_shift_r = 0x08075535); -PROVIDE(llext_copy_regions = 0x0806d60b); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXINJECTION_MODE = 0x0804fc49); +PROVIDE(z_cstart = 0x0806c9bd); +PROVIDE(sys_clock_isr = 0x0805d0e1); +PROVIDE(mbedtls_cipher_setup = 0x08062ccd); +PROVIDE(z_shell_help_request = 0x08047ed9); +PROVIDE(z_impl_z_log_msg_static_create = 0x08044659); +PROVIDE(arm_irq_is_enabled = 0x080491b9); +PROVIDE(net_eth_ipv4_mcast_to_mac_addr = 0x08073a19); +PROVIDE(mbedtls_ssl_read = 0x0806a145); +PROVIDE(thread_is_sliceable = 0x0806e0f1); +PROVIDE(z_log_notify_backend_enabled = 0x08070d97); +PROVIDE(stm32_dma_dump_stream_irq = 0x08058c95); +PROVIDE(mbedtls_ssl_handshake_wrapup = 0x0807e7c3); +PROVIDE(mbedtls_ssl_set_session = 0x0806b7b5); +PROVIDE(ZVFS_FD_SET = 0x08072db1); +PROVIDE(mbedtls_ssl_parse_sig_alg_ext = 0x0806bbb1); +PROVIDE(zvfs_get_obj_lock_and_cond = 0x08043db9); +PROVIDE(mbedtls_ssl_handle_pending_alert = 0x0807e2c5); +PROVIDE(mbedtls_mpi_core_montmul = 0x0807c349); +PROVIDE(z_impl_k_thread_stack_space_get = 0x0807f203); +PROVIDE(atan = 0x08041fe1); +PROVIDE(mbedtls_mpi_core_shift_r = 0x0807c01f); +PROVIDE(llext_copy_regions = 0x08072e45); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXINJECTION_MODE = 0x080500d9); PROVIDE(__aeabi_ldivmod = 0x08041111); -PROVIDE(z_ready_thread = 0x08078797); -PROVIDE(net_pkt_get_frag = 0x08052115); -PROVIDE(k_msgq_init = 0x0807807f); +PROVIDE(z_ready_thread = 0x0807f281); +PROVIDE(net_pkt_get_frag = 0x080525cd); +PROVIDE(k_msgq_init = 0x0807eb69); PROVIDE(__aeabi_dmul = 0x0804074d); -PROVIDE(strtoul = 0x080694b5); -PROVIDE(mbedtls_x509_crt_verify_restartable = 0x080775ab); -PROVIDE(HAL_ETH_WakeUpCallback = 0x08073cc1); -PROVIDE(hex2bin = 0x0806b0a1); -PROVIDE(socket = 0x0806d363); -PROVIDE(getopt_state_get = 0x08049761); -PROVIDE(k_fatal_halt = 0x08077e5f); -PROVIDE(z_log_msg_runtime_vcreate = 0x08044115); -PROVIDE(boot_banner = 0x08066ed9); -PROVIDE(mbedtls_asn1_get_tag = 0x08075139); -PROVIDE(close = 0x0806d2c7); -PROVIDE(USB_DeactivateEndpoint = 0x0805bea5); +PROVIDE(strtoul = 0x0806ec39); +PROVIDE(mbedtls_x509_crt_verify_restartable = 0x0807e095); +PROVIDE(HAL_ETH_WakeUpCallback = 0x0807a5f1); +PROVIDE(hex2bin = 0x080708db); +PROVIDE(socket = 0x08072b9d); +PROVIDE(getopt_state_get = 0x08049bf1); +PROVIDE(k_fatal_halt = 0x0807e949); +PROVIDE(z_log_msg_runtime_vcreate = 0x080445a5); +PROVIDE(boot_banner = 0x0806c65d); +PROVIDE(mbedtls_asn1_get_tag = 0x0807bc23); +PROVIDE(close = 0x08072b01); +PROVIDE(USB_DeactivateEndpoint = 0x08061629); PROVIDE(__aeabi_dcmpun = 0x08040c81); -PROVIDE(net_mgmt_add_event_callback = 0x08051891); -PROVIDE(z_arm_mpu_fault = 0x08048b79); -PROVIDE(z_impl_net_if_get_by_index = 0x08050935); -PROVIDE(z_shell_history_mode_exit = 0x0806cc4f); -PROVIDE(HAL_PCD_MspInit = 0x0807411b); -PROVIDE(mbedtls_mpi_get_bit = 0x08075bf9); -PROVIDE(mbedtls_sha1_free = 0x08076c8d); -PROVIDE(z_impl_k_uptime_ticks = 0x08078c87); -PROVIDE(mbedtls_ssl_conf_ciphersuites = 0x08077a8b); +PROVIDE(net_mgmt_add_event_callback = 0x08051d49); +PROVIDE(z_arm_mpu_fault = 0x08049009); +PROVIDE(z_impl_net_if_get_by_index = 0x08050dc5); +PROVIDE(z_shell_history_mode_exit = 0x08072489); +PROVIDE(HAL_PCD_MspInit = 0x0807aa4b); +PROVIDE(mbedtls_mpi_get_bit = 0x0807c6e3); +PROVIDE(mbedtls_sha1_free = 0x0807d777); +PROVIDE(z_impl_k_uptime_ticks = 0x0807f771); +PROVIDE(mbedtls_ssl_conf_ciphersuites = 0x0807e575); PROVIDE(__aeabi_dcmple = 0x08040c45); -PROVIDE(arch_icache_invd_range = 0x080490b1); -PROVIDE(mbedtls_sha512_init = 0x08076f6d); +PROVIDE(arch_icache_invd_range = 0x08049541); +PROVIDE(mbedtls_sha512_init = 0x0807da57); PROVIDE(__subsf3 = 0x08040de5); -PROVIDE(mbedtls_md_info_from_type = 0x0805daa5); -PROVIDE(net_if_ipv4_set_gw = 0x0806ec95); -PROVIDE(USB_ReadDevOutEPInterrupt = 0x08074f2f); -PROVIDE(usb_get_dev_data_by_cfg = 0x0806b829); -PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x08072979); -PROVIDE(getopt_init = 0x080495ed); -PROVIDE(dns_init_resolver = 0x08056421); -PROVIDE(mbedtls_ct_zeroize_if = 0x080767c1); -PROVIDE(z_impl_flash_copy = 0x0806ce91); -PROVIDE(mbedtls_mpi_core_check_zero_ct = 0x08075a01); -PROVIDE(__cxa_pure_virtual = 0x0806a85b); +PROVIDE(mbedtls_md_info_from_type = 0x08063229); +PROVIDE(net_if_ipv4_set_gw = 0x080744cf); +PROVIDE(USB_ReadDevOutEPInterrupt = 0x0807ba19); +PROVIDE(LL_TIM_OC_StructInit = 0x0807b51b); +PROVIDE(HAL_SDRAM_SendCommand = 0x0807b377); +PROVIDE(usb_get_dev_data_by_cfg = 0x08071063); +PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x080787af); +PROVIDE(getopt_init = 0x08049a7d); +PROVIDE(dns_init_resolver = 0x080568d9); +PROVIDE(mbedtls_ct_zeroize_if = 0x0807d2ab); +PROVIDE(z_impl_flash_copy = 0x080726cb); +PROVIDE(mbedtls_mpi_core_check_zero_ct = 0x0807c4eb); +PROVIDE(__cxa_pure_virtual = 0x0806ffdf); PROVIDE(__gesf2 = 0x08040ff9); -PROVIDE(mbedtls_ssl_decrypt_buf = 0x08064189); -PROVIDE(mbedtls_rsa_pkcs1_decrypt = 0x0805ffcd); -PROVIDE(z_arm_debug_monitor = 0x08048b79); -PROVIDE(z_impl_device_init = 0x08077e9b); -PROVIDE(net_tcp_send_data = 0x080712c5); -PROVIDE(mbedtls_ssl_conf_rng = 0x08077a79); -PROVIDE(net_if_ipv4_get_mcast_ttl = 0x0806ed5f); -PROVIDE(mbedtls_x509_get_subject_alt_name_ext = 0x08062e55); -PROVIDE(regulator_disable = 0x08072ea9); -PROVIDE(putchar_unlocked = 0x080692d5); -PROVIDE(mbedtls_ssl_prepare_handshake_record = 0x08064529); -PROVIDE(mbedtls_x509_crt_parse_der_nocopy = 0x08077637); -PROVIDE(z_thread_entry = 0x0804381d); -PROVIDE(k_mem_slab_alloc = 0x08067385); -PROVIDE(arch_printk_char_out = 0x0806afaf); -PROVIDE(k_aligned_alloc = 0x080690a9); -PROVIDE(z_shell_wildcard_process = 0x08047d9d); +PROVIDE(mbedtls_ssl_decrypt_buf = 0x0806990d); +PROVIDE(mbedtls_rsa_pkcs1_decrypt = 0x08065751); +PROVIDE(z_arm_debug_monitor = 0x08049009); +PROVIDE(z_impl_device_init = 0x0807e985); +PROVIDE(net_tcp_send_data = 0x08076aff); +PROVIDE(mbedtls_ssl_conf_rng = 0x0807e563); +PROVIDE(net_if_ipv4_get_mcast_ttl = 0x08074599); +PROVIDE(stm32_dma_is_unexpected_irq_happened = 0x08058d61); +PROVIDE(dma_stm32_is_te_active = 0x08058c4d); +PROVIDE(mbedtls_x509_get_subject_alt_name_ext = 0x080685d9); +PROVIDE(regulator_disable = 0x08078e45); +PROVIDE(putchar_unlocked = 0x0806ea59); +PROVIDE(stm32_dma_disable_fifo_irq = 0x08058e35); +PROVIDE(mbedtls_ssl_prepare_handshake_record = 0x08069cad); +PROVIDE(mbedtls_x509_crt_parse_der_nocopy = 0x0807e121); +PROVIDE(z_thread_entry = 0x08043cad); +PROVIDE(k_mem_slab_alloc = 0x0806cb09); +PROVIDE(arch_printk_char_out = 0x080707e9); +PROVIDE(k_aligned_alloc = 0x0806e82d); +PROVIDE(z_shell_wildcard_process = 0x0804822d); PROVIDE(__unorddf2 = 0x08040c81); -PROVIDE(sys_heap_aligned_alloc = 0x0806ac23); -PROVIDE(sin = 0x08042399); -PROVIDE(__wrap_calloc = 0x08049595); -PROVIDE(zvfs_eventfd_write = 0x08049fed); -PROVIDE(z_shell_print_prompt_and_cmd = 0x08047919); -PROVIDE(net_buf_simple_reserve = 0x0806d40b); -PROVIDE(net_arp_clear_cache = 0x08050591); -PROVIDE(net_dhcpv4_accept_unicast = 0x08071af5); -PROVIDE(z_impl_k_sem_give = 0x0806778d); -PROVIDE(mbedtls_x509_crt_check_key_usage = 0x08062f5d); -PROVIDE(z_impl_k_queue_cancel_wait = 0x08078335); -PROVIDE(k_work_delayable_busy_get = 0x08078679); -PROVIDE(arm_core_mpu_disable = 0x08049219); -PROVIDE(mbedtls_sha256 = 0x08076f1f); -PROVIDE(ztls_setsockopt_ctx = 0x0804e87d); -PROVIDE(usb_set_config = 0x08044df5); -PROVIDE(z_impl_k_condvar_broadcast = 0x08067d05); -PROVIDE(calc_chksum = 0x0806f0cb); -PROVIDE(z_impl_k_condvar_wait = 0x08067d75); -PROVIDE(z_impl_k_mutex_unlock = 0x08067689); -PROVIDE(net_pkt_alloc_buffer_with_reserve = 0x08052209); -PROVIDE(__fpclassifyd = 0x0806a7a1); -PROVIDE(enabled_clock = 0x08072131); -PROVIDE(z_impl_k_msgq_alloc_init = 0x080780a7); -PROVIDE(USB_ReadDevAllInEpInterrupt = 0x08074f1f); -PROVIDE(mbedtls_mpi_exp_mod = 0x08076371); -PROVIDE(timeutil_timegm = 0x08043c25); +PROVIDE(dma_stm32_stop = 0x08058555); +PROVIDE(sys_heap_aligned_alloc = 0x080703a7); +PROVIDE(sin = 0x080426d1); +PROVIDE(__wrap_calloc = 0x08049a25); +PROVIDE(zvfs_eventfd_write = 0x0804a47d); +PROVIDE(z_shell_print_prompt_and_cmd = 0x08047da9); +PROVIDE(net_buf_simple_reserve = 0x08072c45); +PROVIDE(net_arp_clear_cache = 0x08050a21); +PROVIDE(net_dhcpv4_accept_unicast = 0x0807732f); +PROVIDE(z_impl_k_sem_give = 0x0806cf11); +PROVIDE(mbedtls_x509_crt_check_key_usage = 0x080686e1); +PROVIDE(z_impl_k_queue_cancel_wait = 0x0807ee1f); +PROVIDE(k_work_delayable_busy_get = 0x0807f163); +PROVIDE(arm_core_mpu_disable = 0x080496a9); +PROVIDE(mbedtls_sha256 = 0x0807da09); +PROVIDE(ztls_setsockopt_ctx = 0x0804ed0d); +PROVIDE(usb_set_config = 0x08045285); +PROVIDE(video_buffer_alloc = 0x08079e2f); +PROVIDE(z_impl_k_condvar_broadcast = 0x0806d489); +PROVIDE(calc_chksum = 0x08074905); +PROVIDE(z_impl_k_condvar_wait = 0x0806d4f9); +PROVIDE(z_impl_k_mutex_unlock = 0x0806ce0d); +PROVIDE(net_pkt_alloc_buffer_with_reserve = 0x080526c1); +PROVIDE(__fpclassifyd = 0x0806ff25); +PROVIDE(enabled_clock = 0x08077ad7); +PROVIDE(z_impl_k_msgq_alloc_init = 0x0807eb91); +PROVIDE(USB_ReadDevAllInEpInterrupt = 0x0807ba09); +PROVIDE(mbedtls_mpi_exp_mod = 0x0807ce5b); +PROVIDE(timeutil_timegm = 0x080440b5); PROVIDE(__muldf3 = 0x0804074d); -PROVIDE(mbedtls_mpi_add_mpi = 0x08075f89); -PROVIDE(mbedtls_ssl_handle_message_type = 0x0806455d); -PROVIDE(k_stack_init = 0x0807843f); -PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x08072973); -PROVIDE(mbedtls_ssl_ciphersuite_from_id = 0x08063ccd); -PROVIDE(net_arp_init = 0x08050689); +PROVIDE(mbedtls_mpi_add_mpi = 0x0807ca73); +PROVIDE(mbedtls_ssl_handle_message_type = 0x08069ce1); +PROVIDE(k_stack_init = 0x0807ef29); +PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x080787a9); +PROVIDE(HAL_DCMI_FrameEventCallback = 0x0805de2d); +PROVIDE(mbedtls_ssl_ciphersuite_from_id = 0x08069451); +PROVIDE(net_arp_init = 0x08050b19); PROVIDE(__aeabi_cfrcmple = 0x08041069); -PROVIDE(z_impl_device_deinit = 0x08077dff); -PROVIDE(ztls_accept_ctx = 0x0804e43d); -PROVIDE(HAL_ETH_Init = 0x0805b019); -PROVIDE(cbpprintf_external = 0x0806af03); -PROVIDE(z_impl_log_buffered_cnt = 0x08043ea5); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QAV_PARAM = 0x0804fc49); -PROVIDE(mbedtls_ssl_read_version = 0x080777d3); -PROVIDE(mbedtls_rsa_rsassa_pss_sign = 0x08060009); -PROVIDE(USB_ActivateEndpoint = 0x08074c47); -PROVIDE(mbedtls_ssl_parse_finished = 0x080669e1); -PROVIDE(net_if_set_link_addr_locked = 0x0806ead7); -PROVIDE(z_shell_cmd_line_erase = 0x0806c625); -PROVIDE(net_byte_to_hex = 0x0806efc3); -PROVIDE(shell_hexdump_line = 0x080472d1); -PROVIDE(k_work_submit_to_queue = 0x08078633); -PROVIDE(_isr_wrapper = 0x08048f51); -PROVIDE(mbedtls_ssl_fetch_input = 0x080644a9); -PROVIDE(z_impl_k_wakeup = 0x08068629); +PROVIDE(z_impl_device_deinit = 0x0807e8e9); +PROVIDE(ztls_accept_ctx = 0x0804e8cd); +PROVIDE(HAL_ETH_Init = 0x08060085); +PROVIDE(LL_RCC_GetSystemClocksFreq = 0x08060fd1); +PROVIDE(cbpprintf_external = 0x0807073d); +PROVIDE(z_impl_log_buffered_cnt = 0x08044335); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QAV_PARAM = 0x080500d9); +PROVIDE(mbedtls_ssl_read_version = 0x0807e2bd); +PROVIDE(mbedtls_rsa_rsassa_pss_sign = 0x0806578d); +PROVIDE(USB_ActivateEndpoint = 0x0807b731); +PROVIDE(mbedtls_ssl_parse_finished = 0x0806c165); +PROVIDE(net_if_set_link_addr_locked = 0x08074311); +PROVIDE(z_shell_cmd_line_erase = 0x08071e5f); +PROVIDE(net_byte_to_hex = 0x080747fd); +PROVIDE(shell_hexdump_line = 0x08047761); +PROVIDE(k_work_submit_to_queue = 0x0807f11d); +PROVIDE(_isr_wrapper = 0x080493e1); +PROVIDE(mbedtls_ssl_fetch_input = 0x08069c2d); +PROVIDE(video_buffer_aligned_alloc = 0x0805d2d1); +PROVIDE(HAL_DMA_Abort = 0x0805ec99); +PROVIDE(z_impl_k_wakeup = 0x0806ddad); PROVIDE(__divsi3 = 0x080403a5); -PROVIDE(flash_area_open = 0x08044625); -PROVIDE(k_work_queue_start = 0x08067b75); -PROVIDE(z_shell_op_left_arrow = 0x0806c5e1); -PROVIDE(mbedtls_x509_parse_subject_alt_name = 0x08062c7d); -PROVIDE(net_tcp_update_recv_wnd = 0x080715cf); -PROVIDE(z_log_vprintk = 0x0806b541); -PROVIDE(net_if_carrier_on = 0x0806ef3b); -PROVIDE(__aeabi_d2lz = 0x08041215); -PROVIDE(HAL_PCD_SetupStageCallback = 0x08057071); -PROVIDE(mbedtls_pem_init = 0x080772a7); -PROVIDE(k_poll_event_init = 0x08078f63); -PROVIDE(z_arm_fatal_error = 0x08047f41); -PROVIDE(z_impl_net_socket_service_register = 0x0804ea6d); -PROVIDE(net_pkt_get_current_offset = 0x08070415); -PROVIDE(net_pkt_available_payload_buffer = 0x0807012f); -PROVIDE(z_arm_hard_fault = 0x08048b79); -PROVIDE(z_impl_llext_get_fn_table = 0x0804bc8d); -PROVIDE(z_impl_k_msgq_peek_at = 0x0807811f); -PROVIDE(HAL_ETH_TxFreeCallback = 0x08057e8d); -PROVIDE(z_shell_log_backend_output_func = 0x0806c95d); -PROVIDE(z_pend_curr = 0x08068281); -PROVIDE(usb_dc_ep_configure = 0x0807205b); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXTIME_PARAM = 0x0804fec1); -PROVIDE(mbedtls_x509_crt_parse = 0x08063bbd); -PROVIDE(net_pkt_append_buffer = 0x080701e3); -PROVIDE(net_eth_carrier_on = 0x0806e1ff); -PROVIDE(k_work_busy_get = 0x080785ef); -PROVIDE(log_output_timestamp_freq_set = 0x080445ed); -PROVIDE(mbedtls_ssl_get_ciphersuite = 0x08077abf); -PROVIDE(fputc = 0x08079677); -PROVIDE(__fpclassifyl = 0x0806a7a1); -PROVIDE(mbedtls_ssl_parse_change_cipher_spec = 0x0806497d); -PROVIDE(cbvprintf = 0x0804943d); -PROVIDE(z_impl_k_is_preempt_thread = 0x08067dc1); -PROVIDE(net_if_set_name = 0x08051135); -PROVIDE(mbedtls_ssl_get_ciphersuite_name = 0x08063d29); -PROVIDE(net_udp_create = 0x08071849); -PROVIDE(z_impl_k_queue_peek_tail = 0x08078417); -PROVIDE(z_impl_k_thread_suspend = 0x08068191); -PROVIDE(net_if_ipv4_maddr_join = 0x0806ed0f); -PROVIDE(regulator_common_data_init = 0x08072e99); -PROVIDE(z_impl_k_thread_join = 0x080687c1); -PROVIDE(z_log_dropped = 0x08043eb1); -PROVIDE(net_pkt_alloc_with_buffer = 0x0805236d); -PROVIDE(mbedtls_ssl_list_ciphersuites = 0x08063ce5); -PROVIDE(mbedtls_rsa_complete = 0x0805f279); -PROVIDE(net_calc_chksum = 0x0806f1c9); -PROVIDE(jesd216_bfp_decode_dw16 = 0x0805846d); -PROVIDE(z_impl_sys_rand_get = 0x0804a8e1); -PROVIDE(_OffsetAbsSyms = 0x0806a819); -PROVIDE(mbedtls_rsa_rsassa_pkcs1_v15_verify = 0x080602a1); -PROVIDE(shell_strtoul = 0x0804752d); -PROVIDE(HAL_PCD_IRQHandler = 0x0805b2ed); -PROVIDE(usb_transfer_is_busy = 0x0806b885); -PROVIDE(arch_dcache_flush_range = 0x08049025); -PROVIDE(mbedtls_ssl_set_hostname = 0x08065d9d); -PROVIDE(HAL_PCD_ISOOUTIncompleteCallback = 0x080742ad); -PROVIDE(mbedtls_mpi_core_get_mont_r2_unsafe = 0x080758f5); -PROVIDE(net_icmp_init_ctx = 0x080524b9); -PROVIDE(mbedtls_ssl_md_alg_from_hash = 0x08066235); -PROVIDE(jesd216_bfp_decode_dw15 = 0x080724c3); -PROVIDE(k_heap_init = 0x08077ebb); -PROVIDE(mbedtls_rsa_pkcs1_sign = 0x080600f9); -PROVIDE(mbedtls_sha256_init = 0x08076de5); -PROVIDE(mbedtls_pk_info_from_type = 0x08062555); -PROVIDE(isdigit = 0x080790bb); +PROVIDE(flash_area_open = 0x08044ab5); +PROVIDE(k_work_queue_start = 0x0806d2f9); +PROVIDE(z_shell_op_left_arrow = 0x08071e1b); +PROVIDE(mbedtls_x509_parse_subject_alt_name = 0x08068401); +PROVIDE(net_tcp_update_recv_wnd = 0x08076e09); +PROVIDE(z_log_vprintk = 0x08070d7b); +PROVIDE(net_if_carrier_on = 0x08074775); +PROVIDE(__aeabi_d2lz = 0x0804123b); +PROVIDE(HAL_PCD_SetupStageCallback = 0x08057529); +PROVIDE(mbedtls_pem_init = 0x0807dd91); +PROVIDE(k_poll_event_init = 0x0807fa4d); +PROVIDE(z_arm_fatal_error = 0x080483d1); +PROVIDE(z_impl_net_socket_service_register = 0x0804eefd); +PROVIDE(net_pkt_get_current_offset = 0x08075c4f); +PROVIDE(net_pkt_available_payload_buffer = 0x08075969); +PROVIDE(z_arm_hard_fault = 0x08049009); +PROVIDE(z_impl_llext_get_fn_table = 0x0804c11d); +PROVIDE(z_impl_k_msgq_peek_at = 0x0807ec09); +PROVIDE(HAL_ETH_TxFreeCallback = 0x08059b19); +PROVIDE(z_shell_log_backend_output_func = 0x08072197); +PROVIDE(z_pend_curr = 0x0806da05); +PROVIDE(usb_dc_ep_configure = 0x08077895); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXTIME_PARAM = 0x08050351); +PROVIDE(mbedtls_x509_crt_parse = 0x08069341); +PROVIDE(net_pkt_append_buffer = 0x08075a1d); +PROVIDE(net_eth_carrier_on = 0x08073a39); +PROVIDE(k_work_busy_get = 0x0807f0d9); +PROVIDE(log_output_timestamp_freq_set = 0x08044a7d); +PROVIDE(mbedtls_ssl_get_ciphersuite = 0x0807e5a9); +PROVIDE(fputc = 0x08080161); +PROVIDE(__fpclassifyl = 0x0806ff25); +PROVIDE(mbedtls_ssl_parse_change_cipher_spec = 0x0806a101); +PROVIDE(cbvprintf = 0x080498cd); +PROVIDE(z_impl_k_is_preempt_thread = 0x0806d545); +PROVIDE(net_if_set_name = 0x080515ed); +PROVIDE(mbedtls_ssl_get_ciphersuite_name = 0x080694ad); +PROVIDE(net_udp_create = 0x08077083); +PROVIDE(z_impl_k_queue_peek_tail = 0x0807ef01); +PROVIDE(z_impl_k_thread_suspend = 0x0806d915); +PROVIDE(net_if_ipv4_maddr_join = 0x08074549); +PROVIDE(regulator_common_data_init = 0x08078e35); +PROVIDE(z_impl_k_thread_join = 0x0806df45); +PROVIDE(stm32_dma_get_pburst = 0x08058ead); +PROVIDE(z_log_dropped = 0x08044341); +PROVIDE(net_pkt_alloc_with_buffer = 0x08052825); +PROVIDE(HAL_DCMI_IRQHandler = 0x0805e2c1); +PROVIDE(mbedtls_ssl_list_ciphersuites = 0x08069469); +PROVIDE(mbedtls_rsa_complete = 0x080649fd); +PROVIDE(net_calc_chksum = 0x08074a03); +PROVIDE(jesd216_bfp_decode_dw16 = 0x0805a0f9); +PROVIDE(z_impl_sys_rand_get = 0x0804ad71); +PROVIDE(_OffsetAbsSyms = 0x0806ff9d); +PROVIDE(dmamux_stm32_stop = 0x08059039); +PROVIDE(mbedtls_rsa_rsassa_pkcs1_v15_verify = 0x08065a25); +PROVIDE(shell_strtoul = 0x080479bd); +PROVIDE(HAL_PCD_IRQHandler = 0x08060359); +PROVIDE(usb_transfer_is_busy = 0x080710bf); +PROVIDE(dma_stm32_is_ht_active = 0x08058bf9); +PROVIDE(arch_dcache_flush_range = 0x080494b5); +PROVIDE(mbedtls_ssl_set_hostname = 0x0806b521); +PROVIDE(HAL_PCD_ISOOUTIncompleteCallback = 0x0807abdd); +PROVIDE(mbedtls_mpi_core_get_mont_r2_unsafe = 0x0807c3df); +PROVIDE(dma_stm32_id_to_stream = 0x08058bd5); +PROVIDE(net_icmp_init_ctx = 0x08052971); +PROVIDE(mbedtls_ssl_md_alg_from_hash = 0x0806b9b9); +PROVIDE(jesd216_bfp_decode_dw15 = 0x080782d5); +PROVIDE(k_heap_init = 0x0807e9a5); +PROVIDE(mbedtls_rsa_pkcs1_sign = 0x0806587d); +PROVIDE(mbedtls_sha256_init = 0x0807d8cf); +PROVIDE(mbedtls_pk_info_from_type = 0x08067cd9); +PROVIDE(isdigit = 0x0807fba5); PROVIDE(__aeabi_i2d = 0x08040679); -PROVIDE(k_sched_lock = 0x08068401); -PROVIDE(dns_resolve_reconfigure = 0x08056319); -PROVIDE(__aeabi_memmove8 = 0x0807903b); +PROVIDE(LL_DMA_Init = 0x08060d01); +PROVIDE(k_sched_lock = 0x0806db85); +PROVIDE(dns_resolve_reconfigure = 0x080567d1); +PROVIDE(__aeabi_memmove8 = 0x0807fb25); PROVIDE(__aeabi_i2f = 0x08040f51); -PROVIDE(sys_clock_tick_get = 0x08068d71); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_FILTER = 0x0804fc49); -PROVIDE(net_context_sendto = 0x0806fba5); -PROVIDE(stm32_gpio_intc_disable_line = 0x08072015); -PROVIDE(z_impl_zsock_socketpair = 0x0804f6ad); -PROVIDE(mbedtls_cipher_info_from_type = 0x0805d4f9); -PROVIDE(mbedtls_ssl_reset_in_out_pointers = 0x0807776d); -PROVIDE(sinl = 0x08042399); -PROVIDE(z_arm_reset = 0x08048b8d); +PROVIDE(sys_clock_tick_get = 0x0806e4f5); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_FILTER = 0x080500d9); +PROVIDE(net_context_sendto = 0x080753df); +PROVIDE(stm32_gpio_intc_disable_line = 0x0807784f); +PROVIDE(dmamux_stm32_reload = 0x08058fc1); +PROVIDE(z_impl_zsock_socketpair = 0x0804fb3d); +PROVIDE(mbedtls_cipher_info_from_type = 0x08062c7d); +PROVIDE(mbedtls_ssl_reset_in_out_pointers = 0x0807e257); +PROVIDE(sinl = 0x080426d1); +PROVIDE(z_arm_reset = 0x0804901d); PROVIDE(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT = 0x00000001); -PROVIDE(z_shell_has_wildcard = 0x0806cdbf); -PROVIDE(mbedtls_asn1_get_int = 0x080751fd); -PROVIDE(__aeabi_memmove4 = 0x0807903b); -PROVIDE(z_impl_zsock_setsockopt = 0x0804c771); -PROVIDE(mbedtls_ssl_handshake_client_step = 0x08064ba5); -PROVIDE(net_if_ipv4_maddr_lookup = 0x08050ca1); -PROVIDE(mbedtls_mpi_sub_int = 0x08075fc7); -PROVIDE(HAL_PCD_EP_SetStall = 0x08074423); -PROVIDE(net_mgmt_del_event_callback = 0x080518d9); -PROVIDE(putc_unlocked = 0x08079677); -PROVIDE(shell_set_bypass = 0x0806bfdd); -PROVIDE(HAL_PCD_EP_ClrStall = 0x08074491); -PROVIDE(net_ipv4_create_full = 0x080709af); -PROVIDE(z_impl_device_is_ready = 0x08077de9); -PROVIDE(mbedtls_mpi_fill_random = 0x0807648f); -PROVIDE(zvfs_get_fd_obj_and_vtable = 0x08043995); -PROVIDE(mbedtls_x509_get_time = 0x08062a19); -PROVIDE(cbprintf_package_convert = 0x08043491); -PROVIDE(net_pkt_init = 0x080705d3); -PROVIDE(setsockopt = 0x0806d355); -PROVIDE(z_impl_flash_fill = 0x08047e81); -PROVIDE(net_context_accept = 0x0806fa87); -PROVIDE(HAL_QSPI_Receive = 0x0807485b); -PROVIDE(HAL_GetCurrentCPUID = 0x0805ab79); -PROVIDE(HAL_QSPI_TimeOutCallback = 0x0807274b); -PROVIDE(z_impl_zsock_listen = 0x0804c435); -PROVIDE(clock_settime = 0x080415c9); -PROVIDE(HAL_PCD_DeInit = 0x080741f9); -PROVIDE(z_log_msg_finalize = 0x0806b5ed); -PROVIDE(mbedtls_ssl_finish_handshake_msg = 0x08077731); -PROVIDE(z_shell_write = 0x0806c65b); -PROVIDE(fs_open = 0x0804a4c5); -PROVIDE(soc_early_init_hook = 0x08043cc5); -PROVIDE(zsock_getpeername_ctx = 0x0804d991); -PROVIDE(__kernel_cos = 0x080424d1); -PROVIDE(mbedtls_md_free = 0x080767f7); -PROVIDE(z_shell_vt100_color_set = 0x08047675); -PROVIDE(net_tcp_get_supported_mss = 0x080712df); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBU_PARAM = 0x0804fc49); -PROVIDE(shell_prompt_change = 0x0806bf3b); -PROVIDE(z_arm_mpu_stack_guard_and_fpu_adjust = 0x08048e09); -PROVIDE(z_impl_k_thread_stack_alloc = 0x08079015); -PROVIDE(net_tcp_tx_sem_get = 0x0807183d); -PROVIDE(HAL_PCD_Stop = 0x08074263); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_T1S_PARAM = 0x0804fc49); -PROVIDE(isalnum = 0x0807907f); -PROVIDE(z_arm_bus_fault = 0x08048b79); -PROVIDE(USB_EPStopXfer = 0x08074cc5); -PROVIDE(dns_unpack_answer = 0x08071ba9); -PROVIDE(HAL_QSPI_Transmit_IT = 0x0807491d); -PROVIDE(mbedtls_pk_get_type = 0x0807736f); -PROVIDE(credentials_unlock = 0x0804f871); -PROVIDE(net_pkt_alloc_buffer_raw = 0x080521a9); -PROVIDE(HAL_QSPI_Receive_IT = 0x0807498d); -PROVIDE(HAL_PCD_EP_GetRxCount = 0x080743df); -PROVIDE(mbedtls_ssl_get_mode_from_ciphersuite = 0x08077aa9); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_PROMISC_MODE = 0x0804fc49); -PROVIDE(log_output_process = 0x0804430d); -PROVIDE(net_pkt_update_length = 0x0807038f); -PROVIDE(k_work_queue_init = 0x08078653); -PROVIDE(HAL_GetTick = 0x0806b4df); -PROVIDE(mbedtls_md = 0x0805dca9); -PROVIDE(z_arm_fault_init = 0x08048b61); -PROVIDE(HAL_PCD_EP_Abort = 0x080744fb); -PROVIDE(net_buf_simple_max_len = 0x0806d465); -PROVIDE(arch_elf_relocate = 0x080480fd); -PROVIDE(llext_link = 0x0804baa1); -PROVIDE(arm_core_mpu_configure_dynamic_mpu_regions = 0x08049241); -PROVIDE(z_impl_k_yield = 0x08068521); -PROVIDE(z_impl_hwinfo_get_device_id = 0x08059a9d); +PROVIDE(z_shell_has_wildcard = 0x080725f9); +PROVIDE(mbedtls_asn1_get_int = 0x0807bce7); +PROVIDE(__aeabi_memmove4 = 0x0807fb25); +PROVIDE(z_impl_zsock_setsockopt = 0x0804cc01); +PROVIDE(mbedtls_ssl_handshake_client_step = 0x0806a329); +PROVIDE(net_if_ipv4_maddr_lookup = 0x08051159); +PROVIDE(mbedtls_mpi_sub_int = 0x0807cab1); +PROVIDE(HAL_PCD_EP_SetStall = 0x0807ad53); +PROVIDE(net_mgmt_del_event_callback = 0x08051d91); +PROVIDE(putc_unlocked = 0x08080161); +PROVIDE(shell_set_bypass = 0x08071817); +PROVIDE(HAL_PCD_EP_ClrStall = 0x0807adc1); +PROVIDE(net_ipv4_create_full = 0x080761e9); +PROVIDE(z_impl_device_is_ready = 0x0807e8d3); +PROVIDE(mbedtls_mpi_fill_random = 0x0807cf79); +PROVIDE(zvfs_get_fd_obj_and_vtable = 0x08043e25); +PROVIDE(mbedtls_x509_get_time = 0x0806819d); +PROVIDE(cbprintf_package_convert = 0x08043921); +PROVIDE(net_pkt_init = 0x08075e0d); +PROVIDE(setsockopt = 0x08072b8f); +PROVIDE(z_impl_flash_fill = 0x08048311); +PROVIDE(net_context_accept = 0x080752c1); +PROVIDE(HAL_QSPI_Receive = 0x0807b18b); +PROVIDE(HAL_GetCurrentCPUID = 0x0805e041); +PROVIDE(HAL_QSPI_TimeOutCallback = 0x0807855d); +PROVIDE(z_impl_zsock_listen = 0x0804c8c5); +PROVIDE(clock_settime = 0x080415f1); +PROVIDE(HAL_PCD_DeInit = 0x0807ab29); +PROVIDE(HAL_DMA_IRQHandler = 0x0805f1e5); +PROVIDE(z_log_msg_finalize = 0x08070e27); +PROVIDE(mbedtls_ssl_finish_handshake_msg = 0x0807e21b); +PROVIDE(z_shell_write = 0x08071e95); +PROVIDE(fs_open = 0x0804a955); +PROVIDE(soc_early_init_hook = 0x08044155); +PROVIDE(zsock_getpeername_ctx = 0x0804de21); +PROVIDE(__kernel_cos = 0x08042809); +PROVIDE(mbedtls_md_free = 0x0807d2e1); +PROVIDE(z_shell_vt100_color_set = 0x08047b05); +PROVIDE(net_tcp_get_supported_mss = 0x08076b19); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBU_PARAM = 0x080500d9); +PROVIDE(dma_stm32_clear_te = 0x08058c29); +PROVIDE(shell_prompt_change = 0x08071775); +PROVIDE(z_arm_mpu_stack_guard_and_fpu_adjust = 0x08049299); +PROVIDE(z_impl_k_thread_stack_alloc = 0x0807faff); +PROVIDE(net_tcp_tx_sem_get = 0x08077077); +PROVIDE(HAL_PCD_Stop = 0x0807ab93); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_T1S_PARAM = 0x080500d9); +PROVIDE(isalnum = 0x0807fb69); +PROVIDE(z_arm_bus_fault = 0x08049009); +PROVIDE(USB_EPStopXfer = 0x0807b7af); +PROVIDE(dns_unpack_answer = 0x080773e3); +PROVIDE(HAL_QSPI_Transmit_IT = 0x0807b24d); +PROVIDE(mbedtls_pk_get_type = 0x0807de59); +PROVIDE(credentials_unlock = 0x0804fd01); +PROVIDE(net_pkt_alloc_buffer_raw = 0x08052661); +PROVIDE(HAL_QSPI_Receive_IT = 0x0807b2bd); +PROVIDE(HAL_PCD_EP_GetRxCount = 0x0807ad0f); +PROVIDE(mbedtls_ssl_get_mode_from_ciphersuite = 0x0807e593); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_PROMISC_MODE = 0x080500d9); +PROVIDE(log_output_process = 0x0804479d); +PROVIDE(HAL_DMA_Start_IT = 0x0805ea3d); +PROVIDE(net_pkt_update_length = 0x08075bc9); +PROVIDE(k_work_queue_init = 0x0807f13d); +PROVIDE(HAL_GetTick = 0x08070d19); +PROVIDE(mbedtls_md = 0x0806342d); +PROVIDE(z_arm_fault_init = 0x08048ff1); +PROVIDE(HAL_PCD_EP_Abort = 0x0807ae2b); +PROVIDE(net_buf_simple_max_len = 0x08072c9f); +PROVIDE(arch_elf_relocate = 0x0804858d); +PROVIDE(llext_link = 0x0804bf31); +PROVIDE(arm_core_mpu_configure_dynamic_mpu_regions = 0x080496d1); +PROVIDE(dma_stm32_clear_ht = 0x08058be1); +PROVIDE(z_impl_k_yield = 0x0806dca5); +PROVIDE(z_impl_hwinfo_get_device_id = 0x0805b729); PROVIDE(__unordsf2 = 0x080410e5); -PROVIDE(mbedtls_x509_crt_parse_der = 0x08077649); -PROVIDE(usb_dc_ep_read_wait = 0x08056e21); -PROVIDE(net_tcp_listen = 0x080712b5); -PROVIDE(USB_SetDevSpeed = 0x08074c23); -PROVIDE(z_impl_flash_get_page_info_by_idx = 0x08072581); -PROVIDE(__aeabi_memmove = 0x0807903b); -PROVIDE(z_shell_multiline_data_calc = 0x0806c07d); -PROVIDE(net_if_post_init = 0x08051301); -PROVIDE(k_thread_foreach_unlocked = 0x08068ac9); -PROVIDE(mbedtls_mpi_bitlen = 0x08075c3f); -PROVIDE(tolower = 0x08079127); -PROVIDE(HAL_PCD_Start = 0x08074223); -PROVIDE(net_arp_input = 0x0806e407); -PROVIDE(z_impl_sys_csrand_get = 0x0804a921); -PROVIDE(__double_computePow5 = 0x0806a5c1); -PROVIDE(cdc_acm_class_handle_req = 0x080455b5); -PROVIDE(mbedtls_rsa_import = 0x08076af7); -PROVIDE(HAL_MDMA_Abort_IT = 0x080740f5); -PROVIDE(mbedtls_mpi_core_fill_random = 0x08075929); -PROVIDE(net_context_is_reuseport_set = 0x0806f47d); -PROVIDE(z_log_get_tag = 0x0806b567); -PROVIDE(mbedtls_mpi_mul_mpi = 0x08075ff7); -PROVIDE(net_if_ipv4_maddr_add = 0x08050c39); -PROVIDE(mbedtls_mpi_free = 0x08075a5b); -PROVIDE(mbedtls_ssl_optimize_checksum = 0x08065d35); -PROVIDE(mbedtls_ssl_write_sig_alg_ext = 0x08066a8d); -PROVIDE(net_buf_simple_add_be16 = 0x0806d431); -PROVIDE(HAL_QSPI_Command = 0x0807474d); -PROVIDE(net_tcp_connect = 0x080546c1); -PROVIDE(mbedtls_mpi_core_sub_int = 0x080759df); -PROVIDE(net_if_ipv4_get_ll = 0x0806eba9); -PROVIDE(i2c_stm32_set_smbus_mode = 0x08059ddd); -PROVIDE(zsock_recvmsg_ctx = 0x0804d609); -PROVIDE(atof = 0x0807913f); -PROVIDE(isupper = 0x080790ff); -PROVIDE(z_impl_zsock_ioctl_impl = 0x0804c6b9); -PROVIDE(z_shell_op_char_insert = 0x080478a5); -PROVIDE(k_thread_state_str = 0x08067e01); -PROVIDE(net_pkt_read_be32 = 0x080702b3); -PROVIDE(z_impl_net_addr_pton = 0x080514f9); -PROVIDE(net_context_listen = 0x0806f63b); -PROVIDE(sendto = 0x0806d345); -PROVIDE(move_thread_to_end_of_prio_q = 0x08068101); -PROVIDE(mbedtls_mpi_core_mul = 0x080757fb); -PROVIDE(k_mem_slab_free = 0x08077fd3); -PROVIDE(__udivmoddi4 = 0x08041245); +PROVIDE(mbedtls_x509_crt_parse_der = 0x0807e133); +PROVIDE(usb_dc_ep_read_wait = 0x080572d9); +PROVIDE(net_tcp_listen = 0x08076aef); +PROVIDE(USB_SetDevSpeed = 0x0807b70d); +PROVIDE(z_impl_flash_get_page_info_by_idx = 0x08078393); +PROVIDE(__aeabi_memmove = 0x0807fb25); +PROVIDE(z_shell_multiline_data_calc = 0x080718b7); +PROVIDE(shared_multi_heap_add = 0x08043475); +PROVIDE(net_if_post_init = 0x080517b9); +PROVIDE(dma_stm32_clear_tc = 0x08058bed); +PROVIDE(k_thread_foreach_unlocked = 0x0806e24d); +PROVIDE(mbedtls_mpi_bitlen = 0x0807c729); +PROVIDE(tolower = 0x0807fc11); +PROVIDE(HAL_PCD_Start = 0x0807ab53); +PROVIDE(net_arp_input = 0x08073c41); +PROVIDE(z_impl_sys_csrand_get = 0x0804adb1); +PROVIDE(__double_computePow5 = 0x0806fd45); +PROVIDE(cdc_acm_class_handle_req = 0x08045a45); +PROVIDE(mbedtls_rsa_import = 0x0807d5e1); +PROVIDE(HAL_MDMA_Abort_IT = 0x0807aa25); +PROVIDE(mbedtls_mpi_core_fill_random = 0x0807c413); +PROVIDE(net_context_is_reuseport_set = 0x08074cb7); +PROVIDE(z_log_get_tag = 0x08070da1); +PROVIDE(mbedtls_mpi_mul_mpi = 0x0807cae1); +PROVIDE(net_if_ipv4_maddr_add = 0x080510f1); +PROVIDE(mbedtls_mpi_free = 0x0807c545); +PROVIDE(mbedtls_ssl_optimize_checksum = 0x0806b4b9); +PROVIDE(mbedtls_ssl_write_sig_alg_ext = 0x0806c211); +PROVIDE(net_buf_simple_add_be16 = 0x08072c6b); +PROVIDE(HAL_QSPI_Command = 0x0807b07d); +PROVIDE(net_tcp_connect = 0x08054b79); +PROVIDE(mbedtls_mpi_core_sub_int = 0x0807c4c9); +PROVIDE(net_if_ipv4_get_ll = 0x080743e3); +PROVIDE(i2c_stm32_set_smbus_mode = 0x0805ba69); +PROVIDE(zsock_recvmsg_ctx = 0x0804da99); +PROVIDE(atof = 0x0807fc29); +PROVIDE(isupper = 0x0807fbe9); +PROVIDE(FMC_SDRAM_Timing_Init = 0x0807b40b); +PROVIDE(z_impl_zsock_ioctl_impl = 0x0804cb49); +PROVIDE(z_shell_op_char_insert = 0x08047d35); +PROVIDE(k_thread_state_str = 0x0806d585); +PROVIDE(net_pkt_read_be32 = 0x08075aed); +PROVIDE(z_impl_net_addr_pton = 0x080519b1); +PROVIDE(net_context_listen = 0x08074e75); +PROVIDE(sendto = 0x08072b7f); +PROVIDE(move_thread_to_end_of_prio_q = 0x0806d885); +PROVIDE(mbedtls_mpi_core_mul = 0x0807c2e5); +PROVIDE(k_mem_slab_free = 0x0807eabd); +PROVIDE(__udivmoddi4 = 0x0804126b); PROVIDE(__aeabi_fcmpge = 0x080410bd); -PROVIDE(i2c_stm32_get_config = 0x08059da1); -PROVIDE(HAL_ETH_GetDMAError = 0x080740e9); -PROVIDE(z_impl_zsock_shutdown = 0x0804c331); -PROVIDE(__ceil_log2pow5 = 0x0806a571); -PROVIDE(net_if_foreach = 0x08051015); -PROVIDE(getopt = 0x08049635); -PROVIDE(flash_stm32_page_layout = 0x080590a1); -PROVIDE(mbedtls_pem_read_buffer = 0x08061f6d); -PROVIDE(z_handle_obj_poll_events = 0x08078f81); -PROVIDE(mbedtls_mpi_core_mla = 0x08075687); -PROVIDE(mbedtls_rsa_rsaes_pkcs1_v15_decrypt = 0x0805fea1); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PORTS_NUM = 0x0804fec1); -PROVIDE(z_impl_k_thread_name_copy = 0x080786db); -PROVIDE(__wrap_free = 0x08049579); -PROVIDE(z_shell_cmd_get = 0x080474b9); +PROVIDE(i2c_stm32_get_config = 0x0805ba2d); +PROVIDE(HAL_ETH_GetDMAError = 0x0807aa19); +PROVIDE(z_impl_zsock_shutdown = 0x0804c7c1); +PROVIDE(__ceil_log2pow5 = 0x0806fcf5); +PROVIDE(net_if_foreach = 0x080514cd); +PROVIDE(getopt = 0x08049ac5); +PROVIDE(flash_stm32_page_layout = 0x0805ad2d); +PROVIDE(mbedtls_pem_read_buffer = 0x080676f1); +PROVIDE(z_handle_obj_poll_events = 0x0807fa6b); +PROVIDE(mbedtls_mpi_core_mla = 0x0807c171); +PROVIDE(mbedtls_rsa_rsaes_pkcs1_v15_decrypt = 0x08065625); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PORTS_NUM = 0x08050351); +PROVIDE(z_impl_k_thread_name_copy = 0x0807f1c5); +PROVIDE(__wrap_free = 0x08049a09); +PROVIDE(z_shell_cmd_get = 0x08047949); PROVIDE(__udivsi3 = 0x08040381); -PROVIDE(toupper = 0x08079133); -PROVIDE(mbedtls_mpi_core_bigendian_to_host = 0x08075461); -PROVIDE(net_pkt_is_contiguous = 0x08070547); -PROVIDE(arch_icache_enable = 0x08049055); -PROVIDE(__rem_pio2 = 0x08042119); -PROVIDE(shell_start = 0x0806bdcd); -PROVIDE(jesd216_bfp_read_support = 0x080723ed); -PROVIDE(llext_read_symbol = 0x0806d71d); -PROVIDE(llext_copy_strings = 0x0806d5e7); -PROVIDE(z_shell_find_cmd = 0x0806c297); -PROVIDE(z_impl___posix_clock_get_base = 0x08049919); -PROVIDE(regulator_common_init = 0x08072f8b); -PROVIDE(z_shell_op_cond_next_line = 0x0806c48d); -PROVIDE(mbedtls_md_hmac_finish = 0x0805de19); +PROVIDE(toupper = 0x0807fc1d); +PROVIDE(mbedtls_mpi_core_bigendian_to_host = 0x0807bf4b); +PROVIDE(net_pkt_is_contiguous = 0x08075d81); +PROVIDE(arch_icache_enable = 0x080494e5); +PROVIDE(__rem_pio2 = 0x08042451); +PROVIDE(shell_start = 0x08071607); +PROVIDE(jesd216_bfp_read_support = 0x080781ff); +PROVIDE(llext_read_symbol = 0x08072f57); +PROVIDE(llext_copy_strings = 0x08072e21); +PROVIDE(z_shell_find_cmd = 0x08071ad1); +PROVIDE(z_impl___posix_clock_get_base = 0x08049da9); +PROVIDE(regulator_common_init = 0x08078f27); +PROVIDE(z_shell_op_cond_next_line = 0x08071cc7); +PROVIDE(mbedtls_md_hmac_finish = 0x0806359d); PROVIDE(CONFIG_ARCH_HAS_TIMING_FUNCTIONS = 0x00000001); -PROVIDE(mbedtls_sha1_starts = 0x08060519); -PROVIDE(z_shell_op_char_backspace = 0x0806c807); +PROVIDE(mbedtls_sha1_starts = 0x08065c9d); +PROVIDE(z_shell_op_char_backspace = 0x08072041); PROVIDE(__subdf3 = 0x080403dd); -PROVIDE(z_impl_zsock_fcntl_impl = 0x0804c669); -PROVIDE(atoi = 0x08079145); -PROVIDE(dns_dispatcher_svc_handler = 0x0805561d); -PROVIDE(net_try_send_data = 0x0806e6c3); -PROVIDE(mbedtls_ssl_session_save = 0x08065e31); -PROVIDE(USB_EnableGlobalInt = 0x08074b27); +PROVIDE(z_impl_zsock_fcntl_impl = 0x0804caf9); +PROVIDE(atoi = 0x0807fc2f); +PROVIDE(dns_dispatcher_svc_handler = 0x08055ad5); +PROVIDE(net_try_send_data = 0x08073efd); +PROVIDE(mbedtls_ssl_session_save = 0x0806b5b5); +PROVIDE(USB_EnableGlobalInt = 0x0807b611); PROVIDE(__ledf2 = 0x08040b79); -PROVIDE(mbedtls_ssl_tls12_write_client_hello_exts = 0x08064b69); -PROVIDE(mbedtls_ssl_encrypt_buf = 0x08063fe1); -PROVIDE(k_work_cancel_delayable = 0x0807867d); +PROVIDE(mbedtls_ssl_tls12_write_client_hello_exts = 0x0806a2ed); +PROVIDE(mbedtls_ssl_encrypt_buf = 0x08069765); +PROVIDE(k_work_cancel_delayable = 0x0807f167); PROVIDE(__adddf3 = 0x080403e1); -PROVIDE(mbedtls_mpi_mod_mpi = 0x08076133); -PROVIDE(accept = 0x0806d305); -PROVIDE(mbedtls_rsa_rsassa_pss_verify_ext = 0x08060139); -PROVIDE(regulator_set_mode = 0x08072f4d); -PROVIDE(arch_float_disable = 0x08048e8d); -PROVIDE(net_if_ipv4_maddr_leave = 0x0806eceb); -PROVIDE(dns_dispatcher_init = 0x080558e5); +PROVIDE(mbedtls_mpi_mod_mpi = 0x0807cc1d); +PROVIDE(accept = 0x08072b3f); +PROVIDE(mbedtls_rsa_rsassa_pss_verify_ext = 0x080658bd); +PROVIDE(regulator_set_mode = 0x08078ee9); +PROVIDE(arch_float_disable = 0x0804931d); +PROVIDE(net_if_ipv4_maddr_leave = 0x08074525); +PROVIDE(dns_dispatcher_init = 0x08055d9d); PROVIDE(__divdf3 = 0x080409a1); -PROVIDE(mbedtls_rsa_deduce_crt = 0x08076a61); -PROVIDE(HAL_ETH_PMTCallback = 0x08073cbd); +PROVIDE(mbedtls_rsa_deduce_crt = 0x0807d54b); +PROVIDE(HAL_ETH_PMTCallback = 0x0807a5ed); PROVIDE(__aeabi_idiv = 0x080403a5); -PROVIDE(mbedtls_mpi_core_exp_mod_working_limbs = 0x08075987); -PROVIDE(mbedtls_mpi_exp_mod_unsafe = 0x08076383); -PROVIDE(dns_resolve_init = 0x08055cc9); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBV_PARAM = 0x0804fec1); +PROVIDE(mbedtls_mpi_core_exp_mod_working_limbs = 0x0807c471); +PROVIDE(mbedtls_mpi_exp_mod_unsafe = 0x0807ce6d); +PROVIDE(dns_resolve_init = 0x08056181); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBV_PARAM = 0x08050351); PROVIDE(memchr = 0x080402a1); -PROVIDE(mbedtls_ssl_session_init = 0x080779fb); -PROVIDE(zvfs_close = 0x08043aa5); -PROVIDE(net_pkt_pull = 0x080703af); +PROVIDE(mbedtls_ssl_session_init = 0x0807e4e5); +PROVIDE(zvfs_close = 0x08043f35); +PROVIDE(net_pkt_pull = 0x08075be9); PROVIDE(__aeabi_dcmplt = 0x08040c31); -PROVIDE(net_ipv4_finalize = 0x08070a83); -PROVIDE(z_impl_zsock_sendto = 0x0804c4e1); -PROVIDE(HAL_ETH_ReadData = 0x08073b53); -PROVIDE(mbedtls_sha256_clone = 0x08076df7); -PROVIDE(zvfs_poll_internal = 0x0804a01d); -PROVIDE(usb_dc_set_address = 0x08056a39); -PROVIDE(mbedtls_mpi_core_bitlen = 0x08075443); -PROVIDE(llext_bringup = 0x0806d5db); -PROVIDE(zsock_close_ctx = 0x0804cc95); -PROVIDE(mbedtls_ssl_hash_from_md_alg = 0x08066249); -PROVIDE(z_thread_abort = 0x0806867d); -PROVIDE(k_free = 0x08078fff); -PROVIDE(mbedtls_x509_get_ext = 0x08062bf5); -PROVIDE(__kernel_tan = 0x08042b59); -PROVIDE(usb_transfer = 0x08045355); -PROVIDE(z_unpend1_no_timeout = 0x08078819); -PROVIDE(z_impl_k_usleep = 0x080788cb); -PROVIDE(net_conn_input = 0x08052831); -PROVIDE(stm32_clock_control_init = 0x080572e9); +PROVIDE(net_ipv4_finalize = 0x080762bd); +PROVIDE(z_impl_zsock_sendto = 0x0804c971); +PROVIDE(HAL_ETH_ReadData = 0x0807a483); +PROVIDE(mbedtls_sha256_clone = 0x0807d8e1); +PROVIDE(zvfs_poll_internal = 0x0804a4ad); +PROVIDE(usb_dc_set_address = 0x08056ef1); +PROVIDE(stm32_dma_get_mburst = 0x08058e55); +PROVIDE(mbedtls_mpi_core_bitlen = 0x0807bf2d); +PROVIDE(llext_bringup = 0x08072e15); +PROVIDE(zsock_close_ctx = 0x0804d125); +PROVIDE(mbedtls_ssl_hash_from_md_alg = 0x0806b9cd); +PROVIDE(z_thread_abort = 0x0806de01); +PROVIDE(k_free = 0x0807fae9); +PROVIDE(mbedtls_x509_get_ext = 0x08068379); +PROVIDE(__kernel_tan = 0x08042e91); +PROVIDE(usb_transfer = 0x080457e5); +PROVIDE(z_unpend1_no_timeout = 0x0807f303); +PROVIDE(z_impl_k_usleep = 0x0807f3b5); +PROVIDE(net_conn_input = 0x08052ce9); +PROVIDE(stm32_clock_control_init = 0x08058179); PROVIDE(__aeabi_dcmpgt = 0x08040c6d); -PROVIDE(dns_copy_qname = 0x08071d47); -PROVIDE(z_impl_k_stack_push = 0x0807847b); -PROVIDE(k_work_reschedule = 0x08067cad); -PROVIDE(__log10Pow5 = 0x0806a559); -PROVIDE(z_getopt_global_state_update = 0x0804972d); -PROVIDE(HAL_PCD_DisconnectCallback = 0x08057035); -PROVIDE(arch_new_thread = 0x08048dd1); -PROVIDE(puts = 0x080692e1); -PROVIDE(z_impl_zsock_recvfrom = 0x0804c5a5); -PROVIDE(z_add_timeout = 0x08068bd5); -PROVIDE(z_impl_flash_get_page_info_by_offs = 0x08072579); -PROVIDE(z_impl_k_float_disable = 0x08078043); -PROVIDE(z_impl_k_pipe_read = 0x08068865); -PROVIDE(mbedtls_rsa_rsassa_pss_verify = 0x08060271); -PROVIDE(llext_free_inspection_data = 0x0804ae11); -PROVIDE(k_work_schedule = 0x08067c45); -PROVIDE(net_tcp_get_option = 0x080717ef); -PROVIDE(mbedtls_sha256_free = 0x08076ded); -PROVIDE(z_impl_z_zsock_getaddrinfo_internal = 0x0804c069); -PROVIDE(__log10Pow2 = 0x0806a54d); -PROVIDE(dns_resolve_name = 0x08071ff5); -PROVIDE(mbedtls_asn1_traverse_sequence_of = 0x0807526f); -PROVIDE(k_thread_system_pool_assign = 0x080690b9); -PROVIDE(shell_fprintf_error = 0x0806bf1f); -PROVIDE(ldexp = 0x08042d91); -PROVIDE(mbedtls_sha256_starts = 0x080613f5); -PROVIDE(mbedtls_sha1_finish = 0x08076d13); -PROVIDE(arch_icache_disable = 0x08049089); -PROVIDE(isspace = 0x080790eb); -PROVIDE(mbedtls_sha1 = 0x08076da5); -PROVIDE(mbedtls_mpi_cmp_abs = 0x08075cd7); -PROVIDE(z_impl_k_condvar_signal = 0x08067cb9); -PROVIDE(mbedtls_asn1_get_alg = 0x08075337); -PROVIDE(net_if_call_link_cb = 0x08050ef5); +PROVIDE(dns_copy_qname = 0x08077581); +PROVIDE(z_impl_k_stack_push = 0x0807ef65); +PROVIDE(k_work_reschedule = 0x0806d431); +PROVIDE(__log10Pow5 = 0x0806fcdd); +PROVIDE(z_getopt_global_state_update = 0x08049bbd); +PROVIDE(HAL_PCD_DisconnectCallback = 0x080574ed); +PROVIDE(arch_new_thread = 0x08049261); +PROVIDE(puts = 0x0806ea65); +PROVIDE(z_impl_zsock_recvfrom = 0x0804ca35); +PROVIDE(z_add_timeout = 0x0806e359); +PROVIDE(HAL_DCMI_Stop = 0x0805e1e1); +PROVIDE(z_impl_flash_get_page_info_by_offs = 0x0807838b); +PROVIDE(z_impl_k_float_disable = 0x0807eb2d); +PROVIDE(z_impl_k_pipe_read = 0x0806dfe9); +PROVIDE(mbedtls_rsa_rsassa_pss_verify = 0x080659f5); +PROVIDE(llext_free_inspection_data = 0x0804b2a1); +PROVIDE(k_work_schedule = 0x0806d3c9); +PROVIDE(net_tcp_get_option = 0x08077029); +PROVIDE(mbedtls_sha256_free = 0x0807d8d7); +PROVIDE(z_impl_z_zsock_getaddrinfo_internal = 0x0804c4f9); +PROVIDE(__log10Pow2 = 0x0806fcd1); +PROVIDE(dns_resolve_name = 0x0807782f); +PROVIDE(mbedtls_asn1_traverse_sequence_of = 0x0807bd59); +PROVIDE(k_thread_system_pool_assign = 0x0806e83d); +PROVIDE(shell_fprintf_error = 0x08071759); +PROVIDE(ldexp = 0x080430c9); +PROVIDE(mbedtls_sha256_starts = 0x08066b79); +PROVIDE(mbedtls_sha1_finish = 0x0807d7fd); +PROVIDE(arch_icache_disable = 0x08049519); +PROVIDE(isspace = 0x0807fbd5); +PROVIDE(mbedtls_sha1 = 0x0807d88f); +PROVIDE(mbedtls_mpi_cmp_abs = 0x0807c7c1); +PROVIDE(z_impl_k_condvar_signal = 0x0806d43d); +PROVIDE(mbedtls_asn1_get_alg = 0x0807be21); +PROVIDE(net_if_call_link_cb = 0x080513ad); +PROVIDE(HAL_DMAEx_MultiBufferStart_IT = 0x0805f841); PROVIDE(__floatsidf = 0x08040679); -PROVIDE(z_init_thread_base = 0x080786ed); -PROVIDE(net_if_ipv4_get_global_addr = 0x0806ebaf); -PROVIDE(mbedtls_mpi_core_montmul_init = 0x0807583d); -PROVIDE(z_impl_k_msgq_peek = 0x080780ed); -PROVIDE(z_impl_flash_get_page_count = 0x0807258b); -PROVIDE(mbedtls_sha512_starts = 0x080417f1); -PROVIDE(z_impl_net_addr_ntop = 0x08051329); -PROVIDE(mbedtls_cipher_crypt = 0x0805d92d); -PROVIDE(__math_uflow = 0x08042e61); -PROVIDE(shell_fprintf_normal = 0x0806bee7); -PROVIDE(z_sched_wait = 0x08068841); -PROVIDE(z_reschedule_irqlock = 0x080683d9); -PROVIDE(net_tcp_queue = 0x08071603); -PROVIDE(HAL_PCD_ISOINIncompleteCallback = 0x0807211d); -PROVIDE(net_pkt_alloc = 0x08052189); -PROVIDE(mbedtls_md_clone = 0x0805dabd); -PROVIDE(atol = 0x0807914d); -PROVIDE(z_impl_k_busy_wait = 0x08077dc9); -PROVIDE(llext_fs_read = 0x0806d7b1); -PROVIDE(usb_get_dev_data_by_iface = 0x0806b83f); -PROVIDE(HAL_ETH_GetState = 0x080740dd); -PROVIDE(mbedtls_ssl_write_handshake_msg_ext = 0x0806472d); -PROVIDE(net_context_update_recv_wnd = 0x0806fbf9); -PROVIDE(mbedtls_ssl_validate_ciphersuite = 0x08077dad); -PROVIDE(__aeabi_read_tp = 0x080796a1); -PROVIDE(dns_resolve_cancel_with_name = 0x08055ce1); -PROVIDE(usb_dc_ep_set_stall = 0x08056ba1); -PROVIDE(net_rx_priority2tc = 0x080523cd); -PROVIDE(flash_stm32_write_range = 0x0807276d); -PROVIDE(USB_ReadDevInEPInterrupt = 0x08074f41); -PROVIDE(__dtox_engine = 0x08079539); -PROVIDE(k_heap_alloc = 0x08077f53); -PROVIDE(z_impl_zephyr_fputc = 0x08049485); -PROVIDE(gmtime_r = 0x08069165); -PROVIDE(fs_tell = 0x0804a755); -PROVIDE(arch_dcache_enable = 0x08048f75); -PROVIDE(llext_teardown = 0x0806d5e1); -PROVIDE(putc = 0x08079677); -PROVIDE(llext_fs_seek = 0x0806d7d5); -PROVIDE(sprintf = 0x08069379); -PROVIDE(z_device_get_all_static = 0x08066ee5); -PROVIDE(sys_clock_tick_get_32 = 0x08078c7f); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PRIORITY_QUEUES_NUM = 0x0804fec1); -PROVIDE(z_impl_k_poll_signal_reset = 0x08078fc9); -PROVIDE(z_impl_k_thread_resume = 0x0806839d); -PROVIDE(arch_float_enable = 0x0806cff1); -PROVIDE(USB_EPStartXfer = 0x0805bf65); -PROVIDE(z_arm_nmi = 0x080480a1); -PROVIDE(k_work_init_delayable = 0x08078661); -PROVIDE(net_tc_rx_init = 0x080523dd); -PROVIDE(mbedtls_ssl_derive_keys = 0x08066505); -PROVIDE(net_if_ipv4_addr_mask_cmp = 0x0806eb6b); -PROVIDE(net_pkt_get_reserve_data = 0x0807003b); -PROVIDE(__log2pow5 = 0x0806a565); -PROVIDE(log_source_name_get = 0x08043f4d); -PROVIDE(ring_buf_area_finish = 0x0806b3e5); -PROVIDE(memcpy = 0x0807901f); -PROVIDE(mbedtls_oid_get_sig_alg = 0x08076973); -PROVIDE(mbedtls_ssl_write = 0x08064ad9); -PROVIDE(HAL_PCD_MspDeInit = 0x080741f7); -PROVIDE(crc32_ieee_update = 0x0804308d); +PROVIDE(z_init_thread_base = 0x0807f1d7); +PROVIDE(net_if_ipv4_get_global_addr = 0x080743e9); +PROVIDE(mbedtls_mpi_core_montmul_init = 0x0807c327); +PROVIDE(z_impl_k_msgq_peek = 0x0807ebd7); +PROVIDE(z_impl_flash_get_page_count = 0x0807839d); +PROVIDE(mbedtls_sha512_starts = 0x08041951); +PROVIDE(z_impl_net_addr_ntop = 0x080517e1); +PROVIDE(mbedtls_cipher_crypt = 0x080630b1); +PROVIDE(__math_uflow = 0x08043199); +PROVIDE(shell_fprintf_normal = 0x08071721); +PROVIDE(z_sched_wait = 0x0806dfc5); +PROVIDE(z_reschedule_irqlock = 0x0806db5d); +PROVIDE(net_tcp_queue = 0x08076e3d); +PROVIDE(HAL_PCD_ISOINIncompleteCallback = 0x08077957); +PROVIDE(net_pkt_alloc = 0x08052641); +PROVIDE(mbedtls_md_clone = 0x08063241); +PROVIDE(atol = 0x0807fc37); +PROVIDE(z_impl_k_busy_wait = 0x0807e8b3); +PROVIDE(llext_fs_read = 0x08072feb); +PROVIDE(usb_get_dev_data_by_iface = 0x08071079); +PROVIDE(HAL_ETH_GetState = 0x0807aa0d); +PROVIDE(mbedtls_ssl_write_handshake_msg_ext = 0x08069eb1); +PROVIDE(net_context_update_recv_wnd = 0x08075433); +PROVIDE(mbedtls_ssl_validate_ciphersuite = 0x0807e897); +PROVIDE(__aeabi_read_tp = 0x08080189); +PROVIDE(dns_resolve_cancel_with_name = 0x08056199); +PROVIDE(usb_dc_ep_set_stall = 0x08057059); +PROVIDE(net_rx_priority2tc = 0x08052885); +PROVIDE(flash_stm32_write_range = 0x0807857f); +PROVIDE(atan2 = 0x080421e1); +PROVIDE(USB_ReadDevInEPInterrupt = 0x0807ba2b); +PROVIDE(__dtox_engine = 0x08080023); +PROVIDE(k_heap_alloc = 0x0807ea3d); +PROVIDE(z_impl_zephyr_fputc = 0x08049915); +PROVIDE(gmtime_r = 0x0806e8e9); +PROVIDE(fs_tell = 0x0804abe5); +PROVIDE(arch_dcache_enable = 0x08049405); +PROVIDE(llext_teardown = 0x08072e1b); +PROVIDE(putc = 0x08080161); +PROVIDE(llext_fs_seek = 0x0807300f); +PROVIDE(sprintf = 0x0806eafd); +PROVIDE(z_device_get_all_static = 0x0806c669); +PROVIDE(sys_clock_tick_get_32 = 0x0807f769); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PRIORITY_QUEUES_NUM = 0x08050351); +PROVIDE(z_impl_k_poll_signal_reset = 0x0807fab3); +PROVIDE(z_impl_k_thread_resume = 0x0806db21); +PROVIDE(arch_float_enable = 0x0807282b); +PROVIDE(USB_EPStartXfer = 0x080616e9); +PROVIDE(z_arm_nmi = 0x08048531); +PROVIDE(k_work_init_delayable = 0x0807f14b); +PROVIDE(net_tc_rx_init = 0x08052895); +PROVIDE(mbedtls_ssl_derive_keys = 0x0806bc89); +PROVIDE(net_if_ipv4_addr_mask_cmp = 0x080743a5); +PROVIDE(net_pkt_get_reserve_data = 0x08075875); +PROVIDE(__log2pow5 = 0x0806fce9); +PROVIDE(log_source_name_get = 0x080443dd); +PROVIDE(ring_buf_area_finish = 0x08070c1f); +PROVIDE(memcpy = 0x0807fb09); +PROVIDE(mbedtls_oid_get_sig_alg = 0x0807d45d); +PROVIDE(mbedtls_ssl_write = 0x0806a25d); +PROVIDE(HAL_PCD_MspDeInit = 0x0807ab27); +PROVIDE(crc32_ieee_update = 0x080433ed); PROVIDE(__nedf2 = 0x08040b81); -PROVIDE(z_shell_op_char_delete = 0x0806c7c9); -PROVIDE(net_if_ipv4_addr_lookup = 0x08050b1d); -PROVIDE(mbedtls_ssl_handshake_free = 0x08077b2b); -PROVIDE(zsock_getsockname_ctx = 0x0804d9f9); -PROVIDE(mbedtls_mpi_lsb = 0x08075c19); -PROVIDE(z_shell_op_cursor_position_synchronize = 0x0806c4ab); -PROVIDE(z_fatal_error = 0x08066fd1); -PROVIDE(llext_free_regions = 0x0804adc9); -PROVIDE(z_impl_zsock_getpeername = 0x0804c7d9); -PROVIDE(mbedtls_sha512 = 0x08077127); -PROVIDE(z_shell_op_right_arrow = 0x0806c5f3); +PROVIDE(z_shell_op_char_delete = 0x08072003); +PROVIDE(net_if_ipv4_addr_lookup = 0x08050fd5); +PROVIDE(mbedtls_ssl_handshake_free = 0x0807e615); +PROVIDE(zsock_getsockname_ctx = 0x0804de89); +PROVIDE(mbedtls_mpi_lsb = 0x0807c703); +PROVIDE(z_shell_op_cursor_position_synchronize = 0x08071ce5); +PROVIDE(z_fatal_error = 0x0806c755); +PROVIDE(llext_free_regions = 0x0804b259); +PROVIDE(z_impl_zsock_getpeername = 0x0804cc69); +PROVIDE(stm32_dma_enable_stream = 0x08058dc9); +PROVIDE(mbedtls_sha512 = 0x0807dc11); +PROVIDE(z_shell_op_right_arrow = 0x08071e2d); PROVIDE(__aeabi_fcmpgt = 0x080410d1); -PROVIDE(net_mgmt_event_notify_with_info = 0x08051905); +PROVIDE(net_mgmt_event_notify_with_info = 0x08051dbd); PROVIDE(__aeabi_l2f = 0x08040f7d); -PROVIDE(__pow5bits = 0x0806a581); -PROVIDE(sys_clock_cycle_get_64 = 0x0805a9ad); -PROVIDE(atanl = 0x08041e81); -PROVIDE(sys_timepoint_calc = 0x08078c8b); -PROVIDE(z_sched_wake_thread = 0x080787d7); -PROVIDE(z_impl_k_pipe_write = 0x080789ed); -PROVIDE(mbedtls_ssl_conf_own_cert = 0x08065d51); -PROVIDE(sys_clock_set_timeout = 0x0805a84d); -PROVIDE(strtod = 0x08041921); +PROVIDE(__pow5bits = 0x0806fd05); +PROVIDE(sys_clock_cycle_get_64 = 0x0805d2a1); +PROVIDE(atanl = 0x08041fe1); +PROVIDE(sys_timepoint_calc = 0x0807f775); +PROVIDE(z_sched_wake_thread = 0x0807f2c1); +PROVIDE(z_impl_k_pipe_write = 0x0807f4d7); +PROVIDE(mbedtls_ssl_conf_own_cert = 0x0806b4d5); +PROVIDE(sys_clock_set_timeout = 0x0805d141); +PROVIDE(strtod = 0x08041a81); PROVIDE(__aeabi_dadd = 0x080403e1); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_AUTO_NEGOTIATION = 0x0804fc49); -PROVIDE(mbedtls_cipher_set_padding_mode = 0x0805d8f9); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_AUTO_NEGOTIATION = 0x080500d9); +PROVIDE(mbedtls_cipher_set_padding_mode = 0x0806307d); PROVIDE(__aeabi_l2d = 0x080406f1); -PROVIDE(mbedtls_mpi_lset = 0x08075bc1); -PROVIDE(usb_dc_ep_get_read_count = 0x08056b09); +PROVIDE(mbedtls_mpi_lset = 0x0807c6ab); +PROVIDE(usb_dc_ep_get_read_count = 0x08056fc1); PROVIDE(strlen = 0x08041205); -PROVIDE(mbedtls_ssl_conf_ca_chain = 0x08077a93); -PROVIDE(net_buf_simple_pull = 0x0806d445); +PROVIDE(mbedtls_ssl_conf_ca_chain = 0x0807e57d); +PROVIDE(net_buf_simple_pull = 0x08072c7f); PROVIDE(CONFIG_SYS_HASH_FUNC32_DJB2 = 0x00000001); -PROVIDE(z_arm_pendsv = 0x08048c21); -PROVIDE(mbedtls_internal_sha512_process = 0x080615f5); -PROVIDE(mbedtls_x509_get_subject_alt_name = 0x08062f25); +PROVIDE(z_arm_pendsv = 0x080490b1); +PROVIDE(mbedtls_internal_sha512_process = 0x08066d79); +PROVIDE(mbedtls_x509_get_subject_alt_name = 0x080686a9); PROVIDE(__fixunsdfdi = 0x08040341); -PROVIDE(mbedtls_ssl_conf_cert_profile = 0x08077a8f); -PROVIDE(USB_EP0_OutStart = 0x0805c12d); -PROVIDE(z_impl_k_msgq_get = 0x080674d1); -PROVIDE(mbedtls_mpi_add_abs = 0x08075df5); -PROVIDE(strtol = 0x080693c9); -PROVIDE(USB_DevDisconnect = 0x08074eeb); -PROVIDE(z_impl_zsock_gethostname = 0x0806d9f3); -PROVIDE(stm32_gpio_intc_get_pin_irq_line = 0x0807200f); -PROVIDE(z_impl_k_thread_stack_free = 0x08079019); -PROVIDE(jesd216_bfp_erase = 0x0807249b); -PROVIDE(net_tcp_init = 0x08054a1d); -PROVIDE(mbedtls_aes_init = 0x08074f8b); -PROVIDE(mbedtls_md_init = 0x080767ed); -PROVIDE(stm32_gpio_intc_select_line_trigger = 0x080565ad); -PROVIDE(mbedtls_pk_parse_key = 0x08062429); -PROVIDE(usb_cancel_transfer = 0x08045435); -PROVIDE(mbedtls_rsa_rsaes_oaep_encrypt = 0x0805fb61); -PROVIDE(llext_loaded_sect_ptr = 0x0806d675); -PROVIDE(net_pkt_skip = 0x08070275); +PROVIDE(mbedtls_ssl_conf_cert_profile = 0x0807e579); +PROVIDE(USB_EP0_OutStart = 0x080618b1); +PROVIDE(z_impl_k_msgq_get = 0x0806cc55); +PROVIDE(mbedtls_mpi_add_abs = 0x0807c8df); +PROVIDE(strtol = 0x0806eb4d); +PROVIDE(USB_DevDisconnect = 0x0807b9d5); +PROVIDE(z_impl_zsock_gethostname = 0x0807322d); +PROVIDE(stm32_gpio_intc_get_pin_irq_line = 0x08077849); +PROVIDE(z_impl_k_thread_stack_free = 0x0807fb03); +PROVIDE(jesd216_bfp_erase = 0x080782ad); +PROVIDE(net_tcp_init = 0x08054ed5); +PROVIDE(FMC_SDRAM_Init = 0x08060da5); +PROVIDE(mbedtls_aes_init = 0x0807ba75); +PROVIDE(mbedtls_md_init = 0x0807d2d7); +PROVIDE(stm32_gpio_intc_select_line_trigger = 0x08056a65); +PROVIDE(mbedtls_pk_parse_key = 0x08067bad); +PROVIDE(usb_cancel_transfer = 0x080458c5); +PROVIDE(mbedtls_rsa_rsaes_oaep_encrypt = 0x080652e5); +PROVIDE(llext_loaded_sect_ptr = 0x08072eaf); +PROVIDE(net_pkt_skip = 0x08075aaf); PROVIDE(__truncdfsf2 = 0x08040d3d); -PROVIDE(mbedtls_ssl_transform_init = 0x080779cb); -PROVIDE(HAL_ETH_ReleaseTxPacket = 0x08073c69); -PROVIDE(arch_dcache_disable = 0x08048fd1); +PROVIDE(mbedtls_ssl_transform_init = 0x0807e4b5); +PROVIDE(LL_TIM_Init = 0x08061019); +PROVIDE(HAL_ETH_ReleaseTxPacket = 0x0807a599); +PROVIDE(arch_dcache_disable = 0x08049461); PROVIDE(__aeabi_uidiv = 0x08040381); -PROVIDE(net_if_down = 0x080510ad); -PROVIDE(z_impl_net_if_ipv4_set_gw_by_index = 0x0806ecbf); -PROVIDE(usb_dc_ep_read = 0x0807209f); -PROVIDE(arch_cache_init = 0x0806d01f); -PROVIDE(k_queue_append = 0x0807839f); -PROVIDE(net_icmpv4_create = 0x08070683); -PROVIDE(zsock_shutdown_ctx = 0x0804cced); -PROVIDE(zvfs_open = 0x08049851); -PROVIDE(mbedtls_x509_free_subject_alt_name = 0x0807742b); -PROVIDE(mbedtls_md5 = 0x0805e5dd); -PROVIDE(USB_CoreInit = 0x08074a8b); -PROVIDE(getaddrinfo = 0x0806d301); -PROVIDE(USB_FlushRxFifo = 0x08074be1); -PROVIDE(net_icmp_call_ipv4_handlers = 0x080705f7); -PROVIDE(net_if_addr_unref = 0x08050e61); -PROVIDE(sys_clock_disable = 0x0807383f); -PROVIDE(strcasecmp = 0x0807917d); -PROVIDE(z_unpend_thread_no_timeout = 0x080787b5); -PROVIDE(z_impl_k_sem_reset = 0x08067851); -PROVIDE(z_impl_zsock_accept = 0x0804c489); -PROVIDE(gpio_stm32_configure = 0x08072943); +PROVIDE(net_if_down = 0x08051565); +PROVIDE(z_impl_net_if_ipv4_set_gw_by_index = 0x080744f9); +PROVIDE(usb_dc_ep_read = 0x080778d9); +PROVIDE(arch_cache_init = 0x08072859); +PROVIDE(k_queue_append = 0x0807ee89); +PROVIDE(net_icmpv4_create = 0x08075ebd); +PROVIDE(zsock_shutdown_ctx = 0x0804d17d); +PROVIDE(zvfs_open = 0x08049ce1); +PROVIDE(mbedtls_x509_free_subject_alt_name = 0x0807df15); +PROVIDE(mbedtls_md5 = 0x08063d61); +PROVIDE(USB_CoreInit = 0x0807b575); +PROVIDE(getaddrinfo = 0x08072b3b); +PROVIDE(HAL_DCMI_ErrorCallback = 0x0805ddf9); +PROVIDE(USB_FlushRxFifo = 0x0807b6cb); +PROVIDE(net_icmp_call_ipv4_handlers = 0x08075e31); +PROVIDE(net_if_addr_unref = 0x08051319); +PROVIDE(sys_clock_disable = 0x08079e21); +PROVIDE(strcasecmp = 0x0807fc67); +PROVIDE(z_unpend_thread_no_timeout = 0x0807f29f); +PROVIDE(z_impl_k_sem_reset = 0x0806cfd5); +PROVIDE(z_impl_zsock_accept = 0x0804c919); +PROVIDE(gpio_stm32_configure = 0x08078755); PROVIDE(__eqdf2 = 0x08040b81); -PROVIDE(net_tc_submit_to_rx_queue = 0x080523b5); +PROVIDE(net_tc_submit_to_rx_queue = 0x0805286d); PROVIDE(__fixdfsi = 0x08040cad); -PROVIDE(HAL_PCD_SOFCallback = 0x080742ab); -PROVIDE(mbedtls_ssl_session_reset = 0x08077ca9); -PROVIDE(k_queue_unique_append = 0x080783f1); -PROVIDE(HAL_ETH_RxCpltCallback = 0x08072203); -PROVIDE(z_dummy_thread_init = 0x08067fd5); -PROVIDE(z_arm_mpu_init = 0x08049279); -PROVIDE(USB_SetDevAddress = 0x08074eaf); -PROVIDE(zvfs_eventfd = 0x08049f11); -PROVIDE(net_dhcpv4_add_option_callback = 0x0805557d); -PROVIDE(arm_core_mpu_configure_static_mpu_regions = 0x0804922d); -PROVIDE(mbedtls_mpi_sub_mpi = 0x08075f8f); -PROVIDE(stm32_gpio_intc_remove_irq_callback = 0x08056655); -PROVIDE(z_impl_k_timer_start = 0x08068e81); -PROVIDE(dns_dispatcher_register = 0x0805570d); -PROVIDE(mbedtls_rsa_private = 0x0805f5e9); +PROVIDE(HAL_PCD_SOFCallback = 0x0807abdb); +PROVIDE(mbedtls_ssl_session_reset = 0x0807e793); +PROVIDE(k_queue_unique_append = 0x0807eedb); +PROVIDE(HAL_ETH_RxCpltCallback = 0x08078015); +PROVIDE(z_dummy_thread_init = 0x0806d759); +PROVIDE(z_arm_mpu_init = 0x08049709); +PROVIDE(USB_SetDevAddress = 0x0807b999); +PROVIDE(zvfs_eventfd = 0x0804a3a1); +PROVIDE(net_dhcpv4_add_option_callback = 0x08055a35); +PROVIDE(arm_core_mpu_configure_static_mpu_regions = 0x080496bd); +PROVIDE(mbedtls_mpi_sub_mpi = 0x0807ca79); +PROVIDE(stm32_gpio_intc_remove_irq_callback = 0x08056b0d); +PROVIDE(z_impl_k_timer_start = 0x0806e605); +PROVIDE(net_if_lookup_by_dev = 0x08050de9); +PROVIDE(smh_init = 0x0804323d); +PROVIDE(dns_dispatcher_register = 0x08055bc5); +PROVIDE(mbedtls_rsa_private = 0x08064d6d); +PROVIDE(HAL_DMA_Abort_IT = 0x0805efc1); PROVIDE(__aeabi_ul2f = 0x08040f6d); -PROVIDE(net_udp_finalize = 0x08054a6d); -PROVIDE(HAL_QSPI_IRQHandler = 0x0805ba55); -PROVIDE(kheap_llext_heap = 0x24030b00); +PROVIDE(net_udp_finalize = 0x08054f25); +PROVIDE(HAL_QSPI_IRQHandler = 0x08060ac1); +PROVIDE(kheap_llext_heap = 0x24031180); PROVIDE(kheap_llext_heap_size = 0x20000); -PROVIDE(kheap__system_heap = 0x24050e20); -PROVIDE(kheap__system_heap_size = 32768); -PROVIDE(__device_dts_ord_8 = 0x0000000008079894); -PROVIDE(__device_dts_ord_41 = 0x00000000080798b8); -PROVIDE(__device_dts_ord_107 = 0x00000000080798dc); -PROVIDE(__device_dts_ord_53 = 0x0000000008079900); -PROVIDE(__device_dts_ord_12 = 0x0000000008079924); -PROVIDE(__device_dts_ord_52 = 0x0000000008079948); -PROVIDE(__device_dts_ord_20 = 0x000000000807996c); -PROVIDE(__device_dts_ord_51 = 0x0000000008079990); -PROVIDE(__device_dts_ord_210 = 0x00000000080799b4); -PROVIDE(__device_dts_ord_209 = 0x00000000080799d8); -PROVIDE(__device_dts_ord_208 = 0x00000000080799fc); -PROVIDE(__device_dts_ord_50 = 0x0000000008079a20); -PROVIDE(__device_dts_ord_207 = 0x0000000008079a44); -PROVIDE(__device_dts_ord_49 = 0x0000000008079a68); -PROVIDE(__device_dts_ord_68 = 0x0000000008079a8c); -PROVIDE(__device_dts_ord_110 = 0x0000000008079ab0); -PROVIDE(__device_dts_ord_217 = 0x0000000008079ad4); -PROVIDE(__device_dts_ord_48 = 0x0000000008079af8); -PROVIDE(__device_dts_ord_42 = 0x0000000008079b1c); -PROVIDE(__device_dts_ord_45 = 0x0000000008079b40); -PROVIDE(__device_dts_ord_227 = 0x0000000008079b64); -PROVIDE(__device_dts_ord_148 = 0x0000000008079b88); -PROVIDE(__device_dts_ord_35 = 0x0000000008079bac); -PROVIDE(__device_dts_ord_25 = 0x0000000008079bd0); -PROVIDE(__device_dts_ord_13 = 0x0000000008079bf4); -PROVIDE(__device_dts_ord_21 = 0x0000000008079c18); -PROVIDE(__device_dts_ord_143 = 0x0000000008079c3c); -PROVIDE(__device_dts_ord_146 = 0x0000000008079c60); -PROVIDE(__device_dts_ord_156 = 0x0000000008079c84); -PROVIDE(__device_dts_ord_164 = 0x0000000008079ca8); -PROVIDE(__device_dts_ord_163 = 0x0000000008079ccc); -PROVIDE(__device_dts_ord_162 = 0x0000000008079cf0); -PROVIDE(__device_dts_ord_161 = 0x0000000008079d14); -PROVIDE(__device_dts_ord_160 = 0x0000000008079d38); -PROVIDE(__device_dts_ord_159 = 0x0000000008079d5c); -PROVIDE(__device_dts_ord_158 = 0x0000000008079d80); -PROVIDE(__device_dts_ord_147 = 0x0000000008079da4); +PROVIDE(kheap__system_heap = 0x240514a0); +PROVIDE(kheap__system_heap_size = 2048); +PROVIDE(__device_dts_ord_8 = 0x0000000008080404); +PROVIDE(__device_dts_ord_256 = 0x0000000008080428); +PROVIDE(__device_dts_ord_257 = 0x000000000808044c); +PROVIDE(__device_dts_ord_51 = 0x0000000008080470); +PROVIDE(__device_dts_ord_138 = 0x0000000008080494); +PROVIDE(__device_dts_ord_170 = 0x00000000080804b8); +PROVIDE(__device_dts_ord_71 = 0x00000000080804dc); +PROVIDE(__device_dts_ord_14 = 0x0000000008080500); +PROVIDE(__device_dts_ord_70 = 0x0000000008080524); +PROVIDE(__device_dts_ord_22 = 0x0000000008080548); +PROVIDE(__device_dts_ord_69 = 0x000000000808056c); +PROVIDE(__device_dts_ord_68 = 0x0000000008080590); +PROVIDE(__device_dts_ord_67 = 0x00000000080805b4); +PROVIDE(__device_dts_ord_66 = 0x00000000080805d8); +PROVIDE(__device_dts_ord_65 = 0x00000000080805fc); +PROVIDE(__device_dts_ord_64 = 0x0000000008080620); +PROVIDE(__device_dts_ord_63 = 0x0000000008080644); +PROVIDE(__device_dts_ord_134 = 0x0000000008080668); +PROVIDE(__device_dts_ord_102 = 0x000000000808068c); +PROVIDE(__device_dts_ord_141 = 0x00000000080806b0); +PROVIDE(__device_dts_ord_265 = 0x00000000080806d4); +PROVIDE(__device_dts_ord_58 = 0x00000000080806f8); +PROVIDE(__device_dts_ord_52 = 0x000000000808071c); +PROVIDE(__device_dts_ord_55 = 0x0000000008080740); +PROVIDE(__device_dts_ord_41 = 0x0000000008080764); +PROVIDE(__device_dts_ord_12 = 0x0000000008080788); +PROVIDE(__device_dts_ord_48 = 0x00000000080807ac); +PROVIDE(__device_dts_ord_275 = 0x00000000080807d0); +PROVIDE(__device_dts_ord_198 = 0x00000000080807f4); +PROVIDE(__device_dts_ord_37 = 0x0000000008080818); +PROVIDE(__device_dts_ord_33 = 0x000000000808083c); +PROVIDE(__device_dts_ord_27 = 0x0000000008080860); +PROVIDE(__device_dts_ord_78 = 0x0000000008080884); +PROVIDE(__device_dts_ord_87 = 0x00000000080808a8); +PROVIDE(__device_dts_ord_75 = 0x00000000080808cc); +PROVIDE(__device_dts_ord_82 = 0x00000000080808f0); +PROVIDE(__device_dts_ord_62 = 0x0000000008080914); +PROVIDE(__device_dts_ord_300 = 0x0000000008080938); +PROVIDE(__device_dts_ord_171 = 0x000000000808095c); +PROVIDE(__device_dts_ord_183 = 0x0000000008080980); +PROVIDE(__device_dts_ord_15 = 0x00000000080809a4); +PROVIDE(__device_dts_ord_23 = 0x00000000080809c8); +PROVIDE(__device_dts_ord_193 = 0x00000000080809ec); +PROVIDE(__device_dts_ord_196 = 0x0000000008080a10); +PROVIDE(__device_dts_ord_206 = 0x0000000008080a34); +PROVIDE(__device_dts_ord_214 = 0x0000000008080a58); +PROVIDE(__device_dts_ord_213 = 0x0000000008080a7c); +PROVIDE(__device_dts_ord_212 = 0x0000000008080aa0); +PROVIDE(__device_dts_ord_211 = 0x0000000008080ac4); +PROVIDE(__device_dts_ord_210 = 0x0000000008080ae8); +PROVIDE(__device_dts_ord_209 = 0x0000000008080b0c); +PROVIDE(__device_dts_ord_208 = 0x0000000008080b30); +PROVIDE(__device_dts_ord_197 = 0x0000000008080b54); PROVIDE(_sketch_start = 0xe0000 ); diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/pure_analog_pins.cpp b/variants/arduino_portenta_h7_stm32h747xx_m7/pure_analog_pins.cpp new file mode 100644 index 00000000..a6ba41b2 --- /dev/null +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/pure_analog_pins.cpp @@ -0,0 +1,23 @@ +/* + * Copyright (c) 2024 Arduino SA + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include "pure_analog_pins.h" + +#undef A0 +#undef A1 +#undef A2 +#undef A3 + +PureAnalogPin A0_PURE(0); +PureAnalogPin A1_PURE(1); +PureAnalogPin A2_PURE(2); +PureAnalogPin A3_PURE(3); + +int getAnalogReadResolution(); + +int analogRead(PureAnalogPin pin) { + return ::analogRead(A0 + pin.get()); +} diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/pure_analog_pins.h b/variants/arduino_portenta_h7_stm32h747xx_m7/pure_analog_pins.h new file mode 100644 index 00000000..9df13056 --- /dev/null +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/pure_analog_pins.h @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2024 Arduino SA + * + * SPDX-License-Identifier: Apache-2.0 + */ +#ifndef _PURE_ANALOG_PINS_ +#define _PURE_ANALOG_PINS_ + +/****************************************************************************** + * INCLUDE + ******************************************************************************/ + +#include "Arduino.h" + +/****************************************************************************** + * PREPROCESSOR-MAGIC + ******************************************************************************/ + +#define PURE_ANALOG_AS_DIGITAL_ATTRIBUTE __attribute__ ((error("Can't use pins A0-A3 as digital"))) + +/****************************************************************************** + * TYPEDEF + ******************************************************************************/ + +class PureAnalogPin { +public: + PureAnalogPin(int _pin) : pin(_pin) {}; + int get() { + return pin; + }; + bool operator== (PureAnalogPin const & other) const { + return pin == other.pin; + } + //operator int() = delete; + __attribute__ ((error("Change me to a #define"))) operator int(); +private: + int pin; +}; + +extern PureAnalogPin A0_PURE; +extern PureAnalogPin A1_PURE; +extern PureAnalogPin A2_PURE; +extern PureAnalogPin A3_PURE; + +#define A0 A0_PURE +#define A1 A1_PURE +#define A2 A2_PURE +#define A3 A3_PURE + +/****************************************************************************** + * FUNCTION DECLARATION + ******************************************************************************/ + +void PURE_ANALOG_AS_DIGITAL_ATTRIBUTE pinMode (PureAnalogPin pin, PinMode mode); +PinStatus PURE_ANALOG_AS_DIGITAL_ATTRIBUTE digitalRead (PureAnalogPin pin); +void PURE_ANALOG_AS_DIGITAL_ATTRIBUTE digitalWrite(PureAnalogPin pin, PinStatus value); +int analogRead (PureAnalogPin pin); +void PURE_ANALOG_AS_DIGITAL_ATTRIBUTE analogWrite (PureAnalogPin pin, int value); + +#undef PURE_ANALOG_AS_DIGITAL_ATTRIBUTE + +#endif /* _PURE_ANALOG_PINS_ */ diff --git a/variants/arduino_portenta_h7_stm32h747xx_m7/variant.h b/variants/arduino_portenta_h7_stm32h747xx_m7/variant.h index 68c33a89..336ffa3d 100644 --- a/variants/arduino_portenta_h7_stm32h747xx_m7/variant.h +++ b/variants/arduino_portenta_h7_stm32h747xx_m7/variant.h @@ -3,6 +3,8 @@ * * SPDX-License-Identifier: Apache-2.0 */ +#include "pure_analog_pins.h" +#include "PinNames.h" // TODO: correctly handle these legacy defines #define MOSI 0 diff --git a/variants/ek_ra8d1_r7fa8d1bhecbd/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h b/variants/ek_ra8d1_r7fa8d1bhecbd/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h index 48b7e08d..29b56f7d 100644 --- a/variants/ek_ra8d1_r7fa8d1bhecbd/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h +++ b/variants/ek_ra8d1_r7fa8d1bhecbd/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h @@ -2,7 +2,7 @@ * Generated by gen_defines.py * * DTS input file: - * /home/burellil/Work/ArduinoCore-zephyr/ArduinoCore-zephyr/build/ek_ra8d1_r7fa8d1bhecbd/zephyr/zephyr.dts.pre + * /home/kurte/github/ArduinoCore-zephyr/build/ek_ra8d1_r7fa8d1bhecbd/zephyr/zephyr.dts.pre * * Directories with bindings: * $ZEPHYR_BASE/dts/bindings diff --git a/variants/ek_ra8d1_r7fa8d1bhecbd/llext-edk/include/zephyr/include/generated/zephyr/version.h b/variants/ek_ra8d1_r7fa8d1bhecbd/llext-edk/include/zephyr/include/generated/zephyr/version.h index 9a30242a..76aa14d4 100644 --- a/variants/ek_ra8d1_r7fa8d1bhecbd/llext-edk/include/zephyr/include/generated/zephyr/version.h +++ b/variants/ek_ra8d1_r7fa8d1bhecbd/llext-edk/include/zephyr/include/generated/zephyr/version.h @@ -19,7 +19,7 @@ #define KERNEL_VERSION_EXTENDED_STRING "4.1.99+0" #define KERNEL_VERSION_TWEAK_STRING "4.1.99+0" -#define BUILD_VERSION v4.1.0-894-g9f06fc60e255 +#define BUILD_VERSION v4.1.0-898-g6b32f4d75066 #endif /* _KERNEL_VERSION_H_ */ diff --git a/variants/ek_ra8d1_r7fa8d1bhecbd/provides.ld b/variants/ek_ra8d1_r7fa8d1bhecbd/provides.ld index 7c500a3f..e5db74a6 100644 --- a/variants/ek_ra8d1_r7fa8d1bhecbd/provides.ld +++ b/variants/ek_ra8d1_r7fa8d1bhecbd/provides.ld @@ -1,222 +1,222 @@ PROVIDE(cmd_kernel_uptime = 0x02001361); -PROVIDE(i2c_ra_iic_get_config = 0x020116d5); -PROVIDE(i2c_ra_iic_callback = 0x020116e1); -PROVIDE(i2c_ra_iic_irq_config_func0 = 0x02008e71); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x020116f3); -PROVIDE(R_FSP_SystemClockHzGet.constprop.0 = 0x02008ed5); +PROVIDE(i2c_ra_iic_get_config = 0x020118ad); +PROVIDE(i2c_ra_iic_callback = 0x020118b9); +PROVIDE(i2c_ra_iic_irq_config_func0 = 0x02009049); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x020118cb); +PROVIDE(R_FSP_SystemClockHzGet.constprop.0 = 0x020090ad); PROVIDE(calc_iic_master_bitrate = 0x02001441); -PROVIDE(calc_iic_master_clock_setting.isra.0 = 0x02008f39); -PROVIDE(i2c_ra_iic_configure = 0x02009141); -PROVIDE(i2c_ra_iic_transfer = 0x020091ed); -PROVIDE(i2c_ra_iic_init = 0x020093a9); -PROVIDE(mulShift64 = 0x02012ff3); -PROVIDE(loader = 0x02002aa1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02002be1); -PROVIDE(dummy_timestamp = 0x0200f809); -PROVIDE(default_lf_get_timestamp = 0x0200f80d); -PROVIDE(atomic_inc = 0x0200f81d); -PROVIDE(z_log_init.isra.0 = 0x02003399); -PROVIDE(enable_logger = 0x0200f82f); -PROVIDE(backend_filter_set = 0x02003721); -PROVIDE(z_cbprintf_cpy = 0x0200f8bd); -PROVIDE(z_log_msg_simple_create = 0x0200f91b); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0200f989); -PROVIDE(log_output_write = 0x0200f9e7); -PROVIDE(out_func = 0x0200fa03); -PROVIDE(cr_out_func = 0x0200fa1f); -PROVIDE(print_formatted = 0x0200395d); -PROVIDE(newline_print = 0x02003981); -PROVIDE(cmd_kernel_cycles = 0x02003cfd); -PROVIDE(cmd_kernel_sleep = 0x02003d19); -PROVIDE(cmd_kernel_version = 0x02003d59); -PROVIDE(cmd_kernel_log_level_set = 0x02003d71); -PROVIDE(thread_valid_cb = 0x0200facf); -PROVIDE(cmd_kernel_thread_list = 0x02003e15); -PROVIDE(shell_tdata_dump = 0x02003e49); -PROVIDE(cmd_kernel_thread_stacks = 0x02003f09); -PROVIDE(shell_stack_dump = 0x02003f79); -PROVIDE(cmd_kernel_thread_suspend = 0x02003fdd); -PROVIDE(cmd_kernel_thread_resume = 0x02004041); -PROVIDE(cmd_kernel_thread_kill = 0x020040a5); -PROVIDE(cmd_device_list = 0x02004109); -PROVIDE(cmd_devmem = 0x020041e1); -PROVIDE(cmd_dump = 0x020042a5); -PROVIDE(set_bypass.isra.0 = 0x0200441d); -PROVIDE(bypass_cb = 0x02004469); -PROVIDE(cmd_load = 0x0200458d); -PROVIDE(log_msg_generic_get_wlen = 0x0200fadb); -PROVIDE(uart_irq_tx_disable = 0x0200fafb); -PROVIDE(enable = 0x0200fb05); -PROVIDE(read_uart = 0x0200fb17); -PROVIDE(uninit = 0x0200fb29); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02004665); -PROVIDE(enable_shell_uart = 0x02004689); -PROVIDE(write_uart = 0x0200fb49); -PROVIDE(init = 0x020046c1); -PROVIDE(uart_callback = 0x02004715); -PROVIDE(cmd_buffer_clear = 0x0200fbad); -PROVIDE(atomic_or = 0x0200fbc3); -PROVIDE(atomic_and = 0x0200fbd9); -PROVIDE(k_mutex_lock = 0x0200fbef); -PROVIDE(z_shell_raw_fprintf = 0x0200fbf3); -PROVIDE(shell_internal_help_print = 0x02004851); -PROVIDE(z_shell_strlen = 0x0200fc0d); -PROVIDE(shell_log_process = 0x0200fc1d); -PROVIDE(transport_evt_handler = 0x0200fc4f); -PROVIDE(kill_handler = 0x02004871); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x020048cd); -PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x0200fc6f); -PROVIDE(z_flag_history_exit_set.isra.0 = 0x0200fc87); -PROVIDE(history_handle = 0x020048d9); -PROVIDE(z_flag_insert_mode_set.isra.0 = 0x0200fc9d); -PROVIDE(k_mutex_unlock.isra.0 = 0x0200fcbd); -PROVIDE(execute = 0x02004989); -PROVIDE(shell_signal_handle = 0x0200fcc1); -PROVIDE(state_set.constprop.0 = 0x02004c51); -PROVIDE(cmd_help = 0x0200544d); -PROVIDE(out_func = 0x0200ff23); -PROVIDE(z_shell_strlen = 0x0200ff5f); -PROVIDE(z_shell_raw_fprintf = 0x02010345); -PROVIDE(z_clear_eos = 0x02005741); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x0200575d); -PROVIDE(full_line_cmd.isra.0 = 0x0201035f); -PROVIDE(reprint_from_cursor = 0x02005989); -PROVIDE(data_insert = 0x02010671); -PROVIDE(z_shell_raw_fprintf = 0x020108e9); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x02005b0d); -PROVIDE(formatted_text_print.constprop.0 = 0x02010903); -PROVIDE(cmd_comment = 0x020109f5); -PROVIDE(cmd_shell_stats_reset = 0x020109f9); -PROVIDE(z_shell_raw_fprintf = 0x02010a01); -PROVIDE(cmd_resize_default = 0x02005c35); -PROVIDE(cmd_shell_stats_show = 0x02005c61); -PROVIDE(cmd_backends = 0x02005c75); -PROVIDE(cmd_prompt_on = 0x02010a1b); -PROVIDE(cmd_prompt_off = 0x02005cc1); -PROVIDE(cmd_history = 0x02005cd1); -PROVIDE(cmd_get_retval = 0x02005d11); -PROVIDE(cmd_echo = 0x02005d2d); -PROVIDE(cmd_clear = 0x02005d7d); -PROVIDE(cmd_resize = 0x02005db5); -PROVIDE(cmd_vt100_off = 0x02010a27); -PROVIDE(cmd_bacskpace_mode_delete = 0x02010a43); -PROVIDE(cmd_colors_off = 0x02010a5f); -PROVIDE(cmd_bacskpace_mode_backspace = 0x02010a7b); -PROVIDE(cmd_echo_off = 0x02010a97); -PROVIDE(cmd_colors_on = 0x02010ab3); -PROVIDE(cmd_vt100_on = 0x02010acf); -PROVIDE(cmd_echo_on = 0x02010aeb); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02010d33); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02010e6b); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02010ea1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02010ec1); -PROVIDE(mem_manage_fault.constprop.0 = 0x020066a5); -PROVIDE(bus_fault.constprop.0 = 0x02006801); -PROVIDE(usage_fault.constprop.0 = 0x0200696d); -PROVIDE(cbputc = 0x02010f17); -PROVIDE(picolibc_put = 0x02010f23); -PROVIDE(malloc_prepare = 0x020070d1); -PROVIDE(malloc_lock = 0x020070f5); -PROVIDE(malloc_unlock = 0x02007109); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02011185); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x0200734d); -PROVIDE(call_fn_table = 0x02007359); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02007699); -PROVIDE(llext_copy_region = 0x020076bd); -PROVIDE(llext_read = 0x02011223); -PROVIDE(llext_seek = 0x02011227); -PROVIDE(llext_peek = 0x0201122b); -PROVIDE(llext_alloc = 0x02007845); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02011235); -PROVIDE(llext_find_extension_sym_iterate = 0x02011277); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0201128f); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0200864d); -PROVIDE(llext_shell_name_cb = 0x0201136f); -PROVIDE(llext_name_get = 0x02008725); -PROVIDE(llext_name_arg_get = 0x02011385); -PROVIDE(cmd_llext_list_symbols = 0x02008759); -PROVIDE(cmd_llext_list = 0x020087c5); -PROVIDE(llext_shell_list_cb = 0x020087e5); -PROVIDE(cmd_llext_load_hex = 0x020087fd); -PROVIDE(cmd_llext_call_fn = 0x020088d1); -PROVIDE(cmd_llext_unload = 0x020088fd); -PROVIDE(gpio_ra_interrupt_init = 0x02011397); -PROVIDE(gpio_ra_irq_init0 = 0x0200896d); -PROVIDE(gpio_ra_irq_init1 = 0x02008991); -PROVIDE(clock_control_renesas_ra_on = 0x020089b5); -PROVIDE(clock_control_renesas_ra_off = 0x020089dd); -PROVIDE(clock_control_ra_init_pclk = 0x02011475); -PROVIDE(clock_control_renesas_ra_get_rate = 0x02011479); -PROVIDE(clock_control_ra_init = 0x0201149b); -PROVIDE(uart_console_init = 0x02008a05); -PROVIDE(console_out = 0x02008a2d); -PROVIDE(flash_ra_valid_range = 0x02011545); -PROVIDE(flash_ra_get_size = 0x02011563); -PROVIDE(flash_ra_get_parameters = 0x0201156f); -PROVIDE(flash_ra_read = 0x02011573); -PROVIDE(flash_controller_ra_irq_config_func = 0x02008aa5); -PROVIDE(flash_ra_init = 0x02008add); -PROVIDE(flash_controller_ra_init = 0x0201159d); -PROVIDE(flash_ra_write = 0x02008b0d); -PROVIDE(flash_ra_erase = 0x02008bc1); -PROVIDE(gpio_ra_port_get_raw = 0x020115cb); -PROVIDE(gpio_ra_port_set_masked_raw = 0x020115d9); -PROVIDE(gpio_ra_port_set_bits_raw = 0x020115ef); -PROVIDE(gpio_ra_port_clear_bits_raw = 0x020115ff); -PROVIDE(gpio_ra_port_toggle_bits = 0x02011611); -PROVIDE(gpio_ra_manage_callback = 0x02011621); -PROVIDE(query_irq_info.isra.0 = 0x02011673); -PROVIDE(gpio_ra_callback_adapter = 0x020116a7); -PROVIDE(gpio_ra_pin_configure = 0x02008cd5); -PROVIDE(gpio_ra_pin_interrupt_configure = 0x02008e21); -PROVIDE(uart_ra_sci_b_poll_in = 0x02011739); -PROVIDE(uart_ra_sci_b_poll_out = 0x02011751); -PROVIDE(uart_ra_sci_b_err_check = 0x0201175f); -PROVIDE(uart_ra_sci_b_fifo_fill = 0x02011783); -PROVIDE(uart_ra_sci_b_fifo_read = 0x020117c9); -PROVIDE(uart_ra_sci_b_irq_tx_enable = 0x0201182f); -PROVIDE(uart_ra_sci_b_irq_tx_disable = 0x0201183d); -PROVIDE(uart_ra_sci_b_irq_tx_ready = 0x0201184b); -PROVIDE(uart_ra_sci_b_irq_tx_complete = 0x02011869); -PROVIDE(uart_ra_sci_b_irq_rx_enable = 0x0201187f); -PROVIDE(uart_ra_sci_b_irq_rx_disable = 0x0201188d); -PROVIDE(uart_ra_sci_b_irq_rx_ready = 0x0201189b); -PROVIDE(uart_ra_sci_b_irq_err_enable = 0x02009509); -PROVIDE(uart_ra_sci_b_irq_err_disable = 0x0200952d); -PROVIDE(uart_ra_sci_b_irq_is_pending = 0x020118bf); -PROVIDE(uart_ra_sci_b_irq_update = 0x020118ff); -PROVIDE(uart_ra_sci_b_irq_callback_set = 0x02011915); -PROVIDE(uart_ra_sci_b_rxi_isr = 0x02009559); -PROVIDE(uart_ra_sci_b_txi_isr = 0x02009581); -PROVIDE(uart_ra_sci_b_tei_isr = 0x020095a9); -PROVIDE(uart_ra_sci_b_eri_isr = 0x020095d1); -PROVIDE(uart_ra_sci_b_config_get = 0x0201191d); -PROVIDE(uart_ra_sci_b_apply_config = 0x020095f9); -PROVIDE(uart_ra_sci_b_configure = 0x0201192b); -PROVIDE(uart_ra_sci_b_init_0 = 0x020096a1); -PROVIDE(spi_context_get_next_buf = 0x02011969); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02011995); -PROVIDE(gpio_pin_set_dt.isra.0 = 0x020119b5); -PROVIDE(_spi_context_cs_control = 0x020119e3); -PROVIDE(spi_context_unlock_unconditionally = 0x02011a23); -PROVIDE(ra_spi_b_release = 0x02011a43); -PROVIDE(spi_b_ra_init0 = 0x0200974d); -PROVIDE(ra_spi_b_transceive = 0x02009849); -PROVIDE(spi_cb = 0x02011a4f); -PROVIDE(elapsed = 0x02009be9); -PROVIDE(sys_clock_driver_init = 0x02009c35); -PROVIDE(bsp_peripheral_clock_set.constprop.0 = 0x02011a8d); -PROVIDE(R_BSP_IrqStatusClear = 0x0200a12d); -PROVIDE(R_BSP_IrqEnable = 0x02011ab3); -PROVIDE(R_BSP_IrqDisable = 0x0200a149); -PROVIDE(r_dtc_set_info = 0x0200a755); -PROVIDE(R_FSP_SystemClockHzGet = 0x0200a905); -PROVIDE(R_BSP_IrqStatusClear = 0x0200a969); -PROVIDE(R_BSP_IrqEnable = 0x02011aeb); -PROVIDE(R_BSP_IrqDisable = 0x0200a985); -PROVIDE(flash_hp_init = 0x0200a9a5); -PROVIDE(r_flash_hp_call_callback = 0x02011b13); -PROVIDE(flash_hp_enter_pe_df_mode = 0x0200aac9); +PROVIDE(calc_iic_master_clock_setting.isra.0 = 0x02009111); +PROVIDE(i2c_ra_iic_configure = 0x02009319); +PROVIDE(i2c_ra_iic_transfer = 0x020093c5); +PROVIDE(i2c_ra_iic_init = 0x02009581); +PROVIDE(mulShift64 = 0x020131cb); +PROVIDE(loader = 0x02002c79); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02002db9); +PROVIDE(dummy_timestamp = 0x0200f9e1); +PROVIDE(default_lf_get_timestamp = 0x0200f9e5); +PROVIDE(atomic_inc = 0x0200f9f5); +PROVIDE(z_log_init.isra.0 = 0x02003571); +PROVIDE(enable_logger = 0x0200fa07); +PROVIDE(backend_filter_set = 0x020038f9); +PROVIDE(z_cbprintf_cpy = 0x0200fa95); +PROVIDE(z_log_msg_simple_create = 0x0200faf3); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0200fb61); +PROVIDE(log_output_write = 0x0200fbbf); +PROVIDE(out_func = 0x0200fbdb); +PROVIDE(cr_out_func = 0x0200fbf7); +PROVIDE(print_formatted = 0x02003b35); +PROVIDE(newline_print = 0x02003b59); +PROVIDE(cmd_kernel_cycles = 0x02003ed5); +PROVIDE(cmd_kernel_sleep = 0x02003ef1); +PROVIDE(cmd_kernel_version = 0x02003f31); +PROVIDE(cmd_kernel_log_level_set = 0x02003f49); +PROVIDE(thread_valid_cb = 0x0200fca7); +PROVIDE(cmd_kernel_thread_list = 0x02003fed); +PROVIDE(shell_tdata_dump = 0x02004021); +PROVIDE(cmd_kernel_thread_stacks = 0x020040e1); +PROVIDE(shell_stack_dump = 0x02004151); +PROVIDE(cmd_kernel_thread_suspend = 0x020041b5); +PROVIDE(cmd_kernel_thread_resume = 0x02004219); +PROVIDE(cmd_kernel_thread_kill = 0x0200427d); +PROVIDE(cmd_device_list = 0x020042e1); +PROVIDE(cmd_devmem = 0x020043b9); +PROVIDE(cmd_dump = 0x0200447d); +PROVIDE(set_bypass.isra.0 = 0x020045f5); +PROVIDE(bypass_cb = 0x02004641); +PROVIDE(cmd_load = 0x02004765); +PROVIDE(log_msg_generic_get_wlen = 0x0200fcb3); +PROVIDE(uart_irq_tx_disable = 0x0200fcd3); +PROVIDE(enable = 0x0200fcdd); +PROVIDE(read_uart = 0x0200fcef); +PROVIDE(uninit = 0x0200fd01); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0200483d); +PROVIDE(enable_shell_uart = 0x02004861); +PROVIDE(write_uart = 0x0200fd21); +PROVIDE(init = 0x02004899); +PROVIDE(uart_callback = 0x020048ed); +PROVIDE(cmd_buffer_clear = 0x0200fd85); +PROVIDE(atomic_or = 0x0200fd9b); +PROVIDE(atomic_and = 0x0200fdb1); +PROVIDE(k_mutex_lock = 0x0200fdc7); +PROVIDE(z_shell_raw_fprintf = 0x0200fdcb); +PROVIDE(shell_internal_help_print = 0x02004a29); +PROVIDE(z_shell_strlen = 0x0200fde5); +PROVIDE(shell_log_process = 0x0200fdf5); +PROVIDE(transport_evt_handler = 0x0200fe27); +PROVIDE(kill_handler = 0x02004a49); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x02004aa5); +PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x0200fe47); +PROVIDE(z_flag_history_exit_set.isra.0 = 0x0200fe5f); +PROVIDE(history_handle = 0x02004ab1); +PROVIDE(z_flag_insert_mode_set.isra.0 = 0x0200fe75); +PROVIDE(k_mutex_unlock.isra.0 = 0x0200fe95); +PROVIDE(execute = 0x02004b61); +PROVIDE(shell_signal_handle = 0x0200fe99); +PROVIDE(state_set.constprop.0 = 0x02004e29); +PROVIDE(cmd_help = 0x02005625); +PROVIDE(out_func = 0x020100fb); +PROVIDE(z_shell_strlen = 0x02010137); +PROVIDE(z_shell_raw_fprintf = 0x0201051d); +PROVIDE(z_clear_eos = 0x02005919); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x02005935); +PROVIDE(full_line_cmd.isra.0 = 0x02010537); +PROVIDE(reprint_from_cursor = 0x02005b61); +PROVIDE(data_insert = 0x02010849); +PROVIDE(z_shell_raw_fprintf = 0x02010ac1); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x02005ce5); +PROVIDE(formatted_text_print.constprop.0 = 0x02010adb); +PROVIDE(cmd_comment = 0x02010bcd); +PROVIDE(cmd_shell_stats_reset = 0x02010bd1); +PROVIDE(z_shell_raw_fprintf = 0x02010bd9); +PROVIDE(cmd_resize_default = 0x02005e0d); +PROVIDE(cmd_shell_stats_show = 0x02005e39); +PROVIDE(cmd_backends = 0x02005e4d); +PROVIDE(cmd_prompt_on = 0x02010bf3); +PROVIDE(cmd_prompt_off = 0x02005e99); +PROVIDE(cmd_history = 0x02005ea9); +PROVIDE(cmd_get_retval = 0x02005ee9); +PROVIDE(cmd_echo = 0x02005f05); +PROVIDE(cmd_clear = 0x02005f55); +PROVIDE(cmd_resize = 0x02005f8d); +PROVIDE(cmd_vt100_off = 0x02010bff); +PROVIDE(cmd_bacskpace_mode_delete = 0x02010c1b); +PROVIDE(cmd_colors_off = 0x02010c37); +PROVIDE(cmd_bacskpace_mode_backspace = 0x02010c53); +PROVIDE(cmd_echo_off = 0x02010c6f); +PROVIDE(cmd_colors_on = 0x02010c8b); +PROVIDE(cmd_vt100_on = 0x02010ca7); +PROVIDE(cmd_echo_on = 0x02010cc3); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02010f0b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02011043); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02011079); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02011099); +PROVIDE(mem_manage_fault.constprop.0 = 0x0200687d); +PROVIDE(bus_fault.constprop.0 = 0x020069d9); +PROVIDE(usage_fault.constprop.0 = 0x02006b45); +PROVIDE(cbputc = 0x020110ef); +PROVIDE(picolibc_put = 0x020110fb); +PROVIDE(malloc_prepare = 0x020072a9); +PROVIDE(malloc_lock = 0x020072cd); +PROVIDE(malloc_unlock = 0x020072e1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0201135d); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x02007525); +PROVIDE(call_fn_table = 0x02007531); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02007871); +PROVIDE(llext_copy_region = 0x02007895); +PROVIDE(llext_read = 0x020113fb); +PROVIDE(llext_seek = 0x020113ff); +PROVIDE(llext_peek = 0x02011403); +PROVIDE(llext_alloc = 0x02007a1d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x0201140d); +PROVIDE(llext_find_extension_sym_iterate = 0x0201144f); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02011467); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02008825); +PROVIDE(llext_shell_name_cb = 0x02011547); +PROVIDE(llext_name_get = 0x020088fd); +PROVIDE(llext_name_arg_get = 0x0201155d); +PROVIDE(cmd_llext_list_symbols = 0x02008931); +PROVIDE(cmd_llext_list = 0x0200899d); +PROVIDE(llext_shell_list_cb = 0x020089bd); +PROVIDE(cmd_llext_load_hex = 0x020089d5); +PROVIDE(cmd_llext_call_fn = 0x02008aa9); +PROVIDE(cmd_llext_unload = 0x02008ad5); +PROVIDE(gpio_ra_interrupt_init = 0x0201156f); +PROVIDE(gpio_ra_irq_init0 = 0x02008b45); +PROVIDE(gpio_ra_irq_init1 = 0x02008b69); +PROVIDE(clock_control_renesas_ra_on = 0x02008b8d); +PROVIDE(clock_control_renesas_ra_off = 0x02008bb5); +PROVIDE(clock_control_ra_init_pclk = 0x0201164d); +PROVIDE(clock_control_renesas_ra_get_rate = 0x02011651); +PROVIDE(clock_control_ra_init = 0x02011673); +PROVIDE(uart_console_init = 0x02008bdd); +PROVIDE(console_out = 0x02008c05); +PROVIDE(flash_ra_valid_range = 0x0201171d); +PROVIDE(flash_ra_get_size = 0x0201173b); +PROVIDE(flash_ra_get_parameters = 0x02011747); +PROVIDE(flash_ra_read = 0x0201174b); +PROVIDE(flash_controller_ra_irq_config_func = 0x02008c7d); +PROVIDE(flash_ra_init = 0x02008cb5); +PROVIDE(flash_controller_ra_init = 0x02011775); +PROVIDE(flash_ra_write = 0x02008ce5); +PROVIDE(flash_ra_erase = 0x02008d99); +PROVIDE(gpio_ra_port_get_raw = 0x020117a3); +PROVIDE(gpio_ra_port_set_masked_raw = 0x020117b1); +PROVIDE(gpio_ra_port_set_bits_raw = 0x020117c7); +PROVIDE(gpio_ra_port_clear_bits_raw = 0x020117d7); +PROVIDE(gpio_ra_port_toggle_bits = 0x020117e9); +PROVIDE(gpio_ra_manage_callback = 0x020117f9); +PROVIDE(query_irq_info.isra.0 = 0x0201184b); +PROVIDE(gpio_ra_callback_adapter = 0x0201187f); +PROVIDE(gpio_ra_pin_configure = 0x02008ead); +PROVIDE(gpio_ra_pin_interrupt_configure = 0x02008ff9); +PROVIDE(uart_ra_sci_b_poll_in = 0x02011911); +PROVIDE(uart_ra_sci_b_poll_out = 0x02011929); +PROVIDE(uart_ra_sci_b_err_check = 0x02011937); +PROVIDE(uart_ra_sci_b_fifo_fill = 0x0201195b); +PROVIDE(uart_ra_sci_b_fifo_read = 0x020119a1); +PROVIDE(uart_ra_sci_b_irq_tx_enable = 0x02011a07); +PROVIDE(uart_ra_sci_b_irq_tx_disable = 0x02011a15); +PROVIDE(uart_ra_sci_b_irq_tx_ready = 0x02011a23); +PROVIDE(uart_ra_sci_b_irq_tx_complete = 0x02011a41); +PROVIDE(uart_ra_sci_b_irq_rx_enable = 0x02011a57); +PROVIDE(uart_ra_sci_b_irq_rx_disable = 0x02011a65); +PROVIDE(uart_ra_sci_b_irq_rx_ready = 0x02011a73); +PROVIDE(uart_ra_sci_b_irq_err_enable = 0x020096e1); +PROVIDE(uart_ra_sci_b_irq_err_disable = 0x02009705); +PROVIDE(uart_ra_sci_b_irq_is_pending = 0x02011a97); +PROVIDE(uart_ra_sci_b_irq_update = 0x02011ad7); +PROVIDE(uart_ra_sci_b_irq_callback_set = 0x02011aed); +PROVIDE(uart_ra_sci_b_rxi_isr = 0x02009731); +PROVIDE(uart_ra_sci_b_txi_isr = 0x02009759); +PROVIDE(uart_ra_sci_b_tei_isr = 0x02009781); +PROVIDE(uart_ra_sci_b_eri_isr = 0x020097a9); +PROVIDE(uart_ra_sci_b_config_get = 0x02011af5); +PROVIDE(uart_ra_sci_b_apply_config = 0x020097d1); +PROVIDE(uart_ra_sci_b_configure = 0x02011b03); +PROVIDE(uart_ra_sci_b_init_0 = 0x02009879); +PROVIDE(spi_context_get_next_buf = 0x02011b41); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02011b6d); +PROVIDE(gpio_pin_set_dt.isra.0 = 0x02011b8d); +PROVIDE(_spi_context_cs_control = 0x02011bbb); +PROVIDE(spi_context_unlock_unconditionally = 0x02011bfb); +PROVIDE(ra_spi_b_release = 0x02011c1b); +PROVIDE(spi_b_ra_init0 = 0x02009925); +PROVIDE(ra_spi_b_transceive = 0x02009a21); +PROVIDE(spi_cb = 0x02011c27); +PROVIDE(elapsed = 0x02009dc1); +PROVIDE(sys_clock_driver_init = 0x02009e0d); +PROVIDE(bsp_peripheral_clock_set.constprop.0 = 0x02011c65); +PROVIDE(R_BSP_IrqStatusClear = 0x0200a305); +PROVIDE(R_BSP_IrqEnable = 0x02011c8b); +PROVIDE(R_BSP_IrqDisable = 0x0200a321); +PROVIDE(r_dtc_set_info = 0x0200a92d); +PROVIDE(R_FSP_SystemClockHzGet = 0x0200aadd); +PROVIDE(R_BSP_IrqStatusClear = 0x0200ab41); +PROVIDE(R_BSP_IrqEnable = 0x02011cc3); +PROVIDE(R_BSP_IrqDisable = 0x0200ab5d); +PROVIDE(flash_hp_init = 0x0200ab7d); +PROVIDE(r_flash_hp_call_callback = 0x02011ceb); +PROVIDE(flash_hp_enter_pe_df_mode = 0x0200aca1); PROVIDE(flash_hp_status_clear = 0x220000b1); PROVIDE(flash_hp_reset = 0x220000f5); PROVIDE(flash_hp_erase_block = 0x22000151); @@ -227,721 +227,723 @@ PROVIDE(flash_hp_bank_swap = 0x220003a9); PROVIDE(flash_hp_cf_erase = 0x2200040d); PROVIDE(flash_hp_access_window_set = 0x22000475); PROVIDE(flash_hp_set_startup_area_boot = 0x220004c5); -PROVIDE(R_BSP_IrqStatusClear = 0x0200acad); -PROVIDE(R_BSP_IrqEnableNoClear = 0x0200acc9); -PROVIDE(R_BSP_IrqEnable = 0x0200ace1); -PROVIDE(R_BSP_IrqDisable = 0x0200ad0d); -PROVIDE(R_FSP_CurrentIrqGet = 0x02011bc1); -PROVIDE(R_BSP_IrqStatusClear = 0x0200b129); -PROVIDE(R_BSP_IrqEnable = 0x02011bcb); -PROVIDE(R_BSP_IrqDisable = 0x0200b145); -PROVIDE(iic_master_notify = 0x02011bfb); -PROVIDE(iic_master_open_hw_master = 0x0200b165); -PROVIDE(iic_master_abort_seq_master = 0x02011c35); -PROVIDE(iic_master_run_hw_master = 0x0200b229); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02011d51); -PROVIDE(do_device_init = 0x02011d87); -PROVIDE(z_sys_init_run_level = 0x0200b98d); -PROVIDE(bg_thread_main = 0x0200b9bd); -PROVIDE(statics_init = 0x0200bc01); -PROVIDE(create_free_list = 0x02011ec1); -PROVIDE(init_mem_slab_obj_core_list = 0x0200bc25); -PROVIDE(init_mbox_module = 0x0200bc49); -PROVIDE(unpend_thread_no_timeout = 0x02011f17); -PROVIDE(adjust_owner_prio.isra.0 = 0x0201209d); -PROVIDE(unpend_thread_no_timeout = 0x020120bb); -PROVIDE(queue_insert = 0x020120d5); -PROVIDE(k_sys_work_q_init = 0x0200c1a1); -PROVIDE(flag_test_and_clear = 0x02012361); -PROVIDE(notify_queue_locked.isra.0 = 0x02012377); -PROVIDE(work_queue_main = 0x0200c1d5); -PROVIDE(submit_to_queue_locked = 0x0200c31d); -PROVIDE(work_timeout = 0x02012387); -PROVIDE(unpend_thread_no_timeout = 0x020123e9); -PROVIDE(sys_dlist_remove = 0x0201246b); -PROVIDE(unpend_thread_no_timeout = 0x0201247b); -PROVIDE(z_swap_irqlock = 0x0200c7c5); -PROVIDE(ready_thread = 0x0200c7f9); -PROVIDE(unready_thread = 0x0200c87d); -PROVIDE(add_to_waitq_locked = 0x0201248f); -PROVIDE(z_tick_sleep = 0x0200cd79); -PROVIDE(wait_for = 0x02012677); -PROVIDE(z_sched_wake_all.constprop.0 = 0x020126e9); -PROVIDE(slice_timeout = 0x0200d11d); -PROVIDE(first = 0x0200d319); -PROVIDE(elapsed = 0x0200d329); -PROVIDE(next_timeout = 0x02012919); -PROVIDE(remove_timeout = 0x0200d33d); -PROVIDE(clear_event_registrations = 0x0200d6e9); -PROVIDE(add_event = 0x02012a93); -PROVIDE(register_events = 0x02012ae7); -PROVIDE(signal_poll_event = 0x02012beb); -PROVIDE(z_heap_aligned_alloc = 0x02012ce7); -PROVIDE(__ultoa_invert = 0x02012fa5); -PROVIDE(skip_to_arg = 0x0200dbb9); -PROVIDE(mulShiftAll64 = 0x02013053); -PROVIDE(div10 = 0x0200e691); -PROVIDE(chunk_field = 0x0200ee19); -PROVIDE(chunk_set = 0x0200ee2f); -PROVIDE(chunk_size = 0x0200ee45); -PROVIDE(set_chunk_used = 0x0200ee51); -PROVIDE(set_chunk_size = 0x0200ee83); -PROVIDE(mem_to_chunkid = 0x0200ee8b); -PROVIDE(bucket_idx.isra.0 = 0x0200ee9f); -PROVIDE(free_list_remove_bidx = 0x0200eebb); -PROVIDE(free_list_remove = 0x0200ef17); -PROVIDE(alloc_chunk = 0x0200ef45); -PROVIDE(split_chunks = 0x0200efb9); -PROVIDE(merge_chunks = 0x0200f007); -PROVIDE(free_list_add = 0x0200f043); -PROVIDE(free_chunk = 0x0200f0c7); -PROVIDE(ring_buf_put_claim = 0x0200f6d3); -PROVIDE(ring_buf_get_claim = 0x0200f6f1); -PROVIDE(panic = 0x0201077b); -PROVIDE(process_log_msg.constprop.0 = 0x0201077d); -PROVIDE(process = 0x02010809); -PROVIDE(dropped = 0x02010849); -PROVIDE(remove_from_tail.part.0 = 0x02010b07); -PROVIDE(foldcase = 0x02010f2d); -PROVIDE(fnmatchx = 0x02010f41); -PROVIDE(flash_get_page_info = 0x020114a5); +PROVIDE(R_BSP_IrqStatusClear = 0x0200ae85); +PROVIDE(R_BSP_IrqEnableNoClear = 0x0200aea1); +PROVIDE(R_BSP_IrqEnable = 0x0200aeb9); +PROVIDE(R_BSP_IrqDisable = 0x0200aee5); +PROVIDE(R_FSP_CurrentIrqGet = 0x02011d99); +PROVIDE(R_BSP_IrqStatusClear = 0x0200b301); +PROVIDE(R_BSP_IrqEnable = 0x02011da3); +PROVIDE(R_BSP_IrqDisable = 0x0200b31d); +PROVIDE(iic_master_notify = 0x02011dd3); +PROVIDE(iic_master_open_hw_master = 0x0200b33d); +PROVIDE(iic_master_abort_seq_master = 0x02011e0d); +PROVIDE(iic_master_run_hw_master = 0x0200b401); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x02011f29); +PROVIDE(do_device_init = 0x02011f5f); +PROVIDE(z_sys_init_run_level = 0x0200bb65); +PROVIDE(bg_thread_main = 0x0200bb95); +PROVIDE(statics_init = 0x0200bdd9); +PROVIDE(create_free_list = 0x02012099); +PROVIDE(init_mem_slab_obj_core_list = 0x0200bdfd); +PROVIDE(init_mbox_module = 0x0200be21); +PROVIDE(unpend_thread_no_timeout = 0x020120ef); +PROVIDE(adjust_owner_prio.isra.0 = 0x02012275); +PROVIDE(unpend_thread_no_timeout = 0x02012293); +PROVIDE(queue_insert = 0x020122ad); +PROVIDE(k_sys_work_q_init = 0x0200c379); +PROVIDE(flag_test_and_clear = 0x02012539); +PROVIDE(notify_queue_locked.isra.0 = 0x0201254f); +PROVIDE(work_queue_main = 0x0200c3ad); +PROVIDE(submit_to_queue_locked = 0x0200c4f5); +PROVIDE(work_timeout = 0x0201255f); +PROVIDE(unpend_thread_no_timeout = 0x020125c1); +PROVIDE(sys_dlist_remove = 0x02012643); +PROVIDE(unpend_thread_no_timeout = 0x02012653); +PROVIDE(z_swap_irqlock = 0x0200c99d); +PROVIDE(ready_thread = 0x0200c9d1); +PROVIDE(unready_thread = 0x0200ca55); +PROVIDE(add_to_waitq_locked = 0x02012667); +PROVIDE(z_tick_sleep = 0x0200cf51); +PROVIDE(wait_for = 0x0201284f); +PROVIDE(z_sched_wake_all.constprop.0 = 0x020128c1); +PROVIDE(slice_timeout = 0x0200d2f5); +PROVIDE(first = 0x0200d4f1); +PROVIDE(elapsed = 0x0200d501); +PROVIDE(next_timeout = 0x02012af1); +PROVIDE(remove_timeout = 0x0200d515); +PROVIDE(clear_event_registrations = 0x0200d8c1); +PROVIDE(add_event = 0x02012c6b); +PROVIDE(register_events = 0x02012cbf); +PROVIDE(signal_poll_event = 0x02012dc3); +PROVIDE(z_heap_aligned_alloc = 0x02012ebf); +PROVIDE(__ultoa_invert = 0x0201317d); +PROVIDE(skip_to_arg = 0x0200dd91); +PROVIDE(mulShiftAll64 = 0x0201322b); +PROVIDE(div10 = 0x0200e869); +PROVIDE(chunk_field = 0x0200eff1); +PROVIDE(chunk_set = 0x0200f007); +PROVIDE(chunk_size = 0x0200f01d); +PROVIDE(set_chunk_used = 0x0200f029); +PROVIDE(set_chunk_size = 0x0200f05b); +PROVIDE(mem_to_chunkid = 0x0200f063); +PROVIDE(bucket_idx.isra.0 = 0x0200f077); +PROVIDE(free_list_remove_bidx = 0x0200f093); +PROVIDE(free_list_remove = 0x0200f0ef); +PROVIDE(alloc_chunk = 0x0200f11d); +PROVIDE(split_chunks = 0x0200f191); +PROVIDE(merge_chunks = 0x0200f1df); +PROVIDE(free_list_add = 0x0200f21b); +PROVIDE(free_chunk = 0x0200f29f); +PROVIDE(ring_buf_put_claim = 0x0200f8ab); +PROVIDE(ring_buf_get_claim = 0x0200f8c9); +PROVIDE(panic = 0x02010953); +PROVIDE(process_log_msg.constprop.0 = 0x02010955); +PROVIDE(process = 0x020109e1); +PROVIDE(dropped = 0x02010a21); +PROVIDE(remove_from_tail.part.0 = 0x02010cdf); +PROVIDE(foldcase = 0x02011105); +PROVIDE(fnmatchx = 0x02011119); +PROVIDE(flash_get_page_info = 0x0201167d); PROVIDE(__memset_veneer = 0x22000539); PROVIDE(__R_BSP_IrqDisable_veneer = 0x22000541); PROVIDE(__flash_hp_enter_pe_df_mode_veneer = 0x22000549); -PROVIDE(__flash_hp_erase_block_veneer = 0x020133b9); -PROVIDE(__flash_hp_write_data_veneer = 0x020133c1); -PROVIDE(__flash_hp_check_errors_veneer = 0x020133c9); -PROVIDE(__flash_hp_pe_mode_exit_veneer = 0x020133d1); -PROVIDE(__flash_hp_reset_veneer = 0x020133d9); -PROVIDE(__flash_hp_cf_erase_veneer = 0x020133e1); -PROVIDE(__flash_hp_cf_write_veneer = 0x020133e9); -PROVIDE(z_abort_timeout = 0x0201294b); -PROVIDE(putchar = 0x0200d90d); -PROVIDE(getopt_state_get = 0x02007345); +PROVIDE(__flash_hp_cf_erase_veneer = 0x02013591); +PROVIDE(__flash_hp_reset_veneer = 0x02013599); +PROVIDE(__flash_hp_write_data_veneer = 0x020135a1); +PROVIDE(__flash_hp_check_errors_veneer = 0x020135a9); +PROVIDE(__flash_hp_erase_block_veneer = 0x020135b1); +PROVIDE(__flash_hp_pe_mode_exit_veneer = 0x020135b9); +PROVIDE(__flash_hp_cf_write_veneer = 0x020135c1); +PROVIDE(z_abort_timeout = 0x02012b23); +PROVIDE(putchar = 0x0200dae5); +PROVIDE(getopt_state_get = 0x0200751d); PROVIDE(__aeabi_dcmpun = 0x02000b01); -PROVIDE(z_arm_bus_fault = 0x02006d19); -PROVIDE(z_impl_k_msgq_get_attrs = 0x02011f91); +PROVIDE(z_arm_bus_fault = 0x02006ef1); +PROVIDE(z_impl_k_msgq_get_attrs = 0x02012169); PROVIDE(__aeabi_dcmple = 0x02000ac5); -PROVIDE(z_init_thread_base = 0x02012433); +PROVIDE(z_init_thread_base = 0x0201260b); PROVIDE(strcpy = 0x02001075); -PROVIDE(z_arm_pendsv = 0x02006d9d); -PROVIDE(R_DTC_Reload = 0x02011ae3); -PROVIDE(z_impl_flash_get_page_info_by_offs = 0x0201150b); -PROVIDE(z_impl_k_is_preempt_thread = 0x0200c5b5); -PROVIDE(k_is_in_isr = 0x0201240b); -PROVIDE(k_fatal_halt = 0x02011d81); +PROVIDE(z_arm_pendsv = 0x02006f75); +PROVIDE(R_DTC_Reload = 0x02011cbb); +PROVIDE(z_impl_flash_get_page_info_by_offs = 0x020116e3); +PROVIDE(z_impl_k_is_preempt_thread = 0x0200c78d); +PROVIDE(k_is_in_isr = 0x020125e3); +PROVIDE(k_fatal_halt = 0x02011f59); PROVIDE(__cmpdf2 = 0x02000a01); -PROVIDE(move_thread_to_end_of_prio_q = 0x0200c8d1); -PROVIDE(R_DTC_Disable = 0x0200a6b5); -PROVIDE(z_arm_reset = 0x02006d2d); -PROVIDE(sys_clock_announce = 0x0200d461); -PROVIDE(z_impl_k_thread_create = 0x0200c74d); -PROVIDE(sys_heap_free = 0x0200f14b); -PROVIDE(z_unpend_thread_no_timeout = 0x020124fd); +PROVIDE(move_thread_to_end_of_prio_q = 0x0200caa9); +PROVIDE(R_DTC_Disable = 0x0200a88d); +PROVIDE(z_arm_reset = 0x02006f05); +PROVIDE(sys_clock_announce = 0x0200d639); +PROVIDE(z_impl_k_thread_create = 0x0200c925); +PROVIDE(sys_heap_free = 0x0200f323); +PROVIDE(z_unpend_thread_no_timeout = 0x020126d5); PROVIDE(__eqdf2 = 0x02000a01); -PROVIDE(z_shell_multiline_data_calc = 0x0200ffa3); -PROVIDE(R_IIC_MASTER_Open = 0x0200b319); -PROVIDE(z_impl_zephyr_fputc = 0x0200708d); +PROVIDE(z_shell_multiline_data_calc = 0x0201017b); +PROVIDE(R_IIC_MASTER_Open = 0x0200b4f1); +PROVIDE(z_impl_zephyr_fputc = 0x02007265); PROVIDE(bsp_prv_software_delay_loop = 0x020014f1); -PROVIDE(sys_clock_tick_get_32 = 0x0201298d); -PROVIDE(z_impl_k_msgq_get = 0x0200bd3d); -PROVIDE(R_DTC_SoftwareStart = 0x02011adb); -PROVIDE(z_impl_k_reschedule = 0x0200cc9d); -PROVIDE(R_DTC_Enable = 0x0200a695); +PROVIDE(sys_clock_tick_get_32 = 0x02012b65); +PROVIDE(z_impl_k_msgq_get = 0x0200bf15); +PROVIDE(R_DTC_SoftwareStart = 0x02011cb3); +PROVIDE(z_impl_k_reschedule = 0x0200ce75); +PROVIDE(R_DTC_Enable = 0x0200a86d); PROVIDE(__floatdidf = 0x02000571); -PROVIDE(__double_computePow5 = 0x0200ebe1); -PROVIDE(__aeabi_read_tp = 0x020133ad); -PROVIDE(k_work_queue_start = 0x0200c3d1); -PROVIDE(printf = 0x0200d8e9); -PROVIDE(R_SCI_B_UART_BaudCalculate = 0x0200a501); -PROVIDE(__wrap_random = 0x0200d895); -PROVIDE(z_shell_cmd_get = 0x0200567d); -PROVIDE(z_shell_history_get = 0x02010b31); -PROVIDE(z_shell_cmd_line_erase = 0x0201054f); -PROVIDE(putc_unlocked = 0x02013383); -PROVIDE(z_impl_device_init = 0x02011dbd); -PROVIDE(R_DTC_Open = 0x0200a795); -PROVIDE(sys_clock_tick_get = 0x0200d511); -PROVIDE(z_arm_usage_fault = 0x02006d19); -PROVIDE(z_impl_k_pipe_write = 0x02012733); -PROVIDE(llext_iterate = 0x02007431); -PROVIDE(llext_unload = 0x02007595); -PROVIDE(z_shell_op_delete_from_cursor = 0x02010533); -PROVIDE(z_impl_k_thread_name_set = 0x0200c5d5); -PROVIDE(z_shell_vt100_colors_restore = 0x0200587d); -PROVIDE(memmove = 0x02012d47); -PROVIDE(z_impl_k_usleep = 0x02012613); -PROVIDE(z_shell_op_char_insert = 0x02005a69); -PROVIDE(z_arm_mpu_fault = 0x02006d19); -PROVIDE(snprintf = 0x0200d959); -PROVIDE(z_impl_k_stack_pop = 0x0200c139); -PROVIDE(__dtox_engine = 0x02013241); -PROVIDE(cbpprintf_external = 0x0200f4c1); -PROVIDE(llext_file_offset = 0x020112af); +PROVIDE(__double_computePow5 = 0x0200edb9); +PROVIDE(__aeabi_read_tp = 0x02013585); +PROVIDE(k_work_queue_start = 0x0200c5a9); +PROVIDE(printf = 0x0200dac1); +PROVIDE(R_SCI_B_UART_BaudCalculate = 0x0200a6d9); +PROVIDE(__wrap_random = 0x0200da6d); +PROVIDE(z_shell_cmd_get = 0x02005855); +PROVIDE(z_shell_history_get = 0x02010d09); +PROVIDE(z_shell_cmd_line_erase = 0x02010727); +PROVIDE(atan2l = 0x02001c59); +PROVIDE(putc_unlocked = 0x0201355b); +PROVIDE(z_impl_device_init = 0x02011f95); +PROVIDE(R_DTC_Open = 0x0200a96d); +PROVIDE(sys_clock_tick_get = 0x0200d6e9); +PROVIDE(z_arm_usage_fault = 0x02006ef1); +PROVIDE(z_impl_k_pipe_write = 0x0201290b); +PROVIDE(llext_iterate = 0x02007609); +PROVIDE(llext_unload = 0x0200776d); +PROVIDE(z_shell_op_delete_from_cursor = 0x0201070b); +PROVIDE(z_impl_k_thread_name_set = 0x0200c7ad); +PROVIDE(z_shell_vt100_colors_restore = 0x02005a55); +PROVIDE(memmove = 0x02012f1f); +PROVIDE(z_impl_k_usleep = 0x020127eb); +PROVIDE(z_shell_op_char_insert = 0x02005c41); +PROVIDE(z_arm_mpu_fault = 0x02006ef1); +PROVIDE(snprintf = 0x0200db31); +PROVIDE(z_impl_k_stack_pop = 0x0200c311); +PROVIDE(__dtox_engine = 0x02013419); +PROVIDE(cbpprintf_external = 0x0200f699); +PROVIDE(llext_file_offset = 0x02011487); PROVIDE(__gtdf2 = 0x020009f1); -PROVIDE(atol = 0x02012e59); -PROVIDE(k_msgq_init = 0x02011f31); -PROVIDE(z_shell_log_backend_output_func = 0x02010871); -PROVIDE(sys_timepoint_timeout = 0x020129e1); -PROVIDE(arch_elf_relocate = 0x020062ad); -PROVIDE(z_thread_entry = 0x02003335); -PROVIDE(z_impl_k_yield = 0x0200ccf1); +PROVIDE(atol = 0x02013031); +PROVIDE(k_msgq_init = 0x02012109); +PROVIDE(z_shell_log_backend_output_func = 0x02010a49); +PROVIDE(sys_timepoint_timeout = 0x02012bb9); +PROVIDE(arch_elf_relocate = 0x02006485); +PROVIDE(z_thread_entry = 0x0200350d); +PROVIDE(z_impl_k_yield = 0x0200cec9); PROVIDE(__aeabi_d2lz = 0x02001095); -PROVIDE(__do_global_ctors_aux = 0x0200bbc9); -PROVIDE(arch_float_enable = 0x02010ee9); +PROVIDE(__do_global_ctors_aux = 0x0200bda1); +PROVIDE(arch_float_enable = 0x020110c1); PROVIDE(strtold = 0x02001501); -PROVIDE(z_impl_k_thread_stack_free = 0x02012d27); -PROVIDE(z_shell_fprintf = 0x02010657); -PROVIDE(__shiftright128 = 0x02013203); -PROVIDE(soc_early_init_hook = 0x02003369); -PROVIDE(z_impl_k_pipe_init = 0x02012703); +PROVIDE(z_impl_k_thread_stack_free = 0x02012eff); +PROVIDE(z_shell_fprintf = 0x0201082f); +PROVIDE(__shiftright128 = 0x020133db); +PROVIDE(soc_early_init_hook = 0x02003541); +PROVIDE(z_impl_k_pipe_init = 0x020128db); PROVIDE(__aeabi_cdcmple = 0x02000a8d); PROVIDE(__aeabi_fadd = 0x02000c69); PROVIDE(__subsf3 = 0x02000c65); -PROVIDE(k_thread_foreach = 0x0200d265); -PROVIDE(sys_clock_cycle_get_64 = 0x02009e2d); -PROVIDE(z_log_get_tag = 0x0200f863); -PROVIDE(__fpclassifyl = 0x0200edbd); -PROVIDE(z_shell_backend_rx_buffer_flush = 0x02010751); -PROVIDE(z_impl_k_timer_stop = 0x02012a3b); -PROVIDE(z_dummy_thread_init = 0x0200c7a5); -PROVIDE(z_impl_k_thread_stack_space_get = 0x02012461); -PROVIDE(z_impl_k_thread_priority_get = 0x02012417); -PROVIDE(z_impl_k_msgq_put = 0x0200bc7d); -PROVIDE(cbprintf_package_convert = 0x02002fa9); -PROVIDE(sys_heap_aligned_alloc = 0x0200f1df); -PROVIDE(iic_master_tei_isr = 0x0200b645); -PROVIDE(k_heap_init = 0x02011ddd); +PROVIDE(k_thread_foreach = 0x0200d43d); +PROVIDE(sys_clock_cycle_get_64 = 0x0200a005); +PROVIDE(z_log_get_tag = 0x0200fa3b); +PROVIDE(__fpclassifyl = 0x0200ef95); +PROVIDE(z_shell_backend_rx_buffer_flush = 0x02010929); +PROVIDE(z_impl_k_timer_stop = 0x02012c13); +PROVIDE(z_dummy_thread_init = 0x0200c97d); +PROVIDE(z_impl_k_thread_stack_space_get = 0x02012639); +PROVIDE(z_impl_k_thread_priority_get = 0x020125ef); +PROVIDE(z_impl_k_msgq_put = 0x0200be55); +PROVIDE(cbprintf_package_convert = 0x02003181); +PROVIDE(sys_heap_aligned_alloc = 0x0200f3b7); +PROVIDE(iic_master_tei_isr = 0x0200b81d); +PROVIDE(k_heap_init = 0x02011fb5); PROVIDE(__atod_engine = 0x02001891); -PROVIDE(k_sys_fatal_error_handler = 0x0200b875); -PROVIDE(memcpy = 0x02012d2d); +PROVIDE(k_sys_fatal_error_handler = 0x0200ba4d); +PROVIDE(memcpy = 0x02012f05); PROVIDE(__aeabi_cdrcmple = 0x02000a7d); -PROVIDE(__log10Pow5 = 0x0200eb79); -PROVIDE(z_shell_find_cmd = 0x020101bd); -PROVIDE(log_output_process = 0x0200399d); -PROVIDE(z_work_submit_to_queue = 0x020123c3); -PROVIDE(__math_invalid = 0x02002071); -PROVIDE(z_do_kernel_oops = 0x02010e8b); -PROVIDE(z_shell_op_right_arrow = 0x0201051d); -PROVIDE(z_getopt_global_state_update = 0x02007311); +PROVIDE(__log10Pow5 = 0x0200ed51); +PROVIDE(z_shell_find_cmd = 0x02010395); +PROVIDE(log_output_process = 0x02003b75); +PROVIDE(z_work_submit_to_queue = 0x0201259b); +PROVIDE(__math_invalid = 0x02002249); +PROVIDE(z_do_kernel_oops = 0x02011063); +PROVIDE(z_shell_op_right_arrow = 0x020106f5); +PROVIDE(z_getopt_global_state_update = 0x020074e9); PROVIDE(__aeabi_fcmpgt = 0x02000f51); PROVIDE(__floatsidf = 0x020004f9); -PROVIDE(R_SPI_B_Open = 0x0200ada9); -PROVIDE(z_impl_flash_fill = 0x02006045); -PROVIDE(z_shell_vfprintf = 0x0201060b); -PROVIDE(llext_buf_seek = 0x02011353); -PROVIDE(sinl = 0x02001f69); +PROVIDE(R_SPI_B_Open = 0x0200af81); +PROVIDE(z_impl_flash_fill = 0x0200621d); +PROVIDE(z_shell_vfprintf = 0x020107e3); +PROVIDE(llext_buf_seek = 0x0201152b); +PROVIDE(sinl = 0x02002141); PROVIDE(__ltdf2 = 0x020009f9); -PROVIDE(z_sched_wake_thread = 0x0201251f); -PROVIDE(z_cstart = 0x0200bb09); +PROVIDE(z_sched_wake_thread = 0x020126f7); +PROVIDE(z_cstart = 0x0200bce1); PROVIDE(__aeabi_uldivmod = 0x02001031); -PROVIDE(puts = 0x0200d919); -PROVIDE(z_impl_k_pipe_read = 0x0200d035); -PROVIDE(islower = 0x02012ddf); -PROVIDE(__fpclassifyd = 0x0200edbd); -PROVIDE(tolower = 0x02012e33); -PROVIDE(log_msg_get_source_id = 0x02003941); -PROVIDE(__wrap_malloc = 0x02007115); -PROVIDE(flash_area_read = 0x0200faa5); +PROVIDE(puts = 0x0200daf1); +PROVIDE(z_impl_k_pipe_read = 0x0200d20d); +PROVIDE(islower = 0x02012fb7); +PROVIDE(__fpclassifyd = 0x0200ef95); +PROVIDE(tolower = 0x0201300b); +PROVIDE(log_msg_get_source_id = 0x02003b19); +PROVIDE(__wrap_malloc = 0x020072ed); +PROVIDE(flash_area_read = 0x0200fc7d); PROVIDE(__udivsi3 = 0x02000201); -PROVIDE(z_init_static = 0x02011dcf); -PROVIDE(z_shell_spaces_trim = 0x0201026f); -PROVIDE(shell_process = 0x02004ca1); -PROVIDE(sys_clock_isr = 0x02009c6d); +PROVIDE(z_init_static = 0x02011fa7); +PROVIDE(z_shell_spaces_trim = 0x02010447); +PROVIDE(shell_process = 0x02004e79); +PROVIDE(sys_clock_isr = 0x02009e45); PROVIDE(__aeabi_i2f = 0x02000dd1); -PROVIDE(z_impl_k_thread_join = 0x0200cf91); -PROVIDE(__aeabi_memmove8 = 0x02012d47); -PROVIDE(arch_spin_relax = 0x02011efd); -PROVIDE(z_log_msg_finalize = 0x0200f8e9); -PROVIDE(z_impl_k_thread_name_copy = 0x02012421); -PROVIDE(z_impl_k_mutex_lock = 0x0200be05); -PROVIDE(__kernel_cos = 0x020020a1); -PROVIDE(ldexp = 0x02002959); +PROVIDE(z_impl_k_thread_join = 0x0200d169); +PROVIDE(__aeabi_memmove8 = 0x02012f1f); +PROVIDE(arch_spin_relax = 0x020120d5); +PROVIDE(z_log_msg_finalize = 0x0200fac1); +PROVIDE(z_impl_k_thread_name_copy = 0x020125f9); +PROVIDE(z_impl_k_mutex_lock = 0x0200bfdd); +PROVIDE(__kernel_cos = 0x02002279); +PROVIDE(ldexp = 0x02002b31); PROVIDE(__lesf2 = 0x02000e81); -PROVIDE(z_impl_k_condvar_wait = 0x0200c569); -PROVIDE(k_work_schedule = 0x0200c4a1); +PROVIDE(z_impl_k_condvar_wait = 0x0200c741); +PROVIDE(k_work_schedule = 0x0200c679); PROVIDE(__fixunsdfsi = 0x02000b7d); -PROVIDE(z_log_notify_backend_enabled = 0x0200f859); -PROVIDE(z_shell_op_cursor_vert_move = 0x02005769); -PROVIDE(__aeabi_memcpy = 0x02012d2d); -PROVIDE(z_sched_init = 0x0200cc61); -PROVIDE(llext_call_fn = 0x020111a5); -PROVIDE(_OffsetAbsSyms = 0x0200ee09); -PROVIDE(z_unpend_all = 0x0201259d); -PROVIDE(z_shell_history_mode_exit = 0x02010b2b); -PROVIDE(z_impl_k_sem_take = 0x0200c06d); -PROVIDE(__printk_hook_install = 0x0200330d); -PROVIDE(strtoul = 0x0200daed); +PROVIDE(z_log_notify_backend_enabled = 0x0200fa31); +PROVIDE(z_shell_op_cursor_vert_move = 0x02005941); +PROVIDE(__aeabi_memcpy = 0x02012f05); +PROVIDE(z_sched_init = 0x0200ce39); +PROVIDE(llext_call_fn = 0x0201137d); +PROVIDE(_OffsetAbsSyms = 0x0200efe1); +PROVIDE(z_unpend_all = 0x02012775); +PROVIDE(z_shell_history_mode_exit = 0x02010d03); +PROVIDE(z_impl_k_sem_take = 0x0200c245); +PROVIDE(__printk_hook_install = 0x020034e5); +PROVIDE(strtoul = 0x0200dcc5); PROVIDE(__aeabi_ui2d = 0x020004d9); -PROVIDE(z_shell_wildcard_process = 0x02005f61); -PROVIDE(shell_start = 0x0200fcef); -PROVIDE(k_heap_aligned_alloc = 0x02011df3); -PROVIDE(k_sched_lock = 0x0200cbd1); +PROVIDE(z_shell_wildcard_process = 0x02006139); +PROVIDE(shell_start = 0x0200fec7); +PROVIDE(k_heap_aligned_alloc = 0x02011fcb); +PROVIDE(k_sched_lock = 0x0200cda9); PROVIDE(__udivmoddi4 = 0x020010c5); PROVIDE(__aeabi_drsub = 0x02000255); -PROVIDE(sys_clock_set_timeout = 0x02009ccd); -PROVIDE(shell_fprintf_warn = 0x0200fe25); -PROVIDE(sys_clock_cycle_get_32 = 0x02009e05); -PROVIDE(z_shell_op_word_remove = 0x020058bd); -PROVIDE(llext_free_inspection_data = 0x02007855); -PROVIDE(R_IIC_MASTER_Read = 0x02011ca7); -PROVIDE(hex2bin = 0x0200f631); -PROVIDE(R_DTC_Close = 0x0200a725); -PROVIDE(z_sched_wait = 0x0200d011); -PROVIDE(isspace = 0x02012df7); +PROVIDE(sys_clock_set_timeout = 0x02009ea5); +PROVIDE(shell_fprintf_warn = 0x0200fffd); +PROVIDE(sys_clock_cycle_get_32 = 0x02009fdd); +PROVIDE(z_shell_op_word_remove = 0x02005a95); +PROVIDE(llext_free_inspection_data = 0x02007a2d); +PROVIDE(R_IIC_MASTER_Read = 0x02011e7f); +PROVIDE(hex2bin = 0x0200f809); +PROVIDE(R_DTC_Close = 0x0200a8fd); +PROVIDE(z_sched_wait = 0x0200d1e9); +PROVIDE(isspace = 0x02012fcf); PROVIDE(__aeabi_dcmplt = 0x02000ab1); -PROVIDE(__aeabi_memmove = 0x02012d47); -PROVIDE(R_FLASH_HP_Open = 0x0200aa6d); -PROVIDE(arm_irq_disable = 0x02006e71); -PROVIDE(z_shell_print_stream = 0x02010607); -PROVIDE(__kernel_sin = 0x02002679); +PROVIDE(__aeabi_memmove = 0x02012f1f); +PROVIDE(R_FLASH_HP_Open = 0x0200ac45); +PROVIDE(arm_irq_disable = 0x02007049); +PROVIDE(z_shell_print_stream = 0x020107df); +PROVIDE(__kernel_sin = 0x02002851); PROVIDE(__extendsfdf2 = 0x0200051d); PROVIDE(__aeabi_ddiv = 0x02000821); -PROVIDE(shell_hexdump_line = 0x02005491); -PROVIDE(char2hex = 0x0200f601); -PROVIDE(llext_find_sym = 0x0200746d); +PROVIDE(shell_hexdump_line = 0x02005669); +PROVIDE(char2hex = 0x0200f7d9); +PROVIDE(llext_find_sym = 0x02007645); PROVIDE(__adddf3 = 0x02000261); PROVIDE(__nesf2 = 0x02000e89); -PROVIDE(z_impl_k_busy_wait = 0x02011ceb); -PROVIDE(filter_set = 0x0200365d); +PROVIDE(z_impl_k_busy_wait = 0x02011ec3); +PROVIDE(filter_set = 0x02003835); PROVIDE(__aeabi_dmul = 0x020005cd); -PROVIDE(__aeabi_memcpy4 = 0x02012d2d); -PROVIDE(log_backend_disable = 0x0200f8a5); -PROVIDE(__do_init_array_aux = 0x0200bbe5); -PROVIDE(z_bss_zero = 0x0200ba81); -PROVIDE(z_thread_monitor_exit = 0x0200d229); -PROVIDE(arch_cpu_idle = 0x02010efd); -PROVIDE(z_impl_k_stack_push = 0x020122e5); -PROVIDE(z_shell_make_argv = 0x0200ffcf); -PROVIDE(abort = 0x020070b5); +PROVIDE(__aeabi_memcpy4 = 0x02012f05); +PROVIDE(log_backend_disable = 0x0200fa7d); +PROVIDE(__do_init_array_aux = 0x0200bdbd); +PROVIDE(z_bss_zero = 0x0200bc59); +PROVIDE(z_thread_monitor_exit = 0x0200d401); +PROVIDE(arch_cpu_idle = 0x020110d5); +PROVIDE(z_impl_k_stack_push = 0x020124bd); +PROVIDE(z_shell_make_argv = 0x020101a7); +PROVIDE(abort = 0x0200728d); PROVIDE(__floatunsidf = 0x020004d9); -PROVIDE(iic_master_eri_isr = 0x0200b6ed); -PROVIDE(iic_master_txi_isr = 0x0200b535); -PROVIDE(z_shell_print_cmd = 0x020057c1); -PROVIDE(bsp_clock_init = 0x02009ea5); +PROVIDE(iic_master_eri_isr = 0x0200b8c5); +PROVIDE(iic_master_txi_isr = 0x0200b70d); +PROVIDE(z_shell_print_cmd = 0x02005999); +PROVIDE(bsp_clock_init = 0x0200a07d); PROVIDE(flash_hp_configuration_area_write = 0x22000289); -PROVIDE(k_thread_foreach_unlocked = 0x0200d299); -PROVIDE(z_impl_k_sem_init = 0x02012289); -PROVIDE(z_shell_history_put = 0x02010b9f); -PROVIDE(isxdigit = 0x02012e17); -PROVIDE(gpio_ra_isr = 0x0200893d); -PROVIDE(strtol = 0x0200da01); -PROVIDE(__d_vfprintf = 0x0200dced); -PROVIDE(log_output_timestamp_freq_set = 0x02003c79); -PROVIDE(strnlen = 0x02012f35); +PROVIDE(k_thread_foreach_unlocked = 0x0200d471); +PROVIDE(z_impl_k_sem_init = 0x02012461); +PROVIDE(z_shell_history_put = 0x02010d77); +PROVIDE(isxdigit = 0x02012fef); +PROVIDE(gpio_ra_isr = 0x02008b15); +PROVIDE(strtol = 0x0200dbd9); +PROVIDE(__d_vfprintf = 0x0200dec5); +PROVIDE(log_output_timestamp_freq_set = 0x02003e51); +PROVIDE(strnlen = 0x0201310d); PROVIDE(__aeabi_d2f = 0x02000bbd); -PROVIDE(llext_buf_peek = 0x02011367); -PROVIDE(z_log_vprintk = 0x0200f83d); +PROVIDE(llext_buf_peek = 0x0201153f); +PROVIDE(z_log_vprintk = 0x0200fa15); PROVIDE(__aeabi_d2ulz = 0x020001c1); -PROVIDE(z_impl_k_float_disable = 0x02011ef5); +PROVIDE(z_impl_k_float_disable = 0x020120cd); PROVIDE(__aeabi_fsub = 0x02000c65); -PROVIDE(__kernel_rem_pio2 = 0x02002171); -PROVIDE(z_sched_wake = 0x02012635); -PROVIDE(log_source_id_get = 0x02003625); -PROVIDE(R_SPI_B_Close = 0x0200ad2d); -PROVIDE(z_shell_print_prompt_and_cmd = 0x02005add); +PROVIDE(__kernel_rem_pio2 = 0x02002349); +PROVIDE(z_sched_wake = 0x0201280d); +PROVIDE(log_source_id_get = 0x020037fd); +PROVIDE(R_SPI_B_Close = 0x0200af05); +PROVIDE(z_shell_print_prompt_and_cmd = 0x02005cb5); PROVIDE(__aeabi_fcmpun = 0x02000f65); -PROVIDE(strrchr = 0x02012f4d); -PROVIDE(z_early_memcpy = 0x02011db9); -PROVIDE(z_impl_k_float_enable = 0x02011ef9); +PROVIDE(strrchr = 0x02013125); +PROVIDE(z_early_memcpy = 0x02011f91); +PROVIDE(z_impl_k_float_enable = 0x020120d1); PROVIDE(atanl = 0x02001a59); PROVIDE(__aeabi_fcmpge = 0x02000f3d); PROVIDE(__fixdfsi = 0x02000b2d); -PROVIDE(z_impl_k_timer_status_sync = 0x0200d695); -PROVIDE(__wrap_calloc = 0x0200719d); -PROVIDE(z_impl_k_msgq_peek_at = 0x02011fd1); -PROVIDE(R_DTC_Reconfigure = 0x0200a8b1); -PROVIDE(z_timer_expiration_handler = 0x0200d541); -PROVIDE(z_shell_cmd_trim = 0x020102cf); +PROVIDE(z_impl_k_timer_status_sync = 0x0200d86d); +PROVIDE(__wrap_calloc = 0x02007375); +PROVIDE(z_impl_k_msgq_peek_at = 0x020121a9); +PROVIDE(R_DTC_Reconfigure = 0x0200aa89); +PROVIDE(z_timer_expiration_handler = 0x0200d719); +PROVIDE(z_shell_cmd_trim = 0x020104a7); PROVIDE(__floatdisf = 0x02000dfd); PROVIDE(strtod = 0x02001501); -PROVIDE(z_shell_cursor_in_empty_line = 0x02010385); -PROVIDE(z_impl_k_str_out = 0x02003319); -PROVIDE(k_aligned_alloc = 0x0200d849); -PROVIDE(R_FLASH_HP_Erase = 0x0200ab1d); -PROVIDE(z_arm_exc_exit = 0x02006685); -PROVIDE(atof = 0x02012e4b); -PROVIDE(shell_init = 0x0200555d); +PROVIDE(z_shell_cursor_in_empty_line = 0x0201055d); +PROVIDE(z_impl_k_str_out = 0x020034f1); +PROVIDE(k_aligned_alloc = 0x0200da21); +PROVIDE(R_FLASH_HP_Erase = 0x0200acf5); +PROVIDE(z_arm_exc_exit = 0x0200685d); +PROVIDE(atof = 0x02013023); +PROVIDE(shell_init = 0x02005735); PROVIDE(__gtsf2 = 0x02000e79); -PROVIDE(z_impl_log_buffered_cnt = 0x0200352d); +PROVIDE(z_impl_log_buffered_cnt = 0x02003705); PROVIDE(__aeabi_dadd = 0x02000261); PROVIDE(__ledf2 = 0x020009f9); -PROVIDE(__aeabi_memcpy8 = 0x02012d2d); -PROVIDE(z_impl_k_timer_status_get = 0x02012a73); -PROVIDE(k_free = 0x02012d0d); -PROVIDE(z_stack_space_get = 0x02012447); -PROVIDE(strcat = 0x02012eb9); +PROVIDE(__aeabi_memcpy8 = 0x02012f05); +PROVIDE(z_impl_k_timer_status_get = 0x02012c4b); +PROVIDE(k_free = 0x02012ee5); +PROVIDE(z_stack_space_get = 0x0201261f); +PROVIDE(strcat = 0x02013091); PROVIDE(__aeabi_fcmple = 0x02000f29); -PROVIDE(__math_oflow = 0x02002a51); -PROVIDE(z_shell_op_cursor_home_move = 0x020104eb); +PROVIDE(__math_oflow = 0x02002c29); +PROVIDE(z_shell_op_cursor_home_move = 0x020106c3); PROVIDE(__aeabi_ul2d = 0x02000561); -PROVIDE(z_impl_k_stack_alloc_init = 0x020122bd); -PROVIDE(arch_switch_to_main_thread = 0x02006fa9); -PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x0200f9a9); -PROVIDE(scalbnl = 0x02002959); -PROVIDE(z_data_copy = 0x0200d2e1); +PROVIDE(z_impl_k_stack_alloc_init = 0x02012495); +PROVIDE(arch_switch_to_main_thread = 0x02007181); +PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x0200fb81); +PROVIDE(scalbnl = 0x02002b31); +PROVIDE(z_data_copy = 0x0200d4b9); PROVIDE(flash_hp_check_errors = 0x22000239); PROVIDE(__aeabi_idiv = 0x02000225); -PROVIDE(z_shell_get_last_command = 0x02010213); -PROVIDE(__start = 0x02006d2d); -PROVIDE(z_impl_k_condvar_signal = 0x0200c4ad); -PROVIDE(R_DTC_Reset = 0x0200a825); -PROVIDE(z_impl_flash_get_page_info_by_idx = 0x02011513); -PROVIDE(R_SCI_B_UART_Close = 0x0200a169); -PROVIDE(z_impl_k_thread_abort = 0x02006d71); -PROVIDE(z_early_memset = 0x02011db5); -PROVIDE(z_impl_k_queue_init = 0x020121cd); -PROVIDE(__log2pow5 = 0x0200eb85); -PROVIDE(llext_bringup = 0x020111bb); -PROVIDE(k_thread_name_get = 0x0201241d); +PROVIDE(z_shell_get_last_command = 0x020103eb); +PROVIDE(__start = 0x02006f05); +PROVIDE(z_impl_k_condvar_signal = 0x0200c685); +PROVIDE(R_DTC_Reset = 0x0200a9fd); +PROVIDE(z_impl_flash_get_page_info_by_idx = 0x020116eb); +PROVIDE(R_SCI_B_UART_Close = 0x0200a341); +PROVIDE(z_impl_k_thread_abort = 0x02006f49); +PROVIDE(z_early_memset = 0x02011f8d); +PROVIDE(z_impl_k_queue_init = 0x020123a5); +PROVIDE(__log2pow5 = 0x0200ed5d); +PROVIDE(llext_bringup = 0x02011393); +PROVIDE(k_thread_name_get = 0x020125f5); PROVIDE(__aeabi_dcmpgt = 0x02000aed); -PROVIDE(ring_buf_put = 0x0200f741); -PROVIDE(ring_buf_area_finish = 0x0200f70f); -PROVIDE(z_impl_k_queue_peek_head = 0x02012279); -PROVIDE(cos = 0x02001c59); -PROVIDE(shell_fprintf_error = 0x0200fe41); -PROVIDE(z_impl_k_uptime_ticks = 0x02012995); -PROVIDE(arch_printk_char_out = 0x0200f571); +PROVIDE(ring_buf_put = 0x0200f919); +PROVIDE(ring_buf_area_finish = 0x0200f8e7); +PROVIDE(z_impl_k_queue_peek_head = 0x02012451); +PROVIDE(cos = 0x02001e31); +PROVIDE(shell_fprintf_error = 0x02010019); +PROVIDE(z_impl_k_uptime_ticks = 0x02012b6d); +PROVIDE(arch_printk_char_out = 0x0200f749); PROVIDE(flash_hp_pe_mode_exit = 0x22000001); -PROVIDE(z_impl_flash_get_page_count = 0x0201151d); +PROVIDE(z_impl_flash_get_page_count = 0x020116f5); PROVIDE(__aeabi_dcmpge = 0x02000ad9); -PROVIDE(__umul128 = 0x020131cd); -PROVIDE(z_shell_op_char_delete = 0x020106ed); +PROVIDE(__umul128 = 0x020133a5); +PROVIDE(z_shell_op_char_delete = 0x020108c5); PROVIDE(__aeabi_dsub = 0x0200025d); -PROVIDE(idle = 0x02011f01); -PROVIDE(z_shell_log_backend_enable = 0x02010885); -PROVIDE(z_impl_flash_copy = 0x02010d7b); -PROVIDE(z_impl_k_sem_give = 0x0200bff9); -PROVIDE(strstr = 0x02012f79); -PROVIDE(k_stack_init = 0x020122a9); -PROVIDE(do_llext_load = 0x02007885); -PROVIDE(sin = 0x02001f69); +PROVIDE(idle = 0x020120d9); +PROVIDE(z_shell_log_backend_enable = 0x02010a5d); +PROVIDE(z_impl_flash_copy = 0x02010f53); +PROVIDE(z_impl_k_sem_give = 0x0200c1d1); +PROVIDE(strstr = 0x02013151); +PROVIDE(k_stack_init = 0x02012481); +PROVIDE(do_llext_load = 0x02007a5d); +PROVIDE(sin = 0x02002141); PROVIDE(__floatundidf = 0x02000561); -PROVIDE(rand = 0x02012e61); -PROVIDE(z_impl_k_pipe_close = 0x020128eb); -PROVIDE(__cxa_pure_virtual = 0x0200ee17); -PROVIDE(thread_is_sliceable = 0x0200d13d); -PROVIDE(z_impl_log_filter_set = 0x0200f867); -PROVIDE(k_heap_free = 0x02011e89); -PROVIDE(llext_by_name = 0x020073f9); -PROVIDE(z_impl_log_panic = 0x020034f1); -PROVIDE(__rem_pio2 = 0x02001cf1); +PROVIDE(rand = 0x02013039); +PROVIDE(z_impl_k_pipe_close = 0x02012ac3); +PROVIDE(__cxa_pure_virtual = 0x0200efef); +PROVIDE(thread_is_sliceable = 0x0200d315); +PROVIDE(z_impl_log_filter_set = 0x0200fa3f); +PROVIDE(k_heap_free = 0x02012061); +PROVIDE(llext_by_name = 0x020075d1); +PROVIDE(atan2 = 0x02001c59); +PROVIDE(z_impl_log_panic = 0x020036c9); +PROVIDE(__rem_pio2 = 0x02001ec9); PROVIDE(__floatsisf = 0x02000dd1); -PROVIDE(z_impl_k_poll = 0x0200d749); -PROVIDE(z_impl_k_sleep = 0x020125c3); -PROVIDE(vprintk = 0x0200f575); -PROVIDE(z_queue_node_peek = 0x020121b5); -PROVIDE(log_output_msg_process = 0x0200fa3b); -PROVIDE(isupper = 0x02012e0b); -PROVIDE(bgo_callback = 0x02008a55); -PROVIDE(strncmp = 0x02012ef1); -PROVIDE(k_thread_state_str = 0x0200c5f5); -PROVIDE(z_thread_timeout = 0x02012559); -PROVIDE(z_impl_k_msgq_alloc_init = 0x02011f59); -PROVIDE(z_impl_device_is_ready = 0x02011d0b); -PROVIDE(z_thread_prio_set = 0x0200caa9); -PROVIDE(z_impl_flash_flatten = 0x02010d53); -PROVIDE(ring_buf_get = 0x0200f781); -PROVIDE(__pow5Factor = 0x0200ebb1); -PROVIDE(z_log_runtime_filters_init = 0x020035e9); -PROVIDE(strncpy = 0x02012f15); -PROVIDE(z_thread_abort = 0x0200ce4d); -PROVIDE(z_pend_curr = 0x0200ca51); +PROVIDE(z_impl_k_poll = 0x0200d921); +PROVIDE(z_impl_k_sleep = 0x0201279b); +PROVIDE(vprintk = 0x0200f74d); +PROVIDE(z_queue_node_peek = 0x0201238d); +PROVIDE(log_output_msg_process = 0x0200fc13); +PROVIDE(isupper = 0x02012fe3); +PROVIDE(bgo_callback = 0x02008c2d); +PROVIDE(strncmp = 0x020130c9); +PROVIDE(k_thread_state_str = 0x0200c7cd); +PROVIDE(z_thread_timeout = 0x02012731); +PROVIDE(z_impl_k_msgq_alloc_init = 0x02012131); +PROVIDE(z_impl_device_is_ready = 0x02011ee3); +PROVIDE(z_thread_prio_set = 0x0200cc81); +PROVIDE(z_impl_flash_flatten = 0x02010f2b); +PROVIDE(ring_buf_get = 0x0200f959); +PROVIDE(__pow5Factor = 0x0200ed89); +PROVIDE(z_log_runtime_filters_init = 0x020037c1); +PROVIDE(strncpy = 0x020130ed); +PROVIDE(z_thread_abort = 0x0200d025); +PROVIDE(z_pend_curr = 0x0200cc29); PROVIDE(__eqsf2 = 0x02000e89); -PROVIDE(_isr_wrapper = 0x02007031); -PROVIDE(strcasecmp = 0x02012e89); -PROVIDE(tanl = 0x02002009); -PROVIDE(z_arm_fault = 0x02006ac9); -PROVIDE(z_impl_k_queue_cancel_wait = 0x020121e7); -PROVIDE(llext_adjust_mmu_permissions = 0x02011221); -PROVIDE(z_impl_k_poll_signal_check = 0x02012cdd); -PROVIDE(__wrap_realloc = 0x02007149); -PROVIDE(R_DTC_CallbackSet = 0x02011ae7); -PROVIDE(R_SCI_B_UART_Open = 0x0200a22d); -PROVIDE(__file_str_put = 0x02013373); -PROVIDE(z_reschedule = 0x0200cb49); -PROVIDE(shell_help = 0x0200febf); -PROVIDE(z_impl_k_msgq_peek = 0x02011f9f); +PROVIDE(_isr_wrapper = 0x02007209); +PROVIDE(strcasecmp = 0x02013061); +PROVIDE(tanl = 0x020021e1); +PROVIDE(z_arm_fault = 0x02006ca1); +PROVIDE(z_impl_k_queue_cancel_wait = 0x020123bf); +PROVIDE(llext_adjust_mmu_permissions = 0x020113f9); +PROVIDE(z_impl_k_poll_signal_check = 0x02012eb5); +PROVIDE(__wrap_realloc = 0x02007321); +PROVIDE(R_DTC_CallbackSet = 0x02011cbf); +PROVIDE(R_SCI_B_UART_Open = 0x0200a405); +PROVIDE(__file_str_put = 0x0201354b); +PROVIDE(z_reschedule = 0x0200cd21); +PROVIDE(shell_help = 0x02010097); +PROVIDE(z_impl_k_msgq_peek = 0x02012177); PROVIDE(__aeabi_i2d = 0x020004f9); -PROVIDE(__aeabi_memmove4 = 0x02012d47); -PROVIDE(llext_read_symbol = 0x02011301); -PROVIDE(_ConfigAbsSyms = 0x0200f807); -PROVIDE(__dtoa_engine = 0x0200e6b9); -PROVIDE(memcmp = 0x02012e69); -PROVIDE(arm_irq_enable = 0x02006e55); +PROVIDE(__aeabi_memmove4 = 0x02012f1f); +PROVIDE(llext_read_symbol = 0x020114d9); +PROVIDE(_ConfigAbsSyms = 0x0200f9df); +PROVIDE(__dtoa_engine = 0x0200e891); +PROVIDE(memcmp = 0x02013041); +PROVIDE(arm_irq_enable = 0x0200702d); PROVIDE(__floatundisf = 0x02000ded); -PROVIDE(z_device_get_all_static = 0x0200b7b9); -PROVIDE(z_arm_exc_spurious = 0x02006d19); -PROVIDE(printk = 0x0200f579); -PROVIDE(ring_buf_area_claim = 0x0200f6a1); -PROVIDE(arch_system_halt = 0x02011d71); -PROVIDE(log_filter_get = 0x02003751); +PROVIDE(z_device_get_all_static = 0x0200b991); +PROVIDE(z_arm_exc_spurious = 0x02006ef1); +PROVIDE(printk = 0x0200f751); +PROVIDE(ring_buf_area_claim = 0x0200f879); +PROVIDE(arch_system_halt = 0x02011f49); +PROVIDE(log_filter_get = 0x02003929); PROVIDE(__aeabi_ldiv0 = 0x02000251); -PROVIDE(isalpha = 0x02012da5); +PROVIDE(isalpha = 0x02012f7d); PROVIDE(__divdf3 = 0x02000821); -PROVIDE(R_BSP_SubClockStabilizeWaitAfterReset = 0x02011ab1); -PROVIDE(z_log_msg_commit = 0x02003561); +PROVIDE(R_BSP_SubClockStabilizeWaitAfterReset = 0x02011c89); +PROVIDE(z_log_msg_commit = 0x02003739); PROVIDE(__aeabi_ui2f = 0x02000dc9); -PROVIDE(sys_heap_aligned_realloc = 0x0200f2c7); -PROVIDE(z_thread_aligned_alloc = 0x0200d865); -PROVIDE(k_sched_unlock = 0x0200cbf9); -PROVIDE(z_arm_interrupt_init = 0x0200700d); +PROVIDE(sys_heap_aligned_realloc = 0x0200f49f); +PROVIDE(z_thread_aligned_alloc = 0x0200da3d); +PROVIDE(k_sched_unlock = 0x0200cdd1); +PROVIDE(z_arm_interrupt_init = 0x020071e5); PROVIDE(__muldf3 = 0x020005cd); -PROVIDE(llext_copy_regions = 0x020111eb); +PROVIDE(llext_copy_regions = 0x020113c3); PROVIDE(flash_hp_enter_pe_cf_mode = 0x2200030d); -PROVIDE(z_shell_op_cond_next_line = 0x020103b5); -PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x0200f9cf); -PROVIDE(z_impl_k_poll_signal_init = 0x02012ccd); -PROVIDE(flash_area_open = 0x02003ca9); +PROVIDE(z_shell_op_cond_next_line = 0x0201058d); +PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x0200fba7); +PROVIDE(z_impl_k_poll_signal_init = 0x02012ea5); +PROVIDE(flash_area_open = 0x02003e81); PROVIDE(__cmpsf2 = 0x02000e89); -PROVIDE(getopt = 0x02007219); -PROVIDE(memset = 0x02012d7b); -PROVIDE(fnmatch = 0x0201117f); -PROVIDE(k_timer_init = 0x02012a23); -PROVIDE(sys_heap_init = 0x0200f40d); -PROVIDE(main = 0x0200ee0b); -PROVIDE(z_impl_k_pipe_reset = 0x020128ab); -PROVIDE(z_impl_k_msgq_purge = 0x02012017); +PROVIDE(getopt = 0x020073f1); +PROVIDE(memset = 0x02012f53); +PROVIDE(fnmatch = 0x02011357); +PROVIDE(k_timer_init = 0x02012bfb); +PROVIDE(sys_heap_init = 0x0200f5e5); +PROVIDE(main = 0x0200efe3); +PROVIDE(z_impl_k_pipe_reset = 0x02012a83); +PROVIDE(z_impl_k_msgq_purge = 0x020121ef); PROVIDE(__aeabi_l2f = 0x02000dfd); -PROVIDE(srand = 0x02012e65); +PROVIDE(srand = 0x0201303d); PROVIDE(__ltsf2 = 0x02000e81); -PROVIDE(z_impl_k_thread_priority_set = 0x0200cc71); -PROVIDE(z_impl_k_timer_start = 0x0200d621); -PROVIDE(z_row_span_with_buffer_offsets_get = 0x0200ff8d); +PROVIDE(z_impl_k_thread_priority_set = 0x0200ce49); +PROVIDE(z_impl_k_timer_start = 0x0200d7f9); +PROVIDE(z_row_span_with_buffer_offsets_get = 0x02010165); PROVIDE(__aeabi_uidiv = 0x02000201); -PROVIDE(cbvprintf_package = 0x02002c05); -PROVIDE(z_SysNmiOnReset = 0x02006265); -PROVIDE(z_irq_spurious = 0x02010ee1); -PROVIDE(z_impl_k_thread_stack_alloc = 0x02012d23); -PROVIDE(arm_irq_priority_set = 0x02006e99); +PROVIDE(cbvprintf_package = 0x02002ddd); +PROVIDE(z_SysNmiOnReset = 0x0200643d); +PROVIDE(z_irq_spurious = 0x020110b9); +PROVIDE(z_impl_k_thread_stack_alloc = 0x02012efb); +PROVIDE(arm_irq_priority_set = 0x02007071); PROVIDE(__truncdfsf2 = 0x02000bbd); -PROVIDE(assert_post_action = 0x0200f593); -PROVIDE(z_shell_has_wildcard = 0x02010c9b); -PROVIDE(getopt_init = 0x020071d1); +PROVIDE(assert_post_action = 0x0200f76b); +PROVIDE(z_shell_has_wildcard = 0x02010e73); +PROVIDE(getopt_init = 0x020073a9); PROVIDE(__aeabi_l2d = 0x02000571); -PROVIDE(isgraph = 0x02012dd3); -PROVIDE(R_BSP_RegisterProtectEnable = 0x0200a085); -PROVIDE(z_impl_k_queue_peek_tail = 0x02012281); -PROVIDE(llext_buf_read = 0x02011329); -PROVIDE(log_source_name_get = 0x020035cd); -PROVIDE(isalnum = 0x02012d8b); -PROVIDE(cosl = 0x02001c59); -PROVIDE(isprint = 0x02012deb); -PROVIDE(sys_timepoint_calc = 0x02012999); -PROVIDE(R_IIC_MASTER_SlaveAddressSet = 0x02011bf3); +PROVIDE(isgraph = 0x02012fab); +PROVIDE(R_BSP_RegisterProtectEnable = 0x0200a25d); +PROVIDE(z_impl_k_queue_peek_tail = 0x02012459); +PROVIDE(llext_buf_read = 0x02011501); +PROVIDE(log_source_name_get = 0x020037a5); +PROVIDE(isalnum = 0x02012f63); +PROVIDE(cosl = 0x02001e31); +PROVIDE(isprint = 0x02012fc3); +PROVIDE(sys_timepoint_calc = 0x02012b71); +PROVIDE(R_IIC_MASTER_SlaveAddressSet = 0x02011dcb); PROVIDE(__aeabi_ul2f = 0x02000ded); -PROVIDE(__log10Pow2 = 0x0200eb6d); -PROVIDE(arch_float_disable = 0x02006f61); -PROVIDE(putc = 0x02013383); +PROVIDE(__log10Pow2 = 0x0200ed45); +PROVIDE(arch_float_disable = 0x02007139); +PROVIDE(putc = 0x0201355b); PROVIDE(__aeabi_cfcmple = 0x02000ef1); PROVIDE(__divsi3 = 0x02000225); -PROVIDE(z_arm_int_exit = 0x02006685); -PROVIDE(z_thread_is_valid = 0x02003df5); -PROVIDE(z_impl_k_condvar_broadcast = 0x0200c4f9); +PROVIDE(z_arm_int_exit = 0x0200685d); +PROVIDE(z_thread_is_valid = 0x02003fcd); +PROVIDE(z_impl_k_condvar_broadcast = 0x0200c6d1); PROVIDE(strcmp = 0x02001061); -PROVIDE(z_impl_k_queue_alloc_append = 0x02012251); -PROVIDE(z_unpend1_no_timeout = 0x02012561); -PROVIDE(tan = 0x02002009); -PROVIDE(__stdout_hook_install = 0x0200709d); +PROVIDE(z_impl_k_queue_alloc_append = 0x02012429); +PROVIDE(z_unpend1_no_timeout = 0x02012739); +PROVIDE(tan = 0x020021e1); +PROVIDE(__stdout_hook_install = 0x02007275); PROVIDE(__fixunsdfdi = 0x020001c1); PROVIDE(__nedf2 = 0x02000a01); -PROVIDE(R_BSP_RegisterProtectDisable = 0x0200a0dd); +PROVIDE(R_BSP_RegisterProtectDisable = 0x0200a2b5); PROVIDE(flash_hp_stop = 0x2200006d); -PROVIDE(llext_dependency_remove_all = 0x020112e5); -PROVIDE(llext_copy_strings = 0x020111c7); -PROVIDE(sys_heap_alloc = 0x0200f171); -PROVIDE(pinctrl_lookup_state = 0x02011713); -PROVIDE(z_arm_debug_monitor = 0x02006d19); -PROVIDE(z_shell_wildcard_prepare = 0x02010cd1); -PROVIDE(z_device_state_init = 0x02011d09); +PROVIDE(llext_dependency_remove_all = 0x020114bd); +PROVIDE(llext_copy_strings = 0x0201139f); +PROVIDE(sys_heap_alloc = 0x0200f349); +PROVIDE(pinctrl_lookup_state = 0x020118eb); +PROVIDE(z_arm_debug_monitor = 0x02006ef1); +PROVIDE(z_shell_wildcard_prepare = 0x02010ea9); +PROVIDE(z_device_state_init = 0x02011ee1); PROVIDE(atan = 0x02001a59); -PROVIDE(sprintf = 0x0200d9b1); +PROVIDE(sprintf = 0x0200db89); PROVIDE(__fixdfdi = 0x02001095); PROVIDE(__gesf2 = 0x02000e79); -PROVIDE(__math_inexact64 = 0x02002a79); -PROVIDE(z_column_span_with_buffer_offsets_get = 0x0200ff6f); +PROVIDE(__math_inexact64 = 0x02002c51); +PROVIDE(z_column_span_with_buffer_offsets_get = 0x02010147); PROVIDE(CONFIG_LOG_FUNC_NAME_PREFIX_DBG = 0x00000001); PROVIDE(__aeabi_frsub = 0x02000c5d); -PROVIDE(R_IIC_MASTER_Close = 0x0200b39d); -PROVIDE(__pow5bits = 0x0200eba1); -PROVIDE(z_shell_wildcard_finalize = 0x02010d13); -PROVIDE(z_shell_log_backend_disable = 0x020108d7); +PROVIDE(R_IIC_MASTER_Close = 0x0200b575); +PROVIDE(__pow5bits = 0x0200ed79); +PROVIDE(z_shell_wildcard_finalize = 0x02010eeb); +PROVIDE(z_shell_log_backend_disable = 0x02010aaf); PROVIDE(__aeabi_fcmpeq = 0x02000f01); -PROVIDE(z_shell_fprintf_fmt = 0x02005655); -PROVIDE(scalbn = 0x02002959); -PROVIDE(z_impl_k_queue_alloc_prepend = 0x02012265); -PROVIDE(log_set_timestamp_func = 0x0200346d); -PROVIDE(srandom = 0x0200d8cd); -PROVIDE(is_ptr = 0x0200f523); -PROVIDE(z_shell_op_left_arrow = 0x0201050b); -PROVIDE(R_IIC_MASTER_Write = 0x02011c67); -PROVIDE(z_impl_k_thread_suspend = 0x0200c961); -PROVIDE(z_add_timeout = 0x0200d375); +PROVIDE(z_shell_fprintf_fmt = 0x0200582d); +PROVIDE(scalbn = 0x02002b31); +PROVIDE(z_impl_k_queue_alloc_prepend = 0x0201243d); +PROVIDE(log_set_timestamp_func = 0x02003645); +PROVIDE(srandom = 0x0200daa5); +PROVIDE(is_ptr = 0x0200f6fb); +PROVIDE(z_shell_op_left_arrow = 0x020106e3); +PROVIDE(R_IIC_MASTER_Write = 0x02011e3f); +PROVIDE(z_impl_k_thread_suspend = 0x0200cb39); +PROVIDE(z_add_timeout = 0x0200d54d); PROVIDE(__aeabi_cfrcmple = 0x02000ee9); -PROVIDE(z_impl_k_condvar_init = 0x02012403); -PROVIDE(putchar_unlocked = 0x0200d90d); +PROVIDE(z_impl_k_condvar_init = 0x020125db); +PROVIDE(putchar_unlocked = 0x0200dae5); PROVIDE(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT = 0x00000001); -PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x0200f9bb); -PROVIDE(fputc = 0x02013383); -PROVIDE(z_impl_log_process = 0x0200f85b); -PROVIDE(z_impl_k_queue_get = 0x0200bf95); -PROVIDE(R_SPI_B_CalculateBitrate = 0x0200b029); -PROVIDE(_cos = 0x02001c59); -PROVIDE(z_impl_z_log_msg_static_create = 0x02003855); -PROVIDE(z_init_cpu = 0x0200ba99); -PROVIDE(R_DTC_InfoGet = 0x0200a6d5); +PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x0200fb93); +PROVIDE(fputc = 0x0201355b); +PROVIDE(z_impl_log_process = 0x0200fa33); +PROVIDE(z_impl_k_queue_get = 0x0200c16d); +PROVIDE(R_SPI_B_CalculateBitrate = 0x0200b201); +PROVIDE(_cos = 0x02001e31); +PROVIDE(z_impl_z_log_msg_static_create = 0x02003a2d); +PROVIDE(z_init_cpu = 0x0200bc71); +PROVIDE(R_DTC_InfoGet = 0x0200a8ad); PROVIDE(__aeabi_d2uiz = 0x02000b7d); -PROVIDE(_sin = 0x02001f69); -PROVIDE(R_BSP_SoftwareDelay = 0x0200a03d); -PROVIDE(arch_tls_stack_setup = 0x0200626d); -PROVIDE(z_shell_op_completion_insert = 0x020106e9); +PROVIDE(_sin = 0x02002141); +PROVIDE(R_BSP_SoftwareDelay = 0x0200a215); +PROVIDE(arch_tls_stack_setup = 0x02006445); +PROVIDE(z_shell_op_completion_insert = 0x020108c1); PROVIDE(__aeabi_fcmplt = 0x02000f15); -PROVIDE(iic_master_rxi_isr = 0x0200b409); -PROVIDE(z_shell_op_char_backspace = 0x0201072b); -PROVIDE(z_shell_help_subcmd_print = 0x02005b19); -PROVIDE(shell_set_bypass = 0x0200feff); +PROVIDE(iic_master_rxi_isr = 0x0200b5e1); +PROVIDE(z_shell_op_char_backspace = 0x02010903); +PROVIDE(z_shell_help_subcmd_print = 0x02005cf1); +PROVIDE(shell_set_bypass = 0x020100d7); PROVIDE(__aeabi_uidivmod = 0x02000215); -PROVIDE(isdigit = 0x02012dc7); +PROVIDE(isdigit = 0x02012f9f); PROVIDE(__aeabi_dcmpeq = 0x02000a9d); -PROVIDE(fcu_frdyi_isr = 0x0200ac31); -PROVIDE(mpsc_pbuf_init = 0x0200f5bf); -PROVIDE(sys_clock_elapsed = 0x02009dc9); -PROVIDE(z_ready_thread = 0x020124df); -PROVIDE(llext_free_regions = 0x0200780d); -PROVIDE(flash_ra_page_layout = 0x02008a69); +PROVIDE(fcu_frdyi_isr = 0x0200ae09); +PROVIDE(mpsc_pbuf_init = 0x0200f797); +PROVIDE(sys_clock_elapsed = 0x02009fa1); +PROVIDE(z_ready_thread = 0x020126b7); +PROVIDE(llext_free_regions = 0x020079e5); +PROVIDE(flash_ra_page_layout = 0x02008c41); PROVIDE(__unordsf2 = 0x02000f65); -PROVIDE(llext_loaded_sect_ptr = 0x02011255); -PROVIDE(z_impl_k_thread_resume = 0x0200cb6d); -PROVIDE(z_shell_fprintf_buffer_flush = 0x0200ff0b); -PROVIDE(z_prep_c = 0x02006ec5); +PROVIDE(llext_loaded_sect_ptr = 0x0201142d); +PROVIDE(z_impl_k_thread_resume = 0x0200cd45); +PROVIDE(z_shell_fprintf_buffer_flush = 0x020100e3); +PROVIDE(z_prep_c = 0x0200709d); PROVIDE(vfscanf = 0x00000001); -PROVIDE(k_poll_event_init = 0x02012c71); -PROVIDE(k_malloc = 0x02012d1b); -PROVIDE(shell_vfprintf = 0x0200fd5d); -PROVIDE(z_impl_k_poll_signal_raise = 0x0200d7f9); -PROVIDE(z_shell_write = 0x02010587); -PROVIDE(z_unpend_thread = 0x0201258d); -PROVIDE(z_impl_llext_get_fn_table = 0x02008671); -PROVIDE(z_impl_k_mutex_unlock = 0x0200bef5); -PROVIDE(arch_new_thread = 0x02006f21); -PROVIDE(cbvprintf = 0x02007055); -PROVIDE(llext_bootstrap = 0x02007641); -PROVIDE(log_backend_enable = 0x0200f883); -PROVIDE(gpio_ra_interrupt_set = 0x020113c1); -PROVIDE(__ceil_log2pow5 = 0x0200eb91); -PROVIDE(pinctrl_configure_pins = 0x02009491); -PROVIDE(SystemCoreClockUpdate = 0x02009e5d); -PROVIDE(k_thread_system_pool_assign = 0x0200d859); +PROVIDE(k_poll_event_init = 0x02012e49); +PROVIDE(k_malloc = 0x02012ef3); +PROVIDE(shell_vfprintf = 0x0200ff35); +PROVIDE(z_impl_k_poll_signal_raise = 0x0200d9d1); +PROVIDE(z_shell_write = 0x0201075f); +PROVIDE(z_unpend_thread = 0x02012765); +PROVIDE(z_impl_llext_get_fn_table = 0x02008849); +PROVIDE(z_impl_k_mutex_unlock = 0x0200c0cd); +PROVIDE(arch_new_thread = 0x020070f9); +PROVIDE(cbvprintf = 0x0200722d); +PROVIDE(llext_bootstrap = 0x02007819); +PROVIDE(log_backend_enable = 0x0200fa5b); +PROVIDE(gpio_ra_interrupt_set = 0x02011599); +PROVIDE(__ceil_log2pow5 = 0x0200ed69); +PROVIDE(pinctrl_configure_pins = 0x02009669); +PROVIDE(SystemCoreClockUpdate = 0x0200a035); +PROVIDE(k_thread_system_pool_assign = 0x0200da31); PROVIDE(__floatunsisf = 0x02000dc9); -PROVIDE(z_reschedule_irqlock = 0x0200cba9); +PROVIDE(z_reschedule_irqlock = 0x0200cd81); PROVIDE(__aeabi_d2iz = 0x02000b2d); -PROVIDE(fcu_fiferr_isr = 0x0200abd5); -PROVIDE(__math_uflow = 0x02002a29); -PROVIDE(z_log_dropped = 0x02003539); -PROVIDE(z_setup_new_thread = 0x0200c679); -PROVIDE(z_handle_obj_poll_events = 0x02012c8f); -PROVIDE(llext_lookup_symbol = 0x020083f9); -PROVIDE(z_log_msg_alloc = 0x0200f85f); +PROVIDE(fcu_fiferr_isr = 0x0200adad); +PROVIDE(__math_uflow = 0x02002c01); +PROVIDE(z_log_dropped = 0x02003711); +PROVIDE(z_setup_new_thread = 0x0200c851); +PROVIDE(z_handle_obj_poll_events = 0x02012e67); +PROVIDE(llext_lookup_symbol = 0x020085d1); +PROVIDE(z_log_msg_alloc = 0x0200fa37); PROVIDE(__aeabi_cfcmpeq = 0x02000ef1); -PROVIDE(z_shell_help_request = 0x02005c0d); -PROVIDE(atoi = 0x02012e51); -PROVIDE(z_shell_history_init = 0x02010c8f); -PROVIDE(iscntrl = 0x02012db5); -PROVIDE(R_FLASH_HP_Write = 0x02011b47); -PROVIDE(z_arm_fault_init = 0x02006d01); -PROVIDE(shell_thread = 0x02005365); +PROVIDE(z_shell_help_request = 0x02005de5); +PROVIDE(atoi = 0x02013029); +PROVIDE(z_shell_history_init = 0x02010e67); +PROVIDE(iscntrl = 0x02012f8d); +PROVIDE(R_FLASH_HP_Write = 0x02011d1f); +PROVIDE(z_arm_fault_init = 0x02006ed9); +PROVIDE(shell_thread = 0x0200553d); PROVIDE(__aeabi_idiv0 = 0x02000251); PROVIDE(__unorddf2 = 0x02000b01); -PROVIDE(llext_load = 0x020074c9); -PROVIDE(z_shell_help_cmd_print = 0x02005bcd); -PROVIDE(z_arm_fatal_error = 0x02006105); -PROVIDE(z_arm_svc = 0x02006e31); -PROVIDE(z_shell_op_cursor_horiz_move = 0x02005795); -PROVIDE(shell_fprintf_impl = 0x0200fdef); -PROVIDE(z_shell_op_cursor_word_move = 0x0201046f); -PROVIDE(ring_buf_peek = 0x0200f7c5); -PROVIDE(z_shell_history_purge = 0x02010b87); +PROVIDE(llext_load = 0x020076a1); +PROVIDE(z_shell_help_cmd_print = 0x02005da5); +PROVIDE(z_arm_fatal_error = 0x020062dd); +PROVIDE(z_arm_svc = 0x02007009); +PROVIDE(z_shell_op_cursor_horiz_move = 0x0200596d); +PROVIDE(shell_fprintf_impl = 0x0200ffc7); +PROVIDE(z_shell_op_cursor_word_move = 0x02010647); +PROVIDE(ring_buf_peek = 0x0200f99d); +PROVIDE(z_shell_history_purge = 0x02010d5f); PROVIDE(strlen = 0x02001085); -PROVIDE(z_arm_cpu_idle_init = 0x02007001); -PROVIDE(shell_fprintf_normal = 0x0200fe09); -PROVIDE(__double_computeInvPow5 = 0x0200ecc5); -PROVIDE(z_shell_op_cursor_end_move = 0x020104f9); -PROVIDE(toupper = 0x02012e3f); +PROVIDE(z_arm_cpu_idle_init = 0x020071d9); +PROVIDE(shell_fprintf_normal = 0x0200ffe1); +PROVIDE(__double_computeInvPow5 = 0x0200ee9d); +PROVIDE(z_shell_op_cursor_end_move = 0x020106d1); +PROVIDE(toupper = 0x02013017); PROVIDE(__aeabi_cdcmpeq = 0x02000a8d); PROVIDE(__gedf2 = 0x020009f1); -PROVIDE(z_shell_op_cursor_position_synchronize = 0x020103d3); -PROVIDE(assert_print = 0x0200f5a5); -PROVIDE(z_impl_k_wakeup = 0x0200cdf9); -PROVIDE(R_DTC_SoftwareStop = 0x02011adf); -PROVIDE(z_shell_vt100_color_set = 0x02005839); -PROVIDE(shell_get_return_value = 0x0200feeb); -PROVIDE(strchr = 0x02012ed7); -PROVIDE(z_reset_time_slice = 0x0200d179); +PROVIDE(z_shell_op_cursor_position_synchronize = 0x020105ab); +PROVIDE(assert_print = 0x0200f77d); +PROVIDE(z_impl_k_wakeup = 0x0200cfd1); +PROVIDE(R_DTC_SoftwareStop = 0x02011cb7); +PROVIDE(z_shell_vt100_color_set = 0x02005a11); +PROVIDE(shell_get_return_value = 0x020100c3); +PROVIDE(strchr = 0x020130af); +PROVIDE(z_reset_time_slice = 0x0200d351); PROVIDE(__aeabi_f2d = 0x0200051d); -PROVIDE(k_heap_alloc = 0x02011e75); -PROVIDE(z_impl_k_mutex_init = 0x020120ad); -PROVIDE(z_log_msg_runtime_vcreate = 0x020037a1); -PROVIDE(z_arm_nmi = 0x02010e93); -PROVIDE(z_time_slice = 0x0200d1c9); -PROVIDE(z_impl_device_deinit = 0x02011d21); -PROVIDE(z_impl_k_sched_current_thread_query = 0x0200ce41); -PROVIDE(llext_link = 0x020084f9); -PROVIDE(llext_teardown = 0x020111c1); -PROVIDE(z_fatal_error = 0x0200b8a5); +PROVIDE(k_heap_alloc = 0x0201204d); +PROVIDE(z_impl_k_mutex_init = 0x02012285); +PROVIDE(z_log_msg_runtime_vcreate = 0x02003979); +PROVIDE(z_arm_nmi = 0x0201106b); +PROVIDE(z_time_slice = 0x0200d3a1); +PROVIDE(z_impl_device_deinit = 0x02011ef9); +PROVIDE(z_impl_k_sched_current_thread_query = 0x0200d019); +PROVIDE(llext_link = 0x020086d1); +PROVIDE(llext_teardown = 0x02011399); +PROVIDE(z_fatal_error = 0x0200ba7d); PROVIDE(__subdf3 = 0x0200025d); -PROVIDE(boot_banner = 0x0200b7ad); -PROVIDE(shell_prompt_change = 0x0200fe5d); -PROVIDE(log_core_init = 0x0200348d); -PROVIDE(ldexpl = 0x02002959); +PROVIDE(boot_banner = 0x0200b985); +PROVIDE(shell_prompt_change = 0x02010035); +PROVIDE(log_core_init = 0x02003665); +PROVIDE(ldexpl = 0x02002b31); PROVIDE(__aeabi_idivmod = 0x02000241); PROVIDE(__aeabi_ldivmod = 0x02000f91); -PROVIDE(z_impl_log_frontend_filter_set = 0x0200f877); -PROVIDE(__kernel_tan = 0x02002729); -PROVIDE(k_work_schedule_for_queue = 0x0200c44d); -PROVIDE(shell_strtoul = 0x020056f1); -PROVIDE(gpio_ra_interrupt_unset = 0x0201144f); -PROVIDE(z_impl_device_get_binding = 0x0200b7d1); -PROVIDE(z_impl_k_poll_signal_reset = 0x02012cd7); -PROVIDE(z_shell_op_cursor_move = 0x0201041d); +PROVIDE(z_impl_log_frontend_filter_set = 0x0200fa4f); +PROVIDE(__kernel_tan = 0x02002901); +PROVIDE(k_work_schedule_for_queue = 0x0200c625); +PROVIDE(shell_strtoul = 0x020058c9); +PROVIDE(gpio_ra_interrupt_unset = 0x02011627); +PROVIDE(z_impl_device_get_binding = 0x0200b9a9); +PROVIDE(z_impl_k_poll_signal_reset = 0x02012eaf); +PROVIDE(z_shell_op_cursor_move = 0x020105f5); PROVIDE(__addsf3 = 0x02000c69); -PROVIDE(z_impl_k_sem_reset = 0x0200c0b9); -PROVIDE(z_shell_pattern_remove = 0x0201016f); -PROVIDE(vfprintf = 0x0200dced); -PROVIDE(R_BSP_SourceClockHzGet = 0x0200a031); -PROVIDE(arch_irq_unlock_outlined = 0x02010eef); -PROVIDE(__wrap_free = 0x02007181); -PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x0200b819); -PROVIDE(z_arm_hard_fault = 0x02006d19); +PROVIDE(z_impl_k_sem_reset = 0x0200c291); +PROVIDE(z_shell_pattern_remove = 0x02010347); +PROVIDE(vfprintf = 0x0200dec5); +PROVIDE(R_BSP_SourceClockHzGet = 0x0200a209); +PROVIDE(arch_irq_unlock_outlined = 0x020110c7); +PROVIDE(__wrap_free = 0x02007359); +PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x0200b9f1); +PROVIDE(z_arm_hard_fault = 0x02006ef1); PROVIDE(kheap_llext_heap = 0x22005258); PROVIDE(kheap_llext_heap_size = 32768); PROVIDE(kheap__system_heap = 0x220162b8); PROVIDE(kheap__system_heap_size = 32768); -PROVIDE(__device_dts_ord_73 = 0x0000000002013520); -PROVIDE(__device_dts_ord_180 = 0x0000000002013544); -PROVIDE(__device_dts_ord_127 = 0x0000000002013568); -PROVIDE(__device_dts_ord_31 = 0x000000000201358c); -PROVIDE(__device_dts_ord_50 = 0x00000000020135b0); -PROVIDE(__device_dts_ord_56 = 0x00000000020135d4); -PROVIDE(__device_dts_ord_128 = 0x00000000020135f8); -PROVIDE(__device_dts_ord_95 = 0x000000000201361c); -PROVIDE(__device_dts_ord_54 = 0x0000000002013640); -PROVIDE(__device_dts_ord_111 = 0x0000000002013664); -PROVIDE(__device_dts_ord_29 = 0x0000000002013688); -PROVIDE(__device_dts_ord_52 = 0x00000000020136ac); -PROVIDE(__device_dts_ord_49 = 0x00000000020136d0); -PROVIDE(__device_dts_ord_28 = 0x00000000020136f4); -PROVIDE(__device_dts_ord_39 = 0x0000000002013718); -PROVIDE(__device_dts_ord_38 = 0x000000000201373c); -PROVIDE(__device_dts_ord_88 = 0x0000000002013760); -PROVIDE(__device_dts_ord_19 = 0x0000000002013784); -PROVIDE(__device_dts_ord_84 = 0x00000000020137a8); -PROVIDE(__device_dts_ord_18 = 0x00000000020137cc); -PROVIDE(__device_dts_ord_9 = 0x00000000020137f0); -PROVIDE(__device_dts_ord_40 = 0x0000000002013814); -PROVIDE(__device_dts_ord_137 = 0x0000000002013838); -PROVIDE(__device_dts_ord_34 = 0x000000000201385c); -PROVIDE(__device_dts_ord_141 = 0x0000000002013880); -PROVIDE(__device_dts_ord_138 = 0x00000000020138a4); -PROVIDE(__device_dts_ord_23 = 0x00000000020138c8); -PROVIDE(__device_dts_ord_115 = 0x00000000020138ec); +PROVIDE(__device_dts_ord_73 = 0x00000000020136f8); +PROVIDE(__device_dts_ord_180 = 0x000000000201371c); +PROVIDE(__device_dts_ord_127 = 0x0000000002013740); +PROVIDE(__device_dts_ord_31 = 0x0000000002013764); +PROVIDE(__device_dts_ord_50 = 0x0000000002013788); +PROVIDE(__device_dts_ord_56 = 0x00000000020137ac); +PROVIDE(__device_dts_ord_128 = 0x00000000020137d0); +PROVIDE(__device_dts_ord_95 = 0x00000000020137f4); +PROVIDE(__device_dts_ord_54 = 0x0000000002013818); +PROVIDE(__device_dts_ord_111 = 0x000000000201383c); +PROVIDE(__device_dts_ord_29 = 0x0000000002013860); +PROVIDE(__device_dts_ord_52 = 0x0000000002013884); +PROVIDE(__device_dts_ord_49 = 0x00000000020138a8); +PROVIDE(__device_dts_ord_28 = 0x00000000020138cc); +PROVIDE(__device_dts_ord_39 = 0x00000000020138f0); +PROVIDE(__device_dts_ord_38 = 0x0000000002013914); +PROVIDE(__device_dts_ord_88 = 0x0000000002013938); +PROVIDE(__device_dts_ord_19 = 0x000000000201395c); +PROVIDE(__device_dts_ord_84 = 0x0000000002013980); +PROVIDE(__device_dts_ord_18 = 0x00000000020139a4); +PROVIDE(__device_dts_ord_9 = 0x00000000020139c8); +PROVIDE(__device_dts_ord_40 = 0x00000000020139ec); +PROVIDE(__device_dts_ord_137 = 0x0000000002013a10); +PROVIDE(__device_dts_ord_34 = 0x0000000002013a34); +PROVIDE(__device_dts_ord_141 = 0x0000000002013a58); +PROVIDE(__device_dts_ord_138 = 0x0000000002013a7c); +PROVIDE(__device_dts_ord_23 = 0x0000000002013aa0); +PROVIDE(__device_dts_ord_115 = 0x0000000002013ac4); PROVIDE(_sketch_start = 0x32000 ); diff --git a/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h b/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h index 48be8994..184e288f 100644 --- a/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h +++ b/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/posix/strsignal_table.h @@ -1,6 +1,6 @@ /* - * This file is generated by /home/burellil/Work/ArduinoCore-zephyr/zephyr/scripts/build/gen_strsignal_table.py + * This file is generated by /home/kurte/github/zephyr/scripts/build/gen_strsignal_table.py */ #include diff --git a/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h b/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h index 84f743e5..a8fc1088 100644 --- a/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h +++ b/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h @@ -2,7 +2,7 @@ * Generated by gen_defines.py * * DTS input file: - * /home/burellil/Work/ArduinoCore-zephyr/ArduinoCore-zephyr/build/frdm_mcxn947_mcxn947_cpu0/zephyr/zephyr.dts.pre + * /home/kurte/github/ArduinoCore-zephyr/build/frdm_mcxn947_mcxn947_cpu0/zephyr/zephyr.dts.pre * * Directories with bindings: * $ZEPHYR_BASE/dts/bindings diff --git a/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/zephyr/version.h b/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/zephyr/version.h index 9a30242a..76aa14d4 100644 --- a/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/zephyr/version.h +++ b/variants/frdm_mcxn947_mcxn947_cpu0/llext-edk/include/zephyr/include/generated/zephyr/version.h @@ -19,7 +19,7 @@ #define KERNEL_VERSION_EXTENDED_STRING "4.1.99+0" #define KERNEL_VERSION_TWEAK_STRING "4.1.99+0" -#define BUILD_VERSION v4.1.0-894-g9f06fc60e255 +#define BUILD_VERSION v4.1.0-898-g6b32f4d75066 #endif /* _KERNEL_VERSION_H_ */ diff --git a/variants/frdm_mcxn947_mcxn947_cpu0/provides.ld b/variants/frdm_mcxn947_mcxn947_cpu0/provides.ld index ef3f659d..41a4e573 100644 --- a/variants/frdm_mcxn947_mcxn947_cpu0/provides.ld +++ b/variants/frdm_mcxn947_mcxn947_cpu0/provides.ld @@ -1,1821 +1,1824 @@ PROVIDE(cmd_kernel_uptime = 0x10001771); -PROVIDE(CLOCK_EnableClock = 0x1002837b); -PROVIDE(loader = 0x100027f5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1000299d); -PROVIDE(stdinout_read_vmeth = 0x1001f973); -PROVIDE(stdinout_ioctl_vmeth = 0x10003179); -PROVIDE(_check_fd = 0x10003191); -PROVIDE(zvfs_fdtable_call_ioctl = 0x1001f977); -PROVIDE(stdinout_write_vmeth = 0x1001f995); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x1001f999); -PROVIDE(k_mutex_unlock.isra.0 = 0x1001f99d); -PROVIDE(z_fd_unref.isra.0 = 0x100031c5); -PROVIDE(dummy_timestamp = 0x1001fe83); -PROVIDE(default_lf_get_timestamp = 0x1001fe87); -PROVIDE(atomic_inc = 0x1001fe97); -PROVIDE(z_log_init.isra.0 = 0x10003549); -PROVIDE(enable_logger = 0x1001fea9); -PROVIDE(backend_filter_set = 0x100038b5); -PROVIDE(z_cbprintf_cpy = 0x1001ff37); -PROVIDE(z_log_msg_simple_create = 0x1001ff95); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10020003); -PROVIDE(log_output_write = 0x10020061); -PROVIDE(out_func = 0x1002007d); -PROVIDE(cr_out_func = 0x10020099); -PROVIDE(print_formatted = 0x10003b09); -PROVIDE(newline_print = 0x10003b2d); -PROVIDE(class_handler = 0x10003ea1); -PROVIDE(custom_handler = 0x10003ee1); -PROVIDE(vendor_handler = 0x10003f41); -PROVIDE(usb_reset_alt_setting = 0x10003f7d); -PROVIDE(is_ep_valid.part.0 = 0x10003f8d); -PROVIDE(usb_handle_request.constprop.0 = 0x10003fc5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10020149); -PROVIDE(get_ep_bm_from_addr = 0x10003ff1); -PROVIDE(disable_endpoint = 0x10004039); -PROVIDE(forward_status_cb = 0x100040b9); -PROVIDE(usb_halt_endpoint_req.isra.0 = 0x10004169); -PROVIDE(set_endpoint = 0x10004205); -PROVIDE(usb_handle_standard_request = 0x10004319); -PROVIDE(usb_data_to_host = 0x10004679); -PROVIDE(usb_handle_control_transfer = 0x100046d9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10020167); -PROVIDE(usb_ep_get_transfer = 0x10004cdd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100201e1); -PROVIDE(usb_transfer_work = 0x10004d09); -PROVIDE(cdc_interface_config = 0x10020217); -PROVIDE(cdc_acm_irq_callback_work_handler = 0x1002022b); -PROVIDE(cdc_acm_irq_tx_disable = 0x10020235); -PROVIDE(cdc_acm_irq_tx_ready = 0x1002023f); -PROVIDE(cdc_acm_irq_rx_disable = 0x1002025f); -PROVIDE(cdc_acm_irq_rx_ready = 0x10020269); -PROVIDE(cdc_acm_irq_is_pending = 0x10020277); -PROVIDE(cdc_acm_irq_callback_set = 0x10020293); -PROVIDE(cdc_acm_line_ctrl_get = 0x1002029b); -PROVIDE(cdc_acm_configure = 0x100202cd); -PROVIDE(cdc_acm_config_get = 0x100202e5); -PROVIDE(cdc_acm_irq_rx_enable = 0x100050b5); -PROVIDE(cdc_acm_irq_tx_enable = 0x100050d5); -PROVIDE(cdc_acm_fifo_fill = 0x100050f5); -PROVIDE(cdc_acm_write_cb = 0x10005131); -PROVIDE(cdc_acm_reset_port = 0x10005185); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10020341); -PROVIDE(cdc_acm_int_in = 0x100051c1); -PROVIDE(cdc_acm_init = 0x100052a9); -PROVIDE(tx_work_handler = 0x100053c9); -PROVIDE(cdc_acm_send_notification.isra.0 = 0x100052f1); -PROVIDE(cdc_acm_line_ctrl_set = 0x1002035f); -PROVIDE(cdc_acm_poll_out = 0x10005335); -PROVIDE(cdc_acm_read_cb = 0x10005445); -PROVIDE(cdc_acm_fifo_read = 0x1002041d); -PROVIDE(cdc_acm_poll_in = 0x10020467); -PROVIDE(cdc_acm_dev_status_cb = 0x100054e9); -PROVIDE(cdc_acm_irq_update = 0x10020479); -PROVIDE(z_usb_work_q_init = 0x1000566d); -PROVIDE(cmd_kernel_cycles = 0x100056a1); -PROVIDE(cmd_kernel_sleep = 0x100056bd); -PROVIDE(cmd_kernel_version = 0x100056fd); -PROVIDE(cmd_kernel_log_level_set = 0x10005715); -PROVIDE(thread_valid_cb = 0x100204a9); -PROVIDE(cmd_kernel_thread_list = 0x100057b9); -PROVIDE(shell_tdata_dump = 0x100057ed); -PROVIDE(cmd_kernel_thread_stacks = 0x100058cd); -PROVIDE(shell_stack_dump = 0x10005959); -PROVIDE(cmd_kernel_thread_suspend = 0x100059b9); -PROVIDE(cmd_kernel_thread_resume = 0x10005a1d); -PROVIDE(cmd_kernel_thread_kill = 0x10005a81); -PROVIDE(cmd_device_list = 0x10005ae5); -PROVIDE(date_print = 0x10005bdd); -PROVIDE(cmd_date_get = 0x100204b5); -PROVIDE(get_h_m_s = 0x10005c09); -PROVIDE(cmd_date_set = 0x10005ca1); -PROVIDE(cmd_devmem = 0x10005dad); -PROVIDE(cmd_dump = 0x10005e71); -PROVIDE(set_bypass.isra.0 = 0x10006009); -PROVIDE(bypass_cb = 0x10006055); -PROVIDE(cmd_load = 0x10006169); -PROVIDE(log_msg_generic_get_wlen = 0x100204d9); -PROVIDE(uart_irq_tx_disable = 0x100204f9); -PROVIDE(enable = 0x10020503); -PROVIDE(read_uart = 0x10020515); -PROVIDE(uninit = 0x10020527); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10006241); -PROVIDE(enable_shell_uart = 0x10006265); -PROVIDE(write_uart = 0x10020547); -PROVIDE(init = 0x1000629d); -PROVIDE(uart_callback = 0x100062f1); -PROVIDE(cmd_buffer_clear = 0x100205ab); -PROVIDE(atomic_or = 0x100205c1); -PROVIDE(atomic_and = 0x100205d7); -PROVIDE(k_mutex_lock = 0x100205ed); -PROVIDE(z_shell_raw_fprintf = 0x100205f1); -PROVIDE(shell_internal_help_print = 0x10006435); -PROVIDE(z_shell_strlen = 0x1002060b); -PROVIDE(shell_log_process = 0x10020617); -PROVIDE(transport_evt_handler = 0x10020649); -PROVIDE(kill_handler = 0x10006455); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x100064b1); -PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x10020661); -PROVIDE(z_flag_history_exit_set.isra.0 = 0x10020679); -PROVIDE(history_handle = 0x100064bd); -PROVIDE(z_flag_insert_mode_set.isra.0 = 0x1002068f); -PROVIDE(k_mutex_unlock.isra.0 = 0x100206af); -PROVIDE(execute = 0x1000656d); -PROVIDE(shell_signal_handle = 0x100206b3); -PROVIDE(state_set.constprop.0 = 0x10006835); -PROVIDE(cmd_help = 0x10007049); -PROVIDE(out_func = 0x10020925); -PROVIDE(z_shell_strlen = 0x10020961); -PROVIDE(z_shell_raw_fprintf = 0x10020d43); -PROVIDE(z_clear_eos = 0x1000733d); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x10007359); -PROVIDE(full_line_cmd.isra.0 = 0x10020d5d); -PROVIDE(reprint_from_cursor = 0x10007585); -PROVIDE(data_insert = 0x1002106d); -PROVIDE(z_shell_raw_fprintf = 0x100212bb); -PROVIDE(z_cursor_next_line_move.isra.0 = 0x10007755); -PROVIDE(formatted_text_print.constprop.0 = 0x100212d5); -PROVIDE(cmd_comment = 0x100213b7); -PROVIDE(cmd_shell_stats_reset = 0x100213bb); -PROVIDE(z_shell_raw_fprintf = 0x100213c3); -PROVIDE(cmd_resize_default = 0x1000787d); -PROVIDE(cmd_shell_stats_show = 0x100078a9); -PROVIDE(cmd_backends = 0x100078bd); -PROVIDE(cmd_prompt_on = 0x100213dd); -PROVIDE(cmd_prompt_off = 0x10007909); -PROVIDE(cmd_history = 0x10007919); -PROVIDE(cmd_get_retval = 0x10007959); -PROVIDE(cmd_echo = 0x10007975); -PROVIDE(cmd_clear = 0x100079c5); -PROVIDE(cmd_resize = 0x100079fd); -PROVIDE(cmd_vt100_off = 0x100213e9); -PROVIDE(cmd_bacskpace_mode_delete = 0x10021405); -PROVIDE(cmd_colors_off = 0x10021421); -PROVIDE(cmd_bacskpace_mode_backspace = 0x1002143d); -PROVIDE(cmd_echo_off = 0x10021459); -PROVIDE(cmd_colors_on = 0x10021475); -PROVIDE(cmd_vt100_on = 0x10021491); -PROVIDE(cmd_echo_on = 0x100214ad); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100216e7); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10021813); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10021849); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10021869); -PROVIDE(mem_manage_fault.constprop.0 = 0x10008291); -PROVIDE(bus_fault.constprop.0 = 0x100083ed); -PROVIDE(usage_fault.constprop.0 = 0x10008559); -PROVIDE(secure_fault.constprop.0 = 0x100086b5); -PROVIDE(cbputc = 0x100218c3); -PROVIDE(picolibc_put = 0x100218cf); -PROVIDE(malloc_prepare = 0x10008df9); -PROVIDE(malloc_lock = 0x10008e1d); -PROVIDE(malloc_unlock = 0x10008e31); -PROVIDE(pthread_barrier_pool_init = 0x10008ef9); -PROVIDE(posix_fs_alloc_obj = 0x1000909d); -PROVIDE(fs_close_vmeth = 0x10021b4f); -PROVIDE(fs_ioctl_vmeth = 0x100090e9); -PROVIDE(fs_write_vmeth = 0x10009145); -PROVIDE(fs_read_vmeth = 0x10009165); -PROVIDE(pthread_cond_pool_init = 0x10009329); -PROVIDE(pthread_mutex_pool_init = 0x10009349); -PROVIDE(posix_thread_pool_init = 0x10009369); -PROVIDE(fixed_data_unref = 0x10021bc9); -PROVIDE(net_buf_destroy = 0x1000939d); -PROVIDE(fixed_data_alloc = 0x100093fd); -PROVIDE(zvfs_eventfd_ioctl_op = 0x10009559); -PROVIDE(zvfs_eventfd_write_locked = 0x10021cdd); -PROVIDE(zvfs_eventfd_rw_op = 0x10009689); -PROVIDE(zvfs_eventfd_write_op = 0x10009785); -PROVIDE(zvfs_eventfd_read_op = 0x10009791); -PROVIDE(zvfs_eventfd_read_locked = 0x10021d4b); -PROVIDE(zvfs_eventfd_close_op = 0x1000979d); -PROVIDE(zvfs_fdtable_call_ioctl = 0x10021dab); +PROVIDE(CLOCK_EnableClock = 0x100285a3); +PROVIDE(loader = 0x100029f5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10002b9d); +PROVIDE(stdinout_read_vmeth = 0x1001fb9b); +PROVIDE(stdinout_ioctl_vmeth = 0x10003379); +PROVIDE(_check_fd = 0x10003391); +PROVIDE(zvfs_fdtable_call_ioctl = 0x1001fb9f); +PROVIDE(stdinout_write_vmeth = 0x1001fbbd); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x1001fbc1); +PROVIDE(k_mutex_unlock.isra.0 = 0x1001fbc5); +PROVIDE(z_fd_unref.isra.0 = 0x100033c5); +PROVIDE(dummy_timestamp = 0x100200ab); +PROVIDE(default_lf_get_timestamp = 0x100200af); +PROVIDE(atomic_inc = 0x100200bf); +PROVIDE(z_log_init.isra.0 = 0x10003749); +PROVIDE(enable_logger = 0x100200d1); +PROVIDE(backend_filter_set = 0x10003ab5); +PROVIDE(z_cbprintf_cpy = 0x1002015f); +PROVIDE(z_log_msg_simple_create = 0x100201bd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1002022b); +PROVIDE(log_output_write = 0x10020289); +PROVIDE(out_func = 0x100202a5); +PROVIDE(cr_out_func = 0x100202c1); +PROVIDE(print_formatted = 0x10003d09); +PROVIDE(newline_print = 0x10003d2d); +PROVIDE(class_handler = 0x100040a1); +PROVIDE(custom_handler = 0x100040e1); +PROVIDE(vendor_handler = 0x10004141); +PROVIDE(usb_reset_alt_setting = 0x1000417d); +PROVIDE(is_ep_valid.part.0 = 0x1000418d); +PROVIDE(usb_handle_request.constprop.0 = 0x100041c5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10020371); +PROVIDE(get_ep_bm_from_addr = 0x100041f1); +PROVIDE(disable_endpoint = 0x10004239); +PROVIDE(forward_status_cb = 0x100042b9); +PROVIDE(usb_halt_endpoint_req.isra.0 = 0x10004369); +PROVIDE(set_endpoint = 0x10004405); +PROVIDE(usb_handle_standard_request = 0x10004519); +PROVIDE(usb_data_to_host = 0x10004879); +PROVIDE(usb_handle_control_transfer = 0x100048d9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1002038f); +PROVIDE(usb_ep_get_transfer = 0x10004edd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10020409); +PROVIDE(usb_transfer_work = 0x10004f09); +PROVIDE(cdc_interface_config = 0x1002043f); +PROVIDE(cdc_acm_irq_callback_work_handler = 0x10020453); +PROVIDE(cdc_acm_irq_tx_disable = 0x1002045d); +PROVIDE(cdc_acm_irq_tx_ready = 0x10020467); +PROVIDE(cdc_acm_irq_rx_disable = 0x10020487); +PROVIDE(cdc_acm_irq_rx_ready = 0x10020491); +PROVIDE(cdc_acm_irq_is_pending = 0x1002049f); +PROVIDE(cdc_acm_irq_callback_set = 0x100204bb); +PROVIDE(cdc_acm_line_ctrl_get = 0x100204c3); +PROVIDE(cdc_acm_configure = 0x100204f5); +PROVIDE(cdc_acm_config_get = 0x1002050d); +PROVIDE(cdc_acm_irq_rx_enable = 0x100052b5); +PROVIDE(cdc_acm_irq_tx_enable = 0x100052d5); +PROVIDE(cdc_acm_fifo_fill = 0x100052f5); +PROVIDE(cdc_acm_write_cb = 0x10005331); +PROVIDE(cdc_acm_reset_port = 0x10005385); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10020569); +PROVIDE(cdc_acm_int_in = 0x100053c1); +PROVIDE(cdc_acm_init = 0x100054a9); +PROVIDE(tx_work_handler = 0x100055c9); +PROVIDE(cdc_acm_send_notification.isra.0 = 0x100054f1); +PROVIDE(cdc_acm_line_ctrl_set = 0x10020587); +PROVIDE(cdc_acm_poll_out = 0x10005535); +PROVIDE(cdc_acm_read_cb = 0x10005645); +PROVIDE(cdc_acm_fifo_read = 0x10020645); +PROVIDE(cdc_acm_poll_in = 0x1002068f); +PROVIDE(cdc_acm_dev_status_cb = 0x100056e9); +PROVIDE(cdc_acm_irq_update = 0x100206a1); +PROVIDE(z_usb_work_q_init = 0x1000586d); +PROVIDE(cmd_kernel_cycles = 0x100058a1); +PROVIDE(cmd_kernel_sleep = 0x100058bd); +PROVIDE(cmd_kernel_version = 0x100058fd); +PROVIDE(cmd_kernel_log_level_set = 0x10005915); +PROVIDE(thread_valid_cb = 0x100206d1); +PROVIDE(cmd_kernel_thread_list = 0x100059b9); +PROVIDE(shell_tdata_dump = 0x100059ed); +PROVIDE(cmd_kernel_thread_stacks = 0x10005acd); +PROVIDE(shell_stack_dump = 0x10005b59); +PROVIDE(cmd_kernel_thread_suspend = 0x10005bb9); +PROVIDE(cmd_kernel_thread_resume = 0x10005c1d); +PROVIDE(cmd_kernel_thread_kill = 0x10005c81); +PROVIDE(cmd_device_list = 0x10005ce5); +PROVIDE(date_print = 0x10005ddd); +PROVIDE(cmd_date_get = 0x100206dd); +PROVIDE(get_h_m_s = 0x10005e09); +PROVIDE(cmd_date_set = 0x10005ea1); +PROVIDE(cmd_devmem = 0x10005fad); +PROVIDE(cmd_dump = 0x10006071); +PROVIDE(set_bypass.isra.0 = 0x10006209); +PROVIDE(bypass_cb = 0x10006255); +PROVIDE(cmd_load = 0x10006369); +PROVIDE(log_msg_generic_get_wlen = 0x10020701); +PROVIDE(uart_irq_tx_disable = 0x10020721); +PROVIDE(enable = 0x1002072b); +PROVIDE(read_uart = 0x1002073d); +PROVIDE(uninit = 0x1002074f); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10006441); +PROVIDE(enable_shell_uart = 0x10006465); +PROVIDE(write_uart = 0x1002076f); +PROVIDE(init = 0x1000649d); +PROVIDE(uart_callback = 0x100064f1); +PROVIDE(cmd_buffer_clear = 0x100207d3); +PROVIDE(atomic_or = 0x100207e9); +PROVIDE(atomic_and = 0x100207ff); +PROVIDE(k_mutex_lock = 0x10020815); +PROVIDE(z_shell_raw_fprintf = 0x10020819); +PROVIDE(shell_internal_help_print = 0x10006635); +PROVIDE(z_shell_strlen = 0x10020833); +PROVIDE(shell_log_process = 0x1002083f); +PROVIDE(transport_evt_handler = 0x10020871); +PROVIDE(kill_handler = 0x10006655); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x100066b1); +PROVIDE(z_flag_cmd_ctx_set.isra.0 = 0x10020889); +PROVIDE(z_flag_history_exit_set.isra.0 = 0x100208a1); +PROVIDE(history_handle = 0x100066bd); +PROVIDE(z_flag_insert_mode_set.isra.0 = 0x100208b7); +PROVIDE(k_mutex_unlock.isra.0 = 0x100208d7); +PROVIDE(execute = 0x1000676d); +PROVIDE(shell_signal_handle = 0x100208db); +PROVIDE(state_set.constprop.0 = 0x10006a35); +PROVIDE(cmd_help = 0x10007249); +PROVIDE(out_func = 0x10020b4d); +PROVIDE(z_shell_strlen = 0x10020b89); +PROVIDE(z_shell_raw_fprintf = 0x10020f6b); +PROVIDE(z_clear_eos = 0x1000753d); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x10007559); +PROVIDE(full_line_cmd.isra.0 = 0x10020f85); +PROVIDE(reprint_from_cursor = 0x10007785); +PROVIDE(data_insert = 0x10021295); +PROVIDE(z_shell_raw_fprintf = 0x100214e3); +PROVIDE(z_cursor_next_line_move.isra.0 = 0x10007955); +PROVIDE(formatted_text_print.constprop.0 = 0x100214fd); +PROVIDE(cmd_comment = 0x100215df); +PROVIDE(cmd_shell_stats_reset = 0x100215e3); +PROVIDE(z_shell_raw_fprintf = 0x100215eb); +PROVIDE(cmd_resize_default = 0x10007a7d); +PROVIDE(cmd_shell_stats_show = 0x10007aa9); +PROVIDE(cmd_backends = 0x10007abd); +PROVIDE(cmd_prompt_on = 0x10021605); +PROVIDE(cmd_prompt_off = 0x10007b09); +PROVIDE(cmd_history = 0x10007b19); +PROVIDE(cmd_get_retval = 0x10007b59); +PROVIDE(cmd_echo = 0x10007b75); +PROVIDE(cmd_clear = 0x10007bc5); +PROVIDE(cmd_resize = 0x10007bfd); +PROVIDE(cmd_vt100_off = 0x10021611); +PROVIDE(cmd_bacskpace_mode_delete = 0x1002162d); +PROVIDE(cmd_colors_off = 0x10021649); +PROVIDE(cmd_bacskpace_mode_backspace = 0x10021665); +PROVIDE(cmd_echo_off = 0x10021681); +PROVIDE(cmd_colors_on = 0x1002169d); +PROVIDE(cmd_vt100_on = 0x100216b9); +PROVIDE(cmd_echo_on = 0x100216d5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1002190f); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10021a3b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10021a71); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10021a91); +PROVIDE(mem_manage_fault.constprop.0 = 0x10008491); +PROVIDE(bus_fault.constprop.0 = 0x100085ed); +PROVIDE(usage_fault.constprop.0 = 0x10008759); +PROVIDE(secure_fault.constprop.0 = 0x100088b5); +PROVIDE(cbputc = 0x10021aeb); +PROVIDE(picolibc_put = 0x10021af7); +PROVIDE(malloc_prepare = 0x10008ff9); +PROVIDE(malloc_lock = 0x1000901d); +PROVIDE(malloc_unlock = 0x10009031); +PROVIDE(pthread_barrier_pool_init = 0x100090f9); +PROVIDE(posix_fs_alloc_obj = 0x1000929d); +PROVIDE(fs_close_vmeth = 0x10021d77); +PROVIDE(fs_ioctl_vmeth = 0x100092e9); +PROVIDE(fs_write_vmeth = 0x10009345); +PROVIDE(fs_read_vmeth = 0x10009365); +PROVIDE(pthread_cond_pool_init = 0x10009529); +PROVIDE(pthread_mutex_pool_init = 0x10009549); +PROVIDE(posix_thread_pool_init = 0x10009569); +PROVIDE(fixed_data_unref = 0x10021df1); +PROVIDE(net_buf_destroy = 0x1000959d); +PROVIDE(fixed_data_alloc = 0x100095fd); +PROVIDE(zvfs_eventfd_ioctl_op = 0x10009759); +PROVIDE(zvfs_eventfd_write_locked = 0x10021f05); +PROVIDE(zvfs_eventfd_rw_op = 0x10009889); +PROVIDE(zvfs_eventfd_write_op = 0x10009985); +PROVIDE(zvfs_eventfd_read_op = 0x10009991); +PROVIDE(zvfs_eventfd_read_locked = 0x10021f73); +PROVIDE(zvfs_eventfd_close_op = 0x1000999d); +PROVIDE(zvfs_fdtable_call_ioctl = 0x10021fd3); PROVIDE(enable_cache64 = 0x30000001); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10021df3); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x1000a0cd); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x1000a0dd); -PROVIDE(fs_get_mnt_point = 0x1000a0e9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10021e1b); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x1000a619); -PROVIDE(call_fn_table = 0x1000a625); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1000a985); -PROVIDE(llext_copy_region = 0x1000a9a9); -PROVIDE(llext_read = 0x10021eb9); -PROVIDE(llext_seek = 0x10021ebd); -PROVIDE(llext_peek = 0x10021ec1); -PROVIDE(llext_alloc = 0x1000aae9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10021ecb); -PROVIDE(llext_find_extension_sym_iterate = 0x10021f0d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10021f25); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1000b8e5); -PROVIDE(llext_shell_name_cb = 0x1002207d); -PROVIDE(llext_name_get = 0x1000b9b9); -PROVIDE(llext_name_arg_get = 0x10022093); -PROVIDE(cmd_llext_list_symbols = 0x1000b9e9); -PROVIDE(cmd_llext_list = 0x1000ba55); -PROVIDE(llext_shell_list_cb = 0x1000ba75); -PROVIDE(cmd_llext_load_hex = 0x1000ba8d); -PROVIDE(cmd_llext_load_fs = 0x1000bb81); -PROVIDE(cmd_llext_call_fn = 0x1000bc61); -PROVIDE(cmd_llext_unload = 0x1000bc8d); -PROVIDE(dns_resolve_cb = 0x100220a5); -PROVIDE(zvfs_fdtable_call_ioctl = 0x10022227); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x10022245); -PROVIDE(k_mutex_unlock.isra.0 = 0x10022249); -PROVIDE(inet_is_supported = 0x10022287); -PROVIDE(net_if_get_by_index = 0x10022293); -PROVIDE(zsock_connected_cb = 0x10022297); -PROVIDE(ipv4_multicast_group.constprop.0 = 0x1000c519); -PROVIDE(zsock_socket_internal = 0x1000c569); -PROVIDE(zsock_accepted_cb = 0x1000c5f1); -PROVIDE(zsock_received_cb = 0x100222a9); -PROVIDE(send_check_and_wait = 0x1000c63d); -PROVIDE(zsock_flush_queue = 0x1002232b); -PROVIDE(zsock_recv_stream_immediate = 0x10022371); -PROVIDE(sock_ioctl_vmeth = 0x1000c741); -PROVIDE(sock_close2_vmeth = 0x10022469); -PROVIDE(sock_shutdown_vmeth = 0x1002246d); -PROVIDE(sock_bind_vmeth = 0x10022471); -PROVIDE(sock_connect_vmeth = 0x10022475); -PROVIDE(sock_listen_vmeth = 0x10022479); -PROVIDE(sock_sendto_vmeth = 0x1002247d); -PROVIDE(sock_write_vmeth = 0x10022481); -PROVIDE(sock_sendmsg_vmeth = 0x10022493); -PROVIDE(sock_accept_vmeth = 0x100224cf); -PROVIDE(zsock_recv_dgram = 0x1000ce09); -PROVIDE(zsock_recv_stream = 0x1000d0b9); -PROVIDE(sock_recvfrom_vmeth = 0x100224d3); -PROVIDE(sock_read_vmeth = 0x100224d7); -PROVIDE(sock_recvmsg_vmeth = 0x100224e9); -PROVIDE(sock_getsockopt_vmeth = 0x100224ed); -PROVIDE(sock_setsockopt_vmeth = 0x100224f1); -PROVIDE(sock_getpeername_vmeth = 0x100224f5); -PROVIDE(sock_getsockname_vmeth = 0x100224f9); -PROVIDE(socket_service_thread = 0x1000d7cd); -PROVIDE(spair_bind = 0x1000d97d); -PROVIDE(spair_listen = 0x1000d995); -PROVIDE(spair_accept = 0x1000d9ad); -PROVIDE(spair_getsockopt = 0x1000d9c5); -PROVIDE(spair_setsockopt = 0x1000d9dd); -PROVIDE(k_sem_take = 0x10022517); -PROVIDE(k_sem_give = 0x1002251b); -PROVIDE(spair_write_avail.isra.0 = 0x1000d9f5); -PROVIDE(sock_is_connected.isra.0 = 0x1000da15); -PROVIDE(k_poll_signal_raise.isra.0 = 0x1002251f); -PROVIDE(spair_delete = 0x1000da2d); -PROVIDE(spair_close = 0x10022523); -PROVIDE(spair_connect = 0x1000dab9); -PROVIDE(spair_read = 0x1000dad1); -PROVIDE(spair_recvfrom = 0x1002253f); -PROVIDE(spair_write = 0x1000dc19); -PROVIDE(spair_sendmsg = 0x1000dde9); -PROVIDE(spair_sendto = 0x1002254f); -PROVIDE(spair_ioctl = 0x1000de81); -PROVIDE(net_ipv4_is_addr_mcast = 0x10022553); -PROVIDE(net_if_l2_data = 0x10022563); -PROVIDE(net_if_get_device = 0x1002256d); -PROVIDE(net_eth_get_hw_capabilities = 0x10022577); -PROVIDE(ethernet_enable = 0x10022599); -PROVIDE(net_eth_is_addr_broadcast = 0x100225cf); -PROVIDE(ethernet_ip_recv = 0x100225fd); -PROVIDE(carrier_on_off = 0x1002265d); -PROVIDE(ethernet_recv = 0x1000e1e9); -PROVIDE(ethernet_mcast_monitor_cb = 0x1000e321); -PROVIDE(ethernet_send = 0x1000e389); -PROVIDE(sys_slist_prepend = 0x100226f9); -PROVIDE(sys_slist_remove = 0x10022707); -PROVIDE(net_if_get_link_addr = 0x10022727); -PROVIDE(net_eth_is_addr_all_zeroes = 0x10022731); -PROVIDE(net_eth_is_addr_unspecified = 0x10022731); -PROVIDE(k_uptime_get_32 = 0x10022759); -PROVIDE(net_eth_is_addr_broadcast = 0x10022769); -PROVIDE(net_if_flag_is_set.constprop.0 = 0x10022797); -PROVIDE(arp_entry_get_last_from_table = 0x1000e565); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x100227a9); -PROVIDE(net_linkaddr_set.constprop.0.isra.0 = 0x100227ad); -PROVIDE(if_get_addr.isra.0 = 0x100227bf); -PROVIDE(arp_entry_find.isra.0 = 0x100227e7); -PROVIDE(k_mutex_unlock.isra.0 = 0x10022803); -PROVIDE(net_if_tx_unlock = 0x10022807); -PROVIDE(arp_entry_cleanup = 0x1002281f); -PROVIDE(arp_request_timeout = 0x1000e58d); -PROVIDE(arp_recv = 0x10022a3d); -PROVIDE(sys_slist_find_and_remove = 0x10022cd1); -PROVIDE(net_ipv4_is_ll_addr = 0x1000eb35); -PROVIDE(net_if_l2 = 0x10022d07); -PROVIDE(net_if_get_device = 0x10022d11); -PROVIDE(net_context_send_cb = 0x10022d1b); -PROVIDE(l2_flags_get = 0x10022d2f); -PROVIDE(net_if_flag_is_set = 0x10022d49); -PROVIDE(k_uptime_get_32 = 0x10022d5d); -PROVIDE(net_if_flag_set = 0x10022d6d); -PROVIDE(net_if_flag_clear = 0x10022d8b); -PROVIDE(need_calc_checksum = 0x1000eb4d); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x10022dab); -PROVIDE(net_if_lock = 0x10022daf); -PROVIDE(k_mutex_unlock.isra.0 = 0x10022dbd); -PROVIDE(get_ifaddr.constprop.0 = 0x10022dc1); -PROVIDE(iface_router_update_timer = 0x1000ebb1); -PROVIDE(net_if_ipv4_get_best_match = 0x1000ec2d); -PROVIDE(if_ipv4_get_addr = 0x10022dff); -PROVIDE(ipv4_is_broadcast_address = 0x10022e59); -PROVIDE(net_if_flag_test_and_set = 0x10022e95); -PROVIDE(net_if_flag_test_and_clear = 0x10022ebf); -PROVIDE(iface_router_expired = 0x1000ecc5); -PROVIDE(net_if_ipv4_set_netmask_deprecated = 0x10022f47); -PROVIDE(update_operational_state = 0x1000f135); -PROVIDE(net_if_tx.isra.0 = 0x1000f361); -PROVIDE(parse_ipv4 = 0x1000fb0d); -PROVIDE(k_mutex_unlock.isra.0 = 0x1002366b); -PROVIDE(mgmt_event_work_handler = 0x1000fc11); -PROVIDE(sys_slist_find_and_remove.constprop.0.isra.0 = 0x1000fd2d); -PROVIDE(mgmt_rebuild_global_event_mask = 0x1000fd65); -PROVIDE(mgmt_event_wait_call.constprop.0 = 0x1002366f); -PROVIDE(net_ipv4_is_addr_mcast = 0x100236f3); -PROVIDE(net_if_flag_is_set = 0x10023703); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x10023717); -PROVIDE(k_mutex_unlock.isra.0 = 0x1002371b); -PROVIDE(net_context_get_iface.isra.0 = 0x1002371f); -PROVIDE(check_used_port.constprop.0 = 0x1000ff95); -PROVIDE(find_available_port = 0x10023723); -PROVIDE(bind_default = 0x100238dd); -PROVIDE(context_sendto = 0x100239bd); -PROVIDE(net_pkt_set_iface = 0x10023f5b); -PROVIDE(clone_pkt_attributes = 0x10023f75); -PROVIDE(pkt_cursor_jump = 0x10024067); -PROVIDE(pkt_cursor_advance = 0x10024093); -PROVIDE(pkt_cursor_update = 0x100240c3); -PROVIDE(pkt_estimate_headers_length.part.0 = 0x10024119); -PROVIDE(pkt_alloc_buffer.constprop.0 = 0x1002413d); -PROVIDE(net_pkt_get_len.isra.0 = 0x100241dd); -PROVIDE(net_pkt_cursor_operate = 0x100241ed); -PROVIDE(pkt_alloc = 0x1001062d); -PROVIDE(pkt_alloc_with_buffer = 0x100244cf); -PROVIDE(net_pkt_clone_internal = 0x1002470b); -PROVIDE(tc_rx_handler = 0x1002489f); -PROVIDE(icmp_call_handlers = 0x1001094d); -PROVIDE(net_conn_change_remote = 0x100248d7); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x10010a09); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x10010a19); -PROVIDE(conn_set_unused = 0x10010a25); -PROVIDE(net_ipv4_is_addr_bcast = 0x1002492b); -PROVIDE(icmpv4_handle_echo_request = 0x1002497f); -PROVIDE(sys_slist_get = 0x10024f81); -PROVIDE(tcp_window_full = 0x10024f95); -PROVIDE(tcp_unsent_len = 0x10024fb3); -PROVIDE(tcp_validate_seq = 0x10024fef); -PROVIDE(tcp_send = 0x10010fc9); -PROVIDE(tcp_setup_last_ack_timer = 0x10011005); -PROVIDE(tcp_last_ack_timeout = 0x100253d1); -PROVIDE(tcp_derive_rto = 0x1002500d); -PROVIDE(k_sem_take = 0x10025031); -PROVIDE(is_destination_local = 0x10025035); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x1002507f); -PROVIDE(tcp_compute_new_length = 0x10025083); -PROVIDE(net_pkt_get_len.isra.0 = 0x1002509d); -PROVIDE(tcp_pkt_pull = 0x100250ad); -PROVIDE(th_get = 0x100250e7); -PROVIDE(tcp_data_len = 0x100251d5); -PROVIDE(tcp_endpoint_set = 0x100251ff); -PROVIDE(tcp_endpoint_cmp = 0x10011039); -PROVIDE(tcp_pkt_append = 0x1002524f); -PROVIDE(k_mutex_unlock.isra.0 = 0x100252d7); -PROVIDE(tcp_send_timer_cancel = 0x10011089); -PROVIDE(tcp_enter_time_wait = 0x10011109); -PROVIDE(tcp_cleanup_recv_queue = 0x100252db); -PROVIDE(tcp_send_process_no_lock = 0x10011131); -PROVIDE(atomic_inc.isra.0 = 0x1002530d); -PROVIDE(tcp_conn_release = 0x10011251); -PROVIDE(tcp_conn_unref.isra.0 = 0x100113a1); -PROVIDE(tcp_conn_close.isra.0 = 0x1002531d); -PROVIDE(tcp_send_process = 0x10025399); -PROVIDE(tcp_timewait_timeout = 0x100253dd); -PROVIDE(tcp_fin_timeout = 0x100253e9); -PROVIDE(tcp_resend_data = 0x100119e9); -PROVIDE(tcp_send_zwp = 0x1001187d); -PROVIDE(tcp_send_ack = 0x100255ab); -PROVIDE(tcp_recv = 0x10012dc9); -PROVIDE(tcp_out_ext = 0x100116ad); -PROVIDE(tcp_out = 0x100255a1); -PROVIDE(tcp_send_data = 0x100255d5); -PROVIDE(tcp_short_window = 0x100256fd); -PROVIDE(tcp_update_recv_wnd = 0x10025787); -PROVIDE(tcp_data_get = 0x10011bad); -PROVIDE(tcp_send_queued_data.part.0 = 0x10011cbd); -PROVIDE(tcp_new_reno_init = 0x100259a7); -PROVIDE(tcp_in = 0x10011d5d); -PROVIDE(dhcpv4_option_callback_get_unique_types = 0x100130f9); -PROVIDE(k_uptime_get = 0x10025b41); -PROVIDE(dhcpv4_set_timeout = 0x10013151); -PROVIDE(dhcpv4_update_message_timeout = 0x10025b51); -PROVIDE(dhcpv4_enter_bound = 0x10013175); -PROVIDE(net_if_flag_is_set = 0x10025b9d); -PROVIDE(net_send_data = 0x10025baf); -PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x100131dd); -PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x100131ed); -PROVIDE(dhcpv4_iface_event_handler = 0x100131f9); -PROVIDE(dhcpv4_start_internal = 0x1001327d); -PROVIDE(dhcpv4_add_option_length_value = 0x10025bc7); -PROVIDE(dhcpv4_create_message = 0x10013305); -PROVIDE(dhcpv4_send_discover = 0x10025c0b); -PROVIDE(dhcpv4_send_request = 0x10025c61); -PROVIDE(dhcpv4_timeout = 0x1001350d); -PROVIDE(net_dhcpv4_input = 0x10013709); -PROVIDE(net_ipv4_is_addr_mcast = 0x1002604d); -PROVIDE(join_ipv4_mcast_group = 0x1002605d); -PROVIDE(invoke_query_callback = 0x1002605f); -PROVIDE(get_slot_by_id = 0x1002606f); -PROVIDE(k_mutex_lock = 0x10026093); -PROVIDE(release_query = 0x10026097); -PROVIDE(k_mutex_unlock.isra.0 = 0x100260ab); -PROVIDE(dns_resolve_cancel_with_hash.constprop.0 = 0x100260af); -PROVIDE(dns_resolve_close_locked = 0x10013ec5); -PROVIDE(query_timeout = 0x1002610b); -PROVIDE(join_ipv6_mcast_group = 0x10026145); -PROVIDE(dns_postprocess_server = 0x10013f61); -PROVIDE(dns_resolve_init_locked = 0x100140d1); -PROVIDE(dispatcher_cb = 0x100143bd); -PROVIDE(dns_write.constprop.0 = 0x10026147); -PROVIDE(usb_isr_handler = 0x10014aa9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1002629d); -PROVIDE(usb_mcux_init = 0x10014ab5); -PROVIDE(usb_mcux_thread_main = 0x10014b19); -PROVIDE(uart_console_init = 0x100157f9); -PROVIDE(console_out = 0x10015821); -PROVIDE(data_size_valid = 0x10015849); -PROVIDE(nxp_edma_callback = 0x100263e7); -PROVIDE(dma_mcux_edma_channel_filter = 0x1002642f); -PROVIDE(dma_mcux_edma_get_status = 0x10026445); -PROVIDE(dma_mcux_edma_resume = 0x10026489); -PROVIDE(dma_mcux_edma_start = 0x100264ab); -PROVIDE(dma_mcux_edma_suspend = 0x100264cd); -PROVIDE(dma_mcux_edma_stop = 0x100264ef); -PROVIDE(dma_mcux_edma_init = 0x10015879); -PROVIDE(dma_imx_config_func_0 = 0x10026543); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10026649); -PROVIDE(dma_mcux_edma_irq_handler = 0x100158b9); -PROVIDE(dma_mcux_edma_0_irq_0 = 0x10026667); -PROVIDE(dma_mcux_edma_0_irq_1 = 0x1002666d); -PROVIDE(dma_mcux_edma_0_irq_2 = 0x10026673); -PROVIDE(dma_mcux_edma_0_irq_3 = 0x10026679); -PROVIDE(dma_mcux_edma_0_irq_4 = 0x1002667f); -PROVIDE(dma_mcux_edma_0_irq_5 = 0x10026685); -PROVIDE(dma_mcux_edma_0_irq_6 = 0x1002668b); -PROVIDE(dma_mcux_edma_0_irq_7 = 0x10026691); -PROVIDE(dma_mcux_edma_0_irq_8 = 0x10026697); -PROVIDE(dma_mcux_edma_0_irq_9 = 0x1002669d); -PROVIDE(dma_mcux_edma_0_irq_10 = 0x100266a3); -PROVIDE(dma_mcux_edma_0_irq_11 = 0x100266a9); -PROVIDE(dma_mcux_edma_0_irq_12 = 0x100266af); -PROVIDE(dma_mcux_edma_0_irq_13 = 0x100266b5); -PROVIDE(dma_mcux_edma_0_irq_14 = 0x100266bb); -PROVIDE(dma_mcux_edma_0_irq_15 = 0x100266c1); -PROVIDE(dma_mcux_edma_reload = 0x10015949); -PROVIDE(dma_mcux_edma_configure = 0x10015b9d); -PROVIDE(dma_mcux_smartdma_start = 0x10015fed); -PROVIDE(dma_mcux_smartdma_irq = 0x100266c7); -PROVIDE(dma_mcux_smartdma_stop = 0x100266df); -PROVIDE(dma_mcux_smartdma_configure = 0x100266e9); -PROVIDE(dma_mcux_smartdma_init = 0x10026713); -PROVIDE(dma_mcux_smartdma_config_func_0 = 0x10026727); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1002673d); -PROVIDE(phy_mii_reg_write.isra.0 = 0x1002675b); -PROVIDE(phy_mii_write = 0x10026785); -PROVIDE(phy_mii_reg_read.isra.0 = 0x1002678d); -PROVIDE(phy_mii_cfg_link = 0x100267b7); -PROVIDE(phy_mii_read = 0x100268a7); -PROVIDE(phy_mii_get_link_state = 0x100268ad); -PROVIDE(invoke_link_cb = 0x100268d5); -PROVIDE(phy_mii_link_cb_set = 0x100268f1); -PROVIDE(monitor_work_handler = 0x10015ffd); -PROVIDE(phy_mii_initialize = 0x1001621d); -PROVIDE(eth_nxp_enet_qos_get_capabilities = 0x10026937); -PROVIDE(eth_nxp_enet_qos_get_phy = 0x1002693b); -PROVIDE(rx_queue_init = 0x10016385); -PROVIDE(tx_dma_done = 0x10026941); -PROVIDE(nxp_enet_qos_0_irq_config_func = 0x1002696f); -PROVIDE(eth_nxp_enet_qos_mac_isr = 0x100163c1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100269a5); -PROVIDE(eth_nxp_enet_qos_phy_cb = 0x10016421); -PROVIDE(eth_nxp_enet_qos_mac_init = 0x10016479); -PROVIDE(eth_nxp_enet_qos_rx = 0x10016801); -PROVIDE(eth_nxp_enet_qos_tx = 0x100166d9); -PROVIDE(eth_nxp_enet_qos_set_config = 0x100269c3); -PROVIDE(eth_nxp_enet_qos_iface_init = 0x100269fd); -PROVIDE(extract_instr = 0x10026a2b); -PROVIDE(flash_flexspi_nor_get_parameters = 0x10026c37); -PROVIDE(flash_flexspi_nor_get_size = 0x10026c3d); -PROVIDE(flash_flexspi_nor_pages_layout = 0x10026c4b); -PROVIDE(flash_flexspi_nor_write_enable = 0x10026c57); -PROVIDE(flash_flexspi_nor_read = 0x10026c81); -PROVIDE(flash_flexspi_nor_read_id_helper = 0x10026cc9); -PROVIDE(flash_flexspi_nor_is25_clear_read_param.constprop.0 = 0x1001691d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10026d09); -PROVIDE(flash_flexspi_nor_wait_bus_busy = 0x10016995); -PROVIDE(flash_flexspi_nor_quad_enable.constprop.0 = 0x10016a0d); -PROVIDE(flash_flexspi_nor_write = 0x10016b41); -PROVIDE(flash_flexspi_nor_erase = 0x10016c3d); -PROVIDE(flash_flexspi_nor_init = 0x10016de9); -PROVIDE(clear_flash_caches = 0x10026d27); -PROVIDE(flash_mcux_pages_layout = 0x100174a1); -PROVIDE(flash_mcux_get_parameters = 0x100174b1); -PROVIDE(flash_mcux_read = 0x10026d45); -PROVIDE(flash_mcux_erase = 0x100174b9); -PROVIDE(flash_mcux_init = 0x10026d5b); -PROVIDE(flash_mcux_write = 0x10026d8f); -PROVIDE(mcux_lpi2c_config_func_0 = 0x1001757d); -PROVIDE(mcux_lpi2c_isr = 0x10027041); -PROVIDE(mcux_lpi2c_config_func_1 = 0x10017595); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10027057); -PROVIDE(mcux_lpi2c_transfer = 0x100175ad); -PROVIDE(mcux_lpi2c_configure = 0x10017695); -PROVIDE(mcux_lpi2c_init = 0x10017701); -PROVIDE(mcux_lpi2c_master_transfer_callback = 0x10027077); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10027081); -PROVIDE(nxp_enet_qos_mdio_init = 0x10017841); -PROVIDE(do_transaction = 0x100178f1); -PROVIDE(nxp_enet_qos_mdio_write = 0x100270a1); -PROVIDE(nxp_enet_qos_mdio_read = 0x100270d7); -PROVIDE(memc_flexspi_init = 0x10027103); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10027217); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10027449); -PROVIDE(pinctrl_mcux_init = 0x10017b99); -PROVIDE(mcux_lpuart_irq_update = 0x10027469); -PROVIDE(mcux_lpuart_irq_callback_set = 0x1002746d); -PROVIDE(mcux_lpuart_config_get = 0x10027475); -PROVIDE(mcux_lpuart_line_ctrl_set = 0x10027485); -PROVIDE(mcux_lpuart_irq_err_disable = 0x100274c7); -PROVIDE(mcux_lpuart_irq_rx_disable = 0x100274d3); -PROVIDE(mcux_lpuart_irq_tx_disable = 0x100274df); -PROVIDE(mcux_lpuart_irq_err_enable = 0x100274eb); -PROVIDE(mcux_lpuart_irq_rx_enable = 0x100274f7); -PROVIDE(mcux_lpuart_irq_tx_enable = 0x10027503); -PROVIDE(mcux_lpuart_irq_rx_full = 0x1002750f); -PROVIDE(mcux_lpuart_irq_tx_complete = 0x1002751f); -PROVIDE(mcux_lpuart_irq_tx_ready = 0x1002752f); -PROVIDE(mcux_lpuart_irq_is_pending = 0x1002754d); -PROVIDE(mcux_lpuart_fifo_read = 0x10027579); -PROVIDE(mcux_lpuart_fifo_fill = 0x100275c1); -PROVIDE(mcux_lpuart_poll_out = 0x100275e9); -PROVIDE(mcux_lpuart_err_check = 0x10027615); -PROVIDE(mcux_lpuart_isr = 0x10027649); -PROVIDE(mcux_lpuart_config_func_0 = 0x10017c49); -PROVIDE(mcux_lpuart_config_func_1 = 0x10017c61); -PROVIDE(mcux_lpuart_configure_init = 0x10027677); -PROVIDE(pinctrl_apply_state.constprop.0 = 0x100277bf); -PROVIDE(mcux_lpuart_init = 0x100277df); -PROVIDE(mcux_lpuart_configure = 0x10027829); -PROVIDE(mcux_lpuart_poll_in = 0x10027859); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10027899); -PROVIDE(lpspi_isr = 0x10027903); -PROVIDE(spi_mcux_config_func_0 = 0x10017ed1); -PROVIDE(spi_context_get_next_buf.constprop.0 = 0x10027905); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1002792b); -PROVIDE(lpspi_dma_dev_ready = 0x10017ee9); -PROVIDE(gpio_pin_set_dt.isra.0 = 0x1002794b); -PROVIDE(spi_mcux_dma_init = 0x10027973); -PROVIDE(spi_mcux_dma_next_fill = 0x10017f21); -PROVIDE(spi_nxp_dma_transceive_sync = 0x10018029); -PROVIDE(spi_mcux_dma_callback = 0x100181b9); -PROVIDE(elapsed = 0x10018341); -PROVIDE(sys_clock_driver_init = 0x1001838d); -PROVIDE(CLOCK_GetFro12MFreq = 0x100185b5); -PROVIDE(CLOCK_GetClk48MFreq = 0x100185d1); -PROVIDE(CLOCK_GetClk16KFreq = 0x100185ed); -PROVIDE(CLOCK_GetExtClkFreq = 0x1001860d); -PROVIDE(CLOCK_GetFroHfFreq = 0x10018629); -PROVIDE(CLOCK_GetOsc32KFreq = 0x10018655); -PROVIDE(CLOCK_GetLposcFreq = 0x1001867d); -PROVIDE(CLOCK_GetSystickClkFreq = 0x10018cd1); -PROVIDE(EDMA_GetInstance = 0x10018ff5); -PROVIDE(__NVIC_EnableIRQ = 0x10019561); -PROVIDE(CLOCK_EnableClock = 0x100280a3); -PROVIDE(LPI2C_GetCyclesForWidth = 0x1001957d); -PROVIDE(FLEXSPI_SoftwareReset = 0x10028489); -PROVIDE(FLEXSPI_GetBusIdleStatus = 0x10028499); -PROVIDE(USB_DeviceEhciSetDefaultState = 0x10028935); -PROVIDE(USB_DeviceEhciTransfer = 0x1001a441); -PROVIDE(USB_DeviceEhciCancelControlPipe = 0x1001a64d); -PROVIDE(USB_DeviceEhciEndpointDeinit = 0x100289f3); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100290fb); -PROVIDE(do_device_init = 0x10029131); -PROVIDE(z_sys_init_run_level = 0x1001ab45); -PROVIDE(bg_thread_main = 0x1001ab75); -PROVIDE(statics_init = 0x1001ae69); -PROVIDE(create_free_list = 0x10029269); -PROVIDE(init_mem_slab_obj_core_list = 0x1001ae8d); -PROVIDE(init_mbox_module = 0x1001af0d); -PROVIDE(unpend_thread_no_timeout = 0x10029333); -PROVIDE(adjust_owner_prio.isra.0 = 0x100294b9); -PROVIDE(unpend_thread_no_timeout = 0x100294d7); -PROVIDE(queue_insert = 0x100294f1); -PROVIDE(k_sys_work_q_init = 0x1001b465); -PROVIDE(flag_test_and_clear = 0x100297c5); -PROVIDE(unschedule_locked = 0x100297db); -PROVIDE(notify_queue_locked.isra.0 = 0x100297f9); -PROVIDE(work_queue_main = 0x1001b499); -PROVIDE(cancel_async_locked = 0x10029807); -PROVIDE(submit_to_queue_locked = 0x1001b5e5); -PROVIDE(work_timeout = 0x1002986d); -PROVIDE(unpend_thread_no_timeout = 0x1002996d); -PROVIDE(sys_dlist_remove = 0x100299f3); -PROVIDE(unpend_thread_no_timeout = 0x10029a03); -PROVIDE(ready_thread = 0x1001bb3d); -PROVIDE(unready_thread = 0x1001bbc1); -PROVIDE(z_swap_irqlock = 0x1001bc15); -PROVIDE(add_to_waitq_locked = 0x10029a17); -PROVIDE(z_tick_sleep = 0x1001c0f9); -PROVIDE(wait_for = 0x10029c03); -PROVIDE(z_sched_wake_all.constprop.0 = 0x10029c75); -PROVIDE(slice_timeout = 0x1001c49d); -PROVIDE(first = 0x1001c699); -PROVIDE(elapsed = 0x1001c6a9); -PROVIDE(next_timeout = 0x10029eb5); -PROVIDE(remove_timeout = 0x1001c6bd); -PROVIDE(timeout_rem = 0x1001c6f5); -PROVIDE(clear_event_registrations = 0x1001caa5); -PROVIDE(add_event = 0x1002a067); -PROVIDE(register_events = 0x1002a0bb); -PROVIDE(signal_poll_event = 0x1002a1bf); -PROVIDE(z_heap_aligned_alloc = 0x1002a2bb); -PROVIDE(__ultoa_invert = 0x1002a595); -PROVIDE(skip_to_arg = 0x1001d44d); -PROVIDE(mulShift64 = 0x1002a5e3); -PROVIDE(mulShiftAll64 = 0x1002a643); -PROVIDE(div10 = 0x1001e0e5); -PROVIDE(chunk_field = 0x1001f207); -PROVIDE(chunk_set = 0x1001f21d); -PROVIDE(chunk_size = 0x1001f233); -PROVIDE(set_chunk_used = 0x1001f23f); -PROVIDE(set_chunk_size = 0x1001f26f); -PROVIDE(mem_to_chunkid = 0x1001f277); -PROVIDE(bucket_idx.isra.0 = 0x1001f28b); -PROVIDE(free_list_remove_bidx = 0x1001f2a7); -PROVIDE(free_list_remove = 0x1001f303); -PROVIDE(alloc_chunk = 0x1001f331); -PROVIDE(split_chunks = 0x1001f3a5); -PROVIDE(merge_chunks = 0x1001f3f3); -PROVIDE(free_list_add = 0x1001f42f); -PROVIDE(free_chunk = 0x1001f4b3); -PROVIDE(setup_bundle_data.constprop.0 = 0x1001fab3); -PROVIDE(set_region = 0x1001faed); -PROVIDE(match_region = 0x1001fb7d); -PROVIDE(ring_buf_put_claim = 0x1001fd49); -PROVIDE(ring_buf_get_claim = 0x1001fd67); -PROVIDE(panic = 0x1002114d); -PROVIDE(process_log_msg.constprop.0 = 0x1002114f); -PROVIDE(process = 0x100211db); -PROVIDE(dropped = 0x1002121b); -PROVIDE(remove_from_tail.part.0 = 0x100214c9); -PROVIDE(foldcase = 0x100218d9); -PROVIDE(fnmatchx = 0x100218e9); -PROVIDE(processing_data = 0x10022a59); -PROVIDE(net_init = 0x10022ac3); -PROVIDE(net_ipv4_is_addr_mcast = 0x10024c2d); -PROVIDE(net_ipv4_is_addr_bcast = 0x10024c3d); -PROVIDE(net_ipv4_is_my_addr = 0x10024c5f); -PROVIDE(mcux_lpc_syscon_clock_control_off = 0x100262d9); -PROVIDE(mcux_lpc_syscon_clock_control_get_subsys_rate = 0x100262dd); -PROVIDE(mcux_lpc_syscon_clock_control_on = 0x1002638d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1002201b); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x1000a2cd); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x1000a2dd); +PROVIDE(fs_get_mnt_point = 0x1000a2e9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10022043); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x1000a819); +PROVIDE(call_fn_table = 0x1000a825); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1000ab85); +PROVIDE(llext_copy_region = 0x1000aba9); +PROVIDE(llext_read = 0x100220e1); +PROVIDE(llext_seek = 0x100220e5); +PROVIDE(llext_peek = 0x100220e9); +PROVIDE(llext_alloc = 0x1000ace9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100220f3); +PROVIDE(llext_find_extension_sym_iterate = 0x10022135); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1002214d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1000bae5); +PROVIDE(llext_shell_name_cb = 0x100222a5); +PROVIDE(llext_name_get = 0x1000bbb9); +PROVIDE(llext_name_arg_get = 0x100222bb); +PROVIDE(cmd_llext_list_symbols = 0x1000bbe9); +PROVIDE(cmd_llext_list = 0x1000bc55); +PROVIDE(llext_shell_list_cb = 0x1000bc75); +PROVIDE(cmd_llext_load_hex = 0x1000bc8d); +PROVIDE(cmd_llext_load_fs = 0x1000bd81); +PROVIDE(cmd_llext_call_fn = 0x1000be61); +PROVIDE(cmd_llext_unload = 0x1000be8d); +PROVIDE(dns_resolve_cb = 0x100222cd); +PROVIDE(zvfs_fdtable_call_ioctl = 0x1002244f); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x1002246d); +PROVIDE(k_mutex_unlock.isra.0 = 0x10022471); +PROVIDE(inet_is_supported = 0x100224af); +PROVIDE(net_if_get_by_index = 0x100224bb); +PROVIDE(zsock_connected_cb = 0x100224bf); +PROVIDE(ipv4_multicast_group.constprop.0 = 0x1000c719); +PROVIDE(zsock_socket_internal = 0x1000c769); +PROVIDE(zsock_accepted_cb = 0x1000c7f1); +PROVIDE(zsock_received_cb = 0x100224d1); +PROVIDE(send_check_and_wait = 0x1000c83d); +PROVIDE(zsock_flush_queue = 0x10022553); +PROVIDE(zsock_recv_stream_immediate = 0x10022599); +PROVIDE(sock_ioctl_vmeth = 0x1000c941); +PROVIDE(sock_close2_vmeth = 0x10022691); +PROVIDE(sock_shutdown_vmeth = 0x10022695); +PROVIDE(sock_bind_vmeth = 0x10022699); +PROVIDE(sock_connect_vmeth = 0x1002269d); +PROVIDE(sock_listen_vmeth = 0x100226a1); +PROVIDE(sock_sendto_vmeth = 0x100226a5); +PROVIDE(sock_write_vmeth = 0x100226a9); +PROVIDE(sock_sendmsg_vmeth = 0x100226bb); +PROVIDE(sock_accept_vmeth = 0x100226f7); +PROVIDE(zsock_recv_dgram = 0x1000d009); +PROVIDE(zsock_recv_stream = 0x1000d2b9); +PROVIDE(sock_recvfrom_vmeth = 0x100226fb); +PROVIDE(sock_read_vmeth = 0x100226ff); +PROVIDE(sock_recvmsg_vmeth = 0x10022711); +PROVIDE(sock_getsockopt_vmeth = 0x10022715); +PROVIDE(sock_setsockopt_vmeth = 0x10022719); +PROVIDE(sock_getpeername_vmeth = 0x1002271d); +PROVIDE(sock_getsockname_vmeth = 0x10022721); +PROVIDE(socket_service_thread = 0x1000d9cd); +PROVIDE(spair_bind = 0x1000db7d); +PROVIDE(spair_listen = 0x1000db95); +PROVIDE(spair_accept = 0x1000dbad); +PROVIDE(spair_getsockopt = 0x1000dbc5); +PROVIDE(spair_setsockopt = 0x1000dbdd); +PROVIDE(k_sem_take = 0x1002273f); +PROVIDE(k_sem_give = 0x10022743); +PROVIDE(spair_write_avail.isra.0 = 0x1000dbf5); +PROVIDE(sock_is_connected.isra.0 = 0x1000dc15); +PROVIDE(k_poll_signal_raise.isra.0 = 0x10022747); +PROVIDE(spair_delete = 0x1000dc2d); +PROVIDE(spair_close = 0x1002274b); +PROVIDE(spair_connect = 0x1000dcb9); +PROVIDE(spair_read = 0x1000dcd1); +PROVIDE(spair_recvfrom = 0x10022767); +PROVIDE(spair_write = 0x1000de19); +PROVIDE(spair_sendmsg = 0x1000dfe9); +PROVIDE(spair_sendto = 0x10022777); +PROVIDE(spair_ioctl = 0x1000e081); +PROVIDE(net_ipv4_is_addr_mcast = 0x1002277b); +PROVIDE(net_if_l2_data = 0x1002278b); +PROVIDE(net_if_get_device = 0x10022795); +PROVIDE(net_eth_get_hw_capabilities = 0x1002279f); +PROVIDE(ethernet_enable = 0x100227c1); +PROVIDE(net_eth_is_addr_broadcast = 0x100227f7); +PROVIDE(ethernet_ip_recv = 0x10022825); +PROVIDE(carrier_on_off = 0x10022885); +PROVIDE(ethernet_recv = 0x1000e3e9); +PROVIDE(ethernet_mcast_monitor_cb = 0x1000e521); +PROVIDE(ethernet_send = 0x1000e589); +PROVIDE(sys_slist_prepend = 0x10022921); +PROVIDE(sys_slist_remove = 0x1002292f); +PROVIDE(net_if_get_link_addr = 0x1002294f); +PROVIDE(net_eth_is_addr_all_zeroes = 0x10022959); +PROVIDE(net_eth_is_addr_unspecified = 0x10022959); +PROVIDE(k_uptime_get_32 = 0x10022981); +PROVIDE(net_eth_is_addr_broadcast = 0x10022991); +PROVIDE(net_if_flag_is_set.constprop.0 = 0x100229bf); +PROVIDE(arp_entry_get_last_from_table = 0x1000e765); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x100229d1); +PROVIDE(net_linkaddr_set.constprop.0.isra.0 = 0x100229d5); +PROVIDE(if_get_addr.isra.0 = 0x100229e7); +PROVIDE(arp_entry_find.isra.0 = 0x10022a0f); +PROVIDE(k_mutex_unlock.isra.0 = 0x10022a2b); +PROVIDE(net_if_tx_unlock = 0x10022a2f); +PROVIDE(arp_entry_cleanup = 0x10022a47); +PROVIDE(arp_request_timeout = 0x1000e78d); +PROVIDE(arp_recv = 0x10022c65); +PROVIDE(sys_slist_find_and_remove = 0x10022ef9); +PROVIDE(net_ipv4_is_ll_addr = 0x1000ed35); +PROVIDE(net_if_l2 = 0x10022f2f); +PROVIDE(net_if_get_device = 0x10022f39); +PROVIDE(net_context_send_cb = 0x10022f43); +PROVIDE(l2_flags_get = 0x10022f57); +PROVIDE(net_if_flag_is_set = 0x10022f71); +PROVIDE(k_uptime_get_32 = 0x10022f85); +PROVIDE(net_if_flag_set = 0x10022f95); +PROVIDE(net_if_flag_clear = 0x10022fb3); +PROVIDE(need_calc_checksum = 0x1000ed4d); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x10022fd3); +PROVIDE(net_if_lock = 0x10022fd7); +PROVIDE(k_mutex_unlock.isra.0 = 0x10022fe5); +PROVIDE(get_ifaddr.constprop.0 = 0x10022fe9); +PROVIDE(iface_router_update_timer = 0x1000edb1); +PROVIDE(net_if_ipv4_get_best_match = 0x1000ee2d); +PROVIDE(if_ipv4_get_addr = 0x10023027); +PROVIDE(ipv4_is_broadcast_address = 0x10023081); +PROVIDE(net_if_flag_test_and_set = 0x100230bd); +PROVIDE(net_if_flag_test_and_clear = 0x100230e7); +PROVIDE(iface_router_expired = 0x1000eec5); +PROVIDE(net_if_ipv4_set_netmask_deprecated = 0x1002316f); +PROVIDE(update_operational_state = 0x1000f35d); +PROVIDE(net_if_tx.isra.0 = 0x1000f589); +PROVIDE(parse_ipv4 = 0x1000fd35); +PROVIDE(k_mutex_unlock.isra.0 = 0x10023893); +PROVIDE(mgmt_event_work_handler = 0x1000fe39); +PROVIDE(sys_slist_find_and_remove.constprop.0.isra.0 = 0x1000ff55); +PROVIDE(mgmt_rebuild_global_event_mask = 0x1000ff8d); +PROVIDE(mgmt_event_wait_call.constprop.0 = 0x10023897); +PROVIDE(net_ipv4_is_addr_mcast = 0x1002391b); +PROVIDE(net_if_flag_is_set = 0x1002392b); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x1002393f); +PROVIDE(k_mutex_unlock.isra.0 = 0x10023943); +PROVIDE(net_context_get_iface.isra.0 = 0x10023947); +PROVIDE(check_used_port.constprop.0 = 0x100101bd); +PROVIDE(find_available_port = 0x1002394b); +PROVIDE(bind_default = 0x10023b05); +PROVIDE(context_sendto = 0x10023be5); +PROVIDE(net_pkt_set_iface = 0x10024183); +PROVIDE(clone_pkt_attributes = 0x1002419d); +PROVIDE(pkt_cursor_jump = 0x1002428f); +PROVIDE(pkt_cursor_advance = 0x100242bb); +PROVIDE(pkt_cursor_update = 0x100242eb); +PROVIDE(pkt_estimate_headers_length.part.0 = 0x10024341); +PROVIDE(pkt_alloc_buffer.constprop.0 = 0x10024365); +PROVIDE(net_pkt_get_len.isra.0 = 0x10024405); +PROVIDE(net_pkt_cursor_operate = 0x10024415); +PROVIDE(pkt_alloc = 0x10010855); +PROVIDE(pkt_alloc_with_buffer = 0x100246f7); +PROVIDE(net_pkt_clone_internal = 0x10024933); +PROVIDE(tc_rx_handler = 0x10024ac7); +PROVIDE(icmp_call_handlers = 0x10010b75); +PROVIDE(net_conn_change_remote = 0x10024aff); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x10010c31); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x10010c41); +PROVIDE(conn_set_unused = 0x10010c4d); +PROVIDE(net_ipv4_is_addr_bcast = 0x10024b53); +PROVIDE(icmpv4_handle_echo_request = 0x10024ba7); +PROVIDE(sys_slist_get = 0x100251a9); +PROVIDE(tcp_window_full = 0x100251bd); +PROVIDE(tcp_unsent_len = 0x100251db); +PROVIDE(tcp_validate_seq = 0x10025217); +PROVIDE(tcp_send = 0x100111f1); +PROVIDE(tcp_setup_last_ack_timer = 0x1001122d); +PROVIDE(tcp_last_ack_timeout = 0x100255f9); +PROVIDE(tcp_derive_rto = 0x10025235); +PROVIDE(k_sem_take = 0x10025259); +PROVIDE(is_destination_local = 0x1002525d); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x100252a7); +PROVIDE(tcp_compute_new_length = 0x100252ab); +PROVIDE(net_pkt_get_len.isra.0 = 0x100252c5); +PROVIDE(tcp_pkt_pull = 0x100252d5); +PROVIDE(th_get = 0x1002530f); +PROVIDE(tcp_data_len = 0x100253fd); +PROVIDE(tcp_endpoint_set = 0x10025427); +PROVIDE(tcp_endpoint_cmp = 0x10011261); +PROVIDE(tcp_pkt_append = 0x10025477); +PROVIDE(k_mutex_unlock.isra.0 = 0x100254ff); +PROVIDE(tcp_send_timer_cancel = 0x100112b1); +PROVIDE(tcp_enter_time_wait = 0x10011331); +PROVIDE(tcp_cleanup_recv_queue = 0x10025503); +PROVIDE(tcp_send_process_no_lock = 0x10011359); +PROVIDE(atomic_inc.isra.0 = 0x10025535); +PROVIDE(tcp_conn_release = 0x10011479); +PROVIDE(tcp_conn_unref.isra.0 = 0x100115c9); +PROVIDE(tcp_conn_close.isra.0 = 0x10025545); +PROVIDE(tcp_send_process = 0x100255c1); +PROVIDE(tcp_timewait_timeout = 0x10025605); +PROVIDE(tcp_fin_timeout = 0x10025611); +PROVIDE(tcp_resend_data = 0x10011c11); +PROVIDE(tcp_send_zwp = 0x10011aa5); +PROVIDE(tcp_send_ack = 0x100257d3); +PROVIDE(tcp_recv = 0x10012ff1); +PROVIDE(tcp_out_ext = 0x100118d5); +PROVIDE(tcp_out = 0x100257c9); +PROVIDE(tcp_send_data = 0x100257fd); +PROVIDE(tcp_short_window = 0x10025925); +PROVIDE(tcp_update_recv_wnd = 0x100259af); +PROVIDE(tcp_data_get = 0x10011dd5); +PROVIDE(tcp_send_queued_data.part.0 = 0x10011ee5); +PROVIDE(tcp_new_reno_init = 0x10025bcf); +PROVIDE(tcp_in = 0x10011f85); +PROVIDE(dhcpv4_option_callback_get_unique_types = 0x10013321); +PROVIDE(k_uptime_get = 0x10025d69); +PROVIDE(dhcpv4_set_timeout = 0x10013379); +PROVIDE(dhcpv4_update_message_timeout = 0x10025d79); +PROVIDE(dhcpv4_enter_bound = 0x1001339d); +PROVIDE(net_if_flag_is_set = 0x10025dc5); +PROVIDE(net_send_data = 0x10025dd7); +PROVIDE(k_mutex_lock.constprop.0.isra.0 = 0x10013405); +PROVIDE(k_mutex_unlock.constprop.0.isra.0 = 0x10013415); +PROVIDE(dhcpv4_iface_event_handler = 0x10013421); +PROVIDE(dhcpv4_start_internal = 0x100134a5); +PROVIDE(dhcpv4_add_option_length_value = 0x10025def); +PROVIDE(dhcpv4_create_message = 0x1001352d); +PROVIDE(dhcpv4_send_discover = 0x10025e33); +PROVIDE(dhcpv4_send_request = 0x10025e89); +PROVIDE(dhcpv4_timeout = 0x10013735); +PROVIDE(net_dhcpv4_input = 0x10013931); +PROVIDE(net_ipv4_is_addr_mcast = 0x10026275); +PROVIDE(join_ipv4_mcast_group = 0x10026285); +PROVIDE(invoke_query_callback = 0x10026287); +PROVIDE(get_slot_by_id = 0x10026297); +PROVIDE(k_mutex_lock = 0x100262bb); +PROVIDE(release_query = 0x100262bf); +PROVIDE(k_mutex_unlock.isra.0 = 0x100262d3); +PROVIDE(dns_resolve_cancel_with_hash.constprop.0 = 0x100262d7); +PROVIDE(dns_resolve_close_locked = 0x100140ed); +PROVIDE(query_timeout = 0x10026333); +PROVIDE(join_ipv6_mcast_group = 0x1002636d); +PROVIDE(dns_postprocess_server = 0x10014189); +PROVIDE(dns_resolve_init_locked = 0x100142f9); +PROVIDE(dispatcher_cb = 0x100145e5); +PROVIDE(dns_write.constprop.0 = 0x1002636f); +PROVIDE(usb_isr_handler = 0x10014cd1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100264c5); +PROVIDE(usb_mcux_init = 0x10014cdd); +PROVIDE(usb_mcux_thread_main = 0x10014d41); +PROVIDE(uart_console_init = 0x10015a21); +PROVIDE(console_out = 0x10015a49); +PROVIDE(data_size_valid = 0x10015a71); +PROVIDE(nxp_edma_callback = 0x1002660f); +PROVIDE(dma_mcux_edma_channel_filter = 0x10026657); +PROVIDE(dma_mcux_edma_get_status = 0x1002666d); +PROVIDE(dma_mcux_edma_resume = 0x100266b1); +PROVIDE(dma_mcux_edma_start = 0x100266d3); +PROVIDE(dma_mcux_edma_suspend = 0x100266f5); +PROVIDE(dma_mcux_edma_stop = 0x10026717); +PROVIDE(dma_mcux_edma_init = 0x10015aa1); +PROVIDE(dma_imx_config_func_0 = 0x1002676b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10026871); +PROVIDE(dma_mcux_edma_irq_handler = 0x10015ae1); +PROVIDE(dma_mcux_edma_0_irq_0 = 0x1002688f); +PROVIDE(dma_mcux_edma_0_irq_1 = 0x10026895); +PROVIDE(dma_mcux_edma_0_irq_2 = 0x1002689b); +PROVIDE(dma_mcux_edma_0_irq_3 = 0x100268a1); +PROVIDE(dma_mcux_edma_0_irq_4 = 0x100268a7); +PROVIDE(dma_mcux_edma_0_irq_5 = 0x100268ad); +PROVIDE(dma_mcux_edma_0_irq_6 = 0x100268b3); +PROVIDE(dma_mcux_edma_0_irq_7 = 0x100268b9); +PROVIDE(dma_mcux_edma_0_irq_8 = 0x100268bf); +PROVIDE(dma_mcux_edma_0_irq_9 = 0x100268c5); +PROVIDE(dma_mcux_edma_0_irq_10 = 0x100268cb); +PROVIDE(dma_mcux_edma_0_irq_11 = 0x100268d1); +PROVIDE(dma_mcux_edma_0_irq_12 = 0x100268d7); +PROVIDE(dma_mcux_edma_0_irq_13 = 0x100268dd); +PROVIDE(dma_mcux_edma_0_irq_14 = 0x100268e3); +PROVIDE(dma_mcux_edma_0_irq_15 = 0x100268e9); +PROVIDE(dma_mcux_edma_reload = 0x10015b71); +PROVIDE(dma_mcux_edma_configure = 0x10015dc5); +PROVIDE(dma_mcux_smartdma_start = 0x10016215); +PROVIDE(dma_mcux_smartdma_irq = 0x100268ef); +PROVIDE(dma_mcux_smartdma_stop = 0x10026907); +PROVIDE(dma_mcux_smartdma_configure = 0x10026911); +PROVIDE(dma_mcux_smartdma_init = 0x1002693b); +PROVIDE(dma_mcux_smartdma_config_func_0 = 0x1002694f); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10026965); +PROVIDE(phy_mii_reg_write.isra.0 = 0x10026983); +PROVIDE(phy_mii_write = 0x100269ad); +PROVIDE(phy_mii_reg_read.isra.0 = 0x100269b5); +PROVIDE(phy_mii_cfg_link = 0x100269df); +PROVIDE(phy_mii_read = 0x10026acf); +PROVIDE(phy_mii_get_link_state = 0x10026ad5); +PROVIDE(invoke_link_cb = 0x10026afd); +PROVIDE(phy_mii_link_cb_set = 0x10026b19); +PROVIDE(monitor_work_handler = 0x10016225); +PROVIDE(phy_mii_initialize = 0x10016445); +PROVIDE(eth_nxp_enet_qos_get_capabilities = 0x10026b5f); +PROVIDE(eth_nxp_enet_qos_get_phy = 0x10026b63); +PROVIDE(rx_queue_init = 0x100165ad); +PROVIDE(tx_dma_done = 0x10026b69); +PROVIDE(nxp_enet_qos_0_irq_config_func = 0x10026b97); +PROVIDE(eth_nxp_enet_qos_mac_isr = 0x100165e9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10026bcd); +PROVIDE(eth_nxp_enet_qos_phy_cb = 0x10016649); +PROVIDE(eth_nxp_enet_qos_mac_init = 0x100166a1); +PROVIDE(eth_nxp_enet_qos_rx = 0x10016a29); +PROVIDE(eth_nxp_enet_qos_tx = 0x10016901); +PROVIDE(eth_nxp_enet_qos_set_config = 0x10026beb); +PROVIDE(eth_nxp_enet_qos_iface_init = 0x10026c25); +PROVIDE(extract_instr = 0x10026c53); +PROVIDE(flash_flexspi_nor_get_parameters = 0x10026e5f); +PROVIDE(flash_flexspi_nor_get_size = 0x10026e65); +PROVIDE(flash_flexspi_nor_pages_layout = 0x10026e73); +PROVIDE(flash_flexspi_nor_write_enable = 0x10026e7f); +PROVIDE(flash_flexspi_nor_read = 0x10026ea9); +PROVIDE(flash_flexspi_nor_read_id_helper = 0x10026ef1); +PROVIDE(flash_flexspi_nor_is25_clear_read_param.constprop.0 = 0x10016b45); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10026f31); +PROVIDE(flash_flexspi_nor_wait_bus_busy = 0x10016bbd); +PROVIDE(flash_flexspi_nor_quad_enable.constprop.0 = 0x10016c35); +PROVIDE(flash_flexspi_nor_write = 0x10016d69); +PROVIDE(flash_flexspi_nor_erase = 0x10016e65); +PROVIDE(flash_flexspi_nor_init = 0x10017011); +PROVIDE(clear_flash_caches = 0x10026f4f); +PROVIDE(flash_mcux_pages_layout = 0x100176c9); +PROVIDE(flash_mcux_get_parameters = 0x100176d9); +PROVIDE(flash_mcux_read = 0x10026f6d); +PROVIDE(flash_mcux_erase = 0x100176e1); +PROVIDE(flash_mcux_init = 0x10026f83); +PROVIDE(flash_mcux_write = 0x10026fb7); +PROVIDE(mcux_lpi2c_config_func_0 = 0x100177a5); +PROVIDE(mcux_lpi2c_isr = 0x10027269); +PROVIDE(mcux_lpi2c_config_func_1 = 0x100177bd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1002727f); +PROVIDE(mcux_lpi2c_transfer = 0x100177d5); +PROVIDE(mcux_lpi2c_configure = 0x100178bd); +PROVIDE(mcux_lpi2c_init = 0x10017929); +PROVIDE(mcux_lpi2c_master_transfer_callback = 0x1002729f); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100272a9); +PROVIDE(nxp_enet_qos_mdio_init = 0x10017a69); +PROVIDE(do_transaction = 0x10017b19); +PROVIDE(nxp_enet_qos_mdio_write = 0x100272c9); +PROVIDE(nxp_enet_qos_mdio_read = 0x100272ff); +PROVIDE(memc_flexspi_init = 0x1002732b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1002743f); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10027671); +PROVIDE(pinctrl_mcux_init = 0x10017dc1); +PROVIDE(mcux_lpuart_irq_update = 0x10027691); +PROVIDE(mcux_lpuart_irq_callback_set = 0x10027695); +PROVIDE(mcux_lpuart_config_get = 0x1002769d); +PROVIDE(mcux_lpuart_line_ctrl_set = 0x100276ad); +PROVIDE(mcux_lpuart_irq_err_disable = 0x100276ef); +PROVIDE(mcux_lpuart_irq_rx_disable = 0x100276fb); +PROVIDE(mcux_lpuart_irq_tx_disable = 0x10027707); +PROVIDE(mcux_lpuart_irq_err_enable = 0x10027713); +PROVIDE(mcux_lpuart_irq_rx_enable = 0x1002771f); +PROVIDE(mcux_lpuart_irq_tx_enable = 0x1002772b); +PROVIDE(mcux_lpuart_irq_rx_full = 0x10027737); +PROVIDE(mcux_lpuart_irq_tx_complete = 0x10027747); +PROVIDE(mcux_lpuart_irq_tx_ready = 0x10027757); +PROVIDE(mcux_lpuart_irq_is_pending = 0x10027775); +PROVIDE(mcux_lpuart_fifo_read = 0x100277a1); +PROVIDE(mcux_lpuart_fifo_fill = 0x100277e9); +PROVIDE(mcux_lpuart_poll_out = 0x10027811); +PROVIDE(mcux_lpuart_err_check = 0x1002783d); +PROVIDE(mcux_lpuart_isr = 0x10027871); +PROVIDE(mcux_lpuart_config_func_0 = 0x10017e71); +PROVIDE(mcux_lpuart_config_func_1 = 0x10017e89); +PROVIDE(mcux_lpuart_configure_init = 0x1002789f); +PROVIDE(pinctrl_apply_state.constprop.0 = 0x100279e7); +PROVIDE(mcux_lpuart_init = 0x10027a07); +PROVIDE(mcux_lpuart_configure = 0x10027a51); +PROVIDE(mcux_lpuart_poll_in = 0x10027a81); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10027ac1); +PROVIDE(lpspi_isr = 0x10027b2b); +PROVIDE(spi_mcux_config_func_0 = 0x100180f9); +PROVIDE(spi_context_get_next_buf.constprop.0 = 0x10027b2d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10027b53); +PROVIDE(lpspi_dma_dev_ready = 0x10018111); +PROVIDE(gpio_pin_set_dt.isra.0 = 0x10027b73); +PROVIDE(spi_mcux_dma_init = 0x10027b9b); +PROVIDE(spi_mcux_dma_next_fill = 0x10018149); +PROVIDE(spi_nxp_dma_transceive_sync = 0x10018251); +PROVIDE(spi_mcux_dma_callback = 0x100183e1); +PROVIDE(elapsed = 0x10018569); +PROVIDE(sys_clock_driver_init = 0x100185b5); +PROVIDE(CLOCK_GetFro12MFreq = 0x100187dd); +PROVIDE(CLOCK_GetClk48MFreq = 0x100187f9); +PROVIDE(CLOCK_GetClk16KFreq = 0x10018815); +PROVIDE(CLOCK_GetExtClkFreq = 0x10018835); +PROVIDE(CLOCK_GetFroHfFreq = 0x10018851); +PROVIDE(CLOCK_GetOsc32KFreq = 0x1001887d); +PROVIDE(CLOCK_GetLposcFreq = 0x100188a5); +PROVIDE(CLOCK_GetSystickClkFreq = 0x10018ef9); +PROVIDE(EDMA_GetInstance = 0x1001921d); +PROVIDE(__NVIC_EnableIRQ = 0x10019789); +PROVIDE(CLOCK_EnableClock = 0x100282cb); +PROVIDE(LPI2C_GetCyclesForWidth = 0x100197a5); +PROVIDE(FLEXSPI_SoftwareReset = 0x100286b1); +PROVIDE(FLEXSPI_GetBusIdleStatus = 0x100286c1); +PROVIDE(USB_DeviceEhciSetDefaultState = 0x10028b5d); +PROVIDE(USB_DeviceEhciTransfer = 0x1001a669); +PROVIDE(USB_DeviceEhciCancelControlPipe = 0x1001a875); +PROVIDE(USB_DeviceEhciEndpointDeinit = 0x10028c1b); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10029323); +PROVIDE(do_device_init = 0x10029359); +PROVIDE(z_sys_init_run_level = 0x1001ad6d); +PROVIDE(bg_thread_main = 0x1001ad9d); +PROVIDE(statics_init = 0x1001b091); +PROVIDE(create_free_list = 0x10029491); +PROVIDE(init_mem_slab_obj_core_list = 0x1001b0b5); +PROVIDE(init_mbox_module = 0x1001b135); +PROVIDE(unpend_thread_no_timeout = 0x1002955b); +PROVIDE(adjust_owner_prio.isra.0 = 0x100296e1); +PROVIDE(unpend_thread_no_timeout = 0x100296ff); +PROVIDE(queue_insert = 0x10029719); +PROVIDE(k_sys_work_q_init = 0x1001b68d); +PROVIDE(flag_test_and_clear = 0x100299ed); +PROVIDE(unschedule_locked = 0x10029a03); +PROVIDE(notify_queue_locked.isra.0 = 0x10029a21); +PROVIDE(work_queue_main = 0x1001b6c1); +PROVIDE(cancel_async_locked = 0x10029a2f); +PROVIDE(submit_to_queue_locked = 0x1001b80d); +PROVIDE(work_timeout = 0x10029a95); +PROVIDE(unpend_thread_no_timeout = 0x10029b95); +PROVIDE(sys_dlist_remove = 0x10029c1b); +PROVIDE(unpend_thread_no_timeout = 0x10029c2b); +PROVIDE(ready_thread = 0x1001bd65); +PROVIDE(unready_thread = 0x1001bde9); +PROVIDE(z_swap_irqlock = 0x1001be3d); +PROVIDE(add_to_waitq_locked = 0x10029c3f); +PROVIDE(z_tick_sleep = 0x1001c321); +PROVIDE(wait_for = 0x10029e2b); +PROVIDE(z_sched_wake_all.constprop.0 = 0x10029e9d); +PROVIDE(slice_timeout = 0x1001c6c5); +PROVIDE(first = 0x1001c8c1); +PROVIDE(elapsed = 0x1001c8d1); +PROVIDE(next_timeout = 0x1002a0dd); +PROVIDE(remove_timeout = 0x1001c8e5); +PROVIDE(timeout_rem = 0x1001c91d); +PROVIDE(clear_event_registrations = 0x1001cccd); +PROVIDE(add_event = 0x1002a28f); +PROVIDE(register_events = 0x1002a2e3); +PROVIDE(signal_poll_event = 0x1002a3e7); +PROVIDE(z_heap_aligned_alloc = 0x1002a4e3); +PROVIDE(__ultoa_invert = 0x1002a7bd); +PROVIDE(skip_to_arg = 0x1001d675); +PROVIDE(mulShift64 = 0x1002a80b); +PROVIDE(mulShiftAll64 = 0x1002a86b); +PROVIDE(div10 = 0x1001e30d); +PROVIDE(chunk_field = 0x1001f42f); +PROVIDE(chunk_set = 0x1001f445); +PROVIDE(chunk_size = 0x1001f45b); +PROVIDE(set_chunk_used = 0x1001f467); +PROVIDE(set_chunk_size = 0x1001f497); +PROVIDE(mem_to_chunkid = 0x1001f49f); +PROVIDE(bucket_idx.isra.0 = 0x1001f4b3); +PROVIDE(free_list_remove_bidx = 0x1001f4cf); +PROVIDE(free_list_remove = 0x1001f52b); +PROVIDE(alloc_chunk = 0x1001f559); +PROVIDE(split_chunks = 0x1001f5cd); +PROVIDE(merge_chunks = 0x1001f61b); +PROVIDE(free_list_add = 0x1001f657); +PROVIDE(free_chunk = 0x1001f6db); +PROVIDE(setup_bundle_data.constprop.0 = 0x1001fcdb); +PROVIDE(set_region = 0x1001fd15); +PROVIDE(match_region = 0x1001fda5); +PROVIDE(ring_buf_put_claim = 0x1001ff71); +PROVIDE(ring_buf_get_claim = 0x1001ff8f); +PROVIDE(panic = 0x10021375); +PROVIDE(process_log_msg.constprop.0 = 0x10021377); +PROVIDE(process = 0x10021403); +PROVIDE(dropped = 0x10021443); +PROVIDE(remove_from_tail.part.0 = 0x100216f1); +PROVIDE(foldcase = 0x10021b01); +PROVIDE(fnmatchx = 0x10021b11); +PROVIDE(processing_data = 0x10022c81); +PROVIDE(net_init = 0x10022ceb); +PROVIDE(net_ipv4_is_addr_mcast = 0x10024e55); +PROVIDE(net_ipv4_is_addr_bcast = 0x10024e65); +PROVIDE(net_ipv4_is_my_addr = 0x10024e87); +PROVIDE(mcux_lpc_syscon_clock_control_off = 0x10026501); +PROVIDE(mcux_lpc_syscon_clock_control_get_subsys_rate = 0x10026505); +PROVIDE(mcux_lpc_syscon_clock_control_on = 0x100265b5); PROVIDE(mcux_lpc_syscon_clock_control_set_subsys_rate = 0x30000051); -PROVIDE(flash_get_page_info = 0x10026b9b); -PROVIDE(gpio_mcux_port_configure = 0x10026df3); -PROVIDE(gpio_mcux_port_get_raw = 0x10026e93); -PROVIDE(gpio_mcux_port_set_masked_raw = 0x10026e9f); -PROVIDE(gpio_mcux_port_set_bits_raw = 0x10026eb1); -PROVIDE(gpio_mcux_port_clear_bits_raw = 0x10026ebb); -PROVIDE(gpio_mcux_port_toggle_bits = 0x10026ec5); -PROVIDE(gpio_mcux_manage_callback = 0x10026ecf); -PROVIDE(gpio_mcux_port0_init = 0x10026f21); -PROVIDE(gpio_mcux_port1_init = 0x10026f37); -PROVIDE(gpio_mcux_port2_init = 0x10026f4d); -PROVIDE(gpio_mcux_port3_init = 0x10026f63); -PROVIDE(gpio_mcux_pin_interrupt_configure = 0x10026f79); -PROVIDE(gpio_mcux_port_isr = 0x10026ff3); -PROVIDE(nxp_lp_flexcomm_init = 0x1002733f); -PROVIDE(nxp_lp_flexcomm_config_func_0 = 0x100273b9); -PROVIDE(nxp_lp_flexcomm_config_func_1 = 0x100273cf); -PROVIDE(nxp_lp_flexcomm_config_func_2 = 0x100273e5); -PROVIDE(nxp_lp_flexcomm_config_func_3 = 0x100273fb); +PROVIDE(flash_get_page_info = 0x10026dc3); +PROVIDE(gpio_mcux_port_configure = 0x1002701b); +PROVIDE(gpio_mcux_port_get_raw = 0x100270bb); +PROVIDE(gpio_mcux_port_set_masked_raw = 0x100270c7); +PROVIDE(gpio_mcux_port_set_bits_raw = 0x100270d9); +PROVIDE(gpio_mcux_port_clear_bits_raw = 0x100270e3); +PROVIDE(gpio_mcux_port_toggle_bits = 0x100270ed); +PROVIDE(gpio_mcux_manage_callback = 0x100270f7); +PROVIDE(gpio_mcux_port0_init = 0x10027149); +PROVIDE(gpio_mcux_port1_init = 0x1002715f); +PROVIDE(gpio_mcux_port2_init = 0x10027175); +PROVIDE(gpio_mcux_port3_init = 0x1002718b); +PROVIDE(gpio_mcux_pin_interrupt_configure = 0x100271a1); +PROVIDE(gpio_mcux_port_isr = 0x1002721b); +PROVIDE(nxp_lp_flexcomm_init = 0x10027567); +PROVIDE(nxp_lp_flexcomm_config_func_0 = 0x100275e1); +PROVIDE(nxp_lp_flexcomm_config_func_1 = 0x100275f7); +PROVIDE(nxp_lp_flexcomm_config_func_2 = 0x1002760d); +PROVIDE(nxp_lp_flexcomm_config_func_3 = 0x10027623); PROVIDE(__flexspi_clock_set_freq_veneer = 0x30000069); -PROVIDE(dns_resolve_init_with_svc = 0x10026235); -PROVIDE(net_conn_init = 0x10010f75); -PROVIDE(net_ipv4_unspecified_address = 0x1000fc01); -PROVIDE(main = 0x1001f1cf); -PROVIDE(EDMA_AbortTransfer = 0x10027fc7); +PROVIDE(dns_resolve_init_with_svc = 0x1002645d); +PROVIDE(net_conn_init = 0x1001119d); +PROVIDE(net_ipv4_unspecified_address = 0x1000fe29); +PROVIDE(main = 0x1001f3f7); +PROVIDE(EDMA_AbortTransfer = 0x100281ef); PROVIDE(__aeabi_ul2d = 0x10000611); -PROVIDE(z_impl_net_if_ipv4_addr_add_by_index = 0x100230e3); -PROVIDE(LP_FLEXCOMM_SetIRQHandler = 0x10019541); -PROVIDE(zsock_bind_ctx = 0x1000c9e9); -PROVIDE(CLOCK_GetCoreSysClkFreq = 0x10027abf); -PROVIDE(spi_mcux_configure = 0x10017c79); -PROVIDE(z_timeout_remaining = 0x10029f29); +PROVIDE(z_impl_net_if_ipv4_addr_add_by_index = 0x1002330b); +PROVIDE(LP_FLEXCOMM_SetIRQHandler = 0x10019769); +PROVIDE(zsock_bind_ctx = 0x1000cbe9); +PROVIDE(CLOCK_GetCoreSysClkFreq = 0x10027ce7); +PROVIDE(spi_mcux_configure = 0x10017ea1); +PROVIDE(z_timeout_remaining = 0x1002a151); PROVIDE(__floatdidf = 0x10000621); -PROVIDE(memcmp = 0x1002a459); -PROVIDE(EDMA_ClearChannelStatusFlags = 0x10027d89); -PROVIDE(z_shell_fprintf_fmt = 0x10007251); -PROVIDE(net_tcp_conn_sem_get = 0x10025ad5); -PROVIDE(FLASH_Program = 0x1001a3f1); -PROVIDE(listen = 0x10021b75); -PROVIDE(net_eth_carrier_off = 0x100226cf); -PROVIDE(z_shell_op_cursor_vert_move = 0x10007365); -PROVIDE(net_buf_alloc_len = 0x10009421); -PROVIDE(zvfs_free_fd = 0x1001f9a1); -PROVIDE(z_check_stack_sentinel = 0x1001b9b5); +PROVIDE(memcmp = 0x1002a681); +PROVIDE(EDMA_ClearChannelStatusFlags = 0x10027fb1); +PROVIDE(z_shell_fprintf_fmt = 0x10007451); +PROVIDE(net_tcp_conn_sem_get = 0x10025cfd); +PROVIDE(FLASH_Program = 0x1001a619); +PROVIDE(listen = 0x10021d9d); +PROVIDE(net_eth_carrier_off = 0x100228f7); +PROVIDE(z_shell_op_cursor_vert_move = 0x10007565); +PROVIDE(net_buf_alloc_len = 0x10009621); +PROVIDE(zvfs_free_fd = 0x1001fbc9); +PROVIDE(z_check_stack_sentinel = 0x1001bbdd); PROVIDE(__aeabi_cdcmple = 0x10000b3d); -PROVIDE(net_pkt_get_data = 0x10024859); -PROVIDE(crc16_reflect = 0x1001f1db); -PROVIDE(z_shell_history_init = 0x10021651); -PROVIDE(tanl = 0x1001e91d); -PROVIDE(z_impl_k_timer_status_sync = 0x1001ca51); -PROVIDE(llext_call_fn = 0x10021e3b); -PROVIDE(LPUART_Init = 0x10019ba5); -PROVIDE(abort = 0x10008ddd); -PROVIDE(net_pkt_get_reserve_rx_data = 0x100105f5); -PROVIDE(fs_seek = 0x1000a3c1); -PROVIDE(dns_resolve_cancel = 0x1002627d); -PROVIDE(EDMA_InstallTCD = 0x10027b35); +PROVIDE(net_pkt_get_data = 0x10024a81); +PROVIDE(crc16_reflect = 0x1001f403); +PROVIDE(z_shell_history_init = 0x10021879); +PROVIDE(tanl = 0x1001eb45); +PROVIDE(z_impl_k_timer_status_sync = 0x1001cc79); +PROVIDE(llext_call_fn = 0x10022063); +PROVIDE(LPUART_Init = 0x10019dcd); +PROVIDE(abort = 0x10008fdd); +PROVIDE(net_pkt_get_reserve_rx_data = 0x1001081d); +PROVIDE(fs_seek = 0x1000a5c1); +PROVIDE(dns_resolve_cancel = 0x100264a5); +PROVIDE(EDMA_InstallTCD = 0x10027d5d); PROVIDE(LPSPI_MasterSetDelayTimes = 0x100018e9); -PROVIDE(CLOCK_SetClkDiv = 0x100279cb); -PROVIDE(dns_msg_pack_qname = 0x10025dc9); -PROVIDE(EDMA_StartTransfer = 0x10027f81); -PROVIDE(is_ptr = 0x1001f907); -PROVIDE(net_tx_priority2tc = 0x100248bb); -PROVIDE(arch_irq_unlock_outlined = 0x1002189b); -PROVIDE(__wrap_realloc = 0x10008e71); -PROVIDE(connect = 0x10021b71); -PROVIDE(fs_read = 0x1000a331); -PROVIDE(z_row_span_with_buffer_offsets_get = 0x1002098b); -PROVIDE(__pow5Factor = 0x1001e5f9); -PROVIDE(char2hex = 0x1001fa13); -PROVIDE(EDMA_TcdSetTransferConfig = 0x10027cc1); -PROVIDE(usb_update_sn_string_descriptor = 0x10004995); -PROVIDE(shell_thread = 0x10006f61); -PROVIDE(sys_clock_announce = 0x1001c811); -PROVIDE(arch_system_halt = 0x1002911b); -PROVIDE(ethernet_init = 0x1000e509); -PROVIDE(pinctrl_lookup_state = 0x10027423); -PROVIDE(log_filter_get = 0x100038e5); +PROVIDE(CLOCK_SetClkDiv = 0x10027bf3); +PROVIDE(dns_msg_pack_qname = 0x10025ff1); +PROVIDE(EDMA_StartTransfer = 0x100281a9); +PROVIDE(is_ptr = 0x1001fb2f); +PROVIDE(net_tx_priority2tc = 0x10024ae3); +PROVIDE(arch_irq_unlock_outlined = 0x10021ac3); +PROVIDE(__wrap_realloc = 0x10009071); +PROVIDE(connect = 0x10021d99); +PROVIDE(fs_read = 0x1000a531); +PROVIDE(z_row_span_with_buffer_offsets_get = 0x10020bb3); +PROVIDE(__pow5Factor = 0x1001e821); +PROVIDE(char2hex = 0x1001fc3b); +PROVIDE(EDMA_TcdSetTransferConfig = 0x10027ee9); +PROVIDE(usb_update_sn_string_descriptor = 0x10004b95); +PROVIDE(shell_thread = 0x10007161); +PROVIDE(sys_clock_announce = 0x1001ca39); +PROVIDE(arch_system_halt = 0x10029343); +PROVIDE(ethernet_init = 0x1000e709); +PROVIDE(pinctrl_lookup_state = 0x1002764b); +PROVIDE(log_filter_get = 0x10003ae5); PROVIDE(__aeabi_fcmplt = 0x10001265); -PROVIDE(z_impl_k_queue_init = 0x100295e9); -PROVIDE(net_context_unref = 0x10023789); -PROVIDE(net_buf_unref = 0x10009521); +PROVIDE(z_impl_k_queue_init = 0x10029811); +PROVIDE(net_context_unref = 0x100239b1); +PROVIDE(net_buf_unref = 0x10009721); PROVIDE(__aeabi_fadd = 0x10000d19); -PROVIDE(_exit = 0x10008da5); -PROVIDE(dns_dispatcher_unregister = 0x10013e25); -PROVIDE(net_process_rx_packet = 0x10022c43); +PROVIDE(_exit = 0x10008fa5); +PROVIDE(dns_dispatcher_unregister = 0x1001404d); +PROVIDE(net_process_rx_packet = 0x10022e6b); PROVIDE(__aeabi_ui2f = 0x10000e79); PROVIDE(__aeabi_ui2d = 0x10000589); -PROVIDE(log_msg_get_source_id = 0x10003af1); -PROVIDE(z_impl_k_pipe_init = 0x10029c8f); -PROVIDE(z_log_msg_alloc = 0x1001fed9); -PROVIDE(net_conn_update = 0x10010cf5); -PROVIDE(_sin = 0x1001e891); +PROVIDE(log_msg_get_source_id = 0x10003cf1); +PROVIDE(z_impl_k_pipe_init = 0x10029eb7); +PROVIDE(z_log_msg_alloc = 0x10020101); +PROVIDE(net_conn_update = 0x10010f1d); +PROVIDE(_sin = 0x1001eab9); PROVIDE(__aeabi_dsub = 0x1000030d); PROVIDE(__ltsf2 = 0x100011d1); PROVIDE(vfscanf = 0x00000001); -PROVIDE(srandom = 0x1001cc89); -PROVIDE(net_tcp_finalize = 0x100115e5); -PROVIDE(z_shell_vfprintf = 0x10021007); -PROVIDE(net_udp_register = 0x10025b15); -PROVIDE(USB_DeviceEhciControl = 0x10028a6d); -PROVIDE(k_thread_name_get = 0x100299a1); -PROVIDE(z_impl_zsock_close = 0x1002225d); -PROVIDE(__printk_hook_install = 0x1000311d); -PROVIDE(net_hostname_get = 0x1000bccd); -PROVIDE(net_icmpv4_init = 0x10010fb5); -PROVIDE(net_ipv4_input = 0x10024ddb); -PROVIDE(EDMA_SubmitTransfer = 0x10027e39); -PROVIDE(printk = 0x1001f959); -PROVIDE(z_arm_exc_spurious = 0x10008b05); -PROVIDE(CLOCK_GetMainClkFreq = 0x10018c95); -PROVIDE(net_pkt_get_contiguous_len = 0x100247d1); -PROVIDE(tan = 0x1001e91d); -PROVIDE(CLOCK_EnableUsbhsClock = 0x10018f01); -PROVIDE(net_if_ipv4_is_addr_bcast = 0x1000ee61); -PROVIDE(z_impl_k_queue_alloc_prepend = 0x100296ab); +PROVIDE(srandom = 0x1001ceb1); +PROVIDE(net_tcp_finalize = 0x1001180d); +PROVIDE(z_shell_vfprintf = 0x1002122f); +PROVIDE(net_udp_register = 0x10025d3d); +PROVIDE(USB_DeviceEhciControl = 0x10028c95); +PROVIDE(k_thread_name_get = 0x10029bc9); +PROVIDE(z_impl_zsock_close = 0x10022485); +PROVIDE(__printk_hook_install = 0x1000331d); +PROVIDE(net_hostname_get = 0x1000becd); +PROVIDE(net_icmpv4_init = 0x100111dd); +PROVIDE(net_ipv4_input = 0x10025003); +PROVIDE(EDMA_SubmitTransfer = 0x10028061); +PROVIDE(printk = 0x1001fb81); +PROVIDE(z_arm_exc_spurious = 0x10008d05); +PROVIDE(CLOCK_GetMainClkFreq = 0x10018ebd); +PROVIDE(net_pkt_get_contiguous_len = 0x100249f9); +PROVIDE(tan = 0x1001eb45); +PROVIDE(CLOCK_EnableUsbhsClock = 0x10019129); +PROVIDE(net_if_ipv4_is_addr_bcast = 0x1000f089); +PROVIDE(z_impl_k_queue_alloc_prepend = 0x100298d3); PROVIDE(__eqsf2 = 0x100011d9); -PROVIDE(net_if_ipv4_addr_rm = 0x100231cd); -PROVIDE(z_impl_k_mutex_init = 0x100294c9); -PROVIDE(USB_EhciPhyGetBase = 0x1001a411); -PROVIDE(LP_FLEXCOMM_GetInstance = 0x1001947d); -PROVIDE(EDMA_ConfigChannelSoftwareTCDExt = 0x100190bd); -PROVIDE(z_impl_zsock_getsockopt = 0x1000c399); -PROVIDE(z_shell_print_stream = 0x10021003); -PROVIDE(z_shell_op_delete_from_cursor = 0x10020f2f); -PROVIDE(z_arm_cpu_idle_init = 0x10008d25); +PROVIDE(net_if_ipv4_addr_rm = 0x100233f5); +PROVIDE(z_impl_k_mutex_init = 0x100296f1); +PROVIDE(USB_EhciPhyGetBase = 0x1001a639); +PROVIDE(LP_FLEXCOMM_GetInstance = 0x100196a5); +PROVIDE(EDMA_ConfigChannelSoftwareTCDExt = 0x100192e5); +PROVIDE(z_impl_zsock_getsockopt = 0x1000c599); +PROVIDE(z_shell_print_stream = 0x1002122b); +PROVIDE(z_shell_op_delete_from_cursor = 0x10021157); +PROVIDE(z_arm_cpu_idle_init = 0x10008f25); PROVIDE(__floatundidf = 0x10000611); -PROVIDE(z_impl_k_msgq_purge = 0x10029433); -PROVIDE(net_pkt_set_data = 0x10024895); -PROVIDE(net_context_get_option = 0x100104a5); -PROVIDE(LPI2C_MasterGetDefaultConfig = 0x100195e9); -PROVIDE(LP_FLEXCOMM_Init = 0x100194a1); -PROVIDE(sys_clock_elapsed = 0x10018521); -PROVIDE(z_impl_k_poll_signal_init = 0x1002a2a1); -PROVIDE(net_socket_service_callback = 0x100224fd); -PROVIDE(net_pkt_read = 0x1002456b); -PROVIDE(__file_str_put = 0x1002a957); -PROVIDE(z_do_kernel_oops = 0x10021833); -PROVIDE(net_context_get_local_addr = 0x10023f03); +PROVIDE(z_impl_k_msgq_purge = 0x1002965b); +PROVIDE(net_pkt_set_data = 0x10024abd); +PROVIDE(net_context_get_option = 0x100106cd); +PROVIDE(LPI2C_MasterGetDefaultConfig = 0x10019811); +PROVIDE(LP_FLEXCOMM_Init = 0x100196c9); +PROVIDE(sys_clock_elapsed = 0x10018749); +PROVIDE(z_impl_k_poll_signal_init = 0x1002a4c9); +PROVIDE(net_socket_service_callback = 0x10022725); +PROVIDE(net_pkt_read = 0x10024793); +PROVIDE(__file_str_put = 0x1002ab7f); +PROVIDE(z_do_kernel_oops = 0x10021a5b); +PROVIDE(net_context_get_local_addr = 0x1002412b); PROVIDE(__floatsisf = 0x10000e81); -PROVIDE(z_impl_k_thread_name_set = 0x1001b911); -PROVIDE(z_impl_zsock_connect = 0x1000c06d); -PROVIDE(pinctrl_configure_pins = 0x10017c09); -PROVIDE(z_impl_log_filter_set = 0x1001fee1); -PROVIDE(ring_buf_area_claim = 0x1001fd19); -PROVIDE(z_thread_monitor_exit = 0x1001c5a9); -PROVIDE(srand = 0x1002a455); -PROVIDE(EDMA_CreateHandle = 0x1001937d); -PROVIDE(z_impl_k_queue_get = 0x1001b259); -PROVIDE(net_context_init = 0x100105e5); -PROVIDE(shell_help = 0x100208c1); -PROVIDE(z_data_copy = 0x1001c661); -PROVIDE(SMARTDMA_Reset = 0x1001a1f9); -PROVIDE(net_buf_frag_add = 0x10021bfd); -PROVIDE(net_arp_update = 0x1000e861); -PROVIDE(net_udp_input = 0x1001306d); -PROVIDE(z_impl_k_msgq_put = 0x1001af41); -PROVIDE(net_if_need_calc_rx_checksum = 0x10023319); -PROVIDE(shell_backend_uart_get_ptr = 0x1000642d); -PROVIDE(net_if_ipv4_addr_get_first_by_index = 0x10022fc9); -PROVIDE(LPI2C_CheckForBusyBus = 0x10028127); -PROVIDE(snprintf = 0x1001ce79); -PROVIDE(z_impl_k_thread_priority_get = 0x1002999b); -PROVIDE(dns_resolve_get_default = 0x10014a81); +PROVIDE(z_impl_k_thread_name_set = 0x1001bb39); +PROVIDE(z_impl_zsock_connect = 0x1000c26d); +PROVIDE(pinctrl_configure_pins = 0x10017e31); +PROVIDE(z_impl_log_filter_set = 0x10020109); +PROVIDE(ring_buf_area_claim = 0x1001ff41); +PROVIDE(z_thread_monitor_exit = 0x1001c7d1); +PROVIDE(srand = 0x1002a67d); +PROVIDE(EDMA_CreateHandle = 0x100195a5); +PROVIDE(z_impl_k_queue_get = 0x1001b481); +PROVIDE(net_context_init = 0x1001080d); +PROVIDE(shell_help = 0x10020ae9); +PROVIDE(z_data_copy = 0x1001c889); +PROVIDE(SMARTDMA_Reset = 0x1001a421); +PROVIDE(net_buf_frag_add = 0x10021e25); +PROVIDE(net_arp_update = 0x1000ea61); +PROVIDE(net_udp_input = 0x10013295); +PROVIDE(z_impl_k_msgq_put = 0x1001b169); +PROVIDE(net_if_need_calc_rx_checksum = 0x10023541); +PROVIDE(shell_backend_uart_get_ptr = 0x1000662d); +PROVIDE(net_if_ipv4_addr_get_first_by_index = 0x100231f1); +PROVIDE(LPI2C_CheckForBusyBus = 0x1002834f); +PROVIDE(snprintf = 0x1001d0a1); +PROVIDE(z_impl_k_thread_priority_get = 0x10029bc3); +PROVIDE(dns_resolve_get_default = 0x10014ca9); PROVIDE(__gtdf2 = 0x10000aa1); -PROVIDE(cosl = 0x1001e805); -PROVIDE(k_queue_prepend = 0x10029683); -PROVIDE(zsock_sendmsg_ctx = 0x1000cc41); -PROVIDE(net_calc_chksum_ipv4 = 0x1002360d); -PROVIDE(net_dhcpv4_start = 0x10025d7d); -PROVIDE(isprint = 0x1002a3db); -PROVIDE(dns_unpack_response_query = 0x10025f7b); -PROVIDE(z_work_submit_to_queue = 0x100298d9); -PROVIDE(llext_adjust_mmu_permissions = 0x10021eb7); -PROVIDE(SPC_SetActiveModeDCDCRegulatorDriveStrength = 0x1002885f); +PROVIDE(cosl = 0x1001ea2d); +PROVIDE(k_queue_prepend = 0x100298ab); +PROVIDE(zsock_sendmsg_ctx = 0x1000ce41); +PROVIDE(net_calc_chksum_ipv4 = 0x10023835); +PROVIDE(net_dhcpv4_start = 0x10025fa5); +PROVIDE(isprint = 0x1002a603); +PROVIDE(dns_unpack_response_query = 0x100261a3); +PROVIDE(z_work_submit_to_queue = 0x10029b01); +PROVIDE(llext_adjust_mmu_permissions = 0x100220df); +PROVIDE(SPC_SetActiveModeDCDCRegulatorDriveStrength = 0x10028a87); PROVIDE(CONFIG_SYS_HASH_FUNC32_CHOICE_MURMUR3 = 0x00000001); -PROVIDE(net_pkt_cursor_init = 0x100244a1); -PROVIDE(z_init_static = 0x10029179); -PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x10027035); -PROVIDE(net_mgmt_event_init = 0x1000fea9); +PROVIDE(net_pkt_cursor_init = 0x100246c9); +PROVIDE(z_init_static = 0x100293a1); +PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x1002725d); +PROVIDE(net_mgmt_event_init = 0x100100d1); PROVIDE(__aeabi_fcmple = 0x10001279); -PROVIDE(z_impl_k_thread_abort = 0x10008b61); -PROVIDE(usb_dc_ep_set_callback = 0x10015729); -PROVIDE(net_icmpv4_finalize = 0x10024a79); -PROVIDE(shell_fprintf_impl = 0x100207f1); -PROVIDE(llext_by_name = 0x1000a6e5); +PROVIDE(z_impl_k_thread_abort = 0x10008d61); +PROVIDE(usb_dc_ep_set_callback = 0x10015951); +PROVIDE(net_icmpv4_finalize = 0x10024ca1); +PROVIDE(shell_fprintf_impl = 0x10020a19); +PROVIDE(llext_by_name = 0x1000a8e5); PROVIDE(__ltdf2 = 0x10000aa9); -PROVIDE(__d_vfprintf = 0x1001d581); -PROVIDE(net_conn_register = 0x10010a59); -PROVIDE(shell_process = 0x10006885); +PROVIDE(__d_vfprintf = 0x1001d7a9); +PROVIDE(net_conn_register = 0x10010c81); +PROVIDE(shell_process = 0x10006a85); PROVIDE(CONFIG_LOG_FUNC_NAME_PREFIX_DBG = 0x00000001); -PROVIDE(z_reset_time_slice = 0x1001c4f9); -PROVIDE(z_impl_k_thread_priority_set = 0x1001bff1); -PROVIDE(cos = 0x1001e805); +PROVIDE(z_reset_time_slice = 0x1001c721); +PROVIDE(z_impl_k_thread_priority_set = 0x1001c219); +PROVIDE(cos = 0x1001ea2d); PROVIDE(strcmp = 0x1000146d); -PROVIDE(z_setup_new_thread = 0x1001b9e9); +PROVIDE(z_setup_new_thread = 0x1001bc11); PROVIDE(__lesf2 = 0x100011d1); -PROVIDE(z_shell_op_cursor_horiz_move = 0x10007391); -PROVIDE(z_impl_k_thread_create = 0x1001bac5); -PROVIDE(__umul128 = 0x1002a7b7); -PROVIDE(z_impl_zsock_bind = 0x1000c015); -PROVIDE(arch_cpu_idle = 0x100218a9); -PROVIDE(z_impl_log_frontend_filter_set = 0x1001fef1); -PROVIDE(z_impl_k_sleep = 0x10029b4b); -PROVIDE(sys_heap_init = 0x1001f7f5); -PROVIDE(net_buf_alloc_fixed = 0x10021bcb); -PROVIDE(memc_flexspi_set_device_config = 0x100179a1); -PROVIDE(usb_dc_ep_mps = 0x10015791); -PROVIDE(z_shell_fprintf = 0x10021053); -PROVIDE(zsock_recvfrom_ctx = 0x1000d23d); -PROVIDE(net_if_up = 0x1000f459); -PROVIDE(net_if_config_ipv4_get = 0x1000edf9); -PROVIDE(z_impl_zsock_inet_pton = 0x10022261); -PROVIDE(CLOCK_EnableUsbhsPhyPllClock = 0x10018e49); -PROVIDE(net_tcp_endpoint_copy = 0x100253f5); -PROVIDE(z_impl_k_queue_peek_head = 0x100296dd); -PROVIDE(net_conn_unregister = 0x10010c7d); -PROVIDE(memset = 0x1002a36b); -PROVIDE(RESET_ClearPeripheralReset = 0x10027afb); +PROVIDE(z_shell_op_cursor_horiz_move = 0x10007591); +PROVIDE(z_impl_k_thread_create = 0x1001bced); +PROVIDE(__umul128 = 0x1002a9df); +PROVIDE(z_impl_zsock_bind = 0x1000c215); +PROVIDE(arch_cpu_idle = 0x10021ad1); +PROVIDE(z_impl_log_frontend_filter_set = 0x10020119); +PROVIDE(z_impl_k_sleep = 0x10029d73); +PROVIDE(sys_heap_init = 0x1001fa1d); +PROVIDE(net_buf_alloc_fixed = 0x10021df3); +PROVIDE(memc_flexspi_set_device_config = 0x10017bc9); +PROVIDE(usb_dc_ep_mps = 0x100159b9); +PROVIDE(z_shell_fprintf = 0x1002127b); +PROVIDE(zsock_recvfrom_ctx = 0x1000d43d); +PROVIDE(net_if_up = 0x1000f681); +PROVIDE(net_if_config_ipv4_get = 0x1000f021); +PROVIDE(z_impl_zsock_inet_pton = 0x10022489); +PROVIDE(CLOCK_EnableUsbhsPhyPllClock = 0x10019071); +PROVIDE(net_tcp_endpoint_copy = 0x1002561d); +PROVIDE(z_impl_k_queue_peek_head = 0x10029905); +PROVIDE(net_conn_unregister = 0x10010ea5); +PROVIDE(memset = 0x1002a593); +PROVIDE(RESET_ClearPeripheralReset = 0x10027d23); PROVIDE(__gedf2 = 0x10000aa1); -PROVIDE(net_context_get = 0x10010079); +PROVIDE(net_context_get = 0x100102a1); PROVIDE(__floatdisf = 0x10000ead); -PROVIDE(k_thread_foreach = 0x1001c5e5); -PROVIDE(EDMA_GetDefaultConfig = 0x10027b89); -PROVIDE(net_mgmt_event_wait_on_iface = 0x100236e1); -PROVIDE(usb_dc_detach = 0x10014e35); -PROVIDE(__do_global_ctors_aux = 0x1001ae31); -PROVIDE(net_arp_prepare = 0x1000e635); -PROVIDE(USB_DeviceEhciInit = 0x1001a75d); -PROVIDE(z_time_slice = 0x1001c549); +PROVIDE(k_thread_foreach = 0x1001c80d); +PROVIDE(EDMA_GetDefaultConfig = 0x10027db1); +PROVIDE(net_mgmt_event_wait_on_iface = 0x10023909); +PROVIDE(usb_dc_detach = 0x1001505d); +PROVIDE(__do_global_ctors_aux = 0x1001b059); +PROVIDE(net_arp_prepare = 0x1000e835); +PROVIDE(USB_DeviceEhciInit = 0x1001a985); +PROVIDE(z_time_slice = 0x1001c771); PROVIDE(__aeabi_ddiv = 0x100008d1); -PROVIDE(EDMA_SetCallback = 0x10027df1); -PROVIDE(net_pkt_remaining_data = 0x10024637); -PROVIDE(recvfrom = 0x10021b89); -PROVIDE(z_irq_spurious = 0x10021889); -PROVIDE(z_shell_op_cursor_word_move = 0x10020e6b); -PROVIDE(k_is_in_isr = 0x1002998f); -PROVIDE(net_pkt_ref = 0x10024347); -PROVIDE(__kernel_rem_pio2 = 0x1001e9f5); -PROVIDE(z_arm_int_exit = 0x10008271); -PROVIDE(_ConfigAbsSyms = 0x1001fe7d); -PROVIDE(ring_buf_put = 0x1001fdb7); -PROVIDE(arm_irq_enable = 0x10008c19); +PROVIDE(EDMA_SetCallback = 0x10028019); +PROVIDE(net_pkt_remaining_data = 0x1002485f); +PROVIDE(recvfrom = 0x10021db1); +PROVIDE(z_irq_spurious = 0x10021ab1); +PROVIDE(z_shell_op_cursor_word_move = 0x10021093); +PROVIDE(k_is_in_isr = 0x10029bb7); +PROVIDE(net_pkt_ref = 0x1002456f); +PROVIDE(__kernel_rem_pio2 = 0x1001ec1d); +PROVIDE(z_arm_int_exit = 0x10008471); +PROVIDE(_ConfigAbsSyms = 0x100200a5); +PROVIDE(ring_buf_put = 0x1001ffdf); +PROVIDE(arm_irq_enable = 0x10008e19); PROVIDE(__extendsfdf2 = 0x100005cd); -PROVIDE(z_impl_k_timer_stop = 0x1002a00f); +PROVIDE(z_impl_k_timer_stop = 0x1002a237); PROVIDE(CONFIG_SYS_HASH_FUNC32_MURMUR3 = 0x00000001); -PROVIDE(llext_buf_peek = 0x10021ffb); -PROVIDE(LPUART_Deinit = 0x1002840f); -PROVIDE(__wrap_malloc = 0x10008e3d); -PROVIDE(flash_area_read = 0x1002011f); -PROVIDE(z_impl_k_poll = 0x1001cb05); -PROVIDE(z_impl_zvfs_poll = 0x10021dc9); -PROVIDE(EDMA_PrepareTransferConfig = 0x100193f5); -PROVIDE(SystemInit = 0x10018f25); -PROVIDE(sys_clock_cycle_get_32 = 0x1001855d); +PROVIDE(llext_buf_peek = 0x10022223); +PROVIDE(LPUART_Deinit = 0x10028637); +PROVIDE(__wrap_malloc = 0x1000903d); +PROVIDE(flash_area_read = 0x10020347); +PROVIDE(z_impl_k_poll = 0x1001cd2d); +PROVIDE(z_impl_zvfs_poll = 0x10021ff1); +PROVIDE(EDMA_PrepareTransferConfig = 0x1001961d); +PROVIDE(SystemInit = 0x1001914d); +PROVIDE(sys_clock_cycle_get_32 = 0x10018785); PROVIDE(__fixdfdi = 0x100014a1); -PROVIDE(usb_dc_set_status_callback = 0x10015785); -PROVIDE(shell_init = 0x10007159); -PROVIDE(sys_heap_aligned_realloc = 0x1001f6b1); -PROVIDE(net_if_get_default = 0x1000ed91); +PROVIDE(usb_dc_set_status_callback = 0x100159ad); +PROVIDE(shell_init = 0x10007359); +PROVIDE(sys_heap_aligned_realloc = 0x1001f8d9); +PROVIDE(net_if_get_default = 0x1000efb9); PROVIDE(__gtsf2 = 0x100011c9); -PROVIDE(__wrap_random = 0x1001cc51); -PROVIDE(EDMA_GetChannelStatusFlags = 0x10027d65); -PROVIDE(__math_invalid = 0x1001e9b9); -PROVIDE(memmove = 0x1002a337); +PROVIDE(__wrap_random = 0x1001ce79); +PROVIDE(EDMA_GetChannelStatusFlags = 0x10027f8d); +PROVIDE(__math_invalid = 0x1001ebe1); +PROVIDE(memmove = 0x1002a55f); PROVIDE(__nesf2 = 0x100011d9); -PROVIDE(iscntrl = 0x1002a3a5); -PROVIDE(islower = 0x1002a3cf); -PROVIDE(strcat = 0x1002a4a9); -PROVIDE(net_pkt_copy = 0x10024595); -PROVIDE(rand = 0x1002a451); -PROVIDE(llext_file_offset = 0x10021f45); -PROVIDE(EDMA_HandleIRQ = 0x10027fe7); -PROVIDE(net_if_carrier_off = 0x10023369); -PROVIDE(strncmp = 0x1002a4e1); -PROVIDE(z_impl_zsock_socket = 0x1000bf5d); -PROVIDE(net_pkt_remove_tail = 0x1002446b); -PROVIDE(recv = 0x10021b79); -PROVIDE(net_buf_linearize = 0x10021c1f); -PROVIDE(ldexpl = 0x1001f059); -PROVIDE(LPI2C_MasterCheckAndClearError = 0x100280e1); -PROVIDE(isxdigit = 0x1002a407); -PROVIDE(CLOCK_SetupExtClocking = 0x100186fd); +PROVIDE(iscntrl = 0x1002a5cd); +PROVIDE(islower = 0x1002a5f7); +PROVIDE(strcat = 0x1002a6d1); +PROVIDE(net_pkt_copy = 0x100247bd); +PROVIDE(rand = 0x1002a679); +PROVIDE(llext_file_offset = 0x1002216d); +PROVIDE(EDMA_HandleIRQ = 0x1002820f); +PROVIDE(net_if_carrier_off = 0x10023591); +PROVIDE(strncmp = 0x1002a709); +PROVIDE(z_impl_zsock_socket = 0x1000c15d); +PROVIDE(net_pkt_remove_tail = 0x10024693); +PROVIDE(recv = 0x10021da1); +PROVIDE(net_buf_linearize = 0x10021e47); +PROVIDE(ldexpl = 0x1001f281); +PROVIDE(LPI2C_MasterCheckAndClearError = 0x10028309); +PROVIDE(isxdigit = 0x1002a62f); +PROVIDE(CLOCK_SetupExtClocking = 0x10018925); PROVIDE(__aeabi_cdcmpeq = 0x10000b3d); -PROVIDE(__aeabi_memcpy4 = 0x1002a31d); -PROVIDE(net_hostname_init = 0x1000bcd5); -PROVIDE(assert_post_action = 0x1001f9a5); -PROVIDE(z_arm_usage_fault = 0x10008b05); -PROVIDE(net_tcp_set_option = 0x10025a29); +PROVIDE(__aeabi_memcpy4 = 0x1002a545); +PROVIDE(net_hostname_init = 0x1000bed5); +PROVIDE(assert_post_action = 0x1001fbcd); +PROVIDE(z_arm_usage_fault = 0x10008d05); +PROVIDE(net_tcp_set_option = 0x10025c51); PROVIDE(strcpy = 0x10001481); -PROVIDE(net_buf_frag_insert = 0x10021be7); -PROVIDE(CLOCK_SetupClk16KClocking = 0x100187e9); -PROVIDE(z_shell_help_subcmd_print = 0x10007761); -PROVIDE(SPC_SetActiveModeDCDCRegulatorConfig = 0x1002888b); -PROVIDE(usb_transfer_ep_callback = 0x10004e49); -PROVIDE(usb_dc_ep_enable = 0x100152a9); -PROVIDE(net_context_recv = 0x10010245); -PROVIDE(scalbnl = 0x1001f059); -PROVIDE(net_if_ipv4_select_src_iface = 0x10023001); -PROVIDE(usb_dc_ep_is_stalled = 0x10015219); -PROVIDE(USB_DeviceEhciCancel = 0x1001a831); -PROVIDE(z_impl_k_stack_alloc_init = 0x10029721); -PROVIDE(__aeabi_memcpy = 0x1002a31d); -PROVIDE(do_llext_load = 0x1000ab29); -PROVIDE(__aeabi_memcpy8 = 0x1002a31d); +PROVIDE(net_buf_frag_insert = 0x10021e0f); +PROVIDE(CLOCK_SetupClk16KClocking = 0x10018a11); +PROVIDE(z_shell_help_subcmd_print = 0x10007961); +PROVIDE(SPC_SetActiveModeDCDCRegulatorConfig = 0x10028ab3); +PROVIDE(usb_transfer_ep_callback = 0x10005049); +PROVIDE(usb_dc_ep_enable = 0x100154d1); +PROVIDE(net_context_recv = 0x1001046d); +PROVIDE(scalbnl = 0x1001f281); +PROVIDE(net_if_ipv4_select_src_iface = 0x10023229); +PROVIDE(usb_dc_ep_is_stalled = 0x10015441); +PROVIDE(USB_DeviceEhciCancel = 0x1001aa59); +PROVIDE(z_impl_k_stack_alloc_init = 0x10029949); +PROVIDE(__aeabi_memcpy = 0x1002a545); +PROVIDE(do_llext_load = 0x1000ad29); +PROVIDE(__aeabi_memcpy8 = 0x1002a545); PROVIDE(__aeabi_fcmpun = 0x100012b5); -PROVIDE(z_impl_k_msgq_get_attrs = 0x100293ad); +PROVIDE(z_impl_k_msgq_get_attrs = 0x100295d5); PROVIDE(__aeabi_fsub = 0x10000d15); -PROVIDE(strrchr = 0x1002a53d); -PROVIDE(z_thread_aligned_alloc = 0x1001cc21); -PROVIDE(net_pkt_memset = 0x10024555); -PROVIDE(z_impl_k_float_enable = 0x10029313); -PROVIDE(nxp_enet_qos_init = 0x10026901); -PROVIDE(net_context_set_option = 0x10010385); -PROVIDE(LPI2C_MasterTransferHandleIRQ = 0x100197cd); -PROVIDE(clock_gettime = 0x100092a1); -PROVIDE(__atod_engine = 0x1001df29); -PROVIDE(net_pkt_trim_buffer = 0x10024437); -PROVIDE(z_shell_make_argv = 0x100209cd); -PROVIDE(__libc_fini_array = 0x1001e9c9); -PROVIDE(net_if_is_wifi = 0x1000f525); -PROVIDE(FLASH_Init = 0x1001a3d1); -PROVIDE(CLOCK_GetLPFlexCommClkFreq = 0x10018ab1); -PROVIDE(z_shell_history_get = 0x100214f3); -PROVIDE(LPI2C_MasterTransferNonBlocking = 0x1002828b); -PROVIDE(log_source_id_get = 0x100037c1); +PROVIDE(strrchr = 0x1002a765); +PROVIDE(z_thread_aligned_alloc = 0x1001ce49); +PROVIDE(net_pkt_memset = 0x1002477d); +PROVIDE(z_impl_k_float_enable = 0x1002953b); +PROVIDE(nxp_enet_qos_init = 0x10026b29); +PROVIDE(net_context_set_option = 0x100105ad); +PROVIDE(LPI2C_MasterTransferHandleIRQ = 0x100199f5); +PROVIDE(clock_gettime = 0x100094a1); +PROVIDE(__atod_engine = 0x1001e151); +PROVIDE(net_pkt_trim_buffer = 0x1002465f); +PROVIDE(z_shell_make_argv = 0x10020bf5); +PROVIDE(__libc_fini_array = 0x1001ebf1); +PROVIDE(net_if_is_wifi = 0x1000f74d); +PROVIDE(FLASH_Init = 0x1001a5f9); +PROVIDE(CLOCK_GetLPFlexCommClkFreq = 0x10018cd9); +PROVIDE(z_shell_history_get = 0x1002171b); +PROVIDE(LPI2C_MasterTransferNonBlocking = 0x100284b3); +PROVIDE(log_source_id_get = 0x100039c1); PROVIDE(__aeabi_cdrcmple = 0x10000b2d); -PROVIDE(USB_DeviceEhciRecv = 0x100289eb); -PROVIDE(net_tcp_get = 0x100113c9); -PROVIDE(EDMA_SetChannelLink = 0x10027cb1); -PROVIDE(z_init_cpu = 0x1001ac51); -PROVIDE(net_context_put = 0x100101f5); -PROVIDE(dns_resolve_init_default = 0x10014a89); -PROVIDE(LPI2C_MasterSetBaudRate = 0x1002813b); -PROVIDE(z_impl_log_process = 0x1001fed5); -PROVIDE(net_pkt_write = 0x10024823); -PROVIDE(sys_bitarray_free = 0x1001fcad); -PROVIDE(z_SysNmiOnReset = 0x10007e51); -PROVIDE(net_if_ipv4_addr_add = 0x1000efa9); -PROVIDE(net_tcp_reply_rst = 0x10025457); -PROVIDE(z_shell_history_put = 0x10021561); -PROVIDE(strnlen = 0x1002a525); -PROVIDE(net_eth_broadcast_addr = 0x1000e319); -PROVIDE(isgraph = 0x1002a3c3); -PROVIDE(z_impl_log_panic = 0x1000368d); -PROVIDE(net_buf_simple_add = 0x10021c7d); +PROVIDE(USB_DeviceEhciRecv = 0x10028c13); +PROVIDE(net_tcp_get = 0x100115f1); +PROVIDE(EDMA_SetChannelLink = 0x10027ed9); +PROVIDE(z_init_cpu = 0x1001ae79); +PROVIDE(net_context_put = 0x1001041d); +PROVIDE(dns_resolve_init_default = 0x10014cb1); +PROVIDE(LPI2C_MasterSetBaudRate = 0x10028363); +PROVIDE(atan2l = 0x10001d41); +PROVIDE(z_impl_log_process = 0x100200fd); +PROVIDE(net_pkt_write = 0x10024a4b); +PROVIDE(sys_bitarray_free = 0x1001fed5); +PROVIDE(z_SysNmiOnReset = 0x10008051); +PROVIDE(net_if_ipv4_addr_add = 0x1000f1d1); +PROVIDE(net_tcp_reply_rst = 0x1002567f); +PROVIDE(z_shell_history_put = 0x10021789); +PROVIDE(strnlen = 0x1002a74d); +PROVIDE(net_eth_broadcast_addr = 0x1000e519); +PROVIDE(isgraph = 0x1002a5eb); +PROVIDE(z_impl_log_panic = 0x1000388d); +PROVIDE(net_buf_simple_add = 0x10021ea5); PROVIDE(__aeabi_cfcmple = 0x10001241); -PROVIDE(lpspi_wait_tx_fifo_empty = 0x100278b9); -PROVIDE(net_if_ipv4_select_src_addr = 0x1000ee91); -PROVIDE(idle = 0x1002931d); -PROVIDE(net_dhcpv4_init = 0x10013b8d); -PROVIDE(net_context_ref = 0x10023775); -PROVIDE(net_ipv4_create = 0x10024d2b); -PROVIDE(z_shell_history_purge = 0x10021549); -PROVIDE(CACHE64_CleanCacheByRange = 0x1001a335); -PROVIDE(log_backend_disable = 0x1001ff1f); -PROVIDE(assert_print = 0x1001f9b7); -PROVIDE(k_heap_aligned_alloc = 0x1002919b); -PROVIDE(EDMA_TcdSetChannelLinkExt = 0x10027c2f); -PROVIDE(z_column_span_with_buffer_offsets_get = 0x1002096d); -PROVIDE(net_if_recv_data = 0x10023223); -PROVIDE(usb_dc_ep_clear_stall = 0x10015139); -PROVIDE(z_impl_zsock_get_context_object = 0x1002224d); -PROVIDE(llext_unload = 0x1000a881); -PROVIDE(fs_stat = 0x1000a4e1); -PROVIDE(z_impl_k_timer_status_get = 0x1002a047); -PROVIDE(z_shell_log_backend_disable = 0x100212a9); -PROVIDE(strtold = 0x1001cf21); -PROVIDE(net_pkt_get_reserve_tx_data = 0x10010601); -PROVIDE(k_heap_free = 0x10029231); -PROVIDE(z_arm_secure_fault = 0x10008b05); -PROVIDE(LPSPI_MasterSetBaudRate = 0x100199f9); -PROVIDE(z_shell_op_cursor_move = 0x10020e19); -PROVIDE(net_pkt_frag_unref = 0x10024379); -PROVIDE(EDMA_SetChannelPreemptionConfig = 0x10027b9d); -PROVIDE(z_timer_expiration_handler = 0x1001c8fd); -PROVIDE(net_pkt_clone = 0x100247cb); +PROVIDE(lpspi_wait_tx_fifo_empty = 0x10027ae1); +PROVIDE(net_if_ipv4_select_src_addr = 0x1000f0b9); +PROVIDE(idle = 0x10029545); +PROVIDE(net_dhcpv4_init = 0x10013db5); +PROVIDE(net_context_ref = 0x1002399d); +PROVIDE(net_ipv4_create = 0x10024f53); +PROVIDE(z_shell_history_purge = 0x10021771); +PROVIDE(CACHE64_CleanCacheByRange = 0x1001a55d); +PROVIDE(log_backend_disable = 0x10020147); +PROVIDE(assert_print = 0x1001fbdf); +PROVIDE(k_heap_aligned_alloc = 0x100293c3); +PROVIDE(EDMA_TcdSetChannelLinkExt = 0x10027e57); +PROVIDE(z_column_span_with_buffer_offsets_get = 0x10020b95); +PROVIDE(net_if_recv_data = 0x1002344b); +PROVIDE(usb_dc_ep_clear_stall = 0x10015361); +PROVIDE(z_impl_zsock_get_context_object = 0x10022475); +PROVIDE(llext_unload = 0x1000aa81); +PROVIDE(fs_stat = 0x1000a6e1); +PROVIDE(z_impl_k_timer_status_get = 0x1002a26f); +PROVIDE(z_shell_log_backend_disable = 0x100214d1); +PROVIDE(strtold = 0x1001d149); +PROVIDE(net_pkt_get_reserve_tx_data = 0x10010829); +PROVIDE(k_heap_free = 0x10029459); +PROVIDE(z_arm_secure_fault = 0x10008d05); +PROVIDE(LPSPI_MasterSetBaudRate = 0x10019c21); +PROVIDE(z_shell_op_cursor_move = 0x10021041); +PROVIDE(net_pkt_frag_unref = 0x100245a1); +PROVIDE(EDMA_SetChannelPreemptionConfig = 0x10027dc5); +PROVIDE(z_timer_expiration_handler = 0x1001cb25); +PROVIDE(net_pkt_clone = 0x100249f3); PROVIDE(__floatunsidf = 0x10000589); -PROVIDE(net_tc_tx_init = 0x100248bf); -PROVIDE(mpsc_pbuf_init = 0x1001f9d1); +PROVIDE(net_tc_tx_init = 0x10024ae7); +PROVIDE(mpsc_pbuf_init = 0x1001fbf9); PROVIDE(__floatundisf = 0x10000e9d); -PROVIDE(__kernel_sin = 0x10002299); -PROVIDE(usb_dc_ep_check_cap = 0x10014edd); -PROVIDE(z_abort_timeout = 0x10029ee7); -PROVIDE(open = 0x10021b2f); +PROVIDE(__kernel_sin = 0x10002499); +PROVIDE(usb_dc_ep_check_cap = 0x10015105); +PROVIDE(z_abort_timeout = 0x1002a10f); +PROVIDE(open = 0x10021d57); PROVIDE(__aeabi_f2d = 0x100005cd); -PROVIDE(net_context_packet_received = 0x1000fee5); -PROVIDE(net_if_try_queue_tx = 0x10023235); -PROVIDE(z_impl_k_reschedule = 0x1001c01d); -PROVIDE(z_reschedule = 0x1001bec9); -PROVIDE(sys_heap_free = 0x1001f537); -PROVIDE(z_impl_net_if_ipv4_set_netmask_by_index = 0x10023085); -PROVIDE(net_ipv4_broadcast_address = 0x1000fc09); +PROVIDE(net_context_packet_received = 0x1001010d); +PROVIDE(net_if_try_queue_tx = 0x1002345d); +PROVIDE(z_impl_k_reschedule = 0x1001c245); +PROVIDE(z_reschedule = 0x1001c0f1); +PROVIDE(sys_heap_free = 0x1001f75f); +PROVIDE(z_impl_net_if_ipv4_set_netmask_by_index = 0x100232ad); +PROVIDE(net_ipv4_broadcast_address = 0x1000fe31); PROVIDE(__fixunssfsi = 0x100012e1); -PROVIDE(net_arp_clear_pending = 0x1000ea99); -PROVIDE(OSA_EnterCritical = 0x1002907b); -PROVIDE(z_bss_zero = 0x1001ac39); -PROVIDE(__math_oflow = 0x1001f10d); +PROVIDE(net_arp_clear_pending = 0x1000ec99); +PROVIDE(OSA_EnterCritical = 0x100292a3); +PROVIDE(z_bss_zero = 0x1001ae61); +PROVIDE(__math_oflow = 0x1001f335); PROVIDE(__aeabi_uidivmod = 0x100002c5); PROVIDE(__aeabi_d2uiz = 0x10000c2d); -PROVIDE(net_buf_id = 0x100093d9); -PROVIDE(net_recv_data = 0x10022c4f); -PROVIDE(k_work_submit = 0x1001b699); -PROVIDE(z_shell_cursor_in_empty_line = 0x10020d81); -PROVIDE(shell_get_return_value = 0x100208ed); +PROVIDE(net_buf_id = 0x100095d9); +PROVIDE(net_recv_data = 0x10022e77); +PROVIDE(k_work_submit = 0x1001b8c1); +PROVIDE(z_shell_cursor_in_empty_line = 0x10020fa9); +PROVIDE(shell_get_return_value = 0x10020b15); PROVIDE(__mulsf3 = 0x10000f29); -PROVIDE(net_context_bind = 0x100237db); -PROVIDE(LPUART_ClearStatusFlags = 0x10019e79); -PROVIDE(net_if_ipv4_set_netmask_by_addr = 0x10023033); -PROVIDE(strstr = 0x1002a569); -PROVIDE(net_pkt_available_buffer = 0x100243d5); -PROVIDE(net_icmpv4_input = 0x10024bcb); -PROVIDE(usb_get_dev_data_by_ep = 0x100201b5); -PROVIDE(EDMA_TcdEnableInterrupts = 0x10027cdd); -PROVIDE(usb_cancel_transfers = 0x1000503d); -PROVIDE(vfprintf = 0x1001d581); -PROVIDE(LPSPI_SetDummyData = 0x100199bd); -PROVIDE(ZVFS_FD_ZERO = 0x10021ddd); -PROVIDE(CLOCK_GetUsdhcClkFreq = 0x10027a67); -PROVIDE(z_impl_k_sem_take = 0x1001b331); -PROVIDE(net_if_addr_ref = 0x1002319f); +PROVIDE(net_context_bind = 0x10023a03); +PROVIDE(LPUART_ClearStatusFlags = 0x1001a0a1); +PROVIDE(net_if_ipv4_set_netmask_by_addr = 0x1002325b); +PROVIDE(strstr = 0x1002a791); +PROVIDE(net_pkt_available_buffer = 0x100245fd); +PROVIDE(net_icmpv4_input = 0x10024df3); +PROVIDE(usb_get_dev_data_by_ep = 0x100203dd); +PROVIDE(EDMA_TcdEnableInterrupts = 0x10027f05); +PROVIDE(usb_cancel_transfers = 0x1000523d); +PROVIDE(vfprintf = 0x1001d7a9); +PROVIDE(LPSPI_SetDummyData = 0x10019be5); +PROVIDE(ZVFS_FD_ZERO = 0x10022005); +PROVIDE(CLOCK_GetUsdhcClkFreq = 0x10027c8f); +PROVIDE(z_impl_k_sem_take = 0x1001b559); +PROVIDE(net_if_addr_ref = 0x100233c7); PROVIDE(__aeabi_fcmpeq = 0x10001251); -PROVIDE(zvfs_get_fd_obj = 0x10003205); -PROVIDE(ethernet_flags = 0x1002258f); -PROVIDE(LPUART_DisableInterrupts = 0x10019de5); -PROVIDE(z_thread_is_valid = 0x10005799); -PROVIDE(log_output_msg_process = 0x100200b5); -PROVIDE(usb_write = 0x10004615); -PROVIDE(FLEXSPI_GetDefaultConfig = 0x100284e5); -PROVIDE(net_tcp_put = 0x10011925); -PROVIDE(llext_buf_seek = 0x10021fe7); -PROVIDE(log_set_timestamp_func = 0x1000361d); -PROVIDE(z_device_state_init = 0x100290b3); -PROVIDE(sys_heap_alloc = 0x1001f55b); +PROVIDE(zvfs_get_fd_obj = 0x10003405); +PROVIDE(ethernet_flags = 0x100227b7); +PROVIDE(LPUART_DisableInterrupts = 0x1001a00d); +PROVIDE(z_thread_is_valid = 0x10005999); +PROVIDE(log_output_msg_process = 0x100202dd); +PROVIDE(usb_write = 0x10004815); +PROVIDE(FLEXSPI_GetDefaultConfig = 0x1002870d); +PROVIDE(net_tcp_put = 0x10011b4d); +PROVIDE(llext_buf_seek = 0x1002220f); +PROVIDE(log_set_timestamp_func = 0x1000381d); +PROVIDE(z_device_state_init = 0x100292db); +PROVIDE(sys_heap_alloc = 0x1001f783); PROVIDE(__floatunsisf = 0x10000e79); -PROVIDE(fs_sync = 0x1000a499); -PROVIDE(net_if_try_send_data = 0x10023255); -PROVIDE(z_impl_k_str_out = 0x10003129); -PROVIDE(net_ipv4_prepare_for_send = 0x10024f7b); -PROVIDE(z_shell_log_backend_enable = 0x10021257); -PROVIDE(net_pkt_frag_insert = 0x100243c1); -PROVIDE(soc_reset_hook = 0x1001fe7f); -PROVIDE(z_impl_net_if_ipv4_addr_rm_by_index = 0x10023211); -PROVIDE(LP_FLEXCOMM_GetInterruptStatus = 0x1001946d); -PROVIDE(CLOCK_GetPLL1InClockRate = 0x100189ad); -PROVIDE(z_shell_backend_rx_buffer_flush = 0x10007709); -PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x10020035); -PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x10020023); -PROVIDE(EDMA_GetRemainingMajorLoopCount = 0x10027cfb); +PROVIDE(fs_sync = 0x1000a699); +PROVIDE(net_if_try_send_data = 0x1002347d); +PROVIDE(z_impl_k_str_out = 0x10003329); +PROVIDE(net_ipv4_prepare_for_send = 0x100251a3); +PROVIDE(z_shell_log_backend_enable = 0x1002147f); +PROVIDE(net_pkt_frag_insert = 0x100245e9); +PROVIDE(soc_reset_hook = 0x100200a7); +PROVIDE(z_impl_net_if_ipv4_addr_rm_by_index = 0x10023439); +PROVIDE(LP_FLEXCOMM_GetInterruptStatus = 0x10019695); +PROVIDE(CLOCK_GetPLL1InClockRate = 0x10018bd5); +PROVIDE(z_shell_backend_rx_buffer_flush = 0x10007909); +PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x1002025d); +PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x1002024b); +PROVIDE(EDMA_GetRemainingMajorLoopCount = 0x10027f23); PROVIDE(__aeabi_dcmpeq = 0x10000b4d); -PROVIDE(z_impl_k_stack_pop = 0x1001b3fd); -PROVIDE(net_if_mcast_mon_register = 0x1000edb5); -PROVIDE(zvfs_finalize_typed_fd = 0x10003365); -PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x10020049); -PROVIDE(llext_load = 0x1000a7b5); -PROVIDE(__start = 0x10008b19); -PROVIDE(z_stack_space_get = 0x100299cb); +PROVIDE(z_impl_k_stack_pop = 0x1001b625); +PROVIDE(net_if_mcast_mon_register = 0x1000efdd); +PROVIDE(zvfs_finalize_typed_fd = 0x10003565); +PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x10020271); +PROVIDE(llext_load = 0x1000a9b5); +PROVIDE(__start = 0x10008d19); +PROVIDE(z_stack_space_get = 0x10029bf3); PROVIDE(__cmpsf2 = 0x100011d9); -PROVIDE(strchr = 0x1002a4c7); -PROVIDE(LPI2C_GetInstance = 0x100195c5); -PROVIDE(net_tcp_input = 0x10011655); +PROVIDE(strchr = 0x1002a6ef); +PROVIDE(LPI2C_GetInstance = 0x100197ed); +PROVIDE(net_tcp_input = 0x1001187d); PROVIDE(__fixunssfdi = 0x100013f1); -PROVIDE(llext_iterate = 0x1000a71d); -PROVIDE(dns_unpack_response_header = 0x10025eb9); -PROVIDE(net_context_connect = 0x10023c2f); -PROVIDE(__stdout_hook_install = 0x10008dc5); -PROVIDE(z_thread_timeout = 0x10029ae1); -PROVIDE(inet_pton = 0x10021b61); -PROVIDE(net_context_sendmsg = 0x10023e39); -PROVIDE(log_core_init = 0x1000363d); +PROVIDE(llext_iterate = 0x1000a91d); +PROVIDE(dns_unpack_response_header = 0x100260e1); +PROVIDE(net_context_connect = 0x10023e57); +PROVIDE(__stdout_hook_install = 0x10008fc5); +PROVIDE(z_thread_timeout = 0x10029d09); +PROVIDE(inet_pton = 0x10021d89); +PROVIDE(net_context_sendmsg = 0x10024061); +PROVIDE(log_core_init = 0x1000383d); PROVIDE(CONFIG_SYS_HASH_FUNC32 = 0x00000001); -PROVIDE(z_impl_zsock_getsockname = 0x1000c4c1); -PROVIDE(z_shell_help_cmd_print = 0x10007815); -PROVIDE(z_early_memcpy = 0x10029163); -PROVIDE(zvfs_eventfd_read = 0x100098f9); -PROVIDE(socket_service_init = 0x1000d939); -PROVIDE(shell_vfprintf = 0x1002075f); -PROVIDE(arch_tls_stack_setup = 0x10007e59); -PROVIDE(z_shell_fprintf_buffer_flush = 0x1002090d); -PROVIDE(z_impl_net_if_ipv4_set_netmask_by_addr_by_index = 0x10023095); -PROVIDE(zvfs_reserve_fd = 0x100032e5); -PROVIDE(z_sched_init = 0x1001bfe1); +PROVIDE(z_impl_zsock_getsockname = 0x1000c6c1); +PROVIDE(z_shell_help_cmd_print = 0x10007a15); +PROVIDE(z_early_memcpy = 0x1002938b); +PROVIDE(zvfs_eventfd_read = 0x10009af9); +PROVIDE(socket_service_init = 0x1000db39); +PROVIDE(shell_vfprintf = 0x10020987); +PROVIDE(arch_tls_stack_setup = 0x10008059); +PROVIDE(z_shell_fprintf_buffer_flush = 0x10020b35); +PROVIDE(z_impl_net_if_ipv4_set_netmask_by_addr_by_index = 0x100232bd); +PROVIDE(zvfs_reserve_fd = 0x100034e5); +PROVIDE(z_sched_init = 0x1001c209); PROVIDE(__addsf3 = 0x10000d19); -PROVIDE(__shiftright128 = 0x1002a7ed); -PROVIDE(z_impl_flash_flatten = 0x10021707); -PROVIDE(z_shell_print_cmd = 0x100073bd); -PROVIDE(net_buf_simple_tailroom = 0x10021cbf); -PROVIDE(z_shell_vt100_colors_restore = 0x10007479); -PROVIDE(spi_nxp_init_common = 0x10017dd9); +PROVIDE(__shiftright128 = 0x1002aa15); +PROVIDE(z_impl_flash_flatten = 0x1002192f); +PROVIDE(z_shell_print_cmd = 0x100075bd); +PROVIDE(net_buf_simple_tailroom = 0x10021ee7); +PROVIDE(z_shell_vt100_colors_restore = 0x10007679); +PROVIDE(spi_nxp_init_common = 0x10018001); PROVIDE(__aeabi_frsub = 0x10000d0d); -PROVIDE(cdc_acm_dte_rate_callback_set = 0x10005655); -PROVIDE(bind = 0x10021b6d); -PROVIDE(k_malloc = 0x1002a2ef); -PROVIDE(z_impl_k_poll_signal_check = 0x1002a2b1); -PROVIDE(sys_timepoint_timeout = 0x10029fb5); -PROVIDE(z_impl_zsock_recvmsg = 0x1000c2a1); -PROVIDE(EDMA_InstallTCDMemory = 0x10027de1); -PROVIDE(z_shell_spaces_trim = 0x10020c6d); -PROVIDE(scalbn = 0x1001f059); -PROVIDE(ring_buf_peek = 0x1001fe3b); -PROVIDE(zsock_wait_data = 0x10022497); -PROVIDE(z_impl_device_get_binding = 0x1001a989); -PROVIDE(log_backend_enable = 0x1001fefd); +PROVIDE(cdc_acm_dte_rate_callback_set = 0x10005855); +PROVIDE(bind = 0x10021d95); +PROVIDE(k_malloc = 0x1002a517); +PROVIDE(z_impl_k_poll_signal_check = 0x1002a4d9); +PROVIDE(sys_timepoint_timeout = 0x1002a1dd); +PROVIDE(z_impl_zsock_recvmsg = 0x1000c4a1); +PROVIDE(EDMA_InstallTCDMemory = 0x10028009); +PROVIDE(z_shell_spaces_trim = 0x10020e95); +PROVIDE(scalbn = 0x1001f281); +PROVIDE(ring_buf_peek = 0x10020063); +PROVIDE(zsock_wait_data = 0x100226bf); +PROVIDE(z_impl_device_get_binding = 0x1001abb1); +PROVIDE(log_backend_enable = 0x10020125); PROVIDE(__aeabi_ldiv0 = 0x10000301); -PROVIDE(sys_bitarray_alloc = 0x1001fc09); -PROVIDE(__dtoa_engine = 0x1001e10d); -PROVIDE(z_impl_net_eth_get_ptp_clock_by_index = 0x100226f5); -PROVIDE(z_arm_interrupt_init = 0x10008d31); -PROVIDE(z_shell_get_last_command = 0x10020c11); -PROVIDE(net_context_create_ipv4_new = 0x1002395b); -PROVIDE(SPC_SetActiveModeCoreLDORegulatorVoltageLevel = 0x1002878b); -PROVIDE(fs_write = 0x1000a379); -PROVIDE(isalpha = 0x1002a395); -PROVIDE(RESET_SetPeripheralReset = 0x10027ad7); -PROVIDE(board_early_init_hook = 0x10009d4d); -PROVIDE(z_sched_wake = 0x10029bbd); -PROVIDE(printf = 0x1001ce09); -PROVIDE(z_shell_cmd_trim = 0x10020ccd); +PROVIDE(sys_bitarray_alloc = 0x1001fe31); +PROVIDE(__dtoa_engine = 0x1001e335); +PROVIDE(z_impl_net_eth_get_ptp_clock_by_index = 0x1002291d); +PROVIDE(z_arm_interrupt_init = 0x10008f31); +PROVIDE(z_shell_get_last_command = 0x10020e39); +PROVIDE(net_context_create_ipv4_new = 0x10023b83); +PROVIDE(SPC_SetActiveModeCoreLDORegulatorVoltageLevel = 0x100289b3); +PROVIDE(fs_write = 0x1000a579); +PROVIDE(isalpha = 0x1002a5bd); +PROVIDE(RESET_SetPeripheralReset = 0x10027cff); +PROVIDE(board_early_init_hook = 0x10009f4d); +PROVIDE(z_sched_wake = 0x10029de5); +PROVIDE(printf = 0x1001d031); +PROVIDE(z_shell_cmd_trim = 0x10020ef5); PROVIDE(__aeabi_uldivmod = 0x100013c1); -PROVIDE(net_icmpv4_send_error = 0x10024ac9); -PROVIDE(zsock_connect_ctx = 0x1000ca35); -PROVIDE(fs_close = 0x1000a2e5); -PROVIDE(z_impl_k_pipe_close = 0x10029e77); -PROVIDE(usb_dc_ep_disable = 0x1001538d); -PROVIDE(net_if_need_calc_tx_checksum = 0x10023311); -PROVIDE(fnmatch = 0x10021b25); +PROVIDE(net_icmpv4_send_error = 0x10024cf1); +PROVIDE(zsock_connect_ctx = 0x1000cc35); +PROVIDE(fs_close = 0x1000a4e5); +PROVIDE(z_impl_k_pipe_close = 0x1002a09f); +PROVIDE(usb_dc_ep_disable = 0x100155b5); +PROVIDE(net_if_need_calc_tx_checksum = 0x10023539); +PROVIDE(fnmatch = 0x10021d4d); PROVIDE(__aeabi_drsub = 0x10000305); PROVIDE(__aeabi_d2ulz = 0x10001431); -PROVIDE(shell_fprintf_warn = 0x10020827); -PROVIDE(arch_switch_to_main_thread = 0x10008ce1); -PROVIDE(z_shell_wildcard_prepare = 0x10021685); -PROVIDE(z_shell_wildcard_finalize = 0x100216c7); -PROVIDE(timeutil_timegm64 = 0x10003415); -PROVIDE(z_impl_k_queue_alloc_append = 0x10029697); -PROVIDE(usb_get_device_descriptor = 0x10004a3d); -PROVIDE(z_impl_net_if_ipv4_addr_lookup_by_index = 0x10023321); -PROVIDE(zsock_setsockopt_ctx = 0x1000d459); -PROVIDE(net_ipv4_init = 0x10024f7f); -PROVIDE(RESET_PeripheralReset = 0x10027b21); -PROVIDE(CLOCK_AttachClk = 0x10018849); -PROVIDE(fs_truncate = 0x1000a451); -PROVIDE(filter_set = 0x100037f9); -PROVIDE(arm_irq_priority_set = 0x10008c35); -PROVIDE(__double_computeInvPow5 = 0x1001e70d); -PROVIDE(z_shell_pattern_remove = 0x10020b6d); -PROVIDE(k_work_init = 0x100298a9); -PROVIDE(k_timer_init = 0x10029ff7); -PROVIDE(llext_fs_prepare = 0x10022003); -PROVIDE(z_impl_zsock_sendmsg = 0x1000c1dd); -PROVIDE(net_pkt_unref = 0x10024381); -PROVIDE(llext_dependency_remove_all = 0x10021f77); -PROVIDE(llext_find_sym = 0x1000a759); -PROVIDE(net_if_get_name = 0x10023391); +PROVIDE(shell_fprintf_warn = 0x10020a4f); +PROVIDE(arch_switch_to_main_thread = 0x10008ee1); +PROVIDE(z_shell_wildcard_prepare = 0x100218ad); +PROVIDE(z_shell_wildcard_finalize = 0x100218ef); +PROVIDE(timeutil_timegm64 = 0x10003615); +PROVIDE(z_impl_k_queue_alloc_append = 0x100298bf); +PROVIDE(usb_get_device_descriptor = 0x10004c3d); +PROVIDE(z_impl_net_if_ipv4_addr_lookup_by_index = 0x10023549); +PROVIDE(zsock_setsockopt_ctx = 0x1000d659); +PROVIDE(net_ipv4_init = 0x100251a7); +PROVIDE(RESET_PeripheralReset = 0x10027d49); +PROVIDE(CLOCK_AttachClk = 0x10018a71); +PROVIDE(fs_truncate = 0x1000a651); +PROVIDE(filter_set = 0x100039f9); +PROVIDE(arm_irq_priority_set = 0x10008e35); +PROVIDE(__double_computeInvPow5 = 0x1001e935); +PROVIDE(z_shell_pattern_remove = 0x10020d95); +PROVIDE(k_work_init = 0x10029ad1); +PROVIDE(k_timer_init = 0x1002a21f); +PROVIDE(llext_fs_prepare = 0x1002222b); +PROVIDE(z_impl_zsock_sendmsg = 0x1000c3dd); +PROVIDE(net_pkt_unref = 0x100245a9); +PROVIDE(llext_dependency_remove_all = 0x1002219f); +PROVIDE(llext_find_sym = 0x1000a959); +PROVIDE(net_if_get_name = 0x100235b9); PROVIDE(__aeabi_d2iz = 0x10000bdd); -PROVIDE(z_unpend_all = 0x10029b25); -PROVIDE(z_arm_svc = 0x10008bf5); -PROVIDE(LPSPI_MasterInit = 0x10019a9d); -PROVIDE(cbvprintf_package = 0x100029c1); -PROVIDE(usb_disable = 0x100045b5); +PROVIDE(z_unpend_all = 0x10029d4d); +PROVIDE(z_arm_svc = 0x10008df5); +PROVIDE(LPSPI_MasterInit = 0x10019cc5); +PROVIDE(cbvprintf_package = 0x10002bc1); +PROVIDE(usb_disable = 0x100047b5); PROVIDE(__aeabi_idiv0 = 0x10000301); -PROVIDE(ring_buf_get = 0x1001fdf7); -PROVIDE(z_queue_node_peek = 0x100295d1); -PROVIDE(dns_resolve_name_internal = 0x10014765); -PROVIDE(usb_transfer_init = 0x10005081); -PROVIDE(net_pkt_alloc_buffer = 0x100107e5); -PROVIDE(llext_lookup_symbol = 0x1000b695); -PROVIDE(llext_buf_read = 0x10021fbd); -PROVIDE(z_early_memset = 0x1002915f); +PROVIDE(ring_buf_get = 0x1002001f); +PROVIDE(z_queue_node_peek = 0x100297f9); +PROVIDE(dns_resolve_name_internal = 0x1001498d); +PROVIDE(usb_transfer_init = 0x10005281); +PROVIDE(net_pkt_alloc_buffer = 0x10010a0d); +PROVIDE(llext_lookup_symbol = 0x1000b895); +PROVIDE(llext_buf_read = 0x100221e5); +PROVIDE(z_early_memset = 0x10029387); PROVIDE(__aeabi_fdiv = 0x10001091); -PROVIDE(strncpy = 0x1002a505); -PROVIDE(z_shell_op_cursor_end_move = 0x10020ef5); -PROVIDE(llext_bootstrap = 0x1000a92d); -PROVIDE(z_impl_k_poll_signal_raise = 0x1001cbb5); -PROVIDE(zsock_sendto_ctx = 0x1000cb3d); -PROVIDE(net_if_get_by_name = 0x1000f5b9); -PROVIDE(nxp_lp_flexcomm_isr = 0x100272fb); -PROVIDE(CLOCK_GetPll0OutFreq = 0x100188d5); -PROVIDE(z_thread_prio_set = 0x1001be29); -PROVIDE(net_ipaddr_parse = 0x10023635); +PROVIDE(strncpy = 0x1002a72d); +PROVIDE(z_shell_op_cursor_end_move = 0x1002111d); +PROVIDE(llext_bootstrap = 0x1000ab2d); +PROVIDE(z_impl_k_poll_signal_raise = 0x1001cddd); +PROVIDE(zsock_sendto_ctx = 0x1000cd3d); +PROVIDE(net_if_get_by_name = 0x1000f7e1); +PROVIDE(nxp_lp_flexcomm_isr = 0x10027523); +PROVIDE(CLOCK_GetPll0OutFreq = 0x10018afd); +PROVIDE(z_thread_prio_set = 0x1001c051); +PROVIDE(net_ipaddr_parse = 0x1002385d); PROVIDE(__cmpdf2 = 0x10000ab1); -PROVIDE(z_arm_fault = 0x10008849); -PROVIDE(FLASH_Erase = 0x1001a3dd); -PROVIDE(putchar = 0x1001ce2d); -PROVIDE(zsock_listen_ctx = 0x1000cafd); -PROVIDE(dns_msg_pack_query = 0x10025f0d); +PROVIDE(z_arm_fault = 0x10008a49); +PROVIDE(FLASH_Erase = 0x1001a605); +PROVIDE(putchar = 0x1001d055); +PROVIDE(zsock_listen_ctx = 0x1000ccfd); +PROVIDE(dns_msg_pack_query = 0x10026135); PROVIDE(CONFIG_POSIX_THREAD_SAFE_FUNCTIONS = 0x00000001); -PROVIDE(usb_enable = 0x10004801); -PROVIDE(z_log_runtime_filters_init = 0x10003785); -PROVIDE(z_arm_exc_exit = 0x10008271); -PROVIDE(z_impl_k_mutex_lock = 0x1001b0c9); -PROVIDE(zsock_accept_ctx = 0x1000ccf5); -PROVIDE(FLEXSPI_CheckAndClearError = 0x100284af); -PROVIDE(zsock_getaddrinfo = 0x10022133); -PROVIDE(z_log_msg_commit = 0x100036fd); -PROVIDE(z_prep_c = 0x10008c61); -PROVIDE(memc_flexspi_get_ahb_address = 0x10017b49); -PROVIDE(CLOCK_GetFlexspiClkFreq = 0x100279ed); -PROVIDE(EDMA_ConfigChannelSoftwareTCD = 0x1001921d); -PROVIDE(k_work_reschedule_for_queue = 0x1001b781); -PROVIDE(CLOCK_SetPLL0Freq = 0x10018b0d); +PROVIDE(usb_enable = 0x10004a01); +PROVIDE(z_log_runtime_filters_init = 0x10003985); +PROVIDE(z_arm_exc_exit = 0x10008471); +PROVIDE(z_impl_k_mutex_lock = 0x1001b2f1); +PROVIDE(zsock_accept_ctx = 0x1000cef5); +PROVIDE(FLEXSPI_CheckAndClearError = 0x100286d7); +PROVIDE(zsock_getaddrinfo = 0x1002235b); +PROVIDE(z_log_msg_commit = 0x100038fd); +PROVIDE(z_prep_c = 0x10008e61); +PROVIDE(memc_flexspi_get_ahb_address = 0x10017d71); +PROVIDE(CLOCK_GetFlexspiClkFreq = 0x10027c15); +PROVIDE(EDMA_ConfigChannelSoftwareTCD = 0x10019445); +PROVIDE(k_work_reschedule_for_queue = 0x1001b9a9); +PROVIDE(CLOCK_SetPLL0Freq = 0x10018d35); PROVIDE(__aeabi_cfcmpeq = 0x10001241); -PROVIDE(configure_builtin_stack_guard = 0x10021891); -PROVIDE(z_impl_zvfs_select = 0x10009b55); -PROVIDE(z_impl_k_pipe_reset = 0x10029e37); -PROVIDE(net_tcp_recv = 0x10025565); -PROVIDE(k_sched_unlock = 0x1001bf79); -PROVIDE(net_if_ipv4_get_ttl = 0x10023147); -PROVIDE(llext_fs_finalize = 0x10022063); -PROVIDE(z_impl_k_sched_current_thread_query = 0x1001c1c1); -PROVIDE(net_context_is_v6only_set = 0x10023771); -PROVIDE(z_impl_k_condvar_init = 0x10029987); -PROVIDE(USB_DeviceEhciDeinit = 0x1001a7ed); -PROVIDE(exit = 0x1001cca5); -PROVIDE(FLEXSPI_WriteBlocking = 0x1002854f); -PROVIDE(z_impl_hwinfo_get_reset_cause = 0x1002702f); -PROVIDE(zsock_getsockopt_ctx = 0x1000d301); -PROVIDE(net_if_init = 0x1000f5fd); -PROVIDE(FLEXSPI_ReadBlocking = 0x100285ef); -PROVIDE(k_sys_fatal_error_handler = 0x1001aa2d); -PROVIDE(net_buf_simple_add_mem = 0x10021c89); -PROVIDE(_cos = 0x1001e805); -PROVIDE(SPC_SetSRAMOperateVoltage = 0x10028767); -PROVIDE(CACHE64_GetInstanceByAddr = 0x1001a215); -PROVIDE(vprintk = 0x1001f955); -PROVIDE(z_shell_op_completion_insert = 0x100210e5); -PROVIDE(LPI2C_MasterTransferCreateHandle = 0x10019721); +PROVIDE(configure_builtin_stack_guard = 0x10021ab9); +PROVIDE(z_impl_zvfs_select = 0x10009d55); +PROVIDE(z_impl_k_pipe_reset = 0x1002a05f); +PROVIDE(net_tcp_recv = 0x1002578d); +PROVIDE(k_sched_unlock = 0x1001c1a1); +PROVIDE(net_if_ipv4_get_ttl = 0x1002336f); +PROVIDE(llext_fs_finalize = 0x1002228b); +PROVIDE(z_impl_k_sched_current_thread_query = 0x1001c3e9); +PROVIDE(net_context_is_v6only_set = 0x10023999); +PROVIDE(z_impl_k_condvar_init = 0x10029baf); +PROVIDE(USB_DeviceEhciDeinit = 0x1001aa15); +PROVIDE(exit = 0x1001cecd); +PROVIDE(FLEXSPI_WriteBlocking = 0x10028777); +PROVIDE(z_impl_hwinfo_get_reset_cause = 0x10027257); +PROVIDE(zsock_getsockopt_ctx = 0x1000d501); +PROVIDE(net_if_init = 0x1000f825); +PROVIDE(FLEXSPI_ReadBlocking = 0x10028817); +PROVIDE(k_sys_fatal_error_handler = 0x1001ac55); +PROVIDE(net_buf_simple_add_mem = 0x10021eb1); +PROVIDE(_cos = 0x1001ea2d); +PROVIDE(SPC_SetSRAMOperateVoltage = 0x1002898f); +PROVIDE(CACHE64_GetInstanceByAddr = 0x1001a43d); +PROVIDE(vprintk = 0x1001fb7d); +PROVIDE(z_shell_op_completion_insert = 0x1002130d); +PROVIDE(LPI2C_MasterTransferCreateHandle = 0x10019949); PROVIDE(__aeabi_d2f = 0x10000c6d); -PROVIDE(usb_dc_ep_read_continue = 0x1001564d); -PROVIDE(EDMA_Init = 0x10019015); -PROVIDE(usb_dc_ep_write = 0x1001542d); -PROVIDE(floor = 0x1001f125); -PROVIDE(shell_uninit = 0x100206e1); -PROVIDE(usb_dc_attach = 0x10014db1); +PROVIDE(usb_dc_ep_read_continue = 0x10015875); +PROVIDE(EDMA_Init = 0x1001923d); +PROVIDE(usb_dc_ep_write = 0x10015655); +PROVIDE(floor = 0x1001f34d); +PROVIDE(shell_uninit = 0x10020909); +PROVIDE(usb_dc_attach = 0x10014fd9); PROVIDE(__aeabi_idivmod = 0x100002f1); -PROVIDE(z_shell_op_cursor_home_move = 0x10020ee7); -PROVIDE(z_impl_k_sem_init = 0x100296ed); -PROVIDE(net_tcp_accept = 0x1001155d); -PROVIDE(SystemInitHook = 0x10027b33); -PROVIDE(__do_init_array_aux = 0x1001ae4d); -PROVIDE(net_if_get_by_iface = 0x1000f409); -PROVIDE(send = 0x10021b99); +PROVIDE(z_shell_op_cursor_home_move = 0x1002110f); +PROVIDE(z_impl_k_sem_init = 0x10029915); +PROVIDE(net_tcp_accept = 0x10011785); +PROVIDE(SystemInitHook = 0x10027d5b); +PROVIDE(__do_init_array_aux = 0x1001b075); +PROVIDE(net_if_get_by_iface = 0x1000f631); +PROVIDE(send = 0x10021dc1); PROVIDE(__fixunsdfsi = 0x10000c2d); -PROVIDE(z_shell_op_word_remove = 0x100074b9); -PROVIDE(net_pkt_rx_alloc = 0x1001068d); -PROVIDE(CACHE64_InvalidateCacheByRange = 0x1001a299); -PROVIDE(net_buf_frag_last = 0x10021bdb); -PROVIDE(k_work_schedule_for_queue = 0x1001b721); -PROVIDE(arch_spin_relax = 0x10029319); -PROVIDE(z_early_rand_get = 0x1001acc1); -PROVIDE(net_context_send = 0x10023dc7); -PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x1001a9d1); -PROVIDE(z_unpend_thread = 0x10029b15); +PROVIDE(z_shell_op_word_remove = 0x100076b9); +PROVIDE(net_pkt_rx_alloc = 0x100108b5); +PROVIDE(CACHE64_InvalidateCacheByRange = 0x1001a4c1); +PROVIDE(net_buf_frag_last = 0x10021e03); +PROVIDE(k_work_schedule_for_queue = 0x1001b949); +PROVIDE(arch_spin_relax = 0x10029541); +PROVIDE(z_early_rand_get = 0x1001aee9); +PROVIDE(net_context_send = 0x10023fef); +PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x1001abf9); +PROVIDE(z_unpend_thread = 0x10029d3d); PROVIDE(__aeabi_dcmpge = 0x10000b89); -PROVIDE(z_cstart = 0x1001ad31); -PROVIDE(sys_clock_isr = 0x100183c5); -PROVIDE(_StackCheckHandler = 0x10029ea5); -PROVIDE(EDMA_EnableChannelInterrupts = 0x10027d23); -PROVIDE(z_shell_help_request = 0x10007855); -PROVIDE(z_impl_z_log_msg_static_create = 0x10003a05); -PROVIDE(net_eth_ipv4_mcast_to_mac_addr = 0x10022689); -PROVIDE(thread_is_sliceable = 0x1001c4bd); -PROVIDE(net_pkt_frag_ref = 0x10024371); -PROVIDE(z_log_notify_backend_enabled = 0x1001fed3); -PROVIDE(ZVFS_FD_SET = 0x10021de3); -PROVIDE(zvfs_get_obj_lock_and_cond = 0x10003241); -PROVIDE(z_impl_k_thread_stack_space_get = 0x100299e9); +PROVIDE(z_cstart = 0x1001af59); +PROVIDE(sys_clock_isr = 0x100185ed); +PROVIDE(_StackCheckHandler = 0x1002a0cd); +PROVIDE(EDMA_EnableChannelInterrupts = 0x10027f4b); +PROVIDE(z_shell_help_request = 0x10007a55); +PROVIDE(z_impl_z_log_msg_static_create = 0x10003c05); +PROVIDE(net_eth_ipv4_mcast_to_mac_addr = 0x100228b1); +PROVIDE(thread_is_sliceable = 0x1001c6e5); +PROVIDE(net_pkt_frag_ref = 0x10024599); +PROVIDE(z_log_notify_backend_enabled = 0x100200fb); +PROVIDE(ZVFS_FD_SET = 0x1002200b); +PROVIDE(zvfs_get_obj_lock_and_cond = 0x10003441); +PROVIDE(z_impl_k_thread_stack_space_get = 0x10029c11); PROVIDE(atan = 0x10001a11); -PROVIDE(llext_copy_regions = 0x10021e81); +PROVIDE(llext_copy_regions = 0x100220a9); PROVIDE(__aeabi_ldivmod = 0x10001321); -PROVIDE(z_ready_thread = 0x10029a67); -PROVIDE(net_pkt_get_frag = 0x1001060d); -PROVIDE(k_msgq_init = 0x1002934d); +PROVIDE(z_ready_thread = 0x10029c8f); +PROVIDE(net_pkt_get_frag = 0x10010835); +PROVIDE(k_msgq_init = 0x10029575); PROVIDE(__aeabi_dmul = 0x1000067d); -PROVIDE(strtoul = 0x1001d381); -PROVIDE(hex2bin = 0x1001fa43); -PROVIDE(socket = 0x10021bc5); -PROVIDE(getopt_state_get = 0x10009095); -PROVIDE(k_fatal_halt = 0x1002912b); -PROVIDE(z_log_msg_runtime_vcreate = 0x10003931); -PROVIDE(boot_banner = 0x1001a965); -PROVIDE(USB_DeviceNotificationTrigger = 0x100157e5); -PROVIDE(close = 0x10021b2b); +PROVIDE(strtoul = 0x1001d5a9); +PROVIDE(hex2bin = 0x1001fc6b); +PROVIDE(socket = 0x10021ded); +PROVIDE(getopt_state_get = 0x10009295); +PROVIDE(k_fatal_halt = 0x10029353); +PROVIDE(z_log_msg_runtime_vcreate = 0x10003b31); +PROVIDE(boot_banner = 0x1001ab8d); +PROVIDE(USB_DeviceNotificationTrigger = 0x10015a0d); +PROVIDE(close = 0x10021d53); PROVIDE(__aeabi_dcmpun = 0x10000bb1); -PROVIDE(net_mgmt_add_event_callback = 0x1000fdc1); -PROVIDE(z_arm_mpu_fault = 0x10008b05); -PROVIDE(z_impl_net_if_get_by_index = 0x1000ed6d); -PROVIDE(z_shell_history_mode_exit = 0x100214ed); -PROVIDE(FLASH_GetProperty = 0x1001a405); -PROVIDE(z_impl_k_uptime_ticks = 0x10029f69); -PROVIDE(LPUART_EnableInterrupts = 0x10019d8d); +PROVIDE(net_mgmt_add_event_callback = 0x1000ffe9); +PROVIDE(z_arm_mpu_fault = 0x10008d05); +PROVIDE(z_impl_net_if_get_by_index = 0x1000ef6d); +PROVIDE(z_shell_history_mode_exit = 0x10021715); +PROVIDE(FLASH_GetProperty = 0x1001a62d); +PROVIDE(z_impl_k_uptime_ticks = 0x1002a191); +PROVIDE(LPUART_EnableInterrupts = 0x10019fb5); PROVIDE(__aeabi_dcmple = 0x10000b75); PROVIDE(__subsf3 = 0x10000d15); -PROVIDE(net_if_ipv4_set_gw = 0x100230a9); -PROVIDE(usb_get_dev_data_by_cfg = 0x10020185); -PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x1002703b); -PROVIDE(getopt_init = 0x10008f21); -PROVIDE(dns_init_resolver = 0x10014a9d); -PROVIDE(z_impl_flash_copy = 0x1002172f); -PROVIDE(__cxa_pure_virtual = 0x1001f205); +PROVIDE(net_if_ipv4_set_gw = 0x100232d1); +PROVIDE(usb_get_dev_data_by_cfg = 0x100203ad); +PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x10027263); +PROVIDE(getopt_init = 0x10009121); +PROVIDE(dns_init_resolver = 0x10014cc5); +PROVIDE(z_impl_flash_copy = 0x10021957); +PROVIDE(__cxa_pure_virtual = 0x1001f42d); PROVIDE(__gesf2 = 0x100011c9); -PROVIDE(z_arm_debug_monitor = 0x10008b05); -PROVIDE(memc_flexspi_update_clock = 0x10027269); -PROVIDE(z_impl_device_init = 0x10029167); -PROVIDE(net_tcp_send_data = 0x10025557); -PROVIDE(net_if_ipv4_get_mcast_ttl = 0x10023173); -PROVIDE(LPUART_GetStatusFlags = 0x10019e45); -PROVIDE(putchar_unlocked = 0x1001ce2d); -PROVIDE(z_thread_entry = 0x10003145); -PROVIDE(k_mem_slab_alloc = 0x1001aeb1); -PROVIDE(arch_printk_char_out = 0x1001f951); -PROVIDE(k_aligned_alloc = 0x1001cc05); -PROVIDE(z_shell_wildcard_process = 0x10007ba9); +PROVIDE(z_arm_debug_monitor = 0x10008d05); +PROVIDE(memc_flexspi_update_clock = 0x10027491); +PROVIDE(z_impl_device_init = 0x1002938f); +PROVIDE(net_tcp_send_data = 0x1002577f); +PROVIDE(net_if_ipv4_get_mcast_ttl = 0x1002339b); +PROVIDE(LPUART_GetStatusFlags = 0x1001a06d); +PROVIDE(putchar_unlocked = 0x1001d055); +PROVIDE(z_thread_entry = 0x10003345); +PROVIDE(k_mem_slab_alloc = 0x1001b0d9); +PROVIDE(arch_printk_char_out = 0x1001fb79); +PROVIDE(k_aligned_alloc = 0x1001ce2d); +PROVIDE(z_shell_wildcard_process = 0x10007da9); PROVIDE(__unorddf2 = 0x10000bb1); -PROVIDE(sys_heap_aligned_alloc = 0x1001f5c9); -PROVIDE(sin = 0x1001e891); -PROVIDE(__wrap_calloc = 0x10008ec5); -PROVIDE(zvfs_eventfd_write = 0x10009925); -PROVIDE(z_shell_print_prompt_and_cmd = 0x100076d9); -PROVIDE(net_buf_simple_reserve = 0x10021c75); -PROVIDE(LPI2C_MasterInit = 0x1001960d); -PROVIDE(net_arp_clear_cache = 0x1000e9c9); -PROVIDE(FLEXSPI_UpdateLUT = 0x1001a1a1); -PROVIDE(net_dhcpv4_accept_unicast = 0x10025d83); -PROVIDE(z_impl_k_sem_give = 0x1001b2bd); -PROVIDE(z_impl_k_queue_cancel_wait = 0x10029603); -PROVIDE(k_work_delayable_busy_get = 0x10029943); +PROVIDE(sys_heap_aligned_alloc = 0x1001f7f1); +PROVIDE(sin = 0x1001eab9); +PROVIDE(__wrap_calloc = 0x100090c5); +PROVIDE(zvfs_eventfd_write = 0x10009b25); +PROVIDE(z_shell_print_prompt_and_cmd = 0x100078d9); +PROVIDE(net_buf_simple_reserve = 0x10021e9d); +PROVIDE(LPI2C_MasterInit = 0x10019835); +PROVIDE(net_arp_clear_cache = 0x1000ebc9); +PROVIDE(FLEXSPI_UpdateLUT = 0x1001a3c9); +PROVIDE(net_dhcpv4_accept_unicast = 0x10025fab); +PROVIDE(z_impl_k_sem_give = 0x1001b4e5); +PROVIDE(z_impl_k_queue_cancel_wait = 0x1002982b); +PROVIDE(k_work_delayable_busy_get = 0x10029b6b); PROVIDE(__aeabi_f2ulz = 0x100013f1); -PROVIDE(spi_mcux_release = 0x100278c5); -PROVIDE(usb_set_config = 0x100047d5); -PROVIDE(z_impl_k_condvar_broadcast = 0x1001b835); -PROVIDE(calc_chksum = 0x100233fd); -PROVIDE(z_impl_k_condvar_wait = 0x1001b8a5); -PROVIDE(EDMA_StopTransfer = 0x10027fb7); -PROVIDE(z_impl_k_mutex_unlock = 0x1001b1b9); -PROVIDE(USB_DeviceEhciSend = 0x100289df); -PROVIDE(net_pkt_alloc_buffer_with_reserve = 0x100106fd); -PROVIDE(__fpclassifyd = 0x1001e971); -PROVIDE(z_impl_k_msgq_alloc_init = 0x10029375); -PROVIDE(CLOCK_SetupFROHFClocking = 0x10018695); -PROVIDE(EDMA_InitChannel = 0x10027bbb); -PROVIDE(timeutil_timegm = 0x100034fd); -PROVIDE(power_mode_od = 0x10009d0d); +PROVIDE(spi_mcux_release = 0x10027aed); +PROVIDE(usb_set_config = 0x100049d5); +PROVIDE(z_impl_k_condvar_broadcast = 0x1001ba5d); +PROVIDE(calc_chksum = 0x10023625); +PROVIDE(z_impl_k_condvar_wait = 0x1001bacd); +PROVIDE(EDMA_StopTransfer = 0x100281df); +PROVIDE(z_impl_k_mutex_unlock = 0x1001b3e1); +PROVIDE(USB_DeviceEhciSend = 0x10028c07); +PROVIDE(net_pkt_alloc_buffer_with_reserve = 0x10010925); +PROVIDE(__fpclassifyd = 0x1001eb99); +PROVIDE(z_impl_k_msgq_alloc_init = 0x1002959d); +PROVIDE(CLOCK_SetupFROHFClocking = 0x100188bd); +PROVIDE(EDMA_InitChannel = 0x10027de3); +PROVIDE(timeutil_timegm = 0x100036fd); +PROVIDE(power_mode_od = 0x10009f0d); PROVIDE(__muldf3 = 0x1000067d); -PROVIDE(k_stack_init = 0x1002970d); -PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x10027029); -PROVIDE(LPI2C_MasterTransferAbort = 0x10019799); -PROVIDE(net_arp_init = 0x1000eac1); +PROVIDE(k_stack_init = 0x10029935); +PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x10027251); +PROVIDE(LPI2C_MasterTransferAbort = 0x100199c1); +PROVIDE(net_arp_init = 0x1000ecc1); PROVIDE(__aeabi_cfrcmple = 0x10001239); -PROVIDE(z_impl_device_deinit = 0x100290cb); -PROVIDE(SPC_SetActiveModeCoreLDORegulatorDriveStrength = 0x100287c3); -PROVIDE(cbpprintf_external = 0x1001f8a5); -PROVIDE(z_impl_log_buffered_cnt = 0x100036c9); -PROVIDE(net_buf_ref = 0x10021bd3); -PROVIDE(FLEXSPI_SetFlashConfig = 0x1001a091); -PROVIDE(net_if_set_link_addr_locked = 0x10022eeb); -PROVIDE(z_shell_cmd_line_erase = 0x10020f4b); -PROVIDE(net_byte_to_hex = 0x100233c9); -PROVIDE(shell_hexdump_line = 0x1000708d); -PROVIDE(k_work_submit_to_queue = 0x100298ff); -PROVIDE(_isr_wrapper = 0x10008d49); -PROVIDE(z_impl_k_wakeup = 0x1001c179); +PROVIDE(z_impl_device_deinit = 0x100292f3); +PROVIDE(SPC_SetActiveModeCoreLDORegulatorDriveStrength = 0x100289eb); +PROVIDE(cbpprintf_external = 0x1001facd); +PROVIDE(z_impl_log_buffered_cnt = 0x100038c9); +PROVIDE(net_buf_ref = 0x10021dfb); +PROVIDE(FLEXSPI_SetFlashConfig = 0x1001a2b9); +PROVIDE(net_if_set_link_addr_locked = 0x10023113); +PROVIDE(z_shell_cmd_line_erase = 0x10021173); +PROVIDE(net_byte_to_hex = 0x100235f1); +PROVIDE(shell_hexdump_line = 0x1000728d); +PROVIDE(k_work_submit_to_queue = 0x10029b27); +PROVIDE(_isr_wrapper = 0x10008f49); +PROVIDE(z_impl_k_wakeup = 0x1001c3a1); PROVIDE(__divsi3 = 0x100002d5); -PROVIDE(flash_area_open = 0x10003e55); -PROVIDE(k_work_queue_start = 0x1001b6a5); -PROVIDE(z_shell_op_left_arrow = 0x10020f07); -PROVIDE(net_tcp_update_recv_wnd = 0x10025861); -PROVIDE(z_log_vprintk = 0x1001feb7); -PROVIDE(net_if_carrier_on = 0x10023341); +PROVIDE(flash_area_open = 0x10004055); +PROVIDE(k_work_queue_start = 0x1001b8cd); +PROVIDE(z_shell_op_left_arrow = 0x1002112f); +PROVIDE(net_tcp_update_recv_wnd = 0x10025a89); +PROVIDE(z_log_vprintk = 0x100200df); +PROVIDE(net_if_carrier_on = 0x10023569); PROVIDE(__aeabi_d2lz = 0x100014a1); -PROVIDE(k_poll_event_init = 0x1002a245); -PROVIDE(z_arm_fatal_error = 0x10007d6d); -PROVIDE(z_impl_net_socket_service_register = 0x1000d6f1); -PROVIDE(net_pkt_get_current_offset = 0x100246df); -PROVIDE(net_pkt_available_payload_buffer = 0x100243f9); -PROVIDE(z_arm_hard_fault = 0x10008b05); -PROVIDE(z_impl_llext_get_fn_table = 0x1000b909); -PROVIDE(z_impl_k_msgq_peek_at = 0x100293ed); -PROVIDE(z_shell_log_backend_output_func = 0x10021243); -PROVIDE(z_pend_curr = 0x1001bdd1); -PROVIDE(usb_dc_ep_configure = 0x10014f39); -PROVIDE(net_pkt_append_buffer = 0x100244ad); -PROVIDE(net_eth_carrier_on = 0x100226a9); -PROVIDE(k_work_busy_get = 0x100298bb); -PROVIDE(log_output_timestamp_freq_set = 0x10003e29); -PROVIDE(fputc = 0x1002a967); -PROVIDE(__fpclassifyl = 0x1001e971); -PROVIDE(cbvprintf = 0x10008d6d); -PROVIDE(z_impl_k_is_preempt_thread = 0x1001b8f1); -PROVIDE(net_if_set_name = 0x1000f555); -PROVIDE(net_udp_create = 0x10025adb); -PROVIDE(LPUART_GetEnabledInterrupts = 0x10028445); -PROVIDE(z_impl_k_queue_peek_tail = 0x100296e5); -PROVIDE(LP_FLEXCOMM_GetBaseAddress = 0x10019459); -PROVIDE(z_impl_k_thread_suspend = 0x1001bce1); -PROVIDE(net_if_ipv4_maddr_join = 0x10023123); -PROVIDE(z_impl_k_thread_join = 0x1001c30d); -PROVIDE(z_log_dropped = 0x100036d5); -PROVIDE(net_pkt_alloc_with_buffer = 0x10010861); -PROVIDE(net_calc_chksum = 0x100234fb); -PROVIDE(jesd216_bfp_decode_dw16 = 0x100168dd); -PROVIDE(z_impl_sys_rand_get = 0x1000a595); -PROVIDE(_OffsetAbsSyms = 0x1001f1cd); -PROVIDE(shell_strtoul = 0x100072ed); -PROVIDE(usb_transfer_is_busy = 0x10020201); -PROVIDE(net_icmp_init_ctx = 0x100109b9); -PROVIDE(jesd216_bfp_decode_dw15 = 0x10026b4b); -PROVIDE(k_heap_init = 0x10029187); -PROVIDE(FLEXSPI_TransferBlocking = 0x100286b7); -PROVIDE(jesd216_bfp_decode_dw14 = 0x10026af7); -PROVIDE(isdigit = 0x1002a3b7); +PROVIDE(k_poll_event_init = 0x1002a46d); +PROVIDE(z_arm_fatal_error = 0x10007f6d); +PROVIDE(z_impl_net_socket_service_register = 0x1000d8f1); +PROVIDE(net_pkt_get_current_offset = 0x10024907); +PROVIDE(net_pkt_available_payload_buffer = 0x10024621); +PROVIDE(z_arm_hard_fault = 0x10008d05); +PROVIDE(z_impl_llext_get_fn_table = 0x1000bb09); +PROVIDE(z_impl_k_msgq_peek_at = 0x10029615); +PROVIDE(z_shell_log_backend_output_func = 0x1002146b); +PROVIDE(z_pend_curr = 0x1001bff9); +PROVIDE(usb_dc_ep_configure = 0x10015161); +PROVIDE(net_pkt_append_buffer = 0x100246d5); +PROVIDE(net_eth_carrier_on = 0x100228d1); +PROVIDE(k_work_busy_get = 0x10029ae3); +PROVIDE(log_output_timestamp_freq_set = 0x10004029); +PROVIDE(fputc = 0x1002ab8f); +PROVIDE(__fpclassifyl = 0x1001eb99); +PROVIDE(cbvprintf = 0x10008f6d); +PROVIDE(z_impl_k_is_preempt_thread = 0x1001bb19); +PROVIDE(net_if_set_name = 0x1000f77d); +PROVIDE(net_udp_create = 0x10025d03); +PROVIDE(LPUART_GetEnabledInterrupts = 0x1002866d); +PROVIDE(z_impl_k_queue_peek_tail = 0x1002990d); +PROVIDE(LP_FLEXCOMM_GetBaseAddress = 0x10019681); +PROVIDE(z_impl_k_thread_suspend = 0x1001bf09); +PROVIDE(net_if_ipv4_maddr_join = 0x1002334b); +PROVIDE(z_impl_k_thread_join = 0x1001c535); +PROVIDE(z_log_dropped = 0x100038d5); +PROVIDE(net_pkt_alloc_with_buffer = 0x10010a89); +PROVIDE(net_calc_chksum = 0x10023723); +PROVIDE(jesd216_bfp_decode_dw16 = 0x10016b05); +PROVIDE(z_impl_sys_rand_get = 0x1000a795); +PROVIDE(_OffsetAbsSyms = 0x1001f3f5); +PROVIDE(shell_strtoul = 0x100074ed); +PROVIDE(usb_transfer_is_busy = 0x10020429); +PROVIDE(net_icmp_init_ctx = 0x10010be1); +PROVIDE(jesd216_bfp_decode_dw15 = 0x10026d73); +PROVIDE(k_heap_init = 0x100293af); +PROVIDE(FLEXSPI_TransferBlocking = 0x100288df); +PROVIDE(jesd216_bfp_decode_dw14 = 0x10026d1f); +PROVIDE(isdigit = 0x1002a5df); PROVIDE(__aeabi_i2d = 0x100005a9); -PROVIDE(k_sched_lock = 0x1001bf51); -PROVIDE(dns_resolve_reconfigure = 0x10014999); -PROVIDE(__aeabi_memmove8 = 0x1002a337); +PROVIDE(k_sched_lock = 0x1001c179); +PROVIDE(dns_resolve_reconfigure = 0x10014bc1); +PROVIDE(__aeabi_memmove8 = 0x1002a55f); PROVIDE(__aeabi_i2f = 0x10000e81); -PROVIDE(sys_clock_tick_get = 0x1001c8cd); -PROVIDE(OSA_ExitCritical = 0x1002908d); -PROVIDE(net_context_sendto = 0x10023e83); -PROVIDE(EDMA_TcdResetExt = 0x10027c13); -PROVIDE(z_impl_zsock_socketpair = 0x1000e0bd); -PROVIDE(sinl = 0x1001e891); -PROVIDE(z_arm_reset = 0x10008b19); +PROVIDE(sys_clock_tick_get = 0x1001caf5); +PROVIDE(OSA_ExitCritical = 0x100292b5); +PROVIDE(net_context_sendto = 0x100240ab); +PROVIDE(EDMA_TcdResetExt = 0x10027e3b); +PROVIDE(z_impl_zsock_socketpair = 0x1000e2bd); +PROVIDE(sinl = 0x1001eab9); +PROVIDE(z_arm_reset = 0x10008d19); PROVIDE(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT = 0x00000001); -PROVIDE(z_shell_has_wildcard = 0x1002165d); -PROVIDE(__aeabi_memmove4 = 0x1002a337); -PROVIDE(z_impl_zsock_setsockopt = 0x1000c401); -PROVIDE(net_if_ipv4_maddr_lookup = 0x1000f0d1); -PROVIDE(net_mgmt_del_event_callback = 0x1000fe09); -PROVIDE(putc_unlocked = 0x1002a967); -PROVIDE(shell_set_bypass = 0x10020901); -PROVIDE(net_ipv4_create_full = 0x10024c79); -PROVIDE(z_impl_device_is_ready = 0x100290b5); -PROVIDE(USB_DeviceEhciIsrFunction = 0x10028d5f); -PROVIDE(zvfs_get_fd_obj_and_vtable = 0x100032b1); -PROVIDE(CLOCK_GetFreq = 0x10018d1d); -PROVIDE(cbprintf_package_convert = 0x10002d8d); -PROVIDE(net_pkt_init = 0x1002489d); -PROVIDE(CLOCK_GetPllClkDivFreq = 0x10027a2b); -PROVIDE(setsockopt = 0x10021bb9); -PROVIDE(z_impl_flash_fill = 0x10007c8d); -PROVIDE(net_context_accept = 0x10023d65); -PROVIDE(z_impl_zsock_listen = 0x1000c0c5); +PROVIDE(z_shell_has_wildcard = 0x10021885); +PROVIDE(__aeabi_memmove4 = 0x1002a55f); +PROVIDE(z_impl_zsock_setsockopt = 0x1000c601); +PROVIDE(net_if_ipv4_maddr_lookup = 0x1000f2f9); +PROVIDE(net_mgmt_del_event_callback = 0x10010031); +PROVIDE(putc_unlocked = 0x1002ab8f); +PROVIDE(shell_set_bypass = 0x10020b29); +PROVIDE(net_ipv4_create_full = 0x10024ea1); +PROVIDE(z_impl_device_is_ready = 0x100292dd); +PROVIDE(USB_DeviceEhciIsrFunction = 0x10028f87); +PROVIDE(zvfs_get_fd_obj_and_vtable = 0x100034b1); +PROVIDE(CLOCK_GetFreq = 0x10018f45); +PROVIDE(cbprintf_package_convert = 0x10002f8d); +PROVIDE(net_pkt_init = 0x10024ac5); +PROVIDE(CLOCK_GetPllClkDivFreq = 0x10027c53); +PROVIDE(setsockopt = 0x10021de1); +PROVIDE(z_impl_flash_fill = 0x10007e8d); +PROVIDE(net_context_accept = 0x10023f8d); +PROVIDE(z_impl_zsock_listen = 0x1000c2c5); PROVIDE(clock_settime = 0x10001851); -PROVIDE(z_log_msg_finalize = 0x1001ff63); -PROVIDE(z_shell_write = 0x10020f83); -PROVIDE(fs_open = 0x1000a179); -PROVIDE(zsock_getpeername_ctx = 0x1000d61d); -PROVIDE(__kernel_cos = 0x10002129); -PROVIDE(z_shell_vt100_color_set = 0x10007435); -PROVIDE(memc_flexspi_wait_bus_idle = 0x10027237); -PROVIDE(net_tcp_get_supported_mss = 0x10025571); -PROVIDE(shell_prompt_change = 0x1002085f); -PROVIDE(z_impl_k_thread_stack_alloc = 0x1002a2f7); -PROVIDE(net_tcp_tx_sem_get = 0x10025acf); -PROVIDE(isalnum = 0x1002a37b); -PROVIDE(z_arm_bus_fault = 0x10008b05); -PROVIDE(dns_unpack_answer = 0x10025e37); -PROVIDE(net_pkt_alloc_buffer_raw = 0x1001069d); -PROVIDE(log_output_process = 0x10003b49); -PROVIDE(net_pkt_update_length = 0x10024659); -PROVIDE(memc_flexspi_transfer = 0x10017abd); -PROVIDE(k_work_queue_init = 0x1002991f); -PROVIDE(z_arm_fault_init = 0x10008ae5); -PROVIDE(net_buf_simple_max_len = 0x10021ccf); -PROVIDE(arch_elf_relocate = 0x10007e99); -PROVIDE(llext_link = 0x1000b791); -PROVIDE(z_impl_k_yield = 0x1001c071); -PROVIDE(z_impl_hwinfo_get_device_id = 0x10017521); +PROVIDE(z_log_msg_finalize = 0x1002018b); +PROVIDE(z_shell_write = 0x100211ab); +PROVIDE(fs_open = 0x1000a379); +PROVIDE(zsock_getpeername_ctx = 0x1000d81d); +PROVIDE(__kernel_cos = 0x10002329); +PROVIDE(z_shell_vt100_color_set = 0x10007635); +PROVIDE(memc_flexspi_wait_bus_idle = 0x1002745f); +PROVIDE(net_tcp_get_supported_mss = 0x10025799); +PROVIDE(shell_prompt_change = 0x10020a87); +PROVIDE(z_impl_k_thread_stack_alloc = 0x1002a51f); +PROVIDE(net_tcp_tx_sem_get = 0x10025cf7); +PROVIDE(isalnum = 0x1002a5a3); +PROVIDE(z_arm_bus_fault = 0x10008d05); +PROVIDE(dns_unpack_answer = 0x1002605f); +PROVIDE(net_pkt_alloc_buffer_raw = 0x100108c5); +PROVIDE(log_output_process = 0x10003d49); +PROVIDE(net_pkt_update_length = 0x10024881); +PROVIDE(memc_flexspi_transfer = 0x10017ce5); +PROVIDE(k_work_queue_init = 0x10029b47); +PROVIDE(z_arm_fault_init = 0x10008ce5); +PROVIDE(net_buf_simple_max_len = 0x10021ef7); +PROVIDE(arch_elf_relocate = 0x10008099); +PROVIDE(llext_link = 0x1000b991); +PROVIDE(z_impl_k_yield = 0x1001c299); +PROVIDE(z_impl_hwinfo_get_device_id = 0x10017749); PROVIDE(__unordsf2 = 0x100012b5); -PROVIDE(usb_dc_ep_read_wait = 0x10015501); -PROVIDE(nxp_lp_flexcomm_setirqhandler = 0x10027411); -PROVIDE(net_tcp_listen = 0x10025547); -PROVIDE(z_impl_flash_get_page_info_by_idx = 0x10026c05); -PROVIDE(__aeabi_memmove = 0x1002a337); -PROVIDE(z_shell_multiline_data_calc = 0x100209a1); -PROVIDE(net_if_post_init = 0x1000f741); -PROVIDE(flexspi_clock_set_freq = 0x1000351d); -PROVIDE(k_thread_foreach_unlocked = 0x1001c619); -PROVIDE(tolower = 0x1002a423); -PROVIDE(net_arp_input = 0x1002284d); -PROVIDE(z_impl_sys_csrand_get = 0x10021e11); -PROVIDE(__double_computePow5 = 0x1001e629); -PROVIDE(cdc_acm_class_handle_req = 0x10005205); -PROVIDE(FLEXSPI_UpdateDllValue = 0x1001a005); -PROVIDE(net_context_is_reuseport_set = 0x1002376b); -PROVIDE(SMARTDMA_InitWithoutFirmware = 0x1001a1dd); -PROVIDE(z_log_get_tag = 0x1001fedd); -PROVIDE(net_if_ipv4_maddr_add = 0x1000f069); -PROVIDE(net_buf_simple_add_be16 = 0x10021c9b); -PROVIDE(net_tcp_connect = 0x10012c31); -PROVIDE(net_if_ipv4_get_ll = 0x10022fbd); -PROVIDE(zsock_recvmsg_ctx = 0x1000d295); -PROVIDE(atof = 0x1002a43b); -PROVIDE(isupper = 0x1002a3fb); -PROVIDE(z_impl_zsock_ioctl_impl = 0x1000c349); -PROVIDE(USB_EhciPhyInit = 0x100288c3); -PROVIDE(z_shell_op_char_insert = 0x10007665); -PROVIDE(k_thread_state_str = 0x1001b931); -PROVIDE(net_pkt_read_be32 = 0x1002457d); -PROVIDE(z_impl_net_addr_pton = 0x1000f95d); -PROVIDE(net_context_listen = 0x10023919); -PROVIDE(sendto = 0x10021ba9); -PROVIDE(move_thread_to_end_of_prio_q = 0x1001bc51); -PROVIDE(k_mem_slab_free = 0x1002929d); +PROVIDE(usb_dc_ep_read_wait = 0x10015729); +PROVIDE(nxp_lp_flexcomm_setirqhandler = 0x10027639); +PROVIDE(net_tcp_listen = 0x1002576f); +PROVIDE(z_impl_flash_get_page_info_by_idx = 0x10026e2d); +PROVIDE(__aeabi_memmove = 0x1002a55f); +PROVIDE(z_shell_multiline_data_calc = 0x10020bc9); +PROVIDE(net_if_post_init = 0x1000f969); +PROVIDE(flexspi_clock_set_freq = 0x1000371d); +PROVIDE(k_thread_foreach_unlocked = 0x1001c841); +PROVIDE(tolower = 0x1002a64b); +PROVIDE(net_arp_input = 0x10022a75); +PROVIDE(z_impl_sys_csrand_get = 0x10022039); +PROVIDE(__double_computePow5 = 0x1001e851); +PROVIDE(cdc_acm_class_handle_req = 0x10005405); +PROVIDE(FLEXSPI_UpdateDllValue = 0x1001a22d); +PROVIDE(net_context_is_reuseport_set = 0x10023993); +PROVIDE(SMARTDMA_InitWithoutFirmware = 0x1001a405); +PROVIDE(z_log_get_tag = 0x10020105); +PROVIDE(net_if_ipv4_maddr_add = 0x1000f291); +PROVIDE(net_buf_simple_add_be16 = 0x10021ec3); +PROVIDE(net_tcp_connect = 0x10012e59); +PROVIDE(net_if_ipv4_get_ll = 0x100231e5); +PROVIDE(zsock_recvmsg_ctx = 0x1000d495); +PROVIDE(atof = 0x1002a663); +PROVIDE(isupper = 0x1002a623); +PROVIDE(z_impl_zsock_ioctl_impl = 0x1000c549); +PROVIDE(USB_EhciPhyInit = 0x10028aeb); +PROVIDE(z_shell_op_char_insert = 0x10007865); +PROVIDE(k_thread_state_str = 0x1001bb59); +PROVIDE(net_pkt_read_be32 = 0x100247a5); +PROVIDE(z_impl_net_addr_pton = 0x1000fb85); +PROVIDE(net_context_listen = 0x10023b41); +PROVIDE(sendto = 0x10021dd1); +PROVIDE(move_thread_to_end_of_prio_q = 0x1001be79); +PROVIDE(k_mem_slab_free = 0x100294c5); PROVIDE(__udivmoddi4 = 0x100014cf); PROVIDE(__aeabi_fmul = 0x10000f29); PROVIDE(__aeabi_fcmpge = 0x1000128d); -PROVIDE(z_impl_zsock_shutdown = 0x1000bfc1); -PROVIDE(__ceil_log2pow5 = 0x1001e5d9); -PROVIDE(net_if_foreach = 0x1000f435); -PROVIDE(getopt = 0x10008f69); -PROVIDE(z_handle_obj_poll_events = 0x1002a263); -PROVIDE(z_impl_k_thread_name_copy = 0x100299a5); -PROVIDE(__wrap_free = 0x10008ea9); -PROVIDE(z_shell_cmd_get = 0x10007279); +PROVIDE(z_impl_zsock_shutdown = 0x1000c1c1); +PROVIDE(__ceil_log2pow5 = 0x1001e801); +PROVIDE(net_if_foreach = 0x1000f65d); +PROVIDE(getopt = 0x10009169); +PROVIDE(z_handle_obj_poll_events = 0x1002a48b); +PROVIDE(z_impl_k_thread_name_copy = 0x10029bcd); +PROVIDE(__wrap_free = 0x100090a9); +PROVIDE(z_shell_cmd_get = 0x10007479); PROVIDE(__udivsi3 = 0x100002b1); -PROVIDE(toupper = 0x1002a42f); -PROVIDE(net_pkt_is_contiguous = 0x10024811); -PROVIDE(__rem_pio2 = 0x10001d41); -PROVIDE(shell_start = 0x100206f1); -PROVIDE(jesd216_bfp_read_support = 0x10026a49); -PROVIDE(llext_read_symbol = 0x10021f95); -PROVIDE(llext_copy_strings = 0x10021e5d); -PROVIDE(z_shell_find_cmd = 0x10020bbb); -PROVIDE(z_impl___posix_clock_get_base = 0x1000924d); -PROVIDE(z_shell_op_cond_next_line = 0x10020db1); +PROVIDE(toupper = 0x1002a657); +PROVIDE(net_pkt_is_contiguous = 0x10024a39); +PROVIDE(__rem_pio2 = 0x10001f41); +PROVIDE(shell_start = 0x10020919); +PROVIDE(jesd216_bfp_read_support = 0x10026c71); +PROVIDE(llext_read_symbol = 0x100221bd); +PROVIDE(llext_copy_strings = 0x10022085); +PROVIDE(z_shell_find_cmd = 0x10020de3); +PROVIDE(z_impl___posix_clock_get_base = 0x1000944d); +PROVIDE(z_shell_op_cond_next_line = 0x10020fd9); PROVIDE(CONFIG_ARCH_HAS_TIMING_FUNCTIONS = 0x00000001); -PROVIDE(z_shell_op_char_backspace = 0x10021127); +PROVIDE(z_shell_op_char_backspace = 0x1002134f); PROVIDE(__subdf3 = 0x1000030d); -PROVIDE(z_impl_zsock_fcntl_impl = 0x1000c2f9); -PROVIDE(atoi = 0x1002a441); -PROVIDE(dns_dispatcher_svc_handler = 0x10013bed); -PROVIDE(net_try_send_data = 0x10022b09); +PROVIDE(z_impl_zsock_fcntl_impl = 0x1000c4f9); +PROVIDE(atoi = 0x1002a669); +PROVIDE(dns_dispatcher_svc_handler = 0x10013e15); +PROVIDE(net_try_send_data = 0x10022d31); PROVIDE(__ledf2 = 0x10000aa9); -PROVIDE(k_work_cancel_delayable = 0x10029947); -PROVIDE(floorl = 0x1001f125); +PROVIDE(k_work_cancel_delayable = 0x10029b6f); +PROVIDE(floorl = 0x1001f34d); PROVIDE(__adddf3 = 0x10000311); -PROVIDE(accept = 0x10021b69); -PROVIDE(net_if_ipv4_maddr_leave = 0x100230ff); -PROVIDE(dns_dispatcher_init = 0x10013eb5); +PROVIDE(accept = 0x10021d91); +PROVIDE(net_if_ipv4_maddr_leave = 0x10023327); +PROVIDE(dns_dispatcher_init = 0x100140dd); PROVIDE(__divdf3 = 0x100008d1); PROVIDE(__aeabi_idiv = 0x100002d5); -PROVIDE(dns_resolve_init = 0x100142fd); -PROVIDE(memchr = 0x1002a301); -PROVIDE(zvfs_close = 0x100033b5); -PROVIDE(net_pkt_pull = 0x10024679); +PROVIDE(dns_resolve_init = 0x10014525); +PROVIDE(memchr = 0x1002a529); +PROVIDE(zvfs_close = 0x100035b5); +PROVIDE(net_pkt_pull = 0x100248a1); PROVIDE(__aeabi_dcmplt = 0x10000b61); -PROVIDE(net_ipv4_finalize = 0x10024d4d); -PROVIDE(z_impl_zsock_sendto = 0x1000c171); -PROVIDE(LPSPI_MasterSetDelayScaler = 0x100283b9); -PROVIDE(zvfs_poll_internal = 0x10009955); -PROVIDE(usb_dc_set_address = 0x10014e95); -PROVIDE(llext_bringup = 0x10021e51); -PROVIDE(zsock_close_ctx = 0x1000c925); -PROVIDE(z_thread_abort = 0x1001c1cd); -PROVIDE(k_free = 0x1002a2e1); -PROVIDE(__kernel_tan = 0x10002401); -PROVIDE(usb_transfer = 0x10004ec5); -PROVIDE(z_unpend1_no_timeout = 0x10029ae9); -PROVIDE(z_impl_k_usleep = 0x10029b9b); -PROVIDE(net_conn_input = 0x10010d31); +PROVIDE(net_ipv4_finalize = 0x10024f75); +PROVIDE(z_impl_zsock_sendto = 0x1000c371); +PROVIDE(LPSPI_MasterSetDelayScaler = 0x100285e1); +PROVIDE(zvfs_poll_internal = 0x10009b55); +PROVIDE(usb_dc_set_address = 0x100150bd); +PROVIDE(llext_bringup = 0x10022079); +PROVIDE(zsock_close_ctx = 0x1000cb25); +PROVIDE(z_thread_abort = 0x1001c3f5); +PROVIDE(k_free = 0x1002a509); +PROVIDE(__kernel_tan = 0x10002601); +PROVIDE(usb_transfer = 0x100050c5); +PROVIDE(z_unpend1_no_timeout = 0x10029d11); +PROVIDE(z_impl_k_usleep = 0x10029dc3); +PROVIDE(net_conn_input = 0x10010f59); PROVIDE(__aeabi_dcmpgt = 0x10000b9d); -PROVIDE(dns_copy_qname = 0x10025fd5); -PROVIDE(z_impl_k_stack_push = 0x10029749); -PROVIDE(k_work_reschedule = 0x1001b7dd); -PROVIDE(__log10Pow5 = 0x1001e5c1); -PROVIDE(LPSPI_MasterGetDefaultConfig = 0x100199d1); -PROVIDE(z_getopt_global_state_update = 0x10009061); -PROVIDE(arch_new_thread = 0x10008ca9); -PROVIDE(puts = 0x1001ce39); -PROVIDE(z_impl_zsock_recvfrom = 0x1000c235); -PROVIDE(z_add_timeout = 0x1001c725); -PROVIDE(z_impl_flash_get_page_info_by_offs = 0x10026bfd); -PROVIDE(z_impl_k_float_disable = 0x1002930d); -PROVIDE(z_impl_k_pipe_read = 0x1001c3b1); -PROVIDE(llext_free_inspection_data = 0x1000aaf9); -PROVIDE(k_work_schedule = 0x1001b775); -PROVIDE(net_tcp_get_option = 0x10025a81); -PROVIDE(z_impl_z_zsock_getaddrinfo_internal = 0x1000bcf9); -PROVIDE(__log10Pow2 = 0x1001e5b5); -PROVIDE(dns_resolve_name = 0x10026283); -PROVIDE(k_thread_system_pool_assign = 0x1001cc15); -PROVIDE(shell_fprintf_error = 0x10020843); -PROVIDE(ldexp = 0x1001f059); -PROVIDE(CLOCK_GetPll1OutFreq = 0x100189d9); -PROVIDE(isspace = 0x1002a3e7); -PROVIDE(z_impl_k_condvar_signal = 0x1001b7e9); -PROVIDE(net_if_call_link_cb = 0x1000f315); +PROVIDE(dns_copy_qname = 0x100261fd); +PROVIDE(z_impl_k_stack_push = 0x10029971); +PROVIDE(k_work_reschedule = 0x1001ba05); +PROVIDE(__log10Pow5 = 0x1001e7e9); +PROVIDE(LPSPI_MasterGetDefaultConfig = 0x10019bf9); +PROVIDE(z_getopt_global_state_update = 0x10009261); +PROVIDE(arch_new_thread = 0x10008ea9); +PROVIDE(puts = 0x1001d061); +PROVIDE(z_impl_zsock_recvfrom = 0x1000c435); +PROVIDE(z_add_timeout = 0x1001c94d); +PROVIDE(z_impl_flash_get_page_info_by_offs = 0x10026e25); +PROVIDE(z_impl_k_float_disable = 0x10029535); +PROVIDE(z_impl_k_pipe_read = 0x1001c5d9); +PROVIDE(llext_free_inspection_data = 0x1000acf9); +PROVIDE(k_work_schedule = 0x1001b99d); +PROVIDE(net_tcp_get_option = 0x10025ca9); +PROVIDE(z_impl_z_zsock_getaddrinfo_internal = 0x1000bef9); +PROVIDE(__log10Pow2 = 0x1001e7dd); +PROVIDE(dns_resolve_name = 0x100264ab); +PROVIDE(k_thread_system_pool_assign = 0x1001ce3d); +PROVIDE(shell_fprintf_error = 0x10020a6b); +PROVIDE(ldexp = 0x1001f281); +PROVIDE(CLOCK_GetPll1OutFreq = 0x10018c01); +PROVIDE(isspace = 0x1002a60f); +PROVIDE(z_impl_k_condvar_signal = 0x1001ba11); +PROVIDE(net_if_call_link_cb = 0x1000f53d); PROVIDE(__floatsidf = 0x100005a9); -PROVIDE(z_init_thread_base = 0x100299b7); -PROVIDE(net_if_ipv4_get_global_addr = 0x10022fc3); -PROVIDE(z_impl_k_msgq_peek = 0x100293bb); -PROVIDE(z_impl_flash_get_page_count = 0x10026c0f); -PROVIDE(z_impl_net_addr_ntop = 0x1000f769); -PROVIDE(__math_uflow = 0x1002a98f); -PROVIDE(shell_fprintf_normal = 0x1002080b); -PROVIDE(z_sched_wait = 0x1001c38d); +PROVIDE(z_init_thread_base = 0x10029bdf); +PROVIDE(net_if_ipv4_get_global_addr = 0x100231eb); +PROVIDE(z_impl_k_msgq_peek = 0x100295e3); +PROVIDE(z_impl_flash_get_page_count = 0x10026e37); +PROVIDE(z_impl_net_addr_ntop = 0x1000f991); +PROVIDE(__math_uflow = 0x1002abb7); +PROVIDE(shell_fprintf_normal = 0x10020a33); +PROVIDE(z_sched_wait = 0x1001c5b5); PROVIDE(__divsf3 = 0x10001091); -PROVIDE(z_reschedule_irqlock = 0x1001bf29); -PROVIDE(net_tcp_queue = 0x10025895); -PROVIDE(net_pkt_alloc = 0x1001067d); -PROVIDE(FLEXSPI_Init = 0x10019ebd); -PROVIDE(atol = 0x1002a449); -PROVIDE(z_impl_k_busy_wait = 0x10029097); -PROVIDE(llext_fs_read = 0x10022029); -PROVIDE(usb_get_dev_data_by_iface = 0x1002019b); -PROVIDE(net_context_update_recv_wnd = 0x10023ed7); -PROVIDE(__aeabi_read_tp = 0x1002a9a1); -PROVIDE(dns_resolve_cancel_with_name = 0x10014315); -PROVIDE(usb_dc_ep_set_stall = 0x100150bd); -PROVIDE(net_rx_priority2tc = 0x1001089d); -PROVIDE(__dtox_engine = 0x1002a82b); -PROVIDE(memc_flexspi_reset = 0x10027253); -PROVIDE(k_heap_alloc = 0x1002921d); -PROVIDE(z_impl_zephyr_fputc = 0x10008db5); -PROVIDE(gmtime_r = 0x1001ccc1); -PROVIDE(fs_tell = 0x1000a409); -PROVIDE(llext_teardown = 0x10021e57); -PROVIDE(putc = 0x1002a967); -PROVIDE(llext_fs_seek = 0x1002204d); -PROVIDE(sprintf = 0x1001ced1); -PROVIDE(z_device_get_all_static = 0x1001a971); -PROVIDE(sys_clock_tick_get_32 = 0x10029f61); -PROVIDE(z_impl_k_poll_signal_reset = 0x1002a2ab); -PROVIDE(z_impl_k_thread_resume = 0x1001beed); -PROVIDE(z_arm_nmi = 0x1002183b); -PROVIDE(k_work_init_delayable = 0x1002992b); -PROVIDE(net_tc_rx_init = 0x100108ad); -PROVIDE(net_if_ipv4_addr_mask_cmp = 0x10022f7f); -PROVIDE(net_pkt_get_reserve_data = 0x10024319); -PROVIDE(__log2pow5 = 0x1001e5cd); -PROVIDE(log_source_name_get = 0x10003769); -PROVIDE(ring_buf_area_finish = 0x1001fd85); -PROVIDE(memcpy = 0x1002a31d); +PROVIDE(z_reschedule_irqlock = 0x1001c151); +PROVIDE(net_tcp_queue = 0x10025abd); +PROVIDE(net_pkt_alloc = 0x100108a5); +PROVIDE(FLEXSPI_Init = 0x1001a0e5); +PROVIDE(atol = 0x1002a671); +PROVIDE(z_impl_k_busy_wait = 0x100292bf); +PROVIDE(llext_fs_read = 0x10022251); +PROVIDE(usb_get_dev_data_by_iface = 0x100203c3); +PROVIDE(net_context_update_recv_wnd = 0x100240ff); +PROVIDE(__aeabi_read_tp = 0x1002abc9); +PROVIDE(dns_resolve_cancel_with_name = 0x1001453d); +PROVIDE(usb_dc_ep_set_stall = 0x100152e5); +PROVIDE(net_rx_priority2tc = 0x10010ac5); +PROVIDE(atan2 = 0x10001d41); +PROVIDE(__dtox_engine = 0x1002aa53); +PROVIDE(memc_flexspi_reset = 0x1002747b); +PROVIDE(k_heap_alloc = 0x10029445); +PROVIDE(z_impl_zephyr_fputc = 0x10008fb5); +PROVIDE(gmtime_r = 0x1001cee9); +PROVIDE(fs_tell = 0x1000a609); +PROVIDE(llext_teardown = 0x1002207f); +PROVIDE(putc = 0x1002ab8f); +PROVIDE(llext_fs_seek = 0x10022275); +PROVIDE(sprintf = 0x1001d0f9); +PROVIDE(z_device_get_all_static = 0x1001ab99); +PROVIDE(sys_clock_tick_get_32 = 0x1002a189); +PROVIDE(z_impl_k_poll_signal_reset = 0x1002a4d3); +PROVIDE(z_impl_k_thread_resume = 0x1001c115); +PROVIDE(z_arm_nmi = 0x10021a63); +PROVIDE(k_work_init_delayable = 0x10029b53); +PROVIDE(net_tc_rx_init = 0x10010ad5); +PROVIDE(net_if_ipv4_addr_mask_cmp = 0x100231a7); +PROVIDE(net_pkt_get_reserve_data = 0x10024541); +PROVIDE(__log2pow5 = 0x1001e7f5); +PROVIDE(log_source_name_get = 0x10003969); +PROVIDE(ring_buf_area_finish = 0x1001ffad); +PROVIDE(memcpy = 0x1002a545); PROVIDE(__nedf2 = 0x10000ab1); -PROVIDE(z_shell_op_char_delete = 0x100210e9); -PROVIDE(net_if_ipv4_addr_lookup = 0x1000ef55); -PROVIDE(zsock_getsockname_ctx = 0x1000d685); -PROVIDE(z_shell_op_cursor_position_synchronize = 0x10020dcf); -PROVIDE(z_fatal_error = 0x1001aa5d); -PROVIDE(CLOCK_SetPll0MonitorMode = 0x10018831); -PROVIDE(llext_free_regions = 0x1000aab1); -PROVIDE(memc_flexspi_is_running_xip = 0x1002724d); -PROVIDE(z_impl_zsock_getpeername = 0x1000c469); -PROVIDE(z_shell_op_right_arrow = 0x10020f19); +PROVIDE(z_shell_op_char_delete = 0x10021311); +PROVIDE(net_if_ipv4_addr_lookup = 0x1000f17d); +PROVIDE(zsock_getsockname_ctx = 0x1000d885); +PROVIDE(z_shell_op_cursor_position_synchronize = 0x10020ff7); +PROVIDE(z_fatal_error = 0x1001ac85); +PROVIDE(CLOCK_SetPll0MonitorMode = 0x10018a59); +PROVIDE(llext_free_regions = 0x1000acb1); +PROVIDE(memc_flexspi_is_running_xip = 0x10027475); +PROVIDE(z_impl_zsock_getpeername = 0x1000c669); +PROVIDE(z_shell_op_right_arrow = 0x10021141); PROVIDE(__aeabi_fcmpgt = 0x100012a1); -PROVIDE(net_mgmt_event_notify_with_info = 0x1000fe35); +PROVIDE(net_mgmt_event_notify_with_info = 0x1001005d); PROVIDE(__aeabi_l2f = 0x10000ead); -PROVIDE(__pow5bits = 0x1001e5e9); -PROVIDE(sys_clock_cycle_get_64 = 0x10018585); +PROVIDE(__pow5bits = 0x1001e811); +PROVIDE(sys_clock_cycle_get_64 = 0x100187ad); PROVIDE(atanl = 0x10001a11); -PROVIDE(sys_timepoint_calc = 0x10029f6d); -PROVIDE(z_sched_wake_thread = 0x10029aa7); -PROVIDE(z_impl_k_pipe_write = 0x10029cbf); -PROVIDE(sys_clock_set_timeout = 0x10018425); -PROVIDE(strtod = 0x1001cf21); +PROVIDE(sys_timepoint_calc = 0x1002a195); +PROVIDE(z_sched_wake_thread = 0x10029ccf); +PROVIDE(z_impl_k_pipe_write = 0x10029ee7); +PROVIDE(sys_clock_set_timeout = 0x1001864d); +PROVIDE(strtod = 0x1001d149); PROVIDE(__aeabi_dadd = 0x10000311); PROVIDE(__aeabi_l2d = 0x10000621); PROVIDE(strlen = 0x10001491); -PROVIDE(net_buf_simple_pull = 0x10021caf); +PROVIDE(net_buf_simple_pull = 0x10021ed7); PROVIDE(CONFIG_SYS_HASH_FUNC32_DJB2 = 0x00000001); -PROVIDE(z_arm_pendsv = 0x10008b8d); -PROVIDE(EDMA_PrepareTransfer = 0x10027df7); -PROVIDE(CLOCK_SetPLL1Freq = 0x10018bd1); +PROVIDE(z_arm_pendsv = 0x10008d8d); +PROVIDE(EDMA_PrepareTransfer = 0x1002801f); +PROVIDE(CLOCK_SetPLL1Freq = 0x10018df9); PROVIDE(__fixunsdfdi = 0x10001431); -PROVIDE(z_impl_k_msgq_get = 0x1001b001); -PROVIDE(strtol = 0x1001d295); -PROVIDE(z_impl_zsock_gethostname = 0x1002226f); -PROVIDE(z_impl_k_thread_stack_free = 0x1002a2fb); -PROVIDE(net_tcp_init = 0x10012f8d); -PROVIDE(usb_cancel_transfer = 0x10005001); -PROVIDE(CLOCK_GetPLL0InClockRate = 0x100188a9); -PROVIDE(llext_loaded_sect_ptr = 0x10021eeb); -PROVIDE(net_pkt_skip = 0x1002453f); +PROVIDE(z_impl_k_msgq_get = 0x1001b229); +PROVIDE(strtol = 0x1001d4bd); +PROVIDE(z_impl_zsock_gethostname = 0x10022497); +PROVIDE(z_impl_k_thread_stack_free = 0x1002a523); +PROVIDE(net_tcp_init = 0x100131b5); +PROVIDE(usb_cancel_transfer = 0x10005201); +PROVIDE(CLOCK_GetPLL0InClockRate = 0x10018ad1); +PROVIDE(llext_loaded_sect_ptr = 0x10022113); +PROVIDE(net_pkt_skip = 0x10024767); PROVIDE(__truncdfsf2 = 0x10000c6d); -PROVIDE(SPC_SetActiveModeCoreLDORegulatorConfig = 0x100287ff); -PROVIDE(__stack_chk_fail = 0x10029ea5); +PROVIDE(SPC_SetActiveModeCoreLDORegulatorConfig = 0x10028a27); +PROVIDE(__stack_chk_fail = 0x1002a0cd); PROVIDE(__aeabi_f2uiz = 0x100012e1); PROVIDE(__aeabi_uidiv = 0x100002b1); -PROVIDE(net_if_down = 0x1000f4cd); -PROVIDE(z_impl_net_if_ipv4_set_gw_by_index = 0x100230d3); -PROVIDE(usb_dc_ep_read = 0x100262bb); -PROVIDE(k_queue_append = 0x1002966d); -PROVIDE(net_icmpv4_create = 0x1002494d); -PROVIDE(zsock_shutdown_ctx = 0x1000c981); -PROVIDE(zvfs_open = 0x10009185); -PROVIDE(getaddrinfo = 0x10021b65); -PROVIDE(net_icmp_call_ipv4_handlers = 0x100248c1); -PROVIDE(net_if_addr_unref = 0x1000f291); -PROVIDE(LPSPI_GetInstance = 0x10019995); -PROVIDE(strcasecmp = 0x1002a479); -PROVIDE(z_unpend_thread_no_timeout = 0x10029a85); -PROVIDE(z_impl_k_sem_reset = 0x1001b37d); -PROVIDE(z_impl_zsock_accept = 0x1000c119); +PROVIDE(net_if_down = 0x1000f6f5); +PROVIDE(z_impl_net_if_ipv4_set_gw_by_index = 0x100232fb); +PROVIDE(usb_dc_ep_read = 0x100264e3); +PROVIDE(k_queue_append = 0x10029895); +PROVIDE(net_icmpv4_create = 0x10024b75); +PROVIDE(zsock_shutdown_ctx = 0x1000cb81); +PROVIDE(zvfs_open = 0x10009385); +PROVIDE(getaddrinfo = 0x10021d8d); +PROVIDE(net_icmp_call_ipv4_handlers = 0x10024ae9); +PROVIDE(net_if_addr_unref = 0x1000f4b9); +PROVIDE(LPSPI_GetInstance = 0x10019bbd); +PROVIDE(strcasecmp = 0x1002a6a1); +PROVIDE(z_unpend_thread_no_timeout = 0x10029cad); +PROVIDE(z_impl_k_sem_reset = 0x1001b5a5); +PROVIDE(z_impl_zsock_accept = 0x1000c319); PROVIDE(__eqdf2 = 0x10000ab1); -PROVIDE(net_tc_submit_to_rx_queue = 0x10010885); +PROVIDE(net_tc_submit_to_rx_queue = 0x10010aad); PROVIDE(__fixdfsi = 0x10000bdd); -PROVIDE(k_queue_unique_append = 0x100296bf); -PROVIDE(z_dummy_thread_init = 0x1001bb1d); -PROVIDE(zvfs_eventfd = 0x10009849); -PROVIDE(net_dhcpv4_add_option_callback = 0x10013b2d); -PROVIDE(z_impl_k_timer_start = 0x1001c9dd); -PROVIDE(dns_dispatcher_register = 0x10013cdd); +PROVIDE(k_queue_unique_append = 0x100298e7); +PROVIDE(z_dummy_thread_init = 0x1001bd45); +PROVIDE(zvfs_eventfd = 0x10009a49); +PROVIDE(net_dhcpv4_add_option_callback = 0x10013d55); +PROVIDE(z_impl_k_timer_start = 0x1001cc05); +PROVIDE(net_if_lookup_by_dev = 0x1000ef91); +PROVIDE(dns_dispatcher_register = 0x10013f05); PROVIDE(__aeabi_ul2f = 0x10000e9d); -PROVIDE(LPUART_GetDefaultConfig = 0x1002842f); -PROVIDE(EDMA_ResetChannel = 0x10027dc3); -PROVIDE(net_udp_finalize = 0x10012fdd); +PROVIDE(LPUART_GetDefaultConfig = 0x10028657); +PROVIDE(EDMA_ResetChannel = 0x10027feb); +PROVIDE(net_udp_finalize = 0x10013205); PROVIDE(kheap_llext_heap = 0x30009c40); PROVIDE(kheap_llext_heap_size = 32768); PROVIDE(kheap__system_heap = 0x30025550); PROVIDE(kheap__system_heap_size = 32768); -PROVIDE(__device_dts_ord_115 = 0x000000001002ab2c); -PROVIDE(__device_dts_ord_188 = 0x000000001002ab50); -PROVIDE(__device_dts_ord_7 = 0x000000001002ab74); -PROVIDE(__device_dts_ord_14 = 0x000000001002ab98); -PROVIDE(__device_dts_ord_149 = 0x000000001002abbc); -PROVIDE(__device_dts_ord_21 = 0x000000001002abe0); -PROVIDE(__device_dts_ord_18 = 0x000000001002ac04); -PROVIDE(__device_dts_ord_15 = 0x000000001002ac28); -PROVIDE(__device_dts_ord_96 = 0x000000001002ac4c); -PROVIDE(__device_dts_ord_161 = 0x000000001002ac70); -PROVIDE(__device_dts_ord_98 = 0x000000001002ac94); -PROVIDE(__device_dts_ord_184 = 0x000000001002acb8); -PROVIDE(__device_dts_ord_10 = 0x000000001002acdc); -PROVIDE(__device_dts_ord_8 = 0x000000001002ad00); -PROVIDE(__device_dts_ord_25 = 0x000000001002ad24); -PROVIDE(__device_dts_ord_22 = 0x000000001002ad48); -PROVIDE(__device_dts_ord_133 = 0x000000001002ad6c); -PROVIDE(__device_dts_ord_180 = 0x000000001002ad90); -PROVIDE(__device_dts_ord_162 = 0x000000001002adb4); -PROVIDE(__device_dts_ord_185 = 0x000000001002add8); -PROVIDE(__device_dts_ord_11 = 0x000000001002adfc); -PROVIDE(__device_dts_ord_9 = 0x000000001002ae20); -PROVIDE(__device_dts_ord_189 = 0x000000001002ae44); -PROVIDE(__device_dts_ord_119 = 0x000000001002ae68); -PROVIDE(__device_dts_ord_181 = 0x000000001002ae8c); -PROVIDE(__device_dts_ord_19 = 0x000000001002aeb0); -PROVIDE(__device_dts_ord_16 = 0x000000001002aed4); -PROVIDE(__device_dts_ord_116 = 0x000000001002aef8); -PROVIDE(__device_dts_ord_117 = 0x000000001002af1c); -PROVIDE(__device_dts_ord_118 = 0x000000001002af40); +PROVIDE(__device_dts_ord_115 = 0x000000001002ad54); +PROVIDE(__device_dts_ord_188 = 0x000000001002ad78); +PROVIDE(__device_dts_ord_7 = 0x000000001002ad9c); +PROVIDE(__device_dts_ord_14 = 0x000000001002adc0); +PROVIDE(__device_dts_ord_149 = 0x000000001002ade4); +PROVIDE(__device_dts_ord_21 = 0x000000001002ae08); +PROVIDE(__device_dts_ord_18 = 0x000000001002ae2c); +PROVIDE(__device_dts_ord_15 = 0x000000001002ae50); +PROVIDE(__device_dts_ord_96 = 0x000000001002ae74); +PROVIDE(__device_dts_ord_161 = 0x000000001002ae98); +PROVIDE(__device_dts_ord_98 = 0x000000001002aebc); +PROVIDE(__device_dts_ord_184 = 0x000000001002aee0); +PROVIDE(__device_dts_ord_10 = 0x000000001002af04); +PROVIDE(__device_dts_ord_8 = 0x000000001002af28); +PROVIDE(__device_dts_ord_25 = 0x000000001002af4c); +PROVIDE(__device_dts_ord_22 = 0x000000001002af70); +PROVIDE(__device_dts_ord_133 = 0x000000001002af94); +PROVIDE(__device_dts_ord_180 = 0x000000001002afb8); +PROVIDE(__device_dts_ord_162 = 0x000000001002afdc); +PROVIDE(__device_dts_ord_185 = 0x000000001002b000); +PROVIDE(__device_dts_ord_11 = 0x000000001002b024); +PROVIDE(__device_dts_ord_9 = 0x000000001002b048); +PROVIDE(__device_dts_ord_189 = 0x000000001002b06c); +PROVIDE(__device_dts_ord_119 = 0x000000001002b090); +PROVIDE(__device_dts_ord_181 = 0x000000001002b0b4); +PROVIDE(__device_dts_ord_19 = 0x000000001002b0d8); +PROVIDE(__device_dts_ord_16 = 0x000000001002b0fc); +PROVIDE(__device_dts_ord_116 = 0x000000001002b120); +PROVIDE(__device_dts_ord_117 = 0x000000001002b144); +PROVIDE(__device_dts_ord_118 = 0x000000001002b168); PROVIDE(_sketch_start = 0xF0000 ); diff --git a/variants/frdm_rw612_rw612/cflags.txt b/variants/frdm_rw612_rw612/cflags.txt index 10a1e10f..02225f47 100644 --- a/variants/frdm_rw612_rw612/cflags.txt +++ b/variants/frdm_rw612_rw612/cflags.txt @@ -1,9 +1,44 @@ --D$ diff --git a/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h b/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h index 2ff5b9f7..e509c541 100644 --- a/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h +++ b/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/autoconf.h @@ -274,8 +274,6 @@ #define CONFIG_SWAP_NONATOMIC 1 #define CONFIG_TIMEOUT_64BIT 1 #define CONFIG_SYS_CLOCK_MAX_TIMEOUT_DAYS 365 -#define CONFIG_REQUIRES_STACK_CANARIES 1 -#define CONFIG_STACK_CANARIES 1 #define CONFIG_STACK_POINTER_RANDOM 0 #define CONFIG_TOOLCHAIN_SUPPORTS_THREAD_LOCAL_STORAGE 1 #define CONFIG_THREAD_LOCAL_STORAGE 1 @@ -386,7 +384,6 @@ #define CONFIG_HEAP_MEM_POOL_ADD_SIZE_NXP_WIFI 51200 #define CONFIG_WIFI_MGMT_SCAN_CHAN_MAX_MANUAL 50 #define CONFIG_NXP_RW610 1 -#define CONFIG_NXP_WIFI_SHELL 1 #define CONFIG_NXP_WIFI_MON_TASK_STACK_SIZE 3072 #define CONFIG_NXP_WIFI_WLCMGR_TASK_STACK_SIZE 5120 #define CONFIG_NXP_WIFI_POWERSAVE_TASK_STACK_SIZE 1024 @@ -624,8 +621,6 @@ #define CONFIG_TC_PROVIDES_POSIX_C_LANG_SUPPORT_R 1 #define CONFIG_LIBGCC_RTLIB 1 #define CONFIG_RING_BUFFER 1 -#define CONFIG_STACK_USAGE 1 -#define CONFIG_STACK_SENTINEL 1 #define CONFIG_PRINTK 1 #define CONFIG_EARLY_CONSOLE 1 #define CONFIG_ASSERT_LEVEL 2 diff --git a/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h b/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h index 44cae8c0..7a70c9eb 100644 --- a/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h +++ b/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/devicetree_generated.h @@ -2,7 +2,7 @@ * Generated by gen_defines.py * * DTS input file: - * /home/burellil/Work/ArduinoCore-zephyr/ArduinoCore-zephyr/build/frdm_rw612_rw612/zephyr/zephyr.dts.pre + * /home/kurte/github/ArduinoCore-zephyr/build/frdm_rw612_rw612/zephyr/zephyr.dts.pre * * Directories with bindings: * $ZEPHYR_BASE/dts/bindings diff --git a/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/version.h b/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/version.h index 9a30242a..76aa14d4 100644 --- a/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/version.h +++ b/variants/frdm_rw612_rw612/llext-edk/include/zephyr/include/generated/zephyr/version.h @@ -19,7 +19,7 @@ #define KERNEL_VERSION_EXTENDED_STRING "4.1.99+0" #define KERNEL_VERSION_TWEAK_STRING "4.1.99+0" -#define BUILD_VERSION v4.1.0-894-g9f06fc60e255 +#define BUILD_VERSION v4.1.0-898-g6b32f4d75066 #endif /* _KERNEL_VERSION_H_ */ diff --git a/variants/frdm_rw612_rw612/provides.ld b/variants/frdm_rw612_rw612/provides.ld index 4620d6fd..f345e9c8 100644 --- a/variants/frdm_rw612_rw612/provides.ld +++ b/variants/frdm_rw612_rw612/provides.ld @@ -22,4074 +22,3658 @@ PROVIDE(ethernet_send = 0x10041d6d); PROVIDE(ethernet_ip_recv = 0x1004196d); PROVIDE(flash_flexspi_nor_get_parameters = 0x100423f9); PROVIDE(flash_flexspi_nor_get_size = 0x10042401); -PROVIDE(flash_flexspi_nor_pages_layout = 0x10042b95); -PROVIDE(flash_flexspi_nor_wait_bus_busy = 0x10042d8d); -PROVIDE(flash_flexspi_nor_read = 0x10042cf9); -PROVIDE(flash_flexspi_nor_read_id_helper = 0x10042d49); -PROVIDE(flash_flexspi_nor_is25_clear_read_param.constprop.0 = 0x10042b21); -PROVIDE(flash_flexspi_nor_write = 0x10042de1); +PROVIDE(flash_flexspi_nor_pages_layout = 0x10042b75); +PROVIDE(flash_flexspi_nor_wait_bus_busy = 0x10042d6d); +PROVIDE(flash_flexspi_nor_read = 0x10042cd9); +PROVIDE(flash_flexspi_nor_read_id_helper = 0x10042d29); +PROVIDE(flash_flexspi_nor_is25_clear_read_param.constprop.0 = 0x10042b01); +PROVIDE(flash_flexspi_nor_write = 0x10042dc1); PROVIDE(flash_flexspi_nor_erase = 0x10042215); -PROVIDE(flash_flexspi_nor_quad_enable.constprop.0 = 0x10042ba9); +PROVIDE(flash_flexspi_nor_quad_enable.constprop.0 = 0x10042b89); PROVIDE(flash_flexspi_nor_init = 0x10042411); -PROVIDE(HAL_RpmsgGetTxBuf = 0x100442b9); -PROVIDE(HAL_ImuSendMsgBlockingCommon.constprop.0 = 0x10043e71); -PROVIDE(HAL_ImuSendSyncAck.isra.0 = 0x100440ed); -PROVIDE(HAL_RpmsgPutTxBuf.isra.0 = 0x10044565); -PROVIDE(HAL_ImuPutWlanTxBuf.isra.0 = 0x100435dd); -PROVIDE(HAL_ImuSendRpmsgFreeBuf = 0x10044085); -PROVIDE(HAL_ImuSendRpmsgEptQuiryRsp = 0x1004400d); -PROVIDE(HAL_ImuMainCpu23 = 0x10043579); -PROVIDE(HAL_ImuMainCpu13 = 0x10043511); -PROVIDE(__FUNCTION__.0 = 0x180a7bf8); -PROVIDE(reassembly_cancel = 0x100474fd); -PROVIDE(reassembly_timeout = 0x10047585); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100475b1); -PROVIDE(reassembly_cancel = 0x10048681); -PROVIDE(reassembly_timeout = 0x10048711); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1004873d); -PROVIDE(init_mem_slab_obj_core_list = 0x10048b05); -PROVIDE(memc_flexspi_init = 0x10048fc1); -PROVIDE(memc_flexspi_pm_action = 0x10049129); -PROVIDE(wlan_check_chan_width_ht40_by_region.isra.0 = 0x10049cb1); -PROVIDE(wlan_send_delba_to_entry_in_txbastream_tbl = 0x1004a2b5); -PROVIDE(wlan_11n_dispatch_pkt.constprop.0.isra.0 = 0x1004adbd); -PROVIDE(wlan_11n_dispatch_pkt_until_start_win = 0x1004ae51); -PROVIDE(wlan_flush_data = 0x1004b16d); -PROVIDE(wlan_11n_delete_rxreorder_tbl_entry = 0x1004aca5); -PROVIDE(wlan_11n_create_rxreorder_tbl = 0x1004ab69); -PROVIDE(gen_pkt_from_data_for_zerocopy = 0x1004cc41); -PROVIDE(net_clear_ipv6_ll_address = 0x1004d0d5); -PROVIDE(dhcp_timer_cb = 0x1004cc15); -PROVIDE(wifi_net_event_handler = 0x1004d91d); -PROVIDE(net_context_get_family.part.0 = 0x1004eb89); -PROVIDE(net_context_get_iface.part.0 = 0x1004ebbd); -PROVIDE(net_context_set_iface.part.0 = 0x1004f40d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1004f771); -PROVIDE(recheck_port.part.0 = 0x1004f735); -PROVIDE(check_used_port.constprop.0 = 0x1004db55); -PROVIDE(find_available_port = 0x1004e151); -PROVIDE(bind_default = 0x1004daad); -PROVIDE(context_sendto = 0x1004dcf1); -PROVIDE(net_init = 0x1004f791); -PROVIDE(net_stats_update_processing_error.part.0 = 0x1004f8dd); -PROVIDE(processing_data = 0x1004fc7d); -PROVIDE(iface_router_lookup = 0x10050539); -PROVIDE(iface_router_update_timer = 0x100506c9); -PROVIDE(iface_router_add = 0x10050235); -PROVIDE(dad_timeout = 0x1004ff19); -PROVIDE(need_calc_checksum = 0x10050969); -PROVIDE(net_if_lock.part.0 = 0x10053e79); -PROVIDE(net_if_unlock.part.0 = 0x100549ed); -PROVIDE(net_context_get_iface.part.0 = 0x100509d5); -PROVIDE(iface_router_find_default.constprop.0 = 0x100504b9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1005592d); -PROVIDE(join_mcast_allnodes.part.0 = 0x1005079d); -PROVIDE(iface_router_expired = 0x100503c1); -PROVIDE(iface_router_rm = 0x100505d1); -PROVIDE(join_mcast_nodes.part.0 = 0x10050865); -PROVIDE(ipv4_is_broadcast_address = 0x10050741); -PROVIDE(if_ipv4_get_addr = 0x100501c1); -PROVIDE(net_if_ipv4_get_best_match = 0x10051d25); -PROVIDE(get_ifaddr = 0x1005003d); -PROVIDE(net_if_ipv6_get_best_match = 0x10052d11); -PROVIDE(rs_timeout = 0x10054fd5); -PROVIDE(net_if_ipv4_set_netmask_deprecated = 0x100525d1); -PROVIDE(remove_prefix_addresses = 0x10054f55); -PROVIDE(prefix_lifetime_timeout = 0x10054d21); -PROVIDE(update_operational_state = 0x10055145); -PROVIDE(address_lifetime_timeout = 0x1004fd95); -PROVIDE(clone_pkt_attributes = 0x1005594d); -PROVIDE(pkt_cursor_jump = 0x10056d19); -PROVIDE(pkt_cursor_update = 0x10056d55); -PROVIDE(pkt_alloc = 0x10056b69); -PROVIDE(pkt_alloc_buffer.constprop.0 = 0x10056bc9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10056db1); -PROVIDE(net_pkt_cursor_operate = 0x1005628d); -PROVIDE(pkt_alloc_with_buffer = 0x10056c8d); -PROVIDE(net_pkt_clone_internal = 0x10055f41); -PROVIDE(net_tc_tx_stats_priority_setup = 0x10056fad); -PROVIDE(tc_tx_handler = 0x10056ff1); -PROVIDE(tc_rx_handler = 0x10056fc1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10057021); -PROVIDE(net_tc_rx_stats_priority_setup = 0x10056ead); -PROVIDE(timer_callback_work_handler = 0x1005731d); -PROVIDE(timer_callback = 0x100572f9); -PROVIDE(queue_insert = 0x10057661); -PROVIDE(unready_thread = 0x100580a1); -PROVIDE(add_to_waitq_locked = 0x10057b29); -PROVIDE(unpend_thread_no_timeout.part.0 = 0x1005807d); -PROVIDE(ready_thread = 0x10057f8d); -PROVIDE(z_tick_sleep = 0x100597bd); -PROVIDE(zvfs_fdtable_call_ioctl = 0x1005a5b9); -PROVIDE(tcp_cleanup_recv_queue = 0x1005b559); -PROVIDE(tcp_pkt_append = 0x1005d6a9); -PROVIDE(net_context_get_family.part.0 = 0x1005a65d); -PROVIDE(net_context_set_state.part.0 = 0x1005a6c5); -PROVIDE(net_stats_update_tcp_seg_recv.part.0 = 0x1005a6f9); -PROVIDE(tcp_send_timer_cancel.part.0 = 0x1005e309); -PROVIDE(net_context_get_iface.part.0 = 0x1005a691); -PROVIDE(is_destination_local = 0x1005a5d9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1005e7d1); -PROVIDE(th_get = 0x1005e671); -PROVIDE(tcp_data_len = 0x1005b8d1); -PROVIDE(tcp_send = 0x1005dd3d); -PROVIDE(tcp_send_process_no_lock = 0x1005e07d); -PROVIDE(tcp_endpoint_set = 0x1005b919); -PROVIDE(tcp_unsent_len = 0x1005e4f9); -PROVIDE(tcp_conn_release = 0x1005b639); -PROVIDE(tcp_conn_close.isra.0 = 0x1005b595); -PROVIDE(tcp_send_process = 0x1005e045); -PROVIDE(tcp_last_ack_timeout = 0x1005d3e1); -PROVIDE(tcp_timewait_timeout = 0x1005e4ed); -PROVIDE(tcp_fin_timeout = 0x1005b9e1); -PROVIDE(tcp_resend_data = 0x1005daf1); -PROVIDE(tcp_send_zwp = 0x1005e385); -PROVIDE(tcp_send_ack = 0x1005ddb5); -PROVIDE(tcp_recv = 0x1005d785); -PROVIDE(tcp_out_ext = 0x1005d499); -PROVIDE(tcp_send_data = 0x1005dde9); -PROVIDE(tcp_short_window = 0x1005e44d); -PROVIDE(tcp_update_recv_wnd = 0x1005e565); -PROVIDE(tcp_data_get = 0x1005b79d); -PROVIDE(tcp_send_queued_data.part.0 = 0x1005e1f5); -PROVIDE(tcp_new_reno_init = 0x1005d3ed); -PROVIDE(tcp_in = 0x1005b9ed); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1005fb5d); -PROVIDE(parse_ipv4 = 0x1005f5cd); -PROVIDE(wifi_utils_map_band_str_to_idx = 0x1804e969); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1005fb3d); -PROVIDE(imu_fw_is_hang = 0x1005fc21); -PROVIDE(wlan_wait_for_last_resp_rcvd = 0x10060a89); -PROVIDE(__FUNCTION__.1 = 0x180a83a4); -PROVIDE(wlan_get_fw_ver_ext.isra.0 = 0x10060889); -PROVIDE(wlan_decode_rx_packet.isra.0 = 0x10060735); -PROVIDE(__FUNCTION__.0 = 0x180a8390); -PROVIDE(wifi_drv_task = 0x1006136d); -PROVIDE(wifi_low_level_input = 0x10061d81); -PROVIDE(notify_wifi_driver_tx_event = 0x10060d95); -PROVIDE(wifi_core_deinit = 0x100611cd); -PROVIDE(wifi_powersave_task = 0x10061ee5); -PROVIDE(wifi_scan_task = 0x10062299); -PROVIDE(wifi_drv_tx_task = 0x100613cd); -PROVIDE(handle_flush = 0x10062969); -PROVIDE(work_queue_main = 0x10063b71); -PROVIDE(cancel_async_locked = 0x100628e1); -PROVIDE(submit_to_queue_locked = 0x100639dd); -PROVIDE(work_timeout = 0x10063d9d); -PROVIDE(work_flush_locked = 0x10063ac5); -PROVIDE(zperf_init = 0x10064061); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10063f31); -PROVIDE(zperf_session_reset.part.0 = 0x100644b9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1006444d); -PROVIDE(cmd_version = 0x1006486d); -PROVIDE(print_number = 0x10064ba5); -PROVIDE(cmd_connectap = 0x10064505); -PROVIDE(cmd_tcp = 0x100645b1); -PROVIDE(shell_cmd_download = 0x10064ced); -PROVIDE(parse_arg = 0x10064ae5); -PROVIDE(ping_handler = 0x10064b99); -PROVIDE(cmd_setip = 0x10064519); -PROVIDE(cmd_udp_download_stop = 0x10064829); -PROVIDE(cmd_tcp_download_stop = 0x100646c9); -PROVIDE(cmd_udp_download = 0x10064719); -PROVIDE(udp_session_cb = 0x100659ad); -PROVIDE(parse_number.constprop.0 = 0x10064b55); -PROVIDE(print_number_64.constprop.0 = 0x10064c15); -PROVIDE(tcp_session_cb = 0x10065761); -PROVIDE(shell_tcp_upload_print_stats = 0x10065415); -PROVIDE(shell_udp_upload_print_stats = 0x10065525); -PROVIDE(udp_upload_cb = 0x10065b21); -PROVIDE(execute_upload = 0x10064891); -PROVIDE(tcp_upload_cb = 0x10065879); -PROVIDE(shell_cmd_upload = 0x10064d75); -PROVIDE(cmd_udp_upload = 0x1006485d); -PROVIDE(cmd_tcp_upload = 0x100646fd); -PROVIDE(shell_cmd_upload2 = 0x10065121); -PROVIDE(cmd_udp_upload2 = 0x10064865); -PROVIDE(cmd_tcp_upload2 = 0x10064705); -PROVIDE(cmd_udp = 0x1006470d); -PROVIDE(cmd_tcp_download = 0x100645bd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10066039); -PROVIDE(tcp_bind_listen_connection = 0x10065b45); -PROVIDE(tcp_receiver_cleanup = 0x10065c01); -PROVIDE(tcp_svc_handler = 0x10065c6d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10066605); -PROVIDE(tcp_upload = 0x10066331); -PROVIDE(tcp_upload_async_work = 0x100664d9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10066b7d); -PROVIDE(zperf_receiver_send_stat.constprop.0 = 0x10066b9d); -PROVIDE(udp_receiver_cleanup = 0x100666ed); -PROVIDE(udp_svc_handler = 0x100667bd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10067099); -PROVIDE(udp_upload_async_work = 0x10067065); -PROVIDE(cmd_kernel_uptime = 0x1802a601); -PROVIDE(zvfs_eventfd_ioctl_op = 0x1803c059); -PROVIDE(zvfs_eventfd_close_op = 0x1803c221); -PROVIDE(zvfs_eventfd_rw_op = 0x1803c445); -PROVIDE(zvfs_eventfd_write_op = 0x1803c739); -PROVIDE(zvfs_eventfd_write_locked = 0x1803c751); -PROVIDE(zvfs_eventfd_read_op = 0x1803c745); -PROVIDE(zvfs_eventfd_read_locked = 0x1802a829); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803da75); -PROVIDE(llext_copy_region = 0x1802a891); -PROVIDE(inet_is_supported = 0x1803f89d); -PROVIDE(zsock_recv_stream_immediate = 0x1803f8a9); -PROVIDE(zsock_received_cb = 0x1803f9d5); -PROVIDE(ipv4_multicast_group = 0x1803fa59); -PROVIDE(ipv6_multicast_group = 0x1803fad5); -PROVIDE(zsock_socket_internal = 0x1803fb49); -PROVIDE(zsock_connected_cb = 0x1803fbe1); -PROVIDE(net_context_get_type.part.0 = 0x1803fbf5); -PROVIDE(net_context_get_state.part.0 = 0x1803fc29); -PROVIDE(zsock_flush_queue = 0x1803fc5d); -PROVIDE(net_context_get_family.part.0 = 0x1803fca9); -PROVIDE(zsock_accepted_cb = 0x1803fcdd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803fd29); -PROVIDE(sock_ioctl_vmeth = 0x1803fd4d); -PROVIDE(send_check_and_wait = 0x1803ff59); -PROVIDE(sock_bind_vmeth = 0x180400b1); -PROVIDE(sock_close2_vmeth = 0x18040169); -PROVIDE(sock_shutdown_vmeth = 0x180401dd); -PROVIDE(sock_connect_vmeth = 0x180402c1); -PROVIDE(sock_listen_vmeth = 0x18040309); -PROVIDE(sock_sendto_vmeth = 0x1804030d); -PROVIDE(sock_write_vmeth = 0x18040311); -PROVIDE(sock_sendmsg_vmeth = 0x180403ed); -PROVIDE(sock_accept_vmeth = 0x1804057d); -PROVIDE(zsock_recv_dgram = 0x18040581); -PROVIDE(zsock_recv_stream = 0x180408e1); -PROVIDE(sock_recvfrom_vmeth = 0x18040b39); -PROVIDE(sock_read_vmeth = 0x18040b3d); -PROVIDE(sock_recvmsg_vmeth = 0x18040bfd); -PROVIDE(sock_getsockopt_vmeth = 0x18040ed1); -PROVIDE(sock_setsockopt_vmeth = 0x1804137d); -PROVIDE(sock_getpeername_vmeth = 0x18041455); -PROVIDE(sock_getsockname_vmeth = 0x1804151d); -PROVIDE(cmd_net_tcp = 0x18047bf9); -PROVIDE(cmd_net_tcp_close = 0x18047bfd); -PROVIDE(cmd_net_tcp_recv = 0x18047c71); -PROVIDE(tcp_recv_cb = 0x18047ce1); -PROVIDE(cmd_net_tcp_send = 0x1802ab31); -PROVIDE(tcp_sent_cb = 0x18047da5); -PROVIDE(tcp_connected = 0x18047dc1); -PROVIDE(cmd_net_tcp_connect = 0x18047df1); -PROVIDE(arp_entry_cleanup = 0x18048df5); -PROVIDE(arp_request_timeout = 0x18048e29); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18048f05); -PROVIDE(arp_entry_get_last_from_table = 0x18048f29); -PROVIDE(arp_recv = 0x18049491); -PROVIDE(icmp_call_handlers = 0x1804f665); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1804f6dd); -PROVIDE(net_icmp_send_echo_request_timeout = 0x1804f701); -PROVIDE(net_stats_update_icmp_sent.part.0 = 0x1804fbcd); -PROVIDE(net_stats_update_icmp_drop.part.0 = 0x1804fbfd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1804fc2d); -PROVIDE(icmpv4_reply_to_options = 0x1804fc4d); -PROVIDE(icmpv4_handle_echo_request = 0x1804ffa5); -PROVIDE(net_stats_update_ipv4_igmp_drop.part.0 = 0x1805035d); -PROVIDE(igmp_v2_create_packet = 0x18050391); -PROVIDE(igmp_send = 0x18050445); -PROVIDE(igmp_send_generic = 0x1802b209); -PROVIDE(net_stats_update_icmp_sent.part.0 = 0x180505f5); -PROVIDE(net_stats_update_icmp_drop.part.0 = 0x18050625); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18050655); -PROVIDE(icmpv6_handle_echo_request = 0x18050675); -PROVIDE(ipv6_nd_restart_reachable_timer = 0x18050ba1); -PROVIDE(read_llao = 0x18050c91); -PROVIDE(ipv6_nbr_set_state = 0x18050cd5); -PROVIDE(nbr_init = 0x18050d41); -PROVIDE(net_stats_update_ipv6_nd_drop.part.0 = 0x18050dc9); -PROVIDE(net_stats_update_icmp_sent.part.0 = 0x18050df9); -PROVIDE(net_stats_update_ipv6_nd_sent.part.0 = 0x18050e29); -PROVIDE(net_stats_update_ipv6_nd_recv.part.0 = 0x18050e59); -PROVIDE(nbr_lookup.constprop.0 = 0x18050e89); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18050ed9); -PROVIDE(iface_cb = 0x18050efd); -PROVIDE(ipv6_ns_reply_timeout = 0x1802b631); -PROVIDE(add_nbr = 0x1805105d); -PROVIDE(handle_na_input = 0x18051181); -PROVIDE(handle_ra_input = 0x180517c1); -PROVIDE(handle_ns_input = 0x18051f59); -PROVIDE(ipv6_nd_reachable_timeout = 0x18052541); -PROVIDE(mld_create_packet = 0x180527b5); -PROVIDE(mld_create = 0x180528cd); -PROVIDE(net_stats_update_ipv6_mld_drop.part.0 = 0x1805293d); -PROVIDE(mld_send = 0x18052971); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18052a6d); -PROVIDE(handle_mld_query = 0x18052a91); -PROVIDE(dhcpv4_start_internal = 0x180539cd); -PROVIDE(dhcpv4_add_option_length_value = 0x18053add); -PROVIDE(dhcpv4_iface_event_handler = 0x18053b29); -PROVIDE(net_dhcpv4_state_name.part.0 = 0x18053c0d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18053c35); -PROVIDE(dhcpv4_option_callback_get_unique_types = 0x18053c55); -PROVIDE(dhcpv4_create_message = 0x1802bed9); -PROVIDE(dhcpv4_update_message_timeout = 0x18053ce9); -PROVIDE(dhcpv4_send_discover = 0x18053d91); -PROVIDE(dhcpv4_send_request = 0x18053e21); -PROVIDE(dhcpv4_timeout = 0x18054059); -PROVIDE(dhcpv4_enter_bound = 0x18054315); -PROVIDE(net_dhcpv4_input = 0x180543e9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18056761); -PROVIDE(mcux_flexcomm_transfer = 0x1802c291); -PROVIDE(mcux_flexcomm_master_transfer_callback = 0x180594d5); -PROVIDE(mcux_flexcomm_configure = 0x180594e1); -PROVIDE(mcux_flexcomm_config_func_0 = 0x18059545); -PROVIDE(mcux_flexcomm_isr = 0x1805955d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18059569); -PROVIDE(mcux_flexcomm_init = 0x18059589); -PROVIDE(spi_mcux_config_func_0 = 0x18059e05); -PROVIDE(spi_mcux_isr = 0x18059e1d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18059e29); -PROVIDE(spi_mcux_transfer_next_packet.isra.0 = 0x18059e49); -PROVIDE(spi_mcux_transfer_callback = 0x18059f4d); -PROVIDE(spi_mcux_release = 0x1805a051); -PROVIDE(spi_mcux_transceive = 0x1802c369); -PROVIDE(spi_mcux_init = 0x1805a0c9); -PROVIDE(wrapper_moal_init_lock = 0x18067775); -PROVIDE(wrapper_moal_semaphore_put = 0x18067779); -PROVIDE(wrapper_moal_semaphore_get = 0x1806778d); -PROVIDE(wrapper_moal_free_semaphore = 0x180677a1); -PROVIDE(wrapper_moal_init_semaphore = 0x180677b5); -PROVIDE(wrapper_moal_recv_packet = 0x180677d5); -PROVIDE(wifi_send_tx_rate_cfg_ioctl = 0x1806780d); -PROVIDE(wrapper_moal_stop_timer = 0x180678c9); -PROVIDE(wrapper_moal_reset_timer = 0x180678f1); -PROVIDE(wrapper_moal_start_timer = 0x18067919); -PROVIDE(wrapper_moal_free_timer = 0x18067975); -PROVIDE(wrapper_moal_init_timer = 0x1806799d); -PROVIDE(wrapper_moal_spin_lock = 0x180679d5); -PROVIDE(wrapper_moal_spin_unlock = 0x180679d9); -PROVIDE(wrapper_moal_free_lock = 0x180679dd); -PROVIDE(wait_for = 0x18089bfd); -PROVIDE(remove_timeout = 0x1808a511); -PROVIDE(mulShift64 = 0x1808e0d9); -PROVIDE(loader = 0x1802e761); -PROVIDE(chunk_set.part.0 = 0x1802e999); -PROVIDE(chunk_mem.part.0 = 0x1802e9c9); -PROVIDE(merge_chunks = 0x1802e9f9); -PROVIDE(split_chunks = 0x1802eaad); -PROVIDE(free_list_remove_bidx = 0x1802ebdd); -PROVIDE(free_list_remove = 0x1802ed49); -PROVIDE(alloc_chunk = 0x1802ed79); -PROVIDE(free_list_add = 0x1802eea1); -PROVIDE(free_chunk = 0x1802f03d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1802f8e5); -PROVIDE(char_out = 0x180303d9); -PROVIDE(stdinout_read_vmeth = 0x180304a5); -PROVIDE(stdinout_ioctl_vmeth = 0x180304a9); -PROVIDE(zvfs_fdtable_call_ioctl = 0x180304c5); -PROVIDE(stdinout_write_vmeth = 0x180304e5); -PROVIDE(set_region = 0x18030b75); -PROVIDE(match_region = 0x18030c5d); -PROVIDE(dummy_timestamp = 0x180312f1); -PROVIDE(default_get_timestamp = 0x180312f5); -PROVIDE(z_log_init.isra.0 = 0x180312f9); -PROVIDE(enable_logger = 0x18031469); -PROVIDE(z_cbprintf_cpy = 0x18031981); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18031b0d); -PROVIDE(out_func = 0x18031d19); -PROVIDE(cr_out_func = 0x18031d3d); -PROVIDE(print_formatted = 0x18031d7d); -PROVIDE(pm_state_notify.part.0 = 0x1803222d); -PROVIDE(custom_handler = 0x18032a41); -PROVIDE(class_handler = 0x18032ad5); -PROVIDE(vendor_handler = 0x18032b4d); -PROVIDE(is_ep_valid = 0x18032bb5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18032c31); -PROVIDE(get_ep_bm_from_addr = 0x18032c51); -PROVIDE(disable_endpoint = 0x18032c9d); -PROVIDE(usb_halt_endpoint_req.isra.0 = 0x18032d1d); -PROVIDE(set_endpoint = 0x18032dd1); -PROVIDE(usb_handle_standard_request = 0x18032efd); -PROVIDE(forward_status_cb = 0x180331f9); -PROVIDE(usb_data_to_host = 0x18033401); -PROVIDE(usb_handle_control_transfer = 0x18033461); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x180337b9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18033c8d); -PROVIDE(usb_transfer_work = 0x18033cad); -PROVIDE(cdc_interface_config = 0x180340f1); -PROVIDE(cdc_acm_irq_callback_work_handler = 0x18034105); -PROVIDE(cdc_acm_irq_tx_disable = 0x18034111); -PROVIDE(cdc_acm_irq_tx_ready = 0x1803411d); -PROVIDE(cdc_acm_irq_rx_disable = 0x18034141); -PROVIDE(cdc_acm_irq_rx_ready = 0x1803414d); -PROVIDE(cdc_acm_irq_update = 0x1803415d); -PROVIDE(cdc_acm_irq_callback_set = 0x1803418d); -PROVIDE(cdc_acm_line_ctrl_get = 0x18034195); -PROVIDE(cdc_acm_configure = 0x180341cd); -PROVIDE(cdc_acm_config_get = 0x180341e5); -PROVIDE(cdc_acm_irq_rx_enable = 0x18034255); -PROVIDE(cdc_acm_irq_tx_enable = 0x18034275); -PROVIDE(cdc_acm_fifo_fill = 0x18034295); -PROVIDE(cdc_acm_write_cb = 0x180342d5); -PROVIDE(cdc_acm_init = 0x1803434d); -PROVIDE(tx_work_handler = 0x18034551); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18034391); -PROVIDE(cdc_acm_read_cb = 0x180343b1); -PROVIDE(cdc_acm_int_in = 0x18034461); -PROVIDE(cdc_acm_poll_out = 0x180345d5); -PROVIDE(cdc_acm_send_notification.isra.0 = 0x18034671); -PROVIDE(cdc_acm_line_ctrl_set = 0x180346b5); -PROVIDE(cdc_acm_irq_is_pending = 0x180347a5); -PROVIDE(cdc_acm_fifo_read = 0x180347dd); -PROVIDE(cdc_acm_poll_in = 0x1803483d); -PROVIDE(cdc_acm_dev_status_cb = 0x180348a5); -PROVIDE(z_usb_work_q_init = 0x18034a85); -PROVIDE(cmd_kernel_cycles = 0x18034ab9); -PROVIDE(cmd_kernel_sleep = 0x18034ad5); -PROVIDE(cmd_kernel_version = 0x18034b1d); -PROVIDE(cmd_kernel_heap = 0x18034b35); -PROVIDE(cmd_kernel_log_level_set = 0x18034b91); -PROVIDE(thread_valid_cb = 0x18034c21); -PROVIDE(cmd_kernel_thread_list = 0x18034c51); -PROVIDE(shell_tdata_dump = 0x18034c85); -PROVIDE(cmd_kernel_thread_stacks = 0x18034d69); -PROVIDE(shell_stack_dump = 0x18034e21); -PROVIDE(cmd_kernel_thread_suspend = 0x18034e85); -PROVIDE(cmd_kernel_thread_resume = 0x18034ee9); -PROVIDE(cmd_kernel_thread_kill = 0x18034f4d); -PROVIDE(cmd_device_list = 0x18034fb1); -PROVIDE(get_h_m_s = 0x180350cd); -PROVIDE(cmd_date_set = 0x18035179); -PROVIDE(cmd_date_get = 0x180352b5); -PROVIDE(cmd_devmem = 0x180352f9); -PROVIDE(cmd_dump = 0x180353cd); -PROVIDE(cmd_load = 0x18035569); -PROVIDE(bypass_cb = 0x18035679); -PROVIDE(read_uart = 0x180357d9); -PROVIDE(write_uart = 0x180357ed); -PROVIDE(enable_shell_uart = 0x1803585d); -PROVIDE(log_msg_generic_get_wlen = 0x18035895); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x180358b5); -PROVIDE(init = 0x180358d9); -PROVIDE(uart_callback = 0x1803592d); -PROVIDE(uninit = 0x18035aa5); -PROVIDE(enable = 0x18035ac9); -PROVIDE(transport_evt_handler = 0x18035aed); -PROVIDE(z_shell_raw_fprintf = 0x18035b05); -PROVIDE(history_handle = 0x18035b21); -PROVIDE(tab_handle = 0x18035bed); -PROVIDE(execute = 0x18035ffd); -PROVIDE(cmd_help = 0x18036f59); -PROVIDE(out_func = 0x18037419); -PROVIDE(z_shell_raw_fprintf = 0x18037abd); -PROVIDE(z_shell_write.part.0 = 0x18037ad9); -PROVIDE(reprint_from_cursor = 0x180383b9); -PROVIDE(panic = 0x18038751); -PROVIDE(dropped = 0x18038755); -PROVIDE(process_log_msg.constprop.0 = 0x1803877d); -PROVIDE(process = 0x18038805); -PROVIDE(z_shell_raw_fprintf = 0x180388c1); -PROVIDE(formatted_text_print.constprop.0 = 0x180388dd); -PROVIDE(cmd_comment = 0x18038b35); -PROVIDE(cmd_shell_stats_reset = 0x18038b39); -PROVIDE(z_shell_raw_fprintf = 0x18038b45); -PROVIDE(cmd_resize_default = 0x18038b61); -PROVIDE(cmd_shell_stats_show = 0x18038b8d); -PROVIDE(cmd_prompt_on = 0x18038ba1); -PROVIDE(cmd_prompt_off = 0x18038bad); -PROVIDE(cmd_history = 0x18038bbd); -PROVIDE(cmd_get_retval = 0x18038c01); -PROVIDE(cmd_echo = 0x18038c1d); -PROVIDE(cmd_backends = 0x18038c6d); -PROVIDE(cmd_resize = 0x18038ce9); -PROVIDE(cmd_clear = 0x18038ea9); -PROVIDE(cmd_bacskpace_mode_delete = 0x18038ee9); -PROVIDE(cmd_echo_off = 0x18038f05); -PROVIDE(cmd_vt100_on = 0x18038f21); -PROVIDE(cmd_colors_on = 0x18038f3d); -PROVIDE(cmd_echo_on = 0x18038f59); -PROVIDE(cmd_bacskpace_mode_backspace = 0x18038f75); -PROVIDE(cmd_colors_off = 0x18038f91); -PROVIDE(cmd_vt100_off = 0x18038fad); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x180394fd); -PROVIDE(esf_dump = 0x1803951d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18039769); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18039b69); -PROVIDE(mem_manage_fault.constprop.0 = 0x18039b89); -PROVIDE(bus_fault.constprop.0 = 0x18039d6d); -PROVIDE(usage_fault.constprop.0 = 0x18039f41); -PROVIDE(secure_fault.constprop.0 = 0x1803a0c1); -PROVIDE(cbputc = 0x1803a9c9); -PROVIDE(picolibc_put = 0x1803aa19); -PROVIDE(malloc_prepare = 0x1803aa6d); -PROVIDE(malloc_lock.part.0 = 0x1803aa91); -PROVIDE(pthread_barrier_pool_init = 0x1803abc9); -PROVIDE(fnmatchx = 0x1803ac25); -PROVIDE(fs_close_vmeth = 0x1803b30d); -PROVIDE(fs_ioctl_vmeth = 0x1803b321); -PROVIDE(fs_write_vmeth = 0x1803b38d); -PROVIDE(fs_read_vmeth = 0x1803b3b1); -PROVIDE(pthread_cond_pool_init = 0x1803b6b1); -PROVIDE(pthread_mutex_pool_init = 0x1803b6ed); -PROVIDE(posix_thread_pool_init = 0x1803b72d); -PROVIDE(permute_args = 0x1803b76d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803b7ed); -PROVIDE(parse_long_options = 0x1803b80d); -PROVIDE(getopt_internal = 0x1803bab9); -PROVIDE(net_buf_simple_pull.part.0 = 0x1803be6d); -PROVIDE(zvfs_fdtable_call_ioctl = 0x1803c939); -PROVIDE(fs_get_mnt_point = 0x1803cec5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803cf61); -PROVIDE(xoshiro128_initialize = 0x1803d3e9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803d5ad); -PROVIDE(call_fn_table = 0x1803d5cd); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803db45); -PROVIDE(llext_find_extension_sym_iterate = 0x1803ea35); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803ea51); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803ed95); -PROVIDE(llext_shell_name_cb = 0x1803ef4d); -PROVIDE(llext_name_get = 0x1803ef65); -PROVIDE(cmd_llext_list_symbols = 0x1803ef99); -PROVIDE(cmd_llext_list = 0x1803f00d); -PROVIDE(llext_shell_list_cb = 0x1803f031); -PROVIDE(cmd_llext_load_hex = 0x1803f04d); -PROVIDE(cmd_llext_load_fs = 0x1803f149); -PROVIDE(cmd_llext_call_fn = 0x1803f231); -PROVIDE(cmd_llext_unload = 0x1803f25d); -PROVIDE(llext_name_arg_get = 0x1803f29d); -PROVIDE(dns_resolve_cb = 0x1803f359); -PROVIDE(exec_query = 0x1803f3f9); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18041521); -PROVIDE(socket_service_thread = 0x18041541); -PROVIDE(spair_bind = 0x18041a01); -PROVIDE(spair_listen = 0x18041a1d); -PROVIDE(spair_accept = 0x18041a39); -PROVIDE(spair_getsockopt = 0x18041a55); -PROVIDE(spair_setsockopt = 0x18041a71); -PROVIDE(spair_delete = 0x18041a8d); -PROVIDE(spair_close = 0x18041b61); -PROVIDE(spair_connect = 0x18041bb1); -PROVIDE(spair_write = 0x18041bcd); -PROVIDE(spair_sendmsg = 0x18041e59); -PROVIDE(spair_sendto = 0x18041f4d); -PROVIDE(spair_read = 0x18041f51); -PROVIDE(spair_recvfrom = 0x18042195); -PROVIDE(spair_ioctl = 0x180421a9); -PROVIDE(cmd_net_allocs = 0x180428e1); -PROVIDE(arp_cb = 0x1804290d); -PROVIDE(cmd_net_arp_flush = 0x180429c5); -PROVIDE(cmd_net_arp = 0x180429ed); -PROVIDE(cmd_net_capture = 0x18042a2d); -PROVIDE(cmd_net_capture_disable = 0x18042a59); -PROVIDE(cmd_net_capture_setup = 0x18042a85); -PROVIDE(cmd_net_capture_cleanup = 0x18042ab1); -PROVIDE(cmd_net_capture_enable = 0x18042add); -PROVIDE(cmd_net_conn = 0x18042b09); -PROVIDE(context_cb = 0x18042cbd); -PROVIDE(tcp_cb = 0x18042be9); -PROVIDE(net_context_get_iface.part.0 = 0x18042c89); -PROVIDE(cmd_net_dhcpv4_client_stop = 0x18042e35); -PROVIDE(cmd_net_dhcpv4_client_start = 0x18042e95); -PROVIDE(cmd_net_dhcpv4_server_status = 0x18042ef5); -PROVIDE(dhcpv4_lease_cb = 0x18042f89); -PROVIDE(cmd_net_dhcpv4_server_stop = 0x180430d9); -PROVIDE(cmd_net_dhcpv4_server_start = 0x18043175); -PROVIDE(cmd_net_dhcpv6_client_start = 0x18043265); -PROVIDE(cmd_net_dhcpv6_client_stop = 0x18043291); -PROVIDE(dns_result_cb = 0x180432bd); -PROVIDE(cmd_net_dns_cancel = 0x18043435); -PROVIDE(cmd_net_dns_query = 0x180434a5); -PROVIDE(cmd_net_dns = 0x18043609); -PROVIDE(cmd_net_events_on = 0x18043885); -PROVIDE(cmd_net_events = 0x180438a1); -PROVIDE(cmd_net_events_off = 0x180438bd); -PROVIDE(cmd_net_gptp_port = 0x180438d9); -PROVIDE(cmd_net_gptp = 0x18043905); -PROVIDE(cmd_net_http = 0x18043931); -PROVIDE(iface_index_get = 0x1804395d); -PROVIDE(cmd_net_iface = 0x18043a25); -PROVIDE(iface_cb = 0x18043ee5); -PROVIDE(cmd_net_set_mac = 0x18043a99); -PROVIDE(cmd_net_iface_down = 0x18043c45); -PROVIDE(iface_flags2str = 0x18043cc1); -PROVIDE(cmd_net_iface_up = 0x18043e2d); -PROVIDE(cmd_net_cm_status = 0x18044b6d); -PROVIDE(cmd_net_cm_down = 0x18044b89); -PROVIDE(cmd_net_cm_up = 0x18044ba5); -PROVIDE(cmd_net_cm_flag = 0x18044bc1); -PROVIDE(cmd_net_cm_watch = 0x18044bdd); -PROVIDE(cmd_net_cm_connect = 0x18044bf9); -PROVIDE(cmd_net_cm_ignore = 0x18044c15); -PROVIDE(cmd_net_cm_disconnect = 0x18044c31); -PROVIDE(cmd_net_cm_timeout = 0x18044c4d); -PROVIDE(cmd_net_ipv4 = 0x18044c69); -PROVIDE(ip_address_lifetime_cb = 0x18044d2d); -PROVIDE(cmd_net_ip_gateway = 0x18044e71); -PROVIDE(cmd_net_ip_add = 0x18044f01); -PROVIDE(cmd_net_ip_del = 0x1804509d); -PROVIDE(cmd_net_ip6_pe = 0x180451b9); -PROVIDE(cmd_net_ipv6 = 0x180451e9); -PROVIDE(address_lifetime_cb = 0x18045361); -PROVIDE(cmd_net_ip6_del = 0x180455ad); -PROVIDE(cmd_net_ip6_add = 0x1804570d); -PROVIDE(cmd_net_mem = 0x18045ac1); -PROVIDE(nbr_address_get = 0x18045bad); -PROVIDE(nbr_address_cb = 0x18045c09); -PROVIDE(nbr_cb = 0x18045c45); -PROVIDE(cmd_net_nbr_rm = 0x18045e3d); -PROVIDE(cmd_net_nbr = 0x18045f09); -PROVIDE(handle_ipv6_echo_reply = 0x18045f49); -PROVIDE(parse_arg = 0x180460c9); -PROVIDE(cmd_net_ping = 0x18046119); -PROVIDE(ping_work = 0x18046451); -PROVIDE(ping_bypass = 0x18046419); -PROVIDE(handle_ipv4_echo_reply = 0x18046539); -PROVIDE(cmd_net_pkt = 0x180466b9); -PROVIDE(cmd_net_pmtu = 0x18046909); -PROVIDE(cmd_net_pmtu_flush = 0x18046935); -PROVIDE(cmd_net_ppp_status = 0x18046961); -PROVIDE(cmd_net_ppp_ping = 0x1804698d); -PROVIDE(cmd_net_resume = 0x180469b9); -PROVIDE(cmd_net_route = 0x180469d5); -PROVIDE(iface_per_route_cb = 0x180469f1); -PROVIDE(route_cb = 0x18046a65); -PROVIDE(cmd_net_ip6_route_del = 0x18046c45); -PROVIDE(cmd_net_ip6_route_add = 0x18046d05); -PROVIDE(cmd_net_sockets = 0x18046e19); -PROVIDE(walk_socket_services = 0x18046f19); -PROVIDE(net_shell_print_statistics = 0x18047009); -PROVIDE(iface_index_get = 0x18047ad1); -PROVIDE(cmd_net_stats = 0x18047b99); -PROVIDE(cmd_net_suspend = 0x18047bdd); -PROVIDE(cmd_net_udp = 0x180480f5); -PROVIDE(udp_sent = 0x180480f9); -PROVIDE(udp_rcvd = 0x1804812d); -PROVIDE(cmd_net_udp_close = 0x180481d1); -PROVIDE(cmd_net_udp_send = 0x1804822d); -PROVIDE(cmd_net_udp_bind = 0x180484a1); -PROVIDE(cmd_virtual_show = 0x180486a5); -PROVIDE(cmd_virtual_detach = 0x180486d1); -PROVIDE(cmd_virtual_attach = 0x180486fd); -PROVIDE(cmd_net_vlan = 0x18048729); -PROVIDE(cmd_net_vlan_del = 0x18048755); -PROVIDE(cmd_net_vlan_add = 0x18048781); -PROVIDE(cmd_net_websocket = 0x180487ad); -PROVIDE(ethernet_set_config = 0x180487d9); -PROVIDE(ethernet_get_config = 0x18048b85); -PROVIDE(eth_stats_get = 0x180496c9); -PROVIDE(get_wifi_api = 0x18049725); -PROVIDE(scan_result_cb = 0x1804974d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18049781); -PROVIDE(wifi_connect = 0x18049921); -PROVIDE(wifi_scan = 0x180499c9); -PROVIDE(wifi_disconnect = 0x18049a19); -PROVIDE(wifi_ap_enable = 0x18049a9d); -PROVIDE(wifi_ap_disable = 0x18049ae5); -PROVIDE(wifi_ap_sta_disconnect = 0x18049b29); -PROVIDE(wifi_ap_config_params = 0x18049b91); -PROVIDE(wifi_ap_set_rts_threshold = 0x18049c31); -PROVIDE(wifi_iface_status = 0x18049c8d); -PROVIDE(wifi_iface_stats = 0x18049cc9); -PROVIDE(wifi_iface_stats_reset = 0x18049d05); -PROVIDE(wifi_11k_cfg = 0x18049d2d); -PROVIDE(wifi_11k_neighbor_request = 0x18049d75); -PROVIDE(wifi_set_power_save = 0x18049dbd); -PROVIDE(wifi_get_power_save_config = 0x18049ea5); -PROVIDE(wifi_set_twt = 0x18049f01); -PROVIDE(wifi_set_btwt = 0x18049ff9); -PROVIDE(wifi_reg_domain = 0x1804a0a9); -PROVIDE(wifi_mode = 0x1804a105); -PROVIDE(wifi_packet_filter = 0x1804a155); -PROVIDE(wifi_channel = 0x1804a1a5); -PROVIDE(wifi_get_version = 0x1804a1f5); -PROVIDE(wifi_btm_query = 0x1804a221); -PROVIDE(wifi_wps_config = 0x1804a275); -PROVIDE(wifi_set_rts_threshold = 0x1804a2bd); -PROVIDE(wifi_pmksa_flush = 0x1804a2c1); -PROVIDE(wifi_get_rts_threshold = 0x1804a305); -PROVIDE(wifi_freq_to_channel = 0x1804a389); -PROVIDE(cmd_wifi_ap_set_rts_threshold = 0x1804a3f5); -PROVIDE(cmd_wifi_ap_status = 0x1804a49d); -PROVIDE(cmd_wifi_ap_wps_pin = 0x1804a7e9); -PROVIDE(cmd_wifi_ap_wps_pbc = 0x1804a8b1); -PROVIDE(parse_number = 0x1804a92d); -PROVIDE(cmd_wifi_ap_config_params = 0x1804a9f5); -PROVIDE(cmd_wifi_ap_sta_disconnect = 0x1804ab1d); -PROVIDE(cmd_wifi_ap_stations = 0x1804abb1); -PROVIDE(__wifi_args_to_params = 0x1804ad1d); -PROVIDE(cmd_wifi_ap_enable = 0x1804b499); -PROVIDE(cmd_wifi_ap_disable = 0x1804b53d); -PROVIDE(cmd_wifi_wps_pbc = 0x1804b5a1); -PROVIDE(cmd_wifi_wps_pin = 0x1804b61d); -PROVIDE(cmd_wifi_twt_teardown_all = 0x1804b6e5); -PROVIDE(cmd_wifi_twt_teardown = 0x1804b7c1); -PROVIDE(print_twt_params = 0x1804b925); -PROVIDE(cmd_wifi_btwt_setup = 0x1804ba95); -PROVIDE(cmd_wifi_twt_setup_quick = 0x1804bbd1); -PROVIDE(cmd_wifi_twt_setup = 0x1804bd4d); -PROVIDE(cmd_wifi_11k = 0x1804c1e9); -PROVIDE(cmd_wifi_11k_neighbor_request = 0x1804c329); -PROVIDE(cmd_wifi_btm_query = 0x1804c47d); -PROVIDE(cmd_wifi_connect = 0x1804c515); -PROVIDE(cmd_wifi_disconnect = 0x1804c5b1); -PROVIDE(cmd_wifi_ps = 0x1804c63d); -PROVIDE(cmd_wifi_listen_interval = 0x1804c935); -PROVIDE(cmd_wifi_ps_mode = 0x1804ca19); -PROVIDE(cmd_wifi_ps_timeout = 0x1804cb19); -PROVIDE(cmd_wifi_ps_wakeup_mode = 0x1804cbfd); -PROVIDE(cmd_wifi_reg_domain = 0x1804cd21); -PROVIDE(cmd_wifi_set_rts_threshold = 0x1804cf91); -PROVIDE(wifi_shell_init = 0x1804d0b5); -PROVIDE(wifi_mgmt_event_handler = 0x1804da41); -PROVIDE(wifi_mgmt_scan_event_handler = 0x1804dec9); -PROVIDE(cmd_wifi_stats = 0x1804d0f9); -PROVIDE(cmd_wifi_status = 0x1804d331); -PROVIDE(cmd_wifi_version = 0x1804d5e5); -PROVIDE(cmd_wifi_ps_exit_strategy = 0x1804d67d); -PROVIDE(cmd_wifi_pmksa_flush = 0x1804d755); -PROVIDE(cmd_wifi_scan = 0x1804d795); -PROVIDE(cmd_wifi_mode = 0x1804e219); -PROVIDE(cmd_wifi_channel = 0x1804e3f1); -PROVIDE(cmd_wifi_packet_filter = 0x1804e611); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1804f09d); -PROVIDE(mgmt_event_work_handler = 0x1804f0bd); -PROVIDE(mgmt_event_wait_call = 0x1804f3b9); -PROVIDE(net_route_nexthop_remove = 0x18052ddd); -PROVIDE(nbr_new = 0x18052de1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18052e4d); -PROVIDE(net_route_entries_table_clear = 0x18052e6d); -PROVIDE(net_route_entry_remove = 0x18052e71); -PROVIDE(net_route_update_lifetime.part.0 = 0x18052e75); -PROVIDE(route_lifetime_timeout = 0x18053375); -PROVIDE(dhcpv4_find_option = 0x18054c89); -PROVIDE(dhcpv4_encode_requested_params = 0x18054cd1); -PROVIDE(dhcpv4_get_lease_time = 0x18054d39); -PROVIDE(dhcpv4_server_timeout_recalc = 0x18054d65); -PROVIDE(dhcpv4_encode_header.constprop.0 = 0x18054dd5); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18054e4d); -PROVIDE(dhcpv4_get_client_id = 0x18054e6d); -PROVIDE(dhcpv4_send = 0x18054f19); -PROVIDE(dhcpv4_probe_address.isra.0 = 0x18054fd9); -PROVIDE(echo_reply_handler = 0x18055025); -PROVIDE(dhcpv4_send_nak.constprop.0.isra.0 = 0x18055101); -PROVIDE(dhcpv4_send_offer = 0x18055269); -PROVIDE(dhcpv4_server_timeout = 0x18055411); -PROVIDE(dhcpv4_send_ack.constprop.0 = 0x18055501); -PROVIDE(dhcpv4_server_cb = 0x18055ad1); -PROVIDE(dns_server_exists = 0x18056a51); -PROVIDE(join_ipv4_mcast_group = 0x18056aad); -PROVIDE(join_ipv6_mcast_group = 0x18056ab5); -PROVIDE(dns_resolve_close_locked = 0x18056abd); -PROVIDE(dns_write.constprop.0 = 0x18056b91); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18056cf9); -PROVIDE(dns_postprocess_server = 0x18056d1d); -PROVIDE(dns_resolve_init_locked = 0x18056f19); -PROVIDE(dispatcher_cb = 0x18057495); -PROVIDE(dns_resolve_cancel_with_hash.constprop.0 = 0x180572ed); -PROVIDE(query_timeout = 0x1805737d); -PROVIDE(intc_nxp_pint_init = 0x18057da1); -PROVIDE(nxp_pint_isr = 0x18057e71); -PROVIDE(usb_isr_handler = 0x18057fa5); -PROVIDE(usb_mcux_init = 0x18057fb1); -PROVIDE(usb_mcux_thread_main = 0x18058035); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18058015); -PROVIDE(mcux_lpc_syscon_clock_control_on = 0x18058df9); -PROVIDE(mcux_lpc_syscon_clock_control_get_subsys_rate = 0x18058dfd); -PROVIDE(mcux_lpc_syscon_clock_control_off = 0x18058ee5); -PROVIDE(mcux_lpc_syscon_clock_control_set_subsys_rate = 0x10067f5d); -PROVIDE(console_out = 0x18058ee9); -PROVIDE(uart_console_init = 0x18058f15); -PROVIDE(entropy_mcux_trng_get_entropy = 0x18058f3d); -PROVIDE(entropy_mcux_trng_init = 0x18058f6d); -PROVIDE(entropy_mcux_trng_pm_action = 0x18058fc1); -PROVIDE(flash_get_page_info = 0x18058fdd); -PROVIDE(gpio_mcux_lpc_port_get_raw = 0x180590b1); -PROVIDE(gpio_mcux_lpc_port_set_masked_raw = 0x180590c9); -PROVIDE(gpio_mcux_lpc_port_set_bits_raw = 0x180590f1); -PROVIDE(gpio_mcux_lpc_port_clear_bits_raw = 0x18059105); -PROVIDE(gpio_mcux_lpc_port_toggle_bits = 0x18059119); -PROVIDE(gpio_mcux_lpc_manage_cb = 0x1805912d); -PROVIDE(gpio_mcux_lpc_configure = 0x180591dd); -PROVIDE(gpio_mcux_lpc_pin_interrupt_configure = 0x18059269); -PROVIDE(gpio_mcux_lpc_pint_cb = 0x180593ad); -PROVIDE(lpc_gpio_init_1 = 0x1805938d); -PROVIDE(lpc_gpio_init_0 = 0x1805939d); -PROVIDE(reset_nxp_rstctl_status = 0x180599e9); -PROVIDE(reset_nxp_rstctl_line_assert = 0x18059a19); -PROVIDE(reset_nxp_rstctl_line_deassert = 0x18059a35); -PROVIDE(reset_nxp_rstctl_line_toggle = 0x18059a51); -PROVIDE(mcux_flexcomm_poll_in = 0x18059a95); -PROVIDE(mcux_flexcomm_poll_out = 0x18059ab5); -PROVIDE(mcux_flexcomm_err_check = 0x18059acd); -PROVIDE(mcux_flexcomm_fifo_fill = 0x18059b19); -PROVIDE(mcux_flexcomm_fifo_read = 0x18059b4d); -PROVIDE(mcux_flexcomm_irq_tx_enable = 0x18059b81); -PROVIDE(mcux_flexcomm_irq_tx_disable = 0x18059b91); -PROVIDE(mcux_flexcomm_irq_tx_complete = 0x18059ba1); -PROVIDE(mcux_flexcomm_irq_tx_ready = 0x18059bad); -PROVIDE(mcux_flexcomm_irq_rx_enable = 0x18059bcd); -PROVIDE(mcux_flexcomm_irq_rx_disable = 0x18059bdd); -PROVIDE(mcux_flexcomm_irq_rx_full = 0x18059bed); -PROVIDE(mcux_flexcomm_irq_err_enable = 0x18059c01); -PROVIDE(mcux_flexcomm_irq_err_disable = 0x18059c15); -PROVIDE(mcux_flexcomm_irq_update = 0x18059c29); -PROVIDE(mcux_flexcomm_irq_callback_set = 0x18059c2d); -PROVIDE(mcux_flexcomm_uart_config_get = 0x18059c35); -PROVIDE(mcux_flexcomm_isr = 0x18059c49); -PROVIDE(mcux_flexcomm_irq_config_func_0 = 0x18059c55); -PROVIDE(mcux_flexcomm_init = 0x18059c6d); -PROVIDE(mcux_flexcomm_uart_configure = 0x18059d1d); -PROVIDE(mcux_flexcomm_irq_is_pending = 0x18059dd9); -PROVIDE(sys_clock_driver_init = 0x1805a2e9); -PROVIDE(nxp_wifi_set_rts_threshold = 0x1805a64d); -PROVIDE(nxp_wifi_btm_query = 0x1805a65d); -PROVIDE(nxp_wifi_set_twt = 0x1805a665); -PROVIDE(nxp_wifi_11k_cfg = 0x1805a6f1); -PROVIDE(nxp_wifi_dev_init = 0x1805a70d); -PROVIDE(nxp_wifi_sta_init = 0x1805a749); -PROVIDE(nxp_wifi_ap_set_rts_threshold = 0x1805a78d); -PROVIDE(nxp_wifi_set_btwt = 0x1805a79d); -PROVIDE(nxp_wifi_status = 0x1805a7d1); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1805a9ad); -PROVIDE(nxp_wifi_uap_init = 0x1805a9cd); -PROVIDE(nxp_wifi_recv = 0x10068009); -PROVIDE(nxp_wifi_uap_disconnect_sta = 0x1805aafd); -PROVIDE(nxp_wifi_ap_config_params = 0x1805ab65); -PROVIDE(nxp_wifi_set_config = 0x1805ace5); -PROVIDE(nxp_wifi_process_results = 0x1805ad6d); -PROVIDE(nxp_wifi_scan = 0x1805aef5); -PROVIDE(nxp_wifi_connect = 0x1805b0b9); -PROVIDE(nxp_wifi_start_ap = 0x1805b295); -PROVIDE(nxp_wifi_stop_ap = 0x1805b4fd); -PROVIDE(nxp_wifi_disconnect = 0x1805b589); -PROVIDE(nxp_wifi_11k_neighbor_request = 0x1805b641); -PROVIDE(nxp_wifi_power_save = 0x1805b6b5); -PROVIDE(nxp_wifi_reg_domain = 0x1805b885); -PROVIDE(nxp_wifi_version = 0x1805b9cd); -PROVIDE(nxp_wifi_stats = 0x1805bac9); -PROVIDE(nxp_wifi_send = 0x10067f75); -PROVIDE(nxp_wifi_uap_status = 0x1805bc99); -PROVIDE(device_wlan_pm_action = 0x1805c841); -PROVIDE(nxp_wifi_shell_cmd = 0x1805c8bd); -PROVIDE(CLOCK_Delay = 0x1805c91d); -PROVIDE(CLOCK_ConfigAvPll = 0x1805c929); -PROVIDE(CLOCK_GetTcpuFvcoFreq = 0x1805c9ad); -PROVIDE(CLOCK_ConfigAvPllCh1.part.0 = 0x1805ca1d); -PROVIDE(POWER_Delay = 0x100680b5); -PROVIDE(POWER_DelayUs = 0x100680c1); -PROVIDE(POWER_SaveGdetVSensorConfig = 0x100680f1); -PROVIDE(POWER_RestoreGdetVSensorConfig = 0x10068135); -PROVIDE(deinitXip = 0x10068181); -PROVIDE(POWER_EnterPm3Asm = 0x100681bd); -PROVIDE(initFlexSPI.constprop.0 = 0x10068289); -PROVIDE(initXip = 0x10068325); -PROVIDE(Power_ConfigClkGate.isra.0 = 0x10068345); -PROVIDE(POWER_PrePowerMode = 0x100683a5); -PROVIDE(POWER_PostPowerMode = 0x10068575); -PROVIDE(OCOTP_ReadSocOtp.part.0 = 0x1805dd65); -PROVIDE(wifi_uap_set_11ac_status.isra.0 = 0x1805e009); -PROVIDE(wifi_send_uap_max_sta_num_cmd = 0x1805e095); -PROVIDE(wifi_cmd_uap_config.constprop.0 = 0x1805e3f9); -PROVIDE(wlan_11d_generate_domain_info.isra.0 = 0x18060eb5); -PROVIDE(wlan_process_rm_beacon_req = 0x18061fd1); -PROVIDE(wifi_send_rf_antenna_cmd = 0x18062c39); -PROVIDE(wifi_send_key_material_cmd = 0x18062cc1); -PROVIDE(wifi_config_mgmt_ie = 0x18062d0d); -PROVIDE(wlan_get_nonglobal_operclass_table.constprop.0.isra.0 = 0x18065d05); -PROVIDE(wlan_interpret_bss_desc_with_ie = 0x1806d19d); -PROVIDE(adjust_pointers_to_internal_buffers.constprop.0 = 0x1806d975); -PROVIDE(wlan_update_chan_statistics.isra.0 = 0x1806da2d); -PROVIDE(is_rsn_oui_present.isra.0 = 0x1806da95); -PROVIDE(wlan_sec_ioctl_passphrase = 0x18071ec1); -PROVIDE(wlan_sec_ioctl_password = 0x18071ec1); -PROVIDE(wifi_send_power_save_command = 0x18072a01); -PROVIDE(is_scanning_allowed = 0x18073065); -PROVIDE(do_connect_failed = 0x18073095); -PROVIDE(wlan_set_uap_ecsa_cfg = 0x180730e1); -PROVIDE(wlan_switch_to_nondfs_channel = 0x18073255); -PROVIDE(wake_timer_cb = 0x180732b9); -PROVIDE(temperature_mon_cb = 0x180732cd); -PROVIDE(wifi_wakeup_card_cb = 0x180732e5); -PROVIDE(wlan_start.part.0 = 0x18073319); -PROVIDE(assoc_timer_cb = 0x18073f41); -PROVIDE(neighbor_req_timer_cb = 0x18073f05); -PROVIDE(wlan_get_scan_result.part.0 = 0x18073655); -PROVIDE(wlcm_request_scan.isra.0 = 0x18073805); -PROVIDE(do_start.isra.0 = 0x18073985); -PROVIDE(do_scan = 0x18073b95); -PROVIDE(wlcm_request_connect = 0x18073c75); -PROVIDE(wlan_send_host_sleep_int = 0x18073d55); -PROVIDE(wlcm_request_reconnect = 0x18073f79); -PROVIDE(wlcmgr_mon_task = 0x180741a5); -PROVIDE(handle_scan_results = 0x18075ce5); -PROVIDE(wlcmgr_task = 0x18076c2d); -PROVIDE(test_wlan_get_mac_address = 0x18079ad9); -PROVIDE(test_wlan_version = 0x18079b59); -PROVIDE(dump_cfg_data_param = 0x18079bb5); -PROVIDE(dump_cfg_data = 0x18079c1d); -PROVIDE(dump_wlan_set_txomi_usage = 0x18079c55); -PROVIDE(dump_wlan_set_ed_mac_mode_usage = 0x18079d55); -PROVIDE(print_ds_rate = 0x18079e21); -PROVIDE(print_chanlist = 0x1807a1d1); -PROVIDE(dump_wlan_get_txpwrlimit_usage = 0x1807a265); -PROVIDE(test_get_tsf_info = 0x1807a2f9); -PROVIDE(test_wlan_twt_report = 0x1807a3c9); -PROVIDE(test_wlan_set_rutxpwrlimit = 0x1807a501); -PROVIDE(wlan_ed_mac_mode_set = 0x1807a585); -PROVIDE(test_wlan_get_data_rate = 0x1807a6c1); -PROVIDE(test_wlan_get_txratecfg = 0x1807a75d); -PROVIDE(test_wlan_set_txratecfg = 0x1807a7f1); -PROVIDE(test_wlan_set_chanlist = 0x1807ade9); -PROVIDE(test_set_clocksync_cfg = 0x1807ae3d); -PROVIDE(test_wlan_twt_information = 0x1807b065); -PROVIDE(test_wlan_set_tx_omi = 0x1807b0e5); -PROVIDE(test_wlan_get_chanlist = 0x1807b211); -PROVIDE(wlan_pmfcfg_get = 0x1807b24d); -PROVIDE(wlan_uap_pmfcfg_get = 0x1807b2e9); -PROVIDE(wlan_ed_mac_mode_get = 0x1807b37d); -PROVIDE(test_wlan_set_toltime = 0x1807b4b1); -PROVIDE(test_wlan_get_txpwrlimit = 0x1807b625); -PROVIDE(test_wlan_twt_teardown = 0x1807b85d); -PROVIDE(test_wlan_twt_setup = 0x1807b869); -PROVIDE(test_wlan_bcast_twt = 0x1807b875); -PROVIDE(test_wlan_11ax_cfg = 0x1807b881); -PROVIDE(dump_wlan_set_rf_trigger_frame_cfg_usage = 0x1807b91d); -PROVIDE(dump_wlan_set_tx_frame_usage = 0x1807ba81); -PROVIDE(dump_wlan_set_tx_cont_mode_usage = 0x1807bb4d); -PROVIDE(dump_wlan_set_bandwidth_usage = 0x1807bbf1); -PROVIDE(wlan_rf_tx_frame_set = 0x1807bc45); -PROVIDE(wlan_rf_test_mode_unset = 0x1807bf89); -PROVIDE(wlan_rf_otp_cal_data_set = 0x1807bfd9); -PROVIDE(wlan_set_rf_trigger_frame_cfg = 0x1807c04d); -PROVIDE(wlan_rf_test_mode_set = 0x1807c5d1); -PROVIDE(wlan_rf_bandwidth_set = 0x1807c621); -PROVIDE(wlan_rf_channel_get = 0x1807c699); -PROVIDE(wlan_rf_radio_mode_get = 0x1807c729); -PROVIDE(wlan_rf_tx_antenna_get = 0x1807c7b9); -PROVIDE(wlan_rf_rx_antenna_get = 0x1807c85d); -PROVIDE(wlan_rf_band_get = 0x1807c901); -PROVIDE(wlan_rf_bandwidth_get = 0x1807c9a5); -PROVIDE(wlan_rf_otp_cal_data_get = 0x1807ca51); -PROVIDE(wlan_rf_channel_set = 0x1807caf5); -PROVIDE(wlan_rf_otp_mac_addr_set = 0x1807cb79); -PROVIDE(wlan_rf_otp_mac_addr_get = 0x1807cc21); -PROVIDE(wlan_rf_per_get = 0x1807ccc5); -PROVIDE(wlan_rf_radio_mode_set = 0x1807cd79); -PROVIDE(wlan_rf_band_set = 0x1807ce15); -PROVIDE(wlan_rf_tx_antenna_set = 0x1807cea5); -PROVIDE(wlan_rf_rx_antenna_set = 0x1807cf39); -PROVIDE(wlan_set_rf_he_tb_tx = 0x1807cfcd); -PROVIDE(wlan_rf_tx_cont_mode_set = 0x1807d105); -PROVIDE(wlan_rf_tx_power_set = 0x1807d2b5); -PROVIDE(test_wlan_thread_info = 0x1807d3f9); -PROVIDE(dump_monitor_param = 0x1807d3fd); -PROVIDE(dump_wlan_detect_ant_usage = 0x1807d4a9); -PROVIDE(dump_wlan_auto_null_tx_usage = 0x1807d58d); -PROVIDE(dump_wlan_imd3_cfg_usage = 0x1807d5e5); -PROVIDE(dump_wlan_external_coex_pta_usage = 0x1807d63d); -PROVIDE(dump_wlan_set_mmsf_usage = 0x1807d74d); -PROVIDE(dump_wlan_set_forceRTS_usage = 0x1807d7c9); -PROVIDE(dump_wlan_bandcfg_bit_usage = 0x1807d829); -PROVIDE(dump_wlan_tsp_cfg_usage = 0x1807d895); -PROVIDE(dump_wlan_set_monitor_filter_usage = 0x1807d93d); -PROVIDE(dump_wlan_cck_desense_cfg_usage = 0x1807d9bd); -PROVIDE(dump_wlan_rx_abort_cfg_ext_usage = 0x1807dabd); -PROVIDE(dump_wlan_rx_abort_cfg_usage = 0x1807dc01); -PROVIDE(dump_wlan_tx_ampdu_prot_mode_usage = 0x1807dc89); -PROVIDE(dump_wlan_reg_access_usage = 0x1807dcfd); -PROVIDE(dump_wlan_subscribe_event_usage = 0x1807dd71); -PROVIDE(dump_wlan_txrx_histogram_usage = 0x1807ddf9); -PROVIDE(dump_wlan_csi_filter_usage = 0x1807de79); -PROVIDE(dump_wlan_set_antcfg_usage = 0x1807def9); -PROVIDE(dump_multiple_mef_config_usage = 0x1807dfe5); -PROVIDE(wlan_sort_scan_entry = 0x1807e059); -PROVIDE(test_wlan_auto_null_tx = 0x1807e139); -PROVIDE(test_wlan_get_temperature = 0x1807e30d); -PROVIDE(wlan_antcfg_set = 0x1807e325); -PROVIDE(test_wlan_sta_inactivityto = 0x1807e409); -PROVIDE(test_wlan_imd3_cfg = 0x1807e5b9); -PROVIDE(test_wlan_set_country_ie_ignore = 0x1807e675); -PROVIDE(test_wlan_get_mmsf = 0x1807e70d); -PROVIDE(test_wlan_set_forceRTS = 0x1807e791); -PROVIDE(test_wlan_set_su = 0x1807e84d); -PROVIDE(test_wlan_ext_coex_uwb = 0x1807e95d); -PROVIDE(test_wlan_send_hostcmd = 0x1807ea39); -PROVIDE(test_wlan_get_signal = 0x1807ea9d); -PROVIDE(test_wlan_get_tsp_cfg = 0x1807eb41); -PROVIDE(test_wlan_set_tsp_cfg = 0x1807ec35); -PROVIDE(test_wlan_get_rx_abort_cfg_ext = 0x1807efa1); -PROVIDE(test_wlan_set_rx_abort_cfg_ext = 0x1807f091); -PROVIDE(test_wlan_tx_ampdu_prot_mode = 0x1807f351); -PROVIDE(test_wlan_sleep_period = 0x1807f401); -PROVIDE(test_wlan_wmm_uapsd_qosinfo = 0x1807f45d); -PROVIDE(test_wlan_set_wmm_uapsd = 0x1807f4e1); -PROVIDE(test_wlan_reg_access = 0x1807f525); -PROVIDE(test_wlan_subscribe_event = 0x1807f5ed); -PROVIDE(test_wlan_txrx_histogram = 0x1807f991); -PROVIDE(test_wlan_uap_set_ecsa_cfg = 0x1807fdbd); -PROVIDE(test_wlan_wmm_tx_stats = 0x1807fe9d); -PROVIDE(test_wlan_auto_host_sleep = 0x1807fead); -PROVIDE(test_wlan_wakeup_condition = 0x1807ff7d); -PROVIDE(test_wlan_set_multiple_mef_config = 0x180800b5); -PROVIDE(test_wlan_get_log = 0x18080185); -PROVIDE(test_wlan_deep_sleep_ps = 0x18080509); -PROVIDE(test_wlan_ieee_ps = 0x180805a9); -PROVIDE(test_wlan_set_mac_address = 0x18080641); -PROVIDE(test_wlan_net_stats = 0x18080681); -PROVIDE(test_wlan_get_ps_cfg = 0x18080685); -PROVIDE(test_wlan_get_max_clients_count = 0x180806dd); -PROVIDE(test_wlan_set_monitor_param = 0x1808070d); -PROVIDE(test_wlan_external_coex_pta = 0x180807ad); -PROVIDE(test_wlan_get_turbo_mode = 0x18080ddd); -PROVIDE(test_wlan_set_mmsf = 0x18080e61); -PROVIDE(test_wlan_get_bandcfg = 0x18080f01); -PROVIDE(test_wlan_net_monitor_cfg = 0x18080f49); -PROVIDE(test_wlan_cck_desense_cfg = 0x18080f69); -PROVIDE(test_wlan_rx_abort_cfg = 0x18081101); -PROVIDE(test_wlan_csi_cfg = 0x180811c9); -PROVIDE(test_wlan_set_scan_channel_gap = 0x180811e9); -PROVIDE(test_wlan_roaming = 0x18081239); -PROVIDE(test_wlan_set_frag = 0x180812e1); -PROVIDE(test_wlan_set_rts = 0x18081341); -PROVIDE(test_wlan_scan = 0x180813a1); -PROVIDE(__scan_cb = 0x180817b9); -PROVIDE(wlan_get_best_two_ants.constprop.0 = 0x180813cd); -PROVIDE(test_wlan_set_ps_cfg = 0x18081455); -PROVIDE(test_wlan_reset = 0x180814bd); -PROVIDE(test_wlan_rssi_low_threshold = 0x18081535); -PROVIDE(wlan_antcfg_get = 0x18081595); -PROVIDE(test_wlan_set_bandcfg = 0x18081669); -PROVIDE(test_wlan_enable_disable_htc = 0x18081709); -PROVIDE(test_wlan_set_multiple_dtim = 0x18081b3d); -PROVIDE(test_wlan_scan_opt = 0x18081bd1); -PROVIDE(test_wlan_set_turbo_mode = 0x18081ef9); -PROVIDE(wlan_detect_ant_start_scan = 0x18081fed); -PROVIDE(test_wlan_detect_ant = 0x180820c1); -PROVIDE(__ant_detect_scan_cb = 0x180828b1); -PROVIDE(test_wlan_set_ips = 0x1808250d); -PROVIDE(wlan_get_best_scan_info.constprop.0 = 0x180825a5); -PROVIDE(test_wlan_mem_access = 0x18082dc9); -PROVIDE(test_wlan_single_ant_duty_cycle = 0x18082f81); -PROVIDE(test_wlan_dual_ant_duty_cycle = 0x1808308d); -PROVIDE(test_wlan_eu_crypto_aes_ecb = 0x180831c9); -PROVIDE(test_wlan_eu_crypto_aes_wrap = 0x18083441); -PROVIDE(test_wlan_eu_crypto_rc4 = 0x180836d5); -PROVIDE(test_wlan_eu_crypto_ccmp_256 = 0x1808394d); -PROVIDE(test_wlan_eu_crypto_ccmp_128 = 0x18083c29); -PROVIDE(test_wlan_eu_crypto_gcmp_256 = 0x18083ef9); -PROVIDE(test_wlan_eu_crypto_gcmp_128 = 0x18084215); -PROVIDE(test_wlan_set_csi_param_header = 0x180845dd); -PROVIDE(test_wlan_set_csi_filter = 0x18084849); -PROVIDE(test_wlan_set_monitor_filter = 0x180849d5); -PROVIDE(I2C_PendingStatusWait = 0x18085509); -PROVIDE(SPI_SlaveTransferHandleIRQ = 0x18085f95); -PROVIDE(USB_DeviceEhciSetDefaultState = 0x18086c85); -PROVIDE(USB_DeviceEhciTransfer = 0x18086d51); -PROVIDE(USB_DeviceEhciCancelControlPipe = 0x18086fbd); -PROVIDE(USB_DeviceEhciEndpointDeinit = 0x1808738d); -PROVIDE(flexspi_nor_wait_bus_busy.constprop.0 = 0x18087b09); -PROVIDE(sb3_Delay = 0x18087c69); -PROVIDE(__OtpInit = 0x18087c75); -PROVIDE(nboot_hal_get_secure_firmware_version = 0x18087cd9); -PROVIDE(ldr_DoHeader_v3 = 0x18087d6d); -PROVIDE(ldr_DoDataRead = 0x18087e99); -PROVIDE(__OtpDeInit.isra.0 = 0x18087e5d); -PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18088ca9); -PROVIDE(z_sys_init_run_level = 0x18088e81); -PROVIDE(bg_thread_main = 0x18088edd); -PROVIDE(statics_init = 0x180892bd); -PROVIDE(init_mbox_module = 0x1808970d); -PROVIDE(k_sys_work_q_init = 0x180899b1); -PROVIDE(slice_timeout = 0x1808a019); -PROVIDE(clear_event_registration = 0x1808ae7d); -PROVIDE(signal_poll_event.constprop.0 = 0x1808afa9); -PROVIDE(register_events = 0x1808b031); -PROVIDE(k_event_post_internal = 0x1808b995); -PROVIDE(event_walk_op = 0x1808bb79); -PROVIDE(k_event_wait_internal = 0x1808ba3d); -PROVIDE(__ultoa_invert = 0x1808e08b); -PROVIDE(skip_to_arg = 0x1808c861); -PROVIDE(mulShiftAll64 = 0x1808e139); -PROVIDE(div10 = 0x1808d339); -PROVIDE(__OSA_RWLockWriteUnlock_veneer = 0x1808e4a1); -PROVIDE(__net_if_down_veneer = 0x1808e4a9); -PROVIDE(__net_if_get_by_iface_veneer = 0x1808e4b1); -PROVIDE(__wlan_11n_delete_txbastream_tbl_entry_veneer = 0x1808e4b9); -PROVIDE(__z_impl_k_queue_peek_head_veneer = 0x1808e4c1); -PROVIDE(__net_sprint_ll_addr_buf_veneer = 0x1808e4c9); -PROVIDE(__wifi_fw_is_hang_veneer = 0x1808e4d1); -PROVIDE(__z_sched_waitq_walk_veneer = 0x1808e4d9); -PROVIDE(__FLEXSPI_SetFlashConfig_veneer = 0x1808e4e1); -PROVIDE(__net_pkt_copy_veneer = 0x1808e4e9); -PROVIDE(__wakelock_isheld_veneer = 0x1808e4f1); -PROVIDE(__net_context_connect_veneer = 0x1808e4f9); -PROVIDE(__net_if_ipv4_addr_add_veneer = 0x1808e501); -PROVIDE(__k_work_queue_init_veneer = 0x1808e509); -PROVIDE(__net_if_ipv6_prefix_set_timer_veneer = 0x1808e511); -PROVIDE(__net_get_uap_handle_veneer = 0x1808e519); -PROVIDE(__net_if_foreach_veneer = 0x1808e521); -PROVIDE(__net_configure_dns_veneer = 0x1808e529); -PROVIDE(__net_if_set_name_veneer = 0x1808e531); -PROVIDE(__net_calc_chksum_igmp_veneer = 0x1808e539); -PROVIDE(__wifi_destroy_wifidriver_tasks_veneer = 0x1808e541); -PROVIDE(__z_unpend1_no_timeout_veneer = 0x1808e549); -PROVIDE(__OSA_RWLockCreateWithCB_veneer = 0x1808e551); -PROVIDE(__net_context_ref_veneer = 0x1808e559); -PROVIDE(__OSA_SemaphoreCreateBinary_veneer = 0x1808e561); -PROVIDE(__wlan_cmd_append_11n_tlv_veneer = 0x1808e569); -PROVIDE(__wlan_ret_11n_addba_resp_veneer = 0x1808e571); -PROVIDE(__net_if_need_calc_rx_checksum_veneer = 0x1808e579); -PROVIDE(__POWER_DelayUs_veneer = 0x1808e581); -PROVIDE(__OSA_TimerIsRunning_veneer = 0x1808e589); -PROVIDE(__FLEXSPI_TransferBlocking_veneer = 0x1808e591); -PROVIDE(__net_pkt_skip_veneer = 0x1808e599); -PROVIDE(__wifi_register_event_queue_veneer = 0x1808e5a1); -PROVIDE(__wlan_cmd_11n_delba_veneer = 0x1808e5a9); -PROVIDE(__wifi_scan_stop_veneer = 0x1808e5b1); -PROVIDE(__net_udp_create_veneer = 0x1808e5b9); -PROVIDE(__net_buf_unref_debug_veneer = 0x1808e5c1); -PROVIDE(__net_interface_down_veneer = 0x1808e5c9); -PROVIDE(__nxp_wifi_internal_register_rx_cb_veneer = 0x1808e5d1); -PROVIDE(__net_wifi_packet_send_veneer = 0x1808e5d9); -PROVIDE(__net_if_ipv6_addr_lookup_by_iface_veneer = 0x1808e5e1); -PROVIDE(__net_pkt_get_data_veneer = 0x1808e5e9); -PROVIDE(__net_pkt_available_buffer_veneer = 0x1808e5f1); -PROVIDE(__net_if_ipv6_maddr_join_veneer = 0x1808e5f9); -PROVIDE(__ipv6_addr_type_to_desc_veneer = 0x1808e601); -PROVIDE(__net_pkt_set_data_veneer = 0x1808e609); -PROVIDE(__OSA_TimeDelay_veneer = 0x1808e611); -PROVIDE(__z_thread_aligned_alloc_veneer = 0x1808e619); -PROVIDE(__net_if_ipv6_select_src_addr_veneer = 0x1808e621); -PROVIDE(__OSA_EnterCritical_veneer = 0x1808e629); -PROVIDE(__net_ipv6_addr_generate_iid_veneer = 0x1808e631); -PROVIDE(__wlan_cmd_11n_addba_req_veneer = 0x1808e639); -PROVIDE(__z_pend_curr_veneer = 0x1808e641); -PROVIDE(__net_pkt_read_be32_veneer = 0x1808e649); -PROVIDE(__wifi_wake_up_card_veneer = 0x1808e651); -PROVIDE(__FLEXSPI_Init_veneer = 0x1808e659); -PROVIDE(__net_if_dormant_on_veneer = 0x1808e661); -PROVIDE(__net_if_ipv4_addr_get_first_by_index_veneer = 0x1808e669); -PROVIDE(__net_ipv4_parse_hdr_options_veneer = 0x1808e671); -PROVIDE(__wlan_11n_delete_bastream_veneer = 0x1808e679); -PROVIDE(__net_if_get_wifi_sta_veneer = 0x1808e681); -PROVIDE(__z_impl_k_msgq_put_veneer = 0x1808e689); -PROVIDE(__OSA_MemoryFree_veneer = 0x1808e691); -PROVIDE(__net_tcp_state_str_veneer = 0x1808e699); -PROVIDE(__net_stat_veneer = 0x1808e6a1); -PROVIDE(__net_context_send_veneer = 0x1808e6a9); -PROVIDE(__net_ipv4_finalize_veneer = 0x1808e6b1); -PROVIDE(__net_if_ipv6_router_update_lifetime_veneer = 0x1808e6b9); -PROVIDE(__z_impl_net_addr_pton_veneer = 0x1808e6c1); -PROVIDE(__wlan_cmd_11n_uap_addba_rspgen_veneer = 0x1808e6c9); -PROVIDE(__z_impl_k_mutex_lock_veneer = 0x1808e6d1); -PROVIDE(__net_get_if_ip_addr_veneer = 0x1808e6d9); -PROVIDE(__z_impl_k_thread_stack_space_get_veneer = 0x1808e6e1); -PROVIDE(__wlan_11n_create_txbastream_tbl_veneer = 0x1808e6e9); -PROVIDE(__net_pkt_ref_veneer = 0x1808e6f1); -PROVIDE(__OSA_TimerChange_veneer = 0x1808e6f9); -PROVIDE(__wlan_11n_cleanup_reorder_tbl_veneer = 0x1808e701); -PROVIDE(__z_impl_zsock_sendto_veneer = 0x1808e709); -PROVIDE(__net_interface_up_veneer = 0x1808e711); -PROVIDE(__wlan_ralist_update_enh_veneer = 0x1808e719); -PROVIDE(__OSA_TimerDestroy_veneer = 0x1808e721); -PROVIDE(__wifi_set_tx_status_veneer = 0x1808e729); -PROVIDE(__net_if_try_queue_tx_veneer = 0x1808e731); -PROVIDE(__k_work_cancel_delayable_veneer = 0x1808e739); -PROVIDE(__net_buf_alloc_fixed_debug_veneer = 0x1808e741); -PROVIDE(__z_impl_zsock_recvfrom_veneer = 0x1808e749); -PROVIDE(__OSA_MutexUnlock_veneer = 0x1808e751); -PROVIDE(__OSA_TimerCreate_veneer = 0x1808e759); -PROVIDE(__net_if_lookup_by_dev_veneer = 0x1808e761); -PROVIDE(__net_if_ipv4_addr_rm_veneer = 0x1808e769); -PROVIDE(__net_context_recv_veneer = 0x1808e771); -PROVIDE(__OSA_RWLockWriteLock_veneer = 0x1808e779); -PROVIDE(__net_ipv6_finalize_veneer = 0x1808e781); -PROVIDE(__z_impl_zsock_inet_pton_veneer = 0x1808e789); -PROVIDE(__net_eth_broadcast_addr_veneer = 0x1808e791); -PROVIDE(__net_pkt_alloc_with_buffer_veneer = 0x1808e799); -PROVIDE(__wifi_get_device_firmware_version_ext_veneer = 0x1808e7a1); -PROVIDE(__z_stack_space_get_veneer = 0x1808e7a9); -PROVIDE(__net_pkt_cursor_init_veneer = 0x1808e7b1); -PROVIDE(__ipv6_addr_state_to_desc_veneer = 0x1808e7b9); -PROVIDE(__net_if_ipv4_maddr_leave_veneer = 0x1808e7c1); -PROVIDE(__net_if_ipv6_select_src_iface_veneer = 0x1808e7c9); -PROVIDE(__z_impl_net_if_ipv4_addr_lookup_by_index_veneer = 0x1808e7d1); -PROVIDE(__OSA_TaskNotifyPost_veneer = 0x1808e7d9); -PROVIDE(__net_interface_dhcp_stop_veneer = 0x1808e7e1); -PROVIDE(__net_context_listen_veneer = 0x1808e7e9); -PROVIDE(__net_context_set_option_veneer = 0x1808e7f1); -PROVIDE(__k_malloc_veneer = 0x1808e7f9); -PROVIDE(__OSA_MsgQCreate_veneer = 0x1808e801); -PROVIDE(__z_reschedule_veneer = 0x1808e809); -PROVIDE(__net_if_stop_rs_veneer = 0x1808e811); -PROVIDE(__wlan_11n_ba_stream_timeout_veneer = 0x1808e819); -PROVIDE(__net_context_get_local_addr_veneer = 0x1808e821); -PROVIDE(__net_context_accept_veneer = 0x1808e829); -PROVIDE(__wlan_init_wmm_param_veneer = 0x1808e831); -PROVIDE(__k_thread_name_get_veneer = 0x1808e839); -PROVIDE(__z_impl_zsock_socket_veneer = 0x1808e841); -PROVIDE(__net_wlan_set_mac_address_veneer = 0x1808e849); -PROVIDE(__wifi_user_scan_config_cleanup_veneer = 0x1808e851); -PROVIDE(__wifi_get_command_lock_veneer = 0x1808e859); -PROVIDE(__k_is_in_isr_veneer = 0x1808e861); -PROVIDE(__k_queue_append_veneer = 0x1808e869); -PROVIDE(__net_if_ipv6_prefix_get_veneer = 0x1808e871); -PROVIDE(__z_impl_k_queue_get_veneer = 0x1808e879); -PROVIDE(__net_context_sendmsg_veneer = 0x1808e881); -PROVIDE(__net_if_ipv4_select_src_addr_veneer = 0x1808e889); -PROVIDE(__wlan_wmm_process_association_req_veneer = 0x1808e891); -PROVIDE(__net_if_ipv6_router_add_veneer = 0x1808e899); -PROVIDE(__net_tcp_get_option_veneer = 0x1808e8a1); -PROVIDE(__wlan_fill_ht_cap_tlv_veneer = 0x1808e8a9); -PROVIDE(__z_impl_k_msgq_get_veneer = 0x1808e8b1); -PROVIDE(__OSA_TaskDestroy_veneer = 0x1808e8b9); -PROVIDE(__net_ipv6_frag_foreach_veneer = 0x1808e8c1); -PROVIDE(__net_tcp_conn_sem_get_veneer = 0x1808e8c9); -PROVIDE(__net_if_ipv6_router_rm_veneer = 0x1808e8d1); -PROVIDE(__z_log_msg_runtime_create.constprop.0_veneer = 0x1808e8d9); -PROVIDE(__net_if_oper_state2str_veneer = 0x1808e8e1); -PROVIDE(__net_if_ipv6_router_lookup_veneer = 0x1808e8e9); -PROVIDE(__send_wifi_driver_tx_data_event_veneer = 0x1808e8f1); -PROVIDE(__net_if_get_wifi_sap_veneer = 0x1808e8f9); -PROVIDE(__wifi_deinit_veneer = 0x1808e901); -PROVIDE(__z_dummy_thread_init_veneer = 0x1808e909); -PROVIDE(__z_unpend_all_veneer = 0x1808e911); -PROVIDE(__net_if_ipv4_select_src_iface_veneer = 0x1808e919); -PROVIDE(__net_if_ipv6_router_find_default_veneer = 0x1808e921); -PROVIDE(__z_impl_k_sem_take_veneer = 0x1808e929); -PROVIDE(__net_if_stats_reset_veneer = 0x1808e931); -PROVIDE(__net_tcp_foreach_veneer = 0x1808e939); -PROVIDE(__net_if_set_link_addr_locked_veneer = 0x1808e941); -PROVIDE(__z_impl_zsock_bind_veneer = 0x1808e949); -PROVIDE(__wlan_cmd_11n_addba_rspgen_veneer = 0x1808e951); -PROVIDE(__z_check_stack_sentinel_veneer = 0x1808e959); -PROVIDE(__net_ipv6_send_fragmented_pkt_veneer = 0x1808e961); -PROVIDE(__csi_deliver_data_to_user_veneer = 0x1808e969); -PROVIDE(__net_pkt_read_veneer = 0x1808e971); -PROVIDE(__csi_local_buff_init_veneer = 0x1808e979); -PROVIDE(__z_sched_init_veneer = 0x1808e981); -PROVIDE(__wifi_clear_wakeup_reason_veneer = 0x1808e989); -PROVIDE(__k_work_init_veneer = 0x1808e991); -PROVIDE(__z_impl_k_mutex_unlock_veneer = 0x1808e999); -PROVIDE(__wlan_11n_deleteall_txbastream_tbl_veneer = 0x1808e9a1); -PROVIDE(__wifi_imu_put_task_lock_veneer = 0x1808e9a9); -PROVIDE(__net_if_ipv4_maddr_rm_veneer = 0x1808e9b1); -PROVIDE(__net_if_ipv6_calc_reachable_time_veneer = 0x1808e9b9); -PROVIDE(__k_aligned_alloc_veneer = 0x1808e9c1); -PROVIDE(__z_impl_k_mutex_init_veneer = 0x1808e9c9); -PROVIDE(__net_if_ipv6_prefix_add_veneer = 0x1808e9d1); -PROVIDE(__OSA_ExitCritical_veneer = 0x1808e9d9); -PROVIDE(__wlan_cmd_wmm_param_config_veneer = 0x1808e9e1); -PROVIDE(__net_try_send_data_veneer = 0x1808e9e9); -PROVIDE(__POWER_SetSleepMode_veneer = 0x1808e9f1); -PROVIDE(__z_impl_k_sched_current_thread_query_veneer = 0x1808e9f9); -PROVIDE(__wifi_event_completion_veneer = 0x1808ea01); -PROVIDE(__z_impl_k_thread_name_set_veneer = 0x1808ea09); -PROVIDE(__OSA_TimerDeactivate_veneer = 0x1808ea11); -PROVIDE(__OSA_SemaphoreDestroy_veneer = 0x1808ea19); -PROVIDE(__net_if_is_wifi_veneer = 0x1808ea21); -PROVIDE(__net_if_ipv6_prefix_rm_veneer = 0x1808ea29); -PROVIDE(__k_work_submit_to_queue_veneer = 0x1808ea31); -PROVIDE(__unregister_csi_user_callback_veneer = 0x1808ea39); -PROVIDE(__z_impl_k_sem_init_veneer = 0x1808ea41); -PROVIDE(__z_impl_k_sleep_veneer = 0x1808ea49); -PROVIDE(__net_tcp_get_supported_mss_veneer = 0x1808ea51); -PROVIDE(__net_context_put_veneer = 0x1808ea59); -PROVIDE(__wlan_ret_wmm_param_config_veneer = 0x1808ea61); -PROVIDE(__wifi_get_device_mac_addr_veneer = 0x1808ea69); -PROVIDE(__wifi_init_veneer = 0x1808ea71); -PROVIDE(__wifi_unregister_event_queue_veneer = 0x1808ea79); -PROVIDE(__net_wlan_init_veneer = 0x1808ea81); -PROVIDE(__wifi_wait_for_cmdresp_veneer = 0x1808ea89); -PROVIDE(__wakelock_put_veneer = 0x1808ea91); -PROVIDE(__net_if_ipv6_maddr_lookup_veneer = 0x1808ea99); -PROVIDE(__k_work_queue_start_veneer = 0x1808eaa1); -PROVIDE(__z_impl_k_thread_create_veneer = 0x1808eaa9); -PROVIDE(__net_if_ipv4_is_addr_bcast_veneer = 0x1808eab1); -PROVIDE(__net_pkt_remaining_data_veneer = 0x1808eab9); -PROVIDE(__z_sched_wake_veneer = 0x1808eac1); -PROVIDE(__net_udp_register_veneer = 0x1808eac9); -PROVIDE(__net_if_mcast_monitor_veneer = 0x1808ead1); -PROVIDE(__net_context_bind_veneer = 0x1808ead9); -PROVIDE(__net_if_get_default_veneer = 0x1808eae1); -PROVIDE(__register_csi_user_callback_veneer = 0x1808eae9); -PROVIDE(__net_get_if_addr_veneer = 0x1808eaf1); -PROVIDE(__net_if_ipv4_get_netmask_by_addr_veneer = 0x1808eaf9); -PROVIDE(__net_if_ipv4_get_global_addr_veneer = 0x1808eb01); -PROVIDE(__OSA_MutexCreate_veneer = 0x1808eb09); -PROVIDE(__wifi_get_scan_result_veneer = 0x1808eb11); -PROVIDE(__net_if_ipv6_addr_update_lifetime_veneer = 0x1808eb19); -PROVIDE(__z_impl_k_wakeup_veneer = 0x1808eb21); -PROVIDE(__OSA_MsgQDestroy_veneer = 0x1808eb29); -PROVIDE(__net_ipv4_create_veneer = 0x1808eb31); -PROVIDE(__net_get_if_ipv6_addr_veneer = 0x1808eb39); -PROVIDE(__POWER_EnterPowerMode_veneer = 0x1808eb41); -PROVIDE(__net_if_get_name_veneer = 0x1808eb49); -PROVIDE(__wifi_get_country_code_veneer = 0x1808eb51); -PROVIDE(__net_tcp_tx_sem_get_veneer = 0x1808eb59); -PROVIDE(__z_setup_new_thread_veneer = 0x1808eb61); -PROVIDE(__wlan_show_dot11ndevcap_veneer = 0x1808eb69); -PROVIDE(__wlan_11n_cfg_ioctl_veneer = 0x1808eb71); -PROVIDE(__k_work_init_delayable_veneer = 0x1808eb79); -PROVIDE(__net_context_get_option_veneer = 0x1808eb81); -PROVIDE(__z_impl_k_queue_peek_tail_veneer = 0x1808eb89); -PROVIDE(__net_if_dormant_off_veneer = 0x1808eb91); -PROVIDE(__OSA_MsgQPut_veneer = 0x1808eb99); -PROVIDE(__wakelock_get_veneer = 0x1808eba1); -PROVIDE(__FLEXSPI_UpdateLUT_veneer = 0x1808eba9); -PROVIDE(__net_if_get_by_name_veneer = 0x1808ebb1); -PROVIDE(__net_if_ipv6_addr_lookup_veneer = 0x1808ebb9); -PROVIDE(__z_ready_thread_veneer = 0x1808ebc1); -PROVIDE(__z_impl_k_yield_veneer = 0x1808ebc9); -PROVIDE(__wifi_wmm_init_veneer = 0x1808ebd1); -PROVIDE(__ipv6_addr_addr_to_desc_veneer = 0x1808ebd9); -PROVIDE(__net_if_ipv4_addr_mask_cmp_veneer = 0x1808ebe1); -PROVIDE(__k_queue_unique_append_veneer = 0x1808ebe9); -PROVIDE(__net_ipv6_create_veneer = 0x1808ebf1); -PROVIDE(__z_impl_zsock_connect_veneer = 0x1808ebf9); -PROVIDE(__wifi_set_rx_status_veneer = 0x1808ec01); -PROVIDE(__net_if_ipv4_maddr_add_veneer = 0x1808ec09); -PROVIDE(__k_sched_unlock_veneer = 0x1808ec11); -PROVIDE(__send_wifi_driver_tx_null_data_event_veneer = 0x1808ec19); -PROVIDE(__OSA_SemaphorePost_veneer = 0x1808ec21); -PROVIDE(__wlan_11n_update_txbastream_tbl_ampdu_stat_veneer = 0x1808ec29); -PROVIDE(__net_calc_chksum_veneer = 0x1808ec31); -PROVIDE(__net_sprint_addr_veneer = 0x1808ec39); -PROVIDE(__OSA_TimerActivate_veneer = 0x1808ec41); -PROVIDE(__net_context_get_veneer = 0x1808ec49); -PROVIDE(__z_unpend_thread_veneer = 0x1808ec51); -PROVIDE(__OSA_RWLockDestroy_veneer = 0x1808ec59); -PROVIDE(__z_impl_k_thread_suspend_veneer = 0x1808ec61); -PROVIDE(__net_pkt_memset_veneer = 0x1808ec69); -PROVIDE(__wifi_get_device_uap_mac_addr_veneer = 0x1808ec71); -PROVIDE(__net_if_ipv6_addr_rm_veneer = 0x1808ec79); -PROVIDE(__net_if_ipv6_set_hop_limit_veneer = 0x1808ec81); -PROVIDE(__wifi_set_country_code_veneer = 0x1808ec89); -PROVIDE(__z_impl_k_queue_cancel_wait_veneer = 0x1808ec91); -PROVIDE(__net_bytes_from_str_veneer = 0x1808ec99); -PROVIDE(__mlan_11n_rxreorder_pkt_veneer = 0x1808eca1); -PROVIDE(__k_sched_lock_veneer = 0x1808eca9); -PROVIDE(__net_pkt_write_veneer = 0x1808ecb1); -PROVIDE(__net_if_ipv4_addr_lookup_veneer = 0x1808ecb9); -PROVIDE(__wlan_ret_11n_cfg_veneer = 0x1808ecc1); -PROVIDE(__wlan_update_rxreorder_tbl_veneer = 0x1808ecc9); -PROVIDE(__net_eth_carrier_on_veneer = 0x1808ecd1); -PROVIDE(__net_if_ipv6_dad_failed_veneer = 0x1808ecd9); -PROVIDE(__net_get_sta_handle_veneer = 0x1808ece1); -PROVIDE(__net_ipv4_broadcast_address_veneer = 0x1808ece9); -PROVIDE(__wifi_inject_frame_veneer = 0x1808ecf1); -PROVIDE(__wlan_show_devmcssupport_veneer = 0x1808ecf9); -PROVIDE(__wlan_11n_update_txbastream_tbl_tx_cnt_veneer = 0x1808ed01); -PROVIDE(__net_context_update_recv_wnd_veneer = 0x1808ed09); -PROVIDE(__wlan_cleanup_reorder_tbl_veneer = 0x1808ed11); -PROVIDE(__net_tcp_set_option_veneer = 0x1808ed19); -PROVIDE(__k_work_cancel_delayable_sync_veneer = 0x1808ed21); -PROVIDE(__POWER_DisableGDetVSensors_veneer = 0x1808ed29); -PROVIDE(__POWER_EnableGDetVSensors_veneer = 0x1808ed31); -PROVIDE(__OSA_SemaphoreCreate_veneer = 0x1808ed39); -PROVIDE(__OSA_TimeGetMsec_veneer = 0x1808ed41); -PROVIDE(__k_free_veneer = 0x1808ed49); -PROVIDE(__OSA_SemaphoreWait_veneer = 0x1808ed51); -PROVIDE(__wlan_clean_txrx_veneer = 0x1808ed59); -PROVIDE(__wifi_wmm_get_packet_cnt_veneer = 0x1808ed61); -PROVIDE(__z_impl_zsock_accept_veneer = 0x1808ed69); -PROVIDE(__net_context_sendto_veneer = 0x1808ed71); -PROVIDE(__z_work_submit_to_queue_veneer = 0x1808ed79); -PROVIDE(__wlan_wmm_get_ralist_node_veneer = 0x1808ed81); -PROVIDE(__z_impl_zsock_listen_veneer = 0x1808ed89); -PROVIDE(__net_if_ipv6_maddr_add_veneer = 0x1808ed91); -PROVIDE(__z_unpend_thread_no_timeout_veneer = 0x1808ed99); -PROVIDE(__z_impl_k_sem_give_veneer = 0x1808eda1); -PROVIDE(__k_thread_state_str_veneer = 0x1808eda9); -PROVIDE(__k_work_reschedule_veneer = 0x1808edb1); -PROVIDE(__net_if_ipv4_maddr_join_veneer = 0x1808edb9); -PROVIDE(__net_if_ipv4_set_netmask_by_addr_veneer = 0x1808edc1); -PROVIDE(__net_if_ipv6_get_global_addr_veneer = 0x1808edc9); -PROVIDE(__wifi_put_command_lock_veneer = 0x1808edd1); -PROVIDE(__z_init_thread_base_veneer = 0x1808edd9); -PROVIDE(__z_impl_k_queue_init_veneer = 0x1808ede1); -PROVIDE(__net_ipv6_unspecified_address_veneer = 0x1808ede9); -PROVIDE(__wlan_send_addba_veneer = 0x1808edf1); -PROVIDE(__net_if_ipv6_maddr_rm_veneer = 0x1808edf9); -PROVIDE(__z_impl_zsock_setsockopt_veneer = 0x1808ee01); -PROVIDE(__z_reschedule_irqlock_veneer = 0x1808ee09); -PROVIDE(__wlan_ralist_add_enh_veneer = 0x1808ee11); -PROVIDE(__z_sched_wake_thread_veneer = 0x1808ee19); -PROVIDE(__net_pkt_unref_veneer = 0x1808ee21); -PROVIDE(__z_impl_zsock_getsockopt_veneer = 0x1808ee29); -PROVIDE(__net_if_ipv6_addr_onlink_veneer = 0x1808ee31); -PROVIDE(__mlan_11n_update_bastream_tbl_veneer = 0x1808ee39); -PROVIDE(__net_if_ipv4_maddr_lookup_veneer = 0x1808ee41); -PROVIDE(__wlan_wmm_init_veneer = 0x1808ee49); -PROVIDE(__net_if_stats_reset_all_veneer = 0x1808ee51); -PROVIDE(__wlan_11n_update_txbastream_tbl_ampdu_supported_veneer = 0x1808ee59); -PROVIDE(__net_if_up_veneer = 0x1808ee61); -PROVIDE(__wifi_imu_get_task_lock_veneer = 0x1808ee69); -PROVIDE(__OSA_MutexDestroy_veneer = 0x1808ee71); -PROVIDE(__OSA_MutexLock_veneer = 0x1808ee79); -PROVIDE(__FLEXSPI_GetDefaultConfig_veneer = 0x1808ee81); -PROVIDE(__net_stop_dhcp_timer_veneer = 0x1808ee89); -PROVIDE(__wifi_get_command_buffer_veneer = 0x1808ee91); -PROVIDE(__net_if_ipv4_set_gw_veneer = 0x1808ee99); -PROVIDE(__net_wlan_deinit_veneer = 0x1808eea1); -PROVIDE(__move_thread_to_end_of_prio_q_veneer = 0x1808eea9); -PROVIDE(__OSA_MsgQGet_veneer = 0x1808eeb1); -PROVIDE(__OSA_TimerReset_veneer = 0x1808eeb9); -PROVIDE(__wlan_cmd_11n_cfg_veneer = 0x1808eec1); -PROVIDE(__wifi_set_packet_retry_count_veneer = 0x1808eec9); -PROVIDE(__z_impl_k_usleep_veneer = 0x1808eed1); -PROVIDE(__z_impl_net_if_get_by_index_veneer = 0x1808eed9); -PROVIDE(__net_ipv4_unspecified_address_veneer = 0x1808eee1); -PROVIDE(__wlan_ralist_del_enh_veneer = 0x1808eee9); -PROVIDE(__OSA_MemoryAllocate_veneer = 0x1808eef1); -PROVIDE(__net_pkt_get_info_veneer = 0x1808eef9); -PROVIDE(__k_work_schedule_for_queue_veneer = 0x1808ef01); -PROVIDE(__wifi_set_country_ie_ignore_veneer = 0x1808ef09); -PROVIDE(__OSA_TaskCreate_veneer = 0x1808ef11); -PROVIDE(__wlan_11n_get_txbastream_tbl_veneer = 0x1808ef19); -PROVIDE(__z_impl_net_addr_ntop_veneer = 0x1808ef21); -PROVIDE(__z_impl_zsock_close_veneer = 0x1808ef29); -PROVIDE(__k_work_delayable_busy_get_veneer = 0x1808ef31); -PROVIDE(__net_context_foreach_veneer = 0x1808ef39); -PROVIDE(__net_ipv4_create_full_veneer = 0x1808ef41); -PROVIDE(__net_configure_address_veneer = 0x1808ef49); -PROVIDE(__z_impl_k_thread_resume_veneer = 0x1808ef51); -PROVIDE(__wlan_11n_update_txbastream_tbl_tx_thresh_veneer = 0x1808ef59); -PROVIDE(__net_if_need_calc_tx_checksum_veneer = 0x1808ef61); -PROVIDE(__net_if_ipv6_addr_add_veneer = 0x1808ef69); -PROVIDE(__net_if_ipv6_prefix_lookup_veneer = 0x1808ef71); -PROVIDE(__net_ipaddr_parse_veneer = 0x1808ef79); -PROVIDE(__gen_tx_pkt_from_data_veneer = 0x1808ef81); -PROVIDE(__z_thread_abort_veneer = 0x1808ef89); -PROVIDE(__SystemCoreClockUpdate_veneer = 0x10068929); -PROVIDE(__CLOCK_AttachClk_veneer = 0x10068931); -PROVIDE(__SystemInit_veneer = 0x10068939); -PROVIDE(__CLOCK_InitT3RefClk_veneer = 0x10068941); -PROVIDE(__RESET_PeripheralReset_veneer = 0x10068949); -PROVIDE(__CLOCK_InitAvPll_veneer = 0x10068951); -PROVIDE(__CLOCK_SetFRGClock_veneer = 0x10068959); -PROVIDE(__CLOCK_SetClkDiv_veneer = 0x10068961); -PROVIDE(__CLOCK_EnableClock_veneer = 0x10068969); -PROVIDE(__CLOCK_InitTcpuRefClk_veneer = 0x10068971); -PROVIDE(__CLOCK_GetFlexspiClkFreq_veneer = 0x10068979); -PROVIDE(__CLOCK_InitTddrRefClk_veneer = 0x10068981); -PROVIDE(__CLOCK_EnableUsbhsPhyClock_veneer = 0x10068989); -PROVIDE(____assert_no_args_veneer = 0x10068991); -PROVIDE(__wlan_prepare_mac_control_cmd_veneer = 0x10067799); -PROVIDE(__wifi_cau_temperature_write_to_firmware_veneer = 0x100677a1); -PROVIDE(__CACHE64_InvalidateCacheByRange_veneer = 0x100677a9); -PROVIDE(__k_heap_alloc_veneer = 0x100677b1); -PROVIDE(__net_ipv6_mld_leave_veneer = 0x100677b9); -PROVIDE(__z_reset_time_slice_veneer = 0x100677c1); -PROVIDE(__z_spin_lock_valid_veneer = 0x100677c9); -PROVIDE(__z_impl_k_timer_stop_veneer = 0x100677d1); -PROVIDE(__mlan_subsys_init_veneer = 0x100677d9); -PROVIDE(__z_impl_k_event_init_veneer = 0x100677e1); -PROVIDE(__net_arp_clear_pending_veneer = 0x100677e9); -PROVIDE(__wifi_uap_set_bandwidth_veneer = 0x100677f1); -PROVIDE(__pinctrl_lookup_state_veneer = 0x100677f9); -PROVIDE(__z_log_msg_runtime_vcreate_veneer = 0x10067801); -PROVIDE(__wifi_handle_fw_event_veneer = 0x10067809); -PROVIDE(__net_icmp_cleanup_ctx_veneer = 0x10067811); -PROVIDE(__net_timeout_set_veneer = 0x10067819); -PROVIDE(__net_icmpv4_finalize_veneer = 0x10067821); -PROVIDE(__wifi_mem_malloc_cmdrespbuf_veneer = 0x10067829); -PROVIDE(__z_impl_k_uptime_ticks_veneer = 0x10067831); -PROVIDE(__strncpy_veneer = 0x10067839); -PROVIDE(__sb3_fw_download_veneer = 0x10067841); -PROVIDE(__net_mgmt_del_event_callback_veneer = 0x10067849); -PROVIDE(__region_string_2_region_code_veneer = 0x10067851); -PROVIDE(__mlan_subsys_deinit_veneer = 0x10067859); -PROVIDE(__net_mgmt_event_notify_with_info_veneer = 0x10067861); -PROVIDE(__z_handle_obj_poll_events_veneer = 0x10067869); -PROVIDE(__snprintf_veneer = 0x10067871); -PROVIDE(__wlan_bypass_802dot11_mgmt_pkt_veneer = 0x10067879); -PROVIDE(__z_impl_sys_rand_get_veneer = 0x10067881); -PROVIDE(__z_thread_monitor_exit_veneer = 0x10067889); -PROVIDE(__wifi_set_mac_multicast_addr_veneer = 0x10067891); -PROVIDE(__net_buf_simple_max_len_veneer = 0x10067899); -PROVIDE(__assert_print_veneer = 0x100678a1); -PROVIDE(__wrapper_wlan_sta_ampdu_enable_veneer = 0x100678a9); -PROVIDE(__net_buf_simple_add_veneer = 0x100678b1); -PROVIDE(__net_ipv6_mld_init_veneer = 0x100678b9); -PROVIDE(____aeabi_read_tp_veneer = 0x100678c1); -PROVIDE(__wifi_prepare_get_hw_spec_cmd_veneer = 0x100678c9); -PROVIDE(__zvfs_get_fd_obj_and_vtable_veneer = 0x100678d1); -PROVIDE(__arch_new_thread_veneer = 0x100678d9); -PROVIDE(__sys_timepoint_timeout_veneer = 0x100678e1); -PROVIDE(__k_heap_aligned_alloc_veneer = 0x100678e9); -PROVIDE(__net_arp_prepare_veneer = 0x100678f1); -PROVIDE(____stack_chk_fail_veneer = 0x100678f9); -PROVIDE(__net_mgmt_add_event_callback_veneer = 0x10067901); -PROVIDE(__net_icmpv4_init_veneer = 0x10067909); -PROVIDE(__net_buf_simple_reserve_veneer = 0x10067911); -PROVIDE(__net_icmpv4_input_veneer = 0x10067919); -PROVIDE(__wifi_prepare_and_send_cmd_veneer = 0x10067921); -PROVIDE(__wlan_set_mac_addr_veneer = 0x10067929); -PROVIDE(__net_ipv4_igmp_input_veneer = 0x10067931); -PROVIDE(__z_impl_device_get_binding_veneer = 0x10067939); -PROVIDE(__dns_dispatcher_init_veneer = 0x10067941); -PROVIDE(__memcpy_veneer = 0x10067949); -PROVIDE(__wlan_get_mac_address_uap_veneer = 0x10067951); -PROVIDE(__dns_resolve_get_default_veneer = 0x10067959); -PROVIDE(__z_impl_k_event_wait_veneer = 0x10067961); -PROVIDE(__is_sta_ipv6_connected_veneer = 0x10067969); -PROVIDE(__net_icmpv6_send_error_veneer = 0x10067971); -PROVIDE(__z_impl_device_is_ready_veneer = 0x10067979); -PROVIDE(__net_shell_init_veneer = 0x10067981); -PROVIDE(__net_ipv6_nbr_rm_veneer = 0x10067989); -PROVIDE(__net_dhcpv4_init_veneer = 0x10067991); -PROVIDE(__z_spin_lock_set_owner_veneer = 0x10067999); -PROVIDE(__net_mgmt_NET_REQUEST_ETHERNET_SET_TXINJECTION_MODE_veneer = 0x100679a1); -PROVIDE(__assert_post_action_veneer = 0x100679a9); -PROVIDE(__net_ipv4_igmp_join_veneer = 0x100679b1); -PROVIDE(__wifi_send_remain_on_channel_cmd_veneer = 0x100679b9); -PROVIDE(__strtoul_veneer = 0x100679c1); -PROVIDE(__net_icmp_init_ctx_veneer = 0x100679c9); -PROVIDE(__net_hostname_init_veneer = 0x100679d1); -PROVIDE(__pinctrl_configure_pins_veneer = 0x100679d9); -PROVIDE(__wifi_check_last_packet_indication_veneer = 0x100679e1); -PROVIDE(__wlan_band_to_radio_type_veneer = 0x100679e9); -PROVIDE(__wrapper_wlan_cmd_11n_cfg_veneer = 0x100679f1); -PROVIDE(__net_route_packet_veneer = 0x100679f9); -PROVIDE(__wifi_get_firmware_ver_ext_from_cmdresp_veneer = 0x10067a01); -PROVIDE(__strncmp_veneer = 0x10067a09); -PROVIDE(__k_heap_free_veneer = 0x10067a11); -PROVIDE(__wlan_use_non_default_ht_vht_cap_veneer = 0x10067a19); -PROVIDE(__net_buf_simple_add_mem_veneer = 0x10067a21); -PROVIDE(__ethernet_mgmt_raise_carrier_on_event_veneer = 0x10067a29); -PROVIDE(__socket_service_init_veneer = 0x10067a31); -PROVIDE(__strlen_veneer = 0x10067a39); -PROVIDE(__net_icmpv6_init_veneer = 0x10067a41); -PROVIDE(__POWER_GetWakeupStatus_veneer = 0x10067a49); -PROVIDE(__wifi_get_value1_from_cmdresp_veneer = 0x10067a51); -PROVIDE(__net_ipv4_igmp_init_veneer = 0x10067a59); -PROVIDE(__shell_help_veneer = 0x10067a61); -PROVIDE(__z_timeout_remaining_veneer = 0x10067a69); -PROVIDE(__z_impl_k_event_wait_all_veneer = 0x10067a71); -PROVIDE(__wlan_wlcmgr_send_msg_veneer = 0x10067a79); -PROVIDE(__net_route_packet_if_veneer = 0x10067a81); -PROVIDE(__memcmp_veneer = 0x10067a89); -PROVIDE(__wifi_get_mac_address_from_cmdresp_veneer = 0x10067a91); -PROVIDE(__z_impl_net_socket_service_register_veneer = 0x10067a99); -PROVIDE(__net_arp_init_veneer = 0x10067aa1); -PROVIDE(__net_dhcpv4_stop_veneer = 0x10067aa9); -PROVIDE(__net_mgmt_event_init_veneer = 0x10067ab1); -PROVIDE(__memchr_veneer = 0x10067ab9); -PROVIDE(__wifi_free_eventbuf_veneer = 0x10067ac1); -PROVIDE(__net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_FILTER_veneer = 0x10067ac9); -PROVIDE(__printk_veneer = 0x10067ad1); -PROVIDE(__z_impl_k_thread_abort_veneer = 0x10067ad9); -PROVIDE(__sys_timepoint_calc_veneer = 0x10067ae1); -PROVIDE(__wlan_add_ext_capa_info_ie_veneer = 0x10067ae9); -PROVIDE(__dns_init_resolver_veneer = 0x10067af1); -PROVIDE(__wifi_prepare_get_mac_addr_cmd_veneer = 0x10067af9); -PROVIDE(__ethernet_mgmt_raise_carrier_off_event_veneer = 0x10067b01); -PROVIDE(__net_ipv6_start_dad_veneer = 0x10067b09); -PROVIDE(__wrapper_bssdesc_first_set_veneer = 0x10067b11); -PROVIDE(__net_icmpv6_input_veneer = 0x10067b19); -PROVIDE(__wifi_pmip_v33_enable_veneer = 0x10067b21); -PROVIDE(__wifi_prepare_get_value1_veneer = 0x10067b29); -PROVIDE(__wlan_ret_get_hw_spec_veneer = 0x10067b31); -PROVIDE(__power_off_device_veneer = 0x10067b39); -PROVIDE(__wifi_prepare_set_cal_data_cmd_veneer = 0x10067b41); -PROVIDE(__wifi_malloc_eventbuf_veneer = 0x10067b49); -PROVIDE(__net_icmpv4_send_error_veneer = 0x10067b51); -PROVIDE(__net_icmp_send_echo_request_veneer = 0x10067b59); -PROVIDE(__k_heap_realloc_veneer = 0x10067b61); -PROVIDE(__POWER_ClearWakeupStatus_veneer = 0x10067b69); -PROVIDE(__wlan_process_rx_packet_veneer = 0x10067b71); -PROVIDE(__zvfs_close_veneer = 0x10067b79); -PROVIDE(__z_abort_timeout_veneer = 0x10067b81); -PROVIDE(__wlan_scan_networks_veneer = 0x10067b89); -PROVIDE(__wifi_nm_iface_is_sta_veneer = 0x10067b91); -PROVIDE(__z_impl_k_event_clear_veneer = 0x10067b99); -PROVIDE(__z_impl_k_event_set_veneer = 0x10067ba1); -PROVIDE(__net_ipv6_start_rs_veneer = 0x10067ba9); -PROVIDE(__wifi_prepare_get_fw_ver_ext_cmd_veneer = 0x10067bb1); -PROVIDE(__k_timer_init_veneer = 0x10067bb9); -PROVIDE(__net_buf_simple_init_with_data_veneer = 0x10067bc1); -PROVIDE(__wlan_11ac_bandconfig_allowed_veneer = 0x10067bc9); -PROVIDE(__z_thread_entry_veneer = 0x10067bd1); -PROVIDE(__arch_float_disable_veneer = 0x10067bd9); -PROVIDE(__net_ipv6_nbr_reachability_hint_veneer = 0x10067be1); -PROVIDE(__net_icmpv6_finalize_veneer = 0x10067be9); -PROVIDE(__z_impl_k_timer_start_veneer = 0x10067bf1); -PROVIDE(__net_buf_simple_headroom_veneer = 0x10067bf9); -PROVIDE(__net_dhcpv4_restart_veneer = 0x10067c01); -PROVIDE(__strrchr_veneer = 0x10067c09); -PROVIDE(__net_route_init_veneer = 0x10067c11); -PROVIDE(__net_route_get_info_veneer = 0x10067c19); -PROVIDE(__net_ipv6_nbr_init_veneer = 0x10067c21); -PROVIDE(__net_buf_simple_pull_veneer = 0x10067c29); -PROVIDE(__strtol_veneer = 0x10067c31); -PROVIDE(__arch_tls_stack_setup_veneer = 0x10067c39); -PROVIDE(__z_impl_k_event_post_veneer = 0x10067c41); -PROVIDE(__strchr_veneer = 0x10067c49); -PROVIDE(__wrapper_get_wpa_ie_in_assoc_veneer = 0x10067c51); -PROVIDE(__wrapper_bssdesc_second_set_veneer = 0x10067c59); -PROVIDE(__net_timeout_evaluate_veneer = 0x10067c61); -PROVIDE(__wifi_prepare_set_mac_addr_cmd_veneer = 0x10067c69); -PROVIDE(__wrapper_deliver_amsdu_subframe_veneer = 0x10067c71); -PROVIDE(____aeabi_uldivmod_veneer = 0x10067c79); -PROVIDE(__wlan_set_regiontable_veneer = 0x10067c81); -PROVIDE(__net_buf_simple_tailroom_veneer = 0x10067c89); -PROVIDE(__strncasecmp_veneer = 0x10067c91); -PROVIDE(__net_ipv6_prepare_for_send_veneer = 0x10067c99); -PROVIDE(__net_ipv4_igmp_leave_veneer = 0x10067ca1); -PROVIDE(__memset_veneer = 0x10067ca9); -PROVIDE(__z_spin_unlock_valid_veneer = 0x10067cb1); -PROVIDE(__wrapper_wlan_uap_ampdu_enable_veneer = 0x10067cb9); -PROVIDE(__wifi_process_cmd_response_veneer = 0x10067cc1); -PROVIDE(__wlan_get_mac_address_veneer = 0x10067cc9); -PROVIDE(__sys_clock_tick_get_32_veneer = 0x10067cd1); -PROVIDE(__net_ipv6_mld_join_veneer = 0x10067cd9); -PROVIDE(__get_ecsa_block_tx_flag_veneer = 0x10067ce1); -PROVIDE(__net_dhcpv4_server_init_veneer = 0x10067ce9); -PROVIDE(__net_dhcpv4_accept_unicast_veneer = 0x10067cf1); -PROVIDE(__z_add_timeout_veneer = 0x10067cf9); -PROVIDE(__wlan_prepare_cmd_veneer = 0x10067d01); -PROVIDE(__wrapper_wlan_handle_rx_packet_veneer = 0x10067d09); -PROVIDE(__net_arp_clear_cache_veneer = 0x10067d11); -PROVIDE(__shell_fprintf_impl_veneer = 0x10067d19); -PROVIDE(__memmove_veneer = 0x10067d21); -PROVIDE(__wifi_cau_temperature_enable_veneer = 0x10067d29); -PROVIDE(__CLOCK_EnableClock_veneer = 0x10067d31); -PROVIDE(__wifi_nm_iface_is_sap_veneer = 0x10067d39); -PROVIDE(____assert_no_args_veneer = 0x10067d41); +PROVIDE(HAL_RpmsgGetTxBuf = 0x10044299); +PROVIDE(HAL_ImuSendMsgBlockingCommon.constprop.0 = 0x10043e51); +PROVIDE(HAL_ImuSendSyncAck.isra.0 = 0x100440cd); +PROVIDE(HAL_RpmsgPutTxBuf.isra.0 = 0x10044545); +PROVIDE(HAL_ImuPutWlanTxBuf.isra.0 = 0x100435bd); +PROVIDE(HAL_ImuSendRpmsgFreeBuf = 0x10044065); +PROVIDE(HAL_ImuSendRpmsgEptQuiryRsp = 0x10043fed); +PROVIDE(HAL_ImuMainCpu23 = 0x10043559); +PROVIDE(HAL_ImuMainCpu13 = 0x100434f1); +PROVIDE(__FUNCTION__.0 = 0x18096f0c); +PROVIDE(reassembly_cancel = 0x100474bd); +PROVIDE(reassembly_timeout = 0x10047545); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10047571); +PROVIDE(reassembly_cancel = 0x100485f9); +PROVIDE(reassembly_timeout = 0x10048689); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100486b5); +PROVIDE(init_mem_slab_obj_core_list = 0x10048a7d); +PROVIDE(memc_flexspi_init = 0x10048f39); +PROVIDE(memc_flexspi_pm_action = 0x100490a1); +PROVIDE(wlan_check_chan_width_ht40_by_region.isra.0 = 0x10049c29); +PROVIDE(wlan_send_delba_to_entry_in_txbastream_tbl = 0x1004a22d); +PROVIDE(wlan_11n_dispatch_pkt.constprop.0.isra.0 = 0x1004ad35); +PROVIDE(wlan_11n_dispatch_pkt_until_start_win = 0x1004adc9); +PROVIDE(wlan_flush_data = 0x1004b0e5); +PROVIDE(wlan_11n_delete_rxreorder_tbl_entry = 0x1004ac1d); +PROVIDE(wlan_11n_create_rxreorder_tbl = 0x1004aae1); +PROVIDE(gen_pkt_from_data_for_zerocopy = 0x1004cbb9); +PROVIDE(net_clear_ipv6_ll_address = 0x1004d011); +PROVIDE(dhcp_timer_cb = 0x1004cb8d); +PROVIDE(wifi_net_event_handler = 0x1004d839); +PROVIDE(net_context_get_family.part.0 = 0x1004ea61); +PROVIDE(net_context_get_iface.part.0 = 0x1004ea95); +PROVIDE(net_context_set_iface.part.0 = 0x1004f2bd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1004f621); +PROVIDE(recheck_port.part.0 = 0x1004f5e5); +PROVIDE(check_used_port.constprop.0 = 0x1004da51); +PROVIDE(find_available_port = 0x1004e051); +PROVIDE(bind_default = 0x1004d9c9); +PROVIDE(context_sendto = 0x1004dbf1); +PROVIDE(net_init = 0x1004f641); +PROVIDE(net_stats_update_processing_error.part.0 = 0x1004f78d); +PROVIDE(processing_data = 0x1004fb25); +PROVIDE(iface_router_lookup = 0x100503e1); +PROVIDE(iface_router_update_timer = 0x10050571); +PROVIDE(iface_router_add = 0x100500dd); +PROVIDE(dad_timeout = 0x1004fdc1); +PROVIDE(need_calc_checksum = 0x100507d5); +PROVIDE(net_if_lock.part.0 = 0x10053c7d); +PROVIDE(net_if_unlock.part.0 = 0x100547d1); +PROVIDE(net_context_get_iface.part.0 = 0x10050841); +PROVIDE(iface_router_find_default.constprop.0 = 0x10050361); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100556e1); +PROVIDE(join_mcast_allnodes.part.0 = 0x10050645); +PROVIDE(iface_router_expired = 0x10050269); +PROVIDE(iface_router_rm = 0x10050479); +PROVIDE(join_mcast_nodes.part.0 = 0x100506ed); +PROVIDE(ipv4_is_broadcast_address = 0x100505e9); +PROVIDE(if_ipv4_get_addr = 0x10050069); +PROVIDE(net_if_ipv4_get_best_match = 0x10051b59); +PROVIDE(get_ifaddr = 0x1004fee5); +PROVIDE(net_if_ipv6_get_best_match = 0x10052b31); +PROVIDE(rs_timeout = 0x10054d89); +PROVIDE(net_if_ipv4_set_netmask_deprecated = 0x10052405); +PROVIDE(remove_prefix_addresses = 0x10054d09); +PROVIDE(prefix_lifetime_timeout = 0x10054b05); +PROVIDE(update_operational_state = 0x10054ef9); +PROVIDE(address_lifetime_timeout = 0x1004fc3d); +PROVIDE(clone_pkt_attributes = 0x10055701); +PROVIDE(pkt_cursor_jump = 0x10056ad1); +PROVIDE(pkt_cursor_update = 0x10056b0d); +PROVIDE(pkt_alloc = 0x10056921); +PROVIDE(pkt_alloc_buffer.constprop.0 = 0x10056981); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10056b69); +PROVIDE(net_pkt_cursor_operate = 0x10056045); +PROVIDE(pkt_alloc_with_buffer = 0x10056a45); +PROVIDE(net_pkt_clone_internal = 0x10055cf9); +PROVIDE(net_tc_tx_stats_priority_setup = 0x10056d0d); +PROVIDE(tc_tx_handler = 0x10056d51); +PROVIDE(tc_rx_handler = 0x10056d21); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10056d81); +PROVIDE(net_tc_rx_stats_priority_setup = 0x10056c39); +PROVIDE(timer_callback_work_handler = 0x1005707d); +PROVIDE(timer_callback = 0x10057059); +PROVIDE(queue_insert = 0x100573c1); +PROVIDE(unready_thread = 0x10057dfd); +PROVIDE(add_to_waitq_locked = 0x10057889); +PROVIDE(unpend_thread_no_timeout.part.0 = 0x10057dd9); +PROVIDE(ready_thread = 0x10057ce9); +PROVIDE(z_tick_sleep = 0x100594f1); +PROVIDE(zvfs_fdtable_call_ioctl = 0x1005a2e9); +PROVIDE(tcp_cleanup_recv_queue = 0x1005b249); +PROVIDE(tcp_pkt_append = 0x1005d369); +PROVIDE(net_context_get_family.part.0 = 0x1005a38d); +PROVIDE(net_context_set_state.part.0 = 0x1005a3f5); +PROVIDE(net_stats_update_tcp_seg_recv.part.0 = 0x1005a429); +PROVIDE(tcp_send_timer_cancel.part.0 = 0x1005df91); +PROVIDE(net_context_get_iface.part.0 = 0x1005a3c1); +PROVIDE(is_destination_local = 0x1005a309); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1005e459); +PROVIDE(th_get = 0x1005e2f9); +PROVIDE(tcp_data_len = 0x1005b5c1); +PROVIDE(tcp_send = 0x1005d9c9); +PROVIDE(tcp_send_process_no_lock = 0x1005dd05); +PROVIDE(tcp_endpoint_set = 0x1005b609); +PROVIDE(tcp_unsent_len = 0x1005e181); +PROVIDE(tcp_conn_release = 0x1005b329); +PROVIDE(tcp_conn_close.isra.0 = 0x1005b285); +PROVIDE(tcp_send_process = 0x1005dccd); +PROVIDE(tcp_last_ack_timeout = 0x1005d0a1); +PROVIDE(tcp_timewait_timeout = 0x1005e175); +PROVIDE(tcp_fin_timeout = 0x1005b6d1); +PROVIDE(tcp_resend_data = 0x1005d77d); +PROVIDE(tcp_send_zwp = 0x1005e00d); +PROVIDE(tcp_send_ack = 0x1005da41); +PROVIDE(tcp_recv = 0x1005d445); +PROVIDE(tcp_out_ext = 0x1005d159); +PROVIDE(tcp_send_data = 0x1005da71); +PROVIDE(tcp_short_window = 0x1005e0d5); +PROVIDE(tcp_update_recv_wnd = 0x1005e1ed); +PROVIDE(tcp_data_get = 0x1005b48d); +PROVIDE(tcp_send_queued_data.part.0 = 0x1005de7d); +PROVIDE(tcp_new_reno_init = 0x1005d0ad); +PROVIDE(tcp_in = 0x1005b6dd); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1005f749); +PROVIDE(parse_ipv4 = 0x1005f1ed); +PROVIDE(wifi_utils_map_band_str_to_idx = 0x1804dce5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1005f729); +PROVIDE(imu_fw_is_hang = 0x1005f80d); +PROVIDE(wlan_wait_for_last_resp_rcvd = 0x10060655); +PROVIDE(__FUNCTION__.1 = 0x180976b8); +PROVIDE(wlan_get_fw_ver_ext.isra.0 = 0x10060475); +PROVIDE(wlan_decode_rx_packet.isra.0 = 0x10060321); +PROVIDE(__FUNCTION__.0 = 0x180976a4); +PROVIDE(wifi_drv_task = 0x10060f15); +PROVIDE(wifi_low_level_input = 0x10061929); +PROVIDE(notify_wifi_driver_tx_event = 0x1006095d); +PROVIDE(wifi_core_deinit = 0x10060d75); +PROVIDE(wifi_powersave_task = 0x10061a8d); +PROVIDE(wifi_scan_task = 0x10061e21); +PROVIDE(wifi_drv_tx_task = 0x10060f75); +PROVIDE(handle_flush = 0x100624f1); +PROVIDE(work_queue_main = 0x100636f9); +PROVIDE(cancel_async_locked = 0x10062469); +PROVIDE(submit_to_queue_locked = 0x10063565); +PROVIDE(work_timeout = 0x10063925); +PROVIDE(work_flush_locked = 0x1006364d); +PROVIDE(zperf_init = 0x10063be9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10063ab9); +PROVIDE(zperf_session_reset.part.0 = 0x10064021); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10063fb5); +PROVIDE(cmd_version = 0x10064395); +PROVIDE(print_number = 0x100646ad); +PROVIDE(cmd_connectap = 0x1006406d); +PROVIDE(cmd_tcp = 0x10064119); +PROVIDE(shell_cmd_download = 0x100647f5); +PROVIDE(parse_arg = 0x100645ed); +PROVIDE(ping_handler = 0x100646a1); +PROVIDE(cmd_setip = 0x10064081); +PROVIDE(cmd_udp_download_stop = 0x10064351); +PROVIDE(cmd_tcp_download_stop = 0x10064211); +PROVIDE(cmd_udp_download = 0x10064261); +PROVIDE(udp_session_cb = 0x10065475); +PROVIDE(parse_number.constprop.0 = 0x1006465d); +PROVIDE(print_number_64.constprop.0 = 0x1006471d); +PROVIDE(tcp_session_cb = 0x10065229); +PROVIDE(shell_tcp_upload_print_stats = 0x10064edd); +PROVIDE(shell_udp_upload_print_stats = 0x10064fed); +PROVIDE(udp_upload_cb = 0x100655e9); +PROVIDE(execute_upload = 0x100643b9); +PROVIDE(tcp_upload_cb = 0x10065341); +PROVIDE(shell_cmd_upload = 0x1006487d); +PROVIDE(cmd_udp_upload = 0x10064385); +PROVIDE(cmd_tcp_upload = 0x10064245); +PROVIDE(shell_cmd_upload2 = 0x10064c05); +PROVIDE(cmd_udp_upload2 = 0x1006438d); +PROVIDE(cmd_tcp_upload2 = 0x1006424d); +PROVIDE(cmd_udp = 0x10064255); +PROVIDE(cmd_tcp_download = 0x10064125); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10065ad9); +PROVIDE(tcp_bind_listen_connection = 0x1006560d); +PROVIDE(tcp_receiver_cleanup = 0x100656c9); +PROVIDE(tcp_svc_handler = 0x10065735); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10066089); +PROVIDE(tcp_upload = 0x10065dd1); +PROVIDE(tcp_upload_async_work = 0x10065f79); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x100665b1); +PROVIDE(zperf_receiver_send_stat.constprop.0 = 0x100665d1); +PROVIDE(udp_receiver_cleanup = 0x10066171); +PROVIDE(udp_svc_handler = 0x10066221); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x10066ab1); +PROVIDE(udp_upload_async_work = 0x10066a7d); +PROVIDE(cmd_kernel_uptime = 0x18029ff1); +PROVIDE(zvfs_eventfd_ioctl_op = 0x1803ba55); +PROVIDE(zvfs_eventfd_close_op = 0x1803bc1d); +PROVIDE(zvfs_eventfd_rw_op = 0x1803be41); +PROVIDE(zvfs_eventfd_write_op = 0x1803c135); +PROVIDE(zvfs_eventfd_write_locked = 0x1803c14d); +PROVIDE(zvfs_eventfd_read_op = 0x1803c141); +PROVIDE(zvfs_eventfd_read_locked = 0x1802a219); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803d455); +PROVIDE(llext_copy_region = 0x1802a281); +PROVIDE(inet_is_supported = 0x1803f225); +PROVIDE(zsock_recv_stream_immediate = 0x1803f231); +PROVIDE(zsock_received_cb = 0x1803f35d); +PROVIDE(ipv4_multicast_group = 0x1803f3e1); +PROVIDE(ipv6_multicast_group = 0x1803f45d); +PROVIDE(zsock_socket_internal = 0x1803f4d1); +PROVIDE(zsock_connected_cb = 0x1803f569); +PROVIDE(net_context_get_type.part.0 = 0x1803f57d); +PROVIDE(net_context_get_state.part.0 = 0x1803f5b1); +PROVIDE(zsock_flush_queue = 0x1803f5e5); +PROVIDE(net_context_get_family.part.0 = 0x1803f631); +PROVIDE(zsock_accepted_cb = 0x1803f665); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803f6b1); +PROVIDE(sock_ioctl_vmeth = 0x1803f6d5); +PROVIDE(send_check_and_wait = 0x1803f8e1); +PROVIDE(sock_bind_vmeth = 0x1803fa39); +PROVIDE(sock_close2_vmeth = 0x1803faf1); +PROVIDE(sock_shutdown_vmeth = 0x1803fb65); +PROVIDE(sock_connect_vmeth = 0x1803fc49); +PROVIDE(sock_listen_vmeth = 0x1803fc91); +PROVIDE(sock_sendto_vmeth = 0x1803fc95); +PROVIDE(sock_write_vmeth = 0x1803fc99); +PROVIDE(sock_sendmsg_vmeth = 0x1803fd75); +PROVIDE(sock_accept_vmeth = 0x1803ff05); +PROVIDE(zsock_recv_dgram = 0x1803ff09); +PROVIDE(zsock_recv_stream = 0x18040269); +PROVIDE(sock_recvfrom_vmeth = 0x180404c1); +PROVIDE(sock_read_vmeth = 0x180404c5); +PROVIDE(sock_recvmsg_vmeth = 0x18040585); +PROVIDE(sock_getsockopt_vmeth = 0x18040859); +PROVIDE(sock_setsockopt_vmeth = 0x18040d05); +PROVIDE(sock_getpeername_vmeth = 0x18040dbd); +PROVIDE(sock_getsockname_vmeth = 0x18040e45); +PROVIDE(cmd_net_tcp = 0x18047291); +PROVIDE(cmd_net_tcp_close = 0x18047295); +PROVIDE(cmd_net_tcp_recv = 0x18047309); +PROVIDE(tcp_recv_cb = 0x18047379); +PROVIDE(cmd_net_tcp_send = 0x1802a521); +PROVIDE(tcp_sent_cb = 0x1804743d); +PROVIDE(tcp_connected = 0x18047459); +PROVIDE(cmd_net_tcp_connect = 0x18047489); +PROVIDE(arp_entry_cleanup = 0x18048415); +PROVIDE(arp_request_timeout = 0x18048449); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18048525); +PROVIDE(arp_entry_get_last_from_table = 0x18048549); +PROVIDE(arp_recv = 0x18048ab1); +PROVIDE(icmp_call_handlers = 0x1804e9a1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1804ea19); +PROVIDE(net_icmp_send_echo_request_timeout = 0x1804ea3d); +PROVIDE(net_stats_update_icmp_sent.part.0 = 0x1804ef09); +PROVIDE(net_stats_update_icmp_drop.part.0 = 0x1804ef39); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1804ef69); +PROVIDE(icmpv4_reply_to_options = 0x1804ef89); +PROVIDE(icmpv4_handle_echo_request = 0x1804f2e1); +PROVIDE(net_stats_update_ipv4_igmp_drop.part.0 = 0x1804f699); +PROVIDE(igmp_v2_create_packet = 0x1804f6cd); +PROVIDE(igmp_send = 0x1804f781); +PROVIDE(igmp_send_generic = 0x1802abf9); +PROVIDE(net_stats_update_icmp_sent.part.0 = 0x1804f931); +PROVIDE(net_stats_update_icmp_drop.part.0 = 0x1804f961); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1804f991); +PROVIDE(icmpv6_handle_echo_request = 0x1804f9b1); +PROVIDE(ipv6_nd_restart_reachable_timer = 0x1804fedd); +PROVIDE(read_llao = 0x1804ffcd); +PROVIDE(ipv6_nbr_set_state = 0x18050011); +PROVIDE(nbr_init = 0x1805007d); +PROVIDE(net_stats_update_ipv6_nd_drop.part.0 = 0x180500e5); +PROVIDE(net_stats_update_icmp_sent.part.0 = 0x18050115); +PROVIDE(net_stats_update_ipv6_nd_sent.part.0 = 0x18050145); +PROVIDE(net_stats_update_ipv6_nd_recv.part.0 = 0x18050175); +PROVIDE(nbr_lookup.constprop.0 = 0x180501a5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x180501f5); +PROVIDE(iface_cb = 0x18050219); +PROVIDE(ipv6_ns_reply_timeout = 0x1802b021); +PROVIDE(add_nbr = 0x1805035d); +PROVIDE(handle_na_input = 0x18050481); +PROVIDE(handle_ra_input = 0x18050a79); +PROVIDE(handle_ns_input = 0x180511e9); +PROVIDE(ipv6_nd_reachable_timeout = 0x180517a9); +PROVIDE(mld_create_packet = 0x18051a1d); +PROVIDE(mld_create = 0x18051b15); +PROVIDE(net_stats_update_ipv6_mld_drop.part.0 = 0x18051b65); +PROVIDE(mld_send = 0x18051b99); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18051c95); +PROVIDE(handle_mld_query = 0x18051cb9); +PROVIDE(dhcpv4_start_internal = 0x18052b91); +PROVIDE(dhcpv4_add_option_length_value = 0x18052ca1); +PROVIDE(dhcpv4_iface_event_handler = 0x18052ced); +PROVIDE(net_dhcpv4_state_name.part.0 = 0x18052dd1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18052df9); +PROVIDE(dhcpv4_option_callback_get_unique_types = 0x18052e19); +PROVIDE(dhcpv4_create_message = 0x1802b881); +PROVIDE(dhcpv4_update_message_timeout = 0x18052ead); +PROVIDE(dhcpv4_send_discover = 0x18052f55); +PROVIDE(dhcpv4_send_request = 0x18052fe5); +PROVIDE(dhcpv4_timeout = 0x1805321d); +PROVIDE(dhcpv4_enter_bound = 0x180534d9); +PROVIDE(net_dhcpv4_input = 0x180535ad); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18055815); +PROVIDE(mcux_flexcomm_transfer = 0x1802bc11); +PROVIDE(mcux_flexcomm_master_transfer_callback = 0x180584a1); +PROVIDE(mcux_flexcomm_configure = 0x180584ad); +PROVIDE(mcux_flexcomm_config_func_0 = 0x18058511); +PROVIDE(mcux_flexcomm_isr = 0x18058529); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18058535); +PROVIDE(mcux_flexcomm_init = 0x18058555); +PROVIDE(spi_mcux_config_func_0 = 0x18058dd1); +PROVIDE(spi_mcux_isr = 0x18058de9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18058df5); +PROVIDE(spi_mcux_transfer_next_packet.isra.0 = 0x18058e15); +PROVIDE(spi_mcux_transfer_callback = 0x18058f19); +PROVIDE(spi_mcux_release = 0x1805901d); +PROVIDE(spi_mcux_transceive = 0x1802bce9); +PROVIDE(spi_mcux_init = 0x18059095); +PROVIDE(wrapper_moal_init_lock = 0x18064925); +PROVIDE(wrapper_moal_semaphore_put = 0x18064929); +PROVIDE(wrapper_moal_semaphore_get = 0x1806493d); +PROVIDE(wrapper_moal_free_semaphore = 0x18064951); +PROVIDE(wrapper_moal_init_semaphore = 0x18064965); +PROVIDE(wrapper_moal_recv_packet = 0x18064985); +PROVIDE(wrapper_moal_stop_timer = 0x180649e5); +PROVIDE(wrapper_moal_reset_timer = 0x18064a0d); +PROVIDE(wrapper_moal_start_timer = 0x18064a35); +PROVIDE(wrapper_moal_free_timer = 0x18064a91); +PROVIDE(wrapper_moal_init_timer = 0x18064ab9); +PROVIDE(wrapper_moal_spin_lock = 0x18064af1); +PROVIDE(wrapper_moal_spin_unlock = 0x18064af5); +PROVIDE(wrapper_moal_free_lock = 0x18064af9); +PROVIDE(wait_for = 0x18078f39); +PROVIDE(remove_timeout = 0x1807983d); +PROVIDE(mulShift64 = 0x1807d405); +PROVIDE(loader = 0x1802e2d1); +PROVIDE(chunk_set.part.0 = 0x1802e4ed); +PROVIDE(chunk_mem.part.0 = 0x1802e51d); +PROVIDE(merge_chunks = 0x1802e54d); +PROVIDE(split_chunks = 0x1802e601); +PROVIDE(free_list_remove_bidx = 0x1802e731); +PROVIDE(free_list_remove = 0x1802e89d); +PROVIDE(alloc_chunk = 0x1802e8cd); +PROVIDE(free_list_add = 0x1802e9f5); +PROVIDE(free_chunk = 0x1802eb91); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1802f439); +PROVIDE(char_out = 0x1802feed); +PROVIDE(stdinout_read_vmeth = 0x1802ffb9); +PROVIDE(stdinout_ioctl_vmeth = 0x1802ffbd); +PROVIDE(zvfs_fdtable_call_ioctl = 0x1802ffd9); +PROVIDE(stdinout_write_vmeth = 0x1802fff9); +PROVIDE(set_region = 0x18030689); +PROVIDE(match_region = 0x18030771); +PROVIDE(dummy_timestamp = 0x18030e05); +PROVIDE(default_get_timestamp = 0x18030e09); +PROVIDE(z_log_init.isra.0 = 0x18030e0d); +PROVIDE(enable_logger = 0x18030f7d); +PROVIDE(z_cbprintf_cpy = 0x18031495); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18031601); +PROVIDE(out_func = 0x1803180d); +PROVIDE(cr_out_func = 0x18031831); +PROVIDE(print_formatted = 0x18031871); +PROVIDE(pm_state_notify.part.0 = 0x18031d21); +PROVIDE(custom_handler = 0x18032535); +PROVIDE(class_handler = 0x180325c9); +PROVIDE(vendor_handler = 0x18032641); +PROVIDE(is_ep_valid = 0x180326a9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18032725); +PROVIDE(get_ep_bm_from_addr = 0x18032745); +PROVIDE(disable_endpoint = 0x18032791); +PROVIDE(usb_halt_endpoint_req.isra.0 = 0x18032811); +PROVIDE(set_endpoint = 0x180328c5); +PROVIDE(usb_handle_standard_request = 0x180329f1); +PROVIDE(forward_status_cb = 0x18032ced); +PROVIDE(usb_data_to_host = 0x18032ef5); +PROVIDE(usb_handle_control_transfer = 0x18032f55); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x180332ad); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18033761); +PROVIDE(usb_transfer_work = 0x18033781); +PROVIDE(cdc_interface_config = 0x18033bc5); +PROVIDE(cdc_acm_irq_callback_work_handler = 0x18033bd9); +PROVIDE(cdc_acm_irq_tx_disable = 0x18033be5); +PROVIDE(cdc_acm_irq_tx_ready = 0x18033bf1); +PROVIDE(cdc_acm_irq_rx_disable = 0x18033c15); +PROVIDE(cdc_acm_irq_rx_ready = 0x18033c21); +PROVIDE(cdc_acm_irq_update = 0x18033c31); +PROVIDE(cdc_acm_irq_callback_set = 0x18033c61); +PROVIDE(cdc_acm_line_ctrl_get = 0x18033c69); +PROVIDE(cdc_acm_configure = 0x18033ca1); +PROVIDE(cdc_acm_config_get = 0x18033cb9); +PROVIDE(cdc_acm_irq_rx_enable = 0x18033d29); +PROVIDE(cdc_acm_irq_tx_enable = 0x18033d49); +PROVIDE(cdc_acm_fifo_fill = 0x18033d69); +PROVIDE(cdc_acm_write_cb = 0x18033da9); +PROVIDE(cdc_acm_init = 0x18033e21); +PROVIDE(tx_work_handler = 0x18034025); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18033e65); +PROVIDE(cdc_acm_read_cb = 0x18033e85); +PROVIDE(cdc_acm_int_in = 0x18033f35); +PROVIDE(cdc_acm_poll_out = 0x180340a9); +PROVIDE(cdc_acm_send_notification.isra.0 = 0x18034145); +PROVIDE(cdc_acm_line_ctrl_set = 0x18034189); +PROVIDE(cdc_acm_irq_is_pending = 0x18034279); +PROVIDE(cdc_acm_fifo_read = 0x180342b1); +PROVIDE(cdc_acm_poll_in = 0x18034311); +PROVIDE(cdc_acm_dev_status_cb = 0x18034379); +PROVIDE(z_usb_work_q_init = 0x18034559); +PROVIDE(cmd_kernel_cycles = 0x1803458d); +PROVIDE(cmd_kernel_sleep = 0x180345a9); +PROVIDE(cmd_kernel_version = 0x180345f1); +PROVIDE(cmd_kernel_heap = 0x18034609); +PROVIDE(cmd_kernel_log_level_set = 0x18034665); +PROVIDE(thread_valid_cb = 0x180346f5); +PROVIDE(cmd_kernel_thread_list = 0x18034725); +PROVIDE(shell_tdata_dump = 0x18034759); +PROVIDE(cmd_kernel_thread_stacks = 0x1803481d); +PROVIDE(shell_stack_dump = 0x180348b5); +PROVIDE(cmd_kernel_thread_suspend = 0x18034919); +PROVIDE(cmd_kernel_thread_resume = 0x1803497d); +PROVIDE(cmd_kernel_thread_kill = 0x180349e1); +PROVIDE(cmd_device_list = 0x18034a45); +PROVIDE(get_h_m_s = 0x18034b41); +PROVIDE(cmd_date_set = 0x18034bed); +PROVIDE(cmd_date_get = 0x18034d29); +PROVIDE(cmd_devmem = 0x18034d6d); +PROVIDE(cmd_dump = 0x18034e41); +PROVIDE(cmd_load = 0x18034fbd); +PROVIDE(bypass_cb = 0x180350cd); +PROVIDE(read_uart = 0x1803522d); +PROVIDE(write_uart = 0x18035241); +PROVIDE(enable_shell_uart = 0x180352b1); +PROVIDE(log_msg_generic_get_wlen = 0x180352e9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18035309); +PROVIDE(init = 0x1803532d); +PROVIDE(uart_callback = 0x18035381); +PROVIDE(uninit = 0x180354f9); +PROVIDE(enable = 0x1803551d); +PROVIDE(transport_evt_handler = 0x18035541); +PROVIDE(z_shell_raw_fprintf = 0x18035559); +PROVIDE(history_handle = 0x18035575); +PROVIDE(tab_handle = 0x18035641); +PROVIDE(execute = 0x18035a51); +PROVIDE(cmd_help = 0x18036995); +PROVIDE(out_func = 0x18036e55); +PROVIDE(z_shell_raw_fprintf = 0x180374f9); +PROVIDE(z_shell_write.part.0 = 0x18037515); +PROVIDE(reprint_from_cursor = 0x18037df5); +PROVIDE(panic = 0x1803816d); +PROVIDE(dropped = 0x18038171); +PROVIDE(process_log_msg.constprop.0 = 0x18038199); +PROVIDE(process = 0x18038221); +PROVIDE(z_shell_raw_fprintf = 0x180382dd); +PROVIDE(formatted_text_print.constprop.0 = 0x180382f9); +PROVIDE(cmd_comment = 0x18038551); +PROVIDE(cmd_shell_stats_reset = 0x18038555); +PROVIDE(z_shell_raw_fprintf = 0x18038561); +PROVIDE(cmd_resize_default = 0x1803857d); +PROVIDE(cmd_shell_stats_show = 0x180385a9); +PROVIDE(cmd_prompt_on = 0x180385bd); +PROVIDE(cmd_prompt_off = 0x180385c9); +PROVIDE(cmd_history = 0x180385d9); +PROVIDE(cmd_get_retval = 0x1803861d); +PROVIDE(cmd_echo = 0x18038639); +PROVIDE(cmd_backends = 0x18038689); +PROVIDE(cmd_resize = 0x18038705); +PROVIDE(cmd_clear = 0x180388c5); +PROVIDE(cmd_bacskpace_mode_delete = 0x18038905); +PROVIDE(cmd_echo_off = 0x18038921); +PROVIDE(cmd_vt100_on = 0x1803893d); +PROVIDE(cmd_colors_on = 0x18038959); +PROVIDE(cmd_echo_on = 0x18038975); +PROVIDE(cmd_bacskpace_mode_backspace = 0x18038991); +PROVIDE(cmd_colors_off = 0x180389ad); +PROVIDE(cmd_vt100_off = 0x180389c9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18038ef9); +PROVIDE(esf_dump = 0x18038f19); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18039165); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18039565); +PROVIDE(mem_manage_fault.constprop.0 = 0x18039585); +PROVIDE(bus_fault.constprop.0 = 0x18039769); +PROVIDE(usage_fault.constprop.0 = 0x1803993d); +PROVIDE(secure_fault.constprop.0 = 0x18039abd); +PROVIDE(cbputc = 0x1803a3c5); +PROVIDE(picolibc_put = 0x1803a415); +PROVIDE(malloc_prepare = 0x1803a469); +PROVIDE(malloc_lock.part.0 = 0x1803a48d); +PROVIDE(pthread_barrier_pool_init = 0x1803a5c5); +PROVIDE(fnmatchx = 0x1803a621); +PROVIDE(fs_close_vmeth = 0x1803ad09); +PROVIDE(fs_ioctl_vmeth = 0x1803ad1d); +PROVIDE(fs_write_vmeth = 0x1803ad89); +PROVIDE(fs_read_vmeth = 0x1803adad); +PROVIDE(pthread_cond_pool_init = 0x1803b0ad); +PROVIDE(pthread_mutex_pool_init = 0x1803b0e9); +PROVIDE(posix_thread_pool_init = 0x1803b129); +PROVIDE(permute_args = 0x1803b169); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803b1e9); +PROVIDE(parse_long_options = 0x1803b209); +PROVIDE(getopt_internal = 0x1803b4b5); +PROVIDE(net_buf_simple_pull.part.0 = 0x1803b869); +PROVIDE(zvfs_fdtable_call_ioctl = 0x1803c335); +PROVIDE(fs_get_mnt_point = 0x1803c8c1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803c95d); +PROVIDE(xoshiro128_initialize = 0x1803cde5); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803cfa9); +PROVIDE(call_fn_table = 0x1803cfc9); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803d525); +PROVIDE(llext_find_extension_sym_iterate = 0x1803e415); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803e431); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1803e775); +PROVIDE(llext_shell_name_cb = 0x1803e92d); +PROVIDE(llext_name_get = 0x1803e945); +PROVIDE(cmd_llext_list_symbols = 0x1803e979); +PROVIDE(cmd_llext_list = 0x1803e9ed); +PROVIDE(llext_shell_list_cb = 0x1803ea11); +PROVIDE(cmd_llext_load_hex = 0x1803ea2d); +PROVIDE(cmd_llext_load_fs = 0x1803eb09); +PROVIDE(cmd_llext_call_fn = 0x1803ebd9); +PROVIDE(cmd_llext_unload = 0x1803ec05); +PROVIDE(llext_name_arg_get = 0x1803ec45); +PROVIDE(dns_resolve_cb = 0x1803ece1); +PROVIDE(exec_query = 0x1803ed81); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18040e49); +PROVIDE(socket_service_thread = 0x18040e69); +PROVIDE(spair_bind = 0x18041329); +PROVIDE(spair_listen = 0x18041345); +PROVIDE(spair_accept = 0x18041361); +PROVIDE(spair_getsockopt = 0x1804137d); +PROVIDE(spair_setsockopt = 0x18041399); +PROVIDE(spair_delete = 0x180413b5); +PROVIDE(spair_close = 0x18041489); +PROVIDE(spair_connect = 0x180414d9); +PROVIDE(spair_write = 0x180414f5); +PROVIDE(spair_sendmsg = 0x18041781); +PROVIDE(spair_sendto = 0x18041875); +PROVIDE(spair_read = 0x18041879); +PROVIDE(spair_recvfrom = 0x18041abd); +PROVIDE(spair_ioctl = 0x18041ad1); +PROVIDE(cmd_net_allocs = 0x18042209); +PROVIDE(arp_cb = 0x18042235); +PROVIDE(cmd_net_arp_flush = 0x180422ed); +PROVIDE(cmd_net_arp = 0x18042315); +PROVIDE(cmd_net_capture = 0x18042355); +PROVIDE(cmd_net_capture_disable = 0x18042381); +PROVIDE(cmd_net_capture_setup = 0x180423ad); +PROVIDE(cmd_net_capture_cleanup = 0x180423d9); +PROVIDE(cmd_net_capture_enable = 0x18042405); +PROVIDE(cmd_net_conn = 0x18042431); +PROVIDE(context_cb = 0x180425e5); +PROVIDE(tcp_cb = 0x18042511); +PROVIDE(net_context_get_iface.part.0 = 0x180425b1); +PROVIDE(cmd_net_dhcpv4_client_stop = 0x1804273d); +PROVIDE(cmd_net_dhcpv4_client_start = 0x1804279d); +PROVIDE(cmd_net_dhcpv4_server_status = 0x180427fd); +PROVIDE(dhcpv4_lease_cb = 0x18042891); +PROVIDE(cmd_net_dhcpv4_server_stop = 0x180429c5); +PROVIDE(cmd_net_dhcpv4_server_start = 0x18042a61); +PROVIDE(cmd_net_dhcpv6_client_start = 0x18042b51); +PROVIDE(cmd_net_dhcpv6_client_stop = 0x18042b7d); +PROVIDE(dns_result_cb = 0x18042ba9); +PROVIDE(cmd_net_dns_cancel = 0x18042c91); +PROVIDE(cmd_net_dns_query = 0x18042d01); +PROVIDE(cmd_net_dns = 0x18042e65); +PROVIDE(cmd_net_events_on = 0x180430c5); +PROVIDE(cmd_net_events = 0x180430e1); +PROVIDE(cmd_net_events_off = 0x180430fd); +PROVIDE(cmd_net_gptp_port = 0x18043119); +PROVIDE(cmd_net_gptp = 0x18043145); +PROVIDE(cmd_net_http = 0x18043171); +PROVIDE(iface_index_get = 0x1804319d); +PROVIDE(cmd_net_iface = 0x18043249); +PROVIDE(iface_cb = 0x18043709); +PROVIDE(cmd_net_set_mac = 0x180432bd); +PROVIDE(cmd_net_iface_down = 0x18043469); +PROVIDE(iface_flags2str = 0x180434e5); +PROVIDE(cmd_net_iface_up = 0x18043651); +PROVIDE(cmd_net_cm_status = 0x18044375); +PROVIDE(cmd_net_cm_down = 0x18044391); +PROVIDE(cmd_net_cm_up = 0x180443ad); +PROVIDE(cmd_net_cm_flag = 0x180443c9); +PROVIDE(cmd_net_cm_watch = 0x180443e5); +PROVIDE(cmd_net_cm_connect = 0x18044401); +PROVIDE(cmd_net_cm_ignore = 0x1804441d); +PROVIDE(cmd_net_cm_disconnect = 0x18044439); +PROVIDE(cmd_net_cm_timeout = 0x18044455); +PROVIDE(cmd_net_ipv4 = 0x18044471); +PROVIDE(ip_address_lifetime_cb = 0x18044535); +PROVIDE(cmd_net_ip_gateway = 0x18044679); +PROVIDE(cmd_net_ip_add = 0x18044709); +PROVIDE(cmd_net_ip_del = 0x180448a5); +PROVIDE(cmd_net_ip6_pe = 0x180449c1); +PROVIDE(cmd_net_ipv6 = 0x180449f1); +PROVIDE(address_lifetime_cb = 0x18044b69); +PROVIDE(cmd_net_ip6_del = 0x18044d95); +PROVIDE(cmd_net_ip6_add = 0x18044ee1); +PROVIDE(cmd_net_mem = 0x18045255); +PROVIDE(nbr_address_get = 0x18045341); +PROVIDE(nbr_address_cb = 0x1804539d); +PROVIDE(nbr_cb = 0x180453d9); +PROVIDE(cmd_net_nbr_rm = 0x180455d1); +PROVIDE(cmd_net_nbr = 0x1804567d); +PROVIDE(handle_ipv6_echo_reply = 0x180456bd); +PROVIDE(parse_arg = 0x1804581d); +PROVIDE(cmd_net_ping = 0x1804586d); +PROVIDE(ping_work = 0x18045ba5); +PROVIDE(ping_bypass = 0x18045b6d); +PROVIDE(handle_ipv4_echo_reply = 0x18045c8d); +PROVIDE(cmd_net_pkt = 0x18045ded); +PROVIDE(cmd_net_pmtu = 0x1804603d); +PROVIDE(cmd_net_pmtu_flush = 0x18046069); +PROVIDE(cmd_net_ppp_status = 0x18046095); +PROVIDE(cmd_net_ppp_ping = 0x180460c1); +PROVIDE(cmd_net_resume = 0x180460ed); +PROVIDE(cmd_net_route = 0x18046109); +PROVIDE(iface_per_route_cb = 0x18046125); +PROVIDE(route_cb = 0x18046199); +PROVIDE(cmd_net_ip6_route_del = 0x18046339); +PROVIDE(cmd_net_ip6_route_add = 0x180463d9); +PROVIDE(cmd_net_sockets = 0x180464cd); +PROVIDE(walk_socket_services = 0x180465cd); +PROVIDE(net_shell_print_statistics = 0x180466bd); +PROVIDE(iface_index_get = 0x18047185); +PROVIDE(cmd_net_stats = 0x18047231); +PROVIDE(cmd_net_suspend = 0x18047275); +PROVIDE(cmd_net_udp = 0x18047769); +PROVIDE(udp_sent = 0x1804776d); +PROVIDE(udp_rcvd = 0x180477a1); +PROVIDE(cmd_net_udp_close = 0x18047845); +PROVIDE(cmd_net_udp_send = 0x180478a1); +PROVIDE(cmd_net_udp_bind = 0x18047af9); +PROVIDE(cmd_virtual_show = 0x18047ce1); +PROVIDE(cmd_virtual_detach = 0x18047d0d); +PROVIDE(cmd_virtual_attach = 0x18047d39); +PROVIDE(cmd_net_vlan = 0x18047d65); +PROVIDE(cmd_net_vlan_del = 0x18047d91); +PROVIDE(cmd_net_vlan_add = 0x18047dbd); +PROVIDE(cmd_net_websocket = 0x18047de9); +PROVIDE(ethernet_set_config = 0x18047e15); +PROVIDE(ethernet_get_config = 0x180481a5); +PROVIDE(eth_stats_get = 0x18048ce9); +PROVIDE(get_wifi_api = 0x18048d45); +PROVIDE(scan_result_cb = 0x18048d6d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18048da1); +PROVIDE(wifi_connect = 0x18048f41); +PROVIDE(wifi_scan = 0x18048fe9); +PROVIDE(wifi_disconnect = 0x18049039); +PROVIDE(wifi_ap_enable = 0x180490bd); +PROVIDE(wifi_ap_disable = 0x18049105); +PROVIDE(wifi_ap_sta_disconnect = 0x18049149); +PROVIDE(wifi_ap_config_params = 0x180491b1); +PROVIDE(wifi_ap_set_rts_threshold = 0x18049251); +PROVIDE(wifi_iface_status = 0x180492ad); +PROVIDE(wifi_iface_stats = 0x180492e9); +PROVIDE(wifi_iface_stats_reset = 0x18049325); +PROVIDE(wifi_11k_cfg = 0x1804934d); +PROVIDE(wifi_11k_neighbor_request = 0x18049395); +PROVIDE(wifi_set_power_save = 0x180493dd); +PROVIDE(wifi_get_power_save_config = 0x180494a5); +PROVIDE(wifi_set_twt = 0x18049501); +PROVIDE(wifi_set_btwt = 0x180495d9); +PROVIDE(wifi_reg_domain = 0x1804966d); +PROVIDE(wifi_mode = 0x180496c9); +PROVIDE(wifi_packet_filter = 0x18049719); +PROVIDE(wifi_channel = 0x18049769); +PROVIDE(wifi_get_version = 0x180497b9); +PROVIDE(wifi_btm_query = 0x180497e5); +PROVIDE(wifi_wps_config = 0x18049839); +PROVIDE(wifi_set_rts_threshold = 0x18049881); +PROVIDE(wifi_pmksa_flush = 0x18049885); +PROVIDE(wifi_get_rts_threshold = 0x180498c9); +PROVIDE(wifi_freq_to_channel = 0x1804994d); +PROVIDE(cmd_wifi_ap_set_rts_threshold = 0x180499b9); +PROVIDE(cmd_wifi_ap_status = 0x18049a61); +PROVIDE(cmd_wifi_ap_wps_pin = 0x18049d8d); +PROVIDE(cmd_wifi_ap_wps_pbc = 0x18049e39); +PROVIDE(parse_number = 0x18049e95); +PROVIDE(cmd_wifi_ap_config_params = 0x18049f5d); +PROVIDE(cmd_wifi_ap_sta_disconnect = 0x1804a085); +PROVIDE(cmd_wifi_ap_stations = 0x1804a119); +PROVIDE(__wifi_args_to_params = 0x1804a261); +PROVIDE(cmd_wifi_ap_enable = 0x1804a9c1); +PROVIDE(cmd_wifi_ap_disable = 0x1804aa65); +PROVIDE(cmd_wifi_wps_pbc = 0x1804aac9); +PROVIDE(cmd_wifi_wps_pin = 0x1804ab25); +PROVIDE(cmd_wifi_twt_teardown_all = 0x1804abd1); +PROVIDE(cmd_wifi_twt_teardown = 0x1804acad); +PROVIDE(print_twt_params = 0x1804ae11); +PROVIDE(cmd_wifi_btwt_setup = 0x1804af81); +PROVIDE(cmd_wifi_twt_setup_quick = 0x1804b0bd); +PROVIDE(cmd_wifi_twt_setup = 0x1804b239); +PROVIDE(cmd_wifi_11k = 0x1804b6d5); +PROVIDE(cmd_wifi_11k_neighbor_request = 0x1804b805); +PROVIDE(cmd_wifi_btm_query = 0x1804b939); +PROVIDE(cmd_wifi_connect = 0x1804b9d1); +PROVIDE(cmd_wifi_disconnect = 0x1804ba6d); +PROVIDE(cmd_wifi_ps = 0x1804baf9); +PROVIDE(cmd_wifi_listen_interval = 0x1804bdf1); +PROVIDE(cmd_wifi_ps_mode = 0x1804bed5); +PROVIDE(cmd_wifi_ps_timeout = 0x1804bfd5); +PROVIDE(cmd_wifi_ps_wakeup_mode = 0x1804c0b9); +PROVIDE(cmd_wifi_reg_domain = 0x1804c1dd); +PROVIDE(cmd_wifi_set_rts_threshold = 0x1804c44d); +PROVIDE(wifi_shell_init = 0x1804c571); +PROVIDE(wifi_mgmt_event_handler = 0x1804cedd); +PROVIDE(wifi_mgmt_scan_event_handler = 0x1804d261); +PROVIDE(cmd_wifi_stats = 0x1804c5b5); +PROVIDE(cmd_wifi_status = 0x1804c7ed); +PROVIDE(cmd_wifi_version = 0x1804ca81); +PROVIDE(cmd_wifi_ps_exit_strategy = 0x1804cb19); +PROVIDE(cmd_wifi_pmksa_flush = 0x1804cbf1); +PROVIDE(cmd_wifi_scan = 0x1804cc31); +PROVIDE(cmd_wifi_mode = 0x1804d595); +PROVIDE(cmd_wifi_channel = 0x1804d76d); +PROVIDE(cmd_wifi_packet_filter = 0x1804d98d); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1804e3f9); +PROVIDE(mgmt_event_work_handler = 0x1804e419); +PROVIDE(mgmt_event_wait_call = 0x1804e6f5); +PROVIDE(net_route_nexthop_remove = 0x18052005); +PROVIDE(nbr_new = 0x18052009); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18052051); +PROVIDE(net_route_entries_table_clear = 0x18052071); +PROVIDE(net_route_entry_remove = 0x18052075); +PROVIDE(net_route_update_lifetime.part.0 = 0x18052079); +PROVIDE(route_lifetime_timeout = 0x1805255d); +PROVIDE(dhcpv4_find_option = 0x18053df5); +PROVIDE(dhcpv4_encode_requested_params = 0x18053e3d); +PROVIDE(dhcpv4_get_lease_time = 0x18053ea5); +PROVIDE(dhcpv4_server_timeout_recalc = 0x18053ed1); +PROVIDE(dhcpv4_encode_header.constprop.0 = 0x18053f41); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18053fb9); +PROVIDE(dhcpv4_get_client_id = 0x18053fd9); +PROVIDE(dhcpv4_send = 0x18054085); +PROVIDE(dhcpv4_probe_address.isra.0 = 0x18054145); +PROVIDE(echo_reply_handler = 0x18054191); +PROVIDE(dhcpv4_send_nak.constprop.0.isra.0 = 0x1805426d); +PROVIDE(dhcpv4_send_offer = 0x180543b5); +PROVIDE(dhcpv4_server_timeout = 0x18054535); +PROVIDE(dhcpv4_send_ack.constprop.0 = 0x18054625); +PROVIDE(dhcpv4_server_cb = 0x18054bb1); +PROVIDE(dns_server_exists = 0x18055ae5); +PROVIDE(join_ipv4_mcast_group = 0x18055b41); +PROVIDE(join_ipv6_mcast_group = 0x18055b49); +PROVIDE(dns_resolve_close_locked = 0x18055b51); +PROVIDE(dns_write.constprop.0 = 0x18055c25); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18055d8d); +PROVIDE(dns_postprocess_server = 0x18055db1); +PROVIDE(dns_resolve_init_locked = 0x18055f55); +PROVIDE(dispatcher_cb = 0x180564a5); +PROVIDE(dns_resolve_cancel_with_hash.constprop.0 = 0x180562fd); +PROVIDE(query_timeout = 0x1805638d); +PROVIDE(intc_nxp_pint_init = 0x18056d6d); +PROVIDE(nxp_pint_isr = 0x18056e3d); +PROVIDE(usb_isr_handler = 0x18056f71); +PROVIDE(usb_mcux_init = 0x18056f7d); +PROVIDE(usb_mcux_thread_main = 0x18057001); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x18056fe1); +PROVIDE(mcux_lpc_syscon_clock_control_on = 0x18057dc5); +PROVIDE(mcux_lpc_syscon_clock_control_get_subsys_rate = 0x18057dc9); +PROVIDE(mcux_lpc_syscon_clock_control_off = 0x18057eb1); +PROVIDE(mcux_lpc_syscon_clock_control_set_subsys_rate = 0x1006794d); +PROVIDE(console_out = 0x18057eb5); +PROVIDE(uart_console_init = 0x18057ee1); +PROVIDE(entropy_mcux_trng_get_entropy = 0x18057f09); +PROVIDE(entropy_mcux_trng_init = 0x18057f39); +PROVIDE(entropy_mcux_trng_pm_action = 0x18057f8d); +PROVIDE(flash_get_page_info = 0x18057fa9); +PROVIDE(gpio_mcux_lpc_port_get_raw = 0x1805807d); +PROVIDE(gpio_mcux_lpc_port_set_masked_raw = 0x18058095); +PROVIDE(gpio_mcux_lpc_port_set_bits_raw = 0x180580bd); +PROVIDE(gpio_mcux_lpc_port_clear_bits_raw = 0x180580d1); +PROVIDE(gpio_mcux_lpc_port_toggle_bits = 0x180580e5); +PROVIDE(gpio_mcux_lpc_manage_cb = 0x180580f9); +PROVIDE(gpio_mcux_lpc_configure = 0x180581a9); +PROVIDE(gpio_mcux_lpc_pin_interrupt_configure = 0x18058235); +PROVIDE(gpio_mcux_lpc_pint_cb = 0x18058379); +PROVIDE(lpc_gpio_init_1 = 0x18058359); +PROVIDE(lpc_gpio_init_0 = 0x18058369); +PROVIDE(reset_nxp_rstctl_status = 0x180589b5); +PROVIDE(reset_nxp_rstctl_line_assert = 0x180589e5); +PROVIDE(reset_nxp_rstctl_line_deassert = 0x18058a01); +PROVIDE(reset_nxp_rstctl_line_toggle = 0x18058a1d); +PROVIDE(mcux_flexcomm_poll_in = 0x18058a61); +PROVIDE(mcux_flexcomm_poll_out = 0x18058a81); +PROVIDE(mcux_flexcomm_err_check = 0x18058a99); +PROVIDE(mcux_flexcomm_fifo_fill = 0x18058ae5); +PROVIDE(mcux_flexcomm_fifo_read = 0x18058b19); +PROVIDE(mcux_flexcomm_irq_tx_enable = 0x18058b4d); +PROVIDE(mcux_flexcomm_irq_tx_disable = 0x18058b5d); +PROVIDE(mcux_flexcomm_irq_tx_complete = 0x18058b6d); +PROVIDE(mcux_flexcomm_irq_tx_ready = 0x18058b79); +PROVIDE(mcux_flexcomm_irq_rx_enable = 0x18058b99); +PROVIDE(mcux_flexcomm_irq_rx_disable = 0x18058ba9); +PROVIDE(mcux_flexcomm_irq_rx_full = 0x18058bb9); +PROVIDE(mcux_flexcomm_irq_err_enable = 0x18058bcd); +PROVIDE(mcux_flexcomm_irq_err_disable = 0x18058be1); +PROVIDE(mcux_flexcomm_irq_update = 0x18058bf5); +PROVIDE(mcux_flexcomm_irq_callback_set = 0x18058bf9); +PROVIDE(mcux_flexcomm_uart_config_get = 0x18058c01); +PROVIDE(mcux_flexcomm_isr = 0x18058c15); +PROVIDE(mcux_flexcomm_irq_config_func_0 = 0x18058c21); +PROVIDE(mcux_flexcomm_init = 0x18058c39); +PROVIDE(mcux_flexcomm_uart_configure = 0x18058ce9); +PROVIDE(mcux_flexcomm_irq_is_pending = 0x18058da5); +PROVIDE(sys_clock_driver_init = 0x180592b5); +PROVIDE(nxp_wifi_set_rts_threshold = 0x18059619); +PROVIDE(nxp_wifi_btm_query = 0x18059629); +PROVIDE(nxp_wifi_set_twt = 0x18059631); +PROVIDE(nxp_wifi_11k_cfg = 0x180596bd); +PROVIDE(nxp_wifi_dev_init = 0x180596d9); +PROVIDE(nxp_wifi_sta_init = 0x18059709); +PROVIDE(nxp_wifi_ap_set_rts_threshold = 0x1805974d); +PROVIDE(nxp_wifi_set_btwt = 0x1805975d); +PROVIDE(nxp_wifi_status = 0x18059791); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x1805996d); +PROVIDE(nxp_wifi_uap_init = 0x1805998d); +PROVIDE(nxp_wifi_recv = 0x100679f9); +PROVIDE(nxp_wifi_uap_disconnect_sta = 0x18059abd); +PROVIDE(nxp_wifi_ap_config_params = 0x18059b25); +PROVIDE(nxp_wifi_set_config = 0x18059ca5); +PROVIDE(nxp_wifi_process_results = 0x18059d2d); +PROVIDE(nxp_wifi_scan = 0x18059e95); +PROVIDE(nxp_wifi_connect = 0x1805a059); +PROVIDE(nxp_wifi_start_ap = 0x1805a235); +PROVIDE(nxp_wifi_stop_ap = 0x1805a49d); +PROVIDE(nxp_wifi_disconnect = 0x1805a529); +PROVIDE(nxp_wifi_11k_neighbor_request = 0x1805a5e1); +PROVIDE(nxp_wifi_power_save = 0x1805a655); +PROVIDE(nxp_wifi_reg_domain = 0x1805a825); +PROVIDE(nxp_wifi_version = 0x1805a96d); +PROVIDE(nxp_wifi_stats = 0x1805aa69); +PROVIDE(nxp_wifi_send = 0x10067965); +PROVIDE(nxp_wifi_uap_status = 0x1805ac39); +PROVIDE(device_wlan_pm_action = 0x1805b7d1); +PROVIDE(CLOCK_Delay = 0x1805b84d); +PROVIDE(CLOCK_ConfigAvPll = 0x1805b859); +PROVIDE(CLOCK_GetTcpuFvcoFreq = 0x1805b8dd); +PROVIDE(CLOCK_ConfigAvPllCh1.part.0 = 0x1805b94d); +PROVIDE(POWER_Delay = 0x10067aa5); +PROVIDE(POWER_DelayUs = 0x10067ab1); +PROVIDE(POWER_SaveGdetVSensorConfig = 0x10067ae1); +PROVIDE(POWER_RestoreGdetVSensorConfig = 0x10067b25); +PROVIDE(deinitXip = 0x10067b71); +PROVIDE(POWER_EnterPm3Asm = 0x10067bad); +PROVIDE(initFlexSPI.constprop.0 = 0x10067c79); +PROVIDE(initXip = 0x10067d15); +PROVIDE(Power_ConfigClkGate.isra.0 = 0x10067d35); +PROVIDE(POWER_PrePowerMode = 0x10067d95); +PROVIDE(POWER_PostPowerMode = 0x10067f65); +PROVIDE(OCOTP_ReadSocOtp.part.0 = 0x1805cc95); +PROVIDE(wifi_uap_set_11ac_status.isra.0 = 0x1805cf39); +PROVIDE(wifi_send_uap_max_sta_num_cmd = 0x1805cfc5); +PROVIDE(wifi_cmd_uap_config.constprop.0 = 0x1805d311); +PROVIDE(wlan_11d_generate_domain_info.isra.0 = 0x1805fcd5); +PROVIDE(wlan_process_rm_beacon_req = 0x18060df1); +PROVIDE(wifi_send_key_material_cmd = 0x18061a59); +PROVIDE(wifi_config_mgmt_ie = 0x18061aa5); +PROVIDE(wlan_get_nonglobal_operclass_table.constprop.0.isra.0 = 0x180630bd); +PROVIDE(wlan_interpret_bss_desc_with_ie = 0x18069741); +PROVIDE(adjust_pointers_to_internal_buffers.constprop.0 = 0x18069f19); +PROVIDE(wlan_update_chan_statistics.isra.0 = 0x18069fd1); +PROVIDE(is_rsn_oui_present.isra.0 = 0x1806a039); +PROVIDE(wlan_sec_ioctl_passphrase = 0x1806e36d); +PROVIDE(wlan_sec_ioctl_password = 0x1806e36d); +PROVIDE(wifi_send_power_save_command = 0x1806eead); +PROVIDE(is_scanning_allowed = 0x1806f4bd); +PROVIDE(do_connect_failed = 0x1806f4ed); +PROVIDE(wlan_set_uap_ecsa_cfg = 0x1806f539); +PROVIDE(wlan_switch_to_nondfs_channel = 0x1806f6ad); +PROVIDE(wake_timer_cb = 0x1806f711); +PROVIDE(temperature_mon_cb = 0x1806f725); +PROVIDE(wifi_wakeup_card_cb = 0x1806f73d); +PROVIDE(wlan_start.part.0 = 0x1806f771); +PROVIDE(assoc_timer_cb = 0x18070311); +PROVIDE(neighbor_req_timer_cb = 0x180702d5); +PROVIDE(wlan_get_scan_result.part.0 = 0x1806fa5d); +PROVIDE(wlcm_request_scan.isra.0 = 0x1806fc0d); +PROVIDE(do_start.isra.0 = 0x1806fd71); +PROVIDE(do_scan = 0x1806ff65); +PROVIDE(wlcm_request_connect = 0x18070045); +PROVIDE(wlan_send_host_sleep_int = 0x18070125); +PROVIDE(wlcm_request_reconnect = 0x18070349); +PROVIDE(wlcmgr_mon_task = 0x1807049d); +PROVIDE(handle_scan_results = 0x18071a71); +PROVIDE(wlcmgr_task = 0x1807286d); +PROVIDE(I2C_PendingStatusWait = 0x18074999); +PROVIDE(SPI_SlaveTransferHandleIRQ = 0x18075425); +PROVIDE(USB_DeviceEhciSetDefaultState = 0x18076115); +PROVIDE(USB_DeviceEhciTransfer = 0x180761e1); +PROVIDE(USB_DeviceEhciCancelControlPipe = 0x1807644d); +PROVIDE(USB_DeviceEhciEndpointDeinit = 0x1807681d); +PROVIDE(flexspi_nor_wait_bus_busy.constprop.0 = 0x18076f99); +PROVIDE(sb3_Delay = 0x180770f9); +PROVIDE(__OtpInit = 0x18077105); +PROVIDE(nboot_hal_get_secure_firmware_version = 0x18077169); +PROVIDE(ldr_DoHeader_v3 = 0x180771fd); +PROVIDE(ldr_DoDataRead = 0x1807730d); +PROVIDE(__OtpDeInit.isra.0 = 0x180772d1); +PROVIDE(z_log_msg_runtime_create.constprop.0 = 0x180780f5); +PROVIDE(z_sys_init_run_level = 0x18078279); +PROVIDE(bg_thread_main = 0x180782d5); +PROVIDE(statics_init = 0x180785f9); +PROVIDE(init_mbox_module = 0x18078a49); +PROVIDE(k_sys_work_q_init = 0x18078ced); +PROVIDE(slice_timeout = 0x18079355); +PROVIDE(clear_event_registration = 0x1807a1a9); +PROVIDE(signal_poll_event.constprop.0 = 0x1807a2d5); +PROVIDE(register_events = 0x1807a35d); +PROVIDE(k_event_post_internal = 0x1807acc1); +PROVIDE(event_walk_op = 0x1807aea5); +PROVIDE(k_event_wait_internal = 0x1807ad69); +PROVIDE(__ultoa_invert = 0x1807d3b7); +PROVIDE(skip_to_arg = 0x1807bb8d); +PROVIDE(mulShiftAll64 = 0x1807d465); +PROVIDE(div10 = 0x1807c665); +PROVIDE(__z_impl_k_thread_stack_space_get_veneer = 0x1807d7d1); +PROVIDE(__OSA_MsgQPut_veneer = 0x1807d7d9); +PROVIDE(__net_pkt_read_veneer = 0x1807d7e1); +PROVIDE(__k_work_schedule_for_queue_veneer = 0x1807d7e9); +PROVIDE(__net_pkt_skip_veneer = 0x1807d7f1); +PROVIDE(__k_is_in_isr_veneer = 0x1807d7f9); +PROVIDE(__z_work_submit_to_queue_veneer = 0x1807d801); +PROVIDE(__z_thread_aligned_alloc_veneer = 0x1807d809); +PROVIDE(__net_ipv4_unspecified_address_veneer = 0x1807d811); +PROVIDE(__move_thread_to_end_of_prio_q_veneer = 0x1807d819); +PROVIDE(__net_if_ipv6_addr_lookup_veneer = 0x1807d821); +PROVIDE(__net_context_recv_veneer = 0x1807d829); +PROVIDE(__OSA_TimerReset_veneer = 0x1807d831); +PROVIDE(__z_ready_thread_veneer = 0x1807d839); +PROVIDE(__net_interface_down_veneer = 0x1807d841); +PROVIDE(__k_work_reschedule_veneer = 0x1807d849); +PROVIDE(__wlan_cmd_11n_addba_req_veneer = 0x1807d851); +PROVIDE(__net_context_listen_veneer = 0x1807d859); +PROVIDE(__wifi_get_device_firmware_version_ext_veneer = 0x1807d861); +PROVIDE(__wifi_set_country_code_veneer = 0x1807d869); +PROVIDE(__net_if_ipv4_select_src_iface_veneer = 0x1807d871); +PROVIDE(__FLEXSPI_Init_veneer = 0x1807d879); +PROVIDE(__wifi_scan_stop_veneer = 0x1807d881); +PROVIDE(__wifi_unregister_event_queue_veneer = 0x1807d889); +PROVIDE(__z_unpend1_no_timeout_veneer = 0x1807d891); +PROVIDE(__k_aligned_alloc_veneer = 0x1807d899); +PROVIDE(__z_impl_net_addr_pton_veneer = 0x1807d8a1); +PROVIDE(__z_impl_k_msgq_put_veneer = 0x1807d8a9); +PROVIDE(__net_context_sendto_veneer = 0x1807d8b1); +PROVIDE(__net_context_connect_veneer = 0x1807d8b9); +PROVIDE(__net_if_ipv4_get_global_addr_veneer = 0x1807d8c1); +PROVIDE(__z_impl_zsock_sendto_veneer = 0x1807d8c9); +PROVIDE(__wifi_put_command_lock_veneer = 0x1807d8d1); +PROVIDE(__OSA_TaskNotifyPost_veneer = 0x1807d8d9); +PROVIDE(__k_sched_lock_veneer = 0x1807d8e1); +PROVIDE(__wifi_wait_for_cmdresp_veneer = 0x1807d8e9); +PROVIDE(__k_malloc_veneer = 0x1807d8f1); +PROVIDE(__FLEXSPI_SetFlashConfig_veneer = 0x1807d8f9); +PROVIDE(__k_work_queue_start_veneer = 0x1807d901); +PROVIDE(__k_work_submit_to_queue_veneer = 0x1807d909); +PROVIDE(__wifi_get_country_code_veneer = 0x1807d911); +PROVIDE(__wlan_clean_txrx_veneer = 0x1807d919); +PROVIDE(__net_if_stats_reset_veneer = 0x1807d921); +PROVIDE(__net_if_is_wifi_veneer = 0x1807d929); +PROVIDE(__net_tcp_state_str_veneer = 0x1807d931); +PROVIDE(__z_impl_k_sched_current_thread_query_veneer = 0x1807d939); +PROVIDE(__ipv6_addr_addr_to_desc_veneer = 0x1807d941); +PROVIDE(__OSA_MsgQGet_veneer = 0x1807d949); +PROVIDE(__net_if_stats_reset_all_veneer = 0x1807d951); +PROVIDE(__wifi_get_device_mac_addr_veneer = 0x1807d959); +PROVIDE(__net_if_get_wifi_sta_veneer = 0x1807d961); +PROVIDE(__net_context_accept_veneer = 0x1807d969); +PROVIDE(__wlan_fill_ht_cap_tlv_veneer = 0x1807d971); +PROVIDE(__wlan_11n_update_txbastream_tbl_ampdu_supported_veneer = 0x1807d979); +PROVIDE(__z_stack_space_get_veneer = 0x1807d981); +PROVIDE(__net_pkt_read_be32_veneer = 0x1807d989); +PROVIDE(__nxp_wifi_internal_register_rx_cb_veneer = 0x1807d991); +PROVIDE(__net_if_ipv6_addr_lookup_by_iface_veneer = 0x1807d999); +PROVIDE(__k_work_queue_init_veneer = 0x1807d9a1); +PROVIDE(__wlan_wmm_get_ralist_node_veneer = 0x1807d9a9); +PROVIDE(__net_if_get_name_veneer = 0x1807d9b1); +PROVIDE(__wlan_cmd_11n_cfg_veneer = 0x1807d9b9); +PROVIDE(__net_pkt_get_data_veneer = 0x1807d9c1); +PROVIDE(__net_eth_broadcast_addr_veneer = 0x1807d9c9); +PROVIDE(__POWER_DelayUs_veneer = 0x1807d9d1); +PROVIDE(__net_buf_alloc_fixed_debug_veneer = 0x1807d9d9); +PROVIDE(__net_if_ipv6_router_add_veneer = 0x1807d9e1); +PROVIDE(__wifi_deinit_veneer = 0x1807d9e9); +PROVIDE(__net_if_ipv6_prefix_get_veneer = 0x1807d9f1); +PROVIDE(__OSA_MsgQCreate_veneer = 0x1807d9f9); +PROVIDE(__wlan_ralist_update_enh_veneer = 0x1807da01); +PROVIDE(__wlan_show_dot11ndevcap_veneer = 0x1807da09); +PROVIDE(__OSA_MutexCreate_veneer = 0x1807da11); +PROVIDE(__wifi_set_packet_retry_count_veneer = 0x1807da19); +PROVIDE(__wlan_wmm_process_association_req_veneer = 0x1807da21); +PROVIDE(__net_context_put_veneer = 0x1807da29); +PROVIDE(__OSA_TaskDestroy_veneer = 0x1807da31); +PROVIDE(__net_if_oper_state2str_veneer = 0x1807da39); +PROVIDE(__net_if_set_link_addr_locked_veneer = 0x1807da41); +PROVIDE(__z_impl_k_thread_create_veneer = 0x1807da49); +PROVIDE(__z_impl_k_msgq_get_veneer = 0x1807da51); +PROVIDE(__net_configure_dns_veneer = 0x1807da59); +PROVIDE(__wlan_11n_update_txbastream_tbl_ampdu_stat_veneer = 0x1807da61); +PROVIDE(__net_wlan_init_veneer = 0x1807da69); +PROVIDE(__wifi_get_device_uap_mac_addr_veneer = 0x1807da71); +PROVIDE(__net_context_update_recv_wnd_veneer = 0x1807da79); +PROVIDE(__net_if_ipv6_addr_onlink_veneer = 0x1807da81); +PROVIDE(__wlan_11n_update_txbastream_tbl_tx_cnt_veneer = 0x1807da89); +PROVIDE(__net_if_ipv6_get_global_addr_veneer = 0x1807da91); +PROVIDE(__z_impl_k_thread_name_set_veneer = 0x1807da99); +PROVIDE(__net_context_get_veneer = 0x1807daa1); +PROVIDE(__z_unpend_thread_no_timeout_veneer = 0x1807daa9); +PROVIDE(__net_get_sta_handle_veneer = 0x1807dab1); +PROVIDE(__OSA_RWLockWriteLock_veneer = 0x1807dab9); +PROVIDE(__net_interface_dhcp_stop_veneer = 0x1807dac1); +PROVIDE(__z_impl_k_thread_suspend_veneer = 0x1807dac9); +PROVIDE(__z_dummy_thread_init_veneer = 0x1807dad1); +PROVIDE(__z_impl_k_thread_resume_veneer = 0x1807dad9); +PROVIDE(__OSA_TimeGetMsec_veneer = 0x1807dae1); +PROVIDE(__k_work_init_veneer = 0x1807dae9); +PROVIDE(__wifi_get_command_buffer_veneer = 0x1807daf1); +PROVIDE(__wifi_set_tx_status_veneer = 0x1807daf9); +PROVIDE(__OSA_TimerActivate_veneer = 0x1807db01); +PROVIDE(__wifi_wake_up_card_veneer = 0x1807db09); +PROVIDE(__net_ipv6_create_veneer = 0x1807db11); +PROVIDE(__z_impl_net_addr_ntop_veneer = 0x1807db19); +PROVIDE(__wakelock_put_veneer = 0x1807db21); +PROVIDE(__net_if_ipv6_set_hop_limit_veneer = 0x1807db29); +PROVIDE(__net_pkt_set_data_veneer = 0x1807db31); +PROVIDE(__net_ipv4_create_full_veneer = 0x1807db39); +PROVIDE(__net_udp_register_veneer = 0x1807db41); +PROVIDE(__k_work_cancel_delayable_veneer = 0x1807db49); +PROVIDE(__OSA_TimerDestroy_veneer = 0x1807db51); +PROVIDE(__wlan_show_devmcssupport_veneer = 0x1807db59); +PROVIDE(__z_impl_k_queue_peek_tail_veneer = 0x1807db61); +PROVIDE(__net_buf_unref_debug_veneer = 0x1807db69); +PROVIDE(__wlan_11n_delete_txbastream_tbl_entry_veneer = 0x1807db71); +PROVIDE(__OSA_MemoryFree_veneer = 0x1807db79); +PROVIDE(__net_if_ipv6_router_find_default_veneer = 0x1807db81); +PROVIDE(__net_wlan_set_mac_address_veneer = 0x1807db89); +PROVIDE(__net_get_if_ip_addr_veneer = 0x1807db91); +PROVIDE(__OSA_MutexDestroy_veneer = 0x1807db99); +PROVIDE(__z_impl_k_queue_cancel_wait_veneer = 0x1807dba1); +PROVIDE(__net_if_set_name_veneer = 0x1807dba9); +PROVIDE(__z_pend_curr_veneer = 0x1807dbb1); +PROVIDE(__net_pkt_remaining_data_veneer = 0x1807dbb9); +PROVIDE(__net_ipv6_send_fragmented_pkt_veneer = 0x1807dbc1); +PROVIDE(__z_impl_zsock_setsockopt_veneer = 0x1807dbc9); +PROVIDE(__wlan_init_wmm_param_veneer = 0x1807dbd1); +PROVIDE(__OSA_TimerChange_veneer = 0x1807dbd9); +PROVIDE(__net_if_ipv4_maddr_add_veneer = 0x1807dbe1); +PROVIDE(__z_impl_k_mutex_init_veneer = 0x1807dbe9); +PROVIDE(__net_udp_create_veneer = 0x1807dbf1); +PROVIDE(__net_if_ipv6_router_lookup_veneer = 0x1807dbf9); +PROVIDE(__OSA_MsgQDestroy_veneer = 0x1807dc01); +PROVIDE(__send_wifi_driver_tx_data_event_veneer = 0x1807dc09); +PROVIDE(__net_if_get_by_name_veneer = 0x1807dc11); +PROVIDE(__z_impl_zsock_socket_veneer = 0x1807dc19); +PROVIDE(__net_if_get_by_iface_veneer = 0x1807dc21); +PROVIDE(__net_if_lookup_by_dev_veneer = 0x1807dc29); +PROVIDE(__net_if_dormant_off_veneer = 0x1807dc31); +PROVIDE(__k_thread_state_str_veneer = 0x1807dc39); +PROVIDE(__z_sched_wake_veneer = 0x1807dc41); +PROVIDE(__z_impl_k_mutex_unlock_veneer = 0x1807dc49); +PROVIDE(__OSA_TimeDelay_veneer = 0x1807dc51); +PROVIDE(__z_impl_k_sem_init_veneer = 0x1807dc59); +PROVIDE(__k_free_veneer = 0x1807dc61); +PROVIDE(__wlan_wmm_init_veneer = 0x1807dc69); +PROVIDE(__wlan_11n_cfg_ioctl_veneer = 0x1807dc71); +PROVIDE(__net_tcp_get_supported_mss_veneer = 0x1807dc79); +PROVIDE(__OSA_RWLockCreateWithCB_veneer = 0x1807dc81); +PROVIDE(__net_configure_address_veneer = 0x1807dc89); +PROVIDE(__net_if_ipv6_maddr_lookup_veneer = 0x1807dc91); +PROVIDE(__z_log_msg_runtime_create.constprop.0_veneer = 0x1807dc99); +PROVIDE(__z_init_thread_base_veneer = 0x1807dca1); +PROVIDE(__net_if_ipv4_get_netmask_by_addr_veneer = 0x1807dca9); +PROVIDE(__net_eth_carrier_on_veneer = 0x1807dcb1); +PROVIDE(__wlan_11n_update_txbastream_tbl_tx_thresh_veneer = 0x1807dcb9); +PROVIDE(__wlan_ralist_add_enh_veneer = 0x1807dcc1); +PROVIDE(__net_if_up_veneer = 0x1807dcc9); +PROVIDE(__wakelock_isheld_veneer = 0x1807dcd1); +PROVIDE(__net_pkt_get_info_veneer = 0x1807dcd9); +PROVIDE(__net_if_ipv4_addr_rm_veneer = 0x1807dce1); +PROVIDE(__net_if_ipv6_router_update_lifetime_veneer = 0x1807dce9); +PROVIDE(__net_ipv4_create_veneer = 0x1807dcf1); +PROVIDE(__z_thread_abort_veneer = 0x1807dcf9); +PROVIDE(__z_impl_zsock_listen_veneer = 0x1807dd01); +PROVIDE(__z_sched_wake_thread_veneer = 0x1807dd09); +PROVIDE(__net_if_ipv6_select_src_addr_veneer = 0x1807dd11); +PROVIDE(__net_tcp_conn_sem_get_veneer = 0x1807dd19); +PROVIDE(__net_if_foreach_veneer = 0x1807dd21); +PROVIDE(__net_try_send_data_veneer = 0x1807dd29); +PROVIDE(__wlan_11n_cleanup_reorder_tbl_veneer = 0x1807dd31); +PROVIDE(__net_ipaddr_parse_veneer = 0x1807dd39); +PROVIDE(__wifi_init_veneer = 0x1807dd41); +PROVIDE(__wlan_11n_get_txbastream_tbl_veneer = 0x1807dd49); +PROVIDE(__net_if_ipv6_maddr_add_veneer = 0x1807dd51); +PROVIDE(__z_setup_new_thread_veneer = 0x1807dd59); +PROVIDE(__z_impl_k_wakeup_veneer = 0x1807dd61); +PROVIDE(__net_get_if_ipv6_addr_veneer = 0x1807dd69); +PROVIDE(__z_impl_zsock_bind_veneer = 0x1807dd71); +PROVIDE(__POWER_EnableGDetVSensors_veneer = 0x1807dd79); +PROVIDE(__OSA_SemaphoreWait_veneer = 0x1807dd81); +PROVIDE(__wlan_ret_wmm_param_config_veneer = 0x1807dd89); +PROVIDE(__net_get_if_addr_veneer = 0x1807dd91); +PROVIDE(__net_tcp_set_option_veneer = 0x1807dd99); +PROVIDE(__OSA_ExitCritical_veneer = 0x1807dda1); +PROVIDE(__net_calc_chksum_veneer = 0x1807dda9); +PROVIDE(__net_if_down_veneer = 0x1807ddb1); +PROVIDE(__net_if_mcast_monitor_veneer = 0x1807ddb9); +PROVIDE(__wlan_11n_ba_stream_timeout_veneer = 0x1807ddc1); +PROVIDE(__net_if_ipv6_prefix_add_veneer = 0x1807ddc9); +PROVIDE(__ipv6_addr_type_to_desc_veneer = 0x1807ddd1); +PROVIDE(__net_pkt_available_buffer_veneer = 0x1807ddd9); +PROVIDE(__net_if_ipv4_addr_lookup_veneer = 0x1807dde1); +PROVIDE(__net_pkt_alloc_with_buffer_veneer = 0x1807dde9); +PROVIDE(__OSA_EnterCritical_veneer = 0x1807ddf1); +PROVIDE(__wlan_11n_create_txbastream_tbl_veneer = 0x1807ddf9); +PROVIDE(__OSA_MutexUnlock_veneer = 0x1807de01); +PROVIDE(__net_stop_dhcp_timer_veneer = 0x1807de09); +PROVIDE(__net_if_ipv6_prefix_lookup_veneer = 0x1807de11); +PROVIDE(__net_pkt_ref_veneer = 0x1807de19); +PROVIDE(__net_sprint_ll_addr_buf_veneer = 0x1807de21); +PROVIDE(__mlan_11n_update_bastream_tbl_veneer = 0x1807de29); +PROVIDE(__FLEXSPI_GetDefaultConfig_veneer = 0x1807de31); +PROVIDE(__z_impl_zsock_inet_pton_veneer = 0x1807de39); +PROVIDE(__wlan_cmd_11n_uap_addba_rspgen_veneer = 0x1807de41); +PROVIDE(__wlan_ret_11n_cfg_veneer = 0x1807de49); +PROVIDE(__wifi_wmm_get_packet_cnt_veneer = 0x1807de51); +PROVIDE(__net_if_ipv6_calc_reachable_time_veneer = 0x1807de59); +PROVIDE(__net_if_ipv6_maddr_rm_veneer = 0x1807de61); +PROVIDE(__net_ipv6_frag_foreach_veneer = 0x1807de69); +PROVIDE(__wlan_send_addba_veneer = 0x1807de71); +PROVIDE(__send_wifi_driver_tx_null_data_event_veneer = 0x1807de79); +PROVIDE(__OSA_SemaphoreDestroy_veneer = 0x1807de81); +PROVIDE(__wifi_wmm_init_veneer = 0x1807de89); +PROVIDE(__z_impl_k_sleep_veneer = 0x1807de91); +PROVIDE(__net_context_ref_veneer = 0x1807de99); +PROVIDE(__wlan_cleanup_reorder_tbl_veneer = 0x1807dea1); +PROVIDE(__net_if_stop_rs_veneer = 0x1807dea9); +PROVIDE(__net_ipv6_finalize_veneer = 0x1807deb1); +PROVIDE(__net_if_ipv6_prefix_set_timer_veneer = 0x1807deb9); +PROVIDE(__k_work_delayable_busy_get_veneer = 0x1807dec1); +PROVIDE(__net_if_ipv6_addr_add_veneer = 0x1807dec9); +PROVIDE(__net_ipv6_unspecified_address_veneer = 0x1807ded1); +PROVIDE(__z_impl_k_queue_peek_head_veneer = 0x1807ded9); +PROVIDE(__net_context_sendmsg_veneer = 0x1807dee1); +PROVIDE(__net_context_bind_veneer = 0x1807dee9); +PROVIDE(__net_if_need_calc_rx_checksum_veneer = 0x1807def1); +PROVIDE(__wifi_get_command_lock_veneer = 0x1807def9); +PROVIDE(__z_impl_zsock_accept_veneer = 0x1807df01); +PROVIDE(__net_context_set_option_veneer = 0x1807df09); +PROVIDE(__net_pkt_memset_veneer = 0x1807df11); +PROVIDE(__z_sched_init_veneer = 0x1807df19); +PROVIDE(__net_if_dormant_on_veneer = 0x1807df21); +PROVIDE(__z_impl_k_sem_give_veneer = 0x1807df29); +PROVIDE(__net_context_foreach_veneer = 0x1807df31); +PROVIDE(__wlan_cmd_append_11n_tlv_veneer = 0x1807df39); +PROVIDE(__wakelock_get_veneer = 0x1807df41); +PROVIDE(__OSA_SemaphorePost_veneer = 0x1807df49); +PROVIDE(__net_ipv4_finalize_veneer = 0x1807df51); +PROVIDE(__wifi_event_completion_veneer = 0x1807df59); +PROVIDE(__net_if_ipv6_prefix_rm_veneer = 0x1807df61); +PROVIDE(__wlan_ralist_del_enh_veneer = 0x1807df69); +PROVIDE(__net_tcp_foreach_veneer = 0x1807df71); +PROVIDE(__net_if_ipv6_maddr_join_veneer = 0x1807df79); +PROVIDE(__net_pkt_copy_veneer = 0x1807df81); +PROVIDE(__net_if_ipv6_addr_update_lifetime_veneer = 0x1807df89); +PROVIDE(__net_if_ipv4_addr_mask_cmp_veneer = 0x1807df91); +PROVIDE(__wifi_inject_frame_veneer = 0x1807df99); +PROVIDE(__net_if_ipv4_set_netmask_by_addr_veneer = 0x1807dfa1); +PROVIDE(__wlan_cmd_wmm_param_config_veneer = 0x1807dfa9); +PROVIDE(__k_queue_unique_append_veneer = 0x1807dfb1); +PROVIDE(__wlan_update_rxreorder_tbl_veneer = 0x1807dfb9); +PROVIDE(__net_if_ipv4_maddr_join_veneer = 0x1807dfc1); +PROVIDE(__net_get_uap_handle_veneer = 0x1807dfc9); +PROVIDE(__z_unpend_all_veneer = 0x1807dfd1); +PROVIDE(__k_queue_append_veneer = 0x1807dfd9); +PROVIDE(__wlan_ret_11n_addba_resp_veneer = 0x1807dfe1); +PROVIDE(__net_if_ipv6_router_rm_veneer = 0x1807dfe9); +PROVIDE(__net_if_ipv4_maddr_rm_veneer = 0x1807dff1); +PROVIDE(__net_ipv6_addr_generate_iid_veneer = 0x1807dff9); +PROVIDE(__z_impl_k_queue_get_veneer = 0x1807e001); +PROVIDE(__net_if_need_calc_tx_checksum_veneer = 0x1807e009); +PROVIDE(__net_if_ipv4_set_gw_veneer = 0x1807e011); +PROVIDE(__net_if_ipv6_dad_failed_veneer = 0x1807e019); +PROVIDE(__POWER_EnterPowerMode_veneer = 0x1807e021); +PROVIDE(__net_ipv4_broadcast_address_veneer = 0x1807e029); +PROVIDE(__net_if_get_default_veneer = 0x1807e031); +PROVIDE(__net_if_ipv6_addr_rm_veneer = 0x1807e039); +PROVIDE(__csi_deliver_data_to_user_veneer = 0x1807e041); +PROVIDE(__net_if_ipv4_maddr_lookup_veneer = 0x1807e049); +PROVIDE(__z_impl_zsock_getsockopt_veneer = 0x1807e051); +PROVIDE(__OSA_TaskCreate_veneer = 0x1807e059); +PROVIDE(__OSA_SemaphoreCreateBinary_veneer = 0x1807e061); +PROVIDE(__net_pkt_cursor_init_veneer = 0x1807e069); +PROVIDE(__POWER_DisableGDetVSensors_veneer = 0x1807e071); +PROVIDE(__k_sched_unlock_veneer = 0x1807e079); +PROVIDE(__z_impl_k_yield_veneer = 0x1807e081); +PROVIDE(__wlan_cmd_11n_delba_veneer = 0x1807e089); +PROVIDE(__wlan_11n_deleteall_txbastream_tbl_veneer = 0x1807e091); +PROVIDE(__net_tcp_tx_sem_get_veneer = 0x1807e099); +PROVIDE(__k_work_cancel_delayable_sync_veneer = 0x1807e0a1); +PROVIDE(__z_impl_k_mutex_lock_veneer = 0x1807e0a9); +PROVIDE(__OSA_TimerDeactivate_veneer = 0x1807e0b1); +PROVIDE(__k_work_init_delayable_veneer = 0x1807e0b9); +PROVIDE(__z_impl_net_if_ipv4_addr_lookup_by_index_veneer = 0x1807e0c1); +PROVIDE(__net_sprint_addr_veneer = 0x1807e0c9); +PROVIDE(__net_pkt_unref_veneer = 0x1807e0d1); +PROVIDE(__net_if_ipv4_maddr_leave_veneer = 0x1807e0d9); +PROVIDE(__FLEXSPI_TransferBlocking_veneer = 0x1807e0e1); +PROVIDE(__z_impl_zsock_close_veneer = 0x1807e0e9); +PROVIDE(__wifi_register_event_queue_veneer = 0x1807e0f1); +PROVIDE(__net_context_get_option_veneer = 0x1807e0f9); +PROVIDE(__k_thread_name_get_veneer = 0x1807e101); +PROVIDE(__net_if_ipv6_select_src_iface_veneer = 0x1807e109); +PROVIDE(__OSA_TimerCreate_veneer = 0x1807e111); +PROVIDE(__net_if_ipv4_is_addr_bcast_veneer = 0x1807e119); +PROVIDE(__net_if_get_wifi_sap_veneer = 0x1807e121); +PROVIDE(__wifi_user_scan_config_cleanup_veneer = 0x1807e129); +PROVIDE(__wlan_11n_delete_bastream_veneer = 0x1807e131); +PROVIDE(__net_bytes_from_str_veneer = 0x1807e139); +PROVIDE(__OSA_MemoryAllocate_veneer = 0x1807e141); +PROVIDE(__wifi_get_scan_result_veneer = 0x1807e149); +PROVIDE(__net_tcp_get_option_veneer = 0x1807e151); +PROVIDE(__net_pkt_write_veneer = 0x1807e159); +PROVIDE(__net_ipv4_parse_hdr_options_veneer = 0x1807e161); +PROVIDE(__gen_tx_pkt_from_data_veneer = 0x1807e169); +PROVIDE(__OSA_RWLockWriteUnlock_veneer = 0x1807e171); +PROVIDE(__net_if_ipv4_addr_add_veneer = 0x1807e179); +PROVIDE(__net_wifi_packet_send_veneer = 0x1807e181); +PROVIDE(__OSA_MutexLock_veneer = 0x1807e189); +PROVIDE(__z_impl_zsock_recvfrom_veneer = 0x1807e191); +PROVIDE(__net_context_get_local_addr_veneer = 0x1807e199); +PROVIDE(__z_impl_zsock_connect_veneer = 0x1807e1a1); +PROVIDE(__z_impl_k_queue_init_veneer = 0x1807e1a9); +PROVIDE(__net_calc_chksum_igmp_veneer = 0x1807e1b1); +PROVIDE(__z_reschedule_irqlock_veneer = 0x1807e1b9); +PROVIDE(__z_impl_net_if_get_by_index_veneer = 0x1807e1c1); +PROVIDE(__OSA_SemaphoreCreate_veneer = 0x1807e1c9); +PROVIDE(__net_if_try_queue_tx_veneer = 0x1807e1d1); +PROVIDE(__z_impl_k_sem_take_veneer = 0x1807e1d9); +PROVIDE(__wlan_cmd_11n_addba_rspgen_veneer = 0x1807e1e1); +PROVIDE(__net_interface_up_veneer = 0x1807e1e9); +PROVIDE(__mlan_11n_rxreorder_pkt_veneer = 0x1807e1f1); +PROVIDE(__net_if_ipv4_select_src_addr_veneer = 0x1807e1f9); +PROVIDE(__net_context_send_veneer = 0x1807e201); +PROVIDE(__z_reschedule_veneer = 0x1807e209); +PROVIDE(__net_if_ipv4_addr_get_first_by_index_veneer = 0x1807e211); +PROVIDE(__FLEXSPI_UpdateLUT_veneer = 0x1807e219); +PROVIDE(__ipv6_addr_state_to_desc_veneer = 0x1807e221); +PROVIDE(__z_impl_k_usleep_veneer = 0x1807e229); +PROVIDE(__z_unpend_thread_veneer = 0x1807e231); +PROVIDE(__z_sched_waitq_walk_veneer = 0x1807e239); +PROVIDE(__POWER_SetSleepMode_veneer = 0x1807e241); +PROVIDE(__CLOCK_InitAvPll_veneer = 0x10068319); +PROVIDE(__CLOCK_SetFRGClock_veneer = 0x10068321); +PROVIDE(__CLOCK_InitTcpuRefClk_veneer = 0x10068329); +PROVIDE(__CLOCK_GetFlexspiClkFreq_veneer = 0x10068331); +PROVIDE(__CLOCK_InitTddrRefClk_veneer = 0x10068339); +PROVIDE(__RESET_PeripheralReset_veneer = 0x10068341); +PROVIDE(__SystemInit_veneer = 0x10068349); +PROVIDE(__CLOCK_EnableClock_veneer = 0x10068351); +PROVIDE(__CLOCK_SetClkDiv_veneer = 0x10068359); +PROVIDE(____assert_no_args_veneer = 0x10068361); +PROVIDE(__CLOCK_AttachClk_veneer = 0x10068369); +PROVIDE(__CLOCK_EnableUsbhsPhyClock_veneer = 0x10068371); +PROVIDE(__SystemCoreClockUpdate_veneer = 0x10068379); +PROVIDE(__CLOCK_InitT3RefClk_veneer = 0x10068381); +PROVIDE(__memset_veneer = 0x10067191); +PROVIDE(__wifi_pmip_v33_enable_veneer = 0x10067199); +PROVIDE(__net_ipv6_mld_leave_veneer = 0x100671a1); +PROVIDE(__memmove_veneer = 0x100671a9); +PROVIDE(__wifi_prepare_and_send_cmd_veneer = 0x100671b1); +PROVIDE(__net_mgmt_event_init_veneer = 0x100671b9); +PROVIDE(__snprintf_veneer = 0x100671c1); +PROVIDE(__power_off_device_veneer = 0x100671c9); +PROVIDE(__wifi_handle_fw_event_veneer = 0x100671d1); +PROVIDE(__net_icmpv6_send_error_veneer = 0x100671d9); +PROVIDE(__strtoul_veneer = 0x100671e1); +PROVIDE(__net_ipv6_mld_init_veneer = 0x100671e9); +PROVIDE(__socket_service_init_veneer = 0x100671f1); +PROVIDE(__net_ipv4_igmp_init_veneer = 0x100671f9); +PROVIDE(__net_timeout_evaluate_veneer = 0x10067201); +PROVIDE(__net_arp_prepare_veneer = 0x10067209); +PROVIDE(__z_thread_monitor_exit_veneer = 0x10067211); +PROVIDE(__wlan_get_mac_address_veneer = 0x10067219); +PROVIDE(__k_heap_alloc_veneer = 0x10067221); +PROVIDE(__wifi_nm_iface_is_sta_veneer = 0x10067229); +PROVIDE(__z_impl_net_socket_service_register_veneer = 0x10067231); +PROVIDE(__sys_timepoint_timeout_veneer = 0x10067239); +PROVIDE(__net_ipv6_start_dad_veneer = 0x10067241); +PROVIDE(__strncasecmp_veneer = 0x10067249); +PROVIDE(__net_ipv6_nbr_init_veneer = 0x10067251); +PROVIDE(__wlan_get_mac_address_uap_veneer = 0x10067259); +PROVIDE(__wifi_get_value1_from_cmdresp_veneer = 0x10067261); +PROVIDE(__z_impl_k_event_wait_veneer = 0x10067269); +PROVIDE(____assert_no_args_veneer = 0x10067271); +PROVIDE(__net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_FILTER_veneer = 0x10067279); +PROVIDE(__z_timeout_remaining_veneer = 0x10067281); +PROVIDE(__CACHE64_InvalidateCacheByRange_veneer = 0x10067289); +PROVIDE(__memcmp_veneer = 0x10067291); +PROVIDE(__z_abort_timeout_veneer = 0x10067299); +PROVIDE(__net_buf_simple_add_veneer = 0x100672a1); +PROVIDE(__wifi_malloc_eventbuf_veneer = 0x100672a9); +PROVIDE(__z_impl_k_event_post_veneer = 0x100672b1); +PROVIDE(__net_mgmt_event_notify_with_info_veneer = 0x100672b9); +PROVIDE(__net_dhcpv4_accept_unicast_veneer = 0x100672c1); +PROVIDE(__z_reset_time_slice_veneer = 0x100672c9); +PROVIDE(__memcpy_veneer = 0x100672d1); +PROVIDE(__net_ipv6_nbr_rm_veneer = 0x100672d9); +PROVIDE(__net_route_get_info_veneer = 0x100672e1); +PROVIDE(__net_arp_clear_pending_veneer = 0x100672e9); +PROVIDE(__sys_clock_tick_get_32_veneer = 0x100672f1); +PROVIDE(__wrapper_bssdesc_first_set_veneer = 0x100672f9); +PROVIDE(__net_timeout_set_veneer = 0x10067301); +PROVIDE(__z_impl_device_is_ready_veneer = 0x10067309); +PROVIDE(__wlan_wlcmgr_send_msg_veneer = 0x10067311); +PROVIDE(____aeabi_read_tp_veneer = 0x10067319); +PROVIDE(__shell_fprintf_impl_veneer = 0x10067321); +PROVIDE(__wrapper_wlan_uap_ampdu_enable_veneer = 0x10067329); +PROVIDE(__wifi_prepare_get_value1_veneer = 0x10067331); +PROVIDE(__pinctrl_lookup_state_veneer = 0x10067339); +PROVIDE(__wlan_add_ext_capa_info_ie_veneer = 0x10067341); +PROVIDE(__net_dhcpv4_server_init_veneer = 0x10067349); +PROVIDE(__net_icmpv6_init_veneer = 0x10067351); +PROVIDE(__z_thread_entry_veneer = 0x10067359); +PROVIDE(__z_handle_obj_poll_events_veneer = 0x10067361); +PROVIDE(__assert_print_veneer = 0x10067369); +PROVIDE(__net_icmpv6_finalize_veneer = 0x10067371); +PROVIDE(__net_buf_simple_reserve_veneer = 0x10067379); +PROVIDE(__net_route_packet_veneer = 0x10067381); +PROVIDE(__region_string_2_region_code_veneer = 0x10067389); +PROVIDE(__sys_timepoint_calc_veneer = 0x10067391); +PROVIDE(__shell_help_veneer = 0x10067399); +PROVIDE(__wlan_scan_networks_veneer = 0x100673a1); +PROVIDE(__wifi_get_firmware_ver_ext_from_cmdresp_veneer = 0x100673a9); +PROVIDE(__wrapper_bssdesc_second_set_veneer = 0x100673b1); +PROVIDE(__wrapper_get_wpa_ie_in_assoc_veneer = 0x100673b9); +PROVIDE(__k_heap_aligned_alloc_veneer = 0x100673c1); +PROVIDE(__wifi_send_remain_on_channel_cmd_veneer = 0x100673c9); +PROVIDE(__wlan_use_non_default_ht_vht_cap_veneer = 0x100673d1); +PROVIDE(__wifi_cau_temperature_write_to_firmware_veneer = 0x100673d9); +PROVIDE(__z_impl_sys_rand_get_veneer = 0x100673e1); +PROVIDE(__wlan_process_rx_packet_veneer = 0x100673e9); +PROVIDE(__wlan_ret_get_hw_spec_veneer = 0x100673f1); +PROVIDE(__strncmp_veneer = 0x100673f9); +PROVIDE(__wifi_prepare_set_mac_addr_cmd_veneer = 0x10067401); +PROVIDE(__net_mgmt_NET_REQUEST_ETHERNET_SET_TXINJECTION_MODE_veneer = 0x10067409); +PROVIDE(__k_heap_realloc_veneer = 0x10067411); +PROVIDE(__net_dhcpv4_stop_veneer = 0x10067419); +PROVIDE(__wifi_uap_set_bandwidth_veneer = 0x10067421); +PROVIDE(__net_ipv6_start_rs_veneer = 0x10067429); +PROVIDE(__wlan_set_mac_addr_veneer = 0x10067431); +PROVIDE(__mlan_subsys_deinit_veneer = 0x10067439); +PROVIDE(__wlan_11ac_bandconfig_allowed_veneer = 0x10067441); +PROVIDE(__net_ipv4_igmp_leave_veneer = 0x10067449); +PROVIDE(__memchr_veneer = 0x10067451); +PROVIDE(__net_arp_clear_cache_veneer = 0x10067459); +PROVIDE(__mlan_subsys_init_veneer = 0x10067461); +PROVIDE(__net_mgmt_add_event_callback_veneer = 0x10067469); +PROVIDE(__net_ipv4_igmp_join_veneer = 0x10067471); +PROVIDE(__is_sta_ipv6_connected_veneer = 0x10067479); +PROVIDE(__wlan_set_regiontable_veneer = 0x10067481); +PROVIDE(__sb3_fw_download_veneer = 0x10067489); +PROVIDE(__net_icmp_cleanup_ctx_veneer = 0x10067491); +PROVIDE(__arch_tls_stack_setup_veneer = 0x10067499); +PROVIDE(__wifi_prepare_get_fw_ver_ext_cmd_veneer = 0x100674a1); +PROVIDE(__z_spin_lock_valid_veneer = 0x100674a9); +PROVIDE(__z_impl_k_timer_start_veneer = 0x100674b1); +PROVIDE(__z_add_timeout_veneer = 0x100674b9); +PROVIDE(__wrapper_deliver_amsdu_subframe_veneer = 0x100674c1); +PROVIDE(__printk_veneer = 0x100674c9); +PROVIDE(____aeabi_uldivmod_veneer = 0x100674d1); +PROVIDE(__net_icmpv4_finalize_veneer = 0x100674d9); +PROVIDE(__net_ipv6_mld_join_veneer = 0x100674e1); +PROVIDE(__POWER_ClearWakeupStatus_veneer = 0x100674e9); +PROVIDE(__net_route_init_veneer = 0x100674f1); +PROVIDE(__wifi_mem_malloc_cmdrespbuf_veneer = 0x100674f9); +PROVIDE(__wifi_cau_temperature_enable_veneer = 0x10067501); +PROVIDE(__strncpy_veneer = 0x10067509); +PROVIDE(__wlan_prepare_cmd_veneer = 0x10067511); +PROVIDE(__dns_resolve_get_default_veneer = 0x10067519); +PROVIDE(__POWER_GetWakeupStatus_veneer = 0x10067521); +PROVIDE(__net_route_packet_if_veneer = 0x10067529); +PROVIDE(__net_ipv4_igmp_input_veneer = 0x10067531); +PROVIDE(__z_impl_k_event_clear_veneer = 0x10067539); +PROVIDE(__wrapper_wlan_handle_rx_packet_veneer = 0x10067541); +PROVIDE(__z_log_msg_runtime_vcreate_veneer = 0x10067549); +PROVIDE(__strrchr_veneer = 0x10067551); +PROVIDE(__wifi_set_mac_multicast_addr_veneer = 0x10067559); +PROVIDE(__net_arp_init_veneer = 0x10067561); +PROVIDE(__strtol_veneer = 0x10067569); +PROVIDE(__z_impl_k_timer_stop_veneer = 0x10067571); +PROVIDE(__z_impl_device_get_binding_veneer = 0x10067579); +PROVIDE(__dns_init_resolver_veneer = 0x10067581); +PROVIDE(__net_buf_simple_tailroom_veneer = 0x10067589); +PROVIDE(__wifi_free_eventbuf_veneer = 0x10067591); +PROVIDE(__net_icmp_send_echo_request_veneer = 0x10067599); +PROVIDE(__z_impl_k_thread_abort_veneer = 0x100675a1); +PROVIDE(__wifi_nm_iface_is_sap_veneer = 0x100675a9); +PROVIDE(__net_shell_init_veneer = 0x100675b1); +PROVIDE(__net_buf_simple_init_with_data_veneer = 0x100675b9); +PROVIDE(__net_ipv6_prepare_for_send_veneer = 0x100675c1); +PROVIDE(__z_spin_unlock_valid_veneer = 0x100675c9); +PROVIDE(__wlan_prepare_mac_control_cmd_veneer = 0x100675d1); +PROVIDE(__net_icmp_init_ctx_veneer = 0x100675d9); +PROVIDE(__ethernet_mgmt_raise_carrier_on_event_veneer = 0x100675e1); +PROVIDE(__net_dhcpv4_restart_veneer = 0x100675e9); +PROVIDE(__k_heap_free_veneer = 0x100675f1); +PROVIDE(__z_impl_k_event_wait_all_veneer = 0x100675f9); +PROVIDE(__arch_float_disable_veneer = 0x10067601); +PROVIDE(__net_icmpv6_input_veneer = 0x10067609); +PROVIDE(__net_buf_simple_pull_veneer = 0x10067611); +PROVIDE(__arch_new_thread_veneer = 0x10067619); +PROVIDE(__ethernet_mgmt_raise_carrier_off_event_veneer = 0x10067621); +PROVIDE(__net_buf_simple_max_len_veneer = 0x10067629); +PROVIDE(__wifi_prepare_get_mac_addr_cmd_veneer = 0x10067631); +PROVIDE(__wifi_prepare_get_hw_spec_cmd_veneer = 0x10067639); +PROVIDE(__net_buf_simple_headroom_veneer = 0x10067641); +PROVIDE(__net_dhcpv4_init_veneer = 0x10067649); +PROVIDE(__wrapper_wlan_sta_ampdu_enable_veneer = 0x10067651); +PROVIDE(__k_timer_init_veneer = 0x10067659); +PROVIDE(__z_spin_lock_set_owner_veneer = 0x10067661); +PROVIDE(__z_impl_k_uptime_ticks_veneer = 0x10067669); +PROVIDE(__wifi_check_last_packet_indication_veneer = 0x10067671); +PROVIDE(__z_impl_k_event_set_veneer = 0x10067679); +PROVIDE(__wrapper_wlan_cmd_11n_cfg_veneer = 0x10067681); +PROVIDE(__strchr_veneer = 0x10067689); +PROVIDE(__z_impl_k_event_init_veneer = 0x10067691); +PROVIDE(__CLOCK_EnableClock_veneer = 0x10067699); +PROVIDE(__strlen_veneer = 0x100676a1); +PROVIDE(__net_icmpv4_send_error_veneer = 0x100676a9); +PROVIDE(__dns_dispatcher_init_veneer = 0x100676b1); +PROVIDE(__net_buf_simple_add_mem_veneer = 0x100676b9); +PROVIDE(__wlan_band_to_radio_type_veneer = 0x100676c1); +PROVIDE(__net_ipv6_nbr_reachability_hint_veneer = 0x100676c9); +PROVIDE(__wifi_get_mac_address_from_cmdresp_veneer = 0x100676d1); +PROVIDE(__zvfs_close_veneer = 0x100676d9); +PROVIDE(__wifi_process_cmd_response_veneer = 0x100676e1); +PROVIDE(__net_icmpv4_input_veneer = 0x100676e9); +PROVIDE(__net_hostname_init_veneer = 0x100676f1); +PROVIDE(__net_icmpv4_init_veneer = 0x100676f9); +PROVIDE(__wlan_bypass_802dot11_mgmt_pkt_veneer = 0x10067701); +PROVIDE(__assert_post_action_veneer = 0x10067709); +PROVIDE(__get_ecsa_block_tx_flag_veneer = 0x10067711); +PROVIDE(__pinctrl_configure_pins_veneer = 0x10067719); +PROVIDE(__zvfs_get_fd_obj_and_vtable_veneer = 0x10067721); +PROVIDE(__wifi_prepare_set_cal_data_cmd_veneer = 0x10067729); +PROVIDE(__net_mgmt_del_event_callback_veneer = 0x10067731); PROVIDE(net_conn_init = 0x10040e71); -PROVIDE(k_work_cancel_sync = 0x10062d31); -PROVIDE(OSA_EventDestroy = 0x10045625); -PROVIDE(net_ipv4_unspecified_address = 0x1005f421); -PROVIDE(main = 0x1802e955); -PROVIDE(__aeabi_ul2d = 0x18029791); -PROVIDE(z_impl_net_if_ipv4_addr_add_by_index = 0x10055709); -PROVIDE(wifi_band_txt = 0x180497f1); -PROVIDE(wlan_mem_access = 0x1807852d); -PROVIDE(wlan_cmd_boot_sleep = 0x18067695); -PROVIDE(wifi_event_completion = 0x10061751); -PROVIDE(k_calloc = 0x100494a9); -PROVIDE(wlan_connect = 0x180750e9); -PROVIDE(OSA_MsgQCreate = 0x100459f5); -PROVIDE(wifi_imu_put_task_lock = 0x10061981); -PROVIDE(pm_device_state_str = 0x18032831); -PROVIDE(k_work_queue_drain = 0x100632c1); -PROVIDE(net_icmpv6_finalize = 0x180507bd); -PROVIDE(__strtok_r = 0x1808e035); -PROVIDE(z_timeout_remaining = 0x1808a81d); -PROVIDE(net_dhcpv4_stop = 0x18054aed); -PROVIDE(wifi_deregister_deliver_packet_above_callback = 0x1006131d); -PROVIDE(OSA_TimerDeactivate = 0x1005725d); -PROVIDE(wifi_set_rf_radio_mode = 0x180635f5); -PROVIDE(wlcm_process_csi_status_report = 0x18074335); -PROVIDE(I2C_MasterSetBaudRate = 0x1808581d); -PROVIDE(__floatdidf = 0x180297a1); -PROVIDE(memcmp = 0x1808deb7); -PROVIDE(z_shell_fprintf_fmt = 0x18037465); -PROVIDE(ethernet_mgmt_raise_carrier_on_event = 0x18048dd5); +PROVIDE(k_work_cancel_sync = 0x100628b9); +PROVIDE(OSA_EventDestroy = 0x10045605); +PROVIDE(net_ipv4_unspecified_address = 0x1005f041); +PROVIDE(main = 0x1802e4a9); +PROVIDE(__aeabi_ul2d = 0x18029181); +PROVIDE(z_impl_net_if_ipv4_addr_add_by_index = 0x100554bd); +PROVIDE(wifi_band_txt = 0x18048e11); +PROVIDE(wlan_cmd_boot_sleep = 0x18064845); +PROVIDE(wifi_event_completion = 0x100612f9); +PROVIDE(k_calloc = 0x10049421); +PROVIDE(wlan_connect = 0x180711a5); +PROVIDE(OSA_MsgQCreate = 0x100459d5); +PROVIDE(wifi_imu_put_task_lock = 0x10061529); +PROVIDE(pm_device_state_str = 0x18032325); +PROVIDE(k_work_queue_drain = 0x10062e49); +PROVIDE(net_icmpv6_finalize = 0x1804faf9); +PROVIDE(__strtok_r = 0x1807d361); +PROVIDE(z_timeout_remaining = 0x18079b49); +PROVIDE(net_dhcpv4_stop = 0x18053c79); +PROVIDE(wifi_deregister_deliver_packet_above_callback = 0x10060ec5); +PROVIDE(OSA_TimerDeactivate = 0x10056fbd); +PROVIDE(wlcm_process_csi_status_report = 0x180705a9); +PROVIDE(I2C_MasterSetBaudRate = 0x18074cad); +PROVIDE(__floatdidf = 0x18029191); +PROVIDE(memcmp = 0x1807d1e3); +PROVIDE(z_shell_fprintf_fmt = 0x18036ea1); +PROVIDE(ethernet_mgmt_raise_carrier_on_event = 0x180483f5); PROVIDE(net_buf_frag_del_debug = 0x1004077d); -PROVIDE(net_tcp_conn_sem_get = 0x1005a7fd); -PROVIDE(net_if_ipv6_maddr_join = 0x100532dd); -PROVIDE(HAL_ImuResetWlanTxq = 0x10043c85); -PROVIDE(listen = 0x1803b4fd); +PROVIDE(net_tcp_conn_sem_get = 0x1005a511); +PROVIDE(net_if_ipv6_maddr_join = 0x100530fd); +PROVIDE(HAL_ImuResetWlanTxq = 0x10043c65); +PROVIDE(listen = 0x1803aef9); PROVIDE(net_eth_carrier_off = 0x100420a5); -PROVIDE(z_shell_op_cursor_vert_move = 0x18037bb1); -PROVIDE(k_thread_runtime_stats_cpu_get = 0x1005e80d); -PROVIDE(sys_clock_idle_exit = 0x1805a649); -PROVIDE(wifi_get_band = 0x18064f09); -PROVIDE(wifi_configure_listen_interval = 0x18072aad); -PROVIDE(set_csi_filter = 0x1808471d); -PROVIDE(wifi_set_rf_channel = 0x1806359d); -PROVIDE(I2C_MasterGetDefaultConfig = 0x18085595); -PROVIDE(net_process_tx_packet = 0x10054b6d); -PROVIDE(wlan_find_bssid_in_list = 0x1806fe81); -PROVIDE(zperf_tcp_upload = 0x10066625); -PROVIDE(wlan_is_channel_and_freq_valid = 0x180664f1); -PROVIDE(zvfs_free_fd = 0x180306ed); -PROVIDE(addrtype2str = 0x18042759); -PROVIDE(wlan_get_listen_interval = 0x18075a7d); -PROVIDE(wlan_set_rf_tx_antenna = 0x180785c5); -PROVIDE(net_context_is_reuseaddr_set = 0x1004ee55); -PROVIDE(z_check_stack_sentinel = 0x1005e8d9); -PROVIDE(wlan_set_11ax_tx_omi = 0x180786e1); -PROVIDE(__aeabi_cdcmple = 0x18029cbd); -PROVIDE(wifi_wmm_drop_retried_drop = 0x1004b531); -PROVIDE(net_pkt_get_data = 0x10056525); -PROVIDE(crc16_reflect = 0x1802e961); -PROVIDE(z_shell_history_init = 0x18039175); -PROVIDE(wrapper_get_wpa_ie_in_assoc = 0x18068009); -PROVIDE(tanl = 0x1802d8f9); -PROVIDE(z_impl_k_timer_status_sync = 0x1802cda1); -PROVIDE(wrapper_wifi_assoc = 0x180681cd); -PROVIDE(llext_call_fn = 0x1803d9bd); -PROVIDE(abort = 0x1803aa51); -PROVIDE(net_pkt_get_reserve_rx_data = 0x1005666d); -PROVIDE(wifi_request_bgscan_query = 0x180696ed); -PROVIDE(fs_seek = 0x1803d1ed); -PROVIDE(net_icmpv6_init = 0x18050931); -PROVIDE(wifi_wpa3_enterprise_txt = 0x180497bd); -PROVIDE(dns_resolve_cancel = 0x1805798d); -PROVIDE(get_split_scan_delay_ms = 0x18076631); -PROVIDE(OSA_EnableScheduler = 0x100454fd); -PROVIDE(wlan_get_host_11k_status = 0x18076b59); -PROVIDE(set_ecsa_block_tx_time = 0x18065211); -PROVIDE(CLOCK_SetClkDiv = 0x1805cc69); -PROVIDE(unregister_csi_user_callback = 0x10060e79); -PROVIDE(dns_msg_pack_qname = 0x18056479); -PROVIDE(net_family2str = 0x1005f235); -PROVIDE(HAL_RpmsgExitLowpower = 0x10044299); -PROVIDE(is_ptr = 0x1802fe99); -PROVIDE(net_tx_priority2tc = 0x10056fb1); -PROVIDE(arch_irq_unlock_outlined = 0x1803a919); -PROVIDE(wifi_request_bgscan = 0x18069645); -PROVIDE(wlan_11n_update_txbastream_tbl_tx_thresh = 0x10049ca1); -PROVIDE(__wrap_realloc = 0x1803ab09); -PROVIDE(connect = 0x1803b4f9); -PROVIDE(wlan_reset = 0x180753f9); -PROVIDE(wifi_sta_ampdu_rx_disable = 0x100623d1); -PROVIDE(fs_read = 0x1803d14d); -PROVIDE(wifi_mem_access = 0x18062f65); -PROVIDE(FLEXSPI_DriverIRQHandler = 0x10044771); -PROVIDE(z_row_span_with_buffer_offsets_get = 0x180374cd); -PROVIDE(__pow5Factor = 0x1808d859); -PROVIDE(wlan_add_rm_beacon_report = 0x18061bd9); -PROVIDE(wifi_set_uap_max_clients = 0x1805ef5d); -PROVIDE(net_pkt_frag_add = 0x10056409); -PROVIDE(wlan_cleanup_reorder_tbl = 0x1004af99); +PROVIDE(z_shell_op_cursor_vert_move = 0x180375ed); +PROVIDE(k_thread_runtime_stats_cpu_get = 0x1005e495); +PROVIDE(sys_clock_idle_exit = 0x18059615); +PROVIDE(wifi_get_band = 0x180629fd); +PROVIDE(wifi_configure_listen_interval = 0x1806ef05); +PROVIDE(I2C_MasterGetDefaultConfig = 0x18074a25); +PROVIDE(net_process_tx_packet = 0x10054951); +PROVIDE(wlan_find_bssid_in_list = 0x1806c3b9); +PROVIDE(zperf_tcp_upload = 0x100660a9); +PROVIDE(zvfs_free_fd = 0x18030201); +PROVIDE(addrtype2str = 0x18042081); +PROVIDE(wlan_get_listen_interval = 0x18071851); +PROVIDE(net_context_is_reuseaddr_set = 0x1004ed2d); +PROVIDE(__aeabi_cdcmple = 0x180296ad); +PROVIDE(wifi_wmm_drop_retried_drop = 0x1004b4a9); +PROVIDE(net_pkt_get_data = 0x100562dd); +PROVIDE(crc16_reflect = 0x1802e4b5); +PROVIDE(z_shell_history_init = 0x18038b91); +PROVIDE(wrapper_get_wpa_ie_in_assoc = 0x18065119); +PROVIDE(tanl = 0x1802d469); +PROVIDE(z_impl_k_timer_status_sync = 0x1802c721); +PROVIDE(wrapper_wifi_assoc = 0x180651b1); +PROVIDE(llext_call_fn = 0x1803d39d); +PROVIDE(abort = 0x1803a44d); +PROVIDE(net_pkt_get_reserve_rx_data = 0x10056425); +PROVIDE(wifi_request_bgscan_query = 0x180666ad); +PROVIDE(fs_seek = 0x1803cbe9); +PROVIDE(net_icmpv6_init = 0x1804fc6d); +PROVIDE(wifi_wpa3_enterprise_txt = 0x18048ddd); +PROVIDE(dns_resolve_cancel = 0x1805697d); +PROVIDE(get_split_scan_delay_ms = 0x180723a9); +PROVIDE(OSA_EnableScheduler = 0x100454dd); +PROVIDE(wlan_get_host_11k_status = 0x180727c9); +PROVIDE(set_ecsa_block_tx_time = 0x18062b5d); +PROVIDE(CLOCK_SetClkDiv = 0x1805bb99); +PROVIDE(unregister_csi_user_callback = 0x10060a41); +PROVIDE(dns_msg_pack_qname = 0x1805552d); +PROVIDE(net_family2str = 0x1005ee79); +PROVIDE(HAL_RpmsgExitLowpower = 0x10044279); +PROVIDE(is_ptr = 0x1802f9cd); +PROVIDE(net_tx_priority2tc = 0x10056d11); +PROVIDE(arch_irq_unlock_outlined = 0x1803a315); +PROVIDE(wifi_request_bgscan = 0x18066605); +PROVIDE(wlan_11n_update_txbastream_tbl_tx_thresh = 0x10049c19); +PROVIDE(__wrap_realloc = 0x1803a505); +PROVIDE(connect = 0x1803aef5); +PROVIDE(wifi_sta_ampdu_rx_disable = 0x10061f59); +PROVIDE(fs_read = 0x1803cb49); +PROVIDE(FLEXSPI_DriverIRQHandler = 0x10044751); +PROVIDE(z_row_span_with_buffer_offsets_get = 0x18036f09); +PROVIDE(__pow5Factor = 0x1807cb85); +PROVIDE(wlan_add_rm_beacon_report = 0x180609f9); +PROVIDE(wifi_set_uap_max_clients = 0x1805de4d); +PROVIDE(net_pkt_frag_add = 0x100561c1); +PROVIDE(wlan_cleanup_reorder_tbl = 0x1004af11); PROVIDE(net_buf_append_bytes = 0x10040495); -PROVIDE(OCOTP_OtpDeinit = 0x1805de15); -PROVIDE(wlan_is_station = 0x18061355); -PROVIDE(usb_update_sn_string_descriptor = 0x180337d9); -PROVIDE(shell_thread = 0x18036ba5); -PROVIDE(sys_clock_announce = 0x1802cb81); -PROVIDE(wlan_set_rf_band = 0x18078585); -PROVIDE(net_mgmt_NET_REQUEST_STATS_GET_WIFI = 0x18049cc9); -PROVIDE(pm_state_set = 0x180312c1); -PROVIDE(wlan_add_mbo_cellular_cap = 0x1806cb59); -PROVIDE(arch_system_halt = 0x18088cc9); +PROVIDE(OCOTP_OtpDeinit = 0x1805cd45); +PROVIDE(wlan_is_station = 0x18060175); +PROVIDE(usb_update_sn_string_descriptor = 0x180332cd); +PROVIDE(shell_thread = 0x180365e1); +PROVIDE(sys_clock_announce = 0x1802c501); +PROVIDE(net_mgmt_NET_REQUEST_STATS_GET_WIFI = 0x180492e9); +PROVIDE(pm_state_set = 0x18030dd5); +PROVIDE(wlan_add_mbo_cellular_cap = 0x180690fd); +PROVIDE(arch_system_halt = 0x18078115); PROVIDE(ethernet_init = 0x100418ed); -PROVIDE(pinctrl_lookup_state = 0x18059709); -PROVIDE(log_filter_get = 0x18031911); -PROVIDE(__aeabi_fcmplt = 0x1802a145); -PROVIDE(z_impl_k_queue_init = 0x10057ad1); -PROVIDE(net_if_ipv6_maddr_add = 0x10053165); -PROVIDE(net_context_unref = 0x1004f6b5); -PROVIDE(__aeabi_fadd = 0x18029e99); -PROVIDE(_exit = 0x1803aa09); -PROVIDE(dns_dispatcher_unregister = 0x18056999); -PROVIDE(net_process_rx_packet = 0x1004f7ed); -PROVIDE(__aeabi_ui2f = 0x18029ff9); -PROVIDE(net_if_stats_reset_all = 0x100546b1); -PROVIDE(wifi_get_command_buffer = 0x10060655); -PROVIDE(__aeabi_ui2d = 0x18029709); -PROVIDE(log_msg_get_source_id = 0x18031d01); -PROVIDE(z_impl_k_pipe_init = 0x18089cb5); -PROVIDE(wlan_handle_event_ext_scan_report = 0x1806f009); -PROVIDE(wlan_get_tsp_cfg = 0x180798bd); -PROVIDE(OSA_RWLockReadLock = 0x100570d5); -PROVIDE(HAL_ImuDeleteTaskLock = 0x100431d5); -PROVIDE(z_log_msg_alloc = 0x18031601); +PROVIDE(pinctrl_lookup_state = 0x180586d5); +PROVIDE(log_filter_get = 0x18031425); +PROVIDE(__aeabi_fcmplt = 0x18029b35); +PROVIDE(z_impl_k_queue_init = 0x10057831); +PROVIDE(net_if_ipv6_maddr_add = 0x10052f85); +PROVIDE(net_context_unref = 0x1004f565); +PROVIDE(__aeabi_fadd = 0x18029889); +PROVIDE(_exit = 0x1803a405); +PROVIDE(dns_dispatcher_unregister = 0x18055a2d); +PROVIDE(net_process_rx_packet = 0x1004f69d); +PROVIDE(__aeabi_ui2f = 0x180299e9); +PROVIDE(net_if_stats_reset_all = 0x10054495); +PROVIDE(wifi_get_command_buffer = 0x10060241); +PROVIDE(__aeabi_ui2d = 0x180290f9); +PROVIDE(log_msg_get_source_id = 0x180317f5); +PROVIDE(z_impl_k_pipe_init = 0x18078ff1); +PROVIDE(wlan_handle_event_ext_scan_report = 0x1806b545); +PROVIDE(OSA_RWLockReadLock = 0x10056e35); +PROVIDE(HAL_ImuDeleteTaskLock = 0x100431b5); +PROVIDE(z_log_msg_alloc = 0x18031115); PROVIDE(net_conn_update = 0x100417b1); -PROVIDE(wlan_get_subscribe_event = 0x18078f8d); -PROVIDE(_sin = 0x1802d851); -PROVIDE(__aeabi_dsub = 0x1802948d); -PROVIDE(OSA_RWLockCreateWithCB = 0x1005707d); -PROVIDE(wlan_get_current_network_ssid = 0x18074edd); -PROVIDE(wifi_mgmt_raise_disconnect_result_event = 0x18049a7d); -PROVIDE(__ltsf2 = 0x1802a0b1); -PROVIDE(IMU_Init = 0x10045235); -PROVIDE(shell_strtol = 0x18037a25); -PROVIDE(handle_data_packet = 0x1004ce65); -PROVIDE(wifi_send_clear_wpa_psk = 0x18064645); -PROVIDE(CLOCK_DeinitAvPll = 0x1805d47d); +PROVIDE(_sin = 0x1802d3c1); +PROVIDE(__aeabi_dsub = 0x18028e7d); +PROVIDE(OSA_RWLockCreateWithCB = 0x10056ddd); +PROVIDE(wlan_get_current_network_ssid = 0x18071001); +PROVIDE(wifi_mgmt_raise_disconnect_result_event = 0x1804909d); +PROVIDE(__ltsf2 = 0x18029aa1); +PROVIDE(IMU_Init = 0x10045215); +PROVIDE(shell_strtol = 0x18037461); +PROVIDE(handle_data_packet = 0x1004cddd); +PROVIDE(wifi_send_clear_wpa_psk = 0x18062455); +PROVIDE(CLOCK_DeinitAvPll = 0x1805c3ad); PROVIDE(vfscanf = 0x00000001); -PROVIDE(srandom = 0x1808bc49); -PROVIDE(wlan_set_rx_abort_cfg_ext = 0x18074021); -PROVIDE(wifi_get_uap_max_clients = 0x1805ef55); -PROVIDE(wifi_supp_inject_frame = 0x10062441); -PROVIDE(net_tcp_finalize = 0x1005ab99); -PROVIDE(z_shell_vfprintf = 0x18038165); -PROVIDE(net_udp_register = 0x1005ee69); -PROVIDE(net_if_ipv6_get_hop_limit = 0x10052f81); -PROVIDE(wlan_get_address = 0x18075989); -PROVIDE(USB_DeviceEhciControl = 0x18087419); -PROVIDE(k_thread_name_get = 0x1005e7fd); -PROVIDE(z_impl_zsock_close = 0x1005a015); -PROVIDE(__printk_hook_install = 0x1803044d); -PROVIDE(wlan_get_current_network = 0x18074e8d); -PROVIDE(bus_deregister_data_input_funtion = 0x1005fba9); -PROVIDE(net_pkt_rx_alloc_with_buffer = 0x100569a1); -PROVIDE(net_if_ipv4_router_add = 0x100522b5); -PROVIDE(net_hostname_get = 0x1803f2dd); -PROVIDE(net_icmpv4_init = 0x1805030d); -PROVIDE(net_ipv4_input = 0x1004698d); -PROVIDE(wlan_misc_ioctl_rf_test_cfg = 0x1806d119); -PROVIDE(init_ready_q = 0x10057b7d); -PROVIDE(printk = 0x18030415); -PROVIDE(z_arm_exc_spurious = 0x1803a5dd); -PROVIDE(net_route_foreach = 0x18053781); -PROVIDE(CLOCK_GetMainClkFreq = 0x1805cca1); -PROVIDE(net_ipv6_nbr_init = 0x180526c9); -PROVIDE(wlan_set_rf_test_mode = 0x18078531); -PROVIDE(net_pkt_get_contiguous_len = 0x10056489); -PROVIDE(bss_zeroing_relocation = 0x1808bc0d); -PROVIDE(tan = 0x1802d8f9); -PROVIDE(shell_fprintf_info = 0x18036f19); -PROVIDE(net_if_ipv4_is_addr_bcast = 0x10051f6d); -PROVIDE(wlan_ops_uap_prepare_cmd = 0x1805f281); -PROVIDE(net_if_ipv6_get_ll = 0x10052fc9); -PROVIDE(z_impl_k_queue_alloc_prepend = 0x10057881); -PROVIDE(__eqsf2 = 0x1802a0b9); -PROVIDE(net_ipv6_mld_leave = 0x18052d19); -PROVIDE(net_neighbor_table_clear = 0x18050ef9); -PROVIDE(wifi_uap_bss_sta_list = 0x1805eb6d); -PROVIDE(wlan_process_bypass_txq = 0x10062825); -PROVIDE(net_if_ipv4_addr_rm = 0x10051cc9); -PROVIDE(W2MWKUP_DONE0_DriverIRQHandler = 0x1005fb81); -PROVIDE(z_impl_k_mutex_init = 0x1004c7d9); -PROVIDE(net_if_stop_rs = 0x10054721); -PROVIDE(z_impl_zsock_getsockopt = 0x1005a191); -PROVIDE(z_shell_print_stream = 0x18038079); -PROVIDE(z_shell_op_delete_from_cursor = 0x18037eed); -PROVIDE(pm_resume_devices = 0x18032985); -PROVIDE(wifi_wmm_drop_err_mem = 0x1004b4b1); -PROVIDE(wlan_get_temperature = 0x18079a3d); -PROVIDE(z_arm_cpu_idle_init = 0x1803a929); -PROVIDE(wlan_ops_sta_process_cmdresp = 0x18071971); -PROVIDE(__floatundidf = 0x18029791); -PROVIDE(z_impl_k_msgq_purge = 0x1004c435); -PROVIDE(OSA_TimerReset = 0x100572b9); -PROVIDE(net_pkt_set_data = 0x100569d1); -PROVIDE(frexp = 0x1808dbc5); -PROVIDE(net_context_get_option = 0x1004ec85); -PROVIDE(wlan_uap_get_log = 0x1807678d); -PROVIDE(wifi_set_rf_otp_mac_addr = 0x18063f11); -PROVIDE(zperf_get_ipv6_addr = 0x10063fbd); -PROVIDE(wlan_cmd_recfg_tx_buf = 0x1004a0c1); -PROVIDE(net_if_ipv6_select_src_addr = 0x10053a79); -PROVIDE(wifi_uap_ampdu_tx_enable_per_tid = 0x100624e1); -PROVIDE(wifi_deauthenticate = 0x18062ebd); -PROVIDE(sys_clock_elapsed = 0x1805a589); -PROVIDE(wifi_set_rf_tx_frame = 0x18063b91); -PROVIDE(z_impl_k_poll_signal_init = 0x1808b8b9); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXTIME_PARAM = 0x180487d9); -PROVIDE(net_pkt_read = 0x1005683d); -PROVIDE(OCOTP_OtpInit = 0x1805dded); -PROVIDE(__file_str_put = 0x1808e459); -PROVIDE(wlan_set_country_ie_ignore = 0x18079a05); -PROVIDE(wlan_get_mmsf = 0x18078ee9); -PROVIDE(wlan_get_antcfg = 0x18075c35); -PROVIDE(z_do_kernel_oops = 0x180396b5); -PROVIDE(net_context_get_local_addr = 0x1004ebf1); -PROVIDE(__floatsisf = 0x1802a001); -PROVIDE(wifi_uap_ampdu_rx_enable = 0x1006249d); -PROVIDE(z_impl_k_thread_name_set = 0x1005ea15); -PROVIDE(z_impl_zsock_connect = 0x1005a019); -PROVIDE(HAL_RpmsgNoCopySend = 0x100444d5); -PROVIDE(pinctrl_configure_pins = 0x1805975d); -PROVIDE(z_impl_log_filter_set = 0x1803183d); -PROVIDE(ring_buf_area_claim = 0x18030ff1); -PROVIDE(z_thread_monitor_exit = 0x1808a235); -PROVIDE(srand = 0x1808deb3); -PROVIDE(POWER_GetWakeupStatus = 0x1805d7f5); -PROVIDE(wlan_wowlan_config = 0x180792b9); -PROVIDE(wlan_basic_cli_init = 0x18079b81); -PROVIDE(ipv6_addr_state_to_desc = 0x1004d031); -PROVIDE(z_impl_k_queue_get = 0x100579e5); -PROVIDE(net_wifi_packet_send = 0x1004d4cd); -PROVIDE(net_context_init = 0x1004ee41); -PROVIDE(shell_help = 0x18037385); -PROVIDE(wlan_11d_get_scan_type = 0x18061a41); -PROVIDE(wifi_tsp_cfg = 0x18065915); -PROVIDE(wifi_get_tsf_info = 0x1806b57d); -PROVIDE(wifi_process_cmd_response = 0x18068445); -PROVIDE(wlan_add_network = 0x18074739); -PROVIDE(wlan_11n_delete_txbastream_tbl_entry = 0x10049b31); -PROVIDE(wifi_prepare_set_cal_data_cmd = 0x1806ab85); -PROVIDE(wlan_set_ps_cfg = 0x18079955); -PROVIDE(z_data_copy = 0x1808a4c5); +PROVIDE(srandom = 0x1807af75); +PROVIDE(wifi_get_uap_max_clients = 0x1805de45); +PROVIDE(wifi_supp_inject_frame = 0x10061fc9); +PROVIDE(net_tcp_finalize = 0x1005a885); +PROVIDE(z_shell_vfprintf = 0x18037ba1); +PROVIDE(net_udp_register = 0x1005eaad); +PROVIDE(net_if_ipv6_get_hop_limit = 0x10052da1); +PROVIDE(wlan_get_address = 0x18071795); +PROVIDE(USB_DeviceEhciControl = 0x180768a9); +PROVIDE(k_thread_name_get = 0x1005e485); +PROVIDE(z_impl_zsock_close = 0x10059d45); +PROVIDE(__printk_hook_install = 0x1802ff61); +PROVIDE(wlan_get_current_network = 0x18070fb1); +PROVIDE(bus_deregister_data_input_funtion = 0x1005f795); +PROVIDE(net_pkt_rx_alloc_with_buffer = 0x10056759); +PROVIDE(net_if_ipv4_router_add = 0x100520e9); +PROVIDE(net_hostname_get = 0x1803ec85); +PROVIDE(net_icmpv4_init = 0x1804f649); +PROVIDE(net_ipv4_input = 0x1004696d); +PROVIDE(wlan_misc_ioctl_rf_test_cfg = 0x180696bd); +PROVIDE(init_ready_q = 0x100578dd); +PROVIDE(printk = 0x1802ff29); +PROVIDE(z_arm_exc_spurious = 0x18039fd9); +PROVIDE(net_route_foreach = 0x18052945); +PROVIDE(CLOCK_GetMainClkFreq = 0x1805bbd1); +PROVIDE(net_ipv6_nbr_init = 0x18051931); +PROVIDE(net_pkt_get_contiguous_len = 0x10056241); +PROVIDE(bss_zeroing_relocation = 0x1807af39); +PROVIDE(tan = 0x1802d469); +PROVIDE(shell_fprintf_info = 0x18036955); +PROVIDE(net_if_ipv4_is_addr_bcast = 0x10051da1); +PROVIDE(wlan_ops_uap_prepare_cmd = 0x1805e165); +PROVIDE(net_if_ipv6_get_ll = 0x10052de9); +PROVIDE(z_impl_k_queue_alloc_prepend = 0x100575e1); +PROVIDE(__eqsf2 = 0x18029aa9); +PROVIDE(net_ipv6_mld_leave = 0x18051f41); +PROVIDE(net_neighbor_table_clear = 0x18050215); +PROVIDE(wifi_uap_bss_sta_list = 0x1805da5d); +PROVIDE(wlan_process_bypass_txq = 0x100623ad); +PROVIDE(net_if_ipv4_addr_rm = 0x10051afd); +PROVIDE(W2MWKUP_DONE0_DriverIRQHandler = 0x1005f76d); +PROVIDE(z_impl_k_mutex_init = 0x1004c751); +PROVIDE(net_if_stop_rs = 0x10054505); +PROVIDE(z_impl_zsock_getsockopt = 0x10059ec1); +PROVIDE(z_shell_print_stream = 0x18037ab5); +PROVIDE(z_shell_op_delete_from_cursor = 0x18037929); +PROVIDE(pm_resume_devices = 0x18032479); +PROVIDE(wifi_wmm_drop_err_mem = 0x1004b429); +PROVIDE(z_arm_cpu_idle_init = 0x1803a325); +PROVIDE(wlan_ops_sta_process_cmdresp = 0x1806de1d); +PROVIDE(__floatundidf = 0x18029181); +PROVIDE(z_impl_k_msgq_purge = 0x1004c3ad); +PROVIDE(OSA_TimerReset = 0x10057019); +PROVIDE(net_pkt_set_data = 0x10056789); +PROVIDE(frexp = 0x1807cef1); +PROVIDE(net_context_get_option = 0x1004eb5d); +PROVIDE(wlan_uap_get_log = 0x1807244d); +PROVIDE(zperf_get_ipv6_addr = 0x10063b45); +PROVIDE(wlan_cmd_recfg_tx_buf = 0x1004a039); +PROVIDE(net_if_ipv6_select_src_addr = 0x1005387d); +PROVIDE(wifi_uap_ampdu_tx_enable_per_tid = 0x10062069); +PROVIDE(wifi_deauthenticate = 0x18061c31); +PROVIDE(sys_clock_elapsed = 0x18059555); +PROVIDE(z_impl_k_poll_signal_init = 0x1807abe5); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXTIME_PARAM = 0x18047e15); +PROVIDE(net_pkt_read = 0x100565f5); +PROVIDE(OCOTP_OtpInit = 0x1805cd1d); +PROVIDE(__file_str_put = 0x1807d785); +PROVIDE(z_do_kernel_oops = 0x180390b1); +PROVIDE(net_context_get_local_addr = 0x1004eac9); +PROVIDE(__floatsisf = 0x180299f1); +PROVIDE(wifi_uap_ampdu_rx_enable = 0x10062025); +PROVIDE(z_impl_k_thread_name_set = 0x1005e669); +PROVIDE(z_impl_zsock_connect = 0x10059d49); +PROVIDE(HAL_RpmsgNoCopySend = 0x100444b5); +PROVIDE(pinctrl_configure_pins = 0x18058729); +PROVIDE(z_impl_log_filter_set = 0x18031351); +PROVIDE(ring_buf_area_claim = 0x18030b05); +PROVIDE(z_thread_monitor_exit = 0x18079571); +PROVIDE(srand = 0x1807d1df); +PROVIDE(POWER_GetWakeupStatus = 0x1805c725); +PROVIDE(ipv6_addr_state_to_desc = 0x1004cf89); +PROVIDE(z_impl_k_queue_get = 0x10057745); +PROVIDE(net_wifi_packet_send = 0x1004d3e9); +PROVIDE(net_context_init = 0x1004ed19); +PROVIDE(shell_help = 0x18036dc1); +PROVIDE(wlan_11d_get_scan_type = 0x18060861); +PROVIDE(wifi_process_cmd_response = 0x18065405); +PROVIDE(wlan_add_network = 0x1807085d); +PROVIDE(wlan_11n_delete_txbastream_tbl_entry = 0x10049aa9); +PROVIDE(wifi_prepare_set_cal_data_cmd = 0x18067b45); +PROVIDE(z_data_copy = 0x18079801); PROVIDE(net_buf_frag_add = 0x10040739); -PROVIDE(net_arp_update = 0x18048f6d); -PROVIDE(wifi_set_rx_status = 0x100623ad); -PROVIDE(net_udp_input = 0x1005ed8d); -PROVIDE(pm_suspend_devices = 0x1803290d); -PROVIDE(z_impl_k_event_set = 0x1808bbc1); -PROVIDE(z_impl_k_msgq_put = 0x1004c5c5); -PROVIDE(wlan_set_rf_rx_antenna = 0x180785d5); -PROVIDE(IMU_GetStatusFlags = 0x10045209); -PROVIDE(OSA_SetupIdleFunction = 0x10057195); -PROVIDE(wlan_cmd_11n_addba_rspgen = 0x1004afe9); -PROVIDE(k_work_flush_delayable = 0x100630b5); -PROVIDE(wlan_mef_set_auto_arp = 0x180790e5); -PROVIDE(wifi_twt_negotiation_type_txt = 0x180498b1); -PROVIDE(wifi_set_threshold_data_snr_high = 0x1806b9cd); -PROVIDE(wifi_get_device_value1 = 0x10060699); -PROVIDE(net_if_need_calc_rx_checksum = 0x100540a9); -PROVIDE(wifi_set_turbo_mode = 0x18065a2d); -PROVIDE(OSA_TimerGetContext = 0x1005728d); -PROVIDE(shell_backend_uart_get_ptr = 0x18035ae5); -PROVIDE(net_if_ipv4_addr_get_first_by_index = 0x10051b61); -PROVIDE(snprintf = 0x1808c28d); -PROVIDE(imu_uninstall_callback = 0x1005fc59); -PROVIDE(z_impl_k_thread_priority_get = 0x1005ea39); -PROVIDE(data_copy_xip_relocation = 0x1808bbf5); -PROVIDE(k_queue_insert = 0x10057581); -PROVIDE(z_impl_net_if_ipv6_addr_add_by_index = 0x10055839); -PROVIDE(dns_resolve_get_default = 0x18057d59); -PROVIDE(__gtdf2 = 0x18029c21); -PROVIDE(wlan_scan_process_results = 0x1806db29); -PROVIDE(get_session = 0x10064321); -PROVIDE(wlan_get_cfp_by_band_and_channel = 0x18066009); -PROVIDE(reset_ie_index = 0x18064945); -PROVIDE(cosl = 0x1802d3b1); -PROVIDE(k_queue_prepend = 0x100575b1); -PROVIDE(zsock_sendmsg_ctx = 0x18040325); -PROVIDE(net_calc_chksum_ipv4 = 0x1005f211); -PROVIDE(net_ipv6_nbr_rm = 0x18050f99); -PROVIDE(net_dhcpv4_start = 0x18054ae5); -PROVIDE(wlan_set_crypto_AES_GCMP_encrypt = 0x18078d2d); -PROVIDE(pm_device_is_busy = 0x180328ed); -PROVIDE(net_ipv4_igmp_input = 0x1802b279); -PROVIDE(wifi_get_listen_interval = 0x18072af9); -PROVIDE(isprint = 0x1808de39); -PROVIDE(net_timeout_remaining = 0x1804f011); -PROVIDE(wifi_get_rf_otp_cal_data = 0x18064031); -PROVIDE(dns_unpack_response_query = 0x18056681); -PROVIDE(z_work_submit_to_queue = 0x10063e51); -PROVIDE(HAL_ImuSendTxData = 0x10044125); -PROVIDE(is_sta_ipv6_connected = 0x18075085); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_AP_DISABLE = 0x18049ae5); -PROVIDE(llext_adjust_mmu_permissions = 0x1803dafd); -PROVIDE(wlan_update_11ax_cap = 0x18060945); -PROVIDE(wlan_get_mac_address = 0x180759f9); -PROVIDE(is_sta_connected = 0x1807506d); +PROVIDE(net_arp_update = 0x1804858d); +PROVIDE(wifi_set_rx_status = 0x10061f35); +PROVIDE(net_udp_input = 0x1005e9d1); +PROVIDE(pm_suspend_devices = 0x18032401); +PROVIDE(z_impl_k_event_set = 0x1807aeed); +PROVIDE(z_impl_k_msgq_put = 0x1004c53d); +PROVIDE(IMU_GetStatusFlags = 0x100451e9); +PROVIDE(OSA_SetupIdleFunction = 0x10056ef5); +PROVIDE(wlan_cmd_11n_addba_rspgen = 0x1004af61); +PROVIDE(k_work_flush_delayable = 0x10062c3d); +PROVIDE(wifi_twt_negotiation_type_txt = 0x18048ed1); +PROVIDE(wifi_get_device_value1 = 0x10060285); +PROVIDE(net_if_need_calc_rx_checksum = 0x10053ead); +PROVIDE(OSA_TimerGetContext = 0x10056fed); +PROVIDE(shell_backend_uart_get_ptr = 0x18035539); +PROVIDE(net_if_ipv4_addr_get_first_by_index = 0x10051995); +PROVIDE(snprintf = 0x1807b5b9); +PROVIDE(imu_uninstall_callback = 0x1005f845); +PROVIDE(z_impl_k_thread_priority_get = 0x1005e68d); +PROVIDE(data_copy_xip_relocation = 0x1807af21); +PROVIDE(k_queue_insert = 0x100572e1); +PROVIDE(z_impl_net_if_ipv6_addr_add_by_index = 0x100555ed); +PROVIDE(dns_resolve_get_default = 0x18056d25); +PROVIDE(__gtdf2 = 0x18029611); +PROVIDE(wlan_scan_process_results = 0x1806a0cd); +PROVIDE(get_session = 0x10063ea9); +PROVIDE(wlan_get_cfp_by_band_and_channel = 0x180633c1); +PROVIDE(reset_ie_index = 0x18062739); +PROVIDE(cosl = 0x1802cf21); +PROVIDE(k_queue_prepend = 0x10057311); +PROVIDE(zsock_sendmsg_ctx = 0x1803fcad); +PROVIDE(net_calc_chksum_ipv4 = 0x1005ee55); +PROVIDE(net_ipv6_nbr_rm = 0x180502b5); +PROVIDE(net_dhcpv4_start = 0x18053c71); +PROVIDE(pm_device_is_busy = 0x180323e1); +PROVIDE(net_ipv4_igmp_input = 0x1802ac69); +PROVIDE(wifi_get_listen_interval = 0x1806ef51); +PROVIDE(isprint = 0x1807d165); +PROVIDE(net_timeout_remaining = 0x1804e36d); +PROVIDE(dns_unpack_response_query = 0x18055735); +PROVIDE(z_work_submit_to_queue = 0x100639d9); +PROVIDE(HAL_ImuSendTxData = 0x10044105); +PROVIDE(is_sta_ipv6_connected = 0x18071141); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_AP_DISABLE = 0x18049105); +PROVIDE(llext_adjust_mmu_permissions = 0x1803d4dd); +PROVIDE(wlan_update_11ax_cap = 0x1805f765); +PROVIDE(wlan_get_mac_address = 0x18071805); +PROVIDE(is_sta_connected = 0x18071129); PROVIDE(CONFIG_SYS_HASH_FUNC32_CHOICE_MURMUR3 = 0x00000001); -PROVIDE(net_stack_buffer_copy_partial = 0x1004d405); -PROVIDE(net_pkt_cursor_init = 0x10056281); -PROVIDE(net_if_ipv6_addr_foreach = 0x10052885); -PROVIDE(wlan_set_ieeeps_cfg = 0x18075a3d); -PROVIDE(wifi_link_mode_txt = 0x18049839); -PROVIDE(net_arp_foreach = 0x180495f5); -PROVIDE(z_init_static = 0x18089281); -PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x180594b5); -PROVIDE(net_mgmt_event_init = 0x1804f5b5); -PROVIDE(net_ipv4_handle_fragment_hdr = 0x10046dc1); -PROVIDE(__aeabi_fcmple = 0x1802a159); -PROVIDE(wifi_set_action_ecsa_cfg = 0x180656e1); -PROVIDE(wrapper_wlan_11d_enable = 0x18067d11); -PROVIDE(z_impl_k_thread_abort = 0x1803a639); -PROVIDE(wifi_wmm_drop_no_media = 0x1004b4d1); -PROVIDE(wlan_uap_set_hidden_ssid = 0x180767c1); -PROVIDE(usb_dc_ep_set_callback = 0x18058d19); -PROVIDE(net_icmpv4_finalize = 0x180501a9); -PROVIDE(wifi_set_rf_tx_antenna = 0x180639a9); -PROVIDE(shell_fprintf_impl = 0x18036efd); -PROVIDE(net_get_sta_interface = 0x1004d3b9); -PROVIDE(wifi_prepare_get_mac_addr_cmd = 0x1806ac31); -PROVIDE(llext_by_name = 0x1803d691); +PROVIDE(net_stack_buffer_copy_partial = 0x1004d321); +PROVIDE(net_pkt_cursor_init = 0x10056039); +PROVIDE(net_if_ipv6_addr_foreach = 0x100526a5); +PROVIDE(wifi_link_mode_txt = 0x18048e59); +PROVIDE(net_arp_foreach = 0x18048c15); +PROVIDE(z_init_static = 0x180785bd); +PROVIDE(z_impl_hwinfo_clear_reset_cause = 0x18058481); +PROVIDE(net_mgmt_event_init = 0x1804e8f1); +PROVIDE(net_ipv4_handle_fragment_hdr = 0x10046d85); +PROVIDE(__aeabi_fcmple = 0x18029b49); +PROVIDE(wifi_set_action_ecsa_cfg = 0x1806302d); +PROVIDE(wrapper_wlan_11d_enable = 0x18064e2d); +PROVIDE(z_impl_k_thread_abort = 0x1803a035); +PROVIDE(wifi_wmm_drop_no_media = 0x1004b449); +PROVIDE(wlan_uap_set_hidden_ssid = 0x18072465); +PROVIDE(usb_dc_ep_set_callback = 0x18057ce5); +PROVIDE(net_icmpv4_finalize = 0x1804f4e5); +PROVIDE(shell_fprintf_impl = 0x18036939); +PROVIDE(net_get_sta_interface = 0x1004d2d5); +PROVIDE(wifi_prepare_get_mac_addr_cmd = 0x18067bf1); +PROVIDE(llext_by_name = 0x1803d071); PROVIDE(net_buf_reset = 0x10040971); -PROVIDE(__ltdf2 = 0x18029c29); -PROVIDE(net_tc_try_submit_to_tx_queue = 0x10056ec9); -PROVIDE(wifi_get_outbuf = 0x10061855); -PROVIDE(wifi_set_11ax_rutxpowerlimit = 0x1806b171); -PROVIDE(__d_vfprintf = 0x1808c995); +PROVIDE(__ltdf2 = 0x18029619); +PROVIDE(net_tc_try_submit_to_tx_queue = 0x10056c55); +PROVIDE(wifi_get_outbuf = 0x100613fd); +PROVIDE(wifi_set_11ax_rutxpowerlimit = 0x18067e6d); +PROVIDE(__d_vfprintf = 0x1807bcc1); PROVIDE(net_conn_register = 0x1004138d); -PROVIDE(OSA_TaskSetPriority = 0x100466c5); -PROVIDE(net_pkt_compact = 0x100560a1); -PROVIDE(shell_process = 0x18036575); +PROVIDE(OSA_TaskSetPriority = 0x100466a5); +PROVIDE(net_pkt_compact = 0x10055e59); +PROVIDE(shell_process = 0x18035fc9); PROVIDE(CONFIG_LOG_FUNC_NAME_PREFIX_DBG = 0x00000001); -PROVIDE(z_reset_time_slice = 0x1808a079); -PROVIDE(net_route_lookup = 0x18052ff9); -PROVIDE(z_impl_k_thread_priority_set = 0x100584b9); -PROVIDE(cos = 0x1802d3b1); -PROVIDE(wlan_cmd_region_power_cfg = 0x1806745d); -PROVIDE(strcmp = 0x1802a2cd); -PROVIDE(z_setup_new_thread = 0x1005ea89); -PROVIDE(vApplicationIdleHook = 0x10057325); -PROVIDE(__lesf2 = 0x1802a0b1); -PROVIDE(z_shell_op_cursor_horiz_move = 0x18037be5); -PROVIDE(wifi_config_roaming = 0x1806b01d); -PROVIDE(wifi_get_imu_outbuf = 0x100606a5); -PROVIDE(wifi_ps_txt = 0x18049851); -PROVIDE(zperf_get_sin6 = 0x10064059); -PROVIDE(z_impl_k_thread_create = 0x1005e94d); -PROVIDE(wlan_set_bandcfg = 0x18079935); -PROVIDE(__umul128 = 0x1808e2b3); -PROVIDE(net_icmpv6_send_error = 0x1802b401); -PROVIDE(wlan_set_custom_regiontable = 0x1806665d); -PROVIDE(z_impl_zsock_bind = 0x10059fb9); -PROVIDE(net_timeout_set = 0x1804efd5); -PROVIDE(wlan_get_turbo_mode = 0x18079945); -PROVIDE(arch_cpu_idle = 0x1803a935); -PROVIDE(z_impl_log_frontend_filter_set = 0x18031851); -PROVIDE(z_impl_k_sleep = 0x10058285); -PROVIDE(wifi_get_rf_channel = 0x18063651); -PROVIDE(wlan_process_802dot11_mgmt_pkt = 0x1806cd39); -PROVIDE(ethernet_mgmt_raise_carrier_off_event = 0x18048de5); -PROVIDE(wlan_set_ru_power_cfg = 0x18084ab5); -PROVIDE(sys_heap_init = 0x1802f6d1); -PROVIDE(wifi_get_rf_otp_mac_addr = 0x18063f65); -PROVIDE(wlan_show_dot11ndevcap = 0x1004a5e1); -PROVIDE(wifi_uap_config_wifi_capa = 0x1805eb0d); -PROVIDE(memc_flexspi_set_device_config = 0x10049191); -PROVIDE(wlan_get_rf_otp_mac_addr = 0x1807863d); -PROVIDE(usb_dc_ep_mps = 0x18058d89); -PROVIDE(wifi_set_ps_cfg = 0x18072a59); -PROVIDE(net_route_get_nexthop = 0x180530fd); -PROVIDE(z_shell_fprintf = 0x180381b5); -PROVIDE(OCOTP_OtpFuseRead = 0x1805de65); +PROVIDE(z_reset_time_slice = 0x180793b5); +PROVIDE(net_route_lookup = 0x180521fd); +PROVIDE(z_impl_k_thread_priority_set = 0x10058211); +PROVIDE(cos = 0x1802cf21); +PROVIDE(wlan_cmd_region_power_cfg = 0x1806460d); +PROVIDE(strcmp = 0x18029cbd); +PROVIDE(z_setup_new_thread = 0x1005e6d9); +PROVIDE(vApplicationIdleHook = 0x10057085); +PROVIDE(__lesf2 = 0x18029aa1); +PROVIDE(z_shell_op_cursor_horiz_move = 0x18037621); +PROVIDE(wifi_get_imu_outbuf = 0x10060291); +PROVIDE(wifi_ps_txt = 0x18048e71); +PROVIDE(zperf_get_sin6 = 0x10063be1); +PROVIDE(z_impl_k_thread_create = 0x1005e5a1); +PROVIDE(__umul128 = 0x1807d5df); +PROVIDE(net_icmpv6_send_error = 0x1802adf1); +PROVIDE(z_impl_zsock_bind = 0x10059ce9); +PROVIDE(net_timeout_set = 0x1804e331); +PROVIDE(arch_cpu_idle = 0x1803a331); +PROVIDE(z_impl_log_frontend_filter_set = 0x18031365); +PROVIDE(z_impl_k_sleep = 0x10057fe1); +PROVIDE(wlan_process_802dot11_mgmt_pkt = 0x180692dd); +PROVIDE(ethernet_mgmt_raise_carrier_off_event = 0x18048405); +PROVIDE(wlan_set_ru_power_cfg = 0x1807439d); +PROVIDE(sys_heap_init = 0x1802f225); +PROVIDE(wlan_show_dot11ndevcap = 0x1004a559); +PROVIDE(wifi_uap_config_wifi_capa = 0x1805d9fd); +PROVIDE(memc_flexspi_set_device_config = 0x10049109); +PROVIDE(usb_dc_ep_mps = 0x18057d55); +PROVIDE(net_route_get_nexthop = 0x18052301); +PROVIDE(z_shell_fprintf = 0x18037bf1); +PROVIDE(OCOTP_OtpFuseRead = 0x1805cd95); PROVIDE(net_eth_ipv6_mcast_to_mac_addr = 0x10042131); -PROVIDE(wrapper_deliver_amsdu_subframe = 0x180679e1); -PROVIDE(zsock_recvfrom_ctx = 0x18040abd); -PROVIDE(wifi_uap_get_pmfcfg = 0x1805f1c5); -PROVIDE(k_msgq_cleanup = 0x1004bff1); -PROVIDE(mflash_drv_read = 0x18087c0d); -PROVIDE(wifi_remove_mcast_filter = 0x10062135); -PROVIDE(zperf_tcp_download_stop = 0x10066315); -PROVIDE(net_if_up = 0x10054a89); -PROVIDE(wifi_net_monitor_cfg = 0x180658c5); -PROVIDE(wlan_enable_11d_support = 0x18061381); -PROVIDE(net_if_config_ipv4_get = 0x10050d55); -PROVIDE(net_if_ipv4_router_find_default = 0x100522d1); -PROVIDE(wifi_handle_event_data_pause = 0x18069585); -PROVIDE(wifi_set_rf_tx_power = 0x18063b35); -PROVIDE(z_impl_zsock_inet_pton = 0x1005a1f5); -PROVIDE(wifi_PrepDefaultMgtMsg = 0x180651cd); -PROVIDE(wlan_11n_get_rxreorder_tbl = 0x1004af2d); -PROVIDE(wlan_sta_inactivityto = 0x18079a2d); -PROVIDE(mlan_11n_rxreorder_pkt = 0x1004a6c9); -PROVIDE(PINT_Init = 0x1808533d); -PROVIDE(net_tcp_endpoint_copy = 0x1005ab11); -PROVIDE(wifi_send_remain_on_channel_cmd = 0x18062ff9); -PROVIDE(z_impl_k_queue_peek_head = 0x10057aed); -PROVIDE(wrapper_wlan_cmd_11n_addba_rspgen = 0x18067a09); -PROVIDE(wlan_11n_get_txbastream_tbl = 0x10049bf1); -PROVIDE(get_uint = 0x18084ed5); +PROVIDE(wrapper_deliver_amsdu_subframe = 0x18064afd); +PROVIDE(zsock_recvfrom_ctx = 0x18040445); +PROVIDE(k_msgq_cleanup = 0x1004bf69); +PROVIDE(mflash_drv_read = 0x1807709d); +PROVIDE(wifi_remove_mcast_filter = 0x10061cdd); +PROVIDE(zperf_tcp_download_stop = 0x10065db5); +PROVIDE(net_if_up = 0x1005486d); +PROVIDE(wlan_enable_11d_support = 0x180601a1); +PROVIDE(net_if_config_ipv4_get = 0x10050ba1); +PROVIDE(net_if_ipv4_router_find_default = 0x10052105); +PROVIDE(wifi_handle_event_data_pause = 0x18066545); +PROVIDE(z_impl_zsock_inet_pton = 0x10059f25); +PROVIDE(wifi_PrepDefaultMgtMsg = 0x18062b19); +PROVIDE(wlan_11n_get_rxreorder_tbl = 0x1004aea5); +PROVIDE(mlan_11n_rxreorder_pkt = 0x1004a641); +PROVIDE(PINT_Init = 0x180747cd); +PROVIDE(net_tcp_endpoint_copy = 0x1005a7fd); +PROVIDE(wifi_send_remain_on_channel_cmd = 0x18061cb1); +PROVIDE(z_impl_k_queue_peek_head = 0x1005784d); +PROVIDE(wrapper_wlan_cmd_11n_addba_rspgen = 0x18064b25); +PROVIDE(wlan_11n_get_txbastream_tbl = 0x10049b69); PROVIDE(net_conn_unregister = 0x10041721); -PROVIDE(wlan_wmm_uapsd_qosinfo = 0x18079021); -PROVIDE(memset = 0x1808ddc9); -PROVIDE(RESET_ClearPeripheralReset = 0x1805dccd); -PROVIDE(net_if_ipv6_prefix_lookup = 0x10053725); -PROVIDE(k_mem_slab_init = 0x10048e75); -PROVIDE(IMU_TryReceiveMsgs = 0x100453d1); -PROVIDE(wifi_remain_on_channel = 0x10062011); -PROVIDE(wlan_find_cfp_by_band_and_channel = 0x180660a9); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_11K_CONFIG = 0x18049d2d); -PROVIDE(net_if_set_default = 0x10054279); -PROVIDE(__gedf2 = 0x18029c21); -PROVIDE(net_context_get = 0x1004e9b9); -PROVIDE(wrapper_wlan_handle_rx_packet = 0x18067ec1); -PROVIDE(__floatdisf = 0x1802a02d); -PROVIDE(k_thread_foreach = 0x1808a2f1); -PROVIDE(net_mgmt_NET_REQUEST_STATS_GET_ETHERNET = 0x180496c9); -PROVIDE(wlan_set_rf_bandwidth = 0x18078581); -PROVIDE(wifi_set_uap_turbo_mode = 0x18065a69); -PROVIDE(net_mgmt_event_wait_on_iface = 0x1804f549); -PROVIDE(usb_dc_detach = 0x18058391); -PROVIDE(net_arp_prepare = 0x1802abd9); -PROVIDE(wlan_cmd_rx_abort_cfg_ext = 0x180674bd); -PROVIDE(USB_DeviceEhciInit = 0x18087109); -PROVIDE(z_time_slice = 0x1808a0e9); -PROVIDE(wlan_add_station_entry = 0x1806cbd9); -PROVIDE(__aeabi_ddiv = 0x18029a51); -PROVIDE(z_impl_k_event_wait = 0x1808bbd5); -PROVIDE(net_pkt_remaining_data = 0x100568ed); -PROVIDE(wifi_prepare_get_value1 = 0x1806ac65); -PROVIDE(recvfrom = 0x1803b515); -PROVIDE(wlan_cancel_host_sleep = 0x1807414d); -PROVIDE(z_irq_spurious = 0x1803a7b5); -PROVIDE(z_shell_op_cursor_word_move = 0x18037e0d); -PROVIDE(wlan_cmd_cck_desense_cfg = 0x180674e1); -PROVIDE(k_is_in_isr = 0x1005e7f1); -PROVIDE(wifi_get_rf_band = 0x18063775); -PROVIDE(net_pkt_ref = 0x100568b1); -PROVIDE(__kernel_rem_pio2 = 0x1802db39); -PROVIDE(z_arm_int_exit = 0x18039b49); -PROVIDE(OSTIMER_SetMatchValue = 0x18085cbd); -PROVIDE(_ConfigAbsSyms = 0x18031291); -PROVIDE(wlan_11d_create_dnld_countryinfo = 0x18060f89); -PROVIDE(POWER_ClearWakeupStatus = 0x1805d911); -PROVIDE(wlan_parse_getdata = 0x1807028d); -PROVIDE(net_if_ipv6_prefix_unset_timer = 0x10053991); -PROVIDE(pm_system_resume = 0x18032265); -PROVIDE(wifi_inject_frame = 0x10061c95); -PROVIDE(ring_buf_put = 0x1803107d); -PROVIDE(arm_irq_enable = 0x1803a735); -PROVIDE(PINT_PinInterruptClrStatus = 0x180853c9); -PROVIDE(wlan_deepsleepps_on = 0x18075b55); -PROVIDE(__extendsfdf2 = 0x1802974d); -PROVIDE(wlan_xmit_pkt = 0x10060b35); -PROVIDE(z_impl_k_timer_stop = 0x1808adb1); -PROVIDE(IMU_ReceiveMsgsBlocking = 0x10045291); -PROVIDE(wlan_set_mac_addr = 0x18075625); -PROVIDE(z_swap_next_thread = 0x100592d1); -PROVIDE(net_context_is_recv_pktinfo_set = 0x1004ee51); -PROVIDE(HAL_ImuIsTxBufQueueEmpty = 0x100434c5); -PROVIDE(wlan_get_txpwrlimit = 0x18076715); +PROVIDE(memset = 0x1807d0f5); +PROVIDE(RESET_ClearPeripheralReset = 0x1805cbfd); +PROVIDE(net_if_ipv6_prefix_lookup = 0x10053531); +PROVIDE(k_mem_slab_init = 0x10048ded); +PROVIDE(IMU_TryReceiveMsgs = 0x100453b1); +PROVIDE(wifi_remain_on_channel = 0x10061bb9); +PROVIDE(wlan_find_cfp_by_band_and_channel = 0x18063461); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_11K_CONFIG = 0x1804934d); +PROVIDE(net_if_set_default = 0x1005407d); +PROVIDE(__gedf2 = 0x18029611); +PROVIDE(net_context_get = 0x1004e891); +PROVIDE(wrapper_wlan_handle_rx_packet = 0x18064fdd); +PROVIDE(__floatdisf = 0x18029a1d); +PROVIDE(k_thread_foreach = 0x1807962d); +PROVIDE(net_mgmt_NET_REQUEST_STATS_GET_ETHERNET = 0x18048ce9); +PROVIDE(net_mgmt_event_wait_on_iface = 0x1804e885); +PROVIDE(usb_dc_detach = 0x1805735d); +PROVIDE(net_arp_prepare = 0x1802a5c9); +PROVIDE(wlan_cmd_rx_abort_cfg_ext = 0x1806466d); +PROVIDE(USB_DeviceEhciInit = 0x18076599); +PROVIDE(z_time_slice = 0x18079425); +PROVIDE(wlan_add_station_entry = 0x1806917d); +PROVIDE(__aeabi_ddiv = 0x18029441); +PROVIDE(z_impl_k_event_wait = 0x1807af01); +PROVIDE(net_pkt_remaining_data = 0x100566a5); +PROVIDE(wifi_prepare_get_value1 = 0x18067c25); +PROVIDE(recvfrom = 0x1803af11); +PROVIDE(wlan_cancel_host_sleep = 0x18070445); +PROVIDE(z_irq_spurious = 0x1803a1b1); +PROVIDE(z_shell_op_cursor_word_move = 0x18037849); +PROVIDE(wlan_cmd_cck_desense_cfg = 0x18064691); +PROVIDE(k_is_in_isr = 0x1005e479); +PROVIDE(net_pkt_ref = 0x10056669); +PROVIDE(__kernel_rem_pio2 = 0x1802d6a9); +PROVIDE(z_arm_int_exit = 0x18039545); +PROVIDE(OSTIMER_SetMatchValue = 0x1807514d); +PROVIDE(_ConfigAbsSyms = 0x18030da5); +PROVIDE(wlan_11d_create_dnld_countryinfo = 0x1805fda9); +PROVIDE(POWER_ClearWakeupStatus = 0x1805c841); +PROVIDE(wlan_parse_getdata = 0x1806c739); +PROVIDE(net_if_ipv6_prefix_unset_timer = 0x10053795); +PROVIDE(pm_system_resume = 0x18031d59); +PROVIDE(wifi_inject_frame = 0x1006183d); +PROVIDE(ring_buf_put = 0x18030b91); +PROVIDE(arm_irq_enable = 0x1803a131); +PROVIDE(PINT_PinInterruptClrStatus = 0x18074859); +PROVIDE(wlan_deepsleepps_on = 0x18071929); +PROVIDE(__extendsfdf2 = 0x1802913d); +PROVIDE(wlan_xmit_pkt = 0x10060701); +PROVIDE(z_impl_k_timer_stop = 0x1807a0dd); +PROVIDE(IMU_ReceiveMsgsBlocking = 0x10045271); +PROVIDE(wlan_set_mac_addr = 0x18071489); +PROVIDE(z_swap_next_thread = 0x1005900d); +PROVIDE(net_context_is_recv_pktinfo_set = 0x1004ed29); +PROVIDE(HAL_ImuIsTxBufQueueEmpty = 0x100434a5); +PROVIDE(wlan_get_txpwrlimit = 0x18072415); PROVIDE(CONFIG_SYS_HASH_FUNC32_MURMUR3 = 0x00000001); -PROVIDE(wlan_get_rf_band = 0x18078589); -PROVIDE(nxp_pint_pin_enable = 0x18057ead); -PROVIDE(llext_buf_peek = 0x1803eeb5); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_BTWT = 0x18049ff9); -PROVIDE(z_unready_thread = 0x10059ab9); -PROVIDE(wifi_get_device_mac_addr = 0x10060671); -PROVIDE(HAL_ImuLinkIsUp = 0x100434ed); -PROVIDE(__wrap_malloc = 0x1803aab5); -PROVIDE(flash_area_read = 0x18032a05); -PROVIDE(z_impl_k_poll = 0x1808b58d); -PROVIDE(wlan_get_non_dfs_chan = 0x18061b31); -PROVIDE(OSA_SemaphoreCreate = 0x10045ee9); -PROVIDE(wlan_ret_11n_addba_resp = 0x1004b1bd); -PROVIDE(wlan_cmd_twt_cfg = 0x18060c61); -PROVIDE(z_impl_zvfs_poll = 0x1803cbdd); -PROVIDE(SystemInit = 0x180851b1); -PROVIDE(sys_clock_cycle_get_32 = 0x1805a639); -PROVIDE(__fixdfdi = 0x1802a301); -PROVIDE(wlan_set_sta_mac_addr = 0x18075715); -PROVIDE(wifi_get_twt_report = 0x1806b399); -PROVIDE(OSA_SemaphoreDestroy = 0x10045fdd); -PROVIDE(usb_dc_set_status_callback = 0x18058d7d); -PROVIDE(wifi_cau_temperature_write_to_firmware = 0x1806bb19); -PROVIDE(net_ipv6_frag_foreach = 0x10047f41); -PROVIDE(net_wlan_deinit = 0x1004d4f5); -PROVIDE(shell_init = 0x180371d9); -PROVIDE(sys_heap_aligned_realloc = 0x1802f485); -PROVIDE(wlan_remove_network = 0x18074ded); -PROVIDE(net_if_get_default = 0x1005135d); -PROVIDE(wlan_get_uap_max_clients = 0x18076645); -PROVIDE(net_calc_chksum_igmp = 0x1005f209); -PROVIDE(wlan_cmd_enh_power_mode = 0x18066ab9); -PROVIDE(wlan_get_txpwr_of_chan_from_cfp = 0x18065f79); -PROVIDE(wifi_get_turbo_mode = 0x180659bd); -PROVIDE(__gtsf2 = 0x1802a0a9); -PROVIDE(wlan_cmd_gpio_tsf_latch = 0x18067509); -PROVIDE(net_dhcpv4_server_start = 0x180556d5); -PROVIDE(OSA_SemaphoreCreateBinary = 0x10045f65); -PROVIDE(mcux_lpc_ostick_isr = 0x1805a341); -PROVIDE(__wrap_random = 0x1808bc11); -PROVIDE(wifi_handle_fw_event = 0x18069835); -PROVIDE(wlan_misc_ioctl_oper_class = 0x1806d0a9); -PROVIDE(wlan_set_clocksync_cfg = 0x180787ed); -PROVIDE(cli_register_commands = 0x18084c1d); -PROVIDE(vApplicationTickHook = 0x10057341); -PROVIDE(net_ipv6_finalize = 0x10047789); -PROVIDE(__math_invalid = 0x1802d9a1); -PROVIDE(memmove = 0x1808dd95); -PROVIDE(zperf_get_ipv4_addr = 0x10063f5d); -PROVIDE(wifi_set_chanlist = 0x18064951); -PROVIDE(wlan_subscribe_rssi_low_event = 0x18076c11); -PROVIDE(net_if_config_ipv6_put = 0x10050f61); -PROVIDE(wifi_add_to_bypassq = 0x10061035); -PROVIDE(__nesf2 = 0x1802a0b9); -PROVIDE(wlan_cmd_append_11n_tlv = 0x10049d51); -PROVIDE(FLEXSPI_TransferCreateHandle = 0x10044cc1); -PROVIDE(wlan_ops_process_rx_packet = 0x18072735); -PROVIDE(iscntrl = 0x1808de03); -PROVIDE(islower = 0x1808de2d); -PROVIDE(wifi_state_txt = 0x18049809); -PROVIDE(OSA_InstallIntHandler = 0x1004590d); -PROVIDE(wifi_send_hostcmd = 0x18064f61); -PROVIDE(wifi_get_value1 = 0x10061969); -PROVIDE(wlan_cmd_11ac_cfg = 0x180607b9); -PROVIDE(wlan_initialize_sta_network = 0x18074711); -PROVIDE(FLEXSPI_TransferGetCount = 0x10044d05); -PROVIDE(strcat = 0x1808df07); -PROVIDE(net_pkt_copy = 0x10056171); -PROVIDE(csi_data_recv_user = 0x18082f15); -PROVIDE(wlan_clear_scan_bss = 0x1806bb89); -PROVIDE(wifi_set_ed_mac_mode = 0x18064e55); -PROVIDE(wlan_set_btwt_cfg = 0x18078761); -PROVIDE(wlan_host_11k_cfg = 0x18076b29); -PROVIDE(net_if_ipv6_addr_lookup = 0x100528d9); -PROVIDE(rand = 0x1808deaf); -PROVIDE(net_if_ipv6_dad_failed = 0x10052c81); -PROVIDE(wlan_get_rate_index = 0x18066151); -PROVIDE(llext_file_offset = 0x1803ea71); -PROVIDE(net_if_carrier_off = 0x10050cc1); -PROVIDE(OSA_MemoryFree = 0x10045981); -PROVIDE(strncmp = 0x1808df81); -PROVIDE(wlan_ret_mfg = 0x1807177d); -PROVIDE(wlan_convert_mcsmap_to_maxrate = 0x18060129); -PROVIDE(nboot_hal_get_sb3_manifest_params = 0x1808891d); -PROVIDE(wlan_cmd_802_11_net_monitor = 0x1806cfbd); -PROVIDE(ipv6_addr_addr_to_desc = 0x1004cfdd); -PROVIDE(z_impl_zsock_socket = 0x1005a4f1); -PROVIDE(wlan_get_rf_tx_antenna = 0x180785c9); -PROVIDE(POWER_PowerOffWlan = 0x1805dad9); -PROVIDE(wifi_wmm_qos_cfg = 0x1806adc5); -PROVIDE(net_pkt_remove_tail = 0x10056915); -PROVIDE(recv = 0x1803b501); +PROVIDE(nxp_pint_pin_enable = 0x18056e79); +PROVIDE(llext_buf_peek = 0x1803e895); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_BTWT = 0x180495d9); +PROVIDE(z_unready_thread = 0x100597e9); +PROVIDE(wifi_get_device_mac_addr = 0x1006025d); +PROVIDE(HAL_ImuLinkIsUp = 0x100434cd); +PROVIDE(__wrap_malloc = 0x1803a4b1); +PROVIDE(flash_area_read = 0x180324f9); +PROVIDE(z_impl_k_poll = 0x1807a8b9); +PROVIDE(wlan_get_non_dfs_chan = 0x18060951); +PROVIDE(OSA_SemaphoreCreate = 0x10045ec9); +PROVIDE(wlan_ret_11n_addba_resp = 0x1004b135); +PROVIDE(wlan_cmd_twt_cfg = 0x1805fa81); +PROVIDE(z_impl_zvfs_poll = 0x1803c5d9); +PROVIDE(SystemInit = 0x18074641); +PROVIDE(sys_clock_cycle_get_32 = 0x18059605); +PROVIDE(__fixdfdi = 0x18029cf1); +PROVIDE(wlan_set_sta_mac_addr = 0x18071579); +PROVIDE(OSA_SemaphoreDestroy = 0x10045fbd); +PROVIDE(usb_dc_set_status_callback = 0x18057d49); +PROVIDE(wifi_cau_temperature_write_to_firmware = 0x180680e9); +PROVIDE(net_ipv6_frag_foreach = 0x10047edd); +PROVIDE(net_wlan_deinit = 0x1004d411); +PROVIDE(shell_init = 0x18036c15); +PROVIDE(sys_heap_aligned_realloc = 0x1802efd9); +PROVIDE(wlan_remove_network = 0x18070f11); +PROVIDE(net_if_get_default = 0x100511a9); +PROVIDE(net_calc_chksum_igmp = 0x1005ee4d); +PROVIDE(wlan_cmd_enh_power_mode = 0x18063c69); +PROVIDE(wlan_get_txpwr_of_chan_from_cfp = 0x18063331); +PROVIDE(__gtsf2 = 0x18029a99); +PROVIDE(wlan_cmd_gpio_tsf_latch = 0x180646b9); +PROVIDE(net_dhcpv4_server_start = 0x180547dd); +PROVIDE(OSA_SemaphoreCreateBinary = 0x10045f45); +PROVIDE(mcux_lpc_ostick_isr = 0x1805930d); +PROVIDE(__wrap_random = 0x1807af3d); +PROVIDE(wifi_handle_fw_event = 0x180667f5); +PROVIDE(wlan_misc_ioctl_oper_class = 0x1806964d); +PROVIDE(vApplicationTickHook = 0x100570a1); +PROVIDE(net_ipv6_finalize = 0x10047725); +PROVIDE(__math_invalid = 0x1802d511); +PROVIDE(memmove = 0x1807d0c1); +PROVIDE(zperf_get_ipv4_addr = 0x10063ae5); +PROVIDE(wlan_subscribe_rssi_low_event = 0x18072851); +PROVIDE(net_if_config_ipv6_put = 0x10050dad); +PROVIDE(wifi_add_to_bypassq = 0x10060bdd); +PROVIDE(__nesf2 = 0x18029aa9); +PROVIDE(wlan_cmd_append_11n_tlv = 0x10049cc9); +PROVIDE(FLEXSPI_TransferCreateHandle = 0x10044ca1); +PROVIDE(wlan_ops_process_rx_packet = 0x1806ebe1); +PROVIDE(iscntrl = 0x1807d12f); +PROVIDE(islower = 0x1807d159); +PROVIDE(wifi_state_txt = 0x18048e29); +PROVIDE(OSA_InstallIntHandler = 0x100458ed); +PROVIDE(wifi_send_hostcmd = 0x18062a55); +PROVIDE(wifi_get_value1 = 0x10061511); +PROVIDE(wlan_cmd_11ac_cfg = 0x1805f5d9); +PROVIDE(wlan_initialize_sta_network = 0x18070835); +PROVIDE(FLEXSPI_TransferGetCount = 0x10044ce5); +PROVIDE(strcat = 0x1807d233); +PROVIDE(net_pkt_copy = 0x10055f29); +PROVIDE(wlan_clear_scan_bss = 0x18068159); +PROVIDE(wlan_set_btwt_cfg = 0x18074189); +PROVIDE(wlan_host_11k_cfg = 0x18072799); +PROVIDE(net_if_ipv6_addr_lookup = 0x100526f9); +PROVIDE(rand = 0x1807d1db); +PROVIDE(net_if_ipv6_dad_failed = 0x10052aa1); +PROVIDE(wlan_get_rate_index = 0x18063509); +PROVIDE(llext_file_offset = 0x1803e451); +PROVIDE(net_if_carrier_off = 0x10050b0d); +PROVIDE(OSA_MemoryFree = 0x10045961); +PROVIDE(strncmp = 0x1807d2ad); +PROVIDE(wlan_ret_mfg = 0x1806dc29); +PROVIDE(wlan_convert_mcsmap_to_maxrate = 0x1805ef49); +PROVIDE(nboot_hal_get_sb3_manifest_params = 0x18077d69); +PROVIDE(wlan_cmd_802_11_net_monitor = 0x18069561); +PROVIDE(ipv6_addr_addr_to_desc = 0x1004cf55); +PROVIDE(z_impl_zsock_socket = 0x1005a221); +PROVIDE(POWER_PowerOffWlan = 0x1805ca09); +PROVIDE(wifi_wmm_qos_cfg = 0x18067d85); +PROVIDE(net_pkt_remove_tail = 0x100566cd); +PROVIDE(recv = 0x1803aefd); PROVIDE(net_buf_linearize = 0x100408cd); -PROVIDE(ldexpl = 0x1808dc45); -PROVIDE(wlan_set_rf_otp_cal_data = 0x18078649); -PROVIDE(__math_inexact64 = 0x1808e491); -PROVIDE(get_addresses = 0x1804278d); -PROVIDE(sys_heap_runtime_stats_get = 0x1802f8c1); -PROVIDE(wlan_get_bandcfg = 0x1807993d); -PROVIDE(PINT_PinInterruptConfig = 0x1808537d); -PROVIDE(isxdigit = 0x1808de65); -PROVIDE(wifi_deregister_data_input_callback = 0x1006130d); -PROVIDE(wifi_set_mac_addr = 0x1806ad0d); -PROVIDE(get_channel_list = 0x18084fad); -PROVIDE(__aeabi_cdcmpeq = 0x18029cbd); +PROVIDE(ldexpl = 0x1807cf71); +PROVIDE(__math_inexact64 = 0x1807d7bd); +PROVIDE(get_addresses = 0x180420b5); +PROVIDE(sys_heap_runtime_stats_get = 0x1802f415); +PROVIDE(PINT_PinInterruptConfig = 0x1807480d); +PROVIDE(isxdigit = 0x1807d191); +PROVIDE(wifi_deregister_data_input_callback = 0x10060eb5); +PROVIDE(wifi_set_mac_addr = 0x18067ccd); +PROVIDE(__aeabi_cdcmpeq = 0x180296ad); PROVIDE(net_buf_unref_debug = 0x10040b5d); -PROVIDE(wifi_set_power_save_mode = 0x18072e1d); -PROVIDE(SPI_MasterGetDefaultConfig = 0x18085fe5); -PROVIDE(wifi_imu_unlock = 0x100606c9); -PROVIDE(net_hostname_init = 0x1803f2e5); -PROVIDE(assert_post_action = 0x180307dd); -PROVIDE(z_arm_usage_fault = 0x1803a5dd); -PROVIDE(wlan_check_operclass_validation = 0x180669d1); -PROVIDE(wlan_rate_ioctl_cfg = 0x1806cdf5); -PROVIDE(net_tcp_set_option = 0x1005b3f5); -PROVIDE(wlan_enable_disable_htc = 0x1807867d); -PROVIDE(CLOCK_SetFRGClock = 0x1805ceb5); -PROVIDE(strcpy = 0x1802a2e1); +PROVIDE(wifi_set_power_save_mode = 0x1806f275); +PROVIDE(SPI_MasterGetDefaultConfig = 0x18075475); +PROVIDE(wifi_imu_unlock = 0x100602b5); +PROVIDE(net_hostname_init = 0x1803ec8d); +PROVIDE(assert_post_action = 0x180302f1); +PROVIDE(z_arm_usage_fault = 0x18039fd9); +PROVIDE(wlan_check_operclass_validation = 0x18063b9d); +PROVIDE(wlan_rate_ioctl_cfg = 0x18069399); +PROVIDE(net_tcp_set_option = 0x1005b0e5); +PROVIDE(CLOCK_SetFRGClock = 0x1805bde5); +PROVIDE(strcpy = 0x18029cd1); PROVIDE(net_buf_frag_insert = 0x10040801); -PROVIDE(wifi_put_command_lock = 0x10061f31); -PROVIDE(wifi_unregister_event_queue = 0x10062501); -PROVIDE(wlan_set_country_code = 0x18079975); -PROVIDE(z_shell_help_subcmd_print = 0x18038a25); -PROVIDE(net_ipv6_nbr_lookup = 0x18051109); -PROVIDE(mlan_subsys_init = 0x1802c7b1); -PROVIDE(wifi_sleep_period = 0x1806ae5d); -PROVIDE(wifi_init = 0x10061985); -PROVIDE(usb_transfer_ep_callback = 0x18033e25); -PROVIDE(CLOCK_InitT3RefClk = 0x1805d265); -PROVIDE(usb_dc_ep_enable = 0x18058835); -PROVIDE(net_context_recv = 0x1004f0ed); -PROVIDE(net_route_get_info = 0x180537b9); -PROVIDE(scalbnl = 0x1808dc45); -PROVIDE(net_if_ipv4_select_src_iface = 0x1005245d); -PROVIDE(wlan_cmd_reg_access = 0x180701d9); -PROVIDE(usb_dc_ep_is_stalled = 0x180587a5); -PROVIDE(USB_DeviceEhciCancel = 0x180871f9); -PROVIDE(z_impl_k_stack_alloc_init = 0x1808973d); -PROVIDE(do_llext_load = 0x1803db85); -PROVIDE(wifi_is_ecsa_enabled = 0x18064935); -PROVIDE(__aeabi_fcmpun = 0x1802a195); -PROVIDE(addrstate2str = 0x18042771); -PROVIDE(z_impl_k_msgq_get_attrs = 0x1004c2c1); -PROVIDE(OSA_MutexLock = 0x10045d75); -PROVIDE(wlan_delete_station_entry = 0x1806cc71); -PROVIDE(wifi_uap_ampdu_rx_enable_per_tid_is_allowed = 0x100624b5); -PROVIDE(__aeabi_fsub = 0x18029e95); -PROVIDE(strrchr = 0x1808dfdd); -PROVIDE(z_thread_aligned_alloc = 0x10049621); -PROVIDE(net_pkt_memset = 0x1005674d); -PROVIDE(z_impl_k_float_enable = 0x18089669); -PROVIDE(nxp_wifi_wlan_event_callback = 0x1805bddd); -PROVIDE(net_context_set_option = 0x1004f441); -PROVIDE(load_wep_key = 0x18075c85); -PROVIDE(wakelock_put = 0x10060ec1); -PROVIDE(get_chip_revision = 0x1808890d); -PROVIDE(jesd216_bfp_erase_type_times = 0x10048941); -PROVIDE(clock_gettime = 0x1803b625); -PROVIDE(__atod_engine = 0x1802cea9); -PROVIDE(net_pkt_trim_buffer = 0x10056a6d); -PROVIDE(FLEXSPI_TransferAbort = 0x10044bd1); -PROVIDE(net_udp_get_hdr = 0x1005ed39); -PROVIDE(OCOTP_ReadUniqueID = 0x1805dee9); -PROVIDE(net_if_ipv6_router_add = 0x10053a05); -PROVIDE(msghdr_non_empty_iov_count = 0x10059f41); -PROVIDE(z_shell_make_argv = 0x18037519); -PROVIDE(wlan_bypass_802dot11_mgmt_pkt = 0x1806cd55); -PROVIDE(wlan_get_cfp_radar_detect = 0x180663c5); -PROVIDE(__libc_fini_array = 0x1808dd4d); -PROVIDE(net_if_is_wifi = 0x10053e51); -PROVIDE(net_if_ipv6_router_lookup = 0x10053a25); -PROVIDE(wlan_ieeeps_on = 0x18075a99); -PROVIDE(get_iface_idx = 0x180426dd); -PROVIDE(wifi_uap_enable_11d_support = 0x1805ea8d); -PROVIDE(z_shell_history_get = 0x18038fd1); -PROVIDE(rpmsg_ctrl_handler = 0x100604a9); -PROVIDE(net_ipv4_igmp_init = 0x180505b1); -PROVIDE(CLOCK_InitTddrRefClk = 0x1805d1c1); -PROVIDE(OSA_MsgQGet = 0x10045b09); -PROVIDE(z_spin_lock_valid = 0x1808a1d9); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_DUPLEX = 0x180487d9); -PROVIDE(wlan_misc_ioctl_operclass_validation = 0x1806d0f9); -PROVIDE(wlan_get_uap_ed_mac_mode = 0x18076775); -PROVIDE(wifi_wmm_get_pkt_prio = 0x100626e9); -PROVIDE(log_source_id_get = 0x18031725); -PROVIDE(cmd_net_stats_all = 0x18046fed); -PROVIDE(__aeabi_cdrcmple = 0x18029cad); -PROVIDE(USB_DeviceEhciRecv = 0x180871f1); -PROVIDE(wifi_get_rf_rx_antenna = 0x18063ae5); -PROVIDE(wlan_11h_init = 0x18061ac1); -PROVIDE(net_pkt_read_be16 = 0x10056851); -PROVIDE(net_if_ipv6_get_mcast_hop_limit = 0x1005311d); -PROVIDE(wlan_set_chanlist = 0x180766fd); -PROVIDE(net_tcp_get = 0x1005ac79); -PROVIDE(z_init_cpu = 0x18089051); -PROVIDE(net_context_put = 0x1004f06d); -PROVIDE(check_for_wpa2_entp_ie = 0x1806aaa5); -PROVIDE(wlan_set_crypto_AES_ECB_encrypt = 0x18078935); -PROVIDE(k_work_flush = 0x10062f7d); -PROVIDE(wifi_set_threshold_data_rssi_high = 0x1806b97d); -PROVIDE(z_impl_log_process = 0x180315c1); -PROVIDE(wifi_host_11k_neighbor_req = 0x18064d59); -PROVIDE(net_pkt_write = 0x10056b2d); -PROVIDE(sys_bitarray_free = 0x18030ec9); -PROVIDE(z_SysNmiOnReset = 0x1803971d); -PROVIDE(net_if_get_by_link_addr = 0x10051225); -PROVIDE(net_if_ipv6_addr_rm = 0x10052b31); -PROVIDE(net_if_ipv4_addr_add = 0x10051a29); -PROVIDE(OSA_TaskYield = 0x10046761); -PROVIDE(net_tcp_reply_rst = 0x1005b2c9); -PROVIDE(z_shell_history_put = 0x18039059); -PROVIDE(strnlen = 0x1808dfc5); +PROVIDE(wifi_put_command_lock = 0x10061ad9); +PROVIDE(wifi_unregister_event_queue = 0x10062089); +PROVIDE(wlan_set_country_code = 0x18074271); +PROVIDE(z_shell_help_subcmd_print = 0x18038441); +PROVIDE(net_ipv6_nbr_lookup = 0x18050409); +PROVIDE(mlan_subsys_init = 0x1802c131); +PROVIDE(wifi_sleep_period = 0x18067e01); +PROVIDE(wifi_init = 0x1006152d); +PROVIDE(usb_transfer_ep_callback = 0x180338f9); +PROVIDE(CLOCK_InitT3RefClk = 0x1805c195); +PROVIDE(usb_dc_ep_enable = 0x18057801); +PROVIDE(net_context_recv = 0x1004efc5); +PROVIDE(net_route_get_info = 0x1805297d); +PROVIDE(scalbnl = 0x1807cf71); +PROVIDE(net_if_ipv4_select_src_iface = 0x10052291); +PROVIDE(usb_dc_ep_is_stalled = 0x18057771); +PROVIDE(USB_DeviceEhciCancel = 0x18076689); +PROVIDE(z_impl_k_stack_alloc_init = 0x18078a79); +PROVIDE(do_llext_load = 0x1803d565); +PROVIDE(wifi_is_ecsa_enabled = 0x18062729); +PROVIDE(__aeabi_fcmpun = 0x18029b85); +PROVIDE(addrstate2str = 0x18042099); +PROVIDE(z_impl_k_msgq_get_attrs = 0x1004c239); +PROVIDE(OSA_MutexLock = 0x10045d55); +PROVIDE(wlan_delete_station_entry = 0x18069215); +PROVIDE(wifi_uap_ampdu_rx_enable_per_tid_is_allowed = 0x1006203d); +PROVIDE(__aeabi_fsub = 0x18029885); +PROVIDE(strrchr = 0x1807d309); +PROVIDE(z_thread_aligned_alloc = 0x10049599); +PROVIDE(net_pkt_memset = 0x10056505); +PROVIDE(z_impl_k_float_enable = 0x180789a5); +PROVIDE(nxp_wifi_wlan_event_callback = 0x1805ad7d); +PROVIDE(net_context_set_option = 0x1004f2f1); +PROVIDE(load_wep_key = 0x18071a11); +PROVIDE(wakelock_put = 0x10060a89); +PROVIDE(get_chip_revision = 0x18077d59); +PROVIDE(jesd216_bfp_erase_type_times = 0x100488b9); +PROVIDE(clock_gettime = 0x1803b021); +PROVIDE(__atod_engine = 0x1802c829); +PROVIDE(net_pkt_trim_buffer = 0x10056825); +PROVIDE(FLEXSPI_TransferAbort = 0x10044bb1); +PROVIDE(net_udp_get_hdr = 0x1005e97d); +PROVIDE(OCOTP_ReadUniqueID = 0x1805ce19); +PROVIDE(net_if_ipv6_router_add = 0x10053809); +PROVIDE(msghdr_non_empty_iov_count = 0x10059c71); +PROVIDE(z_shell_make_argv = 0x18036f55); +PROVIDE(wlan_bypass_802dot11_mgmt_pkt = 0x180692f9); +PROVIDE(wlan_get_cfp_radar_detect = 0x1806377d); +PROVIDE(__libc_fini_array = 0x1807d079); +PROVIDE(net_if_is_wifi = 0x10053c55); +PROVIDE(net_if_ipv6_router_lookup = 0x10053829); +PROVIDE(wlan_ieeeps_on = 0x1807186d); +PROVIDE(get_iface_idx = 0x18042005); +PROVIDE(wifi_uap_enable_11d_support = 0x1805d97d); +PROVIDE(z_shell_history_get = 0x180389ed); +PROVIDE(rpmsg_ctrl_handler = 0x10060095); +PROVIDE(net_ipv4_igmp_init = 0x1804f8ed); +PROVIDE(CLOCK_InitTddrRefClk = 0x1805c0f1); +PROVIDE(OSA_MsgQGet = 0x10045ae9); +PROVIDE(z_spin_lock_valid = 0x18079515); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_DUPLEX = 0x18047e15); +PROVIDE(wlan_misc_ioctl_operclass_validation = 0x1806969d); +PROVIDE(wifi_wmm_get_pkt_prio = 0x10062271); +PROVIDE(log_source_id_get = 0x18031239); +PROVIDE(cmd_net_stats_all = 0x180466a1); +PROVIDE(__aeabi_cdrcmple = 0x1802969d); +PROVIDE(USB_DeviceEhciRecv = 0x18076681); +PROVIDE(wlan_11h_init = 0x180608e1); +PROVIDE(net_pkt_read_be16 = 0x10056609); +PROVIDE(net_if_ipv6_get_mcast_hop_limit = 0x10052f3d); +PROVIDE(net_tcp_get = 0x1005a965); +PROVIDE(z_init_cpu = 0x18078449); +PROVIDE(net_context_put = 0x1004ef45); +PROVIDE(check_for_wpa2_entp_ie = 0x18067a65); +PROVIDE(k_work_flush = 0x10062b05); +PROVIDE(atan2l = 0x1802cd31); +PROVIDE(z_impl_log_process = 0x180310d5); +PROVIDE(wifi_host_11k_neighbor_req = 0x1806291d); +PROVIDE(net_pkt_write = 0x100568e5); +PROVIDE(sys_bitarray_free = 0x180309dd); +PROVIDE(z_SysNmiOnReset = 0x18039119); +PROVIDE(net_if_get_by_link_addr = 0x10051071); +PROVIDE(net_if_ipv6_addr_rm = 0x10052951); +PROVIDE(net_if_ipv4_addr_add = 0x1005185d); +PROVIDE(OSA_TaskYield = 0x10046741); +PROVIDE(net_tcp_reply_rst = 0x1005afb9); +PROVIDE(z_shell_history_put = 0x18038a75); +PROVIDE(strnlen = 0x1807d2f1); PROVIDE(net_eth_broadcast_addr = 0x1004209d); -PROVIDE(net_if_ipv6_calc_reachable_time = 0x10052c55); -PROVIDE(isgraph = 0x1808de21); -PROVIDE(wifi_sta_ampdu_tx_disable = 0x10062409); -PROVIDE(z_impl_log_panic = 0x18031525); -PROVIDE(wlan_csi_cfg = 0x1807981d); -PROVIDE(net_buf_simple_add = 0x1803bef1); -PROVIDE(__aeabi_cfcmple = 0x1802a121); -PROVIDE(OSA_TaskCreate = 0x10046209); -PROVIDE(net_if_ipv4_select_src_addr = 0x100522e5); -PROVIDE(wlan_wmm_init = 0x1004bed5); -PROVIDE(idle = 0x180896ad); -PROVIDE(net_get_if_ipv6_pref_addr = 0x1004d2f1); -PROVIDE(net_dhcpv4_init = 0x18054bbd); -PROVIDE(wlan_set_wmm_uapsd = 0x18079041); -PROVIDE(net_context_ref = 0x1004f2d5); -PROVIDE(wifi_set_threshold_rssi_high = 0x1806b891); -PROVIDE(net_ipv4_create = 0x100467d5); -PROVIDE(z_shell_history_purge = 0x18039025); -PROVIDE(wlan_config_host_sleep = 0x1807408d); -PROVIDE(CACHE64_CleanCacheByRange = 0x18086bc9); -PROVIDE(wifi_get_region_code = 0x18064765); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QAV_PARAM = 0x18048b85); -PROVIDE(wifi_wait_for_cmdresp = 0x10062551); -PROVIDE(log_backend_disable = 0x180318a9); -PROVIDE(wifi_deregister_amsdu_data_input_callback = 0x100612fd); -PROVIDE(wlan_set_uap_mac_addr = 0x180756b5); -PROVIDE(wlan_get_twt_setup_cfg = 0x180787cd); -PROVIDE(net_ipv4_setup_fragment_buffers = 0x100474cd); -PROVIDE(csi_deliver_data_to_user = 0x10060c51); -PROVIDE(wifi_set_threshold_data_rssi_low = 0x1806b955); -PROVIDE(assert_print = 0x180307f1); -PROVIDE(wlan_11n_update_txbastream_tbl_ampdu_stat = 0x10049c61); -PROVIDE(k_heap_aligned_alloc = 0x18089321); -PROVIDE(z_column_span_with_buffer_offsets_get = 0x180374ad); -PROVIDE(_wifi_set_mac_addr = 0x1806ad21); -PROVIDE(imu_wakeup_card = 0x1005fc89); -PROVIDE(net_if_recv_data = 0x10054135); -PROVIDE(usb_dc_ep_clear_stall = 0x180586c1); -PROVIDE(z_impl_zsock_get_context_object = 0x1005a0c5); -PROVIDE(llext_unload = 0x1803d8ad); -PROVIDE(wlan_index_to_data_rate = 0x18065e25); -PROVIDE(fs_stat = 0x1803d32d); -PROVIDE(wlan_cmd_bgscan_config = 0x1806f6dd); -PROVIDE(z_impl_k_timer_status_get = 0x1808ade9); -PROVIDE(wrapper_wlan_ecsa_enable = 0x18067da1); -PROVIDE(wifi_fw_is_hang = 0x100617ad); -PROVIDE(z_shell_log_backend_disable = 0x180388ad); -PROVIDE(wrapper_wlan_uap_11d_enable = 0x18067d55); -PROVIDE(strtold = 0x1808c335); -PROVIDE(SPI_MasterTransferNonBlocking = 0x180863fd); -PROVIDE(net_pkt_get_reserve_tx_data = 0x100566d1); -PROVIDE(k_heap_free = 0x180895b9); -PROVIDE(z_arm_secure_fault = 0x1803a5dd); -PROVIDE(wlan_set_wwsm_txpwrlimit = 0x18084ba5); -PROVIDE(FLEXSPI_GetInstance = 0x10044801); -PROVIDE(wifi_mmsf_cfg = 0x18065771); -PROVIDE(wifi_imu_get_task_lock = 0x1006197d); -PROVIDE(HAL_ImuGetCpuReadyFlag = 0x100431d9); -PROVIDE(wlan_set_rf_tx_power = 0x180785e5); -PROVIDE(z_shell_op_cursor_move = 0x18037d61); -PROVIDE(net_if_dormant_off = 0x1005100d); -PROVIDE(wifi_set_country_ie_ignore = 0x1006238d); -PROVIDE(net_pkt_frag_unref = 0x10056475); -PROVIDE(send_wifi_driver_tx_data_event = 0x10060e41); -PROVIDE(z_timer_expiration_handler = 0x1808ab59); -PROVIDE(net_pkt_clone = 0x10055f39); -PROVIDE(wlan_ralist_pkts_free_enh = 0x1004bbc9); -PROVIDE(wlan_cmd_tx_frame = 0x180676c5); -PROVIDE(W2MWKUP0_DriverIRQHandler = 0x100446f1); -PROVIDE(__floatunsidf = 0x18029709); -PROVIDE(net_udp_unregister = 0x1005ef11); -PROVIDE(net_tc_tx_init = 0x10056ee1); -PROVIDE(mpsc_pbuf_init = 0x1803080d); -PROVIDE(wifi_set_11ax_tol_time = 0x1806b119); -PROVIDE(__floatundisf = 0x1802a01d); -PROVIDE(__kernel_sin = 0x1802e1f1); -PROVIDE(usb_dc_ep_check_cap = 0x1805843d); -PROVIDE(z_abort_timeout = 0x1808a719); -PROVIDE(I2C_MasterTransferNonBlocking = 0x18085a51); -PROVIDE(open = 0x1803b2e9); -PROVIDE(wlan_ralist_deinit_enh = 0x1004ba79); -PROVIDE(FLEXCOMM_Init = 0x18085401); -PROVIDE(wlan_send_null_packet = 0x10060a05); -PROVIDE(k_heap_realloc = 0x18089479); -PROVIDE(wlan_process_uap_rx_packet = 0x18072905); -PROVIDE(__aeabi_f2d = 0x1802974d); -PROVIDE(wifi_get_xfer_pending = 0x10061971); -PROVIDE(wlan_flush_wmm_pkt = 0x10060855); -PROVIDE(wlan_ret_tx_rate_cfg = 0x18066f1d); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_ADDRESS = 0x180487d9); -PROVIDE(net_if_ipv6_maddr_rm = 0x10053425); -PROVIDE(wlan_11n_create_txbastream_tbl = 0x10049a75); -PROVIDE(net_context_packet_received = 0x1004eef5); -PROVIDE(wifi_uap_set_httxcfg_int = 0x18068045); -PROVIDE(net_if_try_queue_tx = 0x100547b1); -PROVIDE(OSA_RWLockWriteLock = 0x10057165); -PROVIDE(z_impl_k_reschedule = 0x100581b5); -PROVIDE(wlan_get_region_code = 0x18079a09); -PROVIDE(wlan_send_mgmt_wnm_btm_resp = 0x18062771); -PROVIDE(wifi_set_packet_retry_count = 0x100623a1); -PROVIDE(wifi_mem_malloc_cmdrespbuf = 0x18072989); -PROVIDE(z_reschedule = 0x10058f1d); -PROVIDE(sys_heap_free = 0x1802f105); -PROVIDE(z_impl_net_if_ipv4_set_netmask_by_index = 0x10055809); -PROVIDE(net_ipv4_broadcast_address = 0x1005f419); -PROVIDE(wifi_set_twt_teardown_cfg = 0x1806b311); -PROVIDE(net_arp_clear_pending = 0x180495c5); -PROVIDE(OSA_EnterCritical = 0x10045501); -PROVIDE(net_if_ipv6_maddr_lookup = 0x1005333d); -PROVIDE(wifi_send_scan_cmd = 0x1806409d); -PROVIDE(z_bss_zero = 0x18088fed); -PROVIDE(wifi_set_rf_test_mode = 0x18063529); -PROVIDE(z_requeue_current = 0x10058e9d); -PROVIDE(__math_oflow = 0x1802d981); -PROVIDE(__aeabi_uidivmod = 0x18029445); -PROVIDE(net_mgmt_NET_REQUEST_STATS_RESET_WIFI = 0x18049d05); -PROVIDE(__aeabi_d2uiz = 0x18029dad); -PROVIDE(OSA_SemaphorePost = 0x100460b1); -PROVIDE(net_ipv6_nbr_add = 0x1805162d); +PROVIDE(net_if_ipv6_calc_reachable_time = 0x10052a75); +PROVIDE(isgraph = 0x1807d14d); +PROVIDE(wifi_sta_ampdu_tx_disable = 0x10061f91); +PROVIDE(z_impl_log_panic = 0x18031039); +PROVIDE(net_buf_simple_add = 0x1803b8ed); +PROVIDE(__aeabi_cfcmple = 0x18029b11); +PROVIDE(OSA_TaskCreate = 0x100461e9); +PROVIDE(net_if_ipv4_select_src_addr = 0x10052119); +PROVIDE(wlan_wmm_init = 0x1004be4d); +PROVIDE(idle = 0x180789e9); +PROVIDE(net_get_if_ipv6_pref_addr = 0x1004d20d); +PROVIDE(net_dhcpv4_init = 0x18053d49); +PROVIDE(wlan_set_wmm_uapsd = 0x180741f1); +PROVIDE(net_context_ref = 0x1004f185); +PROVIDE(net_ipv4_create = 0x100467b5); +PROVIDE(z_shell_history_purge = 0x18038a41); +PROVIDE(CACHE64_CleanCacheByRange = 0x18076059); +PROVIDE(wifi_get_region_code = 0x18062559); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QAV_PARAM = 0x180481a5); +PROVIDE(wifi_wait_for_cmdresp = 0x100620d9); +PROVIDE(log_backend_disable = 0x180313bd); +PROVIDE(wifi_deregister_amsdu_data_input_callback = 0x10060ea5); +PROVIDE(wlan_set_uap_mac_addr = 0x18071519); +PROVIDE(net_ipv4_setup_fragment_buffers = 0x1004748d); +PROVIDE(csi_deliver_data_to_user = 0x1006081d); +PROVIDE(assert_print = 0x18030305); +PROVIDE(wlan_11n_update_txbastream_tbl_ampdu_stat = 0x10049bd9); +PROVIDE(k_heap_aligned_alloc = 0x1807865d); +PROVIDE(z_column_span_with_buffer_offsets_get = 0x18036ee9); +PROVIDE(_wifi_set_mac_addr = 0x18067ce1); +PROVIDE(imu_wakeup_card = 0x1005f875); +PROVIDE(net_if_recv_data = 0x10053f39); +PROVIDE(usb_dc_ep_clear_stall = 0x1805768d); +PROVIDE(z_impl_zsock_get_context_object = 0x10059df5); +PROVIDE(llext_unload = 0x1803d28d); +PROVIDE(wlan_index_to_data_rate = 0x180631dd); +PROVIDE(fs_stat = 0x1803cd29); +PROVIDE(wlan_cmd_bgscan_config = 0x1806bc15); +PROVIDE(z_impl_k_timer_status_get = 0x1807a115); +PROVIDE(wrapper_wlan_ecsa_enable = 0x18064ebd); +PROVIDE(wifi_fw_is_hang = 0x10061355); +PROVIDE(z_shell_log_backend_disable = 0x180382c9); +PROVIDE(wrapper_wlan_uap_11d_enable = 0x18064e71); +PROVIDE(strtold = 0x1807b661); +PROVIDE(SPI_MasterTransferNonBlocking = 0x1807588d); +PROVIDE(net_pkt_get_reserve_tx_data = 0x10056489); +PROVIDE(k_heap_free = 0x180788f5); +PROVIDE(z_arm_secure_fault = 0x18039fd9); +PROVIDE(wlan_set_wwsm_txpwrlimit = 0x1807448d); +PROVIDE(FLEXSPI_GetInstance = 0x100447e1); +PROVIDE(wifi_imu_get_task_lock = 0x10061525); +PROVIDE(HAL_ImuGetCpuReadyFlag = 0x100431b9); +PROVIDE(z_shell_op_cursor_move = 0x1803779d); +PROVIDE(net_if_dormant_off = 0x10050e59); +PROVIDE(wifi_set_country_ie_ignore = 0x10061f15); +PROVIDE(net_pkt_frag_unref = 0x1005622d); +PROVIDE(send_wifi_driver_tx_data_event = 0x10060a09); +PROVIDE(z_timer_expiration_handler = 0x18079e85); +PROVIDE(net_pkt_clone = 0x10055cf1); +PROVIDE(wlan_ralist_pkts_free_enh = 0x1004bb41); +PROVIDE(wlan_cmd_tx_frame = 0x18064875); +PROVIDE(W2MWKUP0_DriverIRQHandler = 0x100446d1); +PROVIDE(__floatunsidf = 0x180290f9); +PROVIDE(net_udp_unregister = 0x1005eb55); +PROVIDE(net_tc_tx_init = 0x10056c6d); +PROVIDE(mpsc_pbuf_init = 0x18030321); +PROVIDE(__floatundisf = 0x18029a0d); +PROVIDE(__kernel_sin = 0x1802dd61); +PROVIDE(usb_dc_ep_check_cap = 0x18057409); +PROVIDE(z_abort_timeout = 0x18079a45); +PROVIDE(I2C_MasterTransferNonBlocking = 0x18074ee1); +PROVIDE(open = 0x1803ace5); +PROVIDE(wlan_ralist_deinit_enh = 0x1004b9f1); +PROVIDE(FLEXCOMM_Init = 0x18074891); +PROVIDE(wlan_send_null_packet = 0x100605f1); +PROVIDE(k_heap_realloc = 0x180787b5); +PROVIDE(wlan_process_uap_rx_packet = 0x1806edb1); +PROVIDE(__aeabi_f2d = 0x1802913d); +PROVIDE(wifi_get_xfer_pending = 0x10061519); +PROVIDE(wlan_flush_wmm_pkt = 0x10060441); +PROVIDE(wlan_ret_tx_rate_cfg = 0x180640cd); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_ADDRESS = 0x18047e15); +PROVIDE(net_if_ipv6_maddr_rm = 0x10053245); +PROVIDE(wlan_11n_create_txbastream_tbl = 0x100499ed); +PROVIDE(net_context_packet_received = 0x1004edcd); +PROVIDE(wifi_uap_set_httxcfg_int = 0x18065155); +PROVIDE(net_if_try_queue_tx = 0x10054595); +PROVIDE(OSA_RWLockWriteLock = 0x10056ec5); +PROVIDE(z_impl_k_reschedule = 0x10057f11); +PROVIDE(wlan_get_region_code = 0x18074301); +PROVIDE(wlan_send_mgmt_wnm_btm_resp = 0x18061591); +PROVIDE(wifi_set_packet_retry_count = 0x10061f29); +PROVIDE(wifi_mem_malloc_cmdrespbuf = 0x1806ee35); +PROVIDE(z_reschedule = 0x10058c65); +PROVIDE(sys_heap_free = 0x1802ec59); +PROVIDE(z_impl_net_if_ipv4_set_netmask_by_index = 0x100555bd); +PROVIDE(net_ipv4_broadcast_address = 0x1005f039); +PROVIDE(wifi_set_twt_teardown_cfg = 0x18067fbd); +PROVIDE(net_arp_clear_pending = 0x18048be5); +PROVIDE(OSA_EnterCritical = 0x100454e1); +PROVIDE(net_if_ipv6_maddr_lookup = 0x1005315d); +PROVIDE(wifi_send_scan_cmd = 0x18061fa5); +PROVIDE(z_bss_zero = 0x180783e5); +PROVIDE(z_requeue_current = 0x10058be5); +PROVIDE(__math_oflow = 0x1802d4f1); +PROVIDE(__aeabi_uidivmod = 0x18028e35); +PROVIDE(net_mgmt_NET_REQUEST_STATS_RESET_WIFI = 0x18049325); +PROVIDE(__aeabi_d2uiz = 0x1802979d); +PROVIDE(OSA_SemaphorePost = 0x10046091); +PROVIDE(net_ipv6_nbr_add = 0x18050905); PROVIDE(net_buf_id = 0x100408a9); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_LINK = 0x180487d9); -PROVIDE(net_recv_data = 0x1004f84d); -PROVIDE(k_work_submit = 0x10063995); -PROVIDE(z_shell_cursor_in_empty_line = 0x18037c19); -PROVIDE(shell_get_return_value = 0x180373c5); -PROVIDE(wlan_get_tsf_info = 0x180787e9); -PROVIDE(wlan_cmd_11n_uap_addba_rspgen = 0x1004b0bd); -PROVIDE(TRNG_GetDefaultConfig = 0x18086715); -PROVIDE(net_context_bind = 0x1004e24d); -PROVIDE(net_ipv6_nbr_state2str = 0x18050f61); -PROVIDE(net_if_ipv4_set_netmask_by_addr = 0x10052555); -PROVIDE(get_sub_band_from_region_code_5ghz = 0x180647bd); -PROVIDE(wlan_host_11k_neighbor_req = 0x18076b69); -PROVIDE(strstr = 0x1808e009); -PROVIDE(a2hex = 0x18084df5); -PROVIDE(net_if_ipv4_router_lookup = 0x100522d9); -PROVIDE(net_pkt_available_buffer = 0x10055e55); -PROVIDE(net_icmpv4_input = 0x1805020d); -PROVIDE(net_dhcpv4_server_stop = 0x18055a35); -PROVIDE(register_csi_user_callback = 0x10060e1d); -PROVIDE(usb_get_dev_data_by_ep = 0x18033c5d); -PROVIDE(OCOTP_ReadPackage = 0x1805dfdd); -PROVIDE(wifi_wmm_get_outbuf_enh = 0x1004b551); -PROVIDE(net_ipv4_igmp_join = 0x180504dd); -PROVIDE(OSTIMER_SetMatchRawValue = 0x18085bf1); -PROVIDE(wifi_scan_process_results = 0x1806aa95); -PROVIDE(net_if_ipv6_get_global_addr = 0x10052e99); -PROVIDE(wifi_get_temperature = 0x1806ba95); -PROVIDE(net_ipv6_nbr_lock = 0x18050f41); -PROVIDE(usb_cancel_transfers = 0x18034079); -PROVIDE(vfprintf = 0x1808c995); -PROVIDE(wlan_init_wmm_param = 0x1004b90d); -PROVIDE(wlan_auto_null_tx = 0x18079a31); -PROVIDE(wlan_get_twt_report = 0x180787e1); -PROVIDE(USART_Enable9bitMode = 0x180866ed); -PROVIDE(wifi_set_region_power_cfg = 0x1806abd1); -PROVIDE(SPI_SlaveGetDefaultConfig = 0x180861c5); -PROVIDE(clear_event_chanswann = 0x18067f39); -PROVIDE(wifi_get_set_rf_otp_mac_addr = 0x1806341d); -PROVIDE(wifi_ps_wakeup_mode_txt = 0x180498e1); -PROVIDE(wlan_wmm_get_ralist_node = 0x1004be95); -PROVIDE(rpmsg_cmdrsp_handler = 0x10060459); -PROVIDE(wlan_init = 0x180743cd); -PROVIDE(z_impl_k_sem_take = 0x10059e45); -PROVIDE(mlan_init_wakeup_irq = 0x100603ad); -PROVIDE(net_if_addr_ref = 0x10050a09); -PROVIDE(wlan_handle_disconnect_event = 0x18071e25); -PROVIDE(wlan_clean_txrx = 0x1004b7f9); -PROVIDE(__aeabi_fcmpeq = 0x1802a131); -PROVIDE(zvfs_get_fd_obj = 0x180304e9); -PROVIDE(net_pkt_shallow_clone = 0x10056a0d); -PROVIDE(wifi_mgmt_raise_ap_sta_disconnected_event = 0x1804a375); -PROVIDE(OSA_SemaphorePrecreate = 0x10046119); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_LINK = 0x18047e15); +PROVIDE(net_recv_data = 0x1004f6fd); +PROVIDE(k_work_submit = 0x1006351d); +PROVIDE(z_shell_cursor_in_empty_line = 0x18037655); +PROVIDE(shell_get_return_value = 0x18036e01); +PROVIDE(wlan_cmd_11n_uap_addba_rspgen = 0x1004b035); +PROVIDE(TRNG_GetDefaultConfig = 0x18075ba5); +PROVIDE(net_context_bind = 0x1004e14d); +PROVIDE(net_ipv6_nbr_state2str = 0x1805027d); +PROVIDE(net_if_ipv4_set_netmask_by_addr = 0x10052389); +PROVIDE(get_sub_band_from_region_code_5ghz = 0x180625b1); +PROVIDE(wlan_host_11k_neighbor_req = 0x180727d9); +PROVIDE(strstr = 0x1807d335); +PROVIDE(net_if_ipv4_router_lookup = 0x1005210d); +PROVIDE(net_pkt_available_buffer = 0x10055c0d); +PROVIDE(net_icmpv4_input = 0x1804f549); +PROVIDE(net_dhcpv4_server_stop = 0x18054b15); +PROVIDE(register_csi_user_callback = 0x100609e5); +PROVIDE(usb_get_dev_data_by_ep = 0x18033731); +PROVIDE(OCOTP_ReadPackage = 0x1805cf0d); +PROVIDE(wifi_wmm_get_outbuf_enh = 0x1004b4c9); +PROVIDE(net_ipv4_igmp_join = 0x1804f819); +PROVIDE(OSTIMER_SetMatchRawValue = 0x18075081); +PROVIDE(wifi_scan_process_results = 0x18067a55); +PROVIDE(net_if_ipv6_get_global_addr = 0x10052cb9); +PROVIDE(wifi_get_temperature = 0x18068065); +PROVIDE(net_ipv6_nbr_lock = 0x1805025d); +PROVIDE(usb_cancel_transfers = 0x18033b4d); +PROVIDE(vfprintf = 0x1807bcc1); +PROVIDE(wlan_init_wmm_param = 0x1004b885); +PROVIDE(USART_Enable9bitMode = 0x18075b7d); +PROVIDE(wifi_set_region_power_cfg = 0x18067b91); +PROVIDE(SPI_SlaveGetDefaultConfig = 0x18075655); +PROVIDE(clear_event_chanswann = 0x18065049); +PROVIDE(wifi_ps_wakeup_mode_txt = 0x18048f01); +PROVIDE(wlan_wmm_get_ralist_node = 0x1004be0d); +PROVIDE(rpmsg_cmdrsp_handler = 0x10060045); +PROVIDE(wlan_init = 0x18070641); +PROVIDE(z_impl_k_sem_take = 0x10059b75); +PROVIDE(mlan_init_wakeup_irq = 0x1005ff99); +PROVIDE(net_if_addr_ref = 0x10050875); +PROVIDE(wlan_handle_disconnect_event = 0x1806e2d1); +PROVIDE(wlan_clean_txrx = 0x1004b771); +PROVIDE(__aeabi_fcmpeq = 0x18029b21); +PROVIDE(zvfs_get_fd_obj = 0x1802fffd); +PROVIDE(net_pkt_shallow_clone = 0x100567c5); +PROVIDE(wifi_mgmt_raise_ap_sta_disconnected_event = 0x18049939); +PROVIDE(OSA_SemaphorePrecreate = 0x100460f9); PROVIDE(ethernet_flags = 0x100418d9); -PROVIDE(z_thread_is_valid = 0x18034c2d); -PROVIDE(log_output_msg_process = 0x18032191); -PROVIDE(zperf_shell_init = 0x10065b41); -PROVIDE(k_queue_merge_slist = 0x10057595); -PROVIDE(net_ipv6_nbr_set_reachable_timer = 0x18051139); -PROVIDE(usb_write = 0x18033399); -PROVIDE(zperf_packet_duration = 0x100640a9); -PROVIDE(net_ipv6_init = 0x10047855); -PROVIDE(FLEXSPI_GetDefaultConfig = 0x10044789); -PROVIDE(wifi_imd3_cfg = 0x18065bd9); -PROVIDE(wlan_test_mode_cli_init = 0x1807d3e1); -PROVIDE(wlan_get_rf_otp_cal_data = 0x1807864d); -PROVIDE(net_tcp_put = 0x1005b0b1); -PROVIDE(llext_buf_seek = 0x1803eea1); -PROVIDE(FLEXCOMM_SetIRQHandler = 0x180854b1); -PROVIDE(wifi_sta_ampdu_rx_enable_per_tid = 0x100623e9); -PROVIDE(wlan_cmd_mem_access = 0x18070245); -PROVIDE(wrapper_clear_media_connected_event = 0x18067f59); -PROVIDE(wlan_net_monitor_cfg = 0x18079879); -PROVIDE(strtok_r = 0x1808e085); -PROVIDE(HAL_ImuInstallIrqCallback = 0x100434a9); -PROVIDE(net_pkt_read_le16 = 0x10056891); -PROVIDE(net_pkt_rx_alloc_on_iface = 0x10056979); -PROVIDE(wlan_rrm_matched_ap_found = 0x18061b8d); -PROVIDE(z_device_state_init = 0x18088aed); -PROVIDE(wlan_clear_subscribe_event = 0x18078fe5); -PROVIDE(HAL_ImuInstallCallback = 0x1004347d); -PROVIDE(sys_heap_alloc = 0x1802f1e1); -PROVIDE(__floatunsisf = 0x18029ff9); -PROVIDE(process_pkt_hdrs = 0x100603b1); -PROVIDE(fs_sync = 0x1803d2dd); -PROVIDE(net_if_try_send_data = 0x100547e5); -PROVIDE(nxp_wifi_internal_register_rx_cb = 0x1004d729); -PROVIDE(net_shell_init = 0x180428dd); -PROVIDE(wifi_get_device_uap_mac_addr = 0x10060685); -PROVIDE(wlan_is_power_save_enabled = 0x18075a85); -PROVIDE(z_impl_k_str_out = 0x18030459); -PROVIDE(net_ipv6_nbr_unlock = 0x18050f55); -PROVIDE(wlan_cmd_append_11ax_tlv = 0x180608dd); -PROVIDE(wifi_set_get_cck_desense_cfg = 0x1806afd5); -PROVIDE(wlan_11ax_cfg_ioctl = 0x18060b01); -PROVIDE(mlan_11n_update_bastream_tbl = 0x1004aa59); -PROVIDE(net_configure_dns = 0x1004d1f9); -PROVIDE(wrapper_wlan_11d_clear_parsedtable = 0x18067f49); -PROVIDE(net_ipv4_prepare_for_send = 0x10046d91); -PROVIDE(HAL_ImuSendCommand = 0x10043d79); -PROVIDE(wlan_bypass_txq_empty = 0x1004b7dd); -PROVIDE(wifi_stop_bgscan = 0x18069801); -PROVIDE(wlan_remove_all_networks = 0x180753a9); -PROVIDE(z_shell_log_backend_enable = 0x18038859); -PROVIDE(net_pkt_frag_insert = 0x10056459); -PROVIDE(wlan_put_bypass_lock = 0x1004b961); -PROVIDE(net_icmpv6_create = 0x18050815); -PROVIDE(soc_reset_hook = 0x180312bd); -PROVIDE(wifi_set_frag = 0x18064bc9); -PROVIDE(z_impl_net_if_ipv4_addr_rm_by_index = 0x10055781); -PROVIDE(INPUTMUX_Init = 0x180853e1); -PROVIDE(net_if_ipv6_select_src_iface = 0x10053be9); -PROVIDE(a2hex_or_atoi = 0x18084e79); -PROVIDE(wlan_init_lock_list = 0x1806bdad); -PROVIDE(z_shell_backend_rx_buffer_flush = 0x180386dd); -PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x18031b61); -PROVIDE(clock_init = 0x10067d49); -PROVIDE(wlan_wmm_process_association_req = 0x1004bf79); -PROVIDE(z_impl_k_event_init = 0x1808bbad); -PROVIDE(wlan_11d_set_universaltable = 0x180619b9); -PROVIDE(wifi_tx_ampdu_prot_mode = 0x180657dd); -PROVIDE(cli_register_command = 0x18084bd1); -PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x18031b2d); -PROVIDE(process_pkt_hdrs_flags = 0x100603fd); -PROVIDE(__aeabi_dcmpeq = 0x18029ccd); -PROVIDE(z_impl_k_stack_pop = 0x180898c5); -PROVIDE(wifi_get_uap_channel = 0x1805ef65); -PROVIDE(wlan_set_uap_rts = 0x180767fd); -PROVIDE(net_if_mcast_mon_register = 0x10053f11); -PROVIDE(zvfs_finalize_typed_fd = 0x180306a1); -PROVIDE(wifi_send_add_wpa_pmk = 0x18064415); -PROVIDE(wifi_uap_set_11ax_status = 0x1805e299); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXINJECTION_MODE = 0x18048b85); -PROVIDE(net_ipv6_input = 0x10047865); -PROVIDE(wlan_get_rx_abort_cfg_ext = 0x18074029); -PROVIDE(net_if_get_wifi_sap = 0x10051519); -PROVIDE(OSA_TaskNotifyGet = 0x1004657d); -PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x18031b99); -PROVIDE(wlan_setup_rates_from_bssdesc = 0x1806bfc1); -PROVIDE(wlan_11d_priv_init = 0x180613a9); -PROVIDE(llext_load = 0x1803d7dd); -PROVIDE(__start = 0x1803a5f1); -PROVIDE(OSA_MsgQWaiting = 0x1005718d); -PROVIDE(z_stack_space_get = 0x1005ec41); -PROVIDE(z_impl_k_thread_custom_data_set = 0x1005e9f1); -PROVIDE(__cmpsf2 = 0x1802a0b9); -PROVIDE(strchr = 0x1808df25); -PROVIDE(strncasecmp = 0x1808df47); -PROVIDE(net_tcp_input = 0x1005aff1); -PROVIDE(dns_unpack_response_header = 0x180565b1); -PROVIDE(llext_iterate = 0x1803d6dd); -PROVIDE(wlan_add_supported_oper_class_ie = 0x18066821); -PROVIDE(net_context_connect = 0x1004e52d); -PROVIDE(__stdout_hook_install = 0x1803aa39); -PROVIDE(z_thread_timeout = 0x100597b5); -PROVIDE(inet_pton = 0x1803b4e9); -PROVIDE(net_context_sendmsg = 0x1004f36d); -PROVIDE(wifi_send_add_wpa3_password = 0x18064595); -PROVIDE(wifi_register_amsdu_data_input_callback = 0x10061f7d); -PROVIDE(wlan_ops_sta_prepare_cmd = 0x180705dd); -PROVIDE(wrapper_moal_malloc = 0x180729c1); -PROVIDE(log_core_init = 0x18031479); -PROVIDE(wifi_process_hs_cfg_resp = 0x18072ec5); +PROVIDE(z_thread_is_valid = 0x18034701); +PROVIDE(log_output_msg_process = 0x18031c85); +PROVIDE(zperf_shell_init = 0x10065609); +PROVIDE(k_queue_merge_slist = 0x100572f5); +PROVIDE(net_ipv6_nbr_set_reachable_timer = 0x18050439); +PROVIDE(usb_write = 0x18032e8d); +PROVIDE(zperf_packet_duration = 0x10063c31); +PROVIDE(net_ipv6_init = 0x100477f1); +PROVIDE(FLEXSPI_GetDefaultConfig = 0x10044769); +PROVIDE(net_tcp_put = 0x1005ad9d); +PROVIDE(llext_buf_seek = 0x1803e881); +PROVIDE(FLEXCOMM_SetIRQHandler = 0x18074941); +PROVIDE(wifi_sta_ampdu_rx_enable_per_tid = 0x10061f71); +PROVIDE(wrapper_clear_media_connected_event = 0x18065069); +PROVIDE(strtok_r = 0x1807d3b1); +PROVIDE(HAL_ImuInstallIrqCallback = 0x10043489); +PROVIDE(net_pkt_read_le16 = 0x10056649); +PROVIDE(net_pkt_rx_alloc_on_iface = 0x10056731); +PROVIDE(wlan_rrm_matched_ap_found = 0x180609ad); +PROVIDE(z_device_state_init = 0x18077f39); +PROVIDE(HAL_ImuInstallCallback = 0x1004345d); +PROVIDE(sys_heap_alloc = 0x1802ed35); +PROVIDE(__floatunsisf = 0x180299e9); +PROVIDE(process_pkt_hdrs = 0x1005ff9d); +PROVIDE(fs_sync = 0x1803ccd9); +PROVIDE(net_if_try_send_data = 0x100545c9); +PROVIDE(nxp_wifi_internal_register_rx_cb = 0x1004d645); +PROVIDE(net_shell_init = 0x18042205); +PROVIDE(wifi_get_device_uap_mac_addr = 0x10060271); +PROVIDE(wlan_is_power_save_enabled = 0x18071859); +PROVIDE(z_impl_k_str_out = 0x1802ff6d); +PROVIDE(net_ipv6_nbr_unlock = 0x18050271); +PROVIDE(wlan_cmd_append_11ax_tlv = 0x1805f6fd); +PROVIDE(wlan_11ax_cfg_ioctl = 0x1805f921); +PROVIDE(mlan_11n_update_bastream_tbl = 0x1004a9d1); +PROVIDE(net_configure_dns = 0x1004d115); +PROVIDE(wrapper_wlan_11d_clear_parsedtable = 0x18065059); +PROVIDE(net_ipv4_prepare_for_send = 0x10046d55); +PROVIDE(HAL_ImuSendCommand = 0x10043d59); +PROVIDE(wlan_bypass_txq_empty = 0x1004b755); +PROVIDE(wifi_stop_bgscan = 0x180667c1); +PROVIDE(z_shell_log_backend_enable = 0x18038275); +PROVIDE(net_pkt_frag_insert = 0x10056211); +PROVIDE(wlan_put_bypass_lock = 0x1004b8d9); +PROVIDE(net_icmpv6_create = 0x1804fb51); +PROVIDE(soc_reset_hook = 0x18030dd1); +PROVIDE(z_impl_net_if_ipv4_addr_rm_by_index = 0x10055535); +PROVIDE(INPUTMUX_Init = 0x18074871); +PROVIDE(net_if_ipv6_select_src_iface = 0x100539ed); +PROVIDE(wlan_init_lock_list = 0x1806837d); +PROVIDE(z_shell_backend_rx_buffer_flush = 0x18038119); +PROVIDE(z_impl_z_log_msg_simple_create_1 = 0x18031655); +PROVIDE(clock_init = 0x10067739); +PROVIDE(wlan_wmm_process_association_req = 0x1004bef1); +PROVIDE(z_impl_k_event_init = 0x1807aed9); +PROVIDE(wlan_11d_set_universaltable = 0x180607d9); +PROVIDE(z_impl_z_log_msg_simple_create_0 = 0x18031621); +PROVIDE(process_pkt_hdrs_flags = 0x1005ffe9); +PROVIDE(__aeabi_dcmpeq = 0x180296bd); +PROVIDE(z_impl_k_stack_pop = 0x18078c01); +PROVIDE(wifi_get_uap_channel = 0x1805de55); +PROVIDE(wlan_set_uap_rts = 0x180724a1); +PROVIDE(net_if_mcast_mon_register = 0x10053d15); +PROVIDE(zvfs_finalize_typed_fd = 0x180301b5); +PROVIDE(wifi_send_add_wpa_pmk = 0x18062279); +PROVIDE(wifi_uap_set_11ax_status = 0x1805d1c9); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXINJECTION_MODE = 0x180481a5); +PROVIDE(net_ipv6_input = 0x10047801); +PROVIDE(net_if_get_wifi_sap = 0x10051365); +PROVIDE(OSA_TaskNotifyGet = 0x1004655d); +PROVIDE(z_impl_z_log_msg_simple_create_2 = 0x1803168d); +PROVIDE(wlan_setup_rates_from_bssdesc = 0x18068591); +PROVIDE(wlan_11d_priv_init = 0x180601c9); +PROVIDE(llext_load = 0x1803d1bd); +PROVIDE(__start = 0x18039fed); +PROVIDE(OSA_MsgQWaiting = 0x10056eed); +PROVIDE(z_stack_space_get = 0x1005e889); +PROVIDE(z_impl_k_thread_custom_data_set = 0x1005e645); +PROVIDE(__cmpsf2 = 0x18029aa9); +PROVIDE(strchr = 0x1807d251); +PROVIDE(strncasecmp = 0x1807d273); +PROVIDE(net_tcp_input = 0x1005acdd); +PROVIDE(dns_unpack_response_header = 0x18055665); +PROVIDE(llext_iterate = 0x1803d0bd); +PROVIDE(wlan_add_supported_oper_class_ie = 0x18063a0d); +PROVIDE(net_context_connect = 0x1004e42d); +PROVIDE(__stdout_hook_install = 0x1803a435); +PROVIDE(z_thread_timeout = 0x100594e9); +PROVIDE(inet_pton = 0x1803aee5); +PROVIDE(net_context_sendmsg = 0x1004f21d); +PROVIDE(wifi_send_add_wpa3_password = 0x180623c1); +PROVIDE(wifi_register_amsdu_data_input_callback = 0x10061b25); +PROVIDE(wlan_ops_sta_prepare_cmd = 0x1806ca89); +PROVIDE(wrapper_moal_malloc = 0x1806ee6d); +PROVIDE(log_core_init = 0x18030f8d); +PROVIDE(wifi_process_hs_cfg_resp = 0x1806f31d); PROVIDE(CONFIG_SYS_HASH_FUNC32 = 0x00000001); -PROVIDE(z_impl_zsock_getsockname = 0x1005a135); -PROVIDE(z_shell_help_cmd_print = 0x18038aed); -PROVIDE(z_early_memcpy = 0x18088fe9); -PROVIDE(zvfs_eventfd_read = 0x1803c881); -PROVIDE(z_impl_k_event_wait_all = 0x1808bbdd); -PROVIDE(wifi_get_set_rf_test_generic = 0x180632ed); -PROVIDE(wifi_deinit = 0x100612dd); -PROVIDE(wlan_set_11ax_cfg = 0x18078755); -PROVIDE(socket_service_init = 0x180419bd); -PROVIDE(wlan_associate = 0x1806ca99); -PROVIDE(wifi_update_last_cmd_sent_ms = 0x10062521); -PROVIDE(shell_vfprintf = 0x18036d6d); -PROVIDE(wlan_handle_rx_packet = 0x18072891); -PROVIDE(arch_tls_stack_setup = 0x18039725); -PROVIDE(net_tx_zerocopy_process_cb = 0x1004d47d); -PROVIDE(wifi_sta_inactivityto = 0x18065c1d); -PROVIDE(z_shell_fprintf_buffer_flush = 0x18037495); -PROVIDE(net_if_ipv4_maddr_foreach = 0x1005207d); -PROVIDE(imu_delete_task_lock = 0x1005fc1d); -PROVIDE(wlan_11d_cfg_ioctl = 0x18071f11); -PROVIDE(z_impl_net_if_ipv4_set_netmask_by_addr_by_index = 0x100557d9); -PROVIDE(zvfs_reserve_fd = 0x1803060d); -PROVIDE(wifi_register_data_input_callback = 0x10061f99); -PROVIDE(z_impl_k_event_post = 0x1808bbb9); -PROVIDE(nxp_rw6xx_power_init = 0x1802a5d1); -PROVIDE(z_sched_init = 0x1005901d); -PROVIDE(net_if_ipv6_prefix_add = 0x100534c5); -PROVIDE(wlan_rf_trigger_frame_cfg = 0x180785f9); -PROVIDE(zperf_tcp_uploader_init = 0x100666dd); -PROVIDE(__addsf3 = 0x18029e99); -PROVIDE(csi_save_data_to_local_buff = 0x10060d11); -PROVIDE(wlan_set_roaming = 0x18076be5); -PROVIDE(__shiftright128 = 0x1808e2e9); -PROVIDE(net_if_ipv4_set_mcast_ttl = 0x10052511); -PROVIDE(wlan_process_link_measurement_request = 0x18062461); -PROVIDE(z_impl_flash_flatten = 0x180393dd); -PROVIDE(wlan_get_signal_info = 0x18079931); -PROVIDE(z_shell_print_cmd = 0x18037fc1); -PROVIDE(net_buf_simple_tailroom = 0x1803c035); -PROVIDE(z_shell_vt100_colors_restore = 0x180380ed); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_IFACE_STATUS = 0x18049c8d); -PROVIDE(wifi_set_cal_data = 0x1806ace5); -PROVIDE(net_ipv6_send_ns = 0x1802b941); -PROVIDE(nxp_pint_pin_set_callback = 0x18057f75); -PROVIDE(OSTIMER_GetCurrentTimerValue = 0x18085ccd); -PROVIDE(__aeabi_frsub = 0x18029e8d); -PROVIDE(wlan_set_twt_setup_cfg = 0x1807876d); -PROVIDE(TRNG_Init = 0x18086781); +PROVIDE(z_impl_zsock_getsockname = 0x10059e65); +PROVIDE(z_shell_help_cmd_print = 0x18038509); +PROVIDE(z_early_memcpy = 0x180783e1); +PROVIDE(zvfs_eventfd_read = 0x1803c27d); +PROVIDE(z_impl_k_event_wait_all = 0x1807af09); +PROVIDE(wifi_deinit = 0x10060e85); +PROVIDE(socket_service_init = 0x180412e5); +PROVIDE(wlan_associate = 0x1806903d); +PROVIDE(wifi_update_last_cmd_sent_ms = 0x100620a9); +PROVIDE(shell_vfprintf = 0x180367a9); +PROVIDE(wlan_handle_rx_packet = 0x1806ed3d); +PROVIDE(arch_tls_stack_setup = 0x18039121); +PROVIDE(net_tx_zerocopy_process_cb = 0x1004d399); +PROVIDE(z_shell_fprintf_buffer_flush = 0x18036ed1); +PROVIDE(net_if_ipv4_maddr_foreach = 0x10051eb1); +PROVIDE(imu_delete_task_lock = 0x1005f809); +PROVIDE(wlan_11d_cfg_ioctl = 0x1806e3bd); +PROVIDE(z_impl_net_if_ipv4_set_netmask_by_addr_by_index = 0x1005558d); +PROVIDE(zvfs_reserve_fd = 0x18030121); +PROVIDE(wifi_register_data_input_callback = 0x10061b41); +PROVIDE(z_impl_k_event_post = 0x1807aee5); +PROVIDE(nxp_rw6xx_power_init = 0x18029fc1); +PROVIDE(z_sched_init = 0x10058d59); +PROVIDE(net_if_ipv6_prefix_add = 0x100532e5); +PROVIDE(zperf_tcp_uploader_init = 0x10066161); +PROVIDE(__addsf3 = 0x18029889); +PROVIDE(csi_save_data_to_local_buff = 0x100608d9); +PROVIDE(__shiftright128 = 0x1807d615); +PROVIDE(net_if_ipv4_set_mcast_ttl = 0x10052345); +PROVIDE(wlan_process_link_measurement_request = 0x18061281); +PROVIDE(z_impl_flash_flatten = 0x18038dd9); +PROVIDE(z_shell_print_cmd = 0x180379fd); +PROVIDE(net_buf_simple_tailroom = 0x1803ba31); +PROVIDE(z_shell_vt100_colors_restore = 0x18037b29); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_IFACE_STATUS = 0x180492ad); +PROVIDE(wifi_set_cal_data = 0x18067ca5); +PROVIDE(net_ipv6_send_ns = 0x1802b331); +PROVIDE(nxp_pint_pin_set_callback = 0x18056f41); +PROVIDE(OSTIMER_GetCurrentTimerValue = 0x1807515d); +PROVIDE(__aeabi_frsub = 0x1802987d); +PROVIDE(wlan_set_twt_setup_cfg = 0x1807418d); +PROVIDE(TRNG_Init = 0x18075c11); PROVIDE(net_eth_get_phy = 0x100420ed); -PROVIDE(net_ipv6_send_rs = 0x1802bca1); -PROVIDE(wlan_cmd_txrx_pkt_stats = 0x180670c9); -PROVIDE(cdc_acm_dte_rate_callback_set = 0x18034a65); -PROVIDE(wrapper_wlan_cmd_get_hw_spec = 0x18067dfd); -PROVIDE(bind = 0x1803b4f5); -PROVIDE(net_get_if_addr = 0x1004d215); -PROVIDE(wlan_get_global_nonglobal_oper_class = 0x18066741); -PROVIDE(wifi_twt_information = 0x1806b415); -PROVIDE(wlan_11d_parse_dnld_countryinfo = 0x18061589); -PROVIDE(wifi_ps_mode_txt = 0x18049871); -PROVIDE(k_malloc = 0x10049541); -PROVIDE(z_impl_k_poll_signal_check = 0x1808b8cd); -PROVIDE(sys_timepoint_timeout = 0x1808ab09); -PROVIDE(z_impl_zsock_recvmsg = 0x1005a315); -PROVIDE(wifi_uap_sta_ageout_timer_getset = 0x1805ee95); -PROVIDE(z_shell_spaces_trim = 0x18037909); -PROVIDE(OSA_MutexCreate = 0x10045c6d); -PROVIDE(wlan_stop = 0x18074599); -PROVIDE(wifi_set_rts = 0x18064ad9); -PROVIDE(wlan_cmd_11n_addba_req = 0x1004afbd); -PROVIDE(net_get_sta_handle = 0x1004d3b1); -PROVIDE(scalbn = 0x1808dc45); -PROVIDE(net_if_ipv6_addr_add = 0x1005265d); -PROVIDE(ring_buf_peek = 0x180311e9); -PROVIDE(wifi_bypass_txq_init = 0x1004b2f5); -PROVIDE(zsock_wait_data = 0x180403f1); -PROVIDE(wifi_send_rssi_info_cmd = 0x18062fb1); -PROVIDE(wlan_set_crypto_AES_WRAP_encrypt = 0x18078a75); -PROVIDE(wlan_set_rf_otp_mac_addr = 0x18078639); -PROVIDE(wifi_uap_get_bandwidth = 0x1805eaf5); -PROVIDE(nxp_pint_pin_disable = 0x18057f3d); -PROVIDE(net_if_ipv4_get_netmask = 0x10051e75); -PROVIDE(wifi_user_scan_config_cleanup = 0x10062535); -PROVIDE(z_impl_device_get_binding = 0x18088b35); -PROVIDE(log_backend_enable = 0x1803185d); -PROVIDE(wifi_enter_deepsleep_power_save = 0x18072de1); -PROVIDE(__aeabi_ldiv0 = 0x18029481); -PROVIDE(sys_bitarray_alloc = 0x18030d4d); -PROVIDE(__dtoa_engine = 0x1808d361); +PROVIDE(net_ipv6_send_rs = 0x1802b661); +PROVIDE(wlan_cmd_txrx_pkt_stats = 0x18064279); +PROVIDE(cdc_acm_dte_rate_callback_set = 0x18034539); +PROVIDE(wrapper_wlan_cmd_get_hw_spec = 0x18064f19); +PROVIDE(bind = 0x1803aef1); +PROVIDE(net_get_if_addr = 0x1004d131); +PROVIDE(wlan_get_global_nonglobal_oper_class = 0x18063945); +PROVIDE(wlan_11d_parse_dnld_countryinfo = 0x180603a9); +PROVIDE(wifi_ps_mode_txt = 0x18048e91); +PROVIDE(k_malloc = 0x100494b9); +PROVIDE(z_impl_k_poll_signal_check = 0x1807abf9); +PROVIDE(sys_timepoint_timeout = 0x18079e35); +PROVIDE(z_impl_zsock_recvmsg = 0x1005a045); +PROVIDE(wifi_uap_sta_ageout_timer_getset = 0x1805dd85); +PROVIDE(z_shell_spaces_trim = 0x18037345); +PROVIDE(OSA_MutexCreate = 0x10045c4d); +PROVIDE(wifi_set_rts = 0x18062791); +PROVIDE(wlan_cmd_11n_addba_req = 0x1004af35); +PROVIDE(net_get_sta_handle = 0x1004d2cd); +PROVIDE(scalbn = 0x1807cf71); +PROVIDE(net_if_ipv6_addr_add = 0x10052491); +PROVIDE(ring_buf_peek = 0x18030cfd); +PROVIDE(wifi_bypass_txq_init = 0x1004b26d); +PROVIDE(zsock_wait_data = 0x1803fd79); +PROVIDE(wifi_send_rssi_info_cmd = 0x18061c69); +PROVIDE(wifi_uap_get_bandwidth = 0x1805d9e5); +PROVIDE(nxp_pint_pin_disable = 0x18056f09); +PROVIDE(net_if_ipv4_get_netmask = 0x10051ca9); +PROVIDE(wifi_user_scan_config_cleanup = 0x100620bd); +PROVIDE(z_impl_device_get_binding = 0x18077f81); +PROVIDE(log_backend_enable = 0x18031371); +PROVIDE(wifi_enter_deepsleep_power_save = 0x1806f239); +PROVIDE(__aeabi_ldiv0 = 0x18028e71); +PROVIDE(sys_bitarray_alloc = 0x18030861); +PROVIDE(__dtoa_engine = 0x1807c68d); PROVIDE(z_impl_net_eth_get_ptp_clock_by_index = 0x100421ed); -PROVIDE(wlan_free_mlan_buffer = 0x1806cb69); -PROVIDE(wifi_wake_up_card = 0x100626d1); -PROVIDE(wifi_send_shutdown_cmd = 0x18062e99); -PROVIDE(wlan_set_uap_ed_mac_mode = 0x1807675d); -PROVIDE(z_arm_interrupt_init = 0x1803a951); -PROVIDE(z_shell_get_last_command = 0x18037891); -PROVIDE(POWER_PowerOffBle = 0x1805dbd9); -PROVIDE(wlan_bg_scan_type_is_passive = 0x1806641d); -PROVIDE(wifi_uap_start = 0x1805f081); -PROVIDE(OSA_EventClear = 0x10045541); -PROVIDE(net_context_create_ipv4_new = 0x1004e839); -PROVIDE(fs_write = 0x1803d19d); -PROVIDE(isalpha = 0x1808ddf3); -PROVIDE(RESET_SetPeripheralReset = 0x1805dc55); -PROVIDE(wlan_get_twt_teardown_cfg = 0x180787d9); -PROVIDE(wifi_set_antenna = 0x1806438d); -PROVIDE(OSTIMER_HandleIRQ = 0x18085b89); -PROVIDE(wlan_set_turbo_mode = 0x1807994d); -PROVIDE(z_sched_wake = 0x10059119); -PROVIDE(printf = 0x1808c21d); -PROVIDE(z_shell_cmd_trim = 0x1803799d); -PROVIDE(__aeabi_uldivmod = 0x1802a261); -PROVIDE(wlan_process_mgmt_action = 0x18062ba9); -PROVIDE(net_icmpv4_send_error = 0x1802b089); -PROVIDE(wlan_external_coex_pta_cfg = 0x18079a15); -PROVIDE(zsock_connect_ctx = 0x180401e1); -PROVIDE(fs_close = 0x1803d101); -PROVIDE(SPI_MasterTransferHandleIRQ = 0x18085d05); -PROVIDE(z_impl_k_pipe_close = 0x18089f65); -PROVIDE(usb_dc_ep_disable = 0x18058925); -PROVIDE(wlan_set_crypto_AES_GCMP_decrypt = 0x18078de9); -PROVIDE(net_if_need_calc_tx_checksum = 0x100540b1); -PROVIDE(wifi_cfg_rf_he_tb_tx = 0x18063e99); -PROVIDE(net_if_start_dad = 0x100543a9); -PROVIDE(fnmatch = 0x1803b0bd); -PROVIDE(net_stat = 0x1004d46d); -PROVIDE(wlan_ret_802_11_tx_rate_query = 0x18066c25); -PROVIDE(__aeabi_drsub = 0x18029485); -PROVIDE(__aeabi_d2ulz = 0x1802a291); -PROVIDE(wlan_set_region_power_cfg = 0x180766f9); -PROVIDE(wifi_register_wrapper_net_is_ip_or_ipv6_callback = 0x10061ff5); -PROVIDE(wifi_set_clocksync_cfg = 0x1806b4dd); -PROVIDE(wifi_clear_wakeup_reason = 0x10060641); -PROVIDE(wlan_cmd_rx_abort_cfg = 0x1806748d); -PROVIDE(USART_GetDefaultConfig = 0x180864b5); -PROVIDE(shell_fprintf_warn = 0x18036f9d); -PROVIDE(arch_switch_to_main_thread = 0x1803a8bd); -PROVIDE(z_shell_wildcard_prepare = 0x180391b5); -PROVIDE(z_shell_wildcard_finalize = 0x1803932d); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBU_PARAM = 0x18048b85); -PROVIDE(timeutil_timegm64 = 0x18030945); -PROVIDE(z_impl_k_queue_alloc_append = 0x10057869); -PROVIDE(usb_get_device_descriptor = 0x18033879); -PROVIDE(wlan_get_uap_channel = 0x180759e9); -PROVIDE(z_impl_net_if_ipv4_addr_lookup_by_index = 0x1005573d); -PROVIDE(k_work_cancel = 0x10062a01); -PROVIDE(wlan_ret_get_hw_spec = 0x180670f1); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_RTS_THRESHOLD_CONFIG = 0x1804a305); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_VERSION = 0x1804a1f5); -PROVIDE(wifi_sta_handle_event_data_pause = 0x1806945d); -PROVIDE(HAL_RpmsgInit = 0x10044329); -PROVIDE(wrapper_wlan_uap_ampdu_enable = 0x18067ac5); -PROVIDE(zsock_setsockopt_ctx = 0x18040ed5); -PROVIDE(wifi_tx_card_awake_lock = 0x10062445); -PROVIDE(net_if_ipv6_prefix_rm = 0x100537d1); -PROVIDE(net_ipv4_init = 0x10046989); -PROVIDE(wlan_ret_boot_sleep = 0x180676ad); -PROVIDE(is_uap_started = 0x18075055); -PROVIDE(RESET_PeripheralReset = 0x1805dd51); -PROVIDE(net_if_get_first_wifi = 0x10051471); -PROVIDE(CLOCK_AttachClk = 0x1805cbe9); -PROVIDE(fs_truncate = 0x1803d28d); -PROVIDE(filter_set = 0x18031759); -PROVIDE(wifi_sta_ampdu_tx_enable_per_tid_is_allowed = 0x1006242d); -PROVIDE(wlan_set_rf_tx_cont_mode = 0x180785c1); -PROVIDE(OSA_EventWait = 0x100457c5); -PROVIDE(wlan_get_current_uap_network = 0x18074f8d); -PROVIDE(wlan_set_mmsf = 0x18078ebd); -PROVIDE(wlan_get_pmfcfg = 0x180767a1); -PROVIDE(arm_irq_priority_set = 0x1803a751); -PROVIDE(net_if_get_first_up = 0x10051415); -PROVIDE(__double_computeInvPow5 = 0x1808d96d); -PROVIDE(z_shell_pattern_remove = 0x18037755); -PROVIDE(wlan_reset_connect_state = 0x18071d79); -PROVIDE(OSA_DisableIRQGlobal = 0x100454d5); -PROVIDE(net_if_ipv4_set_netmask = 0x10052551); -PROVIDE(k_work_init = 0x10063219); -PROVIDE(k_timer_init = 0x1802cd79); -PROVIDE(wlan_get_btwt_cfg = 0x18078765); -PROVIDE(wifi_pmip_v33_enable = 0x1806bb2d); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_DISCONNECT = 0x18049a19); -PROVIDE(llext_fs_prepare = 0x1803eebd); -PROVIDE(z_impl_zsock_sendmsg = 0x1005a371); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBV_PARAM = 0x180487d9); -PROVIDE(wakelock_isheld = 0x10060eb5); -PROVIDE(net_buf_simple_init_with_data = 0x1803be95); -PROVIDE(net_pkt_unref = 0x10056abd); -PROVIDE(wlan_set_crypto_RC4_encrypt = 0x180787f5); -PROVIDE(llext_dependency_remove_all = 0x1803eaad); -PROVIDE(wifi_ps_exit_strategy_txt = 0x18049901); -PROVIDE(llext_find_sym = 0x1803d729); -PROVIDE(IMU_FlushSendFifo = 0x100451e5); -PROVIDE(wifi_twt_setup_cmd_txt = 0x180498c9); -PROVIDE(k_work_queue_unplug = 0x10063679); -PROVIDE(GPIO_PinDisableInterrupt = 0x180852fd); -PROVIDE(net_if_get_name = 0x100514e1); -PROVIDE(__aeabi_d2iz = 0x18029d5d); -PROVIDE(wlan_add_buf_bypass_txq = 0x1004b78d); -PROVIDE(z_unpend_all = 0x100599c5); -PROVIDE(net_get_if_name_netif = 0x1004d39d); -PROVIDE(z_arm_svc = 0x1803a711); -PROVIDE(wlan_11d_cfg_domain_info = 0x18061071); -PROVIDE(wlan_configure_delay_to_ps = 0x18075a79); -PROVIDE(cbvprintf_package = 0x1802f909); -PROVIDE(usb_disable = 0x1803332d); -PROVIDE(__aeabi_idiv0 = 0x18029481); -PROVIDE(ring_buf_get = 0x18031135); -PROVIDE(net_icmp_cleanup_ctx = 0x1804fb29); -PROVIDE(z_queue_node_peek = 0x10057b0d); -PROVIDE(wrapper_wlan_cmd_mgmt_ie = 0x18067e2d); -PROVIDE(wlan_misc_get_tsf_info = 0x1806d081); -PROVIDE(wlan_set_rf_radio_mode = 0x18078565); -PROVIDE(dns_resolve_name_internal = 0x18057995); -PROVIDE(usb_transfer_init = 0x180340c1); -PROVIDE(wlan_cmd_get_hw_spec = 0x180670a1); -PROVIDE(wlan_prepare_cmd = 0x18066a9d); -PROVIDE(net_pkt_alloc_buffer = 0x10055a8d); -PROVIDE(HAL_ImuSendMultiTxData = 0x10043f9d); -PROVIDE(wlan_cleanup_bypass_txq = 0x1004b839); -PROVIDE(wlan_set_txrx_histogram = 0x18076be1); -PROVIDE(llext_lookup_symbol = 0x1803eb25); -PROVIDE(llext_buf_read = 0x1803ee79); -PROVIDE(POWER_PowerOnBle = 0x1805db55); -PROVIDE(z_early_memset = 0x18088fe5); -PROVIDE(net_nbr_unlink = 0x18050ac1); -PROVIDE(OSA_RemoveIdleFunction = 0x10057191); -PROVIDE(wifi_get_rf_per = 0x180638cd); -PROVIDE(strncpy = 0x1808dfa5); -PROVIDE(k_queue_remove = 0x100575c9); -PROVIDE(wifi_set_rf_bandwidth = 0x180637d9); -PROVIDE(I2C_MasterTransferHandleIRQ = 0x180855fd); -PROVIDE(pm_device_wakeup_is_enabled = 0x180328fd); +PROVIDE(wlan_free_mlan_buffer = 0x1806910d); +PROVIDE(wifi_wake_up_card = 0x10062259); +PROVIDE(z_arm_interrupt_init = 0x1803a34d); +PROVIDE(z_shell_get_last_command = 0x180372cd); +PROVIDE(POWER_PowerOffBle = 0x1805cb09); +PROVIDE(wlan_bg_scan_type_is_passive = 0x180637d5); +PROVIDE(wifi_uap_start = 0x1805df71); +PROVIDE(OSA_EventClear = 0x10045521); +PROVIDE(net_context_create_ipv4_new = 0x1004e715); +PROVIDE(fs_write = 0x1803cb99); +PROVIDE(isalpha = 0x1807d11f); +PROVIDE(RESET_SetPeripheralReset = 0x1805cb85); +PROVIDE(OSTIMER_HandleIRQ = 0x18075019); +PROVIDE(z_sched_wake = 0x10058e55); +PROVIDE(printf = 0x1807b549); +PROVIDE(z_shell_cmd_trim = 0x180373d9); +PROVIDE(__aeabi_uldivmod = 0x18029c51); +PROVIDE(wlan_process_mgmt_action = 0x180619c9); +PROVIDE(net_icmpv4_send_error = 0x1802aa79); +PROVIDE(zsock_connect_ctx = 0x1803fb69); +PROVIDE(fs_close = 0x1803cafd); +PROVIDE(SPI_MasterTransferHandleIRQ = 0x18075195); +PROVIDE(z_impl_k_pipe_close = 0x180792a1); +PROVIDE(usb_dc_ep_disable = 0x180578f1); +PROVIDE(net_if_need_calc_tx_checksum = 0x10053eb5); +PROVIDE(net_if_start_dad = 0x100541ad); +PROVIDE(fnmatch = 0x1803aab9); +PROVIDE(net_stat = 0x1004d389); +PROVIDE(wlan_ret_802_11_tx_rate_query = 0x18063dd5); +PROVIDE(__aeabi_drsub = 0x18028e75); +PROVIDE(__aeabi_d2ulz = 0x18029c81); +PROVIDE(wlan_set_region_power_cfg = 0x18072411); +PROVIDE(wifi_register_wrapper_net_is_ip_or_ipv6_callback = 0x10061b9d); +PROVIDE(wifi_clear_wakeup_reason = 0x1006022d); +PROVIDE(wlan_cmd_rx_abort_cfg = 0x1806463d); +PROVIDE(USART_GetDefaultConfig = 0x18075945); +PROVIDE(shell_fprintf_warn = 0x180369d9); +PROVIDE(arch_switch_to_main_thread = 0x1803a2b9); +PROVIDE(z_shell_wildcard_prepare = 0x18038bd1); +PROVIDE(z_shell_wildcard_finalize = 0x18038d49); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBU_PARAM = 0x180481a5); +PROVIDE(timeutil_timegm64 = 0x18030459); +PROVIDE(z_impl_k_queue_alloc_append = 0x100575c9); +PROVIDE(usb_get_device_descriptor = 0x1803334d); +PROVIDE(wlan_get_uap_channel = 0x180717f5); +PROVIDE(z_impl_net_if_ipv4_addr_lookup_by_index = 0x100554f1); +PROVIDE(k_work_cancel = 0x10062589); +PROVIDE(wlan_ret_get_hw_spec = 0x180642a1); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_RTS_THRESHOLD_CONFIG = 0x180498c9); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_VERSION = 0x180497b9); +PROVIDE(wifi_sta_handle_event_data_pause = 0x1806641d); +PROVIDE(HAL_RpmsgInit = 0x10044309); +PROVIDE(wrapper_wlan_uap_ampdu_enable = 0x18064be1); +PROVIDE(zsock_setsockopt_ctx = 0x1804085d); +PROVIDE(wifi_tx_card_awake_lock = 0x10061fcd); +PROVIDE(net_if_ipv6_prefix_rm = 0x100535dd); +PROVIDE(net_ipv4_init = 0x10046969); +PROVIDE(wlan_ret_boot_sleep = 0x1806485d); +PROVIDE(is_uap_started = 0x18071111); +PROVIDE(RESET_PeripheralReset = 0x1805cc81); +PROVIDE(net_if_get_first_wifi = 0x100512bd); +PROVIDE(CLOCK_AttachClk = 0x1805bb19); +PROVIDE(fs_truncate = 0x1803cc89); +PROVIDE(filter_set = 0x1803126d); +PROVIDE(wifi_sta_ampdu_tx_enable_per_tid_is_allowed = 0x10061fb5); +PROVIDE(OSA_EventWait = 0x100457a5); +PROVIDE(wlan_get_current_uap_network = 0x18071069); +PROVIDE(arm_irq_priority_set = 0x1803a14d); +PROVIDE(net_if_get_first_up = 0x10051261); +PROVIDE(__double_computeInvPow5 = 0x1807cc99); +PROVIDE(z_shell_pattern_remove = 0x18037191); +PROVIDE(wlan_reset_connect_state = 0x1806e225); +PROVIDE(OSA_DisableIRQGlobal = 0x100454b5); +PROVIDE(net_if_ipv4_set_netmask = 0x10052385); +PROVIDE(k_work_init = 0x10062da1); +PROVIDE(k_timer_init = 0x1802c6f9); +PROVIDE(wifi_pmip_v33_enable = 0x180680fd); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_DISCONNECT = 0x18049039); +PROVIDE(llext_fs_prepare = 0x1803e89d); +PROVIDE(z_impl_zsock_sendmsg = 0x1005a0a1); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBV_PARAM = 0x18047e15); +PROVIDE(wakelock_isheld = 0x10060a7d); +PROVIDE(net_buf_simple_init_with_data = 0x1803b891); +PROVIDE(net_pkt_unref = 0x10056875); +PROVIDE(llext_dependency_remove_all = 0x1803e48d); +PROVIDE(wifi_ps_exit_strategy_txt = 0x18048f21); +PROVIDE(llext_find_sym = 0x1803d109); +PROVIDE(IMU_FlushSendFifo = 0x100451c5); +PROVIDE(wifi_twt_setup_cmd_txt = 0x18048ee9); +PROVIDE(k_work_queue_unplug = 0x10063201); +PROVIDE(GPIO_PinDisableInterrupt = 0x1807478d); +PROVIDE(net_if_get_name = 0x1005132d); +PROVIDE(__aeabi_d2iz = 0x1802974d); +PROVIDE(wlan_add_buf_bypass_txq = 0x1004b705); +PROVIDE(z_unpend_all = 0x100596f5); +PROVIDE(net_get_if_name_netif = 0x1004d2b9); +PROVIDE(z_arm_svc = 0x1803a10d); +PROVIDE(wlan_11d_cfg_domain_info = 0x1805fe91); +PROVIDE(wlan_configure_delay_to_ps = 0x1807184d); +PROVIDE(cbvprintf_package = 0x1802f45d); +PROVIDE(usb_disable = 0x18032e21); +PROVIDE(__aeabi_idiv0 = 0x18028e71); +PROVIDE(ring_buf_get = 0x18030c49); +PROVIDE(net_icmp_cleanup_ctx = 0x1804ee65); +PROVIDE(z_queue_node_peek = 0x1005786d); +PROVIDE(wrapper_wlan_cmd_mgmt_ie = 0x18064f49); +PROVIDE(wlan_misc_get_tsf_info = 0x18069625); +PROVIDE(dns_resolve_name_internal = 0x18056985); +PROVIDE(usb_transfer_init = 0x18033b95); +PROVIDE(wlan_cmd_get_hw_spec = 0x18064251); +PROVIDE(wlan_prepare_cmd = 0x18063c4d); +PROVIDE(net_pkt_alloc_buffer = 0x10055841); +PROVIDE(HAL_ImuSendMultiTxData = 0x10043f7d); +PROVIDE(wlan_cleanup_bypass_txq = 0x1004b7b1); +PROVIDE(llext_lookup_symbol = 0x1803e505); +PROVIDE(llext_buf_read = 0x1803e859); +PROVIDE(POWER_PowerOnBle = 0x1805ca85); +PROVIDE(z_early_memset = 0x180783dd); +PROVIDE(net_nbr_unlink = 0x1804fdfd); +PROVIDE(OSA_RemoveIdleFunction = 0x10056ef1); +PROVIDE(strncpy = 0x1807d2d1); +PROVIDE(k_queue_remove = 0x10057329); +PROVIDE(I2C_MasterTransferHandleIRQ = 0x18074a8d); +PROVIDE(pm_device_wakeup_is_enabled = 0x180323f1); PROVIDE(net_buf_slist_get = 0x100409bd); -PROVIDE(wifi_uap_handle_cmd_resp = 0x1805ecfd); -PROVIDE(OSA_TimerActivate = 0x100571a1); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_BTM_QUERY = 0x1804a221); -PROVIDE(OSA_MsgQPut = 0x10045be9); -PROVIDE(z_shell_op_cursor_end_move = 0x18037ead); -PROVIDE(llext_bootstrap = 0x1803da05); -PROVIDE(__assert_no_args = 0x1803a9a5); -PROVIDE(z_impl_k_poll_signal_raise = 0x1808b8d9); -PROVIDE(test_wlan_cfg_process = 0x1807b6b5); -PROVIDE(net_if_ipv6_router_find_default = 0x10053a1d); -PROVIDE(wlan_ralist_update_enh = 0x1004bc4d); -PROVIDE(bus_register_data_input_function = 0x1005fbc5); -PROVIDE(zsock_sendto_ctx = 0x1802aa01); -PROVIDE(gen_tx_pkt_from_data = 0x1004ccf9); -PROVIDE(is_split_scan_complete = 0x1806db01); -PROVIDE(wlan_11ax_bandconfig_allowed = 0x18060a41); -PROVIDE(net_if_get_by_name = 0x100512bd); -PROVIDE(wlan_get_rf_bandwidth = 0x18078595); -PROVIDE(z_thread_prio_set = 0x1005961d); -PROVIDE(net_ipaddr_parse = 0x1005f249); -PROVIDE(__cmpdf2 = 0x18029c31); -PROVIDE(z_arm_fault = 0x1803a291); -PROVIDE(wlan_cmd_802_11_bg_scan_query = 0x1806f6cd); -PROVIDE(putchar = 0x1808c241); -PROVIDE(wlan_register_csi_user_callback = 0x18079819); -PROVIDE(OSA_MutexDestroy = 0x10045ce1); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_TWT = 0x18049f01); -PROVIDE(zsock_listen_ctx = 0x180402c5); -PROVIDE(wifi_uap_ampdu_tx_enable = 0x100624d5); -PROVIDE(ipv6_addr_type_to_desc = 0x1004d05d); -PROVIDE(net_dhcpv4_server_foreach_lease = 0x180563d1); -PROVIDE(dns_msg_pack_query = 0x18056611); -PROVIDE(wifi_utils_parse_scan_chan = 0x1804eb79); -PROVIDE(HAL_RpmsgFreeRxBuffer = 0x1004429d); -PROVIDE(wifi_uap_ampdu_tx_enable_per_tid_is_allowed = 0x100624ed); +PROVIDE(wifi_uap_handle_cmd_resp = 0x1805dbed); +PROVIDE(OSA_TimerActivate = 0x10056f01); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_BTM_QUERY = 0x180497e5); +PROVIDE(OSA_MsgQPut = 0x10045bc9); +PROVIDE(z_shell_op_cursor_end_move = 0x180378e9); +PROVIDE(llext_bootstrap = 0x1803d3e5); +PROVIDE(__assert_no_args = 0x1803a3a1); +PROVIDE(z_impl_k_poll_signal_raise = 0x1807ac05); +PROVIDE(net_if_ipv6_router_find_default = 0x10053821); +PROVIDE(wlan_ralist_update_enh = 0x1004bbc5); +PROVIDE(bus_register_data_input_function = 0x1005f7b1); +PROVIDE(zsock_sendto_ctx = 0x1802a3f1); +PROVIDE(gen_tx_pkt_from_data = 0x1004cc71); +PROVIDE(is_split_scan_complete = 0x1806a0a5); +PROVIDE(wlan_11ax_bandconfig_allowed = 0x1805f861); +PROVIDE(net_if_get_by_name = 0x10051109); +PROVIDE(z_thread_prio_set = 0x10059351); +PROVIDE(net_ipaddr_parse = 0x1005ee8d); +PROVIDE(__cmpdf2 = 0x18029621); +PROVIDE(z_arm_fault = 0x18039c8d); +PROVIDE(wlan_cmd_802_11_bg_scan_query = 0x1806bc05); +PROVIDE(putchar = 0x1807b56d); +PROVIDE(OSA_MutexDestroy = 0x10045cc1); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_TWT = 0x18049501); +PROVIDE(zsock_listen_ctx = 0x1803fc4d); +PROVIDE(wifi_uap_ampdu_tx_enable = 0x1006205d); +PROVIDE(ipv6_addr_type_to_desc = 0x1004cfb5); +PROVIDE(net_dhcpv4_server_foreach_lease = 0x18055485); +PROVIDE(dns_msg_pack_query = 0x180556c5); +PROVIDE(wifi_utils_parse_scan_chan = 0x1804ded5); +PROVIDE(HAL_RpmsgFreeRxBuffer = 0x1004427d); +PROVIDE(wifi_uap_ampdu_tx_enable_per_tid_is_allowed = 0x10062075); PROVIDE(CONFIG_POSIX_THREAD_SAFE_FUNCTIONS = 0x00000001); -PROVIDE(usb_enable = 0x180335b9); -PROVIDE(net_wlan_init = 0x1004d585); -PROVIDE(wifi_host_11k_cfg = 0x18064ccd); -PROVIDE(wlan_set_get_cck_desense_cfg = 0x18074031); -PROVIDE(wlan_11n_deleteall_txbastream_tbl = 0x10049b75); -PROVIDE(pm_device_state_get = 0x180328d9); -PROVIDE(z_log_runtime_filters_init = 0x180316e9); -PROVIDE(wlan_set_frag = 0x18076805); -PROVIDE(z_arm_exc_exit = 0x18039b49); -PROVIDE(nxp_wifi_internal_tx = 0x1004d735); -PROVIDE(wlan_set_ipv6_ns_mef = 0x180795b9); -PROVIDE(wlan_get_station_entry = 0x1806cb6d); -PROVIDE(z_impl_k_mutex_lock = 0x1004c7e9); -PROVIDE(string_equal = 0x18084dc9); -PROVIDE(wlan_stop_network = 0x180752fd); -PROVIDE(zsock_accept_ctx = 0x18040451); -PROVIDE(nxp_wifi_shell_register = 0x1805c90d); -PROVIDE(wifi_get_mac_address_from_cmdresp = 0x1806aae5); -PROVIDE(FLEXSPI_CheckAndClearError = 0x1004472d); -PROVIDE(zsock_getaddrinfo = 0x1803f765); -PROVIDE(net_ipv4_frag_foreach = 0x10046d95); -PROVIDE(wlan_cmd_802_11_associate = 0x1806c141); -PROVIDE(z_log_msg_commit = 0x18031605); -PROVIDE(z_prep_c = 0x1803a7bd); +PROVIDE(usb_enable = 0x180330ad); +PROVIDE(net_wlan_init = 0x1004d4a1); +PROVIDE(wifi_host_11k_cfg = 0x18062891); +PROVIDE(wlan_11n_deleteall_txbastream_tbl = 0x10049aed); +PROVIDE(pm_device_state_get = 0x180323cd); +PROVIDE(z_log_runtime_filters_init = 0x180311fd); +PROVIDE(z_arm_exc_exit = 0x18039545); +PROVIDE(nxp_wifi_internal_tx = 0x1004d651); +PROVIDE(wlan_get_station_entry = 0x18069111); +PROVIDE(z_impl_k_mutex_lock = 0x1004c761); +PROVIDE(wlan_stop_network = 0x180713b9); +PROVIDE(zsock_accept_ctx = 0x1803fdd9); +PROVIDE(wifi_get_mac_address_from_cmdresp = 0x18067aa5); +PROVIDE(FLEXSPI_CheckAndClearError = 0x1004470d); +PROVIDE(zsock_getaddrinfo = 0x1803f0ed); +PROVIDE(net_ipv4_frag_foreach = 0x10046d59); +PROVIDE(wlan_cmd_802_11_associate = 0x180686f5); +PROVIDE(z_log_msg_commit = 0x18031119); +PROVIDE(z_prep_c = 0x1803a1b9); PROVIDE(net_eth_mac_filter = 0x10042141); -PROVIDE(memc_flexspi_get_ahb_address = 0x10048f91); -PROVIDE(CLOCK_GetFlexspiClkFreq = 0x1805cfbd); -PROVIDE(OSA_RWLockWriteUnlock = 0x10057179); -PROVIDE(net_interface_dhcp_stop = 0x1004d3ed); -PROVIDE(OSA_TimeGetMsec = 0x10046785); -PROVIDE(wlan_xmit_wmm_pkt = 0x10060bb9); -PROVIDE(k_work_reschedule_for_queue = 0x1006374d); -PROVIDE(__aeabi_cfcmpeq = 0x1802a121); -PROVIDE(configure_builtin_stack_guard = 0x1803a861); -PROVIDE(z_impl_zvfs_select = 0x1803cbf1); -PROVIDE(net_route_get_nbr = 0x18052f85); -PROVIDE(z_impl_k_pipe_reset = 0x18089ea1); -PROVIDE(wlan_get_firmware_version_ext = 0x1807663d); -PROVIDE(wifi_set_ecsa_cfg = 0x180652c5); -PROVIDE(wifi_prepare_and_send_cmd = 0x18067f69); -PROVIDE(USART_SetBaudRate = 0x180864d5); -PROVIDE(net_pkt_alloc_from_slab = 0x10055dd9); +PROVIDE(memc_flexspi_get_ahb_address = 0x10048f09); +PROVIDE(CLOCK_GetFlexspiClkFreq = 0x1805beed); +PROVIDE(OSA_RWLockWriteUnlock = 0x10056ed9); +PROVIDE(net_interface_dhcp_stop = 0x1004d309); +PROVIDE(OSA_TimeGetMsec = 0x10046765); +PROVIDE(wlan_xmit_wmm_pkt = 0x10060785); +PROVIDE(k_work_reschedule_for_queue = 0x100632d5); +PROVIDE(__aeabi_cfcmpeq = 0x18029b11); +PROVIDE(configure_builtin_stack_guard = 0x1803a25d); +PROVIDE(z_impl_zvfs_select = 0x1803c5ed); +PROVIDE(net_route_get_nbr = 0x18052189); +PROVIDE(z_impl_k_pipe_reset = 0x180791dd); +PROVIDE(wlan_get_firmware_version_ext = 0x180723b5); +PROVIDE(wifi_set_ecsa_cfg = 0x18062c11); +PROVIDE(wifi_prepare_and_send_cmd = 0x18065079); +PROVIDE(USART_SetBaudRate = 0x18075965); +PROVIDE(net_pkt_alloc_from_slab = 0x10055b91); PROVIDE(net_buf_pool_get = 0x10040931); -PROVIDE(SPI_MasterTransferCreateHandle = 0x18086325); -PROVIDE(net_tcp_recv = 0x1005b2bd); -PROVIDE(wifi_set_threshold_link_quality = 0x1806b9f5); -PROVIDE(k_sched_unlock = 0x10057cad); -PROVIDE(wlan_deepsleepps_off = 0x18075bc1); -PROVIDE(net_if_ipv4_get_ttl = 0x10051f25); -PROVIDE(llext_fs_finalize = 0x1803ef31); -PROVIDE(z_impl_k_sched_current_thread_query = 0x10058279); -PROVIDE(net_context_is_v6only_set = 0x1004ee69); -PROVIDE(wifi_set_ips_config = 0x1806588d); -PROVIDE(wlan_single_ant_duty_cycle = 0x18079a0d); -PROVIDE(z_impl_k_condvar_init = 0x180899e5); -PROVIDE(wlan_clear_host_sleep_config = 0x180742b1); -PROVIDE(wifi_uap_ampdu_rx_enable_per_tid = 0x100624a9); -PROVIDE(USB_DeviceEhciDeinit = 0x180871a1); -PROVIDE(exit = 0x1808bc65); -PROVIDE(mlan_unregister = 0x1807011d); -PROVIDE(wlan_configure_listen_interval = 0x18075a75); -PROVIDE(FLEXSPI_WriteBlocking = 0x100450fd); -PROVIDE(wlan_get_data_rate = 0x1807679d); -PROVIDE(wlan_set_rts = 0x180767f5); -PROVIDE(wlan_reg_access = 0x1807901d); -PROVIDE(wlan_is_network_compatible = 0x1806dcc5); -PROVIDE(net_ipv6_addr_generate_iid = 0x100475d1); -PROVIDE(z_impl_hwinfo_get_reset_cause = 0x1805943d); -PROVIDE(wifi_uap_set_bandwidth = 0x1805eab5); -PROVIDE(zsock_getsockopt_ctx = 0x18040c01); -PROVIDE(net_if_init = 0x10051619); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_PMKSA_FLUSH = 0x1804a2c1); -PROVIDE(FLEXSPI_ReadBlocking = 0x1004498d); -PROVIDE(net_ipv6_send_na = 0x1802b739); -PROVIDE(wlan_uap_set_bandwidth = 0x180767bd); -PROVIDE(wlan_set_rg_power_cfg = 0x18084af1); -PROVIDE(k_sys_fatal_error_handler = 0x18088cd9); -PROVIDE(wifi_set_mac_multicast_addr = 0x180646e1); -PROVIDE(mlan_init_fw = 0x18070179); -PROVIDE(iface2str = 0x1804288d); -PROVIDE(net_buf_simple_add_mem = 0x1803bf39); -PROVIDE(_cos = 0x1802d3b1); -PROVIDE(POWER_EnableWakeup = 0x1805d67d); -PROVIDE(wrapper_net_is_ip_or_ipv6 = 0x1004da95); -PROVIDE(CACHE64_GetInstanceByAddr = 0x18086a71); -PROVIDE(vprintk = 0x180303e5); -PROVIDE(z_shell_op_completion_insert = 0x18038631); -PROVIDE(z_impl_k_thread_custom_data_get = 0x1005e9e1); -PROVIDE(net_ipv6_create = 0x100476b9); -PROVIDE(__aeabi_d2f = 0x18029ded); -PROVIDE(HAL_ImuInit = 0x100431f9); -PROVIDE(usb_dc_ep_read_continue = 0x18058c11); -PROVIDE(_strerror_r = 0x1808bc81); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_WPS_CONFIG = 0x1804a275); -PROVIDE(wlan_handle_cmd_resp_packet = 0x100608f9); -PROVIDE(OSA_MsgQAvailableMsgs = 0x10045991); -PROVIDE(wlan_get_rf_rx_antenna = 0x180785d9); -PROVIDE(wifi_set_11ax_cfg = 0x1806b1b1); -PROVIDE(z_spin_lock_set_owner = 0x1808a225); -PROVIDE(wifi_scan_stop = 0x10062269); -PROVIDE(wlan_add_mbo_oui = 0x1806cb39); -PROVIDE(set_monitor_flag = 0x18067ef1); -PROVIDE(wlan_dot11k_formatRrmCapabilities = 0x18062695); -PROVIDE(net_ipv6_send_fragmented_pkt = 0x100483f1); -PROVIDE(usb_dc_ep_write = 0x180589c9); -PROVIDE(sb3_fw_download = 0x18087c61); -PROVIDE(wlan_dual_ant_duty_cycle = 0x18079a11); -PROVIDE(floor = 0x1808db1d); -PROVIDE(shell_uninit = 0x18036415); -PROVIDE(usb_dc_attach = 0x18058309); -PROVIDE(__aeabi_idivmod = 0x18029471); -PROVIDE(z_shell_op_cursor_home_move = 0x18037e9d); -PROVIDE(wlan_11d_prepare_dnld_domain_info_cmd = 0x180616cd); -PROVIDE(z_impl_k_sem_init = 0x10059c95); -PROVIDE(net_tcp_accept = 0x1005a72d); -PROVIDE(OSA_EventPrecreate = 0x10045759); -PROVIDE(net_route_del = 0x18053159); -PROVIDE(pm_policy_state_lock_is_active = 0x18032765); -PROVIDE(SystemInitHook = 0x180851ad); -PROVIDE(wlan_set_antcfg = 0x18075c11); -PROVIDE(net_get_if_ipv6_addr = 0x1004d26d); -PROVIDE(wifi_get_board_type = 0x1806ba55); -PROVIDE(net_if_ipv6_set_hop_limit = 0x10053c61); -PROVIDE(net_if_get_by_iface = 0x100511f9); -PROVIDE(wlan_11h_priv_init = 0x18061b01); -PROVIDE(net_if_ipv4_addr_foreach = 0x10051b25); -PROVIDE(send = 0x1803b525); -PROVIDE(HAL_RpmsgSetEvent = 0x100446d5); -PROVIDE(OSA_Start = 0x10046201); -PROVIDE(__fixunsdfsi = 0x18029dad); -PROVIDE(z_shell_op_word_remove = 0x18038295); -PROVIDE(wlan_wlcmgr_send_msg = 0x18075c59); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_AP_STA_DISCONNECT = 0x18049b29); -PROVIDE(net_if_ipv6_addr_onlink = 0x10052a21); -PROVIDE(net_pkt_rx_alloc = 0x10056969); -PROVIDE(wifi_set_threshold_data_snr_low = 0x1806b9a5); -PROVIDE(net_if_mcast_monitor = 0x10054005); -PROVIDE(CACHE64_InvalidateCacheByRange = 0x18086b0d); -PROVIDE(wifi_set_rf_otp_cal_data = 0x18063fbd); +PROVIDE(SPI_MasterTransferCreateHandle = 0x180757b5); +PROVIDE(net_tcp_recv = 0x1005afa9); +PROVIDE(k_sched_unlock = 0x10057a0d); +PROVIDE(wlan_deepsleepps_off = 0x18071995); +PROVIDE(net_if_ipv4_get_ttl = 0x10051d59); +PROVIDE(llext_fs_finalize = 0x1803e911); +PROVIDE(z_impl_k_sched_current_thread_query = 0x10057fd5); +PROVIDE(net_context_is_v6only_set = 0x1004ed41); +PROVIDE(z_impl_k_condvar_init = 0x18078d21); +PROVIDE(wifi_uap_ampdu_rx_enable_per_tid = 0x10062031); +PROVIDE(USB_DeviceEhciDeinit = 0x18076631); +PROVIDE(exit = 0x1807af91); +PROVIDE(mlan_unregister = 0x1806c655); +PROVIDE(wlan_configure_listen_interval = 0x18071849); +PROVIDE(FLEXSPI_WriteBlocking = 0x100450dd); +PROVIDE(wlan_get_data_rate = 0x1807245d); +PROVIDE(wlan_set_rts = 0x18072499); +PROVIDE(wlan_is_network_compatible = 0x1806a269); +PROVIDE(net_ipv6_addr_generate_iid = 0x10047591); +PROVIDE(z_impl_hwinfo_get_reset_cause = 0x18058409); +PROVIDE(wifi_uap_set_bandwidth = 0x1805d9a5); +PROVIDE(zsock_getsockopt_ctx = 0x18040589); +PROVIDE(net_if_init = 0x10051465); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_PMKSA_FLUSH = 0x18049885); +PROVIDE(FLEXSPI_ReadBlocking = 0x1004496d); +PROVIDE(net_ipv6_send_na = 0x1802b129); +PROVIDE(wlan_uap_set_bandwidth = 0x18072461); +PROVIDE(wlan_set_rg_power_cfg = 0x180743d9); +PROVIDE(k_sys_fatal_error_handler = 0x18078125); +PROVIDE(wifi_set_mac_multicast_addr = 0x180624d5); +PROVIDE(mlan_init_fw = 0x1806c6b1); +PROVIDE(iface2str = 0x180421b5); +PROVIDE(net_buf_simple_add_mem = 0x1803b935); +PROVIDE(_cos = 0x1802cf21); +PROVIDE(POWER_EnableWakeup = 0x1805c5ad); +PROVIDE(wrapper_net_is_ip_or_ipv6 = 0x1004d9b1); +PROVIDE(CACHE64_GetInstanceByAddr = 0x18075f01); +PROVIDE(vprintk = 0x1802fef9); +PROVIDE(z_shell_op_completion_insert = 0x1803806d); +PROVIDE(z_impl_k_thread_custom_data_get = 0x1005e635); +PROVIDE(net_ipv6_create = 0x10047655); +PROVIDE(__aeabi_d2f = 0x180297dd); +PROVIDE(HAL_ImuInit = 0x100431d9); +PROVIDE(usb_dc_ep_read_continue = 0x18057bdd); +PROVIDE(_strerror_r = 0x1807afad); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_WPS_CONFIG = 0x18049839); +PROVIDE(wlan_handle_cmd_resp_packet = 0x100604e5); +PROVIDE(OSA_MsgQAvailableMsgs = 0x10045971); +PROVIDE(z_spin_lock_set_owner = 0x18079561); +PROVIDE(wifi_scan_stop = 0x10061df1); +PROVIDE(wlan_add_mbo_oui = 0x180690dd); +PROVIDE(wlan_dot11k_formatRrmCapabilities = 0x180614b5); +PROVIDE(net_ipv6_send_fragmented_pkt = 0x10048369); +PROVIDE(usb_dc_ep_write = 0x18057995); +PROVIDE(sb3_fw_download = 0x180770f1); +PROVIDE(floor = 0x1807ce49); +PROVIDE(shell_uninit = 0x18035e69); +PROVIDE(usb_dc_attach = 0x180572d5); +PROVIDE(__aeabi_idivmod = 0x18028e61); +PROVIDE(z_shell_op_cursor_home_move = 0x180378d9); +PROVIDE(wlan_11d_prepare_dnld_domain_info_cmd = 0x180604ed); +PROVIDE(z_impl_k_sem_init = 0x100599c5); +PROVIDE(net_tcp_accept = 0x1005a45d); +PROVIDE(OSA_EventPrecreate = 0x10045739); +PROVIDE(net_route_del = 0x1805235d); +PROVIDE(pm_policy_state_lock_is_active = 0x18032259); +PROVIDE(SystemInitHook = 0x1807463d); +PROVIDE(net_get_if_ipv6_addr = 0x1004d189); +PROVIDE(wifi_get_board_type = 0x18068025); +PROVIDE(net_if_ipv6_set_hop_limit = 0x10053a65); +PROVIDE(net_if_get_by_iface = 0x10051045); +PROVIDE(wlan_11h_priv_init = 0x18060921); +PROVIDE(net_if_ipv4_addr_foreach = 0x10051959); +PROVIDE(send = 0x1803af21); +PROVIDE(HAL_RpmsgSetEvent = 0x100446b5); +PROVIDE(OSA_Start = 0x100461e1); +PROVIDE(__fixunsdfsi = 0x1802979d); +PROVIDE(z_shell_op_word_remove = 0x18037cd1); +PROVIDE(wlan_wlcmgr_send_msg = 0x180719e5); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_AP_STA_DISCONNECT = 0x18049149); +PROVIDE(net_if_ipv6_addr_onlink = 0x10052841); +PROVIDE(net_pkt_rx_alloc = 0x10056721); +PROVIDE(net_if_mcast_monitor = 0x10053e09); +PROVIDE(CACHE64_InvalidateCacheByRange = 0x18075f9d); PROVIDE(net_buf_frag_last = 0x1004086d); -PROVIDE(k_work_schedule_for_queue = 0x1006387d); -PROVIDE(arch_spin_relax = 0x1808966d); -PROVIDE(get_lifecycle_state = 0x18088aa9); -PROVIDE(wlan_get_txratecfg = 0x180766dd); -PROVIDE(z_early_rand_get = 0x180890d9); -PROVIDE(wifi_set_threshold_beacon_miss = 0x1806b92d); -PROVIDE(net_context_send = 0x1004f2e9); -PROVIDE(imu_get_task_lock = 0x1005fc39); -PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x18088bad); -PROVIDE(z_unpend_thread = 0x100599f9); -PROVIDE(z_pend_thread = 0x10058d21); -PROVIDE(__aeabi_dcmpge = 0x18029d09); -PROVIDE(wifi_set_get_rx_abort_cfg_ext = 0x1806af81); -PROVIDE(z_cstart = 0x1808917d); -PROVIDE(wlan_process_rx_packet = 0x180726d9); -PROVIDE(net_sprint_addr = 0x1005f4d9); -PROVIDE(wifi_deregister_wrapper_net_is_ip_or_ipv6_callback = 0x1006132d); -PROVIDE(wifi_exit_deepsleep_power_save = 0x18072e01); -PROVIDE(wifi_twt_operation_txt = 0x18049891); -PROVIDE(_StackCheckHandler = 0x1808a501); -PROVIDE(z_shell_help_request = 0x18038b31); -PROVIDE(mlan_register = 0x1806ff35); -PROVIDE(wlan_11d_is_enabled = 0x18061371); -PROVIDE(z_impl_z_log_msg_static_create = 0x18031bd9); -PROVIDE(net_ipv6_mld_init = 0x18052d8d); -PROVIDE(wlan_free_adapter = 0x1806bfbd); +PROVIDE(k_work_schedule_for_queue = 0x10063405); +PROVIDE(arch_spin_relax = 0x180789a9); +PROVIDE(get_lifecycle_state = 0x18077ef5); +PROVIDE(net_context_send = 0x1004f199); +PROVIDE(imu_get_task_lock = 0x1005f825); +PROVIDE(z_impl_device_get_by_dt_nodelabel = 0x18077ff9); +PROVIDE(z_unpend_thread = 0x10059729); +PROVIDE(z_pend_thread = 0x10058a69); +PROVIDE(__aeabi_dcmpge = 0x180296f9); +PROVIDE(z_cstart = 0x180784d1); +PROVIDE(wlan_process_rx_packet = 0x1806eb85); +PROVIDE(net_sprint_addr = 0x1005f0f9); +PROVIDE(wifi_deregister_wrapper_net_is_ip_or_ipv6_callback = 0x10060ed5); +PROVIDE(wifi_exit_deepsleep_power_save = 0x1806f259); +PROVIDE(wifi_twt_operation_txt = 0x18048eb1); +PROVIDE(z_shell_help_request = 0x1803854d); +PROVIDE(mlan_register = 0x1806c46d); +PROVIDE(wlan_11d_is_enabled = 0x18060191); +PROVIDE(z_impl_z_log_msg_static_create = 0x180316cd); +PROVIDE(net_ipv6_mld_init = 0x18051fb5); +PROVIDE(wlan_free_adapter = 0x1806858d); PROVIDE(net_eth_ipv4_mcast_to_mac_addr = 0x10042115); -PROVIDE(wlan_send_delba = 0x1004a26d); -PROVIDE(net_if_nbr_reachability_hint = 0x10054059); -PROVIDE(net_timeout_evaluate = 0x1804f045); -PROVIDE(net_pkt_frag_ref = 0x1005646d); -PROVIDE(z_log_notify_backend_enabled = 0x180315bd); -PROVIDE(wifi_get_scan_result_count = 0x1806aa55); -PROVIDE(wifi_11d_is_channel_allowed = 0x18064841); -PROVIDE(device_pm_dump_wakeup_source = 0x1805c791); -PROVIDE(wifi_set_threshold_rssi_low = 0x1806b869); -PROVIDE(net_get_uap_interface = 0x1004d3cd); -PROVIDE(wlan_config_mef = 0x18079715); -PROVIDE(HAL_RpmsgDeinit = 0x10044219); -PROVIDE(zperf_udp_upload = 0x100670b9); -PROVIDE(OSA_RWLockDestroy = 0x100570b5); -PROVIDE(zperf_reset_session_stats = 0x10064471); -PROVIDE(zvfs_get_obj_lock_and_cond = 0x1803053d); -PROVIDE(wifi_tx_card_awake_unlock = 0x10062475); -PROVIDE(net_ipv6_mld_join = 0x18052c61); -PROVIDE(wlan_cmd_hs_wakeup_reason = 0x180676b9); -PROVIDE(wlan_check_channel_by_region_table = 0x18066475); -PROVIDE(z_impl_k_thread_stack_space_get = 0x1005ea41); -PROVIDE(net_if_ipv4_get_gw = 0x10051de9); -PROVIDE(atan = 0x1802d071); -PROVIDE(wlan_disconnect = 0x1807509d); -PROVIDE(CLOCK_InitAvPll = 0x1805d4e1); -PROVIDE(net_stop_dhcp_timer = 0x1004d471); -PROVIDE(llext_copy_regions = 0x1803dabd); -PROVIDE(POWER_SetSleepMode = 0x10068371); -PROVIDE(SPI_MasterInit = 0x1808600d); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXINJECTION_MODE = 0x180487d9); -PROVIDE(__aeabi_ldivmod = 0x1802a1c1); -PROVIDE(z_ready_thread = 0x10058e0d); -PROVIDE(wifi_set_threshold_snr_high = 0x1806b8dd); -PROVIDE(net_pkt_get_frag = 0x10056595); -PROVIDE(wlan_get_center_freq_idx = 0x18060025); -PROVIDE(wlan_set_11ax_rutxpowerlimit = 0x18078749); -PROVIDE(k_msgq_init = 0x1004c025); -PROVIDE(wifi_nm_get_instance = 0x1804e72d); -PROVIDE(wifi_get_last_cmd_sent_ms = 0x10061849); -PROVIDE(wlan_send_hostcmd = 0x1807865d); -PROVIDE(__aeabi_dmul = 0x180297fd); -PROVIDE(strtoul = 0x1808c795); -PROVIDE(imu_wifi_init = 0x1005fd0d); -PROVIDE(net_udp_set_hdr = 0x1005ee9d); -PROVIDE(net_ipv4_igmp_leave = 0x18050551); -PROVIDE(k_thread_runtime_stats_get = 0x1005e819); -PROVIDE(net_port_set_default = 0x1005f431); -PROVIDE(OSA_EventCreate = 0x100455a9); -PROVIDE(hex2bin = 0x18030871); -PROVIDE(INPUTMUX_Deinit = 0x180853f9); -PROVIDE(socket = 0x1803b559); -PROVIDE(getopt_state_get = 0x1803b27d); -PROVIDE(k_fatal_halt = 0x18088d0d); -PROVIDE(wlan_11d_parse_domain_info = 0x18061469); -PROVIDE(z_log_msg_runtime_vcreate = 0x180319ad); -PROVIDE(wifi_nm_iface_is_sta = 0x1804e8e1); -PROVIDE(boot_banner = 0x18088ac5); -PROVIDE(USB_DeviceNotificationTrigger = 0x18058de5); -PROVIDE(wifi_set_eu_crypto = 0x18064fd1); -PROVIDE(send_wifi_driver_tx_null_data_event = 0x10060e65); -PROVIDE(close = 0x1803b2e5); -PROVIDE(wifi_set_get_rx_abort_cfg = 0x1806af39); -PROVIDE(net_ipv6_prepare_for_send = 0x180522d5); -PROVIDE(__aeabi_dcmpun = 0x18029d31); +PROVIDE(wlan_send_delba = 0x1004a1e5); +PROVIDE(net_if_nbr_reachability_hint = 0x10053e5d); +PROVIDE(net_timeout_evaluate = 0x1804e3a1); +PROVIDE(net_pkt_frag_ref = 0x10056225); +PROVIDE(z_log_notify_backend_enabled = 0x180310d1); +PROVIDE(wifi_get_scan_result_count = 0x18067a15); +PROVIDE(wifi_11d_is_channel_allowed = 0x18062635); +PROVIDE(device_pm_dump_wakeup_source = 0x1805b721); +PROVIDE(net_get_uap_interface = 0x1004d2e9); +PROVIDE(HAL_RpmsgDeinit = 0x100441f9); +PROVIDE(zperf_udp_upload = 0x10066ad1); +PROVIDE(OSA_RWLockDestroy = 0x10056e15); +PROVIDE(zperf_reset_session_stats = 0x10063fd9); +PROVIDE(zvfs_get_obj_lock_and_cond = 0x18030051); +PROVIDE(wifi_tx_card_awake_unlock = 0x10061ffd); +PROVIDE(net_ipv6_mld_join = 0x18051e89); +PROVIDE(wlan_cmd_hs_wakeup_reason = 0x18064869); +PROVIDE(wlan_check_channel_by_region_table = 0x1806382d); +PROVIDE(z_impl_k_thread_stack_space_get = 0x1005e695); +PROVIDE(net_if_ipv4_get_gw = 0x10051c1d); +PROVIDE(atan = 0x1802c9f1); +PROVIDE(wlan_disconnect = 0x18071159); +PROVIDE(CLOCK_InitAvPll = 0x1805c411); +PROVIDE(net_stop_dhcp_timer = 0x1004d38d); +PROVIDE(llext_copy_regions = 0x1803d49d); +PROVIDE(POWER_SetSleepMode = 0x10067d61); +PROVIDE(SPI_MasterInit = 0x1807549d); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_TXINJECTION_MODE = 0x18047e15); +PROVIDE(__aeabi_ldivmod = 0x18029bb1); +PROVIDE(z_ready_thread = 0x10058b55); +PROVIDE(net_pkt_get_frag = 0x1005634d); +PROVIDE(wlan_get_center_freq_idx = 0x1805ee45); +PROVIDE(wlan_set_11ax_rutxpowerlimit = 0x1807417d); +PROVIDE(k_msgq_init = 0x1004bf9d); +PROVIDE(wifi_nm_get_instance = 0x1804daa9); +PROVIDE(wifi_get_last_cmd_sent_ms = 0x100613f1); +PROVIDE(wlan_send_hostcmd = 0x1807415d); +PROVIDE(__aeabi_dmul = 0x180291ed); +PROVIDE(strtoul = 0x1807bac1); +PROVIDE(imu_wifi_init = 0x1005f8f9); +PROVIDE(net_udp_set_hdr = 0x1005eae1); +PROVIDE(net_ipv4_igmp_leave = 0x1804f88d); +PROVIDE(k_thread_runtime_stats_get = 0x1005e4a1); +PROVIDE(net_port_set_default = 0x1005f051); +PROVIDE(OSA_EventCreate = 0x10045589); +PROVIDE(hex2bin = 0x18030385); +PROVIDE(INPUTMUX_Deinit = 0x18074889); +PROVIDE(socket = 0x1803af55); +PROVIDE(getopt_state_get = 0x1803ac79); +PROVIDE(k_fatal_halt = 0x18078159); +PROVIDE(wlan_11d_parse_domain_info = 0x18060289); +PROVIDE(z_log_msg_runtime_vcreate = 0x180314c1); +PROVIDE(wifi_nm_iface_is_sta = 0x1804dc5d); +PROVIDE(boot_banner = 0x18077f11); +PROVIDE(USB_DeviceNotificationTrigger = 0x18057db1); +PROVIDE(send_wifi_driver_tx_null_data_event = 0x10060a2d); +PROVIDE(close = 0x1803ace1); +PROVIDE(net_ipv6_prepare_for_send = 0x1805153d); +PROVIDE(__aeabi_dcmpun = 0x18029721); PROVIDE(net_buf_clone = 0x10040559); -PROVIDE(wifi_external_coex_pta_cfg = 0x18065b75); -PROVIDE(net_mgmt_add_event_callback = 0x1804f261); -PROVIDE(z_arm_mpu_fault = 0x1803a5dd); -PROVIDE(z_impl_net_if_get_by_index = 0x100556e1); -PROVIDE(z_shell_history_mode_exit = 0x18038fc9); -PROVIDE(nxp_wifi_request = 0x18084cd9); -PROVIDE(mlan_deinit_wakeup_irq = 0x100603a9); -PROVIDE(z_impl_k_uptime_ticks = 0x1808aaa1); -PROVIDE(wifi_csi_cfg = 0x1806581d); -PROVIDE(wifi_dual_ant_duty_cycle = 0x18065b09); -PROVIDE(wlan_prepare_mac_control_cmd = 0x1806acb9); -PROVIDE(__aeabi_dcmple = 0x18029cf5); -PROVIDE(wifi_uap_ps_sta_ageout_timer_getset = 0x1805eef5); -PROVIDE(USART_Deinit = 0x18086485); -PROVIDE(net_icmpv6_input = 0x1805084d); -PROVIDE(__subsf3 = 0x18029e95); -PROVIDE(net_if_ipv4_set_gw = 0x100524d1); -PROVIDE(wifi_prepare_get_hw_spec_cmd = 0x1806ac1d); -PROVIDE(usb_get_dev_data_by_cfg = 0x18033c29); -PROVIDE(wlan_is_started = 0x18074035); -PROVIDE(net_if_ipv6_prefix_set_timer = 0x100538d1); -PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x18059431); -PROVIDE(wlan_11n_update_txbastream_tbl_tx_cnt = 0x10049c91); -PROVIDE(wlan_fill_vht_cap_tlv = 0x1806057d); -PROVIDE(wifi_add_mcast_filter = 0x10060ef1); +PROVIDE(net_mgmt_add_event_callback = 0x1804e59d); +PROVIDE(z_arm_mpu_fault = 0x18039fd9); +PROVIDE(z_impl_net_if_get_by_index = 0x10055495); +PROVIDE(z_shell_history_mode_exit = 0x180389e5); +PROVIDE(mlan_deinit_wakeup_irq = 0x1005ff95); +PROVIDE(z_impl_k_uptime_ticks = 0x18079dcd); +PROVIDE(wlan_prepare_mac_control_cmd = 0x18067c79); +PROVIDE(__aeabi_dcmple = 0x180296e5); +PROVIDE(wifi_uap_ps_sta_ageout_timer_getset = 0x1805dde5); +PROVIDE(USART_Deinit = 0x18075915); +PROVIDE(net_icmpv6_input = 0x1804fb89); +PROVIDE(__subsf3 = 0x18029885); +PROVIDE(net_if_ipv4_set_gw = 0x10052305); +PROVIDE(wifi_prepare_get_hw_spec_cmd = 0x18067bdd); +PROVIDE(usb_get_dev_data_by_cfg = 0x180336fd); +PROVIDE(wlan_is_started = 0x180703ed); +PROVIDE(net_if_ipv6_prefix_set_timer = 0x100536d5); +PROVIDE(z_impl_hwinfo_get_supported_reset_cause = 0x180583fd); +PROVIDE(wlan_11n_update_txbastream_tbl_tx_cnt = 0x10049c09); +PROVIDE(wlan_fill_vht_cap_tlv = 0x1805f39d); +PROVIDE(wifi_add_mcast_filter = 0x10060ab9); PROVIDE(net_buf_alloc_fixed_debug = 0x100400d1); -PROVIDE(getopt_init = 0x1803b0c5); -PROVIDE(wifi_get_uap_turbo_mode = 0x180659f1); -PROVIDE(dns_init_resolver = 0x18057d61); -PROVIDE(z_impl_flash_copy = 0x18039405); -PROVIDE(__cxa_pure_virtual = 0x1802e995); -PROVIDE(wifi_cancel_host_sleep = 0x18072d0d); -PROVIDE(USART_Init = 0x180865ad); -PROVIDE(__gesf2 = 0x1802a0a9); -PROVIDE(z_arm_debug_monitor = 0x1803a5dd); -PROVIDE(wlan_ret_802_11_scan = 0x1806ebf1); -PROVIDE(memc_flexspi_update_clock = 0x1004930d); -PROVIDE(wifi_prepare_get_fw_ver_ext_cmd = 0x1806ac49); -PROVIDE(z_impl_device_init = 0x1808900d); -PROVIDE(net_tcp_send_data = 0x1005b3e1); -PROVIDE(OSA_InterruptDisable = 0x10045945); -PROVIDE(mflash_drv_init = 0x18087b3d); -PROVIDE(wifi_nm_get_type_iface = 0x1804e845); -PROVIDE(net_if_ipv4_get_mcast_ttl = 0x10051e2d); -PROVIDE(load_service = 0x18088431); -PROVIDE(wlan_cmd_append_11ac_tlv = 0x18060679); -PROVIDE(HAL_ImuGetTaskLock = 0x100431dd); -PROVIDE(wifi_uap_downld_domain_params = 0x1805e125); -PROVIDE(wlan_get_chanlist = 0x18076709); -PROVIDE(wifi_get_rf_bandwidth = 0x18063869); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_PS_CONFIG = 0x18049ea5); -PROVIDE(k_mem_slab_runtime_stats_get = 0x10048ecd); -PROVIDE(putchar_unlocked = 0x1808c241); -PROVIDE(zperf_udp_download = 0x10066c6d); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_MODE = 0x1804a105); -PROVIDE(z_impl_k_event_set_masked = 0x1808bbc9); -PROVIDE(wifi_rf_trigger_frame_cfg = 0x18063cb1); -PROVIDE(wlan_ret_802_11_deauthenticate = 0x18071965); -PROVIDE(z_thread_entry = 0x18030479); -PROVIDE(wlan_set_ips = 0x1807996d); -PROVIDE(k_mem_slab_alloc = 0x10048ba1); -PROVIDE(net_tcp_foreach = 0x1005ac09); -PROVIDE(arch_printk_char_out = 0x180303d5); -PROVIDE(wifi_set_curr_bss_channel = 0x18064cbd); -PROVIDE(k_aligned_alloc = 0x100493ed); -PROVIDE(z_shell_wildcard_process = 0x180391f9); -PROVIDE(OSA_EnableIRQGlobal = 0x100454e9); -PROVIDE(wlan_fill_ht_cap_tlv = 0x1004a0e5); -PROVIDE(__unorddf2 = 0x18029d31); -PROVIDE(sys_heap_aligned_alloc = 0x1802f2a9); -PROVIDE(sin = 0x1802d851); -PROVIDE(wifi_uap_set_hidden_ssid = 0x1805eb01); -PROVIDE(wlan_check_11ax_twt_supported = 0x1806084d); -PROVIDE(SPI_SetDummyData = 0x18085f99); -PROVIDE(__wrap_calloc = 0x1803ab95); -PROVIDE(zvfs_eventfd_write = 0x1803c8d9); -PROVIDE(send_wifi_driver_bypass_data_event = 0x10060e2d); -PROVIDE(z_shell_print_prompt_and_cmd = 0x180386ad); -PROVIDE(net_buf_simple_reserve = 0x1803bea9); -PROVIDE(net_buf_simple_headroom = 0x1803c02d); -PROVIDE(net_arp_clear_cache = 0x180494a9); -PROVIDE(FLEXSPI_UpdateLUT = 0x1004507d); -PROVIDE(net_dhcpv4_accept_unicast = 0x18054c3d); -PROVIDE(z_impl_k_sem_give = 0x10059b49); -PROVIDE(wlan_show_devmcssupport = 0x1004a5dd); -PROVIDE(z_impl_k_queue_cancel_wait = 0x10057899); -PROVIDE(wifi_wmm_buf_pool_deinit = 0x1004b3ad); -PROVIDE(wrapper_bssdesc_second_set = 0x1806a941); -PROVIDE(net_wlan_set_mac_address = 0x1004d6d1); -PROVIDE(k_work_delayable_busy_get = 0x10062ec9); -PROVIDE(HAL_RpmsgAllocTxBuffer = 0x100441d5); -PROVIDE(wlan_get_bypass_lock = 0x1004b8f1); -PROVIDE(net_get_if_ip_addr = 0x1004d24d); -PROVIDE(SystemCoreClockUpdate = 0x18085029); -PROVIDE(wifi_get_scan_result = 0x10061859); -PROVIDE(wifi_imu_lock = 0x100606b5); -PROVIDE(net_nbr_unref = 0x18050981); -PROVIDE(wlan_ret_11n_cfg = 0x1004a1f1); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_REG_DOMAIN = 0x1804a0a9); -PROVIDE(z_impl_k_condvar_broadcast = 0x180899f1); -PROVIDE(calc_chksum = 0x1005ef15); -PROVIDE(wlan_send_imu_cmd = 0x10060999); -PROVIDE(bus_register_event_queue = 0x1005fbdd); -PROVIDE(z_impl_k_condvar_wait = 0x18089b75); -PROVIDE(z_impl_k_mutex_unlock = 0x1004c9a9); -PROVIDE(USB_DeviceEhciSend = 0x180871e5); -PROVIDE(zperf_async_work_submit = 0x10063f51); -PROVIDE(net_pkt_alloc_buffer_with_reserve = 0x10055ba9); -PROVIDE(wifi_wmm_get_packet_cnt = 0x100626d5); -PROVIDE(wlan_ralist_del_all_enh = 0x1004baa1); -PROVIDE(__fpclassifyd = 0x1808dd01); -PROVIDE(wlan_twt_information = 0x180787e5); -PROVIDE(net_get_if_ip_mask = 0x1004d25d); -PROVIDE(z_impl_k_msgq_alloc_init = 0x1004c051); -PROVIDE(ipv6_frag_cb = 0x18045871); -PROVIDE(HAL_RpmsgInstallRxCallback = 0x100444c9); -PROVIDE(OSA_MemoryAllocateAlign = 0x10045965); -PROVIDE(wlan_abort_split_scan = 0x1806db11); -PROVIDE(wifi_host_mbo_cfg = 0x18064da9); -PROVIDE(timeutil_timegm = 0x18030b59); -PROVIDE(wifi_register_deliver_packet_above_callback = 0x10061fb5); -PROVIDE(__muldf3 = 0x180297fd); -PROVIDE(wifi_wmm_init = 0x100627dd); -PROVIDE(parse_filter_args_to_params = 0x1804e531); -PROVIDE(wifi_get_data_rate = 0x1806305d); -PROVIDE(pm_policy_next_state = 0x180327b5); -PROVIDE(wlan_11d_support_APIs = 0x18061399); -PROVIDE(wlan_scan = 0x1807589d); -PROVIDE(net_ipv4_parse_hdr_options = 0x10046c85); -PROVIDE(net_if_stats_reset = 0x10054631); -PROVIDE(is_special_region_code = 0x180613f5); -PROVIDE(wifi_send_hs_cfg_cmd = 0x18072b21); -PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x18059409); -PROVIDE(wlan_is_etsi_country = 0x180666f5); -PROVIDE(loader_process_sb_file = 0x180881e5); -PROVIDE(net_context_state = 0x1004f661); -PROVIDE(net_arp_init = 0x1804963d); -PROVIDE(wifi_uap_set_beacon_period = 0x1805eaa9); -PROVIDE(__aeabi_cfrcmple = 0x1802a119); -PROVIDE(z_impl_device_deinit = 0x18088c79); -PROVIDE(wifi_config_bgscan_and_rssi = 0x18069731); -PROVIDE(cbpprintf_external = 0x1802fe39); -PROVIDE(z_impl_log_buffered_cnt = 0x180315c5); +PROVIDE(getopt_init = 0x1803aac1); +PROVIDE(dns_init_resolver = 0x18056d2d); +PROVIDE(z_impl_flash_copy = 0x18038e01); +PROVIDE(__cxa_pure_virtual = 0x1802e4e9); +PROVIDE(wifi_cancel_host_sleep = 0x1806f165); +PROVIDE(USART_Init = 0x18075a3d); +PROVIDE(__gesf2 = 0x18029a99); +PROVIDE(z_arm_debug_monitor = 0x18039fd9); +PROVIDE(wlan_ret_802_11_scan = 0x1806b135); +PROVIDE(memc_flexspi_update_clock = 0x10049285); +PROVIDE(wifi_prepare_get_fw_ver_ext_cmd = 0x18067c09); +PROVIDE(z_impl_device_init = 0x18078405); +PROVIDE(net_tcp_send_data = 0x1005b0d1); +PROVIDE(OSA_InterruptDisable = 0x10045925); +PROVIDE(mflash_drv_init = 0x18076fcd); +PROVIDE(wifi_nm_get_type_iface = 0x1804dbc1); +PROVIDE(net_if_ipv4_get_mcast_ttl = 0x10051c61); +PROVIDE(load_service = 0x180778a5); +PROVIDE(wlan_cmd_append_11ac_tlv = 0x1805f499); +PROVIDE(HAL_ImuGetTaskLock = 0x100431bd); +PROVIDE(wifi_uap_downld_domain_params = 0x1805d055); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_PS_CONFIG = 0x180494a5); +PROVIDE(k_mem_slab_runtime_stats_get = 0x10048e45); +PROVIDE(putchar_unlocked = 0x1807b56d); +PROVIDE(zperf_udp_download = 0x10066685); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_MODE = 0x180496c9); +PROVIDE(z_impl_k_event_set_masked = 0x1807aef5); +PROVIDE(wlan_ret_802_11_deauthenticate = 0x1806de11); +PROVIDE(z_thread_entry = 0x1802ff8d); +PROVIDE(k_mem_slab_alloc = 0x10048b19); +PROVIDE(net_tcp_foreach = 0x1005a8f5); +PROVIDE(arch_printk_char_out = 0x1802fee9); +PROVIDE(wifi_set_curr_bss_channel = 0x18062881); +PROVIDE(k_aligned_alloc = 0x10049365); +PROVIDE(z_shell_wildcard_process = 0x18038c15); +PROVIDE(OSA_EnableIRQGlobal = 0x100454c9); +PROVIDE(wlan_fill_ht_cap_tlv = 0x1004a05d); +PROVIDE(__unorddf2 = 0x18029721); +PROVIDE(sys_heap_aligned_alloc = 0x1802edfd); +PROVIDE(sin = 0x1802d3c1); +PROVIDE(wifi_uap_set_hidden_ssid = 0x1805d9f1); +PROVIDE(wlan_check_11ax_twt_supported = 0x1805f66d); +PROVIDE(SPI_SetDummyData = 0x18075429); +PROVIDE(__wrap_calloc = 0x1803a591); +PROVIDE(zvfs_eventfd_write = 0x1803c2d5); +PROVIDE(send_wifi_driver_bypass_data_event = 0x100609f5); +PROVIDE(z_shell_print_prompt_and_cmd = 0x180380e9); +PROVIDE(net_buf_simple_reserve = 0x1803b8a5); +PROVIDE(net_buf_simple_headroom = 0x1803ba29); +PROVIDE(net_arp_clear_cache = 0x18048ac9); +PROVIDE(FLEXSPI_UpdateLUT = 0x1004505d); +PROVIDE(net_dhcpv4_accept_unicast = 0x18053da9); +PROVIDE(z_impl_k_sem_give = 0x10059879); +PROVIDE(wlan_show_devmcssupport = 0x1004a555); +PROVIDE(z_impl_k_queue_cancel_wait = 0x100575f9); +PROVIDE(wifi_wmm_buf_pool_deinit = 0x1004b325); +PROVIDE(wrapper_bssdesc_second_set = 0x18067901); +PROVIDE(net_wlan_set_mac_address = 0x1004d5ed); +PROVIDE(k_work_delayable_busy_get = 0x10062a51); +PROVIDE(HAL_RpmsgAllocTxBuffer = 0x100441b5); +PROVIDE(wlan_get_bypass_lock = 0x1004b869); +PROVIDE(net_get_if_ip_addr = 0x1004d169); +PROVIDE(SystemCoreClockUpdate = 0x180744b9); +PROVIDE(wifi_get_scan_result = 0x10061401); +PROVIDE(wifi_imu_lock = 0x100602a1); +PROVIDE(net_nbr_unref = 0x1804fcbd); +PROVIDE(wlan_ret_11n_cfg = 0x1004a169); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_REG_DOMAIN = 0x1804966d); +PROVIDE(z_impl_k_condvar_broadcast = 0x18078d2d); +PROVIDE(calc_chksum = 0x1005eb59); +PROVIDE(wlan_send_imu_cmd = 0x10060585); +PROVIDE(bus_register_event_queue = 0x1005f7c9); +PROVIDE(z_impl_k_condvar_wait = 0x18078eb1); +PROVIDE(z_impl_k_mutex_unlock = 0x1004c921); +PROVIDE(USB_DeviceEhciSend = 0x18076675); +PROVIDE(zperf_async_work_submit = 0x10063ad9); +PROVIDE(net_pkt_alloc_buffer_with_reserve = 0x10055961); +PROVIDE(wifi_wmm_get_packet_cnt = 0x1006225d); +PROVIDE(wlan_ralist_del_all_enh = 0x1004ba19); +PROVIDE(__fpclassifyd = 0x1807d02d); +PROVIDE(net_get_if_ip_mask = 0x1004d179); +PROVIDE(z_impl_k_msgq_alloc_init = 0x1004bfc9); +PROVIDE(ipv6_frag_cb = 0x18045029); +PROVIDE(HAL_RpmsgInstallRxCallback = 0x100444a9); +PROVIDE(OSA_MemoryAllocateAlign = 0x10045945); +PROVIDE(wlan_abort_split_scan = 0x1806a0b5); +PROVIDE(wifi_host_mbo_cfg = 0x1806296d); +PROVIDE(timeutil_timegm = 0x1803066d); +PROVIDE(wifi_register_deliver_packet_above_callback = 0x10061b5d); +PROVIDE(__muldf3 = 0x180291ed); +PROVIDE(wifi_wmm_init = 0x10062365); +PROVIDE(parse_filter_args_to_params = 0x1804d8ad); +PROVIDE(wifi_get_data_rate = 0x18061d15); +PROVIDE(pm_policy_next_state = 0x180322a9); +PROVIDE(wlan_11d_support_APIs = 0x180601b9); +PROVIDE(net_ipv4_parse_hdr_options = 0x10046c65); +PROVIDE(net_if_stats_reset = 0x10054415); +PROVIDE(is_special_region_code = 0x18060215); +PROVIDE(wifi_send_hs_cfg_cmd = 0x1806ef79); +PROVIDE(z_impl_hwinfo_get_device_eui64 = 0x180583d5); +PROVIDE(wlan_is_etsi_country = 0x180638f9); +PROVIDE(loader_process_sb_file = 0x18077659); +PROVIDE(net_context_state = 0x1004f511); +PROVIDE(net_arp_init = 0x18048c5d); +PROVIDE(wifi_uap_set_beacon_period = 0x1805d999); +PROVIDE(__aeabi_cfrcmple = 0x18029b09); +PROVIDE(z_impl_device_deinit = 0x180780c5); +PROVIDE(wifi_config_bgscan_and_rssi = 0x180666f1); +PROVIDE(cbpprintf_external = 0x1802f96d); +PROVIDE(z_impl_log_buffered_cnt = 0x180310d9); PROVIDE(net_buf_ref = 0x10040941); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QAV_PARAM = 0x180487d9); -PROVIDE(FLEXSPI_SetFlashConfig = 0x10044aa1); -PROVIDE(net_nbr_ref = 0x18050995); -PROVIDE(wakelock_get = 0x10060e85); -PROVIDE(wlan_cmd_remain_on_channel = 0x18067425); -PROVIDE(wlan_11n_ba_stream_timeout = 0x1004aab5); -PROVIDE(IMU_SendMsgsBlocking = 0x10045349); -PROVIDE(net_if_ipv6_set_mcast_hop_limit = 0x10053ca1); -PROVIDE(SPI_SlaveInit = 0x180861e9); -PROVIDE(net_if_set_link_addr_locked = 0x10054285); -PROVIDE(wifi_subscribe_event_submit = 0x1806b7a5); -PROVIDE(z_shell_cmd_line_erase = 0x18037f1d); -PROVIDE(wifi_set_threshold_snr_low = 0x1806b8b9); -PROVIDE(net_byte_to_hex = 0x1005f03d); -PROVIDE(shell_hexdump_line = 0x18036fdd); -PROVIDE(k_work_submit_to_queue = 0x100639bd); -PROVIDE(_isr_wrapper = 0x1803a969); -PROVIDE(wlan_init_priv = 0x1806bb99); -PROVIDE(wlan_ieeeps_off = 0x18075b05); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QAV_PARAM = 0x18047e15); +PROVIDE(FLEXSPI_SetFlashConfig = 0x10044a81); +PROVIDE(net_nbr_ref = 0x1804fcd1); +PROVIDE(wakelock_get = 0x10060a4d); +PROVIDE(wlan_cmd_remain_on_channel = 0x180645d5); +PROVIDE(wlan_11n_ba_stream_timeout = 0x1004aa2d); +PROVIDE(IMU_SendMsgsBlocking = 0x10045329); +PROVIDE(net_if_ipv6_set_mcast_hop_limit = 0x10053aa5); +PROVIDE(SPI_SlaveInit = 0x18075679); +PROVIDE(net_if_set_link_addr_locked = 0x10054089); +PROVIDE(z_shell_cmd_line_erase = 0x18037959); +PROVIDE(net_byte_to_hex = 0x1005ec81); +PROVIDE(shell_hexdump_line = 0x18036a19); +PROVIDE(k_work_submit_to_queue = 0x10063545); +PROVIDE(_isr_wrapper = 0x1803a365); +PROVIDE(wlan_init_priv = 0x18068169); +PROVIDE(wlan_ieeeps_off = 0x180718d9); PROVIDE(net_buf_alloc_with_data_debug = 0x10040461); -PROVIDE(wifi_get_set_rf_test_tx_frame = 0x18063385); -PROVIDE(net_route_packet = 0x18053815); -PROVIDE(z_impl_k_wakeup = 0x1005896d); -PROVIDE(wlan_set_ed_mac_mode = 0x1807673d); -PROVIDE(__divsi3 = 0x18029455); -PROVIDE(flash_area_open = 0x180329b5); -PROVIDE(net_ipv6_find_last_ext_hdr = 0x10047e65); -PROVIDE(wifi_set_11ax_tx_omi = 0x1806b095); -PROVIDE(net_dhcpv4_restart = 0x18054ba9); -PROVIDE(k_work_queue_start = 0x10063431); -PROVIDE(wifi_wmm_da_to_ra = 0x1004b495); -PROVIDE(z_shell_op_left_arrow = 0x18037ec1); -PROVIDE(net_nbr_get = 0x1805099d); -PROVIDE(net_tcp_update_recv_wnd = 0x1005b4fd); -PROVIDE(wlan_11n_cleanup_reorder_tbl = 0x1004ab01); -PROVIDE(parse_mode_args_to_params = 0x1804e12d); -PROVIDE(INPUTMUX_AttachSignal = 0x180853e9); -PROVIDE(OSA_TimeDelay = 0x10046775); -PROVIDE(net_if_carrier_on = 0x10050d05); -PROVIDE(__aeabi_d2lz = 0x1802a301); -PROVIDE(wlan_set_uap_frag = 0x1807680d); -PROVIDE(wifi_get_log = 0x180643b9); -PROVIDE(k_poll_event_init = 0x1808b4fd); -PROVIDE(z_arm_fatal_error = 0x18039659); -PROVIDE(z_impl_net_socket_service_register = 0x180418b5); -PROVIDE(net_pkt_get_current_offset = 0x100564ed); -PROVIDE(net_pkt_available_payload_buffer = 0x10055e91); -PROVIDE(z_arm_hard_fault = 0x1803a5dd); -PROVIDE(FLEXSPI_TransferHandleIRQ = 0x10044d21); -PROVIDE(wlan_uap_disconnect_sta = 0x18079a41); -PROVIDE(CLOCK_GetFlexCommClkFreq = 0x1805cefd); -PROVIDE(z_impl_llext_get_fn_table = 0x1803edb9); -PROVIDE(z_impl_k_msgq_peek_at = 0x1004c375); -PROVIDE(wifi_wmm_buf_put = 0x1004b43d); -PROVIDE(wlan_enhanced_cli_init = 0x1807b88d); -PROVIDE(wlan_set_regiontable = 0x180662c5); -PROVIDE(net_if_config_ipv4_put = 0x10050e05); -PROVIDE(shell_hexdump = 0x180370f1); -PROVIDE(OSA_DisableScheduler = 0x100454e5); -PROVIDE(set_event_chanswann = 0x18067f29); -PROVIDE(net_if_ipv4_get_netmask_by_addr = 0x10051ec1); -PROVIDE(z_shell_log_backend_output_func = 0x18038845); -PROVIDE(z_pend_curr = 0x10058be5); -PROVIDE(usb_dc_ep_configure = 0x180584ad); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXTIME_PARAM = 0x18048b85); -PROVIDE(I2C_MasterTransferAbort = 0x18085b41); -PROVIDE(wifi_free_eventbuf = 0x180729bd); -PROVIDE(net_pkt_append_buffer = 0x10055e2d); -PROVIDE(wlan_imd3_cfg = 0x18079a29); +PROVIDE(net_route_packet = 0x180529d9); +PROVIDE(z_impl_k_wakeup = 0x100586bd); +PROVIDE(__divsi3 = 0x18028e45); +PROVIDE(flash_area_open = 0x180324a9); +PROVIDE(net_ipv6_find_last_ext_hdr = 0x10047e01); +PROVIDE(net_dhcpv4_restart = 0x18053d35); +PROVIDE(k_work_queue_start = 0x10062fb9); +PROVIDE(wifi_wmm_da_to_ra = 0x1004b40d); +PROVIDE(z_shell_op_left_arrow = 0x180378fd); +PROVIDE(net_nbr_get = 0x1804fcd9); +PROVIDE(net_tcp_update_recv_wnd = 0x1005b1ed); +PROVIDE(wlan_11n_cleanup_reorder_tbl = 0x1004aa79); +PROVIDE(parse_mode_args_to_params = 0x1804d4a9); +PROVIDE(INPUTMUX_AttachSignal = 0x18074879); +PROVIDE(OSA_TimeDelay = 0x10046755); +PROVIDE(net_if_carrier_on = 0x10050b51); +PROVIDE(__aeabi_d2lz = 0x18029cf1); +PROVIDE(wifi_get_log = 0x1806221d); +PROVIDE(k_poll_event_init = 0x1807a829); +PROVIDE(z_arm_fatal_error = 0x18039055); +PROVIDE(z_impl_net_socket_service_register = 0x180411dd); +PROVIDE(net_pkt_get_current_offset = 0x100562a5); +PROVIDE(net_pkt_available_payload_buffer = 0x10055c49); +PROVIDE(z_arm_hard_fault = 0x18039fd9); +PROVIDE(FLEXSPI_TransferHandleIRQ = 0x10044d01); +PROVIDE(wlan_uap_disconnect_sta = 0x18074305); +PROVIDE(CLOCK_GetFlexCommClkFreq = 0x1805be2d); +PROVIDE(z_impl_llext_get_fn_table = 0x1803e799); +PROVIDE(z_impl_k_msgq_peek_at = 0x1004c2ed); +PROVIDE(wifi_wmm_buf_put = 0x1004b3b5); +PROVIDE(wlan_set_regiontable = 0x1806367d); +PROVIDE(net_if_config_ipv4_put = 0x10050c51); +PROVIDE(shell_hexdump = 0x18036b2d); +PROVIDE(OSA_DisableScheduler = 0x100454c5); +PROVIDE(set_event_chanswann = 0x18065039); +PROVIDE(net_if_ipv4_get_netmask_by_addr = 0x10051cf5); +PROVIDE(z_shell_log_backend_output_func = 0x18038261); +PROVIDE(z_pend_curr = 0x10058931); +PROVIDE(usb_dc_ep_configure = 0x18057479); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_TXTIME_PARAM = 0x180481a5); +PROVIDE(I2C_MasterTransferAbort = 0x18074fd1); +PROVIDE(wifi_free_eventbuf = 0x1806ee69); +PROVIDE(net_pkt_append_buffer = 0x10055be5); PROVIDE(net_eth_carrier_on = 0x100420c9); -PROVIDE(imu_put_task_lock = 0x1005fc49); -PROVIDE(k_work_busy_get = 0x1006296d); -PROVIDE(log_output_timestamp_freq_set = 0x180321f5); -PROVIDE(net_if_ipv6_maddr_leave = 0x1005330d); -PROVIDE(fputc = 0x1808e469); -PROVIDE(__fpclassifyl = 0x1808dd01); -PROVIDE(IMU_TrySendMsgs = 0x1004543d); -PROVIDE(cbvprintf = 0x1803a9d5); -PROVIDE(z_impl_k_is_preempt_thread = 0x1005e92d); -PROVIDE(zperf_prepare_upload_sock = 0x100640c1); -PROVIDE(process_csi_info_callback = 0x10060e0d); -PROVIDE(net_if_set_name = 0x100542fd); -PROVIDE(wifi_set_twt_setup_cfg = 0x1806b21d); -PROVIDE(HAL_ImuPutTaskLock = 0x100435c9); -PROVIDE(net_udp_create = 0x1005ec65); -PROVIDE(z_impl_k_queue_peek_tail = 0x10057afd); -PROVIDE(net_nbr_get_lladdr = 0x18050b59); -PROVIDE(wlan_get_rf_per = 0x180785a1); -PROVIDE(wlan_11d_clear_parsedtable = 0x18061a9d); -PROVIDE(OSA_ThreadSelfComplete = 0x10057199); -PROVIDE(parse_channel_args_to_params = 0x1804e351); +PROVIDE(imu_put_task_lock = 0x1005f835); +PROVIDE(k_work_busy_get = 0x100624f5); +PROVIDE(log_output_timestamp_freq_set = 0x18031ce9); +PROVIDE(net_if_ipv6_maddr_leave = 0x1005312d); +PROVIDE(fputc = 0x1807d795); +PROVIDE(__fpclassifyl = 0x1807d02d); +PROVIDE(IMU_TrySendMsgs = 0x1004541d); +PROVIDE(cbvprintf = 0x1803a3d1); +PROVIDE(z_impl_k_is_preempt_thread = 0x1005e581); +PROVIDE(zperf_prepare_upload_sock = 0x10063c49); +PROVIDE(process_csi_info_callback = 0x100609d5); +PROVIDE(net_if_set_name = 0x10054101); +PROVIDE(wifi_set_twt_setup_cfg = 0x18067eed); +PROVIDE(HAL_ImuPutTaskLock = 0x100435a9); +PROVIDE(net_udp_create = 0x1005e8a9); +PROVIDE(z_impl_k_queue_peek_tail = 0x1005785d); +PROVIDE(net_nbr_get_lladdr = 0x1804fe95); +PROVIDE(wlan_11d_clear_parsedtable = 0x180608bd); +PROVIDE(OSA_ThreadSelfComplete = 0x10056ef9); +PROVIDE(parse_channel_args_to_params = 0x1804d6cd); PROVIDE(net_eth_txinjection_mode = 0x100421a1); -PROVIDE(wifi_set_packet_filters = 0x18063131); -PROVIDE(z_impl_k_thread_suspend = 0x10058609); -PROVIDE(net_if_ipv4_maddr_join = 0x100520d9); -PROVIDE(z_impl_k_thread_join = 0x1005832d); -PROVIDE(z_log_dropped = 0x180315d1); -PROVIDE(wifi_sta_ampdu_tx_enable_per_tid = 0x10062421); -PROVIDE(net_pkt_alloc_with_buffer = 0x10055e09); -PROVIDE(net_calc_chksum = 0x1005f0f1); -PROVIDE(jesd216_bfp_decode_dw16 = 0x100488a9); +PROVIDE(wifi_set_packet_filters = 0x18061de9); +PROVIDE(z_impl_k_thread_suspend = 0x10058361); +PROVIDE(net_if_ipv4_maddr_join = 0x10051f0d); +PROVIDE(z_impl_k_thread_join = 0x10058089); +PROVIDE(z_log_dropped = 0x180310e5); +PROVIDE(wifi_sta_ampdu_tx_enable_per_tid = 0x10061fa9); +PROVIDE(net_pkt_alloc_with_buffer = 0x10055bc1); +PROVIDE(net_calc_chksum = 0x1005ed35); +PROVIDE(jesd216_bfp_decode_dw16 = 0x10048821); PROVIDE(net_buf_data_match = 0x100406c9); -PROVIDE(z_impl_sys_rand_get = 0x1803d401); -PROVIDE(_OffsetAbsSyms = 0x1802e75d); -PROVIDE(wlan_set_crypto_AES_WRAP_decrypt = 0x18078b15); -PROVIDE(wlan_set_tsp_cfg = 0x180798f5); -PROVIDE(wlan_set_crypto_RC4_decrypt = 0x18078895); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_AP_ENABLE = 0x18049a9d); -PROVIDE(wifi_check_last_packet_indication = 0x1806ada1); -PROVIDE(OSA_TaskDestroy = 0x10046389); -PROVIDE(wlan_cfg_rf_he_tb_tx = 0x180785e9); -PROVIDE(bus_deregister_event_queue = 0x1005fbb5); -PROVIDE(rpmsg_event_handler = 0x10060515); -PROVIDE(shell_strtoul = 0x18037a6d); -PROVIDE(wlan_get_rf_channel = 0x18078569); -PROVIDE(usb_transfer_is_busy = 0x18033df9); -PROVIDE(HAL_RpmsgSend = 0x100445f5); -PROVIDE(POWER_EnableGDetVSensors = 0x10068829); -PROVIDE(net_ipv4_send_fragmented_pkt = 0x10047229); -PROVIDE(net_icmp_init_ctx = 0x1804fad1); -PROVIDE(OSA_SemaphoreWait = 0x1004611d); -PROVIDE(jesd216_bfp_decode_dw11 = 0x1004875d); -PROVIDE(jesd216_bfp_decode_dw15 = 0x10048849); -PROVIDE(FLEXSPI_TransferBlocking = 0x10044bed); -PROVIDE(wifi_get_value1_from_cmdresp = 0x1806aad5); -PROVIDE(jesd216_bfp_decode_dw14 = 0x100487e9); -PROVIDE(I2C_GetStatusFlags = 0x180855b5); -PROVIDE(cmd_net_stats_iface = 0x18047a4d); -PROVIDE(net_get_if_name = 0x1004d379); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_CONNECT = 0x18049921); -PROVIDE(HAL_ImuCreateTaskLock = 0x10043079); -PROVIDE(net_ipv6_handle_fragment_hdr = 0x10047f7d); -PROVIDE(CLOCK_InitTcpuRefClk = 0x1805d08d); -PROVIDE(wifi_mgmt_raise_connect_result_event = 0x18049a5d); -PROVIDE(isdigit = 0x1808de15); -PROVIDE(net_if_register_link_cb = 0x10054149); -PROVIDE(wifi_set_btwt_cfg = 0x1806b1dd); -PROVIDE(__aeabi_i2d = 0x18029729); -PROVIDE(CLOCK_DisableClock = 0x1805cb3d); -PROVIDE(k_sched_lock = 0x10057bc5); -PROVIDE(wlan_sleep_period = 0x180790b1); -PROVIDE(wifi_get_country_code = 0x10061801); -PROVIDE(dns_resolve_reconfigure = 0x18057c4d); -PROVIDE(__aeabi_memmove8 = 0x1808dd95); -PROVIDE(__aeabi_i2f = 0x1802a001); -PROVIDE(sys_clock_tick_get = 0x1808a9e5); -PROVIDE(power_off_device = 0x18087c65); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_FILTER = 0x180487d9); -PROVIDE(HAL_ImuReceive = 0x10043615); -PROVIDE(OSA_ExitCritical = 0x100458e1); -PROVIDE(net_context_sendto = 0x1004f3b9); +PROVIDE(z_impl_sys_rand_get = 0x1803cdfd); +PROVIDE(_OffsetAbsSyms = 0x1802e2cd); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_AP_ENABLE = 0x180490bd); +PROVIDE(wifi_check_last_packet_indication = 0x18067d61); +PROVIDE(OSA_TaskDestroy = 0x10046369); +PROVIDE(bus_deregister_event_queue = 0x1005f7a1); +PROVIDE(rpmsg_event_handler = 0x10060101); +PROVIDE(shell_strtoul = 0x180374a9); +PROVIDE(usb_transfer_is_busy = 0x180338cd); +PROVIDE(HAL_RpmsgSend = 0x100445d5); +PROVIDE(POWER_EnableGDetVSensors = 0x10068219); +PROVIDE(net_ipv4_send_fragmented_pkt = 0x100471e9); +PROVIDE(net_icmp_init_ctx = 0x1804ee0d); +PROVIDE(OSA_SemaphoreWait = 0x100460fd); +PROVIDE(jesd216_bfp_decode_dw11 = 0x100486d5); +PROVIDE(jesd216_bfp_decode_dw15 = 0x100487c1); +PROVIDE(FLEXSPI_TransferBlocking = 0x10044bcd); +PROVIDE(wifi_get_value1_from_cmdresp = 0x18067a95); +PROVIDE(jesd216_bfp_decode_dw14 = 0x10048761); +PROVIDE(I2C_GetStatusFlags = 0x18074a45); +PROVIDE(cmd_net_stats_iface = 0x18047101); +PROVIDE(net_get_if_name = 0x1004d295); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_CONNECT = 0x18048f41); +PROVIDE(HAL_ImuCreateTaskLock = 0x10043059); +PROVIDE(net_ipv6_handle_fragment_hdr = 0x10047f19); +PROVIDE(CLOCK_InitTcpuRefClk = 0x1805bfbd); +PROVIDE(wifi_mgmt_raise_connect_result_event = 0x1804907d); +PROVIDE(isdigit = 0x1807d141); +PROVIDE(net_if_register_link_cb = 0x10053f4d); +PROVIDE(wifi_set_btwt_cfg = 0x18067ead); +PROVIDE(__aeabi_i2d = 0x18029119); +PROVIDE(CLOCK_DisableClock = 0x1805ba6d); +PROVIDE(k_sched_lock = 0x10057925); +PROVIDE(wifi_get_country_code = 0x100613a9); +PROVIDE(dns_resolve_reconfigure = 0x18056c39); +PROVIDE(__aeabi_memmove8 = 0x1807d0c1); +PROVIDE(__aeabi_i2f = 0x180299f1); +PROVIDE(sys_clock_tick_get = 0x18079d11); +PROVIDE(power_off_device = 0x180770f5); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_MAC_FILTER = 0x18047e15); +PROVIDE(HAL_ImuReceive = 0x100435f5); +PROVIDE(OSA_ExitCritical = 0x100458c1); +PROVIDE(net_context_sendto = 0x1004f269); PROVIDE(net_buf_slist_put = 0x10040a7d); -PROVIDE(wifi_uap_ampdu_tx_disable = 0x100624c9); -PROVIDE(z_impl_zsock_socketpair = 0x18042555); -PROVIDE(sinl = 0x1802d851); -PROVIDE(z_arm_reset = 0x1803a5f1); -PROVIDE(net_nbr_link = 0x18050a05); -PROVIDE(POWER_EnterPowerMode = 0x100686f1); +PROVIDE(wifi_uap_ampdu_tx_disable = 0x10062051); +PROVIDE(z_impl_zsock_socketpair = 0x18041e7d); +PROVIDE(sinl = 0x1802d3c1); +PROVIDE(z_arm_reset = 0x18039fed); +PROVIDE(net_nbr_link = 0x1804fd41); +PROVIDE(POWER_EnterPowerMode = 0x100680e1); PROVIDE(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT = 0x00000001); -PROVIDE(z_shell_has_wildcard = 0x18039181); -PROVIDE(__aeabi_memmove4 = 0x1808dd95); -PROVIDE(z_impl_zsock_setsockopt = 0x1005a435); -PROVIDE(wlan_set_custom_cfp_table = 0x180665c1); -PROVIDE(net_if_ipv4_maddr_lookup = 0x10052139); -PROVIDE(net_if_ipv4_router_rm = 0x100522e1); -PROVIDE(wifi_process_ps_enh_response = 0x18072f05); -PROVIDE(net_mgmt_del_event_callback = 0x1804f2e5); -PROVIDE(putc_unlocked = 0x1808e469); -PROVIDE(wlan_get_region_cfp_table = 0x18065da9); -PROVIDE(shell_set_bypass = 0x180373d5); -PROVIDE(imu_wifi_deinit = 0x1005fc99); -PROVIDE(wlan_update_rxreorder_tbl = 0x1004b225); -PROVIDE(net_ipv4_create_full = 0x100467f9); -PROVIDE(z_impl_device_is_ready = 0x18088c61); -PROVIDE(USB_DeviceEhciIsrFunction = 0x18087721); -PROVIDE(HAL_ImuSendEventDumpAck = 0x10043df9); -PROVIDE(zvfs_get_fd_obj_and_vtable = 0x180305b1); -PROVIDE(set_ecsa_block_tx_flag = 0x1806521d); -PROVIDE(FLEXSPI_UpdateRxSampleClock = 0x100450cd); -PROVIDE(power_off_device_impl = 0x18088191); -PROVIDE(wifi_wmm_buf_pool_init = 0x1004b3d9); -PROVIDE(wlan_wmm_add_buf_txqueue_enh = 0x1004bd15); -PROVIDE(wifi_configure_delay_to_ps = 0x18072ae5); -PROVIDE(wlan_cmd_amsdu_aggr_ctrl = 0x10049d29); -PROVIDE(cbprintf_package_convert = 0x1802fefd); -PROVIDE(wlan_11ac_bandconfig_allowed = 0x18060801); -PROVIDE(net_dhcpv4_state_name = 0x18054a61); -PROVIDE(wlan_cmd_802_11_rf_antenna = 0x1806cf8d); -PROVIDE(wlan_11d_support_is_enabled = 0x18061361); -PROVIDE(wifi_get_delay_to_ps = 0x18072b0d); -PROVIDE(net_pkt_init = 0x10056735); -PROVIDE(setsockopt = 0x1803b549); -PROVIDE(wifi_set_rf_band = 0x180636e9); -PROVIDE(sb3_fw_download_impl = 0x180885f5); -PROVIDE(wlan_set_get_rx_abort_cfg = 0x1807401d); -PROVIDE(wifi_txbuf_available = 0x10062481); -PROVIDE(z_impl_flash_fill = 0x1803934d); -PROVIDE(wifi_set_rf_tx_cont_mode = 0x18063925); -PROVIDE(wifi_print_wakeup_reason = 0x100606d5); -PROVIDE(net_context_accept = 0x1004e1a5); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_PS = 0x18049dbd); -PROVIDE(wifi_utils_validate_chan = 0x1804e995); -PROVIDE(z_impl_zsock_listen = 0x1005a255); -PROVIDE(deliver_packet_above = 0x1004cb79); -PROVIDE(clock_settime = 0x1802a719); -PROVIDE(net_neighbor_remove = 0x18050b9d); -PROVIDE(z_shell_write = 0x18038045); -PROVIDE(fs_open = 0x1803cf81); -PROVIDE(soc_early_init_hook = 0x18031295); -PROVIDE(zsock_getpeername_ctx = 0x18041381); -PROVIDE(__kernel_cos = 0x1802d9b9); -PROVIDE(zperf_tcp_upload_async = 0x10066665); -PROVIDE(z_shell_vt100_color_set = 0x180380ad); -PROVIDE(memc_flexspi_wait_bus_idle = 0x100493d5); -PROVIDE(net_tcp_get_supported_mss = 0x1005af3d); -PROVIDE(HAL_ImuDeinit = 0x10043089); -PROVIDE(wlan_fill_he_cap_tlv = 0x1806089d); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBU_PARAM = 0x180487d9); -PROVIDE(shell_prompt_change = 0x18037145); -PROVIDE(wlan_ralist_del_enh = 0x1004bb29); -PROVIDE(wifi_get_txratecfg = 0x1806816d); -PROVIDE(wlan_get_nonglobal_operclass_by_bw_channel = 0x18065241); -PROVIDE(region_string_2_region_code = 0x1806127d); -PROVIDE(wlan_set_threshold_link_quality = 0x18079005); -PROVIDE(z_impl_k_thread_stack_alloc = 0x1808bbe9); -PROVIDE(wifi_send_cmdbuffer = 0x10060729); +PROVIDE(z_shell_has_wildcard = 0x18038b9d); +PROVIDE(__aeabi_memmove4 = 0x1807d0c1); +PROVIDE(z_impl_zsock_setsockopt = 0x1005a165); +PROVIDE(net_if_ipv4_maddr_lookup = 0x10051f6d); +PROVIDE(net_if_ipv4_router_rm = 0x10052115); +PROVIDE(wifi_process_ps_enh_response = 0x1806f35d); +PROVIDE(net_mgmt_del_event_callback = 0x1804e621); +PROVIDE(putc_unlocked = 0x1807d795); +PROVIDE(wlan_get_region_cfp_table = 0x18063161); +PROVIDE(shell_set_bypass = 0x18036e11); +PROVIDE(imu_wifi_deinit = 0x1005f885); +PROVIDE(wlan_update_rxreorder_tbl = 0x1004b19d); +PROVIDE(net_ipv4_create_full = 0x100467d9); +PROVIDE(z_impl_device_is_ready = 0x180780ad); +PROVIDE(USB_DeviceEhciIsrFunction = 0x18076bb1); +PROVIDE(HAL_ImuSendEventDumpAck = 0x10043dd9); +PROVIDE(zvfs_get_fd_obj_and_vtable = 0x180300c5); +PROVIDE(set_ecsa_block_tx_flag = 0x18062b69); +PROVIDE(FLEXSPI_UpdateRxSampleClock = 0x100450ad); +PROVIDE(power_off_device_impl = 0x18077605); +PROVIDE(wifi_wmm_buf_pool_init = 0x1004b351); +PROVIDE(wlan_wmm_add_buf_txqueue_enh = 0x1004bc8d); +PROVIDE(wifi_configure_delay_to_ps = 0x1806ef3d); +PROVIDE(wlan_cmd_amsdu_aggr_ctrl = 0x10049ca1); +PROVIDE(cbprintf_package_convert = 0x1802fa31); +PROVIDE(wlan_11ac_bandconfig_allowed = 0x1805f621); +PROVIDE(net_dhcpv4_state_name = 0x18053c09); +PROVIDE(wlan_cmd_802_11_rf_antenna = 0x18069531); +PROVIDE(wlan_11d_support_is_enabled = 0x18060181); +PROVIDE(wifi_get_delay_to_ps = 0x1806ef65); +PROVIDE(net_pkt_init = 0x100564ed); +PROVIDE(setsockopt = 0x1803af45); +PROVIDE(sb3_fw_download_impl = 0x18077a69); +PROVIDE(wifi_txbuf_available = 0x10062009); +PROVIDE(z_impl_flash_fill = 0x18038d69); +PROVIDE(wifi_print_wakeup_reason = 0x100602c1); +PROVIDE(net_context_accept = 0x1004e0a5); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_PS = 0x180493dd); +PROVIDE(wifi_utils_validate_chan = 0x1804dd11); +PROVIDE(z_impl_zsock_listen = 0x10059f85); +PROVIDE(deliver_packet_above = 0x1004caf1); +PROVIDE(clock_settime = 0x1802a109); +PROVIDE(net_neighbor_remove = 0x1804fed9); +PROVIDE(z_shell_write = 0x18037a81); +PROVIDE(fs_open = 0x1803c97d); +PROVIDE(soc_early_init_hook = 0x18030da9); +PROVIDE(zsock_getpeername_ctx = 0x18040d09); +PROVIDE(__kernel_cos = 0x1802d529); +PROVIDE(zperf_tcp_upload_async = 0x100660e9); +PROVIDE(z_shell_vt100_color_set = 0x18037ae9); +PROVIDE(memc_flexspi_wait_bus_idle = 0x1004934d); +PROVIDE(net_tcp_get_supported_mss = 0x1005ac29); +PROVIDE(HAL_ImuDeinit = 0x10043069); +PROVIDE(wlan_fill_he_cap_tlv = 0x1805f6bd); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_QBU_PARAM = 0x18047e15); +PROVIDE(shell_prompt_change = 0x18036b81); +PROVIDE(wlan_ralist_del_enh = 0x1004baa1); +PROVIDE(wlan_get_nonglobal_operclass_by_bw_channel = 0x18062b8d); +PROVIDE(region_string_2_region_code = 0x1806009d); +PROVIDE(z_impl_k_thread_stack_alloc = 0x1807af15); +PROVIDE(wifi_send_cmdbuffer = 0x10060315); PROVIDE(net_buf_user_data_copy = 0x10040c21); -PROVIDE(wlan_is_rate_auto = 0x18066129); -PROVIDE(OSA_Init = 0x100458ed); -PROVIDE(net_context_is_timestamping_set = 0x1004ee65); -PROVIDE(net_tcp_tx_sem_get = 0x1005b4f5); -PROVIDE(net_interface_down = 0x1004d3f5); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_T1S_PARAM = 0x180487d9); -PROVIDE(isalnum = 0x1808ddd9); -PROVIDE(z_arm_bus_fault = 0x1803a5dd); -PROVIDE(dns_unpack_answer = 0x18056511); -PROVIDE(wlan_set_rssi_threshold = 0x18075035); -PROVIDE(net_pkt_alloc_buffer_raw = 0x10055b0d); -PROVIDE(wlan_11d_code_2_region = 0x18061321); -PROVIDE(wifi_get_antenna = 0x1806434d); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_PROMISC_MODE = 0x180487d9); -PROVIDE(log_output_process = 0x18031da1); -PROVIDE(pm_device_action_run = 0x18032849); -PROVIDE(net_pkt_update_length = 0x10056b09); -PROVIDE(wlan_11n_update_txbastream_tbl_ampdu_supported = 0x10049c75); -PROVIDE(wlan_cmd_802_11d_domain_info = 0x18060e55); -PROVIDE(memc_flexspi_transfer = 0x10049289); -PROVIDE(k_work_queue_init = 0x100633f9); -PROVIDE(wlan_get_11ax_cfg = 0x18078759); -PROVIDE(z_arm_fault_init = 0x1803a5bd); -PROVIDE(wifi_get_set_bandcfg = 0x18065141); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_PACKET_FILTER = 0x1804a155); -PROVIDE(HAL_ImuAddWlanTxPacket = 0x10042f6d); -PROVIDE(net_buf_simple_max_len = 0x1803c049); -PROVIDE(net_if_ipv6_select_src_addr_hint = 0x10053a81); -PROVIDE(arch_elf_relocate = 0x18039789); -PROVIDE(net_if_ipv6_get_ll_addr = 0x10053089); -PROVIDE(llext_link = 0x1803ec2d); -PROVIDE(z_impl_k_yield = 0x10058a21); -PROVIDE(wlan_misc_gpio_tsf_latch_config = 0x1806d051); -PROVIDE(wrapper_bssdesc_first_set = 0x1806a201); -PROVIDE(z_impl_hwinfo_get_device_id = 0x18059411); -PROVIDE(wlan_uap_set_ecsa_cfg = 0x18078ea5); -PROVIDE(__unordsf2 = 0x1802a195); -PROVIDE(wlan_scan_with_opt = 0x18075775); -PROVIDE(usb_dc_ep_read_wait = 0x18058ab1); -PROVIDE(wlan_process_neighbor_report_response = 0x180625cd); -PROVIDE(wlan_send_mgmt_rm_beacon_report = 0x18061f51); -PROVIDE(net_tcp_listen = 0x1005b095); -PROVIDE(wlan_get_log = 0x1807677d); -PROVIDE(wifi_sta_deauth = 0x1805ebe1); -PROVIDE(wlan_init_adapter = 0x1806bc95); -PROVIDE(net_ipv6_start_dad = 0x180522b9); -PROVIDE(OSA_TimerCreate = 0x100571f1); -PROVIDE(z_impl_flash_get_page_info_by_idx = 0x1805906d); -PROVIDE(__aeabi_memmove = 0x1808dd95); -PROVIDE(wlan_ret_11ax_cfg = 0x18060ba5); -PROVIDE(z_shell_multiline_data_calc = 0x180374e5); -PROVIDE(net_if_dormant_on = 0x10051051); -PROVIDE(nxp_wifi_reset_stats = 0x1805bbcd); -PROVIDE(net_if_post_init = 0x100540d1); -PROVIDE(flexspi_clock_set_freq = 0x10067ee9); -PROVIDE(wlan_tx_ampdu_prot_mode = 0x180790e1); -PROVIDE(wifi_enable_uap_11d_support = 0x18064799); -PROVIDE(wifi_set_threshold_max_fail = 0x1806b905); -PROVIDE(k_work_queue_stop = 0x10063521); -PROVIDE(wlan_misc_ioctl_region = 0x18071f69); -PROVIDE(net_pkt_frag_del = 0x10056425); -PROVIDE(wlan_cmd_rx_mgmt_indication = 0x18070265); -PROVIDE(GPIO_SetPinInterruptConfig = 0x18085285); -PROVIDE(wifi_uap_handle_event_data_pause = 0x180694f9); -PROVIDE(k_thread_foreach_unlocked = 0x1808a3c1); -PROVIDE(net_sprint_ll_addr_buf = 0x1005f515); +PROVIDE(wlan_is_rate_auto = 0x180634e1); +PROVIDE(OSA_Init = 0x100458cd); +PROVIDE(net_context_is_timestamping_set = 0x1004ed3d); +PROVIDE(net_tcp_tx_sem_get = 0x1005b1e5); +PROVIDE(net_interface_down = 0x1004d311); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_T1S_PARAM = 0x18047e15); +PROVIDE(isalnum = 0x1807d105); +PROVIDE(z_arm_bus_fault = 0x18039fd9); +PROVIDE(dns_unpack_answer = 0x180555c5); +PROVIDE(net_pkt_alloc_buffer_raw = 0x100558c1); +PROVIDE(wlan_11d_code_2_region = 0x18060141); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_PROMISC_MODE = 0x18047e15); +PROVIDE(log_output_process = 0x18031895); +PROVIDE(pm_device_action_run = 0x1803233d); +PROVIDE(net_pkt_update_length = 0x100568c1); +PROVIDE(wlan_11n_update_txbastream_tbl_ampdu_supported = 0x10049bed); +PROVIDE(wlan_cmd_802_11d_domain_info = 0x1805fc75); +PROVIDE(memc_flexspi_transfer = 0x10049201); +PROVIDE(k_work_queue_init = 0x10062f81); +PROVIDE(z_arm_fault_init = 0x18039fb9); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_PACKET_FILTER = 0x18049719); +PROVIDE(HAL_ImuAddWlanTxPacket = 0x10042f4d); +PROVIDE(net_buf_simple_max_len = 0x1803ba45); +PROVIDE(net_if_ipv6_select_src_addr_hint = 0x10053885); +PROVIDE(arch_elf_relocate = 0x18039185); +PROVIDE(net_if_ipv6_get_ll_addr = 0x10052ea9); +PROVIDE(llext_link = 0x1803e60d); +PROVIDE(z_impl_k_yield = 0x10058771); +PROVIDE(wlan_misc_gpio_tsf_latch_config = 0x180695f5); +PROVIDE(wrapper_bssdesc_first_set = 0x180671c1); +PROVIDE(z_impl_hwinfo_get_device_id = 0x180583dd); +PROVIDE(__unordsf2 = 0x18029b85); +PROVIDE(wlan_scan_with_opt = 0x180715d9); +PROVIDE(usb_dc_ep_read_wait = 0x18057a7d); +PROVIDE(wlan_process_neighbor_report_response = 0x180613ed); +PROVIDE(wlan_send_mgmt_rm_beacon_report = 0x18060d71); +PROVIDE(net_tcp_listen = 0x1005ad81); +PROVIDE(wlan_get_log = 0x1807243d); +PROVIDE(wifi_sta_deauth = 0x1805dad1); +PROVIDE(wlan_init_adapter = 0x18068265); +PROVIDE(net_ipv6_start_dad = 0x18051521); +PROVIDE(OSA_TimerCreate = 0x10056f51); +PROVIDE(z_impl_flash_get_page_info_by_idx = 0x18058039); +PROVIDE(__aeabi_memmove = 0x1807d0c1); +PROVIDE(wlan_ret_11ax_cfg = 0x1805f9c5); +PROVIDE(z_shell_multiline_data_calc = 0x18036f21); +PROVIDE(net_if_dormant_on = 0x10050e9d); +PROVIDE(nxp_wifi_reset_stats = 0x1805ab6d); +PROVIDE(net_if_post_init = 0x10053ed5); +PROVIDE(flexspi_clock_set_freq = 0x100678d9); +PROVIDE(wifi_enable_uap_11d_support = 0x1806258d); +PROVIDE(k_work_queue_stop = 0x100630a9); +PROVIDE(wlan_misc_ioctl_region = 0x1806e415); +PROVIDE(net_pkt_frag_del = 0x100561dd); +PROVIDE(wlan_cmd_rx_mgmt_indication = 0x1806c711); +PROVIDE(GPIO_SetPinInterruptConfig = 0x18074715); +PROVIDE(wifi_uap_handle_event_data_pause = 0x180664b9); +PROVIDE(k_thread_foreach_unlocked = 0x180796fd); +PROVIDE(net_sprint_ll_addr_buf = 0x1005f135); PROVIDE(net_conn_foreach = 0x10040e39); -PROVIDE(k_thread_user_mode_enter = 0x1005e8b1); -PROVIDE(tolower = 0x1808de81); -PROVIDE(wlan_set_twt_teardown_cfg = 0x180787d5); -PROVIDE(wlan_cmd_wmm_param_config = 0x1004b8b1); -PROVIDE(mlan_subsys_deinit = 0x180679f1); -PROVIDE(wifi_get_set_rf_otp_cal_data = 0x180634b1); -PROVIDE(net_arp_input = 0x180491cd); -PROVIDE(wlan_allocate_adapter = 0x1806bb5d); -PROVIDE(wlan_get_uap_turbo_mode = 0x18079949); -PROVIDE(HAL_ImuReturnAllTxBuf = 0x10043ca1); -PROVIDE(z_impl_sys_csrand_get = 0x1803d52d); -PROVIDE(get_ecsa_block_tx_flag = 0x18065229); -PROVIDE(__double_computePow5 = 0x1808d889); -PROVIDE(wifi_unset_rf_test_mode = 0x18063579); -PROVIDE(k_can_yield = 0x10057b95); -PROVIDE(GPIO_PinEnableInterrupt = 0x180852c5); -PROVIDE(wifi_single_ant_duty_cycle = 0x18065aa9); -PROVIDE(wlan_delete_station_list = 0x1806ccd5); -PROVIDE(cdc_acm_class_handle_req = 0x180344a5); -PROVIDE(wifi_wmm_drop_pause_replaced = 0x1004b511); -PROVIDE(FLEXSPI_UpdateDllValue = 0x10044fc5); -PROVIDE(wifi_get_command_lock = 0x100617c1); -PROVIDE(OSA_EventGet = 0x100456b9); -PROVIDE(wlan_11d_region_2_code = 0x180612c5); -PROVIDE(wlan_cmd_11ax_cmd = 0x18060d2d); -PROVIDE(net_context_is_reuseport_set = 0x1004ee5d); -PROVIDE(wlan_cli_init = 0x18084a95); -PROVIDE(zperf_udp_uploader_init = 0x10067789); -PROVIDE(z_log_get_tag = 0x180316c9); -PROVIDE(OSA_InterruptEnable = 0x10045949); -PROVIDE(net_if_ipv4_maddr_add = 0x10051fd5); -PROVIDE(CLOCK_EnableClock = 0x1805ca7d); -PROVIDE(wlan_cmd_get_tsf = 0x180670bd); -PROVIDE(zperf_udp_upload_async = 0x10067711); -PROVIDE(wlan_start_network = 0x180751f5); -PROVIDE(zperf_tcp_download = 0x10066059); -PROVIDE(rpmsg_rxpkt_handler = 0x1006057d); -PROVIDE(net_buf_simple_add_be16 = 0x1803bf89); -PROVIDE(net_tcp_connect = 0x1005a805); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_AP_CONFIG_PARAM = 0x18049b91); -PROVIDE(net_verdict2str = 0x1005f5a1); -PROVIDE(net_if_ipv4_get_ll = 0x10051e25); -PROVIDE(wlan_xmit_bypass_pkt = 0x10060add); -PROVIDE(wlan_set_11ax_tol_time = 0x18078725); -PROVIDE(B2MWKUP0_DriverIRQHandler = 0x10042f19); -PROVIDE(net_if_get_first_by_type = 0x100513b1); -PROVIDE(zsock_recvmsg_ctx = 0x18040b51); -PROVIDE(atof = 0x1808de99); -PROVIDE(wlan_get_ed_mac_mode = 0x18076755); -PROVIDE(isupper = 0x1808de59); -PROVIDE(z_impl_zsock_ioctl_impl = 0x1005a205); -PROVIDE(wlan_host_11v_bss_trans_query = 0x18076ba5); -PROVIDE(net_context_port_in_use = 0x1004f045); -PROVIDE(z_shell_op_char_insert = 0x180384e1); -PROVIDE(k_thread_state_str = 0x1005e82d); -PROVIDE(CLOCK_GetFRGClock = 0x1805cdb5); -PROVIDE(net_pkt_read_be32 = 0x10056871); -PROVIDE(z_impl_net_addr_pton = 0x1005f93d); -PROVIDE(net_stats_reset = 0x180539ad); -PROVIDE(wifi_set_pmfcfg = 0x180630f9); -PROVIDE(net_context_listen = 0x1004ee6d); -PROVIDE(wifi_put_command_resp_sem = 0x10061f6d); -PROVIDE(sendto = 0x1803b539); -PROVIDE(imu_create_task_lock = 0x1005fbf5); -PROVIDE(wifi_host_11v_bss_trans_query = 0x18064d99); -PROVIDE(move_thread_to_end_of_prio_q = 0x10057e29); -PROVIDE(k_mem_slab_free = 0x10048cd1); -PROVIDE(__udivmoddi4 = 0x1802a32f); -PROVIDE(__aeabi_fcmpge = 0x1802a16d); -PROVIDE(raw_process_pkt_hdrs = 0x10060401); -PROVIDE(z_impl_zsock_shutdown = 0x1005a499); -PROVIDE(send_sleep_confirm_command = 0x18072e61); -PROVIDE(wlan_ret_802_11_scan_ext = 0x1806efb1); -PROVIDE(__ceil_log2pow5 = 0x1808d839); -PROVIDE(net_if_foreach = 0x100511a1); -PROVIDE(getopt = 0x1803b11d); -PROVIDE(wlan_unset_rf_test_mode = 0x18078545); -PROVIDE(z_handle_obj_poll_events = 0x1808b805); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_11K_NEIGHBOR_REQUEST = 0x18049d75); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PORTS_NUM = 0x18048b85); -PROVIDE(z_impl_k_thread_name_copy = 0x1005ea01); -PROVIDE(__wrap_free = 0x1803ab61); -PROVIDE(z_shell_cmd_get = 0x180377a5); -PROVIDE(__udivsi3 = 0x18029431); -PROVIDE(toupper = 0x1808de8d); -PROVIDE(TRNG_GetRandomData = 0x180869b9); -PROVIDE(net_if_ipv4_maddr_rm = 0x1005220d); -PROVIDE(wlan_wmm_default_queue_priorities = 0x1004be89); -PROVIDE(wlan_get_active_channel_list = 0x18066681); -PROVIDE(wifi_uap_prepare_and_send_cmd = 0x1805e37d); -PROVIDE(OSA_RWLockReadUnlock = 0x10057135); -PROVIDE(net_pkt_is_contiguous = 0x10056739); -PROVIDE(__rem_pio2 = 0x1802d459); -PROVIDE(wifi_cau_temperature_enable = 0x1806ba7d); -PROVIDE(wlan_find_ssid_in_list = 0x1806fd75); -PROVIDE(shell_start = 0x1803644d); -PROVIDE(jesd216_bfp_read_support = 0x100489cd); -PROVIDE(llext_read_symbol = 0x1803eafd); -PROVIDE(llext_copy_strings = 0x1803da99); -PROVIDE(wlan_set_rssi_low_threshold = 0x18079845); -PROVIDE(I2C_MasterTransferCreateHandle = 0x180859b1); -PROVIDE(z_shell_find_cmd = 0x18037849); -PROVIDE(wlan_set_scan_channel_gap = 0x18076b1d); -PROVIDE(z_impl___posix_clock_get_base = 0x1803b55d); -PROVIDE(wlan_set_txratecfg = 0x1807669d); -PROVIDE(wifi_sta_ampdu_rx_enable = 0x100623dd); -PROVIDE(wlan_ret_wmm_param_config = 0x1004bce9); -PROVIDE(z_shell_op_cond_next_line = 0x18037c49); +PROVIDE(k_thread_user_mode_enter = 0x1005e539); +PROVIDE(tolower = 0x1807d1ad); +PROVIDE(wlan_set_twt_teardown_cfg = 0x180741ed); +PROVIDE(wlan_cmd_wmm_param_config = 0x1004b829); +PROVIDE(mlan_subsys_deinit = 0x18064b0d); +PROVIDE(net_arp_input = 0x180487ed); +PROVIDE(wlan_allocate_adapter = 0x1806812d); +PROVIDE(HAL_ImuReturnAllTxBuf = 0x10043c81); +PROVIDE(z_impl_sys_csrand_get = 0x1803cf29); +PROVIDE(get_ecsa_block_tx_flag = 0x18062b75); +PROVIDE(__double_computePow5 = 0x1807cbb5); +PROVIDE(k_can_yield = 0x100578f5); +PROVIDE(GPIO_PinEnableInterrupt = 0x18074755); +PROVIDE(wlan_delete_station_list = 0x18069279); +PROVIDE(cdc_acm_class_handle_req = 0x18033f79); +PROVIDE(wifi_wmm_drop_pause_replaced = 0x1004b489); +PROVIDE(FLEXSPI_UpdateDllValue = 0x10044fa5); +PROVIDE(wifi_get_command_lock = 0x10061369); +PROVIDE(OSA_EventGet = 0x10045699); +PROVIDE(wlan_11d_region_2_code = 0x180600e5); +PROVIDE(wlan_cmd_11ax_cmd = 0x1805fb4d); +PROVIDE(net_context_is_reuseport_set = 0x1004ed35); +PROVIDE(zperf_udp_uploader_init = 0x1006717d); +PROVIDE(z_log_get_tag = 0x180311dd); +PROVIDE(OSA_InterruptEnable = 0x10045929); +PROVIDE(net_if_ipv4_maddr_add = 0x10051e09); +PROVIDE(CLOCK_EnableClock = 0x1805b9ad); +PROVIDE(wlan_cmd_get_tsf = 0x1806426d); +PROVIDE(zperf_udp_upload_async = 0x10067105); +PROVIDE(wlan_start_network = 0x180712b1); +PROVIDE(zperf_tcp_download = 0x10065af9); +PROVIDE(rpmsg_rxpkt_handler = 0x10060169); +PROVIDE(net_buf_simple_add_be16 = 0x1803b985); +PROVIDE(net_tcp_connect = 0x1005a519); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_AP_CONFIG_PARAM = 0x180491b1); +PROVIDE(net_verdict2str = 0x1005f1c1); +PROVIDE(net_if_ipv4_get_ll = 0x10051c59); +PROVIDE(wlan_xmit_bypass_pkt = 0x100606a9); +PROVIDE(B2MWKUP0_DriverIRQHandler = 0x10042ef9); +PROVIDE(net_if_get_first_by_type = 0x100511fd); +PROVIDE(zsock_recvmsg_ctx = 0x180404d9); +PROVIDE(atof = 0x1807d1c5); +PROVIDE(isupper = 0x1807d185); +PROVIDE(z_impl_zsock_ioctl_impl = 0x10059f35); +PROVIDE(wlan_host_11v_bss_trans_query = 0x18072815); +PROVIDE(net_context_port_in_use = 0x1004ef1d); +PROVIDE(z_shell_op_char_insert = 0x18037f1d); +PROVIDE(k_thread_state_str = 0x1005e4b5); +PROVIDE(CLOCK_GetFRGClock = 0x1805bce5); +PROVIDE(net_pkt_read_be32 = 0x10056629); +PROVIDE(z_impl_net_addr_pton = 0x1005f529); +PROVIDE(net_stats_reset = 0x18052b71); +PROVIDE(wifi_set_pmfcfg = 0x18061db1); +PROVIDE(net_context_listen = 0x1004ed45); +PROVIDE(wifi_put_command_resp_sem = 0x10061b15); +PROVIDE(sendto = 0x1803af35); +PROVIDE(imu_create_task_lock = 0x1005f7e1); +PROVIDE(wifi_host_11v_bss_trans_query = 0x1806295d); +PROVIDE(move_thread_to_end_of_prio_q = 0x10057b85); +PROVIDE(k_mem_slab_free = 0x10048c49); +PROVIDE(__udivmoddi4 = 0x18029d1f); +PROVIDE(__aeabi_fcmpge = 0x18029b5d); +PROVIDE(raw_process_pkt_hdrs = 0x1005ffed); +PROVIDE(z_impl_zsock_shutdown = 0x1005a1c9); +PROVIDE(send_sleep_confirm_command = 0x1806f2b9); +PROVIDE(wlan_ret_802_11_scan_ext = 0x1806b4ed); +PROVIDE(__ceil_log2pow5 = 0x1807cb65); +PROVIDE(net_if_foreach = 0x10050fed); +PROVIDE(getopt = 0x1803ab19); +PROVIDE(z_handle_obj_poll_events = 0x1807ab31); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_11K_NEIGHBOR_REQUEST = 0x18049395); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PORTS_NUM = 0x180481a5); +PROVIDE(z_impl_k_thread_name_copy = 0x1005e655); +PROVIDE(__wrap_free = 0x1803a55d); +PROVIDE(z_shell_cmd_get = 0x180371e1); +PROVIDE(__udivsi3 = 0x18028e21); +PROVIDE(toupper = 0x1807d1b9); +PROVIDE(TRNG_GetRandomData = 0x18075e49); +PROVIDE(net_if_ipv4_maddr_rm = 0x10052041); +PROVIDE(wlan_wmm_default_queue_priorities = 0x1004be01); +PROVIDE(wlan_get_active_channel_list = 0x18063885); +PROVIDE(wifi_uap_prepare_and_send_cmd = 0x1805d295); +PROVIDE(OSA_RWLockReadUnlock = 0x10056e95); +PROVIDE(net_pkt_is_contiguous = 0x100564f1); +PROVIDE(__rem_pio2 = 0x1802cfc9); +PROVIDE(wifi_cau_temperature_enable = 0x1806804d); +PROVIDE(wlan_find_ssid_in_list = 0x1806c2ad); +PROVIDE(shell_start = 0x18035ea1); +PROVIDE(jesd216_bfp_read_support = 0x10048945); +PROVIDE(llext_read_symbol = 0x1803e4dd); +PROVIDE(llext_copy_strings = 0x1803d479); +PROVIDE(I2C_MasterTransferCreateHandle = 0x18074e41); +PROVIDE(z_shell_find_cmd = 0x18037285); +PROVIDE(z_impl___posix_clock_get_base = 0x1803af59); +PROVIDE(wifi_sta_ampdu_rx_enable = 0x10061f65); +PROVIDE(wlan_ret_wmm_param_config = 0x1004bc61); +PROVIDE(z_shell_op_cond_next_line = 0x18037685); PROVIDE(CONFIG_ARCH_HAS_TIMING_FUNCTIONS = 0x00000001); -PROVIDE(wlan_set_rf_tx_frame = 0x18078629); -PROVIDE(z_shell_op_char_backspace = 0x18038609); -PROVIDE(__subdf3 = 0x1802948d); -PROVIDE(z_impl_zsock_fcntl_impl = 0x1005a075); -PROVIDE(atoi = 0x1808de9f); -PROVIDE(dns_dispatcher_svc_handler = 0x18056781); -PROVIDE(net_try_send_data = 0x1004f90d); -PROVIDE(FLEXSPI_Deinit = 0x10044761); -PROVIDE(__ledf2 = 0x18029c29); -PROVIDE(wifi_set_rx_mgmt_indication = 0x180650ed); -PROVIDE(wlan_band_to_radio_type = 0x1806cadd); -PROVIDE(k_work_cancel_delayable = 0x10062ad9); -PROVIDE(floorl = 0x1808db1d); -PROVIDE(wifi_remove_all_mcast_filter = 0x100620e9); -PROVIDE(wlan_process_radio_measurement_request = 0x18062405); -PROVIDE(wlan_uap_get_pmfcfg = 0x180767a5); -PROVIDE(wrapper_moal_mfree = 0x180729f5); -PROVIDE(IMU_Deinit = 0x100451e1); -PROVIDE(net_if_config_ipv6_get = 0x10050eb1); -PROVIDE(wlan_set_crypto_AES_CCMP_decrypt = 0x18078c71); -PROVIDE(wlan_is_wmm_uapsd_enabled = 0x180790d1); -PROVIDE(__adddf3 = 0x18029491); -PROVIDE(accept = 0x1803b4f1); -PROVIDE(zperf_session_reset = 0x100644ad); -PROVIDE(net_proto2str = 0x1005f47d); -PROVIDE(arch_float_disable = 0x1803a86d); -PROVIDE(net_if_ipv4_maddr_leave = 0x10052109); -PROVIDE(dns_dispatcher_init = 0x18056a41); -PROVIDE(wifi_mfp_txt = 0x180497d9); -PROVIDE(__divdf3 = 0x18029a51); -PROVIDE(net_if_ipv6_start_dad = 0x10053ce1); -PROVIDE(wifi_set_key = 0x18064251); -PROVIDE(__aeabi_idiv = 0x18029455); -PROVIDE(wlan_process_mgmt_wnm_btm_req = 0x1806283d); -PROVIDE(wifi_exit_ieee_power_save = 0x18072da1); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBV_PARAM = 0x18048b85); -PROVIDE(wifi_get_ed_mac_mode = 0x18064ed1); -PROVIDE(memchr = 0x1808dd79); -PROVIDE(ceill = 0x1808da65); -PROVIDE(wlan_send_addba = 0x1004a209); -PROVIDE(wlan_init_fw = 0x1806bf89); -PROVIDE(net_context_foreach = 0x1004e959); -PROVIDE(zvfs_close = 0x18030735); -PROVIDE(wlan_ops_sta_ioctl = 0x18071fe9); -PROVIDE(wlan_cmd_tx_rate_cfg = 0x18066df1); -PROVIDE(net_pkt_pull = 0x10056765); -PROVIDE(wrapper_wlan_cmd_11n_ba_stream_timeout = 0x18067a75); -PROVIDE(wifi_enter_ieee_power_save = 0x18072d61); -PROVIDE(__aeabi_dcmplt = 0x18029ce1); -PROVIDE(net_ipv4_finalize = 0x100468bd); -PROVIDE(wifi_get_wpa_ie_in_assoc = 0x1006196d); -PROVIDE(wrapper_wlan_sta_ampdu_enable = 0x18067bc1); -PROVIDE(z_impl_zsock_sendto = 0x1005a3cd); -PROVIDE(z_impl_k_event_clear = 0x1808bbcd); -PROVIDE(net_bytes_from_str = 0x1005f085); -PROVIDE(s_OSA_TaskCallback = 0x100467bd); -PROVIDE(zvfs_poll_internal = 0x1803c959); -PROVIDE(wifi_wmm_buf_get = 0x1004b345); -PROVIDE(usb_dc_set_address = 0x180583ed); -PROVIDE(wlan_wmm_tx_stats_dump = 0x18078659); -PROVIDE(wifi_get_active_channel_list = 0x18064a8d); -PROVIDE(net_if_ipv6_prefix_get = 0x10053629); -PROVIDE(OSA_TaskGetPriority = 0x100464dd); -PROVIDE(wlan_cmd_802_11_scan_ext = 0x1806ef7d); -PROVIDE(wifi_nm_register_mgd_type_iface = 0x1804e8f9); -PROVIDE(wifi_set_xfer_pending = 0x100623c5); -PROVIDE(zsock_close_ctx = 0x18040105); -PROVIDE(net_pkt_alloc_on_iface = 0x10055de1); -PROVIDE(HAL_ImuAddWlanTxPacketExt = 0x10042fed); -PROVIDE(handle_deliver_packet_above = 0x1004cfd5); -PROVIDE(net_if_ipv6_maddr_foreach = 0x10053279); -PROVIDE(handle_amsdu_data_packet = 0x1004cda1); -PROVIDE(z_thread_abort = 0x100592dd); -PROVIDE(k_free = 0x1004952d); -PROVIDE(net_ipv6_mld_send_single = 0x1802be71); -PROVIDE(__kernel_tan = 0x1802e361); -PROVIDE(wlan_11n_cfg_ioctl = 0x100496b1); -PROVIDE(usb_transfer = 0x18033ec1); -PROVIDE(net_if_start_rs = 0x10054551); -PROVIDE(z_unpend1_no_timeout = 0x10059905); -PROVIDE(wrapper_wlan_cmd_11n_delba_rspgen = 0x18067a9d); -PROVIDE(z_impl_k_usleep = 0x100588fd); -PROVIDE(wlan_set_crypto_AES_ECB_decrypt = 0x180789d5); +PROVIDE(z_shell_op_char_backspace = 0x18038045); +PROVIDE(__subdf3 = 0x18028e7d); +PROVIDE(z_impl_zsock_fcntl_impl = 0x10059da5); +PROVIDE(atoi = 0x1807d1cb); +PROVIDE(dns_dispatcher_svc_handler = 0x18055835); +PROVIDE(net_try_send_data = 0x1004f7bd); +PROVIDE(FLEXSPI_Deinit = 0x10044741); +PROVIDE(__ledf2 = 0x18029619); +PROVIDE(wifi_set_rx_mgmt_indication = 0x18062ac5); +PROVIDE(wlan_band_to_radio_type = 0x18069081); +PROVIDE(k_work_cancel_delayable = 0x10062661); +PROVIDE(floorl = 0x1807ce49); +PROVIDE(wifi_remove_all_mcast_filter = 0x10061c91); +PROVIDE(wlan_process_radio_measurement_request = 0x18061225); +PROVIDE(wrapper_moal_mfree = 0x1806eea1); +PROVIDE(IMU_Deinit = 0x100451c1); +PROVIDE(net_if_config_ipv6_get = 0x10050cfd); +PROVIDE(wlan_is_wmm_uapsd_enabled = 0x18074261); +PROVIDE(__adddf3 = 0x18028e81); +PROVIDE(accept = 0x1803aeed); +PROVIDE(zperf_session_reset = 0x10064015); +PROVIDE(net_proto2str = 0x1005f09d); +PROVIDE(arch_float_disable = 0x1803a269); +PROVIDE(net_if_ipv4_maddr_leave = 0x10051f3d); +PROVIDE(dns_dispatcher_init = 0x18055ad5); +PROVIDE(wifi_mfp_txt = 0x18048df9); +PROVIDE(__divdf3 = 0x18029441); +PROVIDE(net_if_ipv6_start_dad = 0x10053ae5); +PROVIDE(wifi_set_key = 0x18062159); +PROVIDE(__aeabi_idiv = 0x18028e45); +PROVIDE(wlan_process_mgmt_wnm_btm_req = 0x1806165d); +PROVIDE(wifi_exit_ieee_power_save = 0x1806f1f9); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_QBV_PARAM = 0x180481a5); +PROVIDE(memchr = 0x1807d0a5); +PROVIDE(ceill = 0x1807cd91); +PROVIDE(wlan_send_addba = 0x1004a181); +PROVIDE(wlan_init_fw = 0x18068559); +PROVIDE(net_context_foreach = 0x1004e835); +PROVIDE(zvfs_close = 0x18030249); +PROVIDE(wlan_ops_sta_ioctl = 0x1806e495); +PROVIDE(wlan_cmd_tx_rate_cfg = 0x18063fa1); +PROVIDE(net_pkt_pull = 0x1005651d); +PROVIDE(wrapper_wlan_cmd_11n_ba_stream_timeout = 0x18064b91); +PROVIDE(wifi_enter_ieee_power_save = 0x1806f1b9); +PROVIDE(__aeabi_dcmplt = 0x180296d1); +PROVIDE(net_ipv4_finalize = 0x1004689d); +PROVIDE(wifi_get_wpa_ie_in_assoc = 0x10061515); +PROVIDE(wrapper_wlan_sta_ampdu_enable = 0x18064cdd); +PROVIDE(z_impl_zsock_sendto = 0x1005a0fd); +PROVIDE(z_impl_k_event_clear = 0x1807aef9); +PROVIDE(net_bytes_from_str = 0x1005ecc9); +PROVIDE(s_OSA_TaskCallback = 0x1004679d); +PROVIDE(zvfs_poll_internal = 0x1803c355); +PROVIDE(wifi_wmm_buf_get = 0x1004b2bd); +PROVIDE(usb_dc_set_address = 0x180573b9); +PROVIDE(wifi_get_active_channel_list = 0x18062745); +PROVIDE(net_if_ipv6_prefix_get = 0x10053435); +PROVIDE(OSA_TaskGetPriority = 0x100464bd); +PROVIDE(wlan_cmd_802_11_scan_ext = 0x1806b4b9); +PROVIDE(wifi_nm_register_mgd_type_iface = 0x1804dc75); +PROVIDE(wifi_set_xfer_pending = 0x10061f4d); +PROVIDE(zsock_close_ctx = 0x1803fa8d); +PROVIDE(net_pkt_alloc_on_iface = 0x10055b99); +PROVIDE(HAL_ImuAddWlanTxPacketExt = 0x10042fcd); +PROVIDE(handle_deliver_packet_above = 0x1004cf4d); +PROVIDE(net_if_ipv6_maddr_foreach = 0x10053099); +PROVIDE(handle_amsdu_data_packet = 0x1004cd19); +PROVIDE(z_thread_abort = 0x10059019); +PROVIDE(k_free = 0x100494a5); +PROVIDE(net_ipv6_mld_send_single = 0x1802b819); +PROVIDE(__kernel_tan = 0x1802ded1); +PROVIDE(wlan_11n_cfg_ioctl = 0x10049629); +PROVIDE(usb_transfer = 0x18033995); +PROVIDE(net_if_start_rs = 0x10054335); +PROVIDE(z_unpend1_no_timeout = 0x10059635); +PROVIDE(wrapper_wlan_cmd_11n_delba_rspgen = 0x18064bb9); +PROVIDE(z_impl_k_usleep = 0x1005864d); PROVIDE(net_conn_input = 0x10040ec1); -PROVIDE(wlan_get_supported_rates = 0x18066185); -PROVIDE(k_queue_append_list = 0x10057379); -PROVIDE(wifi_get_pmfcfg = 0x18063111); -PROVIDE(net_route_init = 0x1805399d); -PROVIDE(__aeabi_dcmpgt = 0x18029d1d); -PROVIDE(dns_copy_qname = 0x180566e1); -PROVIDE(net_configure_address = 0x1004d125); -PROVIDE(z_impl_k_stack_push = 0x1808976d); -PROVIDE(wifi_get_rf_radio_mode = 0x1806369d); -PROVIDE(I2C_MasterInit = 0x18085905); -PROVIDE(k_work_reschedule = 0x10063741); -PROVIDE(__log10Pow5 = 0x1808d821); -PROVIDE(OSA_TimerIsRunning = 0x1005729d); -PROVIDE(z_getopt_global_state_update = 0x1803b245); -PROVIDE(arch_new_thread = 0x1803a81d); -PROVIDE(wifi_uap_pmf_getset = 0x1805efdd); -PROVIDE(puts = 0x1808c24d); -PROVIDE(net_if_get_binding = 0x1004d3d9); -PROVIDE(z_impl_zsock_recvfrom = 0x1005a2ad); -PROVIDE(z_add_timeout = 0x1808a549); -PROVIDE(z_impl_flash_get_page_info_by_offs = 0x18059065); -PROVIDE(z_impl_k_float_disable = 0x18089665); -PROVIDE(z_impl_k_pipe_read = 0x18089d19); -PROVIDE(k_work_schedule = 0x10063871); -PROVIDE(net_tcp_get_option = 0x1005ae8d); -PROVIDE(wifi_bypass_txq_deinit = 0x1004b2a9); -PROVIDE(net_ipv4_prepare_for_send_fragment = 0x10047161); -PROVIDE(wrapper_wlan_cmd_11n_cfg = 0x18067efd); -PROVIDE(net_route_packet_if = 0x18053921); -PROVIDE(wlan_send_mgmt_bss_trans_query = 0x18062b19); -PROVIDE(z_impl_z_zsock_getaddrinfo_internal = 0x1803f599); -PROVIDE(wlan_11n_get_sta_peer_amsdu = 0x10049bdd); -PROVIDE(wlan_get_connection_state = 0x180758d1); -PROVIDE(net_if_ipv6_router_update_lifetime = 0x10053a31); -PROVIDE(__log10Pow2 = 0x1808d815); -PROVIDE(net_dhcpv4_server_init = 0x18056451); -PROVIDE(pm_state_cpu_get_all = 0x18032691); -PROVIDE(dns_resolve_name = 0x18057c31); -PROVIDE(wlan_get_current_uap_network_ssid = 0x18074fcd); -PROVIDE(print_txpwrlimit = 0x1807b561); -PROVIDE(k_thread_system_pool_assign = 0x10049611); -PROVIDE(shell_fprintf_error = 0x18036fbd); -PROVIDE(ldexp = 0x1808dc45); -PROVIDE(strerror = 0x1808df3f); -PROVIDE(net_route_del_by_nexthop = 0x180532b5); -PROVIDE(GPIO_PortInit = 0x18085259); -PROVIDE(net_if_is_offloaded = 0x10053e4d); -PROVIDE(wifi_mgmt_raise_ap_sta_connected_event = 0x1804a361); -PROVIDE(IMU_SendMsgPtrBlocking = 0x10045301); -PROVIDE(net_socket_service_foreach = 0x18041865); -PROVIDE(wlan_ret_gpio_tsf_latch = 0x180675b1); -PROVIDE(isspace = 0x1808de45); -PROVIDE(wlan_add_ext_capa_info_ie = 0x1806cd89); -PROVIDE(net_ipv6_start_rs = 0x180526c5); -PROVIDE(z_impl_k_condvar_signal = 0x1802c811); -PROVIDE(OSA_TaskGetCurrentHandle = 0x10046419); -PROVIDE(net_if_call_link_cb = 0x10050c71); -PROVIDE(wifi_get_device_firmware_version_ext = 0x1006065d); -PROVIDE(__floatsidf = 0x18029729); -PROVIDE(z_init_thread_base = 0x1005ea6d); -PROVIDE(net_if_ipv4_get_global_addr = 0x10051de1); -PROVIDE(wlan_ops_uap_ioctl = 0x1805f1d1); -PROVIDE(z_impl_k_msgq_peek = 0x1004c2d1); -PROVIDE(wifi_wmm_drop_pause_drop = 0x1004b4f1); -PROVIDE(OSA_TimerDestroy = 0x10057271); -PROVIDE(nxp_wifi_get_power_save = 0x1805ba21); -PROVIDE(z_impl_flash_get_page_count = 0x18059079); -PROVIDE(wlan_rrm_request_scan = 0x180769f1); -PROVIDE(wlan_get_uap_connection_state = 0x18075951); -PROVIDE(net_buf_simple_pull_mem = 0x1803bff1); -PROVIDE(wifi_send_add_wpa_psk = 0x180644e5); -PROVIDE(z_impl_net_addr_ntop = 0x1005f6d5); -PROVIDE(__math_uflow = 0x1802d961); -PROVIDE(shell_fprintf_normal = 0x18036f39); -PROVIDE(net_if_ipv6_addr_lookup_by_iface = 0x100529a5); -PROVIDE(net_if_mcast_mon_unregister = 0x10053f9d); -PROVIDE(z_sched_wait = 0x10059041); -PROVIDE(get_mac = 0x18084f15); -PROVIDE(wlan_11ax_ioctl_cmd = 0x18060aa9); -PROVIDE(frexpl = 0x1808dbc5); -PROVIDE(wifi_destroy_wifidriver_tasks = 0x1006133d); -PROVIDE(wlan_ret_802_11_associate = 0x1806c8d5); -PROVIDE(z_reschedule_irqlock = 0x10058fc9); -PROVIDE(wifi_set_tx_status = 0x100623b9); -PROVIDE(net_tcp_queue = 0x1005b191); -PROVIDE(net_pkt_alloc = 0x10055a7d); -PROVIDE(OSA_TimerChange = 0x100571e1); -PROVIDE(z_move_thread_to_end_of_prio_q = 0x10058b55); -PROVIDE(wlan_get_rf_radio_mode = 0x18078575); -PROVIDE(wlan_cmd_11n_delba = 0x1004b095); -PROVIDE(FLEXSPI_Init = 0x10044815); -PROVIDE(OSA_MsgQDestroy = 0x10045a69); -PROVIDE(OSA_SemaphoreGetCount = 0x1004604d); -PROVIDE(atol = 0x1808dea7); -PROVIDE(wifi_get_ipv4_multicast_mac = 0x10061815); -PROVIDE(net_tcp_state_str = 0x1005b4ad); -PROVIDE(z_impl_k_busy_wait = 0x18088ad1); -PROVIDE(wlan_mef_set_auto_ping = 0x180793c5); -PROVIDE(llext_fs_read = 0x1803eee9); -PROVIDE(usb_get_dev_data_by_iface = 0x18033c41); -PROVIDE(net_context_create_ipv6_new = 0x1004e8c5); -PROVIDE(wlan_get_current_network_bssid = 0x18074f45); -PROVIDE(wifi_get_rf_tx_antenna = 0x18063a15); -PROVIDE(net_context_update_recv_wnd = 0x1004f709); -PROVIDE(wlan_set_uap_max_clients = 0x18076649); -PROVIDE(OSA_RWLockCreate = 0x10057045); -PROVIDE(k_thread_runtime_stats_all_get = 0x1005e801); -PROVIDE(wlan_cmd_11n_cfg = 0x10049d09); -PROVIDE(zperf_session_init = 0x10064499); -PROVIDE(__aeabi_read_tp = 0x1808e495); -PROVIDE(dns_resolve_cancel_with_name = 0x180573bd); -PROVIDE(wlan_get_scan_result = 0x18075601); -PROVIDE(usb_dc_ep_set_stall = 0x1805863d); -PROVIDE(net_rx_priority2tc = 0x10056dd1); -PROVIDE(wlan_uap_set_sta_ageout_timer = 0x18079a61); -PROVIDE(net_if_ipv6_router_rm = 0x10053a2d); -PROVIDE(zperf_get_sin = 0x10064051); -PROVIDE(__dtox_engine = 0x1808e327); -PROVIDE(FLEXSPI_TransferNonBlocking = 0x10044f15); -PROVIDE(memc_flexspi_reset = 0x10049179); -PROVIDE(k_heap_alloc = 0x1808945d); -PROVIDE(z_impl_zephyr_fputc = 0x1803aa29); -PROVIDE(gmtime_r = 0x1808c0d5); -PROVIDE(wlan_scan_networks = 0x1806e185); -PROVIDE(net_if_ipv4_set_ttl = 0x1005261d); -PROVIDE(wifi_configure_null_pkt_interval = 0x18072a99); -PROVIDE(fs_tell = 0x1803d23d); -PROVIDE(wifi_set_txrx_histogram = 0x1806aec9); -PROVIDE(putc = 0x1808e469); -PROVIDE(wlan_get_ps_mode_cfg = 0x1807592d); -PROVIDE(is_isr_context = 0x10057181); -PROVIDE(llext_fs_seek = 0x1803ef19); -PROVIDE(sprintf = 0x1808c2e5); -PROVIDE(z_device_get_all_static = 0x18088c41); -PROVIDE(wifi_uap_ampdu_rx_disable = 0x10062491); -PROVIDE(sys_clock_tick_get_32 = 0x1808aa99); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PRIORITY_QUEUES_NUM = 0x18048b85); -PROVIDE(wifi_send_scan_query = 0x18064f2d); -PROVIDE(z_impl_k_poll_signal_reset = 0x1808b8c5); -PROVIDE(z_impl_k_thread_resume = 0x10058561); -PROVIDE(k_work_cancel_delayable_sync = 0x10062ba9); -PROVIDE(arch_float_enable = 0x1803a8b5); -PROVIDE(net_route_add = 0x18053479); -PROVIDE(z_arm_nmi = 0x1803970d); -PROVIDE(k_work_init_delayable = 0x10063265); -PROVIDE(net_interface_up = 0x1004d3fd); -PROVIDE(wifi_get_ipv6_multicast_mac = 0x10061839); -PROVIDE(net_tc_rx_init = 0x10056de1); -PROVIDE(CLOCK_EnableUsbhsPhyClock = 0x1805d5dd); -PROVIDE(wifi_auto_null_tx = 0x18065c79); -PROVIDE(net_if_get_wifi_sta = 0x10051599); -PROVIDE(OSTIMER_Init = 0x18085bc5); -PROVIDE(net_if_ipv4_addr_mask_cmp = 0x10051c69); -PROVIDE(net_pkt_get_reserve_data = 0x10056609); -PROVIDE(__log2pow5 = 0x1808d82d); -PROVIDE(POWER_PowerOnWlan = 0x1805da55); -PROVIDE(zperf_udp_download_stop = 0x10067049); -PROVIDE(wlan_mef_set_multicast = 0x18079669); -PROVIDE(wlan_initialize_uap_network = 0x180746e9); -PROVIDE(log_source_name_get = 0x180316cd); -PROVIDE(net_if_router_rm = 0x100541cd); -PROVIDE(wifi_sta_ampdu_rx_enable_per_tid_is_allowed = 0x100623f5); -PROVIDE(ring_buf_area_finish = 0x18031031); -PROVIDE(wlan_get_regulatory_domain = 0x1806aa71); -PROVIDE(memcpy = 0x18029391); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_RTS_THRESHOLD = 0x1804a2bd); -PROVIDE(wlan_send_mgmt_rm_neighbor_request = 0x180626c5); -PROVIDE(pm_policy_next_event_ticks = 0x180326b1); -PROVIDE(__nedf2 = 0x18029c31); +PROVIDE(wlan_get_supported_rates = 0x1806353d); +PROVIDE(k_queue_append_list = 0x100570d9); +PROVIDE(wifi_get_pmfcfg = 0x18061dc9); +PROVIDE(net_route_init = 0x18052b61); +PROVIDE(__aeabi_dcmpgt = 0x1802970d); +PROVIDE(dns_copy_qname = 0x18055795); +PROVIDE(net_configure_address = 0x1004d041); +PROVIDE(z_impl_k_stack_push = 0x18078aa9); +PROVIDE(I2C_MasterInit = 0x18074d95); +PROVIDE(k_work_reschedule = 0x100632c9); +PROVIDE(__log10Pow5 = 0x1807cb4d); +PROVIDE(OSA_TimerIsRunning = 0x10056ffd); +PROVIDE(z_getopt_global_state_update = 0x1803ac41); +PROVIDE(arch_new_thread = 0x1803a219); +PROVIDE(wifi_uap_pmf_getset = 0x1805decd); +PROVIDE(puts = 0x1807b579); +PROVIDE(net_if_get_binding = 0x1004d2f5); +PROVIDE(z_impl_zsock_recvfrom = 0x10059fdd); +PROVIDE(z_add_timeout = 0x18079875); +PROVIDE(z_impl_flash_get_page_info_by_offs = 0x18058031); +PROVIDE(z_impl_k_float_disable = 0x180789a1); +PROVIDE(z_impl_k_pipe_read = 0x18079055); +PROVIDE(k_work_schedule = 0x100633f9); +PROVIDE(net_tcp_get_option = 0x1005ab79); +PROVIDE(wifi_bypass_txq_deinit = 0x1004b221); +PROVIDE(net_ipv4_prepare_for_send_fragment = 0x10047125); +PROVIDE(wrapper_wlan_cmd_11n_cfg = 0x1806500d); +PROVIDE(net_route_packet_if = 0x18052ae5); +PROVIDE(wlan_send_mgmt_bss_trans_query = 0x18061939); +PROVIDE(z_impl_z_zsock_getaddrinfo_internal = 0x1803ef21); +PROVIDE(wlan_11n_get_sta_peer_amsdu = 0x10049b55); +PROVIDE(wlan_get_connection_state = 0x18071701); +PROVIDE(net_if_ipv6_router_update_lifetime = 0x10053835); +PROVIDE(__log10Pow2 = 0x1807cb41); +PROVIDE(net_dhcpv4_server_init = 0x18055505); +PROVIDE(pm_state_cpu_get_all = 0x18032185); +PROVIDE(dns_resolve_name = 0x18056c1d); +PROVIDE(wlan_get_current_uap_network_ssid = 0x180710a9); +PROVIDE(k_thread_system_pool_assign = 0x10049589); +PROVIDE(shell_fprintf_error = 0x180369f9); +PROVIDE(ldexp = 0x1807cf71); +PROVIDE(strerror = 0x1807d26b); +PROVIDE(net_route_del_by_nexthop = 0x1805249d); +PROVIDE(GPIO_PortInit = 0x180746e9); +PROVIDE(net_if_is_offloaded = 0x10053c51); +PROVIDE(wifi_mgmt_raise_ap_sta_connected_event = 0x18049925); +PROVIDE(IMU_SendMsgPtrBlocking = 0x100452e1); +PROVIDE(net_socket_service_foreach = 0x1804118d); +PROVIDE(wlan_ret_gpio_tsf_latch = 0x18064761); +PROVIDE(isspace = 0x1807d171); +PROVIDE(wlan_add_ext_capa_info_ie = 0x1806932d); +PROVIDE(net_ipv6_start_rs = 0x1805192d); +PROVIDE(z_impl_k_condvar_signal = 0x1802c191); +PROVIDE(OSA_TaskGetCurrentHandle = 0x100463f9); +PROVIDE(net_if_call_link_cb = 0x10050abd); +PROVIDE(wifi_get_device_firmware_version_ext = 0x10060249); +PROVIDE(__floatsidf = 0x18029119); +PROVIDE(z_init_thread_base = 0x1005e6b9); +PROVIDE(net_if_ipv4_get_global_addr = 0x10051c15); +PROVIDE(wlan_ops_uap_ioctl = 0x1805e0b5); +PROVIDE(z_impl_k_msgq_peek = 0x1004c249); +PROVIDE(wifi_wmm_drop_pause_drop = 0x1004b469); +PROVIDE(OSA_TimerDestroy = 0x10056fd1); +PROVIDE(nxp_wifi_get_power_save = 0x1805a9c1); +PROVIDE(z_impl_flash_get_page_count = 0x18058045); +PROVIDE(wlan_rrm_request_scan = 0x18072685); +PROVIDE(wlan_get_uap_connection_state = 0x1807175d); +PROVIDE(net_buf_simple_pull_mem = 0x1803b9ed); +PROVIDE(wifi_send_add_wpa_psk = 0x1806232d); +PROVIDE(z_impl_net_addr_ntop = 0x1005f2d9); +PROVIDE(__math_uflow = 0x1802d4d1); +PROVIDE(shell_fprintf_normal = 0x18036975); +PROVIDE(net_if_ipv6_addr_lookup_by_iface = 0x100527c5); +PROVIDE(net_if_mcast_mon_unregister = 0x10053da1); +PROVIDE(z_sched_wait = 0x10058d7d); +PROVIDE(wlan_11ax_ioctl_cmd = 0x1805f8c9); +PROVIDE(frexpl = 0x1807cef1); +PROVIDE(wifi_destroy_wifidriver_tasks = 0x10060ee5); +PROVIDE(wlan_ret_802_11_associate = 0x18068e79); +PROVIDE(z_reschedule_irqlock = 0x10058d11); +PROVIDE(wifi_set_tx_status = 0x10061f41); +PROVIDE(net_tcp_queue = 0x1005ae7d); +PROVIDE(net_pkt_alloc = 0x10055831); +PROVIDE(OSA_TimerChange = 0x10056f41); +PROVIDE(z_move_thread_to_end_of_prio_q = 0x100588a1); +PROVIDE(wlan_cmd_11n_delba = 0x1004b00d); +PROVIDE(FLEXSPI_Init = 0x100447f5); +PROVIDE(OSA_MsgQDestroy = 0x10045a49); +PROVIDE(OSA_SemaphoreGetCount = 0x1004602d); +PROVIDE(atol = 0x1807d1d3); +PROVIDE(wifi_get_ipv4_multicast_mac = 0x100613bd); +PROVIDE(net_tcp_state_str = 0x1005b19d); +PROVIDE(z_impl_k_busy_wait = 0x18077f1d); +PROVIDE(llext_fs_read = 0x1803e8c9); +PROVIDE(usb_get_dev_data_by_iface = 0x18033715); +PROVIDE(net_context_create_ipv6_new = 0x1004e7a1); +PROVIDE(net_context_update_recv_wnd = 0x1004f5b9); +PROVIDE(wlan_set_uap_max_clients = 0x180723bd); +PROVIDE(OSA_RWLockCreate = 0x10056da5); +PROVIDE(k_thread_runtime_stats_all_get = 0x1005e489); +PROVIDE(wlan_cmd_11n_cfg = 0x10049c81); +PROVIDE(zperf_session_init = 0x10064001); +PROVIDE(__aeabi_read_tp = 0x1807d7c1); +PROVIDE(dns_resolve_cancel_with_name = 0x180563cd); +PROVIDE(wlan_get_scan_result = 0x18071465); +PROVIDE(usb_dc_ep_set_stall = 0x18057609); +PROVIDE(net_rx_priority2tc = 0x10056b89); +PROVIDE(wlan_uap_set_sta_ageout_timer = 0x18074325); +PROVIDE(atan2 = 0x1802cd31); +PROVIDE(net_if_ipv6_router_rm = 0x10053831); +PROVIDE(zperf_get_sin = 0x10063bd9); +PROVIDE(__dtox_engine = 0x1807d653); +PROVIDE(FLEXSPI_TransferNonBlocking = 0x10044ef5); +PROVIDE(memc_flexspi_reset = 0x100490f1); +PROVIDE(k_heap_alloc = 0x18078799); +PROVIDE(z_impl_zephyr_fputc = 0x1803a425); +PROVIDE(gmtime_r = 0x1807b401); +PROVIDE(wlan_scan_networks = 0x1806a729); +PROVIDE(net_if_ipv4_set_ttl = 0x10052451); +PROVIDE(fs_tell = 0x1803cc39); +PROVIDE(putc = 0x1807d795); +PROVIDE(is_isr_context = 0x10056ee1); +PROVIDE(llext_fs_seek = 0x1803e8f9); +PROVIDE(sprintf = 0x1807b611); +PROVIDE(z_device_get_all_static = 0x1807808d); +PROVIDE(wifi_uap_ampdu_rx_disable = 0x10062019); +PROVIDE(sys_clock_tick_get_32 = 0x18079dc5); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_GET_PRIORITY_QUEUES_NUM = 0x180481a5); +PROVIDE(wifi_send_scan_query = 0x18062a21); +PROVIDE(z_impl_k_poll_signal_reset = 0x1807abf1); +PROVIDE(z_impl_k_thread_resume = 0x100582b9); +PROVIDE(k_work_cancel_delayable_sync = 0x10062731); +PROVIDE(arch_float_enable = 0x1803a2b1); +PROVIDE(net_route_add = 0x18052661); +PROVIDE(z_arm_nmi = 0x18039109); +PROVIDE(k_work_init_delayable = 0x10062ded); +PROVIDE(net_interface_up = 0x1004d319); +PROVIDE(wifi_get_ipv6_multicast_mac = 0x100613e1); +PROVIDE(net_tc_rx_init = 0x10056b99); +PROVIDE(CLOCK_EnableUsbhsPhyClock = 0x1805c50d); +PROVIDE(net_if_get_wifi_sta = 0x100513e5); +PROVIDE(OSTIMER_Init = 0x18075055); +PROVIDE(net_if_ipv4_addr_mask_cmp = 0x10051a9d); +PROVIDE(net_pkt_get_reserve_data = 0x100563c1); +PROVIDE(__log2pow5 = 0x1807cb59); +PROVIDE(POWER_PowerOnWlan = 0x1805c985); +PROVIDE(zperf_udp_download_stop = 0x10066a61); +PROVIDE(wlan_initialize_uap_network = 0x1807080d); +PROVIDE(log_source_name_get = 0x180311e1); +PROVIDE(net_if_router_rm = 0x10053fd1); +PROVIDE(wifi_sta_ampdu_rx_enable_per_tid_is_allowed = 0x10061f7d); +PROVIDE(ring_buf_area_finish = 0x18030b45); +PROVIDE(wlan_get_regulatory_domain = 0x18067a31); +PROVIDE(memcpy = 0x18028d81); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_RTS_THRESHOLD = 0x18049881); +PROVIDE(wlan_send_mgmt_rm_neighbor_request = 0x180614e5); +PROVIDE(pm_policy_next_event_ticks = 0x180321a5); +PROVIDE(__nedf2 = 0x18029621); PROVIDE(net_buf_alloc_len_debug = 0x100400d9); -PROVIDE(z_shell_op_char_delete = 0x180385c9); -PROVIDE(net_pkt_get_info = 0x100565c1); -PROVIDE(wifi_wmm_tx_stats_dump = 0x1806b625); -PROVIDE(net_if_ipv4_addr_lookup = 0x10051bc5); -PROVIDE(wifi_get_subscribe_event = 0x1806b80d); -PROVIDE(wifi_get_firmware_ver_ext_from_cmdresp = 0x1806aaf1); -PROVIDE(zsock_getsockname_ctx = 0x18041459); -PROVIDE(wifi_put_ecsa_sem = 0x18065235); -PROVIDE(z_shell_op_cursor_position_synchronize = 0x18037c99); -PROVIDE(wlan_set_subscribe_event = 0x18078f01); -PROVIDE(z_fatal_error = 0x18088d15); -PROVIDE(llext_free_regions = 0x1803db01); -PROVIDE(memc_flexspi_is_running_xip = 0x10049121); -PROVIDE(z_impl_zsock_getpeername = 0x1005a0d9); -PROVIDE(wifi_set_country_code = 0x10062315); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_AP_RTS_THRESHOLD = 0x18049c31); -PROVIDE(pm_system_suspend = 0x18032395); -PROVIDE(wifi_uap_stop = 0x1805ec69); -PROVIDE(pm_state_exit_post_ops = 0x180312ed); -PROVIDE(wifi_enable_ecsa_support = 0x18064931); -PROVIDE(z_shell_op_right_arrow = 0x18037ed5); -PROVIDE(__aeabi_fcmpgt = 0x1802a181); -PROVIDE(wifi_get_chanlist = 0x180649f1); -PROVIDE(net_icmp_send_echo_request_no_wait = 0x1802b069); -PROVIDE(wifi_malloc_eventbuf = 0x18072991); -PROVIDE(wifi_utils_parse_scan_bands = 0x1804ea11); -PROVIDE(help_command = 0x18084c89); -PROVIDE(net_mgmt_event_notify_with_info = 0x1804f439); -PROVIDE(__aeabi_l2f = 0x1802a02d); -PROVIDE(__pow5bits = 0x1808d849); -PROVIDE(atanl = 0x1802d071); -PROVIDE(sys_timepoint_calc = 0x1808aaa5); -PROVIDE(z_sched_wake_thread = 0x100591fd); -PROVIDE(z_impl_k_pipe_write = 0x1802c949); -PROVIDE(wifi_set_txratecfg = 0x180680c1); -PROVIDE(sys_clock_set_timeout = 0x1805a471); -PROVIDE(wifi_nm_get_instance_iface = 0x1804e7b1); -PROVIDE(wlan_cmd_11ax_cfg = 0x18060b2d); -PROVIDE(strtod = 0x1808c335); -PROVIDE(__aeabi_dadd = 0x18029491); -PROVIDE(wlan_cmd_802_11_deauthenticate = 0x180701a5); -PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_AUTO_NEGOTIATION = 0x180487d9); -PROVIDE(__aeabi_l2d = 0x180297a1); -PROVIDE(wifi_set_threshold_pre_beacon_lost = 0x1806ba31); -PROVIDE(strlen = 0x1802a2f1); -PROVIDE(net_buf_simple_pull = 0x1803bfd5); +PROVIDE(z_shell_op_char_delete = 0x18038005); +PROVIDE(net_pkt_get_info = 0x10056379); +PROVIDE(net_if_ipv4_addr_lookup = 0x100519f9); +PROVIDE(wifi_get_firmware_ver_ext_from_cmdresp = 0x18067ab1); +PROVIDE(zsock_getsockname_ctx = 0x18040dc1); +PROVIDE(wifi_put_ecsa_sem = 0x18062b81); +PROVIDE(z_shell_op_cursor_position_synchronize = 0x180376d5); +PROVIDE(z_fatal_error = 0x18078161); +PROVIDE(llext_free_regions = 0x1803d4e1); +PROVIDE(memc_flexspi_is_running_xip = 0x10049099); +PROVIDE(z_impl_zsock_getpeername = 0x10059e09); +PROVIDE(wifi_set_country_code = 0x10061e9d); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_AP_RTS_THRESHOLD = 0x18049251); +PROVIDE(pm_system_suspend = 0x18031e89); +PROVIDE(wifi_uap_stop = 0x1805db59); +PROVIDE(pm_state_exit_post_ops = 0x18030e01); +PROVIDE(wifi_enable_ecsa_support = 0x18062725); +PROVIDE(z_shell_op_right_arrow = 0x18037911); +PROVIDE(__aeabi_fcmpgt = 0x18029b71); +PROVIDE(net_icmp_send_echo_request_no_wait = 0x1802aa59); +PROVIDE(wifi_malloc_eventbuf = 0x1806ee3d); +PROVIDE(wifi_utils_parse_scan_bands = 0x1804dd8d); +PROVIDE(net_mgmt_event_notify_with_info = 0x1804e775); +PROVIDE(__aeabi_l2f = 0x18029a1d); +PROVIDE(__pow5bits = 0x1807cb75); +PROVIDE(atanl = 0x1802c9f1); +PROVIDE(sys_timepoint_calc = 0x18079dd1); +PROVIDE(z_sched_wake_thread = 0x10058f39); +PROVIDE(z_impl_k_pipe_write = 0x1802c2c9); +PROVIDE(sys_clock_set_timeout = 0x1805943d); +PROVIDE(wifi_nm_get_instance_iface = 0x1804db2d); +PROVIDE(wlan_cmd_11ax_cfg = 0x1805f94d); +PROVIDE(strtod = 0x1807b661); +PROVIDE(__aeabi_dadd = 0x18028e81); +PROVIDE(wlan_cmd_802_11_deauthenticate = 0x1806c6dd); +PROVIDE(net_mgmt_NET_REQUEST_ETHERNET_SET_AUTO_NEGOTIATION = 0x18047e15); +PROVIDE(__aeabi_l2d = 0x18029191); +PROVIDE(strlen = 0x18029ce1); +PROVIDE(net_buf_simple_pull = 0x1803b9d1); PROVIDE(CONFIG_SYS_HASH_FUNC32_DJB2 = 0x00000001); -PROVIDE(z_arm_pendsv = 0x1803a66d); -PROVIDE(wlan_ralist_add_enh = 0x1004b97d); -PROVIDE(wifi_mode_txt = 0x18049821); -PROVIDE(_wlan_rrm_scan_cb = 0x18076815); -PROVIDE(wlan_11h_radar_detect_required = 0x18061b0d); -PROVIDE(wlan_11d_handle_uap_domain_info = 0x18061161); -PROVIDE(wlan_set_rf_channel = 0x18078561); -PROVIDE(net_get_uap_handle = 0x1004d3c5); -PROVIDE(wlan_add_mbo_oui_type = 0x1806cb51); -PROVIDE(set_monitor_filter = 0x18084951); -PROVIDE(__fixunsdfdi = 0x1802a291); -PROVIDE(net_icmp_call_ipv6_handlers = 0x1804fbb5); -PROVIDE(wifi_sta_ampdu_tx_enable = 0x10062415); -PROVIDE(z_impl_k_msgq_get = 0x1004c0a9); -PROVIDE(net_if_oper_state2str = 0x100540b9); -PROVIDE(wlan_11d_init = 0x180613c5); -PROVIDE(strtol = 0x1808c6a9); -PROVIDE(z_impl_zsock_gethostname = 0x1803f885); -PROVIDE(net_icmp_send_echo_request = 0x1802b049); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_SCAN = 0x180499c9); -PROVIDE(POWER_DisableGDetVSensors = 0x10068739); -PROVIDE(wifi_is_remain_on_channel = 0x10061d6d); -PROVIDE(wlan_set_crypto_AES_CCMP_encrypt = 0x18078bb5); -PROVIDE(z_impl_k_thread_stack_free = 0x1808bbed); -PROVIDE(jesd216_bfp_erase = 0x100488ed); -PROVIDE(net_tcp_init = 0x1005afa1); -PROVIDE(set_flexspi_clock = 0x10067ebd); -PROVIDE(wmsdk_is_11N_enabled = 0x18068005); -PROVIDE(usb_cancel_transfer = 0x18034015); -PROVIDE(llext_loaded_sect_ptr = 0x1803db65); -PROVIDE(wlan_use_non_default_ht_vht_cap = 0x1806caf5); -PROVIDE(net_pkt_skip = 0x10056a55); -PROVIDE(__truncdfsf2 = 0x18029ded); -PROVIDE(__stack_chk_fail = 0x1808a501); -PROVIDE(wlan_11n_delete_bastream = 0x10049b11); -PROVIDE(wlan_hs_send_event = 0x18074055); -PROVIDE(wlan_set_uap_turbo_mode = 0x18079951); -PROVIDE(wlan_start = 0x18074555); -PROVIDE(OSA_EventSet = 0x1004575d); -PROVIDE(net_if_unregister_link_cb = 0x10054a21); -PROVIDE(wifi_get_txpwrlimit = 0x18064aad); -PROVIDE(getopt_long = 0x1803be35); -PROVIDE(wrapper_moal_memcpy_ext = 0x180678a1); -PROVIDE(__aeabi_uidiv = 0x18029431); -PROVIDE(wifi_security_txt = 0x180497a5); -PROVIDE(dump_csi_param_header = 0x18084531); -PROVIDE(net_pkt_rx_clone = 0x100569c5); -PROVIDE(wifi_clear_subscribe_event = 0x1806b831); -PROVIDE(wlan_11ac_ioctl_vhtcfg = 0x18060301); -PROVIDE(wifi_prepare_set_mac_addr_cmd = 0x1806ac85); -PROVIDE(OSA_MemoryAllocate = 0x1004594d); -PROVIDE(net_if_down = 0x100510a1); -PROVIDE(z_impl_net_if_ipv4_set_gw_by_index = 0x100557a9); -PROVIDE(wifi_set_rssi_low_threshold = 0x1806968d); -PROVIDE(k_realloc = 0x100495b9); -PROVIDE(wlan_is_radio_mode_valid = 0x180664cd); -PROVIDE(net_ipv6_unspecified_address = 0x1005f429); -PROVIDE(usb_dc_ep_read = 0x18058cf9); -PROVIDE(net_ipv6_nbr_reachability_hint = 0x1802b8d1); -PROVIDE(k_queue_append = 0x1005735d); -PROVIDE(HAL_RpmsgEnterLowpower = 0x10044295); -PROVIDE(net_icmpv4_create = 0x18050171); -PROVIDE(zsock_shutdown_ctx = 0x1804016d); -PROVIDE(wifi_reg_access = 0x18062ef5); -PROVIDE(zvfs_open = 0x1803b3d5); -PROVIDE(OSA_TaskNotifyPost = 0x10046655); -PROVIDE(net_ipv6_nbr_foreach = 0x18050f79); -PROVIDE(OSA_MemoryFreeAlign = 0x10045989); -PROVIDE(z_impl_net_if_ipv6_addr_rm_by_index = 0x100558b1); -PROVIDE(z_sched_waitq_walk = 0x10059065); -PROVIDE(getaddrinfo = 0x1803b4ed); -PROVIDE(wlan_get_mac_address_uap = 0x18075a19); -PROVIDE(net_icmp_call_ipv4_handlers = 0x1804fb9d); -PROVIDE(wlan_11n_deaggregate_pkt = 0x1004a5e5); -PROVIDE(wlan_ret_11ax_cmd = 0x18060d59); -PROVIDE(net_if_addr_unref = 0x10050a39); -PROVIDE(strcasecmp = 0x1808ded7); -PROVIDE(z_unpend_thread_no_timeout = 0x10059a0d); -PROVIDE(z_impl_k_sem_reset = 0x10059cc1); -PROVIDE(net_mgmt_NET_REQUEST_WIFI_CHANNEL = 0x1804a1a5); -PROVIDE(z_impl_net_if_ipv6_addr_lookup_by_index = 0x1005586d); -PROVIDE(csi_local_buff_init = 0x10060cd9); -PROVIDE(wifi_set_rf_rx_antenna = 0x18063a79); -PROVIDE(wifi_low_level_output = 0x10061ded); -PROVIDE(z_impl_zsock_accept = 0x10059f5d); -PROVIDE(wlan_cmd_subscribe_event = 0x180703e5); -PROVIDE(wlan_get_delay_to_ps = 0x18075a81); -PROVIDE(__eqdf2 = 0x18029c31); -PROVIDE(OSA_MutexUnlock = 0x10045e49); -PROVIDE(CLOCK_EnableAvPllCh = 0x1805d2f5); -PROVIDE(wifi_utils_parse_scan_ssids = 0x1804eae9); -PROVIDE(net_if_ipv6_addr_update_lifetime = 0x10052b8d); -PROVIDE(net_tc_submit_to_rx_queue = 0x10056eb1); -PROVIDE(wifi_register_event_queue = 0x10061fd1); -PROVIDE(__fixdfsi = 0x18029d5d); -PROVIDE(k_queue_unique_append = 0x1005762d); -PROVIDE(z_dummy_thread_init = 0x1005e90d); -PROVIDE(z_spin_unlock_valid = 0x1808a1f5); -PROVIDE(wifi_nm_iface_is_sap = 0x1804e8ed); -PROVIDE(net_if_select_src_iface = 0x100541fd); -PROVIDE(wifi_enable_11d_support = 0x18064779); -PROVIDE(zvfs_eventfd = 0x1803c7c1); -PROVIDE(z_get_next_timeout_expiry = 0x1808a911); -PROVIDE(net_dhcpv4_add_option_callback = 0x18054a79); -PROVIDE(ceil = 0x1808da65); -PROVIDE(z_impl_k_timer_start = 0x1808accd); -PROVIDE(net_if_lookup_by_dev = 0x10053ead); -PROVIDE(dns_dispatcher_register = 0x1802c0f9); -PROVIDE(__aeabi_ul2f = 0x1802a01d); -PROVIDE(net_udp_finalize = 0x1005eca1); -PROVIDE(kheap_llext_heap = 0x10093a20); +PROVIDE(z_arm_pendsv = 0x1803a069); +PROVIDE(wlan_ralist_add_enh = 0x1004b8f5); +PROVIDE(wifi_mode_txt = 0x18048e41); +PROVIDE(_wlan_rrm_scan_cb = 0x180724a9); +PROVIDE(wlan_11h_radar_detect_required = 0x1806092d); +PROVIDE(wlan_11d_handle_uap_domain_info = 0x1805ff81); +PROVIDE(net_get_uap_handle = 0x1004d2e1); +PROVIDE(wlan_add_mbo_oui_type = 0x180690f5); +PROVIDE(__fixunsdfdi = 0x18029c81); +PROVIDE(net_icmp_call_ipv6_handlers = 0x1804eef1); +PROVIDE(wifi_sta_ampdu_tx_enable = 0x10061f9d); +PROVIDE(z_impl_k_msgq_get = 0x1004c021); +PROVIDE(net_if_oper_state2str = 0x10053ebd); +PROVIDE(wlan_11d_init = 0x180601e5); +PROVIDE(strtol = 0x1807b9d5); +PROVIDE(z_impl_zsock_gethostname = 0x1803f20d); +PROVIDE(net_icmp_send_echo_request = 0x1802aa39); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_SCAN = 0x18048fe9); +PROVIDE(POWER_DisableGDetVSensors = 0x10068129); +PROVIDE(wifi_is_remain_on_channel = 0x10061915); +PROVIDE(z_impl_k_thread_stack_free = 0x1807af19); +PROVIDE(jesd216_bfp_erase = 0x10048865); +PROVIDE(net_tcp_init = 0x1005ac8d); +PROVIDE(set_flexspi_clock = 0x100678ad); +PROVIDE(wmsdk_is_11N_enabled = 0x18065115); +PROVIDE(usb_cancel_transfer = 0x18033ae9); +PROVIDE(llext_loaded_sect_ptr = 0x1803d545); +PROVIDE(wlan_use_non_default_ht_vht_cap = 0x18069099); +PROVIDE(net_pkt_skip = 0x1005680d); +PROVIDE(__truncdfsf2 = 0x180297dd); +PROVIDE(wlan_11n_delete_bastream = 0x10049a89); +PROVIDE(wlan_hs_send_event = 0x1807040d); +PROVIDE(wlan_start = 0x180707c9); +PROVIDE(OSA_EventSet = 0x1004573d); +PROVIDE(net_if_unregister_link_cb = 0x10054805); +PROVIDE(wifi_get_txpwrlimit = 0x18062765); +PROVIDE(getopt_long = 0x1803b831); +PROVIDE(wrapper_moal_memcpy_ext = 0x180649bd); +PROVIDE(__aeabi_uidiv = 0x18028e21); +PROVIDE(wifi_security_txt = 0x18048dc5); +PROVIDE(net_pkt_rx_clone = 0x1005677d); +PROVIDE(wlan_11ac_ioctl_vhtcfg = 0x1805f121); +PROVIDE(wifi_prepare_set_mac_addr_cmd = 0x18067c45); +PROVIDE(OSA_MemoryAllocate = 0x1004592d); +PROVIDE(net_if_down = 0x10050eed); +PROVIDE(z_impl_net_if_ipv4_set_gw_by_index = 0x1005555d); +PROVIDE(wifi_set_rssi_low_threshold = 0x1806664d); +PROVIDE(k_realloc = 0x10049531); +PROVIDE(net_ipv6_unspecified_address = 0x1005f049); +PROVIDE(usb_dc_ep_read = 0x18057cc5); +PROVIDE(net_ipv6_nbr_reachability_hint = 0x1802b2c1); +PROVIDE(k_queue_append = 0x100570bd); +PROVIDE(HAL_RpmsgEnterLowpower = 0x10044275); +PROVIDE(net_icmpv4_create = 0x1804f4ad); +PROVIDE(zsock_shutdown_ctx = 0x1803faf5); +PROVIDE(zvfs_open = 0x1803add1); +PROVIDE(OSA_TaskNotifyPost = 0x10046635); +PROVIDE(net_ipv6_nbr_foreach = 0x18050295); +PROVIDE(OSA_MemoryFreeAlign = 0x10045969); +PROVIDE(z_impl_net_if_ipv6_addr_rm_by_index = 0x10055665); +PROVIDE(z_sched_waitq_walk = 0x10058da1); +PROVIDE(getaddrinfo = 0x1803aee9); +PROVIDE(wlan_get_mac_address_uap = 0x18071825); +PROVIDE(net_icmp_call_ipv4_handlers = 0x1804eed9); +PROVIDE(wlan_11n_deaggregate_pkt = 0x1004a55d); +PROVIDE(wlan_ret_11ax_cmd = 0x1805fb79); +PROVIDE(net_if_addr_unref = 0x100508a5); +PROVIDE(strcasecmp = 0x1807d203); +PROVIDE(z_unpend_thread_no_timeout = 0x1005973d); +PROVIDE(z_impl_k_sem_reset = 0x100599f1); +PROVIDE(net_mgmt_NET_REQUEST_WIFI_CHANNEL = 0x18049769); +PROVIDE(z_impl_net_if_ipv6_addr_lookup_by_index = 0x10055621); +PROVIDE(csi_local_buff_init = 0x100608a1); +PROVIDE(wifi_low_level_output = 0x10061995); +PROVIDE(z_impl_zsock_accept = 0x10059c8d); +PROVIDE(wlan_cmd_subscribe_event = 0x1806c891); +PROVIDE(wlan_get_delay_to_ps = 0x18071855); +PROVIDE(__eqdf2 = 0x18029621); +PROVIDE(OSA_MutexUnlock = 0x10045e29); +PROVIDE(CLOCK_EnableAvPllCh = 0x1805c225); +PROVIDE(wifi_utils_parse_scan_ssids = 0x1804de45); +PROVIDE(net_if_ipv6_addr_update_lifetime = 0x100529ad); +PROVIDE(net_tc_submit_to_rx_queue = 0x10056c3d); +PROVIDE(wifi_register_event_queue = 0x10061b79); +PROVIDE(__fixdfsi = 0x1802974d); +PROVIDE(k_queue_unique_append = 0x1005738d); +PROVIDE(z_dummy_thread_init = 0x1005e561); +PROVIDE(z_spin_unlock_valid = 0x18079531); +PROVIDE(wifi_nm_iface_is_sap = 0x1804dc69); +PROVIDE(net_if_select_src_iface = 0x10054001); +PROVIDE(wifi_enable_11d_support = 0x1806256d); +PROVIDE(zvfs_eventfd = 0x1803c1bd); +PROVIDE(z_get_next_timeout_expiry = 0x18079c3d); +PROVIDE(net_dhcpv4_add_option_callback = 0x18053c21); +PROVIDE(ceil = 0x1807cd91); +PROVIDE(z_impl_k_timer_start = 0x18079ff9); +PROVIDE(net_if_lookup_by_dev = 0x10053cb1); +PROVIDE(dns_dispatcher_register = 0x1802ba79); +PROVIDE(__aeabi_ul2f = 0x18029a0d); +PROVIDE(net_udp_finalize = 0x1005e8e5); +PROVIDE(kheap_llext_heap = 0x100919b0); PROVIDE(kheap_llext_heap_size = 32768); -PROVIDE(kheap__system_heap = 0x100aaf40); +PROVIDE(kheap__system_heap = 0x100a8ed0); PROVIDE(kheap__system_heap_size = 0x1e000); -PROVIDE(__device_dts_ord_91 = 0x000000001808f0b0); -PROVIDE(__device_dts_ord_6 = 0x000000001808f0d8); -PROVIDE(__device_dts_ord_31 = 0x000000001808f100); -PROVIDE(__device_dts_ord_8 = 0x000000001808f128); -PROVIDE(__device_dts_ord_82 = 0x000000001808f150); -PROVIDE(__device_dts_ord_46 = 0x000000001808f178); -PROVIDE(__device_dts_ord_62 = 0x000000001808f1a0); -PROVIDE(__device_dts_ord_15 = 0x000000001808f1c8); -PROVIDE(__device_dts_ord_17 = 0x000000001808f1f0); -PROVIDE(__device_dts_ord_49 = 0x000000001808f218); -PROVIDE(__device_dts_ord_40 = 0x000000001808f240); -PROVIDE(__device_dts_ord_93 = 0x000000001808f268); -PROVIDE(__device_dts_ord_13 = 0x000000001808f290); -PROVIDE(__device_dts_ord_11 = 0x000000001808f2b8); +PROVIDE(__device_dts_ord_91 = 0x000000001807e368); +PROVIDE(__device_dts_ord_6 = 0x000000001807e390); +PROVIDE(__device_dts_ord_31 = 0x000000001807e3b8); +PROVIDE(__device_dts_ord_8 = 0x000000001807e3e0); +PROVIDE(__device_dts_ord_82 = 0x000000001807e408); +PROVIDE(__device_dts_ord_46 = 0x000000001807e430); +PROVIDE(__device_dts_ord_62 = 0x000000001807e458); +PROVIDE(__device_dts_ord_15 = 0x000000001807e480); +PROVIDE(__device_dts_ord_17 = 0x000000001807e4a8); +PROVIDE(__device_dts_ord_49 = 0x000000001807e4d0); +PROVIDE(__device_dts_ord_40 = 0x000000001807e4f8); +PROVIDE(__device_dts_ord_93 = 0x000000001807e520); +PROVIDE(__device_dts_ord_13 = 0x000000001807e548); +PROVIDE(__device_dts_ord_11 = 0x000000001807e570); PROVIDE(_sketch_start = 0x323000 );