Add peek and poke for the 3 other AXI-Lite interfaces (#511)

* Added peek and poke for the BAR1 interface

* Added peek and poke for the SDA and PCIS AXI slave interfaces.

Now all the 4 slave interface have a specific set of peek/poke functions callable from C.
The new cl_peek_ocl and cl_poke_ocl are actually the same as the original cl_peek/cl_poke,
which are still needed because they are used internally to configure the DDR controllers and test circuits.

Co-authored-by: Joost Hoozemans <[email protected]>

Author: joosthooz

hdk/common/verif/include/sh_dpi_tasks.svh

@@ -36,6 +36,14 @@ import tb_type_defines_pkg::*;
    export "DPI-C" task sv_map_host_memory;
    export "DPI-C" task cl_peek;
    export "DPI-C" task cl_poke;
+   export "DPI-C" task cl_peek_pcis;
+   export "DPI-C" task cl_poke_pcis;
+   export "DPI-C" task cl_peek_sda;
+   export "DPI-C" task cl_poke_sda;
+   export "DPI-C" task cl_peek_ocl;
+   export "DPI-C" task cl_poke_ocl;
+   export "DPI-C" task cl_peek_bar1;
+   export "DPI-C" task cl_poke_bar1;
    export "DPI-C" task sv_int_ack;
    export "DPI-C" task sv_pause;
    export "DPI-C" task sv_fpga_pci_peek;
@@ -65,6 +73,38 @@ import tb_type_defines_pkg::*;
    task cl_poke(input longint unsigned addr, int unsigned data);
       tb.card.fpga.sh.poke(.addr(addr), .data(data), .intf(AxiPort::PORT_OCL));
    endtask
+   
+   task cl_peek_pcis(input longint unsigned addr, output int unsigned data);
+      tb.card.fpga.sh.peek(.addr(addr), .data(data), .intf(AxiPort::PORT_DMA_PCIS));
+   endtask
+   
+   task cl_poke_pcis(input longint unsigned addr, int unsigned data);
+      tb.card.fpga.sh.poke(.addr(addr), .data(data), .intf(AxiPort::PORT_DMA_PCIS));
+   endtask
+
+   task cl_peek_sda(input longint unsigned addr, output int unsigned data);
+      tb.card.fpga.sh.peek(.addr(addr), .data(data), .intf(AxiPort::PORT_SDA));
+   endtask
+   
+   task cl_poke_sda(input longint unsigned addr, int unsigned data);
+      tb.card.fpga.sh.poke(.addr(addr), .data(data), .intf(AxiPort::PORT_SDA));
+   endtask
+
+   task cl_peek_ocl(input longint unsigned addr, output int unsigned data);
+      tb.card.fpga.sh.peek(.addr(addr), .data(data), .intf(AxiPort::PORT_OCL));
+   endtask
+   
+   task cl_poke_ocl(input longint unsigned addr, int unsigned data);
+      tb.card.fpga.sh.poke(.addr(addr), .data(data), .intf(AxiPort::PORT_OCL));
+   endtask
+
+   task cl_peek_bar1(input longint unsigned addr, output int unsigned data);
+      tb.card.fpga.sh.peek(.addr(addr), .data(data), .intf(AxiPort::PORT_BAR1));
+   endtask
+   
+   task cl_poke_bar1(input longint unsigned addr, int unsigned data);
+      tb.card.fpga.sh.poke(.addr(addr), .data(data), .intf(AxiPort::PORT_BAR1));
+   endtask
 
    task sv_int_ack(input int unsigned int_num);
       tb.card.fpga.sh.set_ack_bit(int_num);

sdk/userspace/include/utils/sh_dpi_tasks.h

@@ -33,6 +33,14 @@ extern void sv_map_host_memory(uint8_t *memory);
 
 extern void cl_peek(uint64_t addr, uint32_t *data);
 extern void cl_poke(uint64_t addr, uint32_t  data);
+extern void cl_peek_pcis(uint64_t addr, uint32_t *data);
+extern void cl_poke_pcis(uint64_t addr, uint32_t  data);
+extern void cl_peek_sda(uint64_t addr, uint32_t *data);
+extern void cl_poke_sda(uint64_t addr, uint32_t  data);
+extern void cl_peek_ocl(uint64_t addr, uint32_t *data);
+extern void cl_poke_ocl(uint64_t addr, uint32_t  data);
+extern void cl_peek_bar1(uint64_t addr, uint32_t *data);
+extern void cl_poke_bar1(uint64_t addr, uint32_t  data);
 extern void sv_int_ack(uint32_t int_num);
 extern void sv_pause(uint32_t x);
 extern void sv_fpga_start_buffer_to_cl(uint32_t slot_id, uint32_t chan, uint32_t buf_size, uint64_t wr_buffer_addr, uint64_t cl_addr);