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CPU: IRQ and reset interrupt handlers missing proper cycle timing #602

@bfirsh

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@bfirsh

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doIrq() missing dummy read PPU cycles

doNonMaskableInterrupt() correctly has 2 dummy PPU steps at the start (cycles 1-2 of the interrupt sequence), but doIrq() jumps straight to pushing the return address. The PPU is 6 dots short during IRQ handling.

doResetInterrupt() incomplete

Missing:

  • 3 dummy push cycles (stack pointer decrement without writing)
  • I flag set to 1
  • 5 of the 7 PPU step cycles (only has the 2 for vector fetch)

These affect PPU-CPU synchronization during interrupts.

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    accuracyHardware accuracy improvementbugcomponent: cpuCPU emulation (cpu.js)difficulty: mediumModerate change requiring understanding of one subsystempriority: mediumIncorrect behavior for specific games or edge cases

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