test: refine FileCheck to capture SSA value in SiLU fusion test

Author: GuoningHuang

frontend/Python/graph/transform/fuse_ops.py

@@ -187,4 +187,5 @@ def simply_fuse(graph: Graph):
         new_op_group.append(op)
     graph.op_groups = {}
     graph.op_groups["subgraph0"] = new_op_group
-    graph.group_map_device = {"subgraph0": device}
+    graph.group_map_device = {"subgraph0": device}
+    

tests/Python/test_silu.py

@@ -35,15 +35,16 @@ def foo(x):
 # CHECK: module {
 # CHECK-LABEL: func.func @forward
 # CHECK: %{{.*}} = tensor.empty() : tensor<4x4xf32>
-# CHECK: %{{.*}} = linalg.generic {indexing_maps = [#map, #map], iterator_types = ["parallel", "parallel"]} ins(%arg0 : tensor<4x4xf32>) outs(%0 : tensor<4x4xf32>) {
+# CHECK: %[[RES:.*]] = linalg.generic {indexing_maps = [#map, #map], iterator_types = ["parallel", "parallel"]} ins(%arg0 : tensor<4x4xf32>) outs(%0 : tensor<4x4xf32>) {
 # CHECK: ^bb0(%in: f32, %out: f32):
 # CHECK: %{{.*}} = arith.negf %in : f32
-# CHECK: %{{.*}} = math.exp %2 : f32
+# CHECK: %{{.*}} = math.exp %{{.*}} : f32
 # CHECK: %{{.*}} = arith.constant 1.000000e+00 : f32
-# CHECK: %{{.*}} = arith.addf %4, %3 : f32
-# CHECK: %{{.*}} = arith.divf %in, %5 : f32
-# CHECK: linalg.yield %6 : f32
+# CHECK: %{{.*}} = arith.addf %{{.*}}, %{{.*}} : f32
+# CHECK: %{{.*}} = arith.divf %in, %{{.*}} : f32
+# CHECK: linalg.yield %{{.*}} : f32
 # CHECK: } -> tensor<4x4xf32>
-# CHECK: return %1 : tensor<4x4xf32>
+# CHECK: return %[[RES]] : tensor<4x4xf32>
 # CHECK: }
 # CHECK: }
+