@@ -102,11 +102,7 @@ static void avr_bitbang_write_bit(avr_bitbang_t *p)
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if ( p -> p_out .port ) {
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avr_raise_irq (p -> p_out .irq , bit );
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uint16_t addr = p -> p_out .ioport -> r_port ;
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- uint8_t value = p -> avr -> data [addr ];
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- if (bit )
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- value |= 1 << p -> p_out .pin ;
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- else
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- value &= ~(1 << p -> p_out .pin );
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+ uint8_t value = (p -> avr -> data [addr ] & ~(1 << p -> p_out .pin )) | (!!bit << p -> p_out .pin );
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// at least avr->data[addr] update is required, otherwise port state is broken
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// also triggering vcd signal would be nice here
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avr_core_watch_write (p -> avr , addr , value );
@@ -142,11 +138,7 @@ static void avr_bitbang_clk_edge(avr_bitbang_t *p)
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if ( p -> clk_generate && p -> p_clk .port ) {
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avr_raise_irq (p -> p_clk .irq , clk );
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uint16_t addr = p -> p_clk .ioport -> r_port ;
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- uint8_t value = p -> avr -> data [addr ];
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- if (clk )
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- value |= 1 << p -> p_clk .pin ;
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- else
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- value &= ~(1 << p -> p_clk .pin );
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+ uint8_t value = (p -> avr -> data [addr ] & ~(1 << p -> p_clk .pin )) | (!!clk << p -> p_clk .pin );
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// at least avr->data[addr] update is required, otherwise port state is broken
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// also triggering vcd signal would be nice here
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avr_core_watch_write (p -> avr , addr , value );
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