split async USART1 blocks on CH32V203

[user20793]

this works fine:

bind_interrupts!(struct Irqs {
    USART1 => usart::InterruptHandler<peripherals::USART1>;
});

#[embassy_executor::main(entry = "qingke_rt::entry")]
async fn main(_spawner: Spawner) -> ! {
    hal::debug::SDIPrint::enable();
    let p = {
        let mut config = hal::Config::default();
        config.rcc = hal::rcc::Config::SYSCLK_FREQ_144MHZ_HSI;
        hal::init(config)
    };

    let mut uart_conf: hal::usart::Config = Default::default();
    uart_conf.baudrate = 115200;
    uart_conf.detect_previous_overrun = false;
    let mut rx = UartRx::new(p.USART1, Irqs, p.PB7, p.DMA1_CH5, uart_conf).unwrap();

    let mut buffer = [0u8; 300];
    println!("reading ... ");
    let result = rx.read_until_idle(&mut buffer).await;
    println!("read: {:?}", result);

    loop{};
}

and shows

2026-02-15 18:02:57.197: reading ... 
2026-02-15 18:03:01.538: read: Ok(2)

when I send 2 bytes to PB7.

replacing let mut rx ... with

    let (mut tx, mut rx) = Uart::new(p.USART1, p.PB7, p.PB6, Irqs, p.DMA1_CH4, p.DMA1_CH5, uart_conf).unwrap().split();

blocks after "reading ... ". nothing is being received.

I hope I'm doing this correctly. I'm new to Rust, embedded and CH32 all at the same time.

---

ch32-hal: v0.1.0, commit 0d198c9, features = ["ch32v203g6u6", "memory-x", "embassy", "rt", "time-driver-tim2"], default-features = false

[user20793]

works with USART2 though 🤷

bind_interrupts!(struct Irqs {
    USART2 => usart::InterruptHandler<peripherals::USART2>;
});

...

    let (mut tx, mut rx) = Uart::new(p.USART2, p.PA3, p.PA2, Irqs, p.DMA1_CH7, p.DMA1_CH6, uart_conf).unwrap().split();

[aq1018]

@user20793 PR #96 is merged. Can you verify if this fixes your issue? Thanks!

p.s. I think PB7/PB6 are not the default UART pins, and needs to be remapped.

[user20793]

👀