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adkian-sifiveadkian-sifive
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Remove reflectiveSelectable import
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‎src/test/scala-2/chisel3/util/BitPatSpec.scala‎

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// SPDX-License-Identifier: Apache-2.0
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package chisel3.util
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import chisel3._
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import chisel3.util.BitPat
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import _root_.circt.stage.ChiselStage
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import org.scalatest.flatspec.AnyFlatSpec
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import org.scalatest.matchers.should.Matchers
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object EnumExample extends ChiselEnum {
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val VAL1, VAL2, VAL3 = Value
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}
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class BitPatSpec extends AnyFlatSpec with Matchers {
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behavior.of(classOf[BitPat].toString)
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it should "convert a BitPat to readable form" in {
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val testPattern = "0" * 32 + "1" * 32 + "?" * 32 + "?01" * 32
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BitPat("b" + testPattern).toString should be(s"BitPat($testPattern)")
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}
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it should "convert a BitPat to raw form" in {
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val testPattern = "0" * 32 + "1" * 32 + "?" * 32 + "?01" * 32
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BitPat("b" + testPattern).rawString should be(testPattern)
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}
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it should "not fail if BitPat width is 0" in {
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intercept[IllegalArgumentException] { BitPat("b") }
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}
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it should "concat BitPat via ##" in {
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(BitPat.Y(4) ## BitPat.dontCare(3) ## BitPat.N(2)).toString should be(s"BitPat(1111???00)")
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}
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it should "throw when BitPat apply to a Hardware" in {
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intercept[java.lang.IllegalArgumentException] {
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ChiselStage.emitCHIRRTL(new chisel3.Module {
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BitPat(chisel3.Reg(chisel3.Bool()))
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})
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}
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}
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it should "index and return new BitPat" in {
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val b = BitPat("b1001???")
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b(0) should be(BitPat.dontCare(1))
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b(6) should be(BitPat.Y())
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b(5) should be(BitPat.N())
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}
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it should "slice and return new BitPat" in {
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val b = BitPat("b1001???")
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b(2, 0) should be(BitPat("b???"))
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b(4, 3) should be(BitPat("b01"))
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b(6, 6) should be(BitPat("b1"))
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}
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it should "parse UInt literals correctly" in {
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BitPat(0.U) should be(new BitPat(0, 1, 1))
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// Note that this parses as 1-bit width, there are other APIs that don't support zero-width UInts correctly
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BitPat(0.U(0.W)) should be(new BitPat(0, 1, 1))
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BitPat(1.U) should be(new BitPat(1, 1, 1))
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BitPat(2.U) should be(new BitPat(2, 3, 2))
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BitPat(0xdeadbeefL.U) should be(new BitPat(BigInt("deadbeef", 16), BigInt("ffffffff", 16), 32))
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}
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it should "support .hasDontCares" in {
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BitPat("b?").hasDontCares should be(true)
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BitPat("b??").hasDontCares should be(true)
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BitPat("b0?").hasDontCares should be(true)
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BitPat("b?1").hasDontCares should be(true)
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BitPat("b0").hasDontCares should be(false)
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BitPat("b10").hasDontCares should be(false)
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BitPat("b01").hasDontCares should be(false)
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BitPat(0xdeadbeefL.U).hasDontCares should be(false)
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// Zero-width not supported yet
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intercept[IllegalArgumentException] { BitPat("b").hasDontCares should be(false) }
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}
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it should "support .allZeros" in {
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BitPat("b?").allZeros should be(false)
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BitPat("b??").allZeros should be(false)
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BitPat("b0?").allZeros should be(false)
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BitPat("b?1").allZeros should be(false)
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BitPat("b0").allZeros should be(true)
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BitPat("b10").allZeros should be(false)
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BitPat("b01").allZeros should be(false)
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BitPat(0.U(128.W)).allZeros should be(true)
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BitPat.N(23).allZeros should be(true)
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BitPat(0xdeadbeefL.U).allZeros should be(false)
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// Zero-width not supported yet
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intercept[IllegalArgumentException] { BitPat("b").allZeros should be(true) }
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}
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it should "support .allOnes" in {
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BitPat("b?").allOnes should be(false)
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BitPat("b??").allOnes should be(false)
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BitPat("b0?").allOnes should be(false)
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BitPat("b?1").allOnes should be(false)
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BitPat("b0").allOnes should be(false)
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BitPat("b10").allOnes should be(false)
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BitPat("b01").allOnes should be(false)
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BitPat("b1").allOnes should be(true)
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BitPat("b" + ("1" * 128)).allOnes should be(true)
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BitPat.Y(23).allOnes should be(true)
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BitPat(0xdeadbeefL.U).allOnes should be(false)
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// Zero-width not supported yet
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intercept[IllegalArgumentException] { BitPat("b").allOnes should be(true) }
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}
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it should "support .allDontCares" in {
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BitPat("b?").allDontCares should be(true)
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BitPat("b??").allDontCares should be(true)
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BitPat("b0?").allDontCares should be(false)
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BitPat("b?1").allDontCares should be(false)
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BitPat("b0").allDontCares should be(false)
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BitPat("b10").allDontCares should be(false)
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BitPat("b1").allDontCares should be(false)
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BitPat("b" + ("1" * 128)).allDontCares should be(false)
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BitPat.dontCare(23).allDontCares should be(true)
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BitPat(0xdeadbeefL.U).allDontCares should be(false)
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// Zero-width not supported yet
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intercept[IllegalArgumentException] { BitPat("b").allDontCares should be(true) }
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}
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it should "convert to BitPat from ChiselEnum" in {
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val b = BitPat(EnumExample.VAL1)
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val c = BitPat(EnumExample.VAL3)
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b should be(BitPat("b00"))
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c should be(BitPat("b10"))
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}
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}

‎src/test/scala-2/chiselTests/AutoNestedCloneSpec.scala‎

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// SPDX-License-Identifier: Apache-2.0
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package chiselTests
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import chisel3._
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import circt.stage.ChiselStage.emitCHIRRTL
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import org.scalatest.flatspec.AnyFlatSpec
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import org.scalatest.matchers.should.Matchers
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class BundleWithAnonymousInner(val w: Int) extends Bundle {
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val inner = new Bundle {
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val foo = Input(UInt(w.W))
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}
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}
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class AutoNestedCloneSpec extends AnyFlatSpec with Matchers {
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behavior.of("autoCloneType of inner Bundle in Chisel3")
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it should "clone a doubly-nested inner bundle successfully" in {
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emitCHIRRTL {
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class Outer(val w: Int) extends Module {
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class Middle(val w: Int) {
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class InnerIOType extends Bundle {
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val in = Input(UInt(w.W))
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}
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def getIO: InnerIOType = new InnerIOType
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}
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val io = IO(new Bundle {})
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val myWire = Wire((new Middle(w)).getIO)
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}
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new Outer(2)
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}
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}
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it should "clone an anonymous inner bundle successfully" in {
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emitCHIRRTL {
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class TestTop(val w: Int) extends Module {
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val io = IO(new Bundle {})
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val myWire = Wire(new Bundle { val a = UInt(w.W) })
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}
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new TestTop(2)
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}
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}
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it should "pick the correct $outer instance for an anonymous inner bundle" in {
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emitCHIRRTL {
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class Inner(val w: Int) extends Module {
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val io = IO(new Bundle {
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val in = Input(UInt(w.W))
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val out = Output(UInt(w.W))
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})
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}
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class Outer(val w: Int) extends Module {
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val io = IO(new Bundle {
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val in = Input(UInt(w.W))
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val out = Output(UInt(w.W))
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})
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val i = Module(new Inner(w))
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val iw = Wire(chiselTypeOf(i.io))
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iw <> io
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i.io <> iw
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}
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new Outer(2)
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}
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}
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it should "clone an anonymous, bound, inner bundle of another bundle successfully" in {
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emitCHIRRTL {
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class TestModule(w: Int) extends Module {
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val io = IO(new BundleWithAnonymousInner(w))
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val w0 = WireDefault(io)
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val w1 = WireDefault(io.inner)
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}
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new TestModule(8)
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}
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}
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it should "clone an anonymous, inner bundle of a Module, bound to another bundle successfully" in {
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emitCHIRRTL {
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class TestModule(w: Int) extends Module {
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val bun = new Bundle {
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val foo = UInt(w.W)
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}
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val io = IO(new Bundle {
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val inner = Input(bun)
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})
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val w0 = WireDefault(io)
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val w1 = WireDefault(io.inner)
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}
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new TestModule(8)
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}
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}
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it should "clone a double-nested anonymous Bundle" in {
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emitCHIRRTL {
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class TestModule() extends Module {
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val io = IO(new Bundle {
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val inner = Input(new Bundle {
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val x = UInt(8.W)
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})
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})
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}
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new TestModule()
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}
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}
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it should "support an anonymous doubly-nested inner bundle" in {
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emitCHIRRTL {
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class Outer(val w: Int) extends Module {
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class Middle(val w: Int) {
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def getIO: Bundle = new Bundle {
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val in = Input(UInt(w.W))
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}
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}
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val io = IO(new Bundle {})
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val myWire = Wire((new Middle(w)).getIO)
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}
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new Outer(2)
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}
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}
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it should "support anonymous Inner bundles that capture type parameters from outer Bundles" in {
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emitCHIRRTL(new Module {
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class MyBundle[T <: Data](n: Int, gen: T) extends Bundle {
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val foo = new Bundle {
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val x = Input(Vec(n, gen))
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}
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val bar = Output(Option(new { def mkBundle = new Bundle { val x = Vec(n, gen) } }).get.mkBundle)
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}
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val io = IO(new MyBundle(4, UInt(8.W)))
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val myWire = WireInit(io.foo)
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val myWire2 = WireInit(io.bar)
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io.bar.x := io.foo.x
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})
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}
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}

‎src/test/scala-2/chiselTests/ProbeSpec.scala‎

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import circt.stage.ChiselStage
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import org.scalatest.flatspec.AnyFlatSpec
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import org.scalatest.matchers.should.Matchers
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import scala.reflect.Selectable.reflectiveSelectable
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class ProbeSpec extends AnyFlatSpec with Matchers with FileCheck with ChiselSim {
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// Strip SourceInfos and split into lines

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