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lines changed Original file line number Diff line number Diff line change 3232
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3434// Define board type for pin map and default settings.
35- // #define CPU_MAP_SMOOTHIEBOARD // Smoothieboard (NXP LPC1769 MCU)
35+ #define CPU_MAP_SMOOTHIEBOARD // Smoothieboard (NXP LPC1769 MCU)
3636//#define CPU_MAP_C3D_REMIX // Cohesion3D Remix (NXP LPC1769 MCU)
37- #define CPU_MAP_C3D_MINI // Cohesion3D Mini (NXP LPC1769 MCU)
37+ // #define CPU_MAP_C3D_MINI // Cohesion3D Mini (NXP LPC1769 MCU)
3838//#define CPU_MAP_MKS_SBASE // MKS SBASE Board (NXP LPC1768 MCU)
3939//#define CPU_MAP_AZTEEG_X5 // Azteeg X5 Board (NXP LPC1769 MCU)
4040
Original file line number Diff line number Diff line change 426426 #define A_LIMIT_BIT 29 // reuse p1.29 from Z-MAX
427427 #define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
428428
429+ // Define spindle enable and spindle direction output pins.
430+ #define SPINDLE_ENABLE_DDR NotUsed
431+ #define SPINDLE_ENABLE_PORT NotUsed
432+ #define SPINDLE_ENABLE_BIT 30 // P1.30
433+ #define SPINDLE_DIRECTION_DDR LPC_GPIO1->FIODIR
434+ #define SPINDLE_DIRECTION_PORT LPC_GPIO1->FIOPIN
435+ #define SPINDLE_DIRECTION_BIT 31 // P1.31
436+
429437 // Define flood and mist coolant enable output pins.
430438 #define COOLANT_FLOOD_DDR NotUsed
431439 #define COOLANT_FLOOD_PORT NotUsed
652660 #define A_LIMIT_BIT 27 // reuse p1.27, as X-MAX is not used
653661 #define LIMIT_MASK ((1<<X_LIMIT_BIT)|(1<<Y_LIMIT_BIT)|(1<<Z_LIMIT_BIT)|(1<<A_LIMIT_BIT)) // All limit bits
654662
663+ // Define spindle enable and spindle direction output pins.
664+ #define SPINDLE_ENABLE_DDR LPC_GPIO1->FIODIR
665+ #define SPINDLE_ENABLE_PORT LPC_GPIO1->FIOPIN
666+ #define SPINDLE_ENABLE_BIT 30 // P1.30
667+ #define SPINDLE_DIRECTION_DDR LPC_GPIO1->FIODIR
668+ #define SPINDLE_DIRECTION_PORT LPC_GPIO1->FIOPIN
669+ #define SPINDLE_DIRECTION_BIT 31 // P1.31
670+
655671 // Define flood and mist coolant enable output pins.
656672 #define COOLANT_FLOOD_DDR LPC_GPIO2->FIODIR
657673 #define COOLANT_FLOOD_PORT LPC_GPIO2->FIOPIN
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