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SystemVerilog: create identifier expressions in scanner
1 parent 0a1c5ce commit 8d03c57

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2 files changed

+4
-1
lines changed

2 files changed

+4
-1
lines changed

src/hw_cbmc_irep_ids.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -108,6 +108,7 @@ IREP_ID_ONE(verilog_associative_array)
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IREP_ID_ONE(verilog_declarations)
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IREP_ID_ONE(verilog_default_clocking)
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IREP_ID_ONE(verilog_default_disable)
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IREP_ID_ONE(verilog_identifier)
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IREP_ID_ONE(verilog_lifetime)
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IREP_ID_ONE(verilog_logical_equality)
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IREP_ID_ONE(verilog_logical_inequality)

src/verilog/scanner.l

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -66,7 +66,9 @@ static void preprocessor()
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#define IDENTIFIER(text) \
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{ newstack(yyveriloglval); \
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irep_idt irep_id = text; \
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stack_expr(yyveriloglval).id(irep_id); \
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stack_expr(yyveriloglval).id(ID_verilog_identifier); \
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stack_expr(yyveriloglval).set(ID_base_name, irep_id); \
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PARSER.set_source_location(stack_expr(yyveriloglval)); \
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return PARSER.scopes.identifier_token(irep_id); \
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}
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#define KEYWORD(s, x) \

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