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Fix formatting
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9 files changed

+26
-23
lines changed

9 files changed

+26
-23
lines changed

esp-metadata-generated/src/_generated_esp32.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1348,8 +1348,8 @@ macro_rules! define_clock_tree_types {
13481348
/// Clock tree configuration.
13491349
///
13501350
/// The fields of this struct are optional, with the following caveats:
1351-
/// - If `XTL_CLK` is not specified, the crystal frequency will be
1352-
/// automatically detected if possible.
1351+
/// - If `XTL_CLK` is not specified, the crystal frequency will be automatically detected if
1352+
/// possible.
13531353
/// - The CPU and its upstream clock nodes will be set to a default configuration.
13541354
/// - Other unspecified clock sources will not be useable by peripherals.
13551355
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]

esp-metadata-generated/src/_generated_esp32c2.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1087,8 +1087,8 @@ macro_rules! define_clock_tree_types {
10871087
/// Clock tree configuration.
10881088
///
10891089
/// The fields of this struct are optional, with the following caveats:
1090-
/// - If `XTL_CLK` is not specified, the crystal frequency will be
1091-
/// automatically detected if possible.
1090+
/// - If `XTL_CLK` is not specified, the crystal frequency will be automatically detected if
1091+
/// possible.
10921092
/// - The CPU and its upstream clock nodes will be set to a default configuration.
10931093
/// - Other unspecified clock sources will not be useable by peripherals.
10941094
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]

esp-metadata-generated/src/_generated_esp32c3.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -304,8 +304,8 @@ macro_rules! define_clock_tree_types {
304304
/// Clock tree configuration.
305305
///
306306
/// The fields of this struct are optional, with the following caveats:
307-
/// - If `XTL_CLK` is not specified, the crystal frequency will be
308-
/// automatically detected if possible.
307+
/// - If `XTL_CLK` is not specified, the crystal frequency will be automatically detected if
308+
/// possible.
309309
/// - The CPU and its upstream clock nodes will be set to a default configuration.
310310
/// - Other unspecified clock sources will not be useable by peripherals.
311311
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]

esp-metadata-generated/src/_generated_esp32c6.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -310,8 +310,8 @@ macro_rules! define_clock_tree_types {
310310
/// Clock tree configuration.
311311
///
312312
/// The fields of this struct are optional, with the following caveats:
313-
/// - If `XTL_CLK` is not specified, the crystal frequency will be
314-
/// automatically detected if possible.
313+
/// - If `XTL_CLK` is not specified, the crystal frequency will be automatically detected if
314+
/// possible.
315315
/// - The CPU and its upstream clock nodes will be set to a default configuration.
316316
/// - Other unspecified clock sources will not be useable by peripherals.
317317
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]

esp-metadata-generated/src/_generated_esp32h2.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -295,8 +295,8 @@ macro_rules! define_clock_tree_types {
295295
/// Clock tree configuration.
296296
///
297297
/// The fields of this struct are optional, with the following caveats:
298-
/// - If `XTL_CLK` is not specified, the crystal frequency will be
299-
/// automatically detected if possible.
298+
/// - If `XTL_CLK` is not specified, the crystal frequency will be automatically detected if
299+
/// possible.
300300
/// - The CPU and its upstream clock nodes will be set to a default configuration.
301301
/// - Other unspecified clock sources will not be useable by peripherals.
302302
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]

esp-metadata-generated/src/_generated_esp32s2.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -295,8 +295,8 @@ macro_rules! define_clock_tree_types {
295295
/// Clock tree configuration.
296296
///
297297
/// The fields of this struct are optional, with the following caveats:
298-
/// - If `XTL_CLK` is not specified, the crystal frequency will be
299-
/// automatically detected if possible.
298+
/// - If `XTL_CLK` is not specified, the crystal frequency will be automatically detected if
299+
/// possible.
300300
/// - The CPU and its upstream clock nodes will be set to a default configuration.
301301
/// - Other unspecified clock sources will not be useable by peripherals.
302302
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]

esp-metadata-generated/src/_generated_esp32s3.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -298,8 +298,8 @@ macro_rules! define_clock_tree_types {
298298
/// Clock tree configuration.
299299
///
300300
/// The fields of this struct are optional, with the following caveats:
301-
/// - If `XTL_CLK` is not specified, the crystal frequency will be
302-
/// automatically detected if possible.
301+
/// - If `XTL_CLK` is not specified, the crystal frequency will be automatically detected if
302+
/// possible.
303303
/// - The CPU and its upstream clock nodes will be set to a default configuration.
304304
/// - Other unspecified clock sources will not be useable by peripherals.
305305
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]

esp-metadata/src/cfg/soc.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -270,8 +270,8 @@ impl SystemClocks {
270270
/// Clock tree configuration.
271271
///
272272
/// The fields of this struct are optional, with the following caveats:
273-
/// - If `XTL_CLK` is not specified, the crystal frequency will be
274-
/// automatically detected if possible.
273+
/// - If `XTL_CLK` is not specified, the crystal frequency will be automatically detected if
274+
/// possible.
275275
/// - The CPU and its upstream clock nodes will be set to a default configuration.
276276
/// - Other unspecified clock sources will not be useable by peripherals.
277277
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]

xtask/src/lib.rs

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -824,14 +824,17 @@ fn format_package_path(
824824
}
825825

826826
cargo_args.push("--".into());
827-
if let Some(rules) = format_rules {
828-
cargo_args.push(format!("--config-path={}", rules.display()));
827+
let mut config_file_path = PathBuf::new();
828+
let config_file = if let Some(rules) = format_rules {
829+
rules
829830
} else {
830-
cargo_args.push(format!(
831-
"--config-path={}/rustfmt.toml",
832-
workspace.display()
833-
));
834-
}
831+
config_file_path = package_path.join("rustfmt.toml");
832+
if !config_file_path.exists() {
833+
config_file_path = workspace.join("rustfmt.toml");
834+
}
835+
&config_file_path
836+
};
837+
cargo_args.push(format!("--config-path={}", config_file.display()));
835838
cargo_args.extend(source_files);
836839

837840
log::debug!("{cargo_args:#?}");

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