Frontier: OPENRECOMP_IR_V1_AOT_TRANSLATOR_V1
Status: PASS — bounded dual-architecture AOT equivalence
This frontier adds the first common ahead-of-time backend that consumes normalized OpenRecomp IR V1 rather than guest-specific instruction records.
The backend is intentionally simple and inspectable: validated IR V1 + Module Image V1 are translated deterministically into portable C, then compiled to native code. The resulting native module is executed independently of the Python ReferenceExecutor and compared against the existing reference result.
RV32I frontend/bridge ----+
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v
normalized IR V1
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MIPS32 frontend -----------+
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v
Module Image V1
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v
portable C AOT V1
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generated C
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+---------+---------+
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v v
GCC Clang
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+---------+---------+
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v
private execution surface
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v
Native AOT ABI V1
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v
native host
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v
Core API comparison
The AOT backend contains no RV32I or MIPS32 opcode semantics. Guest-specific rules, including MIPS32 delay slots, are already normalized by the architecture frontend before the common backend sees the program.
tools/aot_c_backend_v1.py accepts:
Module Image V1
normalized IR V1
host contract
It loads those through the existing fail-closed ModuleImage validation path before generating code. This binds translation to the exact IR hash, source provenance, host-contract version/hash, initialized memory, typed initial state, entry point and deterministic limits.
The generated portable C contains a compact architecture-neutral execution surface:
openrecomp_set_host_callback
openrecomp_run
openrecomp_observed_state
openrecomp_function_return
openrecomp_function_has_return
openrecomp_operations
openrecomp_state_count
openrecomp_state_name
openrecomp_state_value
openrecomp_memory_size
openrecomp_memory_read
openrecomp_error
These functions are now treated as a private link-time implementation surface for finished Native AOT ABI V1 modules. They are not the public compatibility contract.
NATIVE_AOT_ABI_V1.md defines the versioned host-facing binary boundary. The current Linux proof links the generated C with a deterministic ABI adapter under hidden default symbol visibility and exposes openrecomp_native_aot_query as the stable OpenRecomp entry point.
Host calls remain external to guest translation. The RV32I proof binds the existing deterministic E07 host behavior through the Native AOT ABI V1 callback bridge; the bounded MIPS32 vertical slice requires no host calls.
The backend lowers the normalized V1 operation families used by the current fixtures:
- constants and typed state reads/writes;
- integer arithmetic and bitwise operations;
- signed/unsigned comparisons;
- casts and selects;
- bounded/aligned guest-memory loads and stores;
- direct calls;
- named host calls;
- direct branches/jumps;
- bounded indirect jumps;
- returns and traps.
Execution retains the Module Image V1 operation limit and call-depth limit. Memory faults, misalignment faults, failed host calls, invalid indirect targets and unsupported behavior fail closed.
Each architecture input is translated twice and the generated C files must be byte-identical:
OPENRECOMP_AOT_RV32I_C_DETERMINISTIC=PASS
OPENRECOMP_AOT_MIPS32_C_DETERMINISTIC=PASS
The same generated source is compiled independently with GCC and Clang. Both compiler outputs must produce byte-identical result JSON for each fixture:
OPENRECOMP_AOT_RV32I_COMPILER_PARITY=PASS
OPENRECOMP_AOT_MIPS32_COMPILER_PARITY=PASS
Compiler binaries themselves are not expected to be byte-identical; behavioral parity is the gate.
The AOT native module reproduces the proven E07/Core API result:
AOT_E07_CHECKSUM=122010428
AOT_E07_RETURN_A0=48
AOT_E07_OPERATIONS=3866
OPENRECOMP_AOT_E07_V1=PASS
The final AOT JSON is required to equal the Core API V1 JSON exactly, including deterministic host counters and framebuffer/audio payload hashes.
The same AOT backend consumes the MIPS32 vertical slice's normalized IR and reproduces its Core API result:
AOT_MIPS32_V0=31
AOT_MIPS32_CHECKSUM=1950232098
AOT_MIPS32_OPERATIONS=100
OPENRECOMP_AOT_MIPS32_V1=PASS
The comparison includes complete normalized register state, observable memory, function return, operation count, source provenance and checksum.
The final gate requires both architectures to match their independent Core API reference paths exactly:
OPENRECOMP_IR_V1_AOT_RV32I=PASS
OPENRECOMP_IR_V1_AOT_MIPS32=PASS
OPENRECOMP_IR_V1_AOT_DUAL_ARCH=PASS
This is execution-backed evidence that a single common AOT backend can consume normalized code originating from two materially different guest architectures.
The follow-on AOT_HARDENING_V1.md gate strengthens the compiler-quality evidence without changing IR V1 or expanding the supported guest claim.
The existing RV32I and MIPS32 generated sources compile under GCC and Clang with -Wall -Wextra -Werror. A separate synthetic normalized-IR corpus exercises all current integer binops, all current comparisons and casts, select, state operations, memory operations, direct calls, structured control flow, bounded indirect control flow, little-endian execution and big-endian execution.
Nine deterministic runtime-fault programs additionally require Core API/AOT category agreement for memory OOB, misalignment, operation limits, invalid shift counts, traps, invalid bounded-indirect targets, call-depth limits, host failures and void host returns. The positive little/big-endian modules also run under GCC and Clang ASan+UBSan.
The hardening gate reports:
AOT_HARDENING_POSITIVE=2147483672
AOT_HARDENING_FAULT_CASES=9
OPENRECOMP_AOT_HARDENING_WARNING_CLEAN=PASS
OPENRECOMP_AOT_HARDENING_FAULT_EQUIVALENCE=PASS
OPENRECOMP_AOT_HARDENING_GCC_SANITIZERS=PASS
OPENRECOMP_AOT_HARDENING_CLANG_SANITIZERS=PASS
OPENRECOMP_AOT_HARDENING_V1=PASS
OPENRECOMP_NATIVE_AOT_ABI_V1 adds the first frozen-for-portability-testing public binary boundary around the already validated backend. Its adapter is generated twice per module and required to be byte-identical. RV32I and MIPS32 modules then execute through the V1 query/function table under both GCC and Clang while retaining the established AOT results.
The ABI gate additionally checks exact version/structure-size rejection, metadata/provenance exposure, host negotiation, loader behavior and hidden legacy implementation symbols.
The translator and hardening PASSes establish the portable C AOT backend for the current clean synthetic RV32I and MIPS32 workloads plus the dedicated hardening corpus. Native AOT ABI V1 separately freezes the first host-facing contract for portability testing.
These results do not yet establish:
- arbitrary RV32I or MIPS32 binaries;
- full MIPS32 ISA/ABI coverage;
- production optimization correctness across arbitrary programs;
- Windows/macOS Native AOT ABI parity;
- 32-bit host ABI compatibility;
- WebAssembly compilation of the new AOT backend;
- a release-quality production compiler pipeline;
- proprietary console executable support.
Those remain separate validation frontiers.