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[Enhancement] Allow glob patterns when defining source files list in hdl-prj.json #80

@pidgeon777

Description

@pidgeon777

Most of the common VHDL LSP providers (VHDL-Tool, hdl_checker, rust_hdl) allow to use glob patterns in the source files list, in their project configuration files:

/*
     * Sources can be defined solely by their individual paths or glob patterns.
     * Absolute paths are unchanged, relative paths are made absolute by using
     * the path to the configuration file. Sources imported from an included file
     * will follow the same principle but using the path to the included path.
     */
    "some/vhdl/file.vhd",
    "some/verilog/file.v",
    "some/systemverilog/file.sv",
    "vhdl/files/only/*.vhd",
    "all/files/recursively/**/*",

It is possible to define a source file:

  • With relative or absolute path.
  • With glob patterns.
  • Recursively.

Actually, with GHDL-LSP it is not possible to do this. It would be great to add at least the recursive function so that it won't be needed to manually define all of the source files included in a project.

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