From ca83c08ee32de3d16714ad1723014e379e425469 Mon Sep 17 00:00:00 2001 From: Volodymyr Kysenko Date: Fri, 7 Mar 2025 15:25:18 -0800 Subject: [PATCH] Disable SVE patterns changed with LLVM trunk --- test/correctness/simd_op_check_sve2.cpp | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/test/correctness/simd_op_check_sve2.cpp b/test/correctness/simd_op_check_sve2.cpp index cefa4d14aaab..9cb42103b75b 100644 --- a/test/correctness/simd_op_check_sve2.cpp +++ b/test/correctness/simd_op_check_sve2.cpp @@ -699,10 +699,14 @@ class SimdOpCheckArmSve : public SimdOpCheckTest { Expr load_store_1 = in_im(x) * 3; if (has_sve()) { - // in native width, ld1b/st1b is used regardless of data type - const bool allow_byte_ls = (width == target.vector_bits); - add({get_sve_ls_instr("ld1", bits, bits, "", allow_byte_ls ? "b" : "")}, total_lanes, load_store_1); - add({get_sve_ls_instr("st1", bits, bits, "", allow_byte_ls ? "b" : "")}, total_lanes, load_store_1); + // This pattern has changed with LLVM 21, see https://github.com/halide/Halide/issues/8584 for more + // details. + if (Halide::Internal::get_llvm_version() <= 200) { + // in native width, ld1b/st1b is used regardless of data type + const bool allow_byte_ls = (width == target.vector_bits); + add({get_sve_ls_instr("ld1", bits, bits, "", allow_byte_ls ? "b" : "")}, total_lanes, load_store_1); + add({get_sve_ls_instr("st1", bits, bits, "", allow_byte_ls ? "b" : "")}, total_lanes, load_store_1); + } } else { // vector register is not used for simple load/store string reg_prefix = (width <= 64) ? "d" : "q";