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pthamminigcbot
pthammin
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igcbot
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Refactor SIMDInfo
Refactor SIMDInfo
1 parent 21fcf90 commit e653864

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8 files changed

+84
-42
lines changed

8 files changed

+84
-42
lines changed

‎IGC/AdaptorOCL/OCL/KernelAnnotations.hpp

+5-1
Original file line numberDiff line numberDiff line change
@@ -324,7 +324,11 @@ struct ExecutionEnvironment
324324
DWORD WorkgroupWalkOrder[3] = {};
325325
bool HasGlobalAtomics = false;
326326
bool UseBindlessMode = false;
327-
uint64_t SIMDInfo = 0;
327+
uint32_t simd8_SIMDInfo = 0;
328+
uint32_t simd16_SIMDInfo = 0;
329+
uint32_t simd32_SIMDInfo = 0;
330+
uint32_t dual_simd8_SIMDInfo = 0;
331+
uint32_t quad_simd8_dynamic_SIMDInfo = 0;
328332
bool HasDPAS = false;
329333
bool HasRTCalls = false;
330334
DWORD StatelessWritesCount = 0;

‎IGC/AdaptorOCL/OCL/Patch/patch_parser.cpp

+14-2
Original file line numberDiff line numberDiff line change
@@ -937,8 +937,20 @@ void DebugPatchList(
937937
"\tHasStackCalls = %d\n",
938938
pPatchItem->HasStackCalls);
939939
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
940-
"\tSIMDInfo = %lld\n",
941-
pPatchItem->SIMDInfo);
940+
"\tsimd8_SIMDInfo = %d\n",
941+
pPatchItem->simd8_SIMDInfo);
942+
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
943+
"\tsimd16_SIMDInfo = %d\n",
944+
pPatchItem->simd16_SIMDInfo);
945+
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
946+
"\tsimd32_SIMDInfo = %d\n",
947+
pPatchItem->simd32_SIMDInfo);
948+
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
949+
"\tdual_simd8_SIMDInfo = %d\n",
950+
pPatchItem->dual_simd8_SIMDInfo);
951+
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
952+
"\tquad_simd8_dynamic_SIMDInfo = %d\n",
953+
pPatchItem->quad_simd8_dynamic_SIMDInfo);
942954
ICBE_DPF_STR(output, GFXDBG_HARDWARE,
943955
"\tRequireDisableEUFusion = %s\n",
944956
pPatchItem->RequireDisableEUFusion ? "true" : "false");

‎IGC/AdaptorOCL/OCL/sp/sp_g8.cpp

+8-1
Original file line numberDiff line numberDiff line change
@@ -2109,7 +2109,14 @@ RETVAL CGen8OpenCLStateProcessor::CreatePatchList(
21092109

21102110
patch.UseBindlessMode = annotations.m_executionEnvironment.UseBindlessMode;
21112111
patch.HasStackCalls = annotations.m_executionEnvironment.HasStackCalls;
2112-
patch.SIMDInfo = annotations.m_executionEnvironment.SIMDInfo;
2112+
2113+
// Copying simdinfo from ExecutionEnvironment to SPatchExecutionEnvironment
2114+
patch.simd8_SIMDInfo = annotations.m_executionEnvironment.simd8_SIMDInfo;
2115+
patch.simd16_SIMDInfo = annotations.m_executionEnvironment.simd16_SIMDInfo;
2116+
patch.simd32_SIMDInfo = annotations.m_executionEnvironment.simd32_SIMDInfo;
2117+
patch.dual_simd8_SIMDInfo = annotations.m_executionEnvironment.dual_simd8_SIMDInfo;
2118+
patch.quad_simd8_dynamic_SIMDInfo = annotations.m_executionEnvironment.quad_simd8_dynamic_SIMDInfo;
2119+
21132120
patch.RequireDisableEUFusion = annotations.m_executionEnvironment.RequireDisableEUFusion;
21142121

21152122
retValue = AddPatchItem(

‎IGC/AdaptorOCL/ocl_igc_shared/executable_format/patch_list.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ Abstract: Contains common patch structure definitions
1616

1717
namespace iOpenCL
1818
{
19-
const uint32_t CURRENT_ICBE_VERSION = 1082;
19+
const uint32_t CURRENT_ICBE_VERSION = 1083;
2020
const uint32_t MAGIC_CL = 0x494E5443; // 'I', 'N', 'T', 'C'
2121
const uint32_t INVALID_INDEX = 0xFFFFFFFF;
2222

‎IGC/AdaptorOCL/ocl_igc_shared/executable_format/patch_shared.h

+6-2
Original file line numberDiff line numberDiff line change
@@ -205,12 +205,16 @@ struct SPatchExecutionEnvironment :
205205
uint32_t IndirectStatelessCount;
206206
uint32_t UseBindlessMode;
207207
uint32_t HasStackCalls;
208-
uint64_t SIMDInfo;
209208
uint32_t RequireDisableEUFusion;
209+
uint32_t simd8_SIMDInfo;
210+
uint32_t simd16_SIMDInfo;
211+
uint32_t simd32_SIMDInfo;
212+
uint32_t dual_simd8_SIMDInfo;
213+
uint32_t quad_simd8_dynamic_SIMDInfo;
210214
};
211215

212216
// Update CURRENT_ICBE_VERSION when modifying the patch list
213-
static_assert(sizeof(SPatchExecutionEnvironment) == (136 + sizeof(SPatchItemHeader)), "The size of SPatchExecutionEnvironment is not what is expected");
217+
static_assert( sizeof(SPatchExecutionEnvironment) == ( 148 + sizeof(SPatchItemHeader) ), "The size of SPatchExecutionEnvironment is not what is expected" );
214218

215219
/*****************************************************************************\
216220
STRUCT: SPatchString

‎IGC/Compiler/CISACodeGen/OpenCLKernelCodeGen.cpp

+7-1
Original file line numberDiff line numberDiff line change
@@ -2844,7 +2844,13 @@ namespace IGC
28442844
m_Context->SetSIMDInfo(SIMD_SELECTED, simdMode, ShaderDispatchMode::NOT_APPLICABLE);
28452845

28462846
m_kernelInfo.m_executionEnvironment.CompiledSIMDSize = numLanes(simdMode);
2847-
m_kernelInfo.m_executionEnvironment.SIMDInfo = m_Context->GetSIMDInfo();
2847+
2848+
// Copying simdinfo from CodeGenContext to ExecutionEnvironment
2849+
m_kernelInfo.m_executionEnvironment.simd8_SIMDInfo = m_Context->GetSimd8SIMDInfo();
2850+
m_kernelInfo.m_executionEnvironment.simd16_SIMDInfo = m_Context->GetSimd16SIMDInfo();
2851+
m_kernelInfo.m_executionEnvironment.simd32_SIMDInfo = m_Context->GetSimd32SIMDInfo();
2852+
m_kernelInfo.m_executionEnvironment.dual_simd8_SIMDInfo = m_Context->GetDualSimd8SIMDInfo();
2853+
m_kernelInfo.m_executionEnvironment.quad_simd8_dynamic_SIMDInfo = m_Context->GetQuadSimd8DynamicSIMDInfo();
28482854

28492855
m_kernelInfo.m_executionEnvironment.PerThreadPrivateMemoryUsage =
28502856
pOutput->m_UseScratchSpacePrivateMemory ?

‎IGC/Compiler/CodeGenContext.cpp

+5-1
Original file line numberDiff line numberDiff line change
@@ -459,7 +459,11 @@ namespace IGC
459459
PRINT_CTX_MEMBER(m_NumGRFPerThread);
460460
PRINT_CTX_MEMBER(m_numPasses);
461461
PRINT_CTX_MEMBER(m_sampler);
462-
PRINT_CTX_MEMBER(m_SIMDInfo);
462+
PRINT_CTX_MEMBER(m_simd8_SIMDInfo);
463+
PRINT_CTX_MEMBER(m_simd16_SIMDInfo);
464+
PRINT_CTX_MEMBER(m_simd32_SIMDInfo);
465+
PRINT_CTX_MEMBER(m_dual_simd8_SIMDInfo);
466+
PRINT_CTX_MEMBER(m_quad_simd8_dynamic_SIMDInfo);
463467
PRINT_CTX_MEMBER(m_src1RemovedForBlendOpt);
464468
PRINT_CTX_MEMBER(m_tempCount);
465469
PRINT_CTX_MEMBER(m_threadCombiningOptDone);

‎IGC/Compiler/CodeGenPublic.h

+38-33
Original file line numberDiff line numberDiff line change
@@ -446,16 +446,7 @@ namespace IGC
446446
SIMD_SKIP_ML, // 8: skip this SIMD due to ML engine prediction.
447447
SIMD_FORCE_CONTENT, // 9: force this simd due to shader content (simd32 if WaveActive, barriers + interlocks)
448448
SIMD_FORCE_HINT, // 10: force this simd by hint(s) (now for WaveSize only)
449-
SIMD_INFO_RESERVED // 11: *** If new entry is added, make sure it still fits in m_SIMDInfo ***
450-
};
451-
452-
enum SIMDInfoOffset
453-
{
454-
SIMD8_OFFSET = 0,
455-
SIMD16_OFFSET = SIMD_INFO_RESERVED,
456-
SIMD32_OFFSET = SIMD_INFO_RESERVED*2,
457-
DUAL_SIMD8_OFFSET = SIMD_INFO_RESERVED * 3,
458-
QUAD_SIMD8_DYNAMIC_OFFSET = SIMD_INFO_RESERVED*6,
449+
SIMD_INFO_RESERVED // 11: *** If new entry is added, make sure it still fits in each m_SIMDInfo Ex:m_simd8_SIMDInfo ***
459450
};
460451

461452
struct SKernelProgram
@@ -493,7 +484,11 @@ namespace IGC
493484

494485
SSimplePushInfo simplePushInfoArr[g_c_maxNumberOfBufferPushed];
495486

496-
uint64_t SIMDInfo = 0;
487+
uint32_t simd8_SIMDInfo = 0;
488+
uint32_t simd16_SIMDInfo = 0;
489+
uint32_t simd32_SIMDInfo = 0;
490+
uint32_t dual_simd8_SIMDInfo = 0;
491+
uint32_t quad_simd8_dynamic_SIMDInfo = 0;
497492
void* m_StagingCtx;
498493
bool m_RequestStage2;
499494
};
@@ -1019,7 +1014,11 @@ namespace IGC
10191014
std::vector<int> m_gsNonDefaultIdxMap;
10201015
std::vector<int> m_psIdxMap;
10211016
DWORD LtoUsedMask = 0;
1022-
uint64_t m_SIMDInfo = 0;
1017+
uint32_t m_simd8_SIMDInfo = 0;
1018+
uint32_t m_simd16_SIMDInfo = 0;
1019+
uint32_t m_simd32_SIMDInfo = 0;
1020+
uint32_t m_dual_simd8_SIMDInfo = 0;
1021+
uint32_t m_quad_simd8_dynamic_SIMDInfo = 0;
10231022
uint32_t HdcEnableIndexSize = 0;
10241023
std::vector<RoutingIndex> HdcEnableIndexValues;
10251024

@@ -1065,7 +1064,7 @@ namespace IGC
10651064
const bool createResourceDimTypes = true,
10661065
LLVMContextWrapper* LLVMContext = nullptr)///< LLVM context to use, if null a new one will be created
10671066
: type(_type), platform(_platform), btiLayout(_bitLayout), m_DriverInfo(driverInfo),
1068-
llvmCtxWrapper(LLVMContext), m_SIMDInfo(0)
1067+
llvmCtxWrapper(LLVMContext)
10691068
{
10701069
if (llvmCtxWrapper == nullptr)
10711070
{
@@ -1167,57 +1166,63 @@ namespace IGC
11671166

11681167
bool isSWSubTriangleOpacityCullingEmulationEnabled() const;
11691168

1170-
unsigned int GetSIMDInfoOffset(SIMDMode simd, ShaderDispatchMode mode)
1171-
{
1172-
unsigned int offset = 0;
1169+
enum Action { Set, Clear };
11731170

1174-
switch (mode) {
1171+
// ModifySIMDInfo is used by both Set and ClearSIMDInfo. Since Clear function doesn't have bit information, it defaults
1172+
// to SIMD_INFO_RESERVED if the argument is not passed. bit will not be used when action is Action::clear
1173+
void ModifySIMDInfo(SIMDMode simd, ShaderDispatchMode mode, Action action, SIMDInfoBit bit = SIMD_INFO_RESERVED)
1174+
{
1175+
uint32_t bit_value = 1UL << bit;
1176+
bool clear = action == Action::Clear ? true : false;
1177+
switch (mode)
1178+
{
11751179
case ShaderDispatchMode::NOT_APPLICABLE:
1176-
switch (simd) {
1180+
switch (simd)
1181+
{
11771182
case SIMDMode::SIMD8:
1178-
offset = SIMD8_OFFSET;
1183+
m_simd8_SIMDInfo = clear ? 0 : m_simd8_SIMDInfo | bit_value;
11791184
break;
11801185
case SIMDMode::SIMD16:
1181-
offset = SIMD16_OFFSET;
1186+
m_simd16_SIMDInfo = clear ? 0 : m_simd16_SIMDInfo | bit_value;
11821187
break;
11831188
case SIMDMode::SIMD32:
1184-
offset = SIMD32_OFFSET;
1189+
m_simd32_SIMDInfo = clear ? 0 : m_simd32_SIMDInfo | bit_value;
11851190
break;
11861191
default:
1192+
IGC_ASSERT_MESSAGE(0, "Unknown SIMD Mode");
11871193
break;
11881194
}
11891195
break;
11901196

11911197
case ShaderDispatchMode::DUAL_SIMD8:
1192-
offset = DUAL_SIMD8_OFFSET;
1198+
m_dual_simd8_SIMDInfo = clear ? 0 : m_dual_simd8_SIMDInfo | bit_value;
11931199
break;
11941200
case ShaderDispatchMode::QUAD_SIMD8_DYNAMIC:
1195-
offset = QUAD_SIMD8_DYNAMIC_OFFSET;
1201+
m_quad_simd8_dynamic_SIMDInfo = clear ? 0 : m_quad_simd8_dynamic_SIMDInfo | bit_value;
11961202
break;
11971203

11981204
default:
1205+
IGC_ASSERT_MESSAGE(0, "Unknown SIMD Mode");
11991206
break;
12001207
}
1201-
IGC_ASSERT(offset < 64);
1202-
return offset;
12031208
}
12041209

12051210
void SetSIMDInfo(SIMDInfoBit bit, SIMDMode simd, ShaderDispatchMode mode)
12061211
{
1207-
unsigned int offset = GetSIMDInfoOffset(simd, mode);
1208-
unsigned int shift = bit + offset;
1209-
IGC_ASSERT(shift < 64);
1210-
m_SIMDInfo |= 1ULL << shift;
1212+
IGC_ASSERT(bit < SIMD_INFO_RESERVED);
1213+
ModifySIMDInfo(simd, mode, Action::Set, bit);
12111214
}
12121215

12131216
void ClearSIMDInfo(SIMDMode simd, ShaderDispatchMode mode)
12141217
{
1215-
unsigned int offset = GetSIMDInfoOffset(simd, mode);
1216-
IGC_ASSERT(offset < 64);
1217-
m_SIMDInfo &= ~(0xffULL << offset);
1218+
ModifySIMDInfo(simd, mode, Action::Clear);
12181219
}
12191220

1220-
uint64_t GetSIMDInfo() { return m_SIMDInfo; }
1221+
uint32_t GetSimd8SIMDInfo() const { return m_simd8_SIMDInfo; }
1222+
uint32_t GetSimd16SIMDInfo() const { return m_simd16_SIMDInfo; }
1223+
uint32_t GetSimd32SIMDInfo() const { return m_simd32_SIMDInfo; }
1224+
uint32_t GetDualSimd8SIMDInfo() const { return m_dual_simd8_SIMDInfo; }
1225+
uint32_t GetQuadSimd8DynamicSIMDInfo() const { return m_quad_simd8_dynamic_SIMDInfo; }
12211226

12221227
SIMDMode GetSIMDMode() const;
12231228

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