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AMX: XED allows illegal register combinations #303

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flobernd opened this issue Sep 14, 2023 · 4 comments
Closed

AMX: XED allows illegal register combinations #303

flobernd opened this issue Sep 14, 2023 · 4 comments
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accepted upcoming release A fix/support will be available with the upcoming external release

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@flobernd
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flobernd commented Sep 14, 2023

Hi there,

regarding to the SDM, the exception class AMX-E4 includes the following condition:

#UD if srcdest == src1 OR src1 == src2 OR srcdest == src2

Currently XED allows to decode AMX instructions that do violate this condition. For example:

> xed-ex1 -64 C4 E2 79 5E DB
Attempting to decode: c4 e2 79 5e db
iclass TDPBUSD  category AMX_TILE       ISA-extension AMX_INT8  ISA-set AMX_INT8
instruction-length 5
operand-width 32
effective-operand-width 32
effective-address-width 64
stack-address-width 64
iform-enum-name TDPBUSD_TMMi32_TMMu32_TMMu32
iform-enum-name-dispatch (zero based) 0
iclass-max-iform-dispatch 1
Nominal opcode position 3
Nominal opcode 0x5e
Operands
#   TYPE               DETAILS        VIS  RW       OC2 BITS BYTES NELEM ELEMSZ   ELEMTYPE   REGCLASS
#   ====               =======        ===  ==       === ==== ===== ===== ======   ========   ========
0   REG0             REG0=TMM3   EXPLICIT  RW        TV    0     0     0     32        INT       TREG
1   REG1             REG1=TMM3   EXPLICIT   R        TV    0     0     0     32       UINT       TREG
2   REG2             REG2=TMM0   EXPLICIT   R        TV    0     0     0     32       UINT       TREG
Memory Operands
  MemopBytes = 0
ATTRIBUTES: NOTSX
MANDATORY 66 PREFIX
EXCEPTION TYPE: AMX_E4
AMX
ISA SET: [AMX_INT8]
0       CPUID GROUP NAME: [AMX_INT8]
        0       CPUID RECORD NAME: [AMX_TILES]
                {Leaf 0x00000007, subleaf 0x00000000, EDX[24:24]} = 1
        1       CPUID RECORD NAME: [AMX_INT8]
                {Leaf 0x00000007, subleaf 0x00000000, EDX[25:25]} = 1
tdpbusd tmm3, tmm3, tmm0

This behavior is inconsistent to e.g. the GATHER instructions which do have similar constraints. XED correctly rejects these forms.

@marjevan
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Hi,
For now, XED does not support illegal tile combination checks (as mentioned above).
Once available, we will publish an announcement within the external release notes.

@flobernd
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No hurries 🙂 I just noticed that while comparing XED decoder output to Zydis decoder output and wanted to let you know!

@marjevan
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Support will be available with the upcoming external release.

@marjevan marjevan added accepted upcoming release A fix/support will be available with the upcoming external release and removed acknowledged labels Mar 26, 2024
@marjevan
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marjevan commented Apr 3, 2024

Solved this in 6d87b54

@marjevan marjevan closed this as completed Apr 3, 2024
andreas-abel pushed a commit to andreas-abel/XED-to-XML that referenced this issue Mar 23, 2025
This release updates XED according to Intel's latest APX spec (Rev-04), April 2024.
It includes:
  - Remove promoted SHA and KeyLocker EVEX instructions
  - Encoding update for URDMSR/UWRMSR
  - Addition of missing CPUID sensitivity for promoted POPCNT EVEX instruction
  - Update the handling of EVEX.U and reinterpretation to X4


General:
  - Enable a secured build using a new `--security-level` mfile.py knob (1->Medium, 2->High, 3->Highest).
    The default level is 1 (will be raised to 2 in a future release)
    Please expect performance degradation with level 3.
  - Drop the ICC/ICL build options using mfile.py

Add:
  - AMX: Support the restriction of illegal register combination (Solves intelxed#303)
  - Disassembler: Print sequential registers using "+(N-1)" notation
  - Add ENC2 support for Intel APX architecture (TBD: REX2 for EGPR support)
  - Add ENC2 support for KOP instructions

Fix:
  - ISA definition fixes (APX/MOVDIR64B missing operands, Fix CPUID for SYS{ENTER,EXIT}, fix MMX extensions)
  - RFLAGS: Fix width definition and wrong duplicated operands for several instructions (Solves intelxed#320)
  - Fix CPL definition for ENQCMDS (Solves intelxed#311)
  - Fix CPL definition for LGDT (Solves intelxed#312) 
  - Fix CPL definition for VMCALL (Solves intelxed#313)
  - Several bug fixes and improvements for the ENC2 library. 
     For a list of unsupported IFORMS, please check the `enc2_unsupported_ref.json` file.
  - Fix build with the clang built of llvm-project trunk (Solves intelxed#315)
  
Modify:
  - Improve Python code quality 
    (Solves intelxed#314)
    (Solves intelxed#317)


We express our gratitude to all members of the XED community for their valuable contributions.


Co-authored-by: marjevan <[email protected]>
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