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VMCALL should have CPL=0 #313
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Thanks for your report. |
Solved this in 6d87b54 |
andreas-abel
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Mar 23, 2025
This release updates XED according to Intel's latest APX spec (Rev-04), April 2024. It includes: - Remove promoted SHA and KeyLocker EVEX instructions - Encoding update for URDMSR/UWRMSR - Addition of missing CPUID sensitivity for promoted POPCNT EVEX instruction - Update the handling of EVEX.U and reinterpretation to X4 General: - Enable a secured build using a new `--security-level` mfile.py knob (1->Medium, 2->High, 3->Highest). The default level is 1 (will be raised to 2 in a future release) Please expect performance degradation with level 3. - Drop the ICC/ICL build options using mfile.py Add: - AMX: Support the restriction of illegal register combination (Solves intelxed#303) - Disassembler: Print sequential registers using "+(N-1)" notation - Add ENC2 support for Intel APX architecture (TBD: REX2 for EGPR support) - Add ENC2 support for KOP instructions Fix: - ISA definition fixes (APX/MOVDIR64B missing operands, Fix CPUID for SYS{ENTER,EXIT}, fix MMX extensions) - RFLAGS: Fix width definition and wrong duplicated operands for several instructions (Solves intelxed#320) - Fix CPL definition for ENQCMDS (Solves intelxed#311) - Fix CPL definition for LGDT (Solves intelxed#312) - Fix CPL definition for VMCALL (Solves intelxed#313) - Several bug fixes and improvements for the ENC2 library. For a list of unsupported IFORMS, please check the `enc2_unsupported_ref.json` file. - Fix build with the clang built of llvm-project trunk (Solves intelxed#315) Modify: - Improve Python code quality (Solves intelxed#314) (Solves intelxed#317) We express our gratitude to all members of the XED community for their valuable contributions. Co-authored-by: marjevan <[email protected]>
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Currently in this file the VMCALL instruction has CPL=3, however in Intel's SDM Volume 3 Chapter 31.3 "VMCALL—Call to VM Monitor", it specifies the following operation:
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