Wrong BASE1 for MOVDIR64B?

[a0rland0]

Hi.
For MOVDIR64B, shouldn't BASE1 be A_GPR_B()?

{
ICLASS: MOVDIR64B
CPL: 3
CATEGORY: MOVDIR
EXTENSION: MOVDIR
ISA_SET: MOVDIR64B
REAL_OPCODE: Y
ATTRIBUTES: REQUIRES_ALIGNMENT
PATTERN: 0x0F 0x38 0xF8 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() osz_refining_prefix not64
OPERANDS: REG0=A_GPR_R():r MEM0:r:zd:u32 MEM1:w:zd:SUPP BASE1=A_GPR_R():r:SUPP SEG1=XED_REG_ES:r:SUPP
IFORM: MOVDIR64B_GPRa_MEM

PATTERN: 0x0F 0x38 0xF8 MOD[mm] MOD!=3 REG[rrr] RM[nnn] MODRM() osz_refining_prefix mode64
OPERANDS: REG0=A_GPR_R():r MEM0:r:zd:u32 MEM1:w:zd:SUPP BASE1=A_GPR_R():r:SUPP
IFORM: MOVDIR64B_GPRa_MEM
}

According to the specs, operand 2 is "ModRM:r/m (r)".

Thank you.

[marjevan]

Hi,
For the MOVDIR64B instruction, XED defines the second operand as MEM0:r:zd:u32, which aligns with the SDM's definition of "ModRM:r/m (r)."

In addition, MEM1, BASE1, and (in 16/32-bit mode) SEG1 are suppressed operands, describing how the memory destination address is calculated. These suppressed operands are not explicitly listed as primary operands because they represent internal details of the effective address computation.

Regarding REG0, it is a register whose width is determined by the address size prefix (0x67). The register's content contributes to the destination memory address calculation as a component of the effective address.

Please let me know if further clarification is needed!

[a0rland0]

Hi. Thank you for the clarification. Is it clear now.