@@ -86,7 +86,7 @@ impl Base32Iterable for Bolt11InvoiceFeatures {
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/// with the leading 0's skipped.
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fn fe_iter < ' s > ( & ' s self ) -> Box < dyn Iterator < Item = Fe32 > + ' s > {
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// Fe32 conversion cannot be used, because this packs from right, right-to-left
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- let mut input_iter = self . le_flags ( ) . into_iter ( ) ;
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+ let mut input_iter = self . le_flags ( ) . iter ( ) ;
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// Carry bits, 0..7 bits
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let mut carry = 0u8 ;
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let mut carry_bits = 0 ;
@@ -96,7 +96,7 @@ impl Base32Iterable for Bolt11InvoiceFeatures {
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let next_out8 = if carry_bits >= 5 {
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// We have enough carry bits for an output, no need to read the input
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let next_out8 = carry;
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- carry = carry >> 5 ;
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+ carry >>= 5 ;
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carry_bits -= 5 ;
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next_out8
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} else {
@@ -122,7 +122,7 @@ impl Base32Iterable for Bolt11InvoiceFeatures {
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output. push ( Fe32 :: try_from ( next_out8 & 31u8 ) . expect ( "<32" ) )
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}
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// Take result in reverse order, and skip leading 0s
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- return Box :: new ( output. into_iter ( ) . rev ( ) . skip_while ( |e| * e == Fe32 :: Q ) ) ;
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+ Box :: new ( output. into_iter ( ) . rev ( ) . skip_while ( |e| * e == Fe32 :: Q ) )
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}
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}
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@@ -221,9 +221,8 @@ impl Display for SiPrefix {
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fn encode_int_be_base32 ( int : u64 ) -> Vec < Fe32 > {
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let base = 32u64 ;
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- const LEN : usize = ( 64 + 4 ) / 5 ;
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- debug_assert ! ( LEN == 13 ) ; // for validating LEN (mutants)
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- let mut out_vec = Vec :: < Fe32 > :: with_capacity ( LEN ) ;
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+ // (64 + 4) / 5 == 13
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+ let mut out_vec = Vec :: < Fe32 > :: with_capacity ( 13 ) ;
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let mut rem_int = int;
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while rem_int != 0 {
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out_vec. push ( Fe32 :: try_from ( ( rem_int % base) as u8 ) . expect ( "always <32" ) ) ;
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