Skip to content

Commit 2531ef1

Browse files
committed
Lint fix
1 parent 83643d8 commit 2531ef1

File tree

3 files changed

+8
-9
lines changed

3 files changed

+8
-9
lines changed

lightning-invoice/src/de.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -94,7 +94,7 @@ impl FromBase32 for Bolt11InvoiceFeatures {
9494
let mut output = Vec::<u8>::new();
9595

9696
// Iterate over input in reverse
97-
for (_, curr_in) in field_data.into_iter().rev().enumerate() {
97+
for curr_in in field_data.iter().rev() {
9898
let curr_in_as_u8 = curr_in.to_u8();
9999
if carry_bits >= 3 {
100100
// we have a new full byte -- 3, 4 or 5 carry bits, plus 5 new ones
@@ -105,7 +105,7 @@ impl FromBase32 for Bolt11InvoiceFeatures {
105105
carry_bits -= 3; // added 5, removed 8
106106
} else {
107107
// only 0, 1, or 2 carry bits, plus 5 new ones
108-
carry = carry + (curr_in_as_u8 << carry_bits);
108+
carry += curr_in_as_u8 << carry_bits;
109109
carry_bits += 5;
110110
}
111111
}

lightning-invoice/src/ser.rs

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -86,7 +86,7 @@ impl Base32Iterable for Bolt11InvoiceFeatures {
8686
/// with the leading 0's skipped.
8787
fn fe_iter<'s>(&'s self) -> Box<dyn Iterator<Item = Fe32> + 's> {
8888
// Fe32 conversion cannot be used, because this packs from right, right-to-left
89-
let mut input_iter = self.le_flags().into_iter();
89+
let mut input_iter = self.le_flags().iter();
9090
// Carry bits, 0..7 bits
9191
let mut carry = 0u8;
9292
let mut carry_bits = 0;
@@ -96,7 +96,7 @@ impl Base32Iterable for Bolt11InvoiceFeatures {
9696
let next_out8 = if carry_bits >= 5 {
9797
// We have enough carry bits for an output, no need to read the input
9898
let next_out8 = carry;
99-
carry = carry >> 5;
99+
carry >>= 5;
100100
carry_bits -= 5;
101101
next_out8
102102
} else {
@@ -122,7 +122,7 @@ impl Base32Iterable for Bolt11InvoiceFeatures {
122122
output.push(Fe32::try_from(next_out8 & 31u8).expect("<32"))
123123
}
124124
// Take result in reverse order, and skip leading 0s
125-
return Box::new(output.into_iter().rev().skip_while(|e| *e == Fe32::Q));
125+
Box::new(output.into_iter().rev().skip_while(|e| *e == Fe32::Q))
126126
}
127127
}
128128

@@ -221,9 +221,8 @@ impl Display for SiPrefix {
221221
fn encode_int_be_base32(int: u64) -> Vec<Fe32> {
222222
let base = 32u64;
223223

224-
const LEN: usize = (64 + 4) / 5;
225-
debug_assert!(LEN == 13); // for validating LEN (mutants)
226-
let mut out_vec = Vec::<Fe32>::with_capacity(LEN);
224+
// (64 + 4) / 5 == 13
225+
let mut out_vec = Vec::<Fe32>::with_capacity(13);
227226
let mut rem_int = int;
228227
while rem_int != 0 {
229228
out_vec.push(Fe32::try_from((rem_int % base) as u8).expect("always <32"));

lightning/src/offers/parse.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -71,7 +71,7 @@ mod sealed {
7171
encode_to_fmt::<NoChecksum, _>(f, Hrp::parse(Self::BECH32_HRP).unwrap(), self.as_ref())
7272
.map_err(|e| match e {
7373
EncodeError::Fmt(e) => e,
74-
_ => fmt::Error::default(),
74+
_ => fmt::Error {},
7575
})
7676
}
7777
}

0 commit comments

Comments
 (0)