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#include <sysdev/fsl_soc.h>
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#ifdef CONFIG_8xx_GPIO
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- #include <linux/gpio/legacy-of-mm-gpiochip .h>
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+ #include <linux/gpio/driver .h>
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#endif
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#define CPM_MAP_SIZE (0x4000)
@@ -376,7 +376,8 @@ int __init cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
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#ifdef CONFIG_8xx_GPIO
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struct cpm1_gpio16_chip {
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- struct of_mm_gpio_chip mm_gc ;
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+ struct gpio_chip gc ;
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+ void __iomem * regs ;
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spinlock_t lock ;
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/* shadowed data register to clear/set bits safely */
@@ -386,31 +387,27 @@ struct cpm1_gpio16_chip {
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int irq [16 ];
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};
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- static void cpm1_gpio16_save_regs (struct of_mm_gpio_chip * mm_gc )
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+ static void cpm1_gpio16_save_regs (struct cpm1_gpio16_chip * cpm1_gc )
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{
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- struct cpm1_gpio16_chip * cpm1_gc =
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- container_of (mm_gc , struct cpm1_gpio16_chip , mm_gc );
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- struct cpm_ioport16 __iomem * iop = mm_gc -> regs ;
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+ struct cpm_ioport16 __iomem * iop = cpm1_gc -> regs ;
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cpm1_gc -> cpdata = in_be16 (& iop -> dat );
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}
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static int cpm1_gpio16_get (struct gpio_chip * gc , unsigned int gpio )
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{
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- struct of_mm_gpio_chip * mm_gc = to_of_mm_gpio_chip (gc );
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- struct cpm_ioport16 __iomem * iop = mm_gc -> regs ;
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+ struct cpm1_gpio16_chip * cpm1_gc = gpiochip_get_data (gc );
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+ struct cpm_ioport16 __iomem * iop = cpm1_gc -> regs ;
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u16 pin_mask ;
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pin_mask = 1 << (15 - gpio );
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return !!(in_be16 (& iop -> dat ) & pin_mask );
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}
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- static void __cpm1_gpio16_set (struct of_mm_gpio_chip * mm_gc , u16 pin_mask ,
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- int value )
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+ static void __cpm1_gpio16_set (struct cpm1_gpio16_chip * cpm1_gc , u16 pin_mask , int value )
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{
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- struct cpm1_gpio16_chip * cpm1_gc = gpiochip_get_data (& mm_gc -> gc );
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- struct cpm_ioport16 __iomem * iop = mm_gc -> regs ;
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+ struct cpm_ioport16 __iomem * iop = cpm1_gc -> regs ;
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if (value )
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cpm1_gc -> cpdata |= pin_mask ;
@@ -422,38 +419,35 @@ static void __cpm1_gpio16_set(struct of_mm_gpio_chip *mm_gc, u16 pin_mask,
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static void cpm1_gpio16_set (struct gpio_chip * gc , unsigned int gpio , int value )
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{
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- struct of_mm_gpio_chip * mm_gc = to_of_mm_gpio_chip (gc );
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- struct cpm1_gpio16_chip * cpm1_gc = gpiochip_get_data (& mm_gc -> gc );
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+ struct cpm1_gpio16_chip * cpm1_gc = gpiochip_get_data (gc );
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unsigned long flags ;
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u16 pin_mask = 1 << (15 - gpio );
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spin_lock_irqsave (& cpm1_gc -> lock , flags );
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- __cpm1_gpio16_set (mm_gc , pin_mask , value );
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+ __cpm1_gpio16_set (cpm1_gc , pin_mask , value );
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spin_unlock_irqrestore (& cpm1_gc -> lock , flags );
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}
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static int cpm1_gpio16_to_irq (struct gpio_chip * gc , unsigned int gpio )
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{
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- struct of_mm_gpio_chip * mm_gc = to_of_mm_gpio_chip (gc );
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- struct cpm1_gpio16_chip * cpm1_gc = gpiochip_get_data (& mm_gc -> gc );
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+ struct cpm1_gpio16_chip * cpm1_gc = gpiochip_get_data (gc );
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return cpm1_gc -> irq [gpio ] ? : - ENXIO ;
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}
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static int cpm1_gpio16_dir_out (struct gpio_chip * gc , unsigned int gpio , int val )
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{
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- struct of_mm_gpio_chip * mm_gc = to_of_mm_gpio_chip (gc );
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- struct cpm1_gpio16_chip * cpm1_gc = gpiochip_get_data (& mm_gc -> gc );
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- struct cpm_ioport16 __iomem * iop = mm_gc -> regs ;
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+ struct cpm1_gpio16_chip * cpm1_gc = gpiochip_get_data (gc );
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+ struct cpm_ioport16 __iomem * iop = cpm1_gc -> regs ;
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unsigned long flags ;
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u16 pin_mask = 1 << (15 - gpio );
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spin_lock_irqsave (& cpm1_gc -> lock , flags );
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setbits16 (& iop -> dir , pin_mask );
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- __cpm1_gpio16_set (mm_gc , pin_mask , val );
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+ __cpm1_gpio16_set (cpm1_gc , pin_mask , val );
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spin_unlock_irqrestore (& cpm1_gc -> lock , flags );
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@@ -462,9 +456,8 @@ static int cpm1_gpio16_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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static int cpm1_gpio16_dir_in (struct gpio_chip * gc , unsigned int gpio )
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{
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- struct of_mm_gpio_chip * mm_gc = to_of_mm_gpio_chip (gc );
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- struct cpm1_gpio16_chip * cpm1_gc = gpiochip_get_data (& mm_gc -> gc );
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- struct cpm_ioport16 __iomem * iop = mm_gc -> regs ;
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+ struct cpm1_gpio16_chip * cpm1_gc = gpiochip_get_data (gc );
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+ struct cpm_ioport16 __iomem * iop = cpm1_gc -> regs ;
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unsigned long flags ;
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u16 pin_mask = 1 << (15 - gpio );
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@@ -481,11 +474,10 @@ int cpm1_gpiochip_add16(struct device *dev)
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{
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struct device_node * np = dev -> of_node ;
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struct cpm1_gpio16_chip * cpm1_gc ;
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- struct of_mm_gpio_chip * mm_gc ;
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struct gpio_chip * gc ;
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u16 mask ;
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- cpm1_gc = kzalloc ( sizeof (* cpm1_gc ), GFP_KERNEL );
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+ cpm1_gc = devm_kzalloc ( dev , sizeof (* cpm1_gc ), GFP_KERNEL );
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if (!cpm1_gc )
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return - ENOMEM ;
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@@ -499,10 +491,8 @@ int cpm1_gpiochip_add16(struct device *dev)
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cpm1_gc -> irq [i ] = irq_of_parse_and_map (np , j ++ );
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}
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- mm_gc = & cpm1_gc -> mm_gc ;
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- gc = & mm_gc -> gc ;
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-
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- mm_gc -> save_regs = cpm1_gpio16_save_regs ;
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+ gc = & cpm1_gc -> gc ;
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+ gc -> base = -1 ;
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gc -> ngpio = 16 ;
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gc -> direction_input = cpm1_gpio16_dir_in ;
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gc -> direction_output = cpm1_gpio16_dir_out ;
@@ -512,42 +502,49 @@ int cpm1_gpiochip_add16(struct device *dev)
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gc -> parent = dev ;
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gc -> owner = THIS_MODULE ;
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- return of_mm_gpiochip_add_data (np , mm_gc , cpm1_gc );
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+ gc -> label = devm_kasprintf (dev , GFP_KERNEL , "%pOF" , np );
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+ if (!gc -> label )
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+ return - ENOMEM ;
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+
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+ cpm1_gc -> regs = devm_of_iomap (dev , np , 0 , NULL );
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+ if (IS_ERR (cpm1_gc -> regs ))
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+ return PTR_ERR (cpm1_gc -> regs );
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+
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+ cpm1_gpio16_save_regs (cpm1_gc );
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+
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+ return devm_gpiochip_add_data (dev , gc , cpm1_gc );
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}
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struct cpm1_gpio32_chip {
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- struct of_mm_gpio_chip mm_gc ;
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+ struct gpio_chip gc ;
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+ void __iomem * regs ;
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spinlock_t lock ;
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/* shadowed data register to clear/set bits safely */
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u32 cpdata ;
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};
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- static void cpm1_gpio32_save_regs (struct of_mm_gpio_chip * mm_gc )
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+ static void cpm1_gpio32_save_regs (struct cpm1_gpio32_chip * cpm1_gc )
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{
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- struct cpm1_gpio32_chip * cpm1_gc =
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- container_of (mm_gc , struct cpm1_gpio32_chip , mm_gc );
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- struct cpm_ioport32b __iomem * iop = mm_gc -> regs ;
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+ struct cpm_ioport32b __iomem * iop = cpm1_gc -> regs ;
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cpm1_gc -> cpdata = in_be32 (& iop -> dat );
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}
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static int cpm1_gpio32_get (struct gpio_chip * gc , unsigned int gpio )
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{
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- struct of_mm_gpio_chip * mm_gc = to_of_mm_gpio_chip (gc );
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- struct cpm_ioport32b __iomem * iop = mm_gc -> regs ;
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+ struct cpm1_gpio32_chip * cpm1_gc = gpiochip_get_data (gc );
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+ struct cpm_ioport32b __iomem * iop = cpm1_gc -> regs ;
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u32 pin_mask ;
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pin_mask = 1 << (31 - gpio );
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return !!(in_be32 (& iop -> dat ) & pin_mask );
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}
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- static void __cpm1_gpio32_set (struct of_mm_gpio_chip * mm_gc , u32 pin_mask ,
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- int value )
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+ static void __cpm1_gpio32_set (struct cpm1_gpio32_chip * cpm1_gc , u32 pin_mask , int value )
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{
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- struct cpm1_gpio32_chip * cpm1_gc = gpiochip_get_data (& mm_gc -> gc );
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- struct cpm_ioport32b __iomem * iop = mm_gc -> regs ;
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+ struct cpm_ioport32b __iomem * iop = cpm1_gc -> regs ;
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if (value )
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cpm1_gc -> cpdata |= pin_mask ;
@@ -559,30 +556,28 @@ static void __cpm1_gpio32_set(struct of_mm_gpio_chip *mm_gc, u32 pin_mask,
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static void cpm1_gpio32_set (struct gpio_chip * gc , unsigned int gpio , int value )
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{
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- struct of_mm_gpio_chip * mm_gc = to_of_mm_gpio_chip (gc );
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- struct cpm1_gpio32_chip * cpm1_gc = gpiochip_get_data (& mm_gc -> gc );
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+ struct cpm1_gpio32_chip * cpm1_gc = gpiochip_get_data (gc );
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unsigned long flags ;
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u32 pin_mask = 1 << (31 - gpio );
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spin_lock_irqsave (& cpm1_gc -> lock , flags );
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- __cpm1_gpio32_set (mm_gc , pin_mask , value );
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+ __cpm1_gpio32_set (cpm1_gc , pin_mask , value );
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spin_unlock_irqrestore (& cpm1_gc -> lock , flags );
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}
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static int cpm1_gpio32_dir_out (struct gpio_chip * gc , unsigned int gpio , int val )
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{
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- struct of_mm_gpio_chip * mm_gc = to_of_mm_gpio_chip (gc );
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- struct cpm1_gpio32_chip * cpm1_gc = gpiochip_get_data (& mm_gc -> gc );
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- struct cpm_ioport32b __iomem * iop = mm_gc -> regs ;
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+ struct cpm1_gpio32_chip * cpm1_gc = gpiochip_get_data (gc );
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+ struct cpm_ioport32b __iomem * iop = cpm1_gc -> regs ;
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unsigned long flags ;
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u32 pin_mask = 1 << (31 - gpio );
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spin_lock_irqsave (& cpm1_gc -> lock , flags );
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setbits32 (& iop -> dir , pin_mask );
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- __cpm1_gpio32_set (mm_gc , pin_mask , val );
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+ __cpm1_gpio32_set (cpm1_gc , pin_mask , val );
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spin_unlock_irqrestore (& cpm1_gc -> lock , flags );
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@@ -591,9 +586,8 @@ static int cpm1_gpio32_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
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static int cpm1_gpio32_dir_in (struct gpio_chip * gc , unsigned int gpio )
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{
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- struct of_mm_gpio_chip * mm_gc = to_of_mm_gpio_chip (gc );
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- struct cpm1_gpio32_chip * cpm1_gc = gpiochip_get_data (& mm_gc -> gc );
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- struct cpm_ioport32b __iomem * iop = mm_gc -> regs ;
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+ struct cpm1_gpio32_chip * cpm1_gc = gpiochip_get_data (gc );
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+ struct cpm_ioport32b __iomem * iop = cpm1_gc -> regs ;
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unsigned long flags ;
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u32 pin_mask = 1 << (31 - gpio );
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@@ -610,19 +604,16 @@ int cpm1_gpiochip_add32(struct device *dev)
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{
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struct device_node * np = dev -> of_node ;
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struct cpm1_gpio32_chip * cpm1_gc ;
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- struct of_mm_gpio_chip * mm_gc ;
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struct gpio_chip * gc ;
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- cpm1_gc = kzalloc ( sizeof (* cpm1_gc ), GFP_KERNEL );
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+ cpm1_gc = devm_kzalloc ( dev , sizeof (* cpm1_gc ), GFP_KERNEL );
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if (!cpm1_gc )
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return - ENOMEM ;
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spin_lock_init (& cpm1_gc -> lock );
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- mm_gc = & cpm1_gc -> mm_gc ;
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- gc = & mm_gc -> gc ;
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-
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- mm_gc -> save_regs = cpm1_gpio32_save_regs ;
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+ gc = & cpm1_gc -> gc ;
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+ gc -> base = -1 ;
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gc -> ngpio = 32 ;
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gc -> direction_input = cpm1_gpio32_dir_in ;
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gc -> direction_output = cpm1_gpio32_dir_out ;
@@ -631,7 +622,17 @@ int cpm1_gpiochip_add32(struct device *dev)
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gc -> parent = dev ;
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gc -> owner = THIS_MODULE ;
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- return of_mm_gpiochip_add_data (np , mm_gc , cpm1_gc );
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+ gc -> label = devm_kasprintf (dev , GFP_KERNEL , "%pOF" , np );
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+ if (!gc -> label )
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+ return - ENOMEM ;
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+
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+ cpm1_gc -> regs = devm_of_iomap (dev , np , 0 , NULL );
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+ if (IS_ERR (cpm1_gc -> regs ))
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+ return PTR_ERR (cpm1_gc -> regs );
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+
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+ cpm1_gpio32_save_regs (cpm1_gc );
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+
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+ return devm_gpiochip_add_data (dev , gc , cpm1_gc );
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}
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#endif /* CONFIG_8xx_GPIO */
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