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Gautam Menghanimaddy-kerneldev
Gautam Menghani
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arch/powerpc: Remove unused function icp_native_cause_ipi_rm()
Remove icp_native_cause_ipi_rm() as it has no callers since commit 53af3ba("KVM: PPC: Book3S HV: Allow guest exit path to have MMU on") Signed-off-by: Gautam Menghani <[email protected]> Reviewed-by: Ritesh Harjani (IBM) <[email protected]> Signed-off-by: Madhavan Srinivasan <[email protected]> Link: https://patch.msgid.link/[email protected]
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arch/powerpc/include/asm/xics.h

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@@ -31,7 +31,6 @@
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#ifdef CONFIG_PPC_ICP_NATIVE
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extern int icp_native_init(void);
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extern void icp_native_flush_interrupt(void);
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extern void icp_native_cause_ipi_rm(int cpu);
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#else
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static inline int icp_native_init(void) { return -ENODEV; }
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#endif

arch/powerpc/sysdev/xics/icp-native.c

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@@ -145,27 +145,6 @@ static void icp_native_cause_ipi(int cpu)
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icp_native_set_qirr(cpu, IPI_PRIORITY);
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}
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#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
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void icp_native_cause_ipi_rm(int cpu)
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{
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/*
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* Currently not used to send IPIs to another CPU
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* on the same core. Only caller is KVM real mode.
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* Need the physical address of the XICS to be
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* previously saved in kvm_hstate in the paca.
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*/
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void __iomem *xics_phys;
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/*
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* Just like the cause_ipi functions, it is required to
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* include a full barrier before causing the IPI.
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*/
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xics_phys = paca_ptrs[cpu]->kvm_hstate.xics_phys;
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mb();
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__raw_rm_writeb(IPI_PRIORITY, xics_phys + XICS_MFRR);
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}
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#endif
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/*
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* Called when an interrupt is received on an off-line CPU to
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* clear the interrupt, so that the CPU can go back to nap mode.

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