Track Intel UHD memory sequential coherence bug #226
Description
Action
If Intel resolves the driver bug described below we should update the LIT feature check and XFAIL annotations in the tests appropriately to close out tracking of the driver issue.
Context
Intel UHD drivers seem to have a bug related to memory sequential consistency that impacts ordering of sequential memory reads and writes within a single thread.
A reduced test case for this issue is added in #225.
This is only encountered with DXC because DXC fails to perform load-store optimization to remove the redundant load, however the driver bug exposed is real.