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hw/riscv: Re-enable opentitan machine #506

hw/riscv: Re-enable opentitan machine

hw/riscv: Re-enable opentitan machine #506

Triggered via pull request January 30, 2026 13:53
Status Failure
Total duration 44m 1s
Artifacts 3

ci_regression.yml

on: pull_request
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5 errors and 5 warnings
ROM_EXT / EG Regression
Process completed with exit code 1.
ROM_EXT / EG Regression
There were some unexpected test failures
SiVal ROM_EXT / EG Regression
The process '/home/runner/.local/share/venv/bin/uv' failed with exit code 2
ROM / EG Regression
Process completed with exit code 1.
ROM / EG Regression
There were some unexpected test failures
ROM_EXT / EG Regression
Failed to restore: Cache service responded with 400
SiVal ROM_EXT / EG Regression
Some tests passed which we did not expect
SiVal ROM_EXT / EG Regression
Failed to restore: Cache service responded with 400
ROM / EG Regression
Some tests passed which we did not expect
ROM / EG Regression
Failed to restore: Cache service responded with 400

Artifacts

Produced during runtime
Name Size Digest
sim_qemu_rom_ext-bazel-test-results Expired
140 KB
sha256:21f53a698911878ad99385c224090187fe094cb9be8c091325f3477c5cef5746
sim_qemu_rom_with_fake_keys-bazel-test-results Expired
150 KB
sha256:ef7e2baab0fdd1926b9ecbbab8db214724b0395a0909622fd6e6beb69b9821d4
sim_qemu_sival_rom_ext-bazel-test-results Expired
124 KB
sha256:2eba02b653fb1b80b979072b457872e5b0301421ccf1bf069eac06c6edc88c96