@@ -2054,66 +2054,29 @@ void drcbe_arm64::op_read(a64::Assembler &a, const uml::instruction &inst)
2054
2054
const parameter &spacesizep = inst.param (2 );
2055
2055
assert (spacesizep.is_size_space ());
2056
2056
2057
- const auto &trampolines = m_accessors[spacesizep.space ()];
2058
2057
const auto &resolved = m_resolved_accessors[spacesizep.space ()];
2059
2058
2060
2059
mov_reg_param (a, 4 , REG_PARAM2, addrp);
2061
2060
2062
2061
if (spacesizep.size () == SIZE_BYTE)
2063
2062
{
2064
- if (resolved.read_byte )
2065
- {
2066
- get_imm_relative (a, REG_PARAM1, resolved.read_byte .obj );
2067
- call_arm_addr (a, resolved.read_byte .func );
2068
- }
2069
- else
2070
- {
2071
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2072
- emit_ldr_mem (a, TEMP_REG1, &trampolines.read_byte );
2073
- a.blr (TEMP_REG1);
2074
- }
2063
+ get_imm_relative (a, REG_PARAM1, resolved.read_byte .obj );
2064
+ call_arm_addr (a, resolved.read_byte .func );
2075
2065
}
2076
2066
else if (spacesizep.size () == SIZE_WORD)
2077
2067
{
2078
- if (resolved.read_word )
2079
- {
2080
- get_imm_relative (a, REG_PARAM1, resolved.read_word .obj );
2081
- call_arm_addr (a, resolved.read_word .func );
2082
- }
2083
- else
2084
- {
2085
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2086
- emit_ldr_mem (a, TEMP_REG1, &trampolines.read_word );
2087
- a.blr (TEMP_REG1);
2088
- }
2068
+ get_imm_relative (a, REG_PARAM1, resolved.read_word .obj );
2069
+ call_arm_addr (a, resolved.read_word .func );
2089
2070
}
2090
2071
else if (spacesizep.size () == SIZE_DWORD)
2091
2072
{
2092
- if (resolved.read_dword )
2093
- {
2094
- get_imm_relative (a, REG_PARAM1, resolved.read_dword .obj );
2095
- call_arm_addr (a, resolved.read_dword .func );
2096
- }
2097
- else
2098
- {
2099
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2100
- emit_ldr_mem (a, TEMP_REG1, &trampolines.read_dword );
2101
- a.blr (TEMP_REG1);
2102
- }
2073
+ get_imm_relative (a, REG_PARAM1, resolved.read_dword .obj );
2074
+ call_arm_addr (a, resolved.read_dword .func );
2103
2075
}
2104
2076
else if (spacesizep.size () == SIZE_QWORD)
2105
2077
{
2106
- if (resolved.read_qword )
2107
- {
2108
- get_imm_relative (a, REG_PARAM1, resolved.read_qword .obj );
2109
- call_arm_addr (a, resolved.read_qword .func );
2110
- }
2111
- else
2112
- {
2113
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2114
- emit_ldr_mem (a, TEMP_REG1, &trampolines.read_qword );
2115
- a.blr (TEMP_REG1);
2116
- }
2078
+ get_imm_relative (a, REG_PARAM1, resolved.read_qword .obj );
2079
+ call_arm_addr (a, resolved.read_qword .func );
2117
2080
}
2118
2081
2119
2082
mov_param_reg (a, inst.size (), dstp, REG_PARAM1);
@@ -2131,67 +2094,30 @@ void drcbe_arm64::op_readm(a64::Assembler &a, const uml::instruction &inst)
2131
2094
const parameter &spacesizep = inst.param (3 );
2132
2095
assert (spacesizep.is_size_space ());
2133
2096
2134
- const auto &trampolines = m_accessors[spacesizep.space ()];
2135
2097
const auto &resolved = m_resolved_accessors[spacesizep.space ()];
2136
2098
2137
2099
mov_reg_param (a, 4 , REG_PARAM2, addrp);
2138
2100
mov_reg_param (a, inst.size (), REG_PARAM3, maskp);
2139
2101
2140
2102
if (spacesizep.size () == SIZE_BYTE)
2141
2103
{
2142
- if (resolved.read_byte_masked )
2143
- {
2144
- get_imm_relative (a, REG_PARAM1, resolved.read_byte_masked .obj );
2145
- call_arm_addr (a, resolved.read_byte_masked .func );
2146
- }
2147
- else
2148
- {
2149
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2150
- emit_ldr_mem (a, TEMP_REG1, &trampolines.read_byte_masked );
2151
- a.blr (TEMP_REG1);
2152
- }
2104
+ get_imm_relative (a, REG_PARAM1, resolved.read_byte_masked .obj );
2105
+ call_arm_addr (a, resolved.read_byte_masked .func );
2153
2106
}
2154
2107
else if (spacesizep.size () == SIZE_WORD)
2155
2108
{
2156
- if (resolved.read_word_masked )
2157
- {
2158
- get_imm_relative (a, REG_PARAM1, resolved.read_word_masked .obj );
2159
- call_arm_addr (a, resolved.read_word_masked .func );
2160
- }
2161
- else
2162
- {
2163
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2164
- emit_ldr_mem (a, TEMP_REG1, &trampolines.read_word_masked );
2165
- a.blr (TEMP_REG1);
2166
- }
2109
+ get_imm_relative (a, REG_PARAM1, resolved.read_word_masked .obj );
2110
+ call_arm_addr (a, resolved.read_word_masked .func );
2167
2111
}
2168
2112
else if (spacesizep.size () == SIZE_DWORD)
2169
2113
{
2170
- if (resolved.read_dword_masked )
2171
- {
2172
- get_imm_relative (a, REG_PARAM1, resolved.read_dword_masked .obj );
2173
- call_arm_addr (a, resolved.read_dword_masked .func );
2174
- }
2175
- else
2176
- {
2177
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2178
- emit_ldr_mem (a, TEMP_REG1, &trampolines.read_dword_masked );
2179
- a.blr (TEMP_REG1);
2180
- }
2114
+ get_imm_relative (a, REG_PARAM1, resolved.read_dword_masked .obj );
2115
+ call_arm_addr (a, resolved.read_dword_masked .func );
2181
2116
}
2182
2117
else if (spacesizep.size () == SIZE_QWORD)
2183
2118
{
2184
- if (resolved.read_qword_masked )
2185
- {
2186
- get_imm_relative (a, REG_PARAM1, resolved.read_qword_masked .obj );
2187
- call_arm_addr (a, resolved.read_qword_masked .func );
2188
- }
2189
- else
2190
- {
2191
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2192
- emit_ldr_mem (a, TEMP_REG1, &trampolines.read_qword_masked );
2193
- a.blr (TEMP_REG1);
2194
- }
2119
+ get_imm_relative (a, REG_PARAM1, resolved.read_qword_masked .obj );
2120
+ call_arm_addr (a, resolved.read_qword_masked .func );
2195
2121
}
2196
2122
2197
2123
mov_param_reg (a, inst.size (), dstp, REG_PARAM1);
@@ -2208,67 +2134,30 @@ void drcbe_arm64::op_write(a64::Assembler &a, const uml::instruction &inst)
2208
2134
const parameter &spacesizep = inst.param (2 );
2209
2135
assert (spacesizep.is_size_space ());
2210
2136
2211
- const auto &trampolines = m_accessors[spacesizep.space ()];
2212
2137
const auto &resolved = m_resolved_accessors[spacesizep.space ()];
2213
2138
2214
2139
mov_reg_param (a, 4 , REG_PARAM2, addrp);
2215
2140
mov_reg_param (a, inst.size (), REG_PARAM3, srcp);
2216
2141
2217
2142
if (spacesizep.size () == SIZE_BYTE)
2218
2143
{
2219
- if (resolved.write_byte )
2220
- {
2221
- get_imm_relative (a, REG_PARAM1, resolved.write_byte .obj );
2222
- call_arm_addr (a, resolved.write_byte .func );
2223
- }
2224
- else
2225
- {
2226
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2227
- emit_ldr_mem (a, TEMP_REG1, &trampolines.write_byte );
2228
- a.blr (TEMP_REG1);
2229
- }
2144
+ get_imm_relative (a, REG_PARAM1, resolved.write_byte .obj );
2145
+ call_arm_addr (a, resolved.write_byte .func );
2230
2146
}
2231
2147
else if (spacesizep.size () == SIZE_WORD)
2232
2148
{
2233
- if (resolved.write_word )
2234
- {
2235
- get_imm_relative (a, REG_PARAM1, resolved.write_word .obj );
2236
- call_arm_addr (a, resolved.write_word .func );
2237
- }
2238
- else
2239
- {
2240
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2241
- emit_ldr_mem (a, TEMP_REG1, &trampolines.write_word );
2242
- a.blr (TEMP_REG1);
2243
- }
2149
+ get_imm_relative (a, REG_PARAM1, resolved.write_word .obj );
2150
+ call_arm_addr (a, resolved.write_word .func );
2244
2151
}
2245
2152
else if (spacesizep.size () == SIZE_DWORD)
2246
2153
{
2247
- if (resolved.write_dword )
2248
- {
2249
- get_imm_relative (a, REG_PARAM1, resolved.write_dword .obj );
2250
- call_arm_addr (a, resolved.write_dword .func );
2251
- }
2252
- else
2253
- {
2254
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2255
- emit_ldr_mem (a, TEMP_REG1, &trampolines.write_dword );
2256
- a.blr (TEMP_REG1);
2257
- }
2154
+ get_imm_relative (a, REG_PARAM1, resolved.write_dword .obj );
2155
+ call_arm_addr (a, resolved.write_dword .func );
2258
2156
}
2259
2157
else if (spacesizep.size () == SIZE_QWORD)
2260
2158
{
2261
- if (resolved.write_qword )
2262
- {
2263
- get_imm_relative (a, REG_PARAM1, resolved.write_qword .obj );
2264
- call_arm_addr (a, resolved.write_qword .func );
2265
- }
2266
- else
2267
- {
2268
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2269
- emit_ldr_mem (a, TEMP_REG1, &trampolines.write_qword );
2270
- a.blr (TEMP_REG1);
2271
- }
2159
+ get_imm_relative (a, REG_PARAM1, resolved.write_qword .obj );
2160
+ call_arm_addr (a, resolved.write_qword .func );
2272
2161
}
2273
2162
}
2274
2163
@@ -2285,7 +2174,6 @@ void drcbe_arm64::op_writem(a64::Assembler &a, const uml::instruction &inst)
2285
2174
assert (spacesizep.is_size_space ());
2286
2175
2287
2176
// set up a call to the write handler
2288
- const auto &trampolines = m_accessors[spacesizep.space ()];
2289
2177
const auto &resolved = m_resolved_accessors[spacesizep.space ()];
2290
2178
2291
2179
mov_reg_param (a, 4 , REG_PARAM2, addrp);
@@ -2294,59 +2182,23 @@ void drcbe_arm64::op_writem(a64::Assembler &a, const uml::instruction &inst)
2294
2182
2295
2183
if (spacesizep.size () == SIZE_BYTE)
2296
2184
{
2297
- if (resolved.write_byte_masked )
2298
- {
2299
- get_imm_relative (a, REG_PARAM1, resolved.write_byte_masked .obj );
2300
- call_arm_addr (a, resolved.write_byte_masked .func );
2301
- }
2302
- else
2303
- {
2304
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2305
- emit_ldr_mem (a, TEMP_REG1, &trampolines.write_byte_masked );
2306
- a.blr (TEMP_REG1);
2307
- }
2185
+ get_imm_relative (a, REG_PARAM1, resolved.write_byte_masked .obj );
2186
+ call_arm_addr (a, resolved.write_byte_masked .func );
2308
2187
}
2309
2188
else if (spacesizep.size () == SIZE_WORD)
2310
2189
{
2311
- if (resolved.write_word_masked )
2312
- {
2313
- get_imm_relative (a, REG_PARAM1, resolved.write_word_masked .obj );
2314
- call_arm_addr (a, resolved.write_word_masked .func );
2315
- }
2316
- else
2317
- {
2318
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2319
- emit_ldr_mem (a, TEMP_REG1, &trampolines.write_word_masked );
2320
- a.blr (TEMP_REG1);
2321
- }
2190
+ get_imm_relative (a, REG_PARAM1, resolved.write_word_masked .obj );
2191
+ call_arm_addr (a, resolved.write_word_masked .func );
2322
2192
}
2323
2193
else if (spacesizep.size () == SIZE_DWORD)
2324
2194
{
2325
- if (resolved.write_dword_masked )
2326
- {
2327
- get_imm_relative (a, REG_PARAM1, resolved.write_dword_masked .obj );
2328
- call_arm_addr (a, resolved.write_dword_masked .func );
2329
- }
2330
- else
2331
- {
2332
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2333
- emit_ldr_mem (a, TEMP_REG1, &trampolines.write_dword_masked );
2334
- a.blr (TEMP_REG1);
2335
- }
2195
+ get_imm_relative (a, REG_PARAM1, resolved.write_dword_masked .obj );
2196
+ call_arm_addr (a, resolved.write_dword_masked .func );
2336
2197
}
2337
2198
else if (spacesizep.size () == SIZE_QWORD)
2338
2199
{
2339
- if (resolved.write_qword_masked )
2340
- {
2341
- get_imm_relative (a, REG_PARAM1, resolved.write_qword_masked .obj );
2342
- call_arm_addr (a, resolved.write_qword_masked .func );
2343
- }
2344
- else
2345
- {
2346
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
2347
- emit_ldr_mem (a, TEMP_REG1, &trampolines.write_qword_masked );
2348
- a.blr (TEMP_REG1);
2349
- }
2200
+ get_imm_relative (a, REG_PARAM1, resolved.write_qword_masked .obj );
2201
+ call_arm_addr (a, resolved.write_qword_masked .func );
2350
2202
}
2351
2203
}
2352
2204
@@ -3924,40 +3776,21 @@ void drcbe_arm64::op_fread(a64::Assembler &a, const uml::instruction &inst)
3924
3776
assert (spacesizep.is_size_space ());
3925
3777
assert ((1 << spacesizep.size ()) == inst.size ());
3926
3778
3927
- const auto &trampolines = m_accessors[spacesizep.space ()];
3928
3779
const auto &resolved = m_resolved_accessors[spacesizep.space ()];
3929
3780
3930
3781
mov_reg_param (a, 4 , REG_PARAM2, addrp);
3931
3782
3932
3783
if (inst.size () == 4 )
3933
3784
{
3934
- if (resolved.read_dword )
3935
- {
3936
- get_imm_relative (a, REG_PARAM1, resolved.read_dword .obj );
3937
- call_arm_addr (a, resolved.read_dword .func );
3938
- }
3939
- else
3940
- {
3941
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
3942
- emit_ldr_mem (a, TEMP_REG1, &trampolines.read_dword );
3943
- a.blr (TEMP_REG1);
3944
- }
3785
+ get_imm_relative (a, REG_PARAM1, resolved.read_dword .obj );
3786
+ call_arm_addr (a, resolved.read_dword .func );
3945
3787
3946
3788
mov_float_param_int_reg (a, inst.size (), dstp, REG_PARAM1.w ());
3947
3789
}
3948
3790
else if (inst.size () == 8 )
3949
3791
{
3950
- if (resolved.read_qword )
3951
- {
3952
- get_imm_relative (a, REG_PARAM1, resolved.read_qword .obj );
3953
- call_arm_addr (a, resolved.read_qword .func );
3954
- }
3955
- else
3956
- {
3957
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
3958
- emit_ldr_mem (a, TEMP_REG1, &trampolines.read_qword );
3959
- a.blr (TEMP_REG1);
3960
- }
3792
+ get_imm_relative (a, REG_PARAM1, resolved.read_qword .obj );
3793
+ call_arm_addr (a, resolved.read_qword .func );
3961
3794
3962
3795
mov_float_param_int_reg (a, inst.size (), dstp, REG_PARAM1);
3963
3796
}
@@ -3975,7 +3808,6 @@ void drcbe_arm64::op_fwrite(a64::Assembler &a, const uml::instruction &inst)
3975
3808
assert (spacesizep.is_size_space ());
3976
3809
assert ((1 << spacesizep.size ()) == inst.size ());
3977
3810
3978
- const auto &trampolines = m_accessors[spacesizep.space ()];
3979
3811
const auto &resolved = m_resolved_accessors[spacesizep.space ()];
3980
3812
3981
3813
mov_reg_param (a, 4 , REG_PARAM2, addrp);
@@ -3985,31 +3817,13 @@ void drcbe_arm64::op_fwrite(a64::Assembler &a, const uml::instruction &inst)
3985
3817
3986
3818
if (inst.size () == 4 )
3987
3819
{
3988
- if (resolved.write_dword )
3989
- {
3990
- get_imm_relative (a, REG_PARAM1, resolved.write_dword .obj );
3991
- call_arm_addr (a, resolved.write_dword .func );
3992
- }
3993
- else
3994
- {
3995
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
3996
- emit_ldr_mem (a, TEMP_REG1, &trampolines.write_dword );
3997
- a.blr (TEMP_REG1);
3998
- }
3820
+ get_imm_relative (a, REG_PARAM1, resolved.write_dword .obj );
3821
+ call_arm_addr (a, resolved.write_dword .func );
3999
3822
}
4000
3823
else if (inst.size () == 8 )
4001
3824
{
4002
- if (resolved.write_qword )
4003
- {
4004
- get_imm_relative (a, REG_PARAM1, resolved.write_qword .obj );
4005
- call_arm_addr (a, resolved.write_qword .func );
4006
- }
4007
- else
4008
- {
4009
- get_imm_relative (a, REG_PARAM1, (uintptr_t )m_space[spacesizep.space ()]);
4010
- emit_ldr_mem (a, TEMP_REG1, &trampolines.write_qword );
4011
- a.blr (TEMP_REG1);
4012
- }
3825
+ get_imm_relative (a, REG_PARAM1, resolved.write_qword .obj );
3826
+ call_arm_addr (a, resolved.write_qword .func );
4013
3827
}
4014
3828
}
4015
3829
0 commit comments