Description
A user recently asked if quanta has ARM support for TSC and what it would take to add support. It felt like a good time to add an issue and potentially revisit what it would take.
At a high level, ARM doesn't have exactly the same instruction for reading it directly, but it has a similar instruction -- mrs -- which can read.. coprocessor registers? And apparently there's a coprocessor register for a counter that works in the same way as the TSC does in x86: cntvct_el0. Additionally, there's also another coprocessor register that apparently holds the true TSC frequency: cntfrq_el0.
Additionally, I had mistakenly thought this was only doable when the process had access to run privileged instructions a la reading certain Intel performance MSRs requiring root on Linux. Turns out that this is not the case.
The major thing we're lacking at the moment is a stable way to run the mrs instruction on ARM. There's no intrinsic for it in core::arch, and even the existing ARM intrinsics are themselves all still unstable. Likewise, asm! for writing assembly directly is also still unstable.
Once either of those approaches becomes stable, we can investigate doing an initial attempt to support a TSC-like mode on ARM.
Rust asm! tracking issue: rust-lang/rust#72016