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Merge tag 'iommu-updates-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu
Pull iommu updates from Joerg Roedel: - Convert to platform remove callback returning void - Extend changing default domain to normal group - Intel VT-d updates: - Remove VT-d virtual command interface and IOASID - Allow the VT-d driver to support non-PRI IOPF - Remove PASID supervisor request support - Various small and misc cleanups - ARM SMMU updates: - Device-tree binding updates: * Allow Qualcomm GPU SMMUs to accept relevant clock properties * Document Qualcomm 8550 SoC as implementing an MMU-500 * Favour new "qcom,smmu-500" binding for Adreno SMMUs - Fix S2CR quirk detection on non-architectural Qualcomm SMMU implementations - Acknowledge SMMUv3 PRI queue overflow when consuming events - Document (in a comment) why ATS is disabled for bypass streams - AMD IOMMU updates: - 5-level page-table support - NUMA awareness for memory allocations - Unisoc driver: Support for reattaching an existing domain - Rockchip driver: Add missing set_platform_dma_ops callback - Mediatek driver: Adjust the dma-ranges - Various other small fixes and cleanups * tag 'iommu-updates-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (82 commits) iommu: Remove iommu_group_get_by_id() iommu: Make iommu_release_device() static iommu/vt-d: Remove BUG_ON in dmar_insert_dev_scope() iommu/vt-d: Remove a useless BUG_ON(dev->is_virtfn) iommu/vt-d: Remove BUG_ON in map/unmap() iommu/vt-d: Remove BUG_ON when domain->pgd is NULL iommu/vt-d: Remove BUG_ON in handling iotlb cache invalidation iommu/vt-d: Remove BUG_ON on checking valid pfn range iommu/vt-d: Make size of operands same in bitwise operations iommu/vt-d: Remove PASID supervisor request support iommu/vt-d: Use non-privileged mode for all PASIDs iommu/vt-d: Remove extern from function prototypes iommu/vt-d: Do not use GFP_ATOMIC when not needed iommu/vt-d: Remove unnecessary checks in iopf disabling path iommu/vt-d: Move PRI handling to IOPF feature path iommu/vt-d: Move pfsid and ats_qdep calculation to device probe path iommu/vt-d: Move iopf code from SVA to IOPF enabling path iommu/vt-d: Allow SVA with device-specific IOPF dmaengine: idxd: Add enable/disable device IOPF feature arm64: dts: mt8186: Add dma-ranges for the parent "soc" node ...
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‎Documentation/ABI/testing/sysfs-kernel-iommu_groups

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Original file line numberDiff line numberDiff line change
@@ -53,7 +53,6 @@ Description: /sys/kernel/iommu_groups/<grp_id>/type shows the type of default
5353

5454
The default domain type of a group may be modified only when
5555

56-
- The group has only one device.
5756
- The device in the group is not bound to any device driver.
5857
So, the users must unbind the appropriate driver before
5958
changing the default domain type.

‎Documentation/arch/x86/sva.rst

+1-1
Original file line numberDiff line numberDiff line change
@@ -107,7 +107,7 @@ process share the same page tables, thus the same MSR value.
107107
PASID Life Cycle Management
108108
===========================
109109

110-
PASID is initialized as INVALID_IOASID (-1) when a process is created.
110+
PASID is initialized as IOMMU_PASID_INVALID (-1) when a process is created.
111111

112112
Only processes that access SVA-capable devices need to have a PASID
113113
allocated. This allocation happens when a process opens/binds an SVA-capable

‎Documentation/devicetree/bindings/iommu/arm,smmu.yaml

+41-4
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@@ -53,6 +53,7 @@ properties:
5353
- qcom,sm8250-smmu-500
5454
- qcom,sm8350-smmu-500
5555
- qcom,sm8450-smmu-500
56+
- qcom,sm8550-smmu-500
5657
- const: qcom,smmu-500
5758
- const: arm,mmu-500
5859

@@ -75,9 +76,22 @@ properties:
7576
- qcom,sm8350-smmu-500
7677
- qcom,sm8450-smmu-500
7778
- const: arm,mmu-500
78-
79-
- description: Qcom Adreno GPUs implementing "arm,smmu-500"
79+
- description: Qcom Adreno GPUs implementing "qcom,smmu-500" and "arm,mmu-500"
80+
items:
81+
- enum:
82+
- qcom,sc7280-smmu-500
83+
- qcom,sm6115-smmu-500
84+
- qcom,sm6125-smmu-500
85+
- qcom,sm8150-smmu-500
86+
- qcom,sm8250-smmu-500
87+
- qcom,sm8350-smmu-500
88+
- const: qcom,adreno-smmu
89+
- const: qcom,smmu-500
90+
- const: arm,mmu-500
91+
- description: Qcom Adreno GPUs implementing "arm,mmu-500" (legacy binding)
92+
deprecated: true
8093
items:
94+
# Do not add additional SoC to this list. Instead use previous list.
8195
- enum:
8296
- qcom,sc7280-smmu-500
8397
- qcom,sm8150-smmu-500
@@ -364,6 +378,30 @@ allOf:
364378
- description: interface clock required to access smmu's registers
365379
through the TCU's programming interface.
366380

381+
- if:
382+
properties:
383+
compatible:
384+
items:
385+
- enum:
386+
- qcom,sm6115-smmu-500
387+
- qcom,sm6125-smmu-500
388+
- const: qcom,adreno-smmu
389+
- const: qcom,smmu-500
390+
- const: arm,mmu-500
391+
then:
392+
properties:
393+
clock-names:
394+
items:
395+
- const: mem
396+
- const: hlos
397+
- const: iface
398+
399+
clocks:
400+
items:
401+
- description: GPU memory bus clock
402+
- description: Voter clock required for HLOS SMMU access
403+
- description: Interface clock required for register access
404+
367405
# Disallow clocks for all other platforms with specific compatibles
368406
- if:
369407
properties:
@@ -383,12 +421,11 @@ allOf:
383421
- qcom,sdm845-smmu-500
384422
- qcom,sdx55-smmu-500
385423
- qcom,sdx65-smmu-500
386-
- qcom,sm6115-smmu-500
387-
- qcom,sm6125-smmu-500
388424
- qcom,sm6350-smmu-500
389425
- qcom,sm6375-smmu-500
390426
- qcom,sm8350-smmu-500
391427
- qcom,sm8450-smmu-500
428+
- qcom,sm8550-smmu-500
392429
then:
393430
properties:
394431
clock-names: false

‎Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml

+24-8
Original file line numberDiff line numberDiff line change
@@ -74,16 +74,16 @@ properties:
7474
renesas,ipmmu-main:
7575
$ref: /schemas/types.yaml#/definitions/phandle-array
7676
items:
77-
- items:
77+
- minItems: 1
78+
items:
7879
- description: phandle to main IPMMU
79-
- description: the interrupt bit number associated with the particular
80-
cache IPMMU device. The interrupt bit number needs to match the main
81-
IPMMU IMSSTR register. Only used by cache IPMMU instances.
80+
- description:
81+
The interrupt bit number associated with the particular cache
82+
IPMMU device. If present, the interrupt bit number needs to match
83+
the main IPMMU IMSSTR register. Only used by cache IPMMU
84+
instances.
8285
description:
83-
Reference to the main IPMMU phandle plus 1 cell. The cell is
84-
the interrupt bit number associated with the particular cache IPMMU
85-
device. The interrupt bit number needs to match the main IPMMU IMSSTR
86-
register. Only used by cache IPMMU instances.
86+
Reference to the main IPMMU.
8787

8888
required:
8989
- compatible
@@ -109,6 +109,22 @@ allOf:
109109
required:
110110
- power-domains
111111

112+
- if:
113+
properties:
114+
compatible:
115+
contains:
116+
const: renesas,rcar-gen4-ipmmu-vmsa
117+
then:
118+
properties:
119+
renesas,ipmmu-main:
120+
items:
121+
- maxItems: 1
122+
else:
123+
properties:
124+
renesas,ipmmu-main:
125+
items:
126+
- minItems: 2
127+
112128
examples:
113129
- |
114130
#include <dt-bindings/clock/r8a7791-cpg-mssr.h>

‎Documentation/devicetree/bindings/media/mediatek,mt8195-jpegdec.yaml

-7
Original file line numberDiff line numberDiff line change
@@ -26,11 +26,6 @@ properties:
2626
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
2727
Ports are according to the HW.
2828

29-
dma-ranges:
30-
maxItems: 1
31-
description: |
32-
Describes the physical address space of IOMMU maps to memory.
33-
3429
"#address-cells":
3530
const: 2
3631

@@ -89,7 +84,6 @@ required:
8984
- compatible
9085
- power-domains
9186
- iommus
92-
- dma-ranges
9387
- ranges
9488

9589
additionalProperties: false
@@ -115,7 +109,6 @@ examples:
115109
<&iommu_vpp M4U_PORT_L19_JPGDEC_BSDMA1>,
116110
<&iommu_vpp M4U_PORT_L19_JPGDEC_BUFF_OFFSET1>,
117111
<&iommu_vpp M4U_PORT_L19_JPGDEC_BUFF_OFFSET0>;
118-
dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
119112
#address-cells = <2>;
120113
#size-cells = <2>;
121114
ranges;

‎Documentation/devicetree/bindings/media/mediatek,mt8195-jpegenc.yaml

-7
Original file line numberDiff line numberDiff line change
@@ -26,11 +26,6 @@ properties:
2626
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
2727
Ports are according to the HW.
2828

29-
dma-ranges:
30-
maxItems: 1
31-
description: |
32-
Describes the physical address space of IOMMU maps to memory.
33-
3429
"#address-cells":
3530
const: 2
3631

@@ -89,7 +84,6 @@ required:
8984
- compatible
9085
- power-domains
9186
- iommus
92-
- dma-ranges
9387
- ranges
9488

9589
additionalProperties: false
@@ -113,7 +107,6 @@ examples:
113107
<&iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA>,
114108
<&iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE>,
115109
<&iommu_vpp M4U_PORT_L20_JPGENC_BSDMA>;
116-
dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
117110
#address-cells = <2>;
118111
#size-cells = <2>;
119112
ranges;

‎Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml

-5
Original file line numberDiff line numberDiff line change
@@ -56,11 +56,6 @@ properties:
5656
List of the hardware port in respective IOMMU block for current Socs.
5757
Refer to bindings/iommu/mediatek,iommu.yaml.
5858
59-
dma-ranges:
60-
maxItems: 1
61-
description: |
62-
Describes the physical address space of IOMMU maps to memory.
63-
6459
mediatek,vpu:
6560
$ref: /schemas/types.yaml#/definitions/phandle
6661
description:

‎Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml

-5
Original file line numberDiff line numberDiff line change
@@ -49,11 +49,6 @@ properties:
4949
List of the hardware port in respective IOMMU block for current Socs.
5050
Refer to bindings/iommu/mediatek,iommu.yaml.
5151
52-
dma-ranges:
53-
maxItems: 1
54-
description: |
55-
Describes the physical address space of IOMMU maps to memory.
56-
5752
mediatek,vpu:
5853
$ref: /schemas/types.yaml#/definitions/phandle
5954
description:

‎Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.yaml

-5
Original file line numberDiff line numberDiff line change
@@ -44,11 +44,6 @@ properties:
4444
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details.
4545
Ports are according to the HW.
4646
47-
dma-ranges:
48-
maxItems: 1
49-
description: |
50-
Describes the physical address space of IOMMU maps to memory.
51-
5247
required:
5348
- compatible
5449
- reg

‎arch/arm64/boot/dts/mediatek/mt8186.dtsi

+1
Original file line numberDiff line numberDiff line change
@@ -324,6 +324,7 @@
324324
#address-cells = <2>;
325325
#size-cells = <2>;
326326
compatible = "simple-bus";
327+
dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
327328
ranges;
328329

329330
gic: interrupt-controller@c000000 {

‎arch/arm64/boot/dts/mediatek/mt8195.dtsi

+1-3
Original file line numberDiff line numberDiff line change
@@ -452,6 +452,7 @@
452452
#size-cells = <2>;
453453
compatible = "simple-bus";
454454
ranges;
455+
dma-ranges = <0x0 0x0 0x0 0x0 0x4 0x0>;
455456

456457
gic: interrupt-controller@c000000 {
457458
compatible = "arm,gic-v3";
@@ -2471,7 +2472,6 @@
24712472
power-domains = <&spm MT8195_POWER_DOMAIN_VENC>;
24722473
#address-cells = <2>;
24732474
#size-cells = <2>;
2474-
dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
24752475
};
24762476

24772477
jpgdec-master {
@@ -2483,7 +2483,6 @@
24832483
<&iommu_vdo M4U_PORT_L19_JPGDEC_BSDMA1>,
24842484
<&iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET1>,
24852485
<&iommu_vdo M4U_PORT_L19_JPGDEC_BUFF_OFFSET0>;
2486-
dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
24872486
#address-cells = <2>;
24882487
#size-cells = <2>;
24892488
ranges;
@@ -2555,7 +2554,6 @@
25552554
<&iommu_vpp M4U_PORT_L20_JPGENC_C_RDMA>,
25562555
<&iommu_vpp M4U_PORT_L20_JPGENC_Q_TABLE>,
25572556
<&iommu_vpp M4U_PORT_L20_JPGENC_BSDMA>;
2558-
dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>;
25592557
#address-cells = <2>;
25602558
#size-cells = <2>;
25612559
ranges;

‎arch/x86/kernel/process_64.c

+1
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@
3939
#include <linux/io.h>
4040
#include <linux/ftrace.h>
4141
#include <linux/syscalls.h>
42+
#include <linux/iommu.h>
4243

4344
#include <asm/processor.h>
4445
#include <asm/pkru.h>

‎arch/x86/kernel/traps.c

+1-1
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@
4040
#include <linux/io.h>
4141
#include <linux/hardirq.h>
4242
#include <linux/atomic.h>
43-
#include <linux/ioasid.h>
43+
#include <linux/iommu.h>
4444

4545
#include <asm/stacktrace.h>
4646
#include <asm/processor.h>

‎drivers/dma/idxd/device.c

+4-4
Original file line numberDiff line numberDiff line change
@@ -1194,7 +1194,7 @@ static void idxd_device_set_perm_entry(struct idxd_device *idxd,
11941194
{
11951195
union msix_perm mperm;
11961196

1197-
if (ie->pasid == INVALID_IOASID)
1197+
if (ie->pasid == IOMMU_PASID_INVALID)
11981198
return;
11991199

12001200
mperm.bits = 0;
@@ -1224,7 +1224,7 @@ void idxd_wq_free_irq(struct idxd_wq *wq)
12241224
idxd_device_clear_perm_entry(idxd, ie);
12251225
ie->vector = -1;
12261226
ie->int_handle = INVALID_INT_HANDLE;
1227-
ie->pasid = INVALID_IOASID;
1227+
ie->pasid = IOMMU_PASID_INVALID;
12281228
}
12291229

12301230
int idxd_wq_request_irq(struct idxd_wq *wq)
@@ -1240,7 +1240,7 @@ int idxd_wq_request_irq(struct idxd_wq *wq)
12401240

12411241
ie = &wq->ie;
12421242
ie->vector = pci_irq_vector(pdev, ie->id);
1243-
ie->pasid = device_pasid_enabled(idxd) ? idxd->pasid : INVALID_IOASID;
1243+
ie->pasid = device_pasid_enabled(idxd) ? idxd->pasid : IOMMU_PASID_INVALID;
12441244
idxd_device_set_perm_entry(idxd, ie);
12451245

12461246
rc = request_threaded_irq(ie->vector, NULL, idxd_wq_thread, 0, "idxd-portal", ie);
@@ -1265,7 +1265,7 @@ int idxd_wq_request_irq(struct idxd_wq *wq)
12651265
free_irq(ie->vector, ie);
12661266
err_irq:
12671267
idxd_device_clear_perm_entry(idxd, ie);
1268-
ie->pasid = INVALID_IOASID;
1268+
ie->pasid = IOMMU_PASID_INVALID;
12691269
return rc;
12701270
}
12711271

‎drivers/dma/idxd/idxd.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -10,9 +10,9 @@
1010
#include <linux/cdev.h>
1111
#include <linux/idr.h>
1212
#include <linux/pci.h>
13-
#include <linux/ioasid.h>
1413
#include <linux/bitmap.h>
1514
#include <linux/perf_event.h>
15+
#include <linux/iommu.h>
1616
#include <uapi/linux/idxd.h>
1717
#include "registers.h"
1818

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