|
| 1 | +From 3e39942698fdc876135000d3fa12f5bad0eecfcc Mon Sep 17 00:00:00 2001 |
| 2 | +From: Dominik Hassler < [email protected]> |
| 3 | +Date: Fri, 20 Dec 2024 15:17:18 +0000 |
| 4 | +Subject: [PATCH] aarch64 cpu feature support for illumos |
| 5 | + |
| 6 | +--- |
| 7 | + compiler-rt/lib/builtins/cpu_model/aarch64.c | 7 ++ |
| 8 | + .../cpu_model/aarch64/fmv/illumos.inc | 109 ++++++++++++++++++ |
| 9 | + .../cpu_model/aarch64/lse_atomics/illumos.inc | 5 + |
| 10 | + 3 files changed, 121 insertions(+) |
| 11 | + create mode 100644 compiler-rt/lib/builtins/cpu_model/aarch64/fmv/illumos.inc |
| 12 | + create mode 100644 compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/illumos.inc |
| 13 | + |
| 14 | +diff --git a/src/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64.c b/src/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64.c |
| 15 | +index b868caa991b2..a789a9c47745 100644 |
| 16 | +--- a/src/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64.c |
| 17 | ++++ b/src/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64.c |
| 18 | +@@ -45,6 +45,11 @@ _Bool __aarch64_have_lse_atomics |
| 19 | + #elif defined(__ANDROID__) |
| 20 | + #include "aarch64/hwcap.inc" |
| 21 | + #include "aarch64/lse_atomics/android.inc" |
| 22 | ++#elif defined(__illumos__) |
| 23 | ++// clang-format off: should not reorder sys/auxv.h alphabetically |
| 24 | ++#include <sys/auxv.h> |
| 25 | ++// clang-format on |
| 26 | ++#include "aarch64/lse_atomics/illumos.inc" |
| 27 | + #elif __has_include(<sys/auxv.h>) |
| 28 | + #include "aarch64/hwcap.inc" |
| 29 | + #include "aarch64/lse_atomics/sysauxv.inc" |
| 30 | +@@ -73,6 +78,8 @@ struct { |
| 31 | + #elif defined(__ANDROID__) |
| 32 | + #include "aarch64/fmv/mrs.inc" |
| 33 | + #include "aarch64/fmv/android.inc" |
| 34 | ++#elif defined(__illumos__) |
| 35 | ++#include "aarch64/fmv/illumos.inc" |
| 36 | + #elif __has_include(<sys/auxv.h>) |
| 37 | + #include "aarch64/fmv/mrs.inc" |
| 38 | + #include "aarch64/fmv/sysauxv.inc" |
| 39 | +diff --git a/src/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/illumos.inc b/src/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/illumos.inc |
| 40 | +new file mode 100644 |
| 41 | +index 000000000000..2a968e1a1d1f |
| 42 | +--- /dev/null |
| 43 | ++++ b/src/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64/fmv/illumos.inc |
| 44 | +@@ -0,0 +1,109 @@ |
| 45 | ++#include <sys/auxv.h> |
| 46 | ++#define HAVE_SYS_AUXV_H |
| 47 | ++ |
| 48 | ++static void __init_cpu_features_constructor(unsigned long hwcap, |
| 49 | ++ const __ifunc_arg_t *arg) { |
| 50 | ++ |
| 51 | ++ uint64_t features = 0; |
| 52 | ++ uint64_t hwcaps[] = { hwcap, arg->_hwcap2 }; |
| 53 | ++ |
| 54 | ++ static const struct hwcap_map_t { |
| 55 | ++ uint32_t hw_cap; |
| 56 | ++ uint32_t hw_index; |
| 57 | ++ enum CPUFeatures hw_feature; |
| 58 | ++ } hwcap_map[] = { |
| 59 | ++ { AV_AARCH64_FP, 1, FEAT_FP }, |
| 60 | ++ { AV_AARCH64_ADVSIMD, 1, FEAT_SIMD }, |
| 61 | ++ { AV_AARCH64_SVE, 1, FEAT_SVE }, |
| 62 | ++ { AV_AARCH64_CRC32, 1, FEAT_CRC }, |
| 63 | ++ { AV_AARCH64_SB, 1, FEAT_SB }, |
| 64 | ++// { AV_AARCH64_SSBS, 1, RESERVED_FEAT_SSBS}, |
| 65 | ++// { AV_AARCH64_DGH, 1, RESERVED_FEAT_DGH}, |
| 66 | ++// { AV_AARCH64_AES, 1, RESERVED_FEAT_AES}, |
| 67 | ++ { AV_AARCH64_PMULL, 1, FEAT_PMULL}, |
| 68 | ++// { AV_AARCH64_SHA1, 1, RESERVED_FEAT_SHA1}, |
| 69 | ++ { AV_AARCH64_SHA256, 1, FEAT_SHA2}, |
| 70 | ++ { AV_AARCH64_SHA512, 1, FEAT_SHA2}, |
| 71 | ++ { AV_AARCH64_SHA3, 1, FEAT_SHA3}, |
| 72 | ++// { AV_AARCH64_SM3, 1, |
| 73 | ++// { AV_AARCH64_SM4, 1, |
| 74 | ++ { AV_AARCH64_LSE, 1, FEAT_LSE}, |
| 75 | ++ { AV_AARCH64_RDM, 1, FEAT_RDM}, |
| 76 | ++ { AV_AARCH64_FP16, 1, FEAT_FP16}, |
| 77 | ++ { AV_AARCH64_DOTPROD, 1, FEAT_DOTPROD}, |
| 78 | ++// { AV_AARCH64_FHM, 1, |
| 79 | ++// { AV_AARCH64_DCPOP, 1, |
| 80 | ++ { AV_AARCH64_F32MM, 1, FEAT_SVE_F32MM}, |
| 81 | ++ { AV_AARCH64_F64MM, 1, FEAT_SVE_F64MM}, |
| 82 | ++// { AV_AARCH64_DCPODP, 1, |
| 83 | ++ { AV_AARCH64_BF16, 1, FEAT_BF16}, |
| 84 | ++ { AV_AARCH64_I8MM, 1, FEAT_I8MM}, |
| 85 | ++ { AV_AARCH64_FCMA, 1, FEAT_FCMA}, |
| 86 | ++ { AV_AARCH64_JSCVT, 1, FEAT_JSCVT}, |
| 87 | ++ { AV_AARCH64_LRCPC, 1, FEAT_RCPC}, |
| 88 | ++// { AV_AARCH64_PACA, 1, |
| 89 | ++// { AV_AARCH64_PACG, 1, |
| 90 | ++ { AV_AARCH64_DIT, 1, FEAT_DIT}, |
| 91 | ++ { AV_AARCH64_2_FLAGM, 2, FEAT_FLAGM}, |
| 92 | ++ { AV_AARCH64_2_ILRCPC, 2, FEAT_RCPC}, |
| 93 | ++// { AV_AARCH64_2_LSE2, 2, |
| 94 | ++ { AV_AARCH64_2_FLAGM2, 2, FEAT_FLAGM2}, |
| 95 | ++ { AV_AARCH64_2_FRINTTS, 2, FEAT_FRINTTS}, |
| 96 | ++ { AV_AARCH64_2_BTI, 2, FEAT_BTI}, |
| 97 | ++ { AV_AARCH64_2_RNG, 2, FEAT_RNG}, |
| 98 | ++ { AV_AARCH64_2_MTE, 2, FEAT_MEMTAG2}, |
| 99 | ++// { AV_AARCH64_2_MTE3, 2, RESERVED_FEAT_MEMTAG3}, |
| 100 | ++// { AV_AARCH64_2_ECV, 2, |
| 101 | ++// { AV_AARCH64_2_AFP, 2, |
| 102 | ++// { AV_AARCH64_2_RPRES, 2, RESERVED_FEAT_RPRES}, |
| 103 | ++// { AV_AARCH64_2_LD64B, 2, |
| 104 | ++// { AV_AARCH64_2_ST64BV, 2, |
| 105 | ++// { AV_AARCH64_2_ST64BV0, ,2 |
| 106 | ++ { AV_AARCH64_2_WFXT, 2, FEAT_WFXT}, |
| 107 | ++ { AV_AARCH64_2_MOPS, 2, FEAT_MOPS}, |
| 108 | ++// { AV_AARCH64_2_HBC, 2, |
| 109 | ++// { AV_AARCH64_2_CMOW, 2, |
| 110 | ++ { AV_AARCH64_2_SVE2, 2, FEAT_SVE2}, |
| 111 | ++// { AV_AARCH64_2_SVE2_AES, 2, RESERVED_FEAT_SVE_AES}, |
| 112 | ++ { AV_AARCH64_2_SVE2_BITPERM, 2, FEAT_SVE_BITPERM}, |
| 113 | ++ { AV_AARCH64_2_SVE2_PMULL128, 2, FEAT_SVE_PMULL128}, |
| 114 | ++ { AV_AARCH64_2_SVE2_SHA3, 2, FEAT_SVE_SHA3}, |
| 115 | ++ { AV_AARCH64_2_SVE2_SM4, 2, FEAT_SVE_SM4}, |
| 116 | ++// { AV_AARCH64_2_TME, 2, |
| 117 | ++ { AV_AARCH64_2_SME, 2, FEAT_SME}, |
| 118 | ++// { AV_AARCH64_2_SME_FA64, 2, |
| 119 | ++// { AV_AARCH64_2_EBF16, 2, RESERVED_FEAT_EBF16}, |
| 120 | ++ { AV_AARCH64_2_SME_F64F64, 2, FEAT_SME_F64}, |
| 121 | ++ { AV_AARCH64_2_SME_I16I64, 2, FEAT_SME_I64} |
| 122 | ++ }; |
| 123 | ++ |
| 124 | ++ for (size_t i = 0; i < sizeof (hwcap_map) / sizeof (hwcap_map[0]); i++) |
| 125 | ++ if (hwcaps[hwcap_map[i].hw_index - 1] & hwcap_map[i].hw_cap) |
| 126 | ++ features |= (1ULL << hwcap_map[i].hw_feature); |
| 127 | ++ |
| 128 | ++ __atomic_store_n(&__aarch64_cpu_features.features, features, __ATOMIC_RELAXED); |
| 129 | ++} |
| 130 | ++ |
| 131 | ++void __init_cpu_features_resolver(unsigned long hwcap, |
| 132 | ++ const __ifunc_arg_t *arg) { |
| 133 | ++ if (__atomic_load_n(&__aarch64_cpu_features.features, __ATOMIC_RELAXED)) |
| 134 | ++ return; |
| 135 | ++ __init_cpu_features_constructor(hwcap, arg); |
| 136 | ++} |
| 137 | ++ |
| 138 | ++void CONSTRUCTOR_ATTRIBUTE __init_cpu_features(void) { |
| 139 | ++ uint32_t hwcap[2] = {0}; |
| 140 | ++ // CPU features already initialized. |
| 141 | ++ if (__atomic_load_n(&__aarch64_cpu_features.features, __ATOMIC_RELAXED)) |
| 142 | ++ return; |
| 143 | ++ |
| 144 | ++ uint_t res = getisax(hwcap, 2); |
| 145 | ++ if (res == 0) |
| 146 | ++ return; |
| 147 | ++ |
| 148 | ++ __ifunc_arg_t arg; |
| 149 | ++ arg._size = sizeof(__ifunc_arg_t); |
| 150 | ++ arg._hwcap = hwcap[0], |
| 151 | ++ arg._hwcap2 = hwcap[1]; |
| 152 | ++ __init_cpu_features_constructor(hwcap[0], &arg); |
| 153 | ++} |
| 154 | +diff --git a/src/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/illumos.inc b/src/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/illumos.inc |
| 155 | +new file mode 100644 |
| 156 | +index 000000000000..78af1a19f48d |
| 157 | +--- /dev/null |
| 158 | ++++ b/src/llvm-project/compiler-rt/lib/builtins/cpu_model/aarch64/lse_atomics/illumos.inc |
| 159 | +@@ -0,0 +1,5 @@ |
| 160 | ++static void CONSTRUCTOR_ATTRIBUTE init_have_lse_atomics(void) { |
| 161 | ++ uint32_t hwcap = 0; |
| 162 | ++ uint_t res = getisax(&hwcap, 1); |
| 163 | ++ __aarch64_have_lse_atomics = res != 0 && (hwcap & AV_AARCH64_LSE) != 0; |
| 164 | ++} |
| 165 | +-- |
| 166 | +2.47.1 |
| 167 | + |
0 commit comments