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| 1 | +.. _skiboot-6.0-rc2: |
| 2 | + |
| 3 | +skiboot-6.0-rc2 |
| 4 | +=============== |
| 5 | + |
| 6 | +skiboot v6.0-rc2 was released on Wednesday May 9th 2018. It is the second |
| 7 | +release candidate of skiboot 6.0, which will become the new stable release |
| 8 | +of skiboot following the 5.11 release, first released April 6th 2018. |
| 9 | + |
| 10 | +Skiboot 6.0 will mark the basis for op-build v2.0 and will be required for |
| 11 | +POWER9 systems. |
| 12 | + |
| 13 | +skiboot v6.0-rc2 contains all bug fixes as of :ref:`skiboot-5.11`, |
| 14 | +:ref:`skiboot-5.10.5`, and :ref:`skiboot-5.4.9` (the currently maintained |
| 15 | +stable releases). Once 6.0 is released, we do *not* expect any further |
| 16 | +stable releases in the 5.10.x series, nor in the 5.11.x series. |
| 17 | + |
| 18 | +For how the skiboot stable releases work, see :ref:`stable-rules` for details. |
| 19 | + |
| 20 | +The current plan is to cut the final 6.0 in early May (maybe in a day or two |
| 21 | +after this -rc if things look okay), with skiboot 6.0 |
| 22 | +being for all POWER8 and POWER9 platforms in op-build v2.0. |
| 23 | + |
| 24 | +Over skiboot-6.0-rc1, we have the following changes: |
| 25 | + |
| 26 | +- Update default stop-state-disable mask to cut only stop11 |
| 27 | + |
| 28 | + Stability improvements in microcode for stop4/stop5 are |
| 29 | + available in upstream hcode images. Stop4 and stop5 can |
| 30 | + be safely enabled by default. |
| 31 | + |
| 32 | + Use ~0xE0000000 to cut all but stop0,1,2 in case there |
| 33 | + are any issues with stop4/5. |
| 34 | + |
| 35 | + example: :: |
| 36 | + |
| 37 | + nvram -p ibm,skiboot --update-config opal-stop-state-disable-mask=0x1FFFFFFF |
| 38 | + |
| 39 | + **Note**: that DD2.1 chips that have a frequency <1867Mhz possible *need* to |
| 40 | + run a hcode image *different* than the default in op-build (set |
| 41 | + `BR2_HCODE_LATEST_VERSION=y` in your config) |
| 42 | + |
| 43 | +- ibm,firmware-versions: add hcode to device tree |
| 44 | + |
| 45 | + op-build commit 736a08b996e292a449c4996edb264011dfe56a40 |
| 46 | + added hcode to the VERSION partition, let's parse it out |
| 47 | + and let the user know. |
| 48 | + |
| 49 | +- ipmi: Add BMC firmware version to device tree |
| 50 | + |
| 51 | + BMC Get device ID command gives BMC firmware version details. Lets add this |
| 52 | + to device tree. User space tools will use this information to display BMC |
| 53 | + version details. |
| 54 | + |
| 55 | +- mambo: Enable XER CA32 and OV32 bits on P9 |
| 56 | + |
| 57 | + POWER9 adds 32 bit carry and overflow bits to the XER, but we need to |
| 58 | + set the relevant CTRL1 bit to enable them. |
| 59 | + |
| 60 | +- Makefile: Fix building natively on ppc64le |
| 61 | + |
| 62 | + When on ppc64le and CROSS is not set by the environment, make assumes |
| 63 | + ppc64 and sets a default CROSS. Check for ppc64le as well, so that |
| 64 | + 'make' works out of the box on ppc64le. |
| 65 | +- p9dsu: timeout for variant detection, default to 2uess |
| 66 | + |
| 67 | +- core/direct-controls: improve p9_stop_thread error handling |
| 68 | + |
| 69 | + p9_stop_thread should fail the operation if it finds the thread was |
| 70 | + already quiescd. This implies something else is doing direct controls |
| 71 | + on the thread (e.g., pdbg) or there is some exceptional condition we |
| 72 | + don't know how to deal with. Proceeding here would cause things to |
| 73 | + trample on each other, for example the hard lockup watchdog trying to |
| 74 | + send a sreset to the core while it is stopped for debugging with pdbg |
| 75 | + will end in tears. |
| 76 | + |
| 77 | + If p9_stop_thread times out waiting for the thread to quiesce, do |
| 78 | + not hit it with a core_start direct control, because we don't know |
| 79 | + what state things are in and doing more things at this point is worse |
| 80 | + than doing nothing. There is no good recipe described in the workbook |
| 81 | + to de-assert the core_stop control if it fails to quiesce the thread. |
| 82 | + After timing out here, the thread may eventually quiesce and get |
| 83 | + stuck, but that's simpler to debug than undefied behaviour. |
| 84 | + |
| 85 | +- core/direct-controls: fix p9_cont_thread for stopped/inactive threads |
| 86 | + |
| 87 | + Firstly, p9_cont_thread should check that the thread actually was |
| 88 | + quiesced before it tries to resume it. Anything could happen if we |
| 89 | + try this from an arbitrary thread state. |
| 90 | + |
| 91 | + Then when resuming a quiesced thread that is inactive or stopped (in |
| 92 | + a stop idle state), we must not send a core_start direct control, |
| 93 | + clear_maint must be used in these cases. |
| 94 | +- occ: Use major version number while checking the pstate table format |
| 95 | + |
| 96 | + The minor version increments of the pstate table are backward |
| 97 | + compatible. The minor version is changed when the pstate table |
| 98 | + remains same and the existing reserved bytes are used for pointing |
| 99 | + new data. So use only major version number while parsing the pstate |
| 100 | + table. This will allow old skiboot to parse the pstate table and |
| 101 | + handle minor version updates. |
| 102 | + |
| 103 | +- hmi: Clear unknown debug trigger |
| 104 | + |
| 105 | + On some systems, seeing hangs like this when Linux starts: :: |
| 106 | + |
| 107 | + [ 170.027252763,5] OCC: All Chip Rdy after 0 ms |
| 108 | + [ 170.062930145,5] INIT: Starting kernel at 0x20011000, fdt at 0x30ae0530 366247 bytes) |
| 109 | + [ 171.238270428,5] OPAL: Switch to little-endian OS |
| 110 | + |
| 111 | + If you look at the in memory skiboot console (or do `nvram -p |
| 112 | + ibm,skiboot --update-config log-level-driver=7`) we see the console get |
| 113 | + spammed with: :: |
| 114 | + |
| 115 | + [ 5209.109790675,7] HMI: Received HMI interrupt: HMER = 0x0000400000000000 |
| 116 | + [ 5209.109792716,7] HMI: Received HMI interrupt: HMER = 0x0000400000000000 |
| 117 | + [ 5209.109794695,7] HMI: Received HMI interrupt: HMER = 0x0000400000000000 |
| 118 | + [ 5209.109796689,7] HMI: Received HMI interrupt: HMER = 0x0000400000000000 |
| 119 | + |
| 120 | + We're taking the debug trigger (bit 17) early on, before the |
| 121 | + hmi_debug_trigger function in the kernel is set up. |
| 122 | + |
| 123 | + This clears the HMI in Skiboot and reports to the kernel instead of |
| 124 | + bringing down the machine. |
| 125 | + |
| 126 | +- core/hmi: assign flags=0 in case nothing set by handle_hmi_exception |
| 127 | + |
| 128 | + Theoretically we could have returned junk to the OS in this parameter. |
| 129 | + |
| 130 | +- SLW: Fix mambo boot to use stop states |
| 131 | + |
| 132 | + After commit 35c66b8ce5a2 ("SLW: Move MAMBO simulator checks to |
| 133 | + slw_init"), mambo boot no longer calls add_cpu_idle_state_properties() |
| 134 | + and as such we never enable stop states. |
| 135 | + |
| 136 | + After adding the call back, we get more testing coverage as well |
| 137 | + as faster mambo SMT boots. |
| 138 | + |
| 139 | +- phb4: Hardware init updates |
| 140 | + |
| 141 | + CFG Write Request Timeout was incorrectly set to informational and not |
| 142 | + fatal for both non-CAPI and CAPI, so set it to fatal. This was a |
| 143 | + mistake in the specification. Correcting this fixes a niche bug in |
| 144 | + escalation (which is necessary on pre-DD2.2) that can cause a checkstop |
| 145 | + due to a NCU timeout. |
| 146 | + |
| 147 | + In addition, set the values in the timeout control registers to match. |
| 148 | + This fixes an extremely rare and unreproducible bug, though the current |
| 149 | + timings don't make sense since they're higher than the NCU timeout (16) |
| 150 | + which will checkstop the machine anyway. |
| 151 | + |
| 152 | +- SLW: quieten 'Configuring self-restore' for DARN,NCU_SPEC_BAR and HRMOR |
| 153 | +- Experimental support for building with Clang |
| 154 | +- Improvements to testing and Travis CI |
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