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Adapt Yosys scripts for synthesis with register_file_ff and cve2_clock_gating primitive
Signed-off-by: Szymon Bieganski <[email protected]>
1 parent b8c94a3 commit 5c47568

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3 files changed

+27
-8
lines changed

3 files changed

+27
-8
lines changed

syn/syn_yosys.sh

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@@ -58,9 +58,9 @@ done
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# remove tracer (not needed for synthesis)
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rm -f $LR_SYNTH_OUT_DIR/generated/cve2_tracer.v
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# remove the FPGA & register-based register file (because we will use the
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# latch-based one instead)
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rm -f $LR_SYNTH_OUT_DIR/generated/cve2_register_file_ff.v
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# remove the FPGA & latch-based register file (because we will use the
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# register-based one instead)
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rm -f $LR_SYNTH_OUT_DIR/generated/cve2_register_file_latch.v
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rm -f $LR_SYNTH_OUT_DIR/generated/cve2_register_file_fpga.v
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yosys -c ./tcl/yosys_run_synth.tcl |& teelog syn || {

syn/tcl/syn_setup.sh

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#!/bin/bash
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# Copyright lowRISC contributors.
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# Licensed under the Apache License, Version 2.0, see LICENSE for details.
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# SPDX-License-Identifier: Apache-2.0
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if [ $# -eq 1 ]; then
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export LR_SYNTH_OUT_DIR=$1
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elif [ $# -eq 0 ]; then
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export LR_SYNTH_OUT_DIR_PREFIX="syn_out/cve2"
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export LR_SYNTH_OUT_DIR=$(date +"${LR_SYNTH_OUT_DIR_PREFIX}_%d_%m_%Y_%H_%M_%S")
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else
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echo "Usage $0 [synth_out_dir]"
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exit 1
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fi
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export LR_SYNTH_TIMING_RUN=1
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export LR_SYNTH_FLATTEN=1
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# SETUP CELL LIBRARY PATH
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# Uncomment the lines below and set the path to an appropriate .lib file
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#export LR_SYNTH_CELL_LIBRARY_PATH=~/src/OpenROAD-flow-scripts/flow/platforms/nangate45/lib/NangateOpenCellLibrary_typical.lib
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export LR_SYNTH_CELL_LIBRARY_NAME=nangate

syn/tcl/yosys_run_synth.tcl

Lines changed: 1 addition & 5 deletions
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@@ -14,18 +14,14 @@ if { $lr_synth_timing_run } {
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write_sdc_out $lr_synth_sdc_file_in $lr_synth_sdc_file_out
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}
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yosys "read_verilog -defer -sv ./rtl/prim_clock_gating.v $lr_synth_out_dir/generated/*.v"
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yosys "read_verilog -defer -sv ./rtl/cve2_clock_gating.v $lr_synth_out_dir/generated/*.v"
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if { $lr_synth_cve2_writeback_stage } {
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yosys "chparam -set WritebackStage 1 $lr_synth_top_module"
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}
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yosys "chparam -set RV32B $lr_synth_cve2_bitmanip $lr_synth_top_module"
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yosys "chparam -set RV32M $lr_synth_cve2_multiplier $lr_synth_top_module"
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yosys "chparam -set RegFile $lr_synth_cve2_regfile $lr_synth_top_module"
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yosys "synth $flatten_opt -top $lr_synth_top_module"
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yosys "opt -purge"
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