You signed in with another tab or window. Reload to refresh your session.You signed out in another tab or window. Reload to refresh your session.You switched accounts on another tab or window. Reload to refresh your session.Dismiss alert
The simplifier accepts an x86 instruction and returns a semantically equivalent but "better" x86 instruction.
"better" usually means short encoding.
This would be implemented in CpuX64/ in a table driven fashion. The table itself can hopefully be derived more or less automatically from the existing x86 opcode table.
The feature would me used by CodeGenX64/codegen.py::_SimplifyCpuIns()
The text was updated successfully, but these errors were encountered:
One way to implement this feature is to have a table that groups related instructions - roughly those with the same opcode prefix and then checks within those groups for better encodings.
The groups might also be helpful for translating from a more standard asm notation to Cwerg x86 instruction instructions.
The simplifier accepts an x86 instruction and returns a semantically equivalent but "better" x86 instruction.
"better" usually means short encoding.
This would be implemented in CpuX64/ in a table driven fashion. The table itself can hopefully be derived more or less automatically from the existing x86 opcode table.
The feature would me used by CodeGenX64/codegen.py::_SimplifyCpuIns()
The text was updated successfully, but these errors were encountered: