Switching optimization levels (partially) delayed by one transaction

[hahnjo]

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Description

When switching optimization levels with .O<n> or #pragma cling optimize (n), parts of the effect are delayed by one transaction.

Reproducer

From a default ROOT prompt (with -O1), switch to .O0 and observe that the generated LLVM IR, if dumped, only has noinline attributes for the second transaction.

ROOT version

master

Installation method

from source

Operating system

Linux

Additional context

No response

[hahnjo]

Dumped LLVM IR

root [0] int a = 0;
SetLLVMFunctionAttributesForDefinition: OptimizationLevel = 1
CodeGeneratorImpl::StartModule: OptimizationLevel = 1
CodeGeneratorImpl::Initialize
; ModuleID = 'cling-module-6'
source_filename = "cling-module-6"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZN11__cling_N501aE = local_unnamed_addr global i32 0, align 4
@_ZN5cling7runtime6gClingE = external local_unnamed_addr global ptr, align 8

; Function Attrs: mustprogress uwtable
define void @_ZN11__cling_N5015__cling_Un1Qu30EPv(ptr noundef %0) local_unnamed_addr #0 {
  %2 = load ptr, ptr @_ZN5cling7runtime6gClingE, align 8, !tbaa !10
  %3 = load i32, ptr @_ZN11__cling_N501aE, align 4, !tbaa !6
  %4 = sext i32 %3 to i64
  tail call void @_ZN5cling7runtime8internal15setValueNoAllocEPvS2_S2_cy(ptr noundef %2, ptr noundef %0, ptr noundef nonnull inttoptr (i64 18445072 to ptr), i8 noundef signext 0, i64 noundef %4)
  ret void
}

declare void @_ZN5cling7runtime8internal15setValueNoAllocEPvS2_S2_cy(ptr noundef %0, ptr noundef %1, ptr noundef %2, i8 noundef signext %3, i64 noundef %4) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx
8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic"
 }

!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!llvm.errno.tbaa = !{!6}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{i32 7, !"frame-pointer", i32 2}
!5 = !{!"clang version 22.1.8"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
root [1] a = 1;
SetLLVMFunctionAttributesForDefinition: OptimizationLevel = 1
CodeGeneratorImpl::StartModule: OptimizationLevel = 1
CodeGeneratorImpl::Initialize
; ModuleID = 'cling-module-7'
source_filename = "cling-module-7"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZN5cling7runtime6gClingE = external local_unnamed_addr global ptr, align 8
@_ZN11__cling_N501aE = external local_unnamed_addr global i32, align 4

; Function Attrs: mustprogress uwtable
define void @_ZN11__cling_N5115__cling_Un1Qu31EPv(ptr noundef %0) local_unnamed_addr #0 {
  %2 = load ptr, ptr @_ZN5cling7runtime6gClingE, align 8, !tbaa !10
  store i32 1, ptr @_ZN11__cling_N501aE, align 4, !tbaa !6
  tail call void @_ZN5cling7runtime8internal15setValueNoAllocEPvS2_S2_cy(ptr noundef %2, ptr noundef %0, ptr noundef nonnull inttoptr (i64 18445072 to ptr), i8 noundef signext 0, i64 noundef 1)
  ret void
}

declare void @_ZN5cling7runtime8internal15setValueNoAllocEPvS2_S2_cy(ptr noundef %0, ptr noundef %1, ptr noundef %2, i8 noundef signext %3, i64 noundef %4) local_unnamed_addr #1

attributes #0 = { mustprogress uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx
8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic"
 }

!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}
!llvm.errno.tbaa = !{!6}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{i32 7, !"frame-pointer", i32 2}
!5 = !{!"clang version 22.1.8"}
!6 = !{!7, !7, i64 0}
!7 = !{!"int", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"any pointer", !8, i64 0}
root [2] .O0
root [3] a = 2;
SetLLVMFunctionAttributesForDefinition: OptimizationLevel = 1
CodeGeneratorImpl::StartModule: OptimizationLevel = 0
CodeGeneratorImpl::Initialize
; ModuleID = 'cling-module-8'
source_filename = "cling-module-8"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZN5cling7runtime6gClingE = external global ptr, align 8
@_ZN11__cling_N501aE = external global i32, align 4

; Function Attrs: mustprogress uwtable
define void @_ZN11__cling_N5215__cling_Un1Qu32EPv(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8, !tbaa !6
  %3 = load ptr, ptr @_ZN5cling7runtime6gClingE, align 8, !tbaa !6
  %4 = load ptr, ptr %2, align 8, !tbaa !6
  store i32 2, ptr @_ZN11__cling_N501aE, align 4, !tbaa !10
  call void @_ZN5cling7runtime8internal15setValueNoAllocEPvS2_S2_cy(ptr noundef %3, ptr noundef %4, ptr noundef inttoptr (i64 18445072 to ptr), i8 noundef signext 0, i64 noundef 2)
  ret void
}

declare void @_ZN5cling7runtime8internal15setValueNoAllocEPvS2_S2_cy(ptr noundef %0, ptr noundef %1, ptr noundef %2, i8 noundef signext %3, i64 noundef %4) #1

attributes #0 = { mustprogress uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx
8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic"
 }

!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{i32 7, !"frame-pointer", i32 2}
!5 = !{!"clang version 22.1.8"}
!6 = !{!7, !7, i64 0}
!7 = !{!"any pointer", !8, i64 0}
!8 = !{!"omnipotent char", !9, i64 0}
!9 = !{!"Simple C++ TBAA"}
!10 = !{!11, !11, i64 0}
!11 = !{!"int", !8, i64 0}
root [4] a = 3;
SetLLVMFunctionAttributesForDefinition: OptimizationLevel = 0
CodeGeneratorImpl::StartModule: OptimizationLevel = 0
CodeGeneratorImpl::Initialize
; ModuleID = 'cling-module-9'
source_filename = "cling-module-9"
target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

@_ZN5cling7runtime6gClingE = external global ptr, align 8
@_ZN11__cling_N501aE = external global i32, align 4

; Function Attrs: mustprogress noinline uwtable
define void @_ZN11__cling_N5315__cling_Un1Qu33EPv(ptr noundef %0) #0 {
  %2 = alloca ptr, align 8
  store ptr %0, ptr %2, align 8
  %3 = load ptr, ptr @_ZN5cling7runtime6gClingE, align 8
  %4 = load ptr, ptr %2, align 8
  store i32 3, ptr @_ZN11__cling_N501aE, align 4
  call void @_ZN5cling7runtime8internal15setValueNoAllocEPvS2_S2_cy(ptr noundef %3, ptr noundef %4, ptr noundef inttoptr (i64 18445072 to ptr), i8 noundef signext 0, i64 noundef 3)
  ret void
}

declare void @_ZN5cling7runtime8internal15setValueNoAllocEPvS2_S2_cy(ptr noundef %0, ptr noundef %1, ptr noundef %2, i8 noundef signext %3, i64 noundef %4) #1

attributes #0 = { mustprogress noinline uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }

!llvm.module.flags = !{!0, !1, !2, !3, !4}
!llvm.ident = !{!5}

!0 = !{i32 1, !"wchar_size", i32 4}
!1 = !{i32 8, !"PIC Level", i32 2}
!2 = !{i32 7, !"PIE Level", i32 2}
!3 = !{i32 7, !"uwtable", i32 2}
!4 = !{i32 7, !"frame-pointer", i32 2}
!5 = !{!"clang version 22.1.8"}

[dpiparo]

Maybe a naive idea, but should the optimisation level a property of TInterpreter and an interface be added to control it programmatically?