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Merge #373
373: `SCB.ICSR.VECTACTIVE` is 9 bits, not 8 r=adamgreig a=TDHolmes Closes #332 Co-authored-by: Tyler Holmes <[email protected]>
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CHANGELOG.md

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@@ -18,6 +18,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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There is a feature `cm7` to enable access to these.
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- Added `delay::Delay::with_source`, a constructor that lets you specify
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the SysTick clock source (#374).
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- Added the capability for `DWT` to do cycle count comparison (#367).
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- Updated `SCB.ICSR.VECTACTIVE`/`SCB::vect_active()` to be 9 bits instead of 8.
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Also fixes `VectActive::from` to take a `u16` and subtract `16` for
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`VectActive::Interrupt`s to match `SBC::vect_active()` (#373).
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### Deprecated
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src/peripheral/scb.rs

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@@ -170,9 +170,10 @@ impl SCB {
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/// Returns the active exception number
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#[inline]
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pub fn vect_active() -> VectActive {
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let icsr = unsafe { ptr::read(&(*SCB::ptr()).icsr as *const _ as *const u32) };
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let icsr =
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unsafe { ptr::read_volatile(&(*SCB::ptr()).icsr as *const _ as *const u32) } & 0x1FF;
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match icsr as u8 {
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match icsr as u16 {
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0 => VectActive::ThreadMode,
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2 => VectActive::Exception(Exception::NonMaskableInt),
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3 => VectActive::Exception(Exception::HardFault),
@@ -274,15 +275,15 @@ pub enum VectActive {
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/// Device specific exception (external interrupts)
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Interrupt {
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/// Interrupt number. This number is always within half open range `[0, 240)`
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irqn: u8,
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/// Interrupt number. This number is always within half open range `[0, 512)` (9 bit)
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irqn: u16,
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},
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}
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impl VectActive {
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/// Converts a `byte` into `VectActive`
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/// Converts a vector number into `VectActive`
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#[inline]
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pub fn from(vect_active: u8) -> Option<Self> {
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pub fn from(vect_active: u16) -> Option<Self> {
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Some(match vect_active {
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0 => VectActive::ThreadMode,
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2 => VectActive::Exception(Exception::NonMaskableInt),
@@ -300,7 +301,7 @@ impl VectActive {
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12 => VectActive::Exception(Exception::DebugMonitor),
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14 => VectActive::Exception(Exception::PendSV),
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15 => VectActive::Exception(Exception::SysTick),
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irqn if irqn >= 16 => VectActive::Interrupt { irqn },
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irqn if (16..512).contains(&irqn) => VectActive::Interrupt { irqn: irqn - 16 },
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_ => return None,
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})
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}

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