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Merge pull request #571 from nikgul/probe-rs
Migrate to probe-rs-tools
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microbit/src/03-setup/README.md

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@@ -30,7 +30,7 @@ should work but we have listed the version we have tested.
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[`cargo-binutils`]: https://github.com/rust-embedded/cargo-binutils
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- [`cargo-embed`]. Version 0.18.0 or newer.
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- [`cargo-embed`]. Version 0.24.0 or newer.
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[`cargo-embed`]: https://probe.rs/docs/tools/cargo-embed/
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In order to install cargo-embed, first install its [prerequisites](https://probe.rs/docs/getting-started/installation/) (note: these instructions are part of the more general [`probe-rs`](https://probe.rs/) embedded debugging toolkit). Then install it with cargo:
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```console
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$ cargo install cargo-embed --vers 0.18.0
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$ cargo install probe-rs-tools --vers 0.24.0
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$ cargo embed --version
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cargo-embed 0.18.0
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git commit: crates.io
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cargo-embed 0.24.0 (git commit: crates.io)
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```
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### This repository

microbit/src/03-setup/verify.md

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program the micro:bit ships with should start blinking the red LEDs on its back, you
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can ignore them.
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Now let's see if probe-rs, and by extensions cargo-embed can see your micro:bit, you can do this by running the following command.
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``` console
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$ probe-rs list
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The following debug probes were found:
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[0]: BBC micro:bit CMSIS-DAP -- 0d28:0204:990636020005282030f57fa14252d446000000006e052820 (CMSIS-DAP)
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```
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Or if you want more information about the micro:bits debug capabilities then you can run:
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``` console
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$ probe-rs info
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Probing target via JTAG
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Error identifying target using protocol JTAG: The probe does not support the JTAG protocol.
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Probing target via SWD
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ARM Chip with debug port Default:
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Debug Port: DPv1, DP Designer: ARM Ltd
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├── 0 MemoryAP
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│ └── ROM Table (Class 1), Designer: Nordic VLSI ASA
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│ ├── Cortex-M4 SCS (Generic IP component)
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│ │ └── CPUID
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│ │ ├── IMPLEMENTER: ARM Ltd
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│ │ ├── VARIANT: 0
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│ │ ├── PARTNO: Cortex-M4
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│ │ └── REVISION: 1
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│ ├── Cortex-M3 DWT (Generic IP component)
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│ ├── Cortex-M3 FBP (Generic IP component)
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│ ├── Cortex-M3 ITM (Generic IP component)
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│ ├── Cortex-M4 TPIU (Coresight Component)
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│ └── Cortex-M4 ETM (Coresight Component)
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└── 1 Unknown AP (Designer: Nordic VLSI ASA, Class: Undefined, Type: 0x0, Variant: 0x0, Revision: 0x0)
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Debugging RISC-V targets over SWD is not supported. For these targets, JTAG is the only supported protocol. RISC-V specific information cannot be printed.
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Debugging Xtensa targets over SWD is not supported. For these targets, JTAG is the only supported protocol. Xtensa specific information cannot be printed.
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```
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Next up you will have to modify `Embed.toml` in the `src/03-setup` directory of the
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book's source code. In the `default.general` section you will find two commented out
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chip variants:

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