target-feature: enable rust target features implied by target-cpu

Normally LLVM and rustc agree about what features are implied by
target-cpu, but for NVPTX, LLVM considers sm_* and ptx* features to be
exclusive, which makes sense for codegen purposes. But in Rust, we want
to think of them as:

  sm_{sver} means that the target supports the hardware features of sver

  ptx{pver} means the driver supports PTX ISA pver

Intrinsics usually require a minimum sm_{sver} and ptx{pver}.

Prior to this commit, -Ctarget-cpu=sm_70 would activate only sm_70 and
ptx60 (the minimum PTX version that supports sm_70, which maximizes
driver compatibility). With this commit, it also activates all the
implied target features (sm_20, ..., sm_62; ptx32, ..., ptx50).

Author: jedbrown

compiler/rustc_codegen_llvm/src/llvm_util.rs

@@ -346,11 +346,12 @@ pub(crate) fn target_config(sess: &Session) -> TargetConfig {
     let target_machine = create_informational_target_machine(sess, true);
     // Compute which of the known target features are enabled in the 'base' target machine. We only
     // consider "supported" features; "forbidden" features are not reflected in `cfg` as of now.
+    let mut cpu_implied_features: Vec<(bool, Symbol)> = Vec::new();
     let mut features: FxHashSet<Symbol> = sess
         .target
         .rust_target_features()
         .iter()
-        .filter(|(feature, _, _)| {
+        .filter(|(feature, _, implied)| {
             // skip checking special features, as LLVM may not understand them
             if RUSTC_SPECIAL_FEATURES.contains(feature) {
                 return true;
@@ -365,6 +366,7 @@ pub(crate) fn target_config(sess: &Session) -> TargetConfig {
                         return false;
                     }
                 }
+                cpu_implied_features.extend(implied.iter().map(|f| (true, Symbol::intern(f))));
                 true
             } else {
                 false
@@ -373,14 +375,15 @@ pub(crate) fn target_config(sess: &Session) -> TargetConfig {
         .map(|(feature, _, _)| Symbol::intern(feature))
         .collect();
 
-    // Add enabled and remove disabled features.
-    for (enabled, feature) in
+    // Parse -Ctarget-feature=+feature1,-feature2
+    let cg_target_features =
         sess.opts.cg.target_feature.split(',').filter_map(|s| match s.chars().next() {
             Some('+') => Some((true, Symbol::intern(&s[1..]))),
             Some('-') => Some((false, Symbol::intern(&s[1..]))),
             _ => None,
-        })
-    {
+        });
+    // Add features implied by -Ctarget-cpu followed by enabling/removing those specified by -Ctarget-feature
+    for (enabled, feature) in cpu_implied_features.into_iter().chain(cg_target_features) {
         if enabled {
             // Also add all transitively implied features.
 

tests/ui/target-feature/implied-features-nvptx.rs

@@ -0,0 +1,28 @@
+//@ assembly-output: ptx-linker
+//@ compile-flags: --crate-type cdylib -C target-cpu=sm_80 -Z unstable-options -Clinker-flavor=llbc
+//@ only-nvptx64
+//@ build-pass
+#![no_std]
+#![allow(dead_code)]
+
+#[panic_handler]
+pub fn panic(_info: &core::panic::PanicInfo) -> ! {
+    loop {}
+}
+
+// -Ctarget-cpu=sm_80 directly enables sm_80 and ptx70
+#[cfg(not(all(target_feature = "sm_80", target_feature = "ptx70")))]
+compile_error!("direct target features not enabled");
+
+// -Ctarget-cpu=sm_80 implies all earlier sm_* and ptx* features.
+#[cfg(not(all(
+    target_feature = "sm_60",
+    target_feature = "sm_70",
+    target_feature = "ptx50",
+    target_feature = "ptx60",
+)))]
+compile_error!("implied target features not enabled");
+
+// -Ctarget-cpu=sm_80 implies all earlier sm_* and ptx* features.
+#[cfg(target_feature = "ptx71")]
+compile_error!("sm_80 requires only ptx70, but ptx71 enabled");